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realtek: remove DSA internal PCS functions
Now that there is a dedicated PCS driver remove the old functions from the DSA driver and make use of the new ones. Signed-off-by: Markus Stockhausen <[email protected]> Link: openwrt/openwrt#20129 Signed-off-by: Hauke Mehrtens <[email protected]>
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8 files changed

+22
-253
lines changed

8 files changed

+22
-253
lines changed

target/linux/realtek/files-6.12/drivers/net/dsa/rtl83xx/common.c

Lines changed: 14 additions & 20 deletions
Original file line numberDiff line numberDiff line change
@@ -26,8 +26,7 @@ extern const struct rtl838x_reg rtl931x_reg;
2626
extern const struct dsa_switch_ops rtl83xx_switch_ops;
2727
extern const struct dsa_switch_ops rtl930x_switch_ops;
2828

29-
extern const struct phylink_pcs_ops rtl83xx_pcs_ops;
30-
extern const struct phylink_pcs_ops rtl93xx_pcs_ops;
29+
extern struct phylink_pcs *rtpcs_create(struct device *dev, struct device_node *np, int port);
3130

3231
int rtl83xx_port_get_stp_state(struct rtl838x_switch_priv *priv, int port)
3332
{
@@ -268,7 +267,7 @@ static int rtldsa_bus_c45_write(struct mii_bus *bus, int addr, int devad, int re
268267

269268
static int __init rtl83xx_mdio_probe(struct rtl838x_switch_priv *priv)
270269
{
271-
struct device_node *dn, *phy_node, *led_node, *np, *mii_np;
270+
struct device_node *dn, *phy_node, *pcs_node, *led_node, *np, *mii_np;
272271
struct device *dev = priv->dev;
273272
struct mii_bus *bus;
274273
int ret;
@@ -342,10 +341,21 @@ static int __init rtl83xx_mdio_probe(struct rtl838x_switch_priv *priv)
342341
continue;
343342
}
344343

344+
/*
345+
* TODO: phylink_pcs was completely converted to the standalone PCS driver - see
346+
* rtpcs_create() below. Nevertheless we still make use of the old SerDes <sds>
347+
* attribute of the phy node for the scatterd SerDes configuration functions. As
348+
* soon as the PCS driver can completely configure the SerDes this is no longer
349+
* needed.
350+
*/
351+
345352
if (of_property_read_u32(phy_node, "sds", &priv->ports[pn].sds_num))
346353
priv->ports[pn].sds_num = -1;
347354
pr_debug("%s port %d has SDS %d\n", __func__, pn, priv->ports[pn].sds_num);
348355

356+
pcs_node = of_parse_phandle(dn, "pcs-handle", 0);
357+
priv->pcs[pn] = rtpcs_create(priv->dev, pcs_node, pn);
358+
349359
if (of_get_phy_mode(dn, &interface))
350360
interface = PHY_INTERFACE_MODE_NA;
351361
if (interface == PHY_INTERFACE_MODE_USXGMII)
@@ -1501,10 +1511,10 @@ static int rtldsa_ethernet_loaded(struct platform_device *pdev)
15011511

15021512
static int __init rtl83xx_sw_probe(struct platform_device *pdev)
15031513
{
1504-
int i, err = 0;
15051514
struct rtl838x_switch_priv *priv;
15061515
struct device *dev = &pdev->dev;
15071516
u64 bpdu_mask;
1517+
int err = 0;
15081518

15091519
pr_debug("Probing RTL838X switch device\n");
15101520
if (!pdev->dev.of_node) {
@@ -1616,22 +1626,6 @@ static int __init rtl83xx_sw_probe(struct platform_device *pdev)
16161626
}
16171627
pr_debug("Chip version %c\n", priv->version);
16181628

1619-
for (i = 0; i <= priv->cpu_port; i++) {
1620-
switch (soc_info.family) {
1621-
case RTL8380_FAMILY_ID:
1622-
case RTL8390_FAMILY_ID:
1623-
priv->pcs[i].pcs.ops = &rtl83xx_pcs_ops;
1624-
break;
1625-
case RTL9300_FAMILY_ID:
1626-
case RTL9310_FAMILY_ID:
1627-
priv->pcs[i].pcs.ops = &rtl93xx_pcs_ops;
1628-
break;
1629-
}
1630-
priv->pcs[i].pcs.neg_mode = true;
1631-
priv->pcs[i].priv = priv;
1632-
priv->pcs[i].port = i;
1633-
}
1634-
16351629
err = rtl83xx_mdio_probe(priv);
16361630
if (err) {
16371631
/* Probing fails the 1st time because of missing ethernet driver

target/linux/realtek/files-6.12/drivers/net/dsa/rtl83xx/dsa.c

Lines changed: 6 additions & 163 deletions
Original file line numberDiff line numberDiff line change
@@ -567,158 +567,13 @@ static int rtl93xx_get_sds(struct phy_device *phydev)
567567
return sds_num;
568568
}
569569

570-
static void rtldsa_83xx_pcs_get_state(struct phylink_pcs *pcs, struct phylink_link_state *state)
571-
{
572-
struct rtl838x_pcs *rtpcs = container_of(pcs, struct rtl838x_pcs, pcs);
573-
struct rtl838x_switch_priv *priv = rtpcs->priv;
574-
int port = rtpcs->port;
575-
u64 speed;
576-
577-
state->link = 0;
578-
state->speed = SPEED_UNKNOWN;
579-
state->duplex = DUPLEX_UNKNOWN;
580-
state->pause &= ~(MLO_PAUSE_RX | MLO_PAUSE_TX);
581-
582-
if (port < 0 || port > priv->cpu_port)
583-
return;
584-
585-
if (!(priv->r->get_port_reg_le(priv->r->mac_link_sts) & BIT_ULL(port)))
586-
return;
587-
588-
state->link = 1;
589-
590-
if (priv->r->get_port_reg_le(priv->r->mac_link_dup_sts) & BIT_ULL(port))
591-
state->duplex = DUPLEX_FULL;
592-
else
593-
state->duplex = DUPLEX_HALF;
594-
595-
speed = priv->r->get_port_reg_le(priv->r->mac_link_spd_sts(port));
596-
speed = (speed >> ((port % 16) << 1)) & 0x3;
597-
598-
switch (speed) {
599-
case RTL_SPEED_10:
600-
state->speed = SPEED_10;
601-
break;
602-
case RTL_SPEED_100:
603-
state->speed = SPEED_100;
604-
break;
605-
case RTL_SPEED_1000:
606-
state->speed = SPEED_1000;
607-
break;
608-
case 3:
609-
/*
610-
* This is ok so far but with minor inconsistencies. On RTL838x this setting is
611-
* for either 500M or 2G. It might be that MAC_GLITE_STS register tells more. On
612-
* RTL839x these vendor specifics are derived from MAC_LINK_500M_STS and mode 3
613-
* is 10G. This is of interest so resolve to it. Sadly it is off by one for the
614-
* current RTL_SPEED_10000 (=4) definition for RTL93xx.
615-
*/
616-
state->speed = SPEED_10000;
617-
break;
618-
}
619-
620-
if (priv->r->get_port_reg_le(priv->r->mac_rx_pause_sts) & BIT_ULL(port))
621-
state->pause |= MLO_PAUSE_RX;
622-
if (priv->r->get_port_reg_le(priv->r->mac_tx_pause_sts) & BIT_ULL(port))
623-
state->pause |= MLO_PAUSE_TX;
624-
}
625-
626-
static void rtldsa_93xx_pcs_get_state(struct phylink_pcs *pcs,
627-
struct phylink_link_state *state)
628-
{
629-
struct rtl838x_pcs *rtpcs = container_of(pcs, struct rtl838x_pcs, pcs);
630-
struct rtl838x_switch_priv *priv = rtpcs->priv;
631-
int port = rtpcs->port;
632-
u64 speed;
633-
u64 link;
634-
u64 media;
635-
636-
state->link = 0;
637-
state->speed = SPEED_UNKNOWN;
638-
state->duplex = DUPLEX_UNKNOWN;
639-
state->pause &= ~(MLO_PAUSE_RX | MLO_PAUSE_TX);
640-
641-
if (port < 0 || port > priv->cpu_port)
642-
return;
643-
644-
/* On the RTL9300 for at least the RTL8226B PHY, the MAC-side link
645-
* state needs to be read twice in order to read a correct result.
646-
* This would not be necessary for ports connected e.g. to RTL8218D
647-
* PHYs.
648-
*/
649-
link = priv->r->get_port_reg_le(priv->r->mac_link_sts);
650-
link = priv->r->get_port_reg_le(priv->r->mac_link_sts);
651-
if (!(link & BIT_ULL(port)))
652-
return;
653-
654-
state->link = 1;
655-
656-
if (priv->family_id == RTL9310_FAMILY_ID)
657-
media = priv->r->get_port_reg_le(RTL931X_MAC_LINK_MEDIA_STS);
658-
659-
if (priv->family_id == RTL9300_FAMILY_ID)
660-
media = sw_r32(RTL930X_MAC_LINK_MEDIA_STS);
661-
662-
pr_debug("%s: link state port %d: %llx, media %llx\n", __func__, port,
663-
link & BIT_ULL(port), media);
664-
665-
if (priv->r->get_port_reg_le(priv->r->mac_link_dup_sts) & BIT_ULL(port))
666-
state->duplex = DUPLEX_FULL;
667-
else
668-
state->duplex = DUPLEX_HALF;
669-
670-
speed = priv->r->get_port_reg_le(priv->r->mac_link_spd_sts(port));
671-
speed = (speed >> ((port % 8) << 2)) & 0xf;
672-
switch (speed) {
673-
case RTL_SPEED_10:
674-
state->speed = SPEED_10;
675-
break;
676-
case RTL_SPEED_100:
677-
state->speed = SPEED_100;
678-
break;
679-
case RTL_SPEED_1000:
680-
state->speed = SPEED_1000;
681-
break;
682-
case RTL_SPEED_10000:
683-
state->speed = SPEED_10000;
684-
break;
685-
case RTL_SPEED_2500:
686-
state->speed = SPEED_2500;
687-
break;
688-
case RTL_SPEED_5000:
689-
state->speed = SPEED_5000;
690-
break;
691-
default:
692-
pr_err("%s: unknown speed: %d\n", __func__, (u32)speed & 0xf);
693-
}
694-
695-
pr_debug("%s: speed is: %d %d\n", __func__, (u32)speed & 0xf, state->speed);
696-
if (priv->r->get_port_reg_le(priv->r->mac_rx_pause_sts) & BIT_ULL(port))
697-
state->pause |= MLO_PAUSE_RX;
698-
if (priv->r->get_port_reg_le(priv->r->mac_tx_pause_sts) & BIT_ULL(port))
699-
state->pause |= MLO_PAUSE_TX;
700-
}
701-
702-
static int rtl83xx_pcs_config(struct phylink_pcs *pcs, unsigned int neg_mode,
703-
phy_interface_t interface,
704-
const unsigned long *advertising,
705-
bool permit_pause_to_mac)
706-
{
707-
return 0;
708-
}
709-
710-
static void rtl83xx_pcs_an_restart(struct phylink_pcs *pcs)
711-
{
712-
/* No restart functionality existed before we migrated to pcs */
713-
}
714-
715-
static struct phylink_pcs *rtl83xx_phylink_mac_select_pcs(struct dsa_switch *ds,
716-
int port,
717-
phy_interface_t interface)
570+
static struct phylink_pcs *rtldsa_phylink_mac_select_pcs(struct dsa_switch *ds,
571+
int port,
572+
phy_interface_t interface)
718573
{
719574
struct rtl838x_switch_priv *priv = ds->priv;
720575

721-
return &priv->pcs[port].pcs;
576+
return priv->pcs[port];
722577
}
723578

724579
static void rtl83xx_config_interface(int port, phy_interface_t interface)
@@ -2678,12 +2533,6 @@ static int rtldsa_phy_write(struct dsa_switch *ds, int addr, int regnum, u16 val
26782533
return mdiobus_write_nested(priv->parent_bus, addr, regnum, val);
26792534
}
26802535

2681-
const struct phylink_pcs_ops rtl83xx_pcs_ops = {
2682-
.pcs_an_restart = rtl83xx_pcs_an_restart,
2683-
.pcs_get_state = rtldsa_83xx_pcs_get_state,
2684-
.pcs_config = rtl83xx_pcs_config,
2685-
};
2686-
26872536
const struct dsa_switch_ops rtl83xx_switch_ops = {
26882537
.get_tag_protocol = rtl83xx_get_tag_protocol,
26892538
.setup = rtl83xx_setup,
@@ -2695,7 +2544,7 @@ const struct dsa_switch_ops rtl83xx_switch_ops = {
26952544
.phylink_mac_config = rtl83xx_phylink_mac_config,
26962545
.phylink_mac_link_down = rtl83xx_phylink_mac_link_down,
26972546
.phylink_mac_link_up = rtl83xx_phylink_mac_link_up,
2698-
.phylink_mac_select_pcs = rtl83xx_phylink_mac_select_pcs,
2547+
.phylink_mac_select_pcs = rtldsa_phylink_mac_select_pcs,
26992548

27002549
.get_strings = rtldsa_get_strings,
27012550
.get_ethtool_stats = rtldsa_get_ethtool_stats,
@@ -2741,12 +2590,6 @@ const struct dsa_switch_ops rtl83xx_switch_ops = {
27412590
.port_bridge_flags = rtl83xx_port_bridge_flags,
27422591
};
27432592

2744-
const struct phylink_pcs_ops rtl93xx_pcs_ops = {
2745-
.pcs_an_restart = rtl83xx_pcs_an_restart,
2746-
.pcs_get_state = rtldsa_93xx_pcs_get_state,
2747-
.pcs_config = rtl83xx_pcs_config,
2748-
};
2749-
27502593
const struct dsa_switch_ops rtl930x_switch_ops = {
27512594
.get_tag_protocol = rtl83xx_get_tag_protocol,
27522595
.setup = rtl93xx_setup,
@@ -2758,7 +2601,7 @@ const struct dsa_switch_ops rtl930x_switch_ops = {
27582601
.phylink_mac_config = rtl93xx_phylink_mac_config,
27592602
.phylink_mac_link_down = rtl93xx_phylink_mac_link_down,
27602603
.phylink_mac_link_up = rtl93xx_phylink_mac_link_up,
2761-
.phylink_mac_select_pcs = rtl83xx_phylink_mac_select_pcs,
2604+
.phylink_mac_select_pcs = rtldsa_phylink_mac_select_pcs,
27622605

27632606
.get_strings = rtldsa_get_strings,
27642607
.get_ethtool_stats = rtldsa_get_ethtool_stats,

target/linux/realtek/files-6.12/drivers/net/dsa/rtl83xx/rtl838x.c

Lines changed: 0 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -261,11 +261,6 @@ static inline int rtl838x_l2_port_new_sa_fwd(int p)
261261
return RTL838X_L2_PORT_NEW_SA_FWD(p);
262262
}
263263

264-
static inline int rtl838x_mac_link_spd_sts(int p)
265-
{
266-
return RTL838X_MAC_LINK_SPD_STS(p);
267-
}
268-
269264
inline static int rtl838x_trk_mbr_ctr(int group)
270265
{
271266
return RTL838X_TRK_MBR_CTR + (group << 2);
@@ -1706,11 +1701,6 @@ const struct rtl838x_reg rtl838x_reg = {
17061701
.mir_ctrl = RTL838X_MIR_CTRL,
17071702
.mir_dpm = RTL838X_MIR_DPM_CTRL,
17081703
.mir_spm = RTL838X_MIR_SPM_CTRL,
1709-
.mac_link_sts = RTL838X_MAC_LINK_STS,
1710-
.mac_link_dup_sts = RTL838X_MAC_LINK_DUP_STS,
1711-
.mac_link_spd_sts = rtl838x_mac_link_spd_sts,
1712-
.mac_rx_pause_sts = RTL838X_MAC_RX_PAUSE_STS,
1713-
.mac_tx_pause_sts = RTL838X_MAC_TX_PAUSE_STS,
17141704
.read_l2_entry_using_hash = rtl838x_read_l2_entry_using_hash,
17151705
.write_l2_entry_using_hash = rtl838x_write_l2_entry_using_hash,
17161706
.read_cam = rtl838x_read_cam,

target/linux/realtek/files-6.12/drivers/net/dsa/rtl83xx/rtl838x.h

Lines changed: 1 addition & 30 deletions
Original file line numberDiff line numberDiff line change
@@ -123,24 +123,6 @@
123123
#define RTL839X_MAC_LINK_STS (0x0390)
124124
#define RTL930X_MAC_LINK_STS (0xCB10)
125125
#define RTL931X_MAC_LINK_STS (0x0EC0)
126-
#define RTL838X_MAC_LINK_SPD_STS(p) (0xa190 + (((p >> 4) << 2)))
127-
#define RTL839X_MAC_LINK_SPD_STS(p) (0x03a0 + (((p >> 4) << 2)))
128-
#define RTL930X_MAC_LINK_SPD_STS(p) (0xCB18 + (((p >> 3) << 2)))
129-
#define RTL931X_MAC_LINK_SPD_STS (0x0ED0)
130-
#define RTL838X_MAC_LINK_DUP_STS (0xa19c)
131-
#define RTL839X_MAC_LINK_DUP_STS (0x03b0)
132-
#define RTL930X_MAC_LINK_DUP_STS (0xCB28)
133-
#define RTL931X_MAC_LINK_DUP_STS (0x0EF0)
134-
#define RTL838X_MAC_TX_PAUSE_STS (0xa1a0)
135-
#define RTL839X_MAC_TX_PAUSE_STS (0x03b8)
136-
#define RTL930X_MAC_TX_PAUSE_STS (0xCB2C)
137-
#define RTL931X_MAC_TX_PAUSE_STS (0x0EF8)
138-
#define RTL838X_MAC_RX_PAUSE_STS (0xa1a4)
139-
#define RTL839X_MAC_RX_PAUSE_STS (0x03c0)
140-
#define RTL930X_MAC_RX_PAUSE_STS (0xCB30)
141-
#define RTL931X_MAC_RX_PAUSE_STS (0x0F00)
142-
#define RTL930X_MAC_LINK_MEDIA_STS (0xCB14)
143-
#define RTL931X_MAC_LINK_MEDIA_STS (0x0EC8)
144126

145127
/* MAC link state bits */
146128
#define RTL_SPEED_10 0
@@ -702,12 +684,6 @@ struct rtl838x_port {
702684
const struct dsa_port *dp;
703685
};
704686

705-
struct rtl838x_pcs {
706-
struct phylink_pcs pcs;
707-
struct rtl838x_switch_priv *priv;
708-
int port;
709-
};
710-
711687
struct rtl838x_vlan_info {
712688
u64 untagged_ports;
713689
u64 member_ports;
@@ -1073,11 +1049,6 @@ struct rtl838x_reg {
10731049
int mir_ctrl;
10741050
int mir_dpm;
10751051
int mir_spm;
1076-
int mac_link_sts;
1077-
int mac_link_dup_sts;
1078-
int (*mac_link_spd_sts)(int port);
1079-
int mac_rx_pause_sts;
1080-
int mac_tx_pause_sts;
10811052
u64 (*read_l2_entry_using_hash)(u32 hash, u32 position, struct rtl838x_l2_entry *e);
10821053
void (*write_l2_entry_using_hash)(u32 hash, u32 pos, struct rtl838x_l2_entry *e);
10831054
u64 (*read_cam)(int idx, struct rtl838x_l2_entry *e);
@@ -1126,7 +1097,7 @@ struct rtl838x_switch_priv {
11261097
u16 family_id;
11271098
char version;
11281099
struct rtl838x_port ports[57];
1129-
struct rtl838x_pcs pcs[57];
1100+
struct phylink_pcs *pcs[57];
11301101
struct mutex reg_mutex; /* Mutex for individual register manipulations */
11311102
struct mutex pie_mutex; /* Mutex for Packet Inspection Engine */
11321103
int link_state_irq;

target/linux/realtek/files-6.12/drivers/net/dsa/rtl83xx/rtl839x.c

Lines changed: 0 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -293,11 +293,6 @@ static inline int rtl839x_l2_port_new_sa_fwd(int p)
293293
return RTL839X_L2_PORT_NEW_SA_FWD(p);
294294
}
295295

296-
static inline int rtl839x_mac_link_spd_sts(int p)
297-
{
298-
return RTL839X_MAC_LINK_SPD_STS(p);
299-
}
300-
301296
static inline int rtl839x_trk_mbr_ctr(int group)
302297
{
303298
return RTL839X_TRK_MBR_CTR + (group << 3);
@@ -1686,11 +1681,6 @@ const struct rtl838x_reg rtl839x_reg = {
16861681
.mir_ctrl = RTL839X_MIR_CTRL,
16871682
.mir_dpm = RTL839X_MIR_DPM_CTRL,
16881683
.mir_spm = RTL839X_MIR_SPM_CTRL,
1689-
.mac_link_sts = RTL839X_MAC_LINK_STS,
1690-
.mac_link_dup_sts = RTL839X_MAC_LINK_DUP_STS,
1691-
.mac_link_spd_sts = rtl839x_mac_link_spd_sts,
1692-
.mac_rx_pause_sts = RTL839X_MAC_RX_PAUSE_STS,
1693-
.mac_tx_pause_sts = RTL839X_MAC_TX_PAUSE_STS,
16941684
.read_l2_entry_using_hash = rtl839x_read_l2_entry_using_hash,
16951685
.write_l2_entry_using_hash = rtl839x_write_l2_entry_using_hash,
16961686
.read_cam = rtl839x_read_cam,

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