Skip to content

Commit bce8432

Browse files
robimarkorobimarko
committed
microchipsw: sync with DTS sent upstream
Sync the DTS with the version sent upstream, clock bindings also. Signed-off-by: Robert Marko <[email protected]>
1 parent d992d95 commit bce8432

File tree

3 files changed

+186
-171
lines changed

3 files changed

+186
-171
lines changed

target/linux/microchipsw/dts/lan969x.dtsi renamed to target/linux/microchipsw/dts/lan9691.dtsi

Lines changed: 58 additions & 52 deletions
Original file line numberDiff line numberDiff line change
@@ -3,7 +3,7 @@
33
* Copyright (c) 2025 Microchip Technology Inc. and its subsidiaries.
44
*/
55

6-
#include <dt-bindings/clock/microchip,lan969x.h>
6+
#include <dt-bindings/clock/microchip,lan9691.h>
77
#include <dt-bindings/dma/at91.h>
88
#include <dt-bindings/interrupt-controller/arm-gic.h>
99
#include <dt-bindings/mfd/at91-usart.h>
@@ -14,14 +14,9 @@
1414
#size-cells = <1>;
1515

1616
model = "Microchip LAN969x";
17-
compatible = "microchip,lan969x";
17+
compatible = "microchip,lan9691";
1818
interrupt-parent = <&gic>;
1919

20-
psci {
21-
compatible = "arm,psci-1.0";
22-
method = "smc";
23-
};
24-
2520
clocks {
2621
fx100_clk: fx100-clk {
2722
compatible = "fixed-clock";
@@ -66,6 +61,11 @@
6661
};
6762
};
6863

64+
psci {
65+
compatible = "arm,psci-1.0";
66+
method = "smc";
67+
};
68+
6969
pmu {
7070
compatible = "arm,cortex-a53-pmu";
7171
interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
@@ -105,45 +105,45 @@
105105
};
106106

107107
flx0: flexcom@e0040000 {
108-
compatible = "atmel,sama5d2-flexcom";
108+
compatible = "microchip,lan9691-flexcom", "atmel,sama5d2-flexcom";
109109
reg = <0xe0040000 0x100>;
110+
ranges = <0x0 0xe0040000 0x800>;
110111
clocks = <&clks GCK_ID_FLEXCOM0>;
111112
#address-cells = <1>;
112113
#size-cells = <1>;
113-
ranges = <0x0 0xe0040000 0x800>;
114114
status = "disabled";
115115

116116
usart0: serial@200 {
117-
compatible = "atmel,at91sam9260-usart";
117+
compatible = "microchip,lan9691-usart", "atmel,at91sam9260-usart";
118118
reg = <0x200 0x200>;
119-
atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
120119
interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
121120
dmas = <&dma AT91_XDMAC_DT_PERID(3)>,
122121
<&dma AT91_XDMAC_DT_PERID(2)>;
123122
dma-names = "tx", "rx";
124123
clocks = <&fabric_clk>;
125124
clock-names = "usart";
126125
atmel,fifo-size = <32>;
126+
atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
127127
status = "disabled";
128128
};
129129

130130
spi0: spi@400 {
131-
compatible = "atmel,at91rm9200-spi";
131+
compatible = "microchip,lan9691-spi", "atmel,at91rm9200-spi";
132132
reg = <0x400 0x200>;
133133
interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
134134
dmas = <&dma AT91_XDMAC_DT_PERID(3)>,
135135
<&dma AT91_XDMAC_DT_PERID(2)>;
136136
dma-names = "tx", "rx";
137137
clocks = <&fabric_clk>;
138138
clock-names = "spi_clk";
139-
atmel,fifo-size = <32>;
140139
#address-cells = <1>;
141140
#size-cells = <0>;
141+
atmel,fifo-size = <32>;
142142
status = "disabled";
143143
};
144144

145145
i2c0: i2c@600 {
146-
compatible = "microchip,sam9x60-i2c";
146+
compatible = "microchip,lan9691-i2c", "microchip,sam9x60-i2c";
147147
reg = <0x600 0x200>;
148148
interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
149149
dmas = <&dma AT91_XDMAC_DT_PERID(3)>,
@@ -157,45 +157,45 @@
157157
};
158158

159159
flx1: flexcom@e0044000 {
160-
compatible = "atmel,sama5d2-flexcom";
160+
compatible = "microchip,lan9691-flexcom", "atmel,sama5d2-flexcom";
161161
reg = <0xe0044000 0x100>;
162+
ranges = <0x0 0xe0044000 0x800>;
162163
clocks = <&clks GCK_ID_FLEXCOM1>;
163164
#address-cells = <1>;
164165
#size-cells = <1>;
165-
ranges = <0x0 0xe0044000 0x800>;
166166
status = "disabled";
167167

168168
usart1: serial@200 {
169-
compatible = "atmel,at91sam9260-usart";
169+
compatible = "microchip,lan9691-usart", "atmel,at91sam9260-usart";
170170
reg = <0x200 0x200>;
171-
atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
172171
interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
173172
dmas = <&dma AT91_XDMAC_DT_PERID(3)>,
174173
<&dma AT91_XDMAC_DT_PERID(2)>;
175174
dma-names = "tx", "rx";
176175
clocks = <&fabric_clk>;
177176
clock-names = "usart";
178177
atmel,fifo-size = <32>;
178+
atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
179179
status = "disabled";
180180
};
181181

182182
spi1: spi@400 {
183-
compatible = "atmel,at91rm9200-spi";
183+
compatible = "microchip,lan9691-spi", "atmel,at91rm9200-spi";
184184
reg = <0x400 0x200>;
185185
interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
186186
dmas = <&dma AT91_XDMAC_DT_PERID(3)>,
187187
<&dma AT91_XDMAC_DT_PERID(2)>;
188188
dma-names = "tx", "rx";
189189
clocks = <&fabric_clk>;
190190
clock-names = "spi_clk";
191-
atmel,fifo-size = <32>;
192191
#address-cells = <1>;
193192
#size-cells = <0>;
193+
atmel,fifo-size = <32>;
194194
status = "disabled";
195195
};
196196

197197
i2c1: i2c@600 {
198-
compatible = "microchip,sam9x60-i2c";
198+
compatible = "microchip,lan9691-i2c", "microchip,sam9x60-i2c";
199199
reg = <0x600 0x200>;
200200
interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
201201
dmas = <&dma AT91_XDMAC_DT_PERID(3)>,
@@ -209,14 +209,14 @@
209209
};
210210

211211
trng: rng@e0048000 {
212-
compatible = "atmel,at91sam9g45-trng";
212+
compatible = "microchip,lan9691-trng", "atmel,at91sam9g45-trng";
213213
reg = <0xe0048000 0x100>;
214214
clocks = <&fabric_clk>;
215215
status = "disabled";
216216
};
217217

218218
aes: crypto@e004c000 {
219-
compatible = "atmel,at91sam9g46-aes";
219+
compatible = "microchip,lan9691-aes", "atmel,at91sam9g46-aes";
220220
reg = <0xe004c000 0x100>;
221221
interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
222222
dmas = <&dma AT91_XDMAC_DT_PERID(12)>,
@@ -228,47 +228,50 @@
228228
};
229229

230230
flx2: flexcom@e0060000 {
231-
compatible = "atmel,sama5d2-flexcom";
231+
compatible = "microchip,lan9691-flexcom", "atmel,sama5d2-flexcom";
232232
reg = <0xe0060000 0x100>;
233+
ranges = <0x0 0xe0060000 0x800>;
233234
clocks = <&clks GCK_ID_FLEXCOM2>;
234235
#address-cells = <1>;
235236
#size-cells = <1>;
236-
ranges = <0x0 0xe0060000 0x800>;
237237
status = "disabled";
238238

239239
usart2: serial@200 {
240-
compatible = "atmel,at91sam9260-usart";
240+
compatible = "microchip,lan9691-usart", "atmel,at91sam9260-usart";
241241
reg = <0x200 0x200>;
242-
atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
243242
interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
244243
dmas = <&dma AT91_XDMAC_DT_PERID(7)>,
245244
<&dma AT91_XDMAC_DT_PERID(6)>;
246245
dma-names = "tx", "rx";
247246
clocks = <&fabric_clk>;
248247
clock-names = "usart";
249248
atmel,fifo-size = <32>;
249+
atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
250250
status = "disabled";
251251
};
252252

253253
spi2: spi@400 {
254-
compatible = "atmel,at91rm9200-spi";
254+
compatible = "microchip,lan9691-spi", "atmel,at91rm9200-spi";
255255
reg = <0x400 0x200>;
256256
interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
257257
dmas = <&dma AT91_XDMAC_DT_PERID(7)>,
258258
<&dma AT91_XDMAC_DT_PERID(6)>;
259259
dma-names = "tx", "rx";
260260
clocks = <&fabric_clk>;
261261
clock-names = "spi_clk";
262-
atmel,fifo-size = <32>;
263262
#address-cells = <1>;
264263
#size-cells = <0>;
264+
atmel,fifo-size = <32>;
265265
status = "disabled";
266266
};
267267

268268
i2c2: i2c@600 {
269-
compatible = "microchip,sam9x60-i2c";
269+
compatible = "microchip,lan9691-i2c", "microchip,sam9x60-i2c";
270270
reg = <0x600 0x200>;
271271
interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
272+
dmas = <&dma AT91_XDMAC_DT_PERID(7)>,
273+
<&dma AT91_XDMAC_DT_PERID(6)>;
274+
dma-names = "tx", "rx";
272275
clocks = <&fabric_clk>;
273276
#address-cells = <1>;
274277
#size-cells = <0>;
@@ -277,45 +280,45 @@
277280
};
278281

279282
flx3: flexcom@e0064000 {
280-
compatible = "atmel,sama5d2-flexcom";
283+
compatible = "microchip,lan9691-flexcom", "atmel,sama5d2-flexcom";
281284
reg = <0xe0064000 0x100>;
285+
ranges = <0x0 0xe0064000 0x800>;
282286
clocks = <&clks GCK_ID_FLEXCOM3>;
283287
#address-cells = <1>;
284288
#size-cells = <1>;
285-
ranges = <0x0 0xe0064000 0x800>;
286289
status = "disabled";
287290

288291
usart3: serial@200 {
289-
compatible = "atmel,at91sam9260-usart";
292+
compatible = "microchip,lan9691-usart", "atmel,at91sam9260-usart";
290293
reg = <0x200 0x200>;
291-
atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
292294
interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
293295
dmas = <&dma AT91_XDMAC_DT_PERID(9)>,
294296
<&dma AT91_XDMAC_DT_PERID(8)>;
295297
dma-names = "tx", "rx";
296298
clocks = <&fabric_clk>;
297299
clock-names = "usart";
298300
atmel,fifo-size = <32>;
301+
atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
299302
status = "disabled";
300303
};
301304

302305
spi3: spi@400 {
303-
compatible = "atmel,at91rm9200-spi";
306+
compatible = "microchip,lan9691-spi", "atmel,at91rm9200-spi";
304307
reg = <0x400 0x200>;
305308
interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
306309
dmas = <&dma AT91_XDMAC_DT_PERID(9)>,
307310
<&dma AT91_XDMAC_DT_PERID(8)>;
308311
dma-names = "tx", "rx";
309312
clocks = <&fabric_clk>;
310313
clock-names = "spi_clk";
311-
atmel,fifo-size = <32>;
312314
#address-cells = <1>;
313315
#size-cells = <0>;
316+
atmel,fifo-size = <32>;
314317
status = "disabled";
315318
};
316319

317320
i2c3: i2c@600 {
318-
compatible = "microchip,sam9x60-i2c";
321+
compatible = "microchip,lan9691-i2c", "microchip,sam9x60-i2c";
319322
reg = <0x600 0x200>;
320323
interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
321324
dmas = <&dma AT91_XDMAC_DT_PERID(9)>,
@@ -329,7 +332,7 @@
329332
};
330333

331334
dma: dma-controller@e0068000 {
332-
compatible = "microchip,sama7g5-dma";
335+
compatible = "microchip,lan9691-dma", "microchip,sama7g5-dma";
333336
reg = <0xe0068000 0x1000>;
334337
interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
335338
dma-channels = <16>;
@@ -339,7 +342,7 @@
339342
};
340343

341344
sha: crypto@e006c000 {
342-
compatible = "atmel,at91sam9g46-sha";
345+
compatible = "microchip,lan9691-sha", "atmel,at91sam9g46-sha";
343346
reg = <0xe006c000 0xec>;
344347
interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
345348
dmas = <&dma AT91_XDMAC_DT_PERID(14)>;
@@ -386,10 +389,10 @@
386389

387390
clks: clock-controller@e00c00b4 {
388391
compatible = "microchip,lan9691-gck";
392+
reg = <0xe00c00b4 0x30>, <0xe00c0308 0x4>;
389393
#clock-cells = <1>;
390394
clocks = <&cpu_clk>, <&ddr_clk>, <&fx100_clk>;
391395
clock-names = "cpu", "ddr", "sys";
392-
reg = <0xe00c00b4 0x30>, <0xe00c0308 0x4>;
393396
};
394397

395398
qspi0: spi@e0804000 {
@@ -445,7 +448,8 @@
445448
};
446449

447450
reset: reset-controller@e201000c {
448-
compatible = "microchip,lan9691-switch-reset", "microchip,lan966x-switch-reset";
451+
compatible = "microchip,lan9691-switch-reset",
452+
"microchip,lan966x-switch-reset";
449453
reg = <0xe201000c 0x4>;
450454
reg-names = "gcb";
451455
#reset-cells = <1>;
@@ -465,25 +469,25 @@
465469
};
466470

467471
mdio0: mdio@e20101a8 {
468-
compatible = "mscc,ocelot-miim";
472+
compatible = "microchip,lan9691-miim", "mscc,ocelot-miim";
473+
reg = <0xe20101a8 0x24>;
469474
#address-cells = <1>;
470475
#size-cells = <0>;
471-
reg = <0xe20101a8 0x24>;
472476
clocks = <&fx100_clk>;
473477
status = "disabled";
474478
};
475479

476480
mdio1: mdio@e20101cc {
477-
compatible = "mscc,ocelot-miim";
481+
compatible = "microchip,lan9691-miim", "mscc,ocelot-miim";
482+
reg = <0xe20101cc 0x24>;
478483
#address-cells = <1>;
479484
#size-cells = <0>;
480-
reg = <0xe20101cc 0x24>;
481485
clocks = <&fx100_clk>;
482486
status = "disabled";
483487
};
484488

485489
sgpio: gpio@e2010230 {
486-
compatible = "microchip,sparx5-sgpio";
490+
compatible = "microchip,lan9691-sgpio", "microchip,sparx5-sgpio";
487491
reg = <0xe2010230 0x118>;
488492
clocks = <&fx100_clk>;
489493
resets = <&reset 0>;
@@ -493,7 +497,8 @@
493497
status = "disabled";
494498

495499
sgpio_in: gpio@0 {
496-
compatible = "microchip,sparx5-sgpio-bank";
500+
compatible = "microchip,lan9691-sgpio-bank",
501+
"microchip,sparx5-sgpio-bank";
497502
reg = <0>;
498503
gpio-controller;
499504
#gpio-cells = <3>;
@@ -503,35 +508,36 @@
503508
};
504509

505510
sgpio_out: gpio@1 {
506-
compatible = "microchip,sparx5-sgpio-bank";
511+
compatible = "microchip,lan9691-sgpio-bank",
512+
"microchip,sparx5-sgpio-bank";
507513
reg = <1>;
508514
gpio-controller;
509515
#gpio-cells = <3>;
510516
};
511517
};
512518

513519
tmon: hwmon@e2020100 {
514-
compatible = "microchip,sparx5-temp";
520+
compatible = "microchip,lan9691-temp", "microchip,sparx5-temp";
515521
reg = <0xe2020100 0xc>;
516522
clocks = <&fx100_clk>;
517523
#thermal-sensor-cells = <0>;
518524
};
519525

520526
serdes: serdes@e3410000 {
521527
compatible = "microchip,lan9691-serdes";
528+
reg = <0xe3410000 0x150000>;
522529
#phy-cells = <1>;
523530
clocks = <&fabric_clk>;
524-
reg = <0xe3410000 0x150000>;
525531
};
526532

527533
gic: interrupt-controller@e8c11000 {
528534
compatible = "arm,gic-400";
529-
#interrupt-cells = <3>;
530-
interrupt-controller;
531535
reg = <0xe8c11000 0x1000>, /* Distributor GICD_ */
532536
<0xe8c12000 0x2000>, /* CPU interface GICC_ */
533537
<0xe8c14000 0x2000>, /* Virt interface control */
534538
<0xe8c16000 0x2000>; /* Virt CPU interface */
539+
#interrupt-cells = <3>;
540+
interrupt-controller;
535541
interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
536542
};
537543
};

0 commit comments

Comments
 (0)