[RISCV] Fix FP64 DinX R Regclass

This was a typo in llvm#112983 that didn't cause build
failures but is still wrong.

Author: lenary

llvm/lib/Target/RISCV/RISCVISelLowering.cpp

@@ -20531,7 +20531,7 @@ RISCVTargetLowering::getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI,
       break;
     case 'R':
       if (VT == MVT::f64 && !Subtarget.is64Bit() && Subtarget.hasStdExtZdinx())
-        return std::make_pair(0U, &RISCV::GPRF64PairCRegClass);
+        return std::make_pair(0U, &RISCV::GPRF64PairNoX0RegClass);
       return std::make_pair(0U, &RISCV::GPRPairNoX0RegClass);
     default:
       break;