Skip to content

[feature] Adding SystemVerilog support #2

@canesche

Description

@canesche

Tasks;

  • add SystemVerilog simulator
  • add circuit print
  • add stats of the circuit (number of wires, regs, memory, ...)
  • add waveform
  • add an example of Google Colab usage: link

Metadata

Metadata

Assignees

Labels

enhancementNew feature or request

Type

No type

Projects

No projects

Milestone

No milestone

Relationships

None yet

Development

No branches or pull requests

Issue actions