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Import debug scripts
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6 files changed

+114
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samples/main.cpp

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#include "STM32IotNode.h"
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using namespace codal;
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STM32IotNode IotNode;
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int main()
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{
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IotNode.init();
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IotNode.serial.printf("*** STM32_IOT_NODE BLINKY TEST ***\r\n");
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int state = 0;
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while(1)
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{
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IotNode.io.led.setDigitalValue(state);
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fiber_sleep(1000);
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state = !state;
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}
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}

scripts/debug.cfg

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gdb_port pipe
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gdb_memory_map disable
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$_TARGETNAME configure -event gdb-attach {
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echo "Halting target"
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halt
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}
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$_TARGETNAME configure -event gdb-detach {
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echo "Resetting target"
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reset
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}

scripts/flash.sh

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#!/bin/sh
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set -e
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./build.py
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openocd -s "/usr/share/openocd/scripts/" -s"libraries/codal-stm32-iot-node/scripts/" -f "openocd.cfg" -c "program build/STM32_IOT_NODE.hex verify reset exit "

scripts/gdb.sh

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#!/bin/sh
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arm-none-eabi-gdb --eval "target remote | openocd -s /usr/share/openocd/scripts/ -s libraries/codal-stm32-iot-node/scripts/ -f openocd.cfg -f debug.cfg" build/STM32_IOT_NODE

scripts/openocd.cfg

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source [find interface/stlink-v2-1.cfg]
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set WORKAREASIZE 0x8000
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transport select hla_swd
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set CHIPNAME STM32L475VGTx
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set ENABLE_LOW_POWER 1
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set STOP_WATCHDOG 1
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set CLOCK_FREQ 4000
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reset_config none separate
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set CONNECT_UNDER_RESET 1
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source [find target/stm32l4x.cfg]
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adapter_khz 480

source/init.cpp

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#include "stm32.h"
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#include "codal_target_hal.h"
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#include "CodalDmesg.h"
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void target_init();
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extern "C" void cpu_init()
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{
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SystemCoreClockUpdate();
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target_init();
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RCC_ClkInitTypeDef RCC_ClkInitStruct;
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RCC_OscInitTypeDef RCC_OscInitStruct;
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/* Enable Power Control clock */
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__HAL_RCC_PWR_CLK_ENABLE();
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/* The voltage scaling allows optimizing the power consumption when the device is
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clocked below the maximum system frequency, to update the voltage scaling value
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regarding system frequency refer to product datasheet. */
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__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE2);
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/* Enable HSE Oscillator and activate PLL with HSE as source */
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RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
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RCC_OscInitStruct.HSEState = RCC_HSE_ON;
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RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
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RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
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uint32_t pllm = HSE_VALUE / 1000000;
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CODAL_ASSERT(pllm >= 4);
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CODAL_ASSERT(pllm <= 25);
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CODAL_ASSERT(pllm * 1000000 == HSE_VALUE);
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RCC_OscInitStruct.PLL.PLLM = pllm;
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RCC_OscInitStruct.PLL.PLLN = 336;
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RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV4;
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RCC_OscInitStruct.PLL.PLLQ = 7;
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HAL_RCC_OscConfig(&RCC_OscInitStruct);
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/* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2
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clocks dividers */
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RCC_ClkInitStruct.ClockType =
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(RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2);
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RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
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RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
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RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
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RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
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HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2);
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SystemCoreClockUpdate();
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__HAL_RCC_TIM5_CLK_ENABLE();
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// enable backup registers (for reboot into bootloader or into app)
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PWR->CR |= PWR_CR_DBP;
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RCC->BDCR |= RCC_BDCR_RTCEN;
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}

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