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soc: silabs: Add complete xg27 soc family
Add efr32bg27 and efr32mg27 socs. Signed-off-by: Aksel Skauge Mellbye <[email protected]>
1 parent 6e4f082 commit 7888fa7

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‎dts/arm/silabs/xg27/efr32bg27c140f768im32.dtsi‎

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/*
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* Copyright (c) 2025 Silicon Laboratories Inc.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <mem.h>
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#include <silabs/xg27/efr32bg27.dtsi>
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/ {
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soc {
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compatible = "silabs,efr32bg27c140f768im32", "silabs,efr32bg27", "silabs,xg27",
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"silabs,efr32", "simple-bus";
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};
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};
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&flash0 {
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reg = <0x08000000 DT_SIZE_K(768)>;
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};
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&sram0 {
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reg = <0x20000000 DT_SIZE_K(64)>;
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};

‎dts/arm/silabs/xg27/efr32bg27c230f768im32.dtsi‎

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/*
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* Copyright (c) 2025 Silicon Laboratories Inc.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <mem.h>
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#include <silabs/xg27/efr32bg27.dtsi>
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#include <zephyr/dt-bindings/regulator/silabs_dcdc.h>
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/ {
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soc {
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compatible = "silabs,efr32bg27c230f768im32", "silabs,efr32bg27", "silabs,xg27",
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"silabs,efr32", "simple-bus";
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};
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};
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&dcdc {
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regulator-boot-on;
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regulator-init-microvolt = <1800000>;
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regulator-initial-mode = <SILABS_DCDC_MODE_BOOST>;
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status = "okay";
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};
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&flash0 {
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reg = <0x08000000 DT_SIZE_K(768)>;
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};
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&sram0 {
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reg = <0x20000000 DT_SIZE_K(64)>;
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};

‎dts/arm/silabs/xg27/efr32bg27c230f768im40.dtsi‎

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/*
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* Copyright (c) 2025 Silicon Laboratories Inc.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <mem.h>
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#include <silabs/xg27/efr32bg27.dtsi>
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#include <zephyr/dt-bindings/regulator/silabs_dcdc.h>
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/ {
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soc {
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compatible = "silabs,efr32bg27c230f768im40", "silabs,efr32bg27", "silabs,xg27",
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"silabs,efr32", "simple-bus";
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};
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};
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&dcdc {
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regulator-boot-on;
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regulator-init-microvolt = <1800000>;
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regulator-initial-mode = <SILABS_DCDC_MODE_BOOST>;
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status = "okay";
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};
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&flash0 {
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reg = <0x08000000 DT_SIZE_K(768)>;
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};
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&sram0 {
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reg = <0x20000000 DT_SIZE_K(64)>;
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};

‎dts/arm/silabs/xg27/efr32bg27c320f768gj39.dtsi‎

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/*
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* Copyright (c) 2025 Silicon Laboratories Inc.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <mem.h>
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#include <silabs/xg27/efr32bg27.dtsi>
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/ {
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soc {
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compatible = "silabs,efr32bg27c320f768gj39", "silabs,efr32bg27", "silabs,xg27",
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"silabs,efr32", "simple-bus";
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};
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};
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&flash0 {
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reg = <0x08000000 DT_SIZE_K(768)>;
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};
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&sram0 {
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reg = <0x20000000 DT_SIZE_K(64)>;
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};

‎dts/arm/silabs/xg27/efr32bg27c320f768ij39.dtsi‎

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/*
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* Copyright (c) 2025 Silicon Laboratories Inc.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <mem.h>
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#include <silabs/xg27/efr32bg27.dtsi>
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/ {
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soc {
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compatible = "silabs,efr32bg27c320f768ij39", "silabs,efr32bg27", "silabs,xg27",
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"silabs,efr32", "simple-bus";
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};
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};
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&flash0 {
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reg = <0x08000000 DT_SIZE_K(768)>;
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};
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&sram0 {
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reg = <0x20000000 DT_SIZE_K(64)>;
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};

‎dts/arm/silabs/xg27/efr32mg27.dtsi‎

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/*
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* Copyright (c) 2025 Silicon Laboratories Inc.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <silabs/xg27/efr32xg27.dtsi>

‎dts/arm/silabs/xg27/efr32mg27c140f768im32.dtsi‎

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/*
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* Copyright (c) 2025 Silicon Laboratories Inc.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <mem.h>
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#include <silabs/xg27/efr32mg27.dtsi>
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/ {
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soc {
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compatible = "silabs,efr32mg27c140f768im32", "silabs,efr32mg27", "silabs,xg27",
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"silabs,efr32", "simple-bus";
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};
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};
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&flash0 {
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reg = <0x08000000 DT_SIZE_K(768)>;
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};
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&sram0 {
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reg = <0x20000000 DT_SIZE_K(64)>;
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};

‎dts/arm/silabs/xg27/efr32mg27c140f768im40.dtsi‎

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/*
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* Copyright (c) 2025 Silicon Laboratories Inc.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <mem.h>
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#include <silabs/xg27/efr32mg27.dtsi>
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/ {
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soc {
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compatible = "silabs,efr32mg27c140f768im40", "silabs,efr32mg27", "silabs,xg27",
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"silabs,efr32", "simple-bus";
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};
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};
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&flash0 {
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reg = <0x08000000 DT_SIZE_K(768)>;
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};
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&sram0 {
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reg = <0x20000000 DT_SIZE_K(64)>;
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};

‎dts/arm/silabs/xg27/efr32mg27c230f768im32.dtsi‎

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/*
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* Copyright (c) 2025 Silicon Laboratories Inc.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <mem.h>
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#include <silabs/xg27/efr32mg27.dtsi>
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#include <zephyr/dt-bindings/regulator/silabs_dcdc.h>
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/ {
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soc {
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compatible = "silabs,efr32mg27c230f768im32", "silabs,efr32mg27", "silabs,xg27",
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"silabs,efr32", "simple-bus";
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};
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};
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&dcdc {
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regulator-boot-on;
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regulator-init-microvolt = <1800000>;
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regulator-initial-mode = <SILABS_DCDC_MODE_BOOST>;
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status = "okay";
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};
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&flash0 {
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reg = <0x08000000 DT_SIZE_K(768)>;
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};
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&sram0 {
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reg = <0x20000000 DT_SIZE_K(64)>;
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};

‎dts/arm/silabs/xg27/efr32mg27c230f768im40.dtsi‎

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/*
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* Copyright (c) 2025 Silicon Laboratories Inc.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <mem.h>
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#include <silabs/xg27/efr32mg27.dtsi>
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#include <zephyr/dt-bindings/regulator/silabs_dcdc.h>
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/ {
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soc {
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compatible = "silabs,efr32mg27c230f768im40", "silabs,efr32mg27", "silabs,xg27",
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"silabs,efr32", "simple-bus";
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};
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};
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&dcdc {
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regulator-boot-on;
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regulator-init-microvolt = <1800000>;
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regulator-initial-mode = <SILABS_DCDC_MODE_BOOST>;
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status = "okay";
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};
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&flash0 {
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reg = <0x08000000 DT_SIZE_K(768)>;
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};
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&sram0 {
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reg = <0x20000000 DT_SIZE_K(64)>;
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};

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