acronyms-gcc

$LGEORGET: GCC acronyms,unversioned 2016/11/21 18:18:52 $
ABI	Application Binary Interface
AST	Abstract Syntax Tree
AVX	Intel Advanced Vector Extensions - CPU enhancements. See http://softwareprojects.intel.com/avx/
BB	Basic Block
C++0x	Shorthand for the work-in-progress ISO/IEC C++ standard, which will eventually be e.g. C++09 if introduced in 2009. (cf C++98 and C++03)
CCP	Conditional Constant Propagation (typically the sparse form, i.e. Wegman and Zadeck SCCP)
CFA	Canonical Frame Address, a term used in the context of DWARF debug information; all references to values in the frame are expressed as relative offsets from the CFA
CFG	Control Flow Graph
CFI	Call Frame Instructions, opcodes of the DWARF virtual machine (namespace DW_CFA_*)
CIE	Common Information Entry, one of two types of records emitted in the .debug_frame section that encodes DWARF unwind tables
CRIS	Code Reduced Instruction Set, a CPU architecture/instruction set developed by Axis for its ETRAX embedded systems
CSiBE	GCC Code-Size Benchmark Environment
DCE	Dead Code Elimination
DDG	Data Dependence Graph
decl	Short for Declaration
DF	Data-Flow, the GCC infrastructure for data-flow on RTL
DFA	In general, a deterministic finite automaton; for GCC, the instruction scheduler based on such an automaton.
DFS	Depth First Search
DWARF	A debugging format generated by GCC. It stands for "Debugging With Arbitrary Records Format"
EH	Exception handling
FE	FrontEnd
FDE	Frame Description Entry, one of two types of records emitted in the .debug_frame section that encodes DWARF unwind tables
FDO	Feedback Directed Optimization
FRE	Full Redundancy Elimination
FRV	The Fujitsu FR-V family of VLIW embedded microprocessors
fp	Floating Point
FUD 	(in "FUD chain") factored use-def chain
g77	Fortran 77 (FrontEnd)
GCJ	The Java FrontEnd for GCC
GCSE	Global Common Subexpression Elimination
GIMPLE	GIMPLE is a family of intermediate representations (IR) based on the tree data structure.
GMP	GNU Multiple Precision library
GPRs	General Purpose Registers
GTY	A marker used to indicate structures and variables that are relevant to GCC's garbage collector
GVN	Global Value Numbering
HEAD	The most recent revision of the mainline development branch (trunk) in SVN
ICE	Internal Compiler Error; a fancy name for "bug".
IL	Intermediate Language, see IR
IMA	Inter-Module Analysis - optimization across source file boundaries. Sometimes called IMI because that is the only inter-module (or inter-function, for that matter) optimization that GCC presently does.
IMI	Inter-Module Inlining
insn	An RTL representation of an instruction often pronounced like "ensign".
IPA	InterProcedural Analysis
IPCP	InterProcedural Constant Propagation, an optimization which creates different versions of the same function, with some parameters are replaced by constants
IR	Intermediate Representation also called Intermediate Language (IL)
IRA	The integrated register allocator.
LE	Little Endian
LHS	The Left-Hand Side of an assignment expression.
LCM	Lazy Code Motion, a generic optimization framework used for example by [gccsource:gcse.c] and [gccsource:mode-switching.c].
LIPO	Lightweight InterProcedural Optimization
LLVM	Low Level Virtual Machine
LNO	Loop Nest Optimizer
LRS	Live Range Splitting
LTO	Link-Time Optimization
MOT	MOTorola (it's very common to refer to companies using their stock ticker symbols)
MPT	Memory Partition Tag
OBJC	The preferred name is Objective-C
PEM	Programming Environments Manual
PCH	Precompiled Headers
PIC	Position Independent Code
PIM	Programming Interface Manual
POOMA	A heavily templated and wonky C++ toolkit used in some scientific codes. Some of our large C++ benchmarks use POOMA.
PPC	PowerPC
PR	Problem Report (bug report via bugzilla)
PRE	Partial Redundancy Elimination
PTA	Points-To Analysis
RHS	The Right-Hand Side of an assignment expression. Where the interesting stuff goes.
RTL	Register Transfer Language
RTL-SSA	SSA form implemented on RTL. A failed experiment which might get revived.
RTTI	Run Time Type Information
RTX	RTL (q.v.) Expression
SC	Steering Commitee - GCC's oversight committee, more or less.
SCC	Stronly Connected Component
SCCVN	Strongly Connected Component-based Value Numbering -- see Cooper & Simpson for details.
SIMD	Single Instruction Multiple Data (MMX, SSE, AltiVec, etc)
SFT	STRUCT_FIELD_TAG; Structure Field Tags - See http://gcc.gnu.org/onlinedocs/gccint/Alias-analysis.html
SMS	Swing Modulo Scheduling
SMT	Symbol Memory Tag (refered to as TMT in 4.0 and 4.1)
SPE	1. Signal Processing Engine, an auxiliary processing unit (APU) found on the Freescale PowerPC e500 core that provides vector operations; 2. Synergistic Processing Element, a 128 bit SIMD coprocessor unit of the Cell Broadband Engine Architecture
SPU	Synergistic Processing Unit of the Cell Broadband Engine
SRA	Scalar Replacement of Aggregates; an optimization which breaks up aggregate data types into their component (scalar) elements so other optimizers can do a better job.
SSA	Static Single Assignment; a modified form of an IR in which every variable is set exactly once. Makes implementation of certain optimizations very easy.
TBAA	Type-Based Alias Analysis
TER	Temporary Expression Replacement
TLS	Thread-Local Storage
TMT	Type Memory Tag (refered to as SMT starting from 4.2)
TOT	Top Of the tree, see also HEAD
TPF	Transaction Processing Facility (a OS from IBM for S390)
Tuples	Another new intermediate representation, based on tuples rather than trees. See http://gcc.gnu.org/wiki/tuples.
tramp3d	A particularly torturous benchmark that makes extensive use of C++ templates and inlining
VMX	How IBM spells "AltiVec" and the original name used by both MOT and IBM.
VOP	Virtual OPerand, i.e. VUSE or VDEF
VRP	Value Range Propagation
XFAIL	A test case which is expected to fail: that is, the test case triggers a known bug. When used as a verb, means the act of adding a marker to the test case to indicate that it is expected to fail.