1212#define einline __inline
1313
1414unsigned char rom [8192 ];
15- unsigned char cart [32768 ];
15+ unsigned char cart [65536 ];
1616static unsigned char ram [1024 ];
1717
18+ unsigned newbankswitchOffset = 0 ;
19+ unsigned bankswitchOffset = 0 ;
20+ unsigned char get_cart (unsigned pos ) { return cart [(pos + bankswitchOffset )%65536 ]; }
21+ void set_cart (unsigned pos , unsigned char data ){ cart [(pos )%65536 ] = data ; }
22+
23+ #define BS_0 0
24+ #define BS_1 1
25+ #define BS_2 2
26+ #define BS_3 3
27+ #define BS_4 4
28+ #define BS_5 5
29+
30+ unsigned bankswitchstate = BS_0 ;
31+
32+
1833/* the via 6522 registers */
1934
2035static unsigned via_ora ;
@@ -484,7 +499,7 @@ unsigned char read8 (unsigned address)
484499 } else if (address < 0x8000 ) {
485500 /* cartridge */
486501
487- data = cart [ address ] ;
502+ data = get_cart ( address ) ;
488503 } else {
489504 data = 0xff ;
490505 }
@@ -506,6 +521,12 @@ void write8 (unsigned address, unsigned char data)
506521 if (address & 0x1000 ) {
507522 switch (address & 0xf ) {
508523 case 0x0 :
524+ if (bankswitchstate == BS_2 )
525+ {
526+ if (data == 1 ) bankswitchstate = BS_3 ; else bankswitchstate = BS_0 ;
527+ } else {
528+ bankswitchstate = BS_0 ;
529+ }
509530 via_orb = data ;
510531
511532 snd_update ();
@@ -524,6 +545,13 @@ void write8 (unsigned address, unsigned char data)
524545 case 0x1 :
525546 /* register 1 also performs handshakes if necessary */
526547
548+ if (bankswitchstate == BS_3 )
549+ {
550+ if (data == 0 ) bankswitchstate = BS_4 ; else bankswitchstate = BS_0 ;
551+ } else {
552+ bankswitchstate = BS_0 ;
553+ }
554+
527555 if ((via_pcr & 0x0e ) == 0x08 ) {
528556 /* if ca2 is in pulse mode or handshake mode, then it
529557 * goes low whenever ora is written.
@@ -550,13 +578,21 @@ void write8 (unsigned address, unsigned char data)
550578 break ;
551579 case 0x2 :
552580 via_ddrb = data ;
581+ bankswitchstate = BS_1 ;
582+ if (data & 0x40 ) newbankswitchOffset = 0 ; else newbankswitchOffset = 32768 ;
553583 break ;
554584 case 0x3 :
555585 via_ddra = data ;
586+ if (bankswitchstate == BS_1 ) bankswitchstate = BS_2 ; else bankswitchstate = BS_0 ;
556587 break ;
557588 case 0x4 :
558589 /* T1 low order counter */
559590
591+ if (bankswitchstate == BS_5 )
592+ {
593+ bankswitchOffset = newbankswitchOffset ;
594+ bankswitchstate = BS_0 ;
595+ }
560596 via_t1ll = data ;
561597
562598 break ;
@@ -612,6 +648,12 @@ void write8 (unsigned address, unsigned char data)
612648 break ;
613649 case 0xb :
614650 via_acr = data ;
651+ if (bankswitchstate == BS_4 )
652+ {
653+ if (data == 0x98 ) bankswitchstate = BS_5 ; else bankswitchstate = BS_0 ;
654+ } else {
655+ bankswitchstate = BS_0 ;
656+ }
615657 break ;
616658 case 0xc :
617659 via_pcr = data ;
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