Resolved issues with MULX

Author: wizardengineer

lib/Arch/X86/Semantics/BINARY.cpp

@@ -400,10 +400,10 @@ DEF_ISEL(MUL_GPRv_16) = MULax<R16>;
 DEF_ISEL(MUL_GPRv_32) = MULeax<R32>;
 IF_64BIT(DEF_ISEL(MUL_GPRv_64) = MULrax<R64>;)
 
-DEF_ISEL(MULX_VGPR32d_VGPR32d_VGPR32d) = MULX<R32W, R32>;
-DEF_ISEL(MULX_VGPR32d_VGPR32d_MEMd) = MULX<R32W, M32>;
-IF_64BIT(DEF_ISEL(MULX_VGPR64q_VGPR64q_VGPR64q) = MULX<R64W, R64>;)
-IF_64BIT(DEF_ISEL(MULX_VGPR64q_VGPR64q_MEMq) = MULX<R64W, M64>;)
+DEF_ISEL(MULX_GPR32d_GPR32d_GPR32d) = MULX<R32W, R32>;
+DEF_ISEL(MULX_GPR32d_GPR32d_MEMd) = MULX<R32W, M32>;
+IF_64BIT(DEF_ISEL(MULX_GPR64q_GPR64q_GPR64q) = MULX<R64W, R64>;)
+IF_64BIT(DEF_ISEL(MULX_GPR64q_GPR64q_MEMq) = MULX<R64W, M64>;)
 
 DEF_ISEL(MULPS_XMMps_MEMps) = MULPS<V128W, V128, MV128>;
 DEF_ISEL(MULPS_XMMps_XMMps) = MULPS<V128W, V128, V128>;

lib/Arch/X86/Semantics/ROTATE.cpp

@@ -118,10 +118,10 @@ DEF_ISEL(ROR_GPR8_CL) = ROR<R8W, R8, R8>;
 DEF_ISEL_MnW_Mn_Rn(ROR_MEMv_CL, ROR);
 DEF_ISEL_RnW_Rn_Rn(ROR_GPRv_CL, ROR);
 
-DEF_ISEL(RORX_VGPR32d_VGPR32d_IMMb) = RORX<R32W, R32, I8>;
-DEF_ISEL(RORX_VGPR32d_MEMd_IMMb) = RORX<R32W, M32, I8>;
-DEF_ISEL(RORX_VGPR64q_VGPR64q_IMMb) = RORX<R64W, R64, I8>;
-DEF_ISEL(RORX_VGPR64q_MEMq_IMMb) = RORX<R64W, M64, I8>;
+DEF_ISEL(RORX_GPR32d_GPR32d_IMMb) = RORX<R32W, R32, I8>;
+DEF_ISEL(RORX_GPR32d_MEMd_IMMb) = RORX<R32W, M32, I8>;
+DEF_ISEL(RORX_GPR64q_GPR64q_IMMb) = RORX<R64W, R64, I8>;
+DEF_ISEL(RORX_GPR64q_MEMq_IMMb) = RORX<R64W, M64, I8>;
 
 namespace {
 

tests/X86/BINARY/MULX.S

@@ -23,7 +23,7 @@ TEST_INPUTS(
     0xFFFFFFFF, 0xFFFF,
     0xFFFFFFFF, 0xFFFFFFFF)
 
-    mov ecx, ARG1_32
+    mov edx, ARG1_32
     mov ebx, ARG2_32
 
     mulx edx, eax, ebx
@@ -40,7 +40,7 @@ TEST_INPUTS(
     0xFFFFFFFFFFFFFFFF, 0xFFFFFFFF,
     0xFFFFFFFFFFFFFFFF, 0xFFFFFFFFFFFFFFFF)
 
-    mov rcx, ARG1_64
+    mov rdx, ARG1_64
     mov rbx, ARG2_64
 
     mulx rdx, rax, rbx