Switch to a Ghidra fork instead of hacky patches

Author: mrexodia

CMakeLists.txt

@@ -90,25 +90,41 @@ find_package(glog CONFIG REQUIRED)
 set(GFLAGS_USE_TARGET_NAMESPACE ON)
 find_package(gflags CONFIG REQUIRED)
 
-set(sleigh_ENABLE_TESTS OFF)
+# Sleigh
+set(sleigh_ENABLE_TESTS OFF CACHE BOOL "" FORCE)
 set(sleigh_RELEASE_TYPE "HEAD" CACHE STRING "" FORCE)
+set(sleigh_BUILD_SUPPORT ON CACHE BOOL "" FORCE)
+set(sleigh_BUILD_SLEIGHSPECS ON CACHE BOOL "" FORCE)
 
-file(GLOB sleigh_patches "${CMAKE_CURRENT_SOURCE_DIR}/patches/sleigh/*.patch")
+set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -Wno-register")
 
-set(sleigh_ADDITIONAL_PATCHES "${sleigh_patches}" CACHE STRING "" FORCE)
+# Verbose fetch content updates
+set(FETCHCONTENT_QUIET OFF)
+
+# Ghidra fork with the right patches pre-applied
+# This version of sleigh (HEAD) pins Ghidra somewhere between Ghidra v10.2.3 and v10.3
+# https://github.com/lifting-bits/sleigh/blob/7c6b742/src/setup-ghidra-source.cmake#L55-L66
+# This fork contains both the patches from sleigh as well as additional patches for the semantics
+FetchContent_Declare(GhidraSource
+  GIT_REPOSITORY https://github.com/LLVMParty/ghidra
+  GIT_TAG remill-sleigh-7c6b742
+  GIT_PROGRESS TRUE
+  GIT_SHALLOW FALSE
+)
+FetchContent_MakeAvailable(GhidraSource)
 
-# GHIDRA SLEIGH
 FetchContent_Declare(sleigh
   GIT_REPOSITORY https://github.com/lifting-bits/sleigh.git
   GIT_TAG 7c6b742
 )
-
-set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -Wno-register")
-
-set(sleigh_BUILD_SUPPORT ON CACHE BOOL "" FORCE)
-set(sleigh_BUILD_SLEIGHSPECS ON CACHE BOOL "" FORCE)
 FetchContent_MakeAvailable(sleigh)
 
+# Get the Ghidra source directory from FetchContent's internal tracking
+FetchContent_GetProperties(GhidraSource)
+if(NOT ghidrasource_POPULATED)
+  message(FATAL_ERROR "Expected sleigh to populate GhidraSource")
+endif()
+
 # For Linux builds, group LLVM libraries into a single group
 # that avoids frustrating library ordering issues.
 if(UNIX AND NOT APPLE)
@@ -216,24 +232,6 @@ target_compile_definitions(remill_settings INTERFACE
   "REMILL_BUILD_SEMANTICS_DIR_PPC64_32ADDR=\"${REMILL_BUILD_SEMANTICS_DIR_PPC64_32ADDR}\""
 )
 
-set(ghidra_patch_user "github-actions[bot]")
-set(ghidra_patch_email "41898282+github-actions[bot]@users.noreply.github.com")
-
-# pinned stable patches list
-set(ghidra_patches
-  PATCH_COMMAND "${GIT_EXECUTABLE}" config user.name "${ghidra_patch_user}" &&
-  "${GIT_EXECUTABLE}" config user.email "${ghidra_patch_email}" &&
-  "${GIT_EXECUTABLE}" am --ignore-space-change --ignore-whitespace --no-gpg-sign)
-list(APPEND ghidra_patches ${sleigh_ADDITIONAL_PATCHES})
-
-FetchContent_Declare(ghidra-fork
-  GIT_REPOSITORY https://github.com/trail-of-forks/ghidra.git
-  GIT_TAG e7196d8
-  ${ghidra_patches}
-)
-
-FetchContent_MakeAvailable(ghidra-fork)
-
 if(SLEIGH_EXECUTABLE)
   set(sleigh_compiler "${SLEIGH_EXECUTABLE}")
 else()
@@ -243,7 +241,7 @@ endif()
 sleigh_compile(
   TARGET ppc_e200_spec
   COMPILER "${sleigh_compiler}"
-  SLASPEC "${ghidra-fork_SOURCE_DIR}/Ghidra/Processors/PowerPC/data/languages/ppc_32_e200_be.slaspec"
+  SLASPEC "${ghidrasource_SOURCE_DIR}/Ghidra/Processors/PowerPC/data/languages/ppc_32_e200_be.slaspec"
   LOG_FILE "${sleigh_BINARY_DIR}/sleighspecs/spec_build_logs/ppc_32_e200_be.sla.log"
   OUT_FILE "${sleigh_BINARY_DIR}/specfiles/Ghidra/Processors/PowerPC/data/languages/ppc_32_e200_be.sla"
 )

patches/README.md

@@ -0,0 +1,17 @@
+# Sleigh patches
+
+The [sleigh](https://github.com/lifting-bits/sleigh) repository uses `git am` to apply a list of patches to a specific Ghidra base commit. These patches are mostly to make Ghidra's decompiler source code reusable as a library and suitable for packaging. You can find more information in [sleigh/src/README.md](https://github.com/lifting-bits/sleigh/blob/master/src/README.md).
+
+Remill has a bunch of additional patches, which improve the semantics themselves (sleigh files). These are applied on top of the sleigh patches and specified in `sleigh_ADDITIONAL_PATCHES`.
+
+To update the patches or the sleigh base commit, we need to get a cloned Ghidra source tree that only has the sleigh patches applied. From there we will apply the patches in this repository manually and recreate the patch folder.
+
+1. Go in `build/_deps/ghidrasource-src` and run `git status` to make sure you are in a clean state. You might need to run `git am --abort` to abort the patching process if you had patch failures.
+2. Modify remill's `CMakeLists.txt` to set `sleigh_ADDITIONAL_PATCHES` to be empty and re-configure remill. This will apply just the patches of the sleigh project's tag we pinned.
+3. Get the commit hash of the clean Ghidra patches with `git rev-parse HEAD` and note it as `<base-commit>`.
+4. Apply the patches in `patches/sleigh/` one by one with `git am ../../../patches/sleigh/0001-xyz.patch`. If you get any errors, manually apply the patch (you can try `git apply ../../../patches/sleigh/0001-xyz.patch`) and then `git add .` followed by `git am --continue`. The goal is to create a commit for every patch.
+5. Delete all the old patches: `rm patches/sleigh/*.patch`.
+6. Recreate the patch list: `git format-patch remill-sleigh-7c6b742-base -o ../../../patches/sleigh/`.
+7. Reconfigure remill's CMake to make sure everything applies correctly and then change `sleigh_ADDITIONAL_PATCHES` batch to include all of the patches in `patches/sleigh/`.
+
+**Note**: Sometimes you run into issues where `git am` cannot correctly apply all the patches. This is usually related to whitespace issues. Before exporting the patch list you can run `git rebase <base-commit> --whitespace=fix` to make sure everything is cleaned up correctly and ready to be applied.

patches/sleigh/address-warning.patch renamed to patches/sleigh/0001-Fix-narrowing-conversion-warning.patch

@@ -1,15 +1,15 @@
-From 5cef084ec56ee326d3b169c2c83950a017ae02f6 Mon Sep 17 00:00:00 2001
+From 622437e7f4196c92b8162913e91704792ae82b43 Mon Sep 17 00:00:00 2001
 From: Duncan Ogilvie <[email protected]>
 Date: Wed, 29 Oct 2025 00:52:58 +0100
-Subject: [PATCH] Fix narrowing conversion warning
+Subject: [PATCH 01/13] Fix narrowing conversion warning
 
 error : constant expression evaluates to -1 which cannot be narrowed to type 'uintb' (aka 'unsigned long long') [-Wc++11-narrowing]
 ---
  Ghidra/Features/Decompiler/src/decompile/cpp/address.cc | 4 ++--
  1 file changed, 2 insertions(+), 2 deletions(-)
 
 diff --git a/Ghidra/Features/Decompiler/src/decompile/cpp/address.cc b/Ghidra/Features/Decompiler/src/decompile/cpp/address.cc
-index 9e8039d486e..a939961c371 100644
+index 07bf3ba555..ffbf3efcb9 100644
 --- a/Ghidra/Features/Decompiler/src/decompile/cpp/address.cc
 +++ b/Ghidra/Features/Decompiler/src/decompile/cpp/address.cc
 @@ -630,8 +630,8 @@ void RangeList::decode(Decoder &decoder)
@@ -23,3 +23,6 @@ index 9e8039d486e..a939961c371 100644
  #endif
 
  /// Treat the given \b val as a constant of \b size bytes
+-- 
+2.34.1
+

patches/sleigh/0002-ppc-e200-3.patch

@@ -0,0 +1,224 @@
+From f252de1b805433764a82fd63af37f580fb15a400 Mon Sep 17 00:00:00 2001
+From: William Tan <[email protected]>
+Date: Thu, 20 Apr 2023 16:24:00 -0400
+Subject: [PATCH 02/13] ppc e200 (#3)
+
+* initial e200 sub arch
+
+* fix description and gnu string
+
+* fix comment
+---
+ .../Processors/PowerPC/certification.manifest |   2 +
+ .../PowerPC/data/languages/ppc.ldefs          |  16 +++
+ .../data/languages/ppc_32_e200_be.cspec       | 106 ++++++++++++++++++
+ .../data/languages/ppc_32_e200_be.slaspec     |  30 +++++
+ .../PowerPC/data/languages/ppc_common.sinc    |   2 +-
+ 5 files changed, 155 insertions(+), 1 deletion(-)
+ create mode 100644 Ghidra/Processors/PowerPC/data/languages/ppc_32_e200_be.cspec
+ create mode 100644 Ghidra/Processors/PowerPC/data/languages/ppc_32_e200_be.slaspec
+
+diff --git a/Ghidra/Processors/PowerPC/certification.manifest b/Ghidra/Processors/PowerPC/certification.manifest
+index ad290208f0..39c6bf1451 100644
+--- a/Ghidra/Processors/PowerPC/certification.manifest
++++ b/Ghidra/Processors/PowerPC/certification.manifest
+@@ -23,6 +23,8 @@ data/languages/ppc_32_4xx_le.slaspec||GHIDRA||||END|
+ data/languages/ppc_32_be.cspec||GHIDRA||||END|
+ data/languages/ppc_32_be.slaspec||GHIDRA||||END|
+ data/languages/ppc_32_be_Mac.cspec||GHIDRA||||END|
++data/languages/ppc_32_e200_be.cspec||GHIDRA||||END|
++data/languages/ppc_32_e200_be.slaspec||GHIDRA||||END|
+ data/languages/ppc_32_e500_be.cspec||GHIDRA||||END|
+ data/languages/ppc_32_e500_be.slaspec||GHIDRA||||END|
+ data/languages/ppc_32_e500_le.cspec||GHIDRA||||END|
+diff --git a/Ghidra/Processors/PowerPC/data/languages/ppc.ldefs b/Ghidra/Processors/PowerPC/data/languages/ppc.ldefs
+index 1d3dc8e043..4b0301d7da 100644
+--- a/Ghidra/Processors/PowerPC/data/languages/ppc.ldefs
++++ b/Ghidra/Processors/PowerPC/data/languages/ppc.ldefs
+@@ -174,6 +174,22 @@
+ 	<external_name tool="IDA-PRO" name="ppcl"/>
+     <external_name tool="DWARF.register.mapping.file" name="ppc.dwarf"/>
+   </language>
++  <language processor="PowerPC"
++            endian="big"
++            size="32"
++            variant="PowerISA-e200-vle"
++            version="1.5"
++            slafile="ppc_32_e200_be.sla"
++            processorspec="ppc_32.pspec"
++            manualindexfile="../manuals/PowerPC.idx"
++            id="PowerPC:BE:32:e200:VLE">
++    <description>Power ISA e200 32-bit big-endian family</description>
++    <truncate_space space="ram" size="4"/>
++    <compiler name="default" spec="ppc_32_e200_be.cspec" id="default"/>
++    <external_name tool="gnu" name="powerpc:vle"/>
++    <external_name tool="IDA-PRO" name="ppc"/>
++    <external_name tool="DWARF.register.mapping.file" name="ppc.dwarf"/>
++  </language>
+   <language processor="PowerPC"
+             endian="big"
+             size="32"
+diff --git a/Ghidra/Processors/PowerPC/data/languages/ppc_32_e200_be.cspec b/Ghidra/Processors/PowerPC/data/languages/ppc_32_e200_be.cspec
+new file mode 100644
+index 0000000000..cfc45d5c05
+--- /dev/null
++++ b/Ghidra/Processors/PowerPC/data/languages/ppc_32_e200_be.cspec
+@@ -0,0 +1,106 @@
++<?xml version="1.0" encoding="UTF-8"?>
++<!-- This cspec describes the 32-bit ABI for PowerPC as it is implemented for 64-bit code.
++     Presumably this ABI allows binary compatibility of 64-bit code with existing 32-bit code.
++     The ABI assumes 32-bit registers and addresses, in particular the maximum sized integer value
++     that can be passed in a single register is 4 bytes (even though the register is 8 bytes long).
++     The cspec currently has a limited ability to model this: the maxsize attribute must still be
++     set to 8 for parameter passing registers r3 - r10.
++-->
++<compiler_spec>
++  <global>
++    <range space="ram"/>
++  </global>
++  <data_organization>
++    <pointer_size value="4"/>
++  </data_organization>
++  <aggressivetrim signext="true"/>  <!-- Pointers are 4-bytes but are held in 8-byte registers -->
++  <stackpointer register="r1" space="ram"/>
++  <default_proto>
++    <prototype name="__stdcall" extrapop="0" stackshift="0">
++      <input pointermax="8">
++        <pentry minsize="1" maxsize="4" extension="sign">
++          <register name="_r3"/>
++        </pentry>
++        <pentry minsize="1" maxsize="4" extension="sign">
++          <register name="_r4"/>
++        </pentry>
++        <pentry minsize="5" maxsize="8" extension="sign">
++          <addr space="join" piece1="_r3" piece2="_r4"/>
++        </pentry>
++        <pentry minsize="1" maxsize="4" extension="sign">
++          <register name="_r5"/>
++        </pentry>
++        <pentry minsize="1" maxsize="4" extension="sign">
++          <register name="_r6"/>
++        </pentry>
++        <pentry minsize="5" maxsize="8" extension="sign">
++          <addr space="join" piece1="_r5" piece2="_r6"/>
++        </pentry>
++        <pentry minsize="1" maxsize="4" extension="sign">
++          <register name="_r7"/>
++        </pentry>
++        <pentry minsize="1" maxsize="4" extension="sign">
++          <register name="_r8"/>
++        </pentry>
++        <pentry minsize="5" maxsize="8" extension="sign">
++          <addr space="join" piece1="_r7" piece2="_r8"/>
++        </pentry>
++        <pentry minsize="1" maxsize="4" extension="sign">
++          <register name="_r9"/>
++        </pentry>
++        <pentry minsize="1" maxsize="4" extension="sign">
++          <register name="_r10"/>
++        </pentry>
++        <pentry minsize="5" maxsize="8" extension="sign">
++          <addr space="join" piece1="_r9" piece2="_r10"/>
++        </pentry>
++        <pentry minsize="1" maxsize="500" align="4">
++          <addr offset="8" space="stack"/>
++        </pentry>
++      </input>
++      <output>
++        <pentry minsize="1" maxsize="4" extension="sign">
++          <register name="_r3"/>
++        </pentry>
++        <pentry minsize="5" maxsize="8">
++          <addr space="join" piece1="_r3" piece2="_r4"/>
++        </pentry>
++      </output>
++      <unaffected>
++        <register name="r1"/>  <!-- stack pointer -->
++        <register name="r2"/>  <!-- _SDA2_BASE_ -->
++        <register name="r13"/> <!-- _SDA_BASE_  -->
++        <register name="r14"/>
++        <register name="r15"/>
++        <register name="r16"/>
++        <register name="r17"/>
++        <register name="r18"/>
++        <register name="r19"/>
++        <register name="r20"/>
++        <register name="r21"/>
++        <register name="r22"/>
++        <register name="r23"/>
++        <register name="r24"/>
++        <register name="r25"/>
++        <register name="r26"/>
++        <register name="r27"/>
++        <register name="r28"/>
++        <register name="r29"/>
++        <register name="r30"/>
++        <register name="r31"/>
++        <register name="cr2"/>
++        <register name="cr3"/>
++        <register name="cr4"/>
++      </unaffected>
++    </prototype>
++  </default_proto>
++
++  <callfixup name="get_pc_thunk_lr">
++    <pcode>
++      <body><![CDATA[
++      LR = inst_dest + 4;
++      ]]></body>
++    </pcode>
++  </callfixup>
++
++</compiler_spec>
+diff --git a/Ghidra/Processors/PowerPC/data/languages/ppc_32_e200_be.slaspec b/Ghidra/Processors/PowerPC/data/languages/ppc_32_e200_be.slaspec
+new file mode 100644
+index 0000000000..968574d198
+--- /dev/null
++++ b/Ghidra/Processors/PowerPC/data/languages/ppc_32_e200_be.slaspec
+@@ -0,0 +1,30 @@
++# SLA specification file for NXP PowerPC e200 series core
++
++# NOTE: This language variant includes some registers and instructions not supported
++# by the actual processor (e.g., floating pointer registers and associated instructions).
++# The actual processor only supports a subset of the registers and instructions implemented.
++
++@define E200
++
++@define ENDIAN "big"
++
++# Although a 32-bit architecture, 64-bit general purpose registers are supported.
++# Language has been modeled using a 64-bit implementation with a 32-bit truncated
++# memory space (see ldefs).
++
++@define REGISTER_SIZE "8"
++@define BIT_64 "64"
++
++@define EATRUNC "ea"
++
++@define CTR_OFFSET "32"
++
++@define NoLegacyIntegerMultiplyAccumulate
++
++@include "ppc_common.sinc"
++@include "ppc_vle.sinc"
++@include "quicciii.sinc"
++@include "evx.sinc"
++@include "SPEF_SCR.sinc"
++@include "SPE_EFSD.sinc"
++@include "SPE_EFV.sinc"
+diff --git a/Ghidra/Processors/PowerPC/data/languages/ppc_common.sinc b/Ghidra/Processors/PowerPC/data/languages/ppc_common.sinc
+index aaa76cc4ac..46aa86c74c 100644
+--- a/Ghidra/Processors/PowerPC/data/languages/ppc_common.sinc
++++ b/Ghidra/Processors/PowerPC/data/languages/ppc_common.sinc
+@@ -19,7 +19,7 @@ define register offset=0 size=$(REGISTER_SIZE) [
+ 	r0 r1 r2 r3 r4 r5 r6 r7 r8 r9 r10 r11 r12 r13 r14 r15
+ 	r16 r17 r18 r19 r20 r21 r22 r23 r24 r25 r26 r27 r28 r29 r30 r31 ];
+ 	
+-@ifdef E500
++@if defined(E500) || defined(E200)
+ # Define 4-byte general purpose sub-registers (LSB) to be used by E500 compiler specification
+ # which must restrict parameter/return passing to low 4-bytes of the 8-byte general purpose registers.
+ @if ENDIAN == "big"
+-- 
+2.34.1
+

patches/sleigh/0003-update-target-cspec.patch

@@ -0,0 +1,24 @@
+From b3bd823a17698abc4c2a906a7367018d4dedae45 Mon Sep 17 00:00:00 2001
+From: 2over12 <[email protected]>
+Date: Tue, 11 Apr 2023 13:05:24 -0400
+Subject: [PATCH 03/13] update target cspec
+
+---
+ Ghidra/Processors/PowerPC/data/languages/ppc_64_32.cspec | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/Ghidra/Processors/PowerPC/data/languages/ppc_64_32.cspec b/Ghidra/Processors/PowerPC/data/languages/ppc_64_32.cspec
+index 109b980e35..2160930a8a 100644
+--- a/Ghidra/Processors/PowerPC/data/languages/ppc_64_32.cspec
++++ b/Ghidra/Processors/PowerPC/data/languages/ppc_64_32.cspec
+@@ -94,6 +94,7 @@
+         </pentry>
+       </output>
+       <unaffected>
++        <register name="r13"/>
+         <register name="r14"/>
+         <register name="r15"/>
+         <register name="r16"/>
+-- 
+2.34.1
+