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Implement core::ops::Not for integer types (#130)
I don't know if there's a reason this wasn't implemented previously.
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4 files changed

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lines changed

4 files changed

+130
-2
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‎fearless_simd/src/generated/ops.rs‎

Lines changed: 126 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -354,6 +354,13 @@ impl<S: Simd> core::ops::BitXor<i8x16<S>> for i8 {
354354
rhs.simd.xor_i8x16(self.simd_into(rhs.simd), rhs)
355355
}
356356
}
357+
impl<S: Simd> core::ops::Not for i8x16<S> {
358+
type Output = Self;
359+
#[inline(always)]
360+
fn not(self) -> Self::Output {
361+
self.simd.not_i8x16(self)
362+
}
363+
}
357364
impl<S: Simd> core::ops::Shl<u32> for i8x16<S> {
358365
type Output = Self;
359366
#[inline(always)]
@@ -591,6 +598,13 @@ impl<S: Simd> core::ops::BitXor<u8x16<S>> for u8 {
591598
rhs.simd.xor_u8x16(self.simd_into(rhs.simd), rhs)
592599
}
593600
}
601+
impl<S: Simd> core::ops::Not for u8x16<S> {
602+
type Output = Self;
603+
#[inline(always)]
604+
fn not(self) -> Self::Output {
605+
self.simd.not_u8x16(self)
606+
}
607+
}
594608
impl<S: Simd> core::ops::Shl<u32> for u8x16<S> {
595609
type Output = Self;
596610
#[inline(always)]
@@ -941,6 +955,13 @@ impl<S: Simd> core::ops::BitXor<i16x8<S>> for i16 {
941955
rhs.simd.xor_i16x8(self.simd_into(rhs.simd), rhs)
942956
}
943957
}
958+
impl<S: Simd> core::ops::Not for i16x8<S> {
959+
type Output = Self;
960+
#[inline(always)]
961+
fn not(self) -> Self::Output {
962+
self.simd.not_i16x8(self)
963+
}
964+
}
944965
impl<S: Simd> core::ops::Shl<u32> for i16x8<S> {
945966
type Output = Self;
946967
#[inline(always)]
@@ -1178,6 +1199,13 @@ impl<S: Simd> core::ops::BitXor<u16x8<S>> for u16 {
11781199
rhs.simd.xor_u16x8(self.simd_into(rhs.simd), rhs)
11791200
}
11801201
}
1202+
impl<S: Simd> core::ops::Not for u16x8<S> {
1203+
type Output = Self;
1204+
#[inline(always)]
1205+
fn not(self) -> Self::Output {
1206+
self.simd.not_u16x8(self)
1207+
}
1208+
}
11811209
impl<S: Simd> core::ops::Shl<u32> for u16x8<S> {
11821210
type Output = Self;
11831211
#[inline(always)]
@@ -1528,6 +1556,13 @@ impl<S: Simd> core::ops::BitXor<i32x4<S>> for i32 {
15281556
rhs.simd.xor_i32x4(self.simd_into(rhs.simd), rhs)
15291557
}
15301558
}
1559+
impl<S: Simd> core::ops::Not for i32x4<S> {
1560+
type Output = Self;
1561+
#[inline(always)]
1562+
fn not(self) -> Self::Output {
1563+
self.simd.not_i32x4(self)
1564+
}
1565+
}
15311566
impl<S: Simd> core::ops::Shl<u32> for i32x4<S> {
15321567
type Output = Self;
15331568
#[inline(always)]
@@ -1765,6 +1800,13 @@ impl<S: Simd> core::ops::BitXor<u32x4<S>> for u32 {
17651800
rhs.simd.xor_u32x4(self.simd_into(rhs.simd), rhs)
17661801
}
17671802
}
1803+
impl<S: Simd> core::ops::Not for u32x4<S> {
1804+
type Output = Self;
1805+
#[inline(always)]
1806+
fn not(self) -> Self::Output {
1807+
self.simd.not_u32x4(self)
1808+
}
1809+
}
17681810
impl<S: Simd> core::ops::Shl<u32> for u32x4<S> {
17691811
type Output = Self;
17701812
#[inline(always)]
@@ -2499,6 +2541,13 @@ impl<S: Simd> core::ops::BitXor<i8x32<S>> for i8 {
24992541
rhs.simd.xor_i8x32(self.simd_into(rhs.simd), rhs)
25002542
}
25012543
}
2544+
impl<S: Simd> core::ops::Not for i8x32<S> {
2545+
type Output = Self;
2546+
#[inline(always)]
2547+
fn not(self) -> Self::Output {
2548+
self.simd.not_i8x32(self)
2549+
}
2550+
}
25022551
impl<S: Simd> core::ops::Shl<u32> for i8x32<S> {
25032552
type Output = Self;
25042553
#[inline(always)]
@@ -2736,6 +2785,13 @@ impl<S: Simd> core::ops::BitXor<u8x32<S>> for u8 {
27362785
rhs.simd.xor_u8x32(self.simd_into(rhs.simd), rhs)
27372786
}
27382787
}
2788+
impl<S: Simd> core::ops::Not for u8x32<S> {
2789+
type Output = Self;
2790+
#[inline(always)]
2791+
fn not(self) -> Self::Output {
2792+
self.simd.not_u8x32(self)
2793+
}
2794+
}
27392795
impl<S: Simd> core::ops::Shl<u32> for u8x32<S> {
27402796
type Output = Self;
27412797
#[inline(always)]
@@ -3086,6 +3142,13 @@ impl<S: Simd> core::ops::BitXor<i16x16<S>> for i16 {
30863142
rhs.simd.xor_i16x16(self.simd_into(rhs.simd), rhs)
30873143
}
30883144
}
3145+
impl<S: Simd> core::ops::Not for i16x16<S> {
3146+
type Output = Self;
3147+
#[inline(always)]
3148+
fn not(self) -> Self::Output {
3149+
self.simd.not_i16x16(self)
3150+
}
3151+
}
30893152
impl<S: Simd> core::ops::Shl<u32> for i16x16<S> {
30903153
type Output = Self;
30913154
#[inline(always)]
@@ -3323,6 +3386,13 @@ impl<S: Simd> core::ops::BitXor<u16x16<S>> for u16 {
33233386
rhs.simd.xor_u16x16(self.simd_into(rhs.simd), rhs)
33243387
}
33253388
}
3389+
impl<S: Simd> core::ops::Not for u16x16<S> {
3390+
type Output = Self;
3391+
#[inline(always)]
3392+
fn not(self) -> Self::Output {
3393+
self.simd.not_u16x16(self)
3394+
}
3395+
}
33263396
impl<S: Simd> core::ops::Shl<u32> for u16x16<S> {
33273397
type Output = Self;
33283398
#[inline(always)]
@@ -3673,6 +3743,13 @@ impl<S: Simd> core::ops::BitXor<i32x8<S>> for i32 {
36733743
rhs.simd.xor_i32x8(self.simd_into(rhs.simd), rhs)
36743744
}
36753745
}
3746+
impl<S: Simd> core::ops::Not for i32x8<S> {
3747+
type Output = Self;
3748+
#[inline(always)]
3749+
fn not(self) -> Self::Output {
3750+
self.simd.not_i32x8(self)
3751+
}
3752+
}
36763753
impl<S: Simd> core::ops::Shl<u32> for i32x8<S> {
36773754
type Output = Self;
36783755
#[inline(always)]
@@ -3910,6 +3987,13 @@ impl<S: Simd> core::ops::BitXor<u32x8<S>> for u32 {
39103987
rhs.simd.xor_u32x8(self.simd_into(rhs.simd), rhs)
39113988
}
39123989
}
3990+
impl<S: Simd> core::ops::Not for u32x8<S> {
3991+
type Output = Self;
3992+
#[inline(always)]
3993+
fn not(self) -> Self::Output {
3994+
self.simd.not_u32x8(self)
3995+
}
3996+
}
39133997
impl<S: Simd> core::ops::Shl<u32> for u32x8<S> {
39143998
type Output = Self;
39153999
#[inline(always)]
@@ -4644,6 +4728,13 @@ impl<S: Simd> core::ops::BitXor<i8x64<S>> for i8 {
46444728
rhs.simd.xor_i8x64(self.simd_into(rhs.simd), rhs)
46454729
}
46464730
}
4731+
impl<S: Simd> core::ops::Not for i8x64<S> {
4732+
type Output = Self;
4733+
#[inline(always)]
4734+
fn not(self) -> Self::Output {
4735+
self.simd.not_i8x64(self)
4736+
}
4737+
}
46474738
impl<S: Simd> core::ops::Shl<u32> for i8x64<S> {
46484739
type Output = Self;
46494740
#[inline(always)]
@@ -4881,6 +4972,13 @@ impl<S: Simd> core::ops::BitXor<u8x64<S>> for u8 {
48814972
rhs.simd.xor_u8x64(self.simd_into(rhs.simd), rhs)
48824973
}
48834974
}
4975+
impl<S: Simd> core::ops::Not for u8x64<S> {
4976+
type Output = Self;
4977+
#[inline(always)]
4978+
fn not(self) -> Self::Output {
4979+
self.simd.not_u8x64(self)
4980+
}
4981+
}
48844982
impl<S: Simd> core::ops::Shl<u32> for u8x64<S> {
48854983
type Output = Self;
48864984
#[inline(always)]
@@ -5231,6 +5329,13 @@ impl<S: Simd> core::ops::BitXor<i16x32<S>> for i16 {
52315329
rhs.simd.xor_i16x32(self.simd_into(rhs.simd), rhs)
52325330
}
52335331
}
5332+
impl<S: Simd> core::ops::Not for i16x32<S> {
5333+
type Output = Self;
5334+
#[inline(always)]
5335+
fn not(self) -> Self::Output {
5336+
self.simd.not_i16x32(self)
5337+
}
5338+
}
52345339
impl<S: Simd> core::ops::Shl<u32> for i16x32<S> {
52355340
type Output = Self;
52365341
#[inline(always)]
@@ -5468,6 +5573,13 @@ impl<S: Simd> core::ops::BitXor<u16x32<S>> for u16 {
54685573
rhs.simd.xor_u16x32(self.simd_into(rhs.simd), rhs)
54695574
}
54705575
}
5576+
impl<S: Simd> core::ops::Not for u16x32<S> {
5577+
type Output = Self;
5578+
#[inline(always)]
5579+
fn not(self) -> Self::Output {
5580+
self.simd.not_u16x32(self)
5581+
}
5582+
}
54715583
impl<S: Simd> core::ops::Shl<u32> for u16x32<S> {
54725584
type Output = Self;
54735585
#[inline(always)]
@@ -5818,6 +5930,13 @@ impl<S: Simd> core::ops::BitXor<i32x16<S>> for i32 {
58185930
rhs.simd.xor_i32x16(self.simd_into(rhs.simd), rhs)
58195931
}
58205932
}
5933+
impl<S: Simd> core::ops::Not for i32x16<S> {
5934+
type Output = Self;
5935+
#[inline(always)]
5936+
fn not(self) -> Self::Output {
5937+
self.simd.not_i32x16(self)
5938+
}
5939+
}
58215940
impl<S: Simd> core::ops::Shl<u32> for i32x16<S> {
58225941
type Output = Self;
58235942
#[inline(always)]
@@ -6055,6 +6174,13 @@ impl<S: Simd> core::ops::BitXor<u32x16<S>> for u32 {
60556174
rhs.simd.xor_u32x16(self.simd_into(rhs.simd), rhs)
60566175
}
60576176
}
6177+
impl<S: Simd> core::ops::Not for u32x16<S> {
6178+
type Output = Self;
6179+
#[inline(always)]
6180+
fn not(self) -> Self::Output {
6181+
self.simd.not_u32x16(self)
6182+
}
6183+
}
60586184
impl<S: Simd> core::ops::Shl<u32> for u32x16<S> {
60596185
type Output = Self;
60606186
#[inline(always)]

‎fearless_simd/src/generated/simd_trait.rs‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1013,6 +1013,7 @@ pub trait SimdInt<Element: SimdElement, S: Simd>:
10131013
+ core::ops::MulAssign
10141014
+ core::ops::Mul<Element, Output = Self>
10151015
+ core::ops::MulAssign<Element>
1016+
+ core::ops::Not<Output = Self>
10161017
+ core::ops::BitAnd<Output = Self>
10171018
+ core::ops::BitAndAssign
10181019
+ core::ops::BitAnd<Element, Output = Self>

‎fearless_simd_gen/src/mk_ops.rs‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -14,8 +14,8 @@ pub(crate) fn mk_ops() -> TokenStream {
1414
for ty in SIMD_TYPES {
1515
let ops = match ty.scalar {
1616
ScalarType::Float => &["neg", "add", "sub", "mul", "div"][..],
17-
ScalarType::Int => &["neg", "add", "sub", "mul", "and", "or", "xor"],
18-
ScalarType::Unsigned => &["add", "sub", "mul", "and", "or", "xor"],
17+
ScalarType::Int => &["neg", "add", "sub", "mul", "and", "or", "xor", "not"],
18+
ScalarType::Unsigned => &["add", "sub", "mul", "and", "or", "xor", "not"],
1919
ScalarType::Mask => &["and", "or", "xor", "not"],
2020
};
2121
let simd = ty.rust();

‎fearless_simd_gen/src/mk_simd_trait.rs‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -138,6 +138,7 @@ fn mk_simd_int() -> TokenStream {
138138
+ core::ops::MulAssign
139139
+ core::ops::Mul<Element, Output = Self>
140140
+ core::ops::MulAssign<Element>
141+
+ core::ops::Not<Output = Self>
141142
+ core::ops::BitAnd<Output = Self>
142143
+ core::ops::BitAndAssign
143144
+ core::ops::BitAnd<Element, Output = Self>

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