driver:dram: align the device name of the 1g dram sip

LiBinSHA · LiBinSHA · commit 28838fb6de92 · 2025-05-20T14:40:13.000+08:00
Update the device name to align with W631GU6NB12I for all 1G
devices. For SAMA7D65-D1G and SAMA7G54-D1G change the name from
W631GU6NB to W631GU6NB12I.For SAM9X75-D1G, change the name from
W631GU6NG to W631GU6NB12I.

Signed-off-by: Li Bin &lt;bin.li@microchip.com&gt;
diff --git a/Kconfig b/Kconfig
@@ -578,7 +578,7 @@ config DDR_DRIVER_IMPEDANCE
 	default 48 if DDR_IS43LD16128B_25BLI
 	default 48 if DDR_MT52L256M32D1PF_107
 	default 40 if DDR_MT41K128M16JT_125
-	default 40 if DDR_W631GU6NB
+	default 40 if DDR_W631GU6NB12I
 	default 40 if DDR_W632GU6NB12I
 	default 40 if DDR_W634GU6NB12I
 	default 40 if DDR_AS4C512M16D3LA_10BIN
@@ -595,7 +595,7 @@ config DDR_ODT_IMPEDANCE
 	default 60 if DDR_AS4C256M16D3LC_12BCNTR
 	default 60 if DDR_MT41K512M16HA_125
 	default 60 if DDR_MT41K128M16JT_125
-	default 60 if DDR_W631GU6NB
+	default 60 if DDR_W631GU6NB12I
 	default 60 if DDR_W632GU6NB12I
 	default 60 if DDR_W634GU6NB12I
 	default 60 if DDR_AS4C512M16D3LA_10BIN
diff --git a/configs/ourasi_sip1g_eb_bkptnone_defconfig b/configs/ourasi_sip1g_eb_bkptnone_defconfig
@@ -7,7 +7,7 @@ CONFIG_INIT_AND_STOP=y
 CONFIG_CPU_CLK_800MHZ=y
 CONFIG_DEBUG=y
 CONFIG_DDR_SET_BY_DEVICE=y
-CONFIG_DDR_W631GU6NB=y
+CONFIG_DDR_W631GU6NB12I=y
 CONFIG_DDR_1_GBIT=y
 CONFIG_MEM_CLOCK_533=y
 # CONFIG_REDIRECT_ALL_INTS_AIC is not set
diff --git a/configs/ourasi_sip1g_ebsd0_uboot_defconfig b/configs/ourasi_sip1g_ebsd0_uboot_defconfig
@@ -6,7 +6,7 @@ CONFIG_SAMA7D65=y
 CONFIG_CPU_CLK_800MHZ=y
 CONFIG_DEBUG=y
 CONFIG_DDR_SET_BY_DEVICE=y
-CONFIG_DDR_W631GU6NB=y
+CONFIG_DDR_W631GU6NB12I=y
 CONFIG_DDR_1_GBIT=y
 CONFIG_MEM_CLOCK_533=y
 CONFIG_SDCARD=y
diff --git a/configs/ourasi_sip1g_ebsd1_uboot_defconfig b/configs/ourasi_sip1g_ebsd1_uboot_defconfig
@@ -6,7 +6,7 @@ CONFIG_SAMA7D65=y
 CONFIG_CPU_CLK_800MHZ=y
 CONFIG_DEBUG=y
 CONFIG_DDR_SET_BY_DEVICE=y
-CONFIG_DDR_W631GU6NB=y
+CONFIG_DDR_W631GU6NB12I=y
 CONFIG_DDR_1_GBIT=y
 CONFIG_MEM_CLOCK_533=y
 CONFIG_SDCARD=y
diff --git a/configs/ourasi_sip1g_ebsd2_uboot_defconfig b/configs/ourasi_sip1g_ebsd2_uboot_defconfig
@@ -6,7 +6,7 @@ CONFIG_SAMA7D65=y
 CONFIG_CPU_CLK_800MHZ=y
 CONFIG_DEBUG=y
 CONFIG_DDR_SET_BY_DEVICE=y
-CONFIG_DDR_W631GU6NB=y
+CONFIG_DDR_W631GU6NB12I=y
 CONFIG_DDR_1_GBIT=y
 CONFIG_MEM_CLOCK_533=y
 CONFIG_SDCARD=y
diff --git a/configs/sam9x75_som1g_nf_uboot_defconfig b/configs/sam9x75_som1g_nf_uboot_defconfig
@@ -5,7 +5,7 @@
 CONFIG_SAM9X7=y
 CONFIG_DEBUG=y
 CONFIG_DDR_SET_BY_DEVICE=y
-CONFIG_DDR_W631GU6NG=y
+CONFIG_DDR_W631GU6NB12I=y
 CONFIG_NANDFLASH=y
 CONFIG_NAND_TIMING_MODE=y
 CONFIG_NAND_DMA_SUPPORT=y
diff --git a/configs/sam9x75_som1g_sd_uboot_defconfig b/configs/sam9x75_som1g_sd_uboot_defconfig
@@ -5,5 +5,5 @@
 CONFIG_SAM9X7=y
 CONFIG_DEBUG=y
 CONFIG_DDR_SET_BY_DEVICE=y
-CONFIG_DDR_W631GU6NG=y
+CONFIG_DDR_W631GU6NB12I=y
 CONFIG_SDCARD=y
diff --git a/configs/sama7g54_som1g_nf_uboot_defconfig b/configs/sama7g54_som1g_nf_uboot_defconfig
@@ -6,7 +6,7 @@ CONFIG_SAMA7G5=y
 CONFIG_CPU_CLK_800MHZ=y
 CONFIG_DEBUG=y
 CONFIG_DDR_SET_BY_DEVICE=y
-CONFIG_DDR_W631GU6NB=y
+CONFIG_DDR_W631GU6NB12I=y
 CONFIG_MEM_CLOCK_533=y
 CONFIG_NANDFLASH=y
 CONFIG_JUMP_ADDR="0x66f00000"
diff --git a/configs/sama7g54_som1g_sd_uboot_defconfig b/configs/sama7g54_som1g_sd_uboot_defconfig
@@ -6,7 +6,7 @@ CONFIG_SAMA7G5=y
 CONFIG_CPU_CLK_800MHZ=y
 CONFIG_DEBUG=y
 CONFIG_DDR_SET_BY_DEVICE=y
-CONFIG_DDR_W631GU6NB=y
+CONFIG_DDR_W631GU6NB12I=y
 CONFIG_MEM_CLOCK_533=y
 CONFIG_SDCARD=y
 CONFIG_SDHC1=y
diff --git a/driver/Config.in.dram b/driver/Config.in.dram
@@ -87,11 +87,6 @@ config DDR_W632GU6NG
 	depends on DDRC
 	help
 		DDR3L W632GU6NG 2 Gbit
-config DDR_W631GU6NG
-	bool "DDR3L W631GU6NG (SAM9X75-1G SiP)"
-	depends on DDRC
-	help
-		DDR3L W631GU6NG  2 Gbit
 config DDR_W9751G6NB
 	bool "DDR3L W9751G6NB (SAM9X75-512M SiP)"
 	depends on DDRC
@@ -152,11 +147,10 @@ config DDR_AS4C512M16D3LA_10BIN
   depends on UMCTL2
   help
     DDR3L AS4C512M16D3LA_10BIN 64 Meg x 16 x 8 DDR3-1066
-config DDR_W631GU6NB
-  bool "DDR3L W631GU6NB((SAMA7G54/SAMA7D65 1G-SIP))"
-  depends on UMCTL2
+config DDR_W631GU6NB12I
+  bool "DDR3L W631GU6NB12I((SAM9X75/SAMA7G54/SAMA7D65 1G-SIP))"
   help
-    DDR3L W631GU6NB 8 Meg x 16 x 8 DDR3-1600
+    DDR3L W631GU6NB12I 8 Meg x 16 x 8 DDR3-1600
 config DDR_W632GU6NB12I
 	bool "DDR3L W632GU6NB12I(SAMA7G54|SAMA7D65 2G-SIP)"
 	depends on UMCTL2
diff --git a/driver/ddramc.c b/driver/ddramc.c
@@ -105,7 +105,7 @@ static void ddram_reg_config(struct ddramc_register *ddramc_config)
 	ddramc_config->cal_mr4r = AT91C_DDRC2_COUNT_CAL(0xC852);
 	ddramc_config->tim_calr = AT91C_DDRC2_ZQCS(64);
 
-#elif defined(CONFIG_DDR_W631GU6NG)
+#elif defined(CONFIG_DDR_W631GU6NB12I)
 /* DDR3L(W631GU6NG = 8 Mbit x 16 x 8 banks), total 1Gbit on SAM9X75 SIP */
 	type = AT91C_DDRC2_MD_DDR3_SDRAM;
 	dbw = AT91C_DDRC2_DBW_16_BITS;
diff --git a/driver/driver_cpp.mk b/driver/driver_cpp.mk
@@ -30,9 +30,6 @@ endif
 ifeq ($(CONFIG_DDR_W632GU6NG),y)
 CPPFLAGS += -DCONFIG_DDR3 -DCONFIG_DDR_2_GBIT
 endif
-ifeq ($(CONFIG_DDR_W631GU6NG),y)
-CPPFLAGS += -DCONFIG_DDR3 -DCONFIG_DDR_1_GBIT
-endif
 ifeq ($(CONFIG_DDR_W9751G6NB),y)
 CPPFLAGS += -DCONFIG_DDR2 -DCONFIG_DDR_512_MBIT
 endif
@@ -102,7 +99,7 @@ endif
 ifeq ($(CONFIG_DDR_MT41K512M16HA_125), y)
 CPPFLAGS += -DCONFIG_DDR3 -DCONFIG_DDR3_SPEED_BIN_1600K -DCONFIG_DDR_8_GBIT
 endif
-ifeq ($(CONFIG_DDR_W631GU6NB), y)
+ifeq ($(CONFIG_DDR_W631GU6NB12I), y)
 CPPFLAGS += -DCONFIG_DDR3 -DCONFIG_DDR3_SPEED_BIN_1600K -DCONFIG_DDR_1_GBIT
 endif
 ifeq ($(CONFIG_DDR_IS43LD16128B_25BLI), y)
diff --git a/include/ddr_device.h b/include/ddr_device.h
@@ -139,8 +139,8 @@ static const struct ddram_timings ddr_ddram_timings = {
 	#error "No CLK setting defined"
 #endif /* Endif of CONFIG_BUS_SPEED_200MHZ */
 
-#elif defined(CONFIG_DDR_W631GU6NG)
-/* DDR3L (W631GU6NG = 8 Mbit x 16 x 8 banks), total 1Gbit on SAM9X75-SIP */
+#elif defined(CONFIG_DDR_W631GU6NB12I)
+/* DDR3L (W631GU6NB12I = 8 Mbit x 16 x 8 banks), total 1Gbit on SAM9X75-SIP */
 #if defined(CONFIG_BUS_SPEED_200MHZ)
 	.tras = 7,
 	.trcd = 3,
