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lines changed Original file line number Diff line number Diff line change 1+ # Copyright (C) 2025 Microchip Technology Inc. and its subsidiaries
2+ #
3+ # SPDX-License-Identifier: MIT
4+
5+ CONFIG_SAMA7D65=y
6+ CONFIG_CPU_CLK_800MHZ=y
7+ CONFIG_DEBUG=y
8+ CONFIG_CONSOLE_INDEX=19
9+ CONFIG_DDR_SET_BY_DEVICE=y
10+ CONFIG_DDR_W638GU6QB12=y
11+ CONFIG_DDR_8_GBIT=y
12+ CONFIG_MEM_CLOCK_533=y
13+ CONFIG_NANDFLASH=y
14+ CONFIG_JUMP_ADDR="0x66f00000"
15+ CONFIG_IMG_SIZE="0x000d0000"
16+ # CONFIG_REDIRECT_ALL_INTS_AIC is not set
17+ CONFIG_TZC400=y
18+ CONFIG_BACKUP_MODE=y
19+ CONFIG_MCP16502=y
20+ CONFIG_MCP16502_SET_VOLTAGE=y
21+ CONFIG_PMIC_ON_TWI=0
22+ CONFIG_VOLTAGE_OUT4=1150
23+ CONFIG_LED_ON_BOARD=y
24+ CONFIG_LED_R_ON_PIOA=y
25+ CONFIG_LED_R_PIN=21
26+ CONFIG_LED_G_ON_PIOB=y
27+ CONFIG_LED_G_PIN=15
28+ CONFIG_LED_B_ON_PIOB=y
29+ CONFIG_LED_B_PIN=17
30+ CONFIG_FLEXCOM10=y
31+ CONFIG_FLEXCOM10_IOSET=1
32+ CONFIG_WDTS=y
33+ CONFIG_SHDWC=y
Original file line number Diff line number Diff line change 1+ # Copyright (C) 2025 Microchip Technology Inc. and its subsidiaries
2+ #
3+ # SPDX-License-Identifier: MIT
4+
5+ CONFIG_SAMA7D65=y
6+ CONFIG_CPU_CLK_800MHZ=y
7+ CONFIG_DEBUG=y
8+ CONFIG_CONSOLE_INDEX=19
9+ CONFIG_DDR_SET_BY_DEVICE=y
10+ CONFIG_DDR_W638GU6QB12=y
11+ CONFIG_DDR_8_GBIT=y
12+ CONFIG_MEM_CLOCK_533=y
13+ CONFIG_SDCARD=y
14+ CONFIG_SDHC1=y
15+ CONFIG_JUMP_ADDR="0x66f00000"
16+ # CONFIG_REDIRECT_ALL_INTS_AIC is not set
17+ CONFIG_TZC400=y
18+ CONFIG_BACKUP_MODE=y
19+ CONFIG_MCP16502=y
20+ CONFIG_MCP16502_SET_VOLTAGE=y
21+ CONFIG_PMIC_ON_TWI=0
22+ CONFIG_VOLTAGE_OUT4=1150
23+ CONFIG_LED_ON_BOARD=y
24+ CONFIG_LED_R_ON_PIOA=y
25+ CONFIG_LED_R_PIN=21
26+ CONFIG_LED_G_ON_PIOB=y
27+ CONFIG_LED_G_PIN=15
28+ CONFIG_LED_B_ON_PIOB=y
29+ CONFIG_LED_B_PIN=17
30+ CONFIG_FLEXCOM10=y
31+ CONFIG_FLEXCOM10_IOSET=1
32+ CONFIG_WDTS=y
33+ CONFIG_SHDWC=y
Original file line number Diff line number Diff line change 1+ # Copyright (C) 2025 Microchip Technology Inc. and its subsidiaries
2+ #
3+ # SPDX-License-Identifier: MIT
4+
5+ CONFIG_INIT_AND_STOP=y
6+ CONFIG_SAMA7D65=y
7+ CONFIG_CPU_CLK_800MHZ=y
8+ CONFIG_DEBUG=y
9+ CONFIG_CONSOLE_INDEX=19
10+ CONFIG_DDR_SET_BY_DEVICE=y
11+ CONFIG_DDR_W638GU6QB12=y
12+ CONFIG_DDR_8_GBIT=y
13+ CONFIG_MEM_CLOCK_533=y
14+ # CONFIG_REDIRECT_ALL_INTS_AIC is not set
15+ CONFIG_TZC400=y
16+ CONFIG_MCP16502=y
17+ CONFIG_MCP16502_SET_VOLTAGE=y
18+ CONFIG_PMIC_ON_TWI=0
19+ CONFIG_VOLTAGE_OUT4=1150
20+ CONFIG_LED_ON_BOARD=y
21+ CONFIG_LED_R_ON_PIOA=y
22+ CONFIG_LED_R_PIN=21
23+ CONFIG_LED_G_ON_PIOB=y
24+ CONFIG_LED_G_PIN=15
25+ CONFIG_LED_B_ON_PIOB=y
26+ CONFIG_LED_B_PIN=17
27+ CONFIG_FLEXCOM10=y
28+ CONFIG_FLEXCOM10_IOSET=1
29+ CONFIG_WDTS=y
Original file line number Diff line number Diff line change 1+ # Copyright (C) 2025 Microchip Technology Inc. and its subsidiaries
2+ #
3+ # SPDX-License-Identifier: MIT
4+ CONFIG_SAMA7D65=y
5+ CONFIG_CPU_CLK_800MHZ=y
6+ CONFIG_DEBUG=y
7+ CONFIG_CONSOLE_INDEX=19
8+ CONFIG_DDR_SET_BY_DEVICE=y
9+ CONFIG_DDR_W638GU6QB12=y
10+ CONFIG_DDR_8_GBIT=y
11+ CONFIG_MEM_CLOCK_533=y
12+ CONFIG_SPI_CLK=50000000
13+ CONFIG_QSPI=y
14+ CONFIG_IMG_ADDRESS="0x00040000"
15+ CONFIG_JUMP_ADDR="0x66f00000"
16+ CONFIG_IMG_SIZE="0x000c0000"
17+ # CONFIG_REDIRECT_ALL_INTS_AIC is not set
18+ CONFIG_TZC400=y
19+ CONFIG_MCP16502=y
20+ CONFIG_MCP16502_SET_VOLTAGE=y
21+ CONFIG_PMIC_ON_TWI=0
22+ CONFIG_VOLTAGE_OUT4=1150
23+ CONFIG_LED_ON_BOARD=y
24+ CONFIG_LED_R_ON_PIOA=y
25+ CONFIG_LED_R_PIN=21
26+ CONFIG_LED_G_ON_PIOB=y
27+ CONFIG_LED_G_PIN=15
28+ CONFIG_LED_B_ON_PIOB=y
29+ CONFIG_LED_B_PIN=17
30+ CONFIG_FLEXCOM10=y
31+ CONFIG_FLEXCOM10_IOSET=1
32+ CONFIG_WDTS=y
Original file line number Diff line number Diff line change 1+ # Copyright (C) 2025 Microchip Technology Inc. and its subsidiaries
2+ #
3+ # SPDX-License-Identifier: MIT
4+
5+ CONFIG_SAMA7D65=y
6+ CONFIG_CPU_CLK_800MHZ=y
7+ CONFIG_DEBUG=y
8+ CONFIG_CONSOLE_INDEX=19
9+ CONFIG_DDR_SET_BY_DEVICE=y
10+ CONFIG_DDR_W638GU6QB12=y
11+ CONFIG_DDR_8_GBIT=y
12+ CONFIG_MEM_CLOCK_533=y
13+ CONFIG_NANDFLASH=y
14+ CONFIG_JUMP_ADDR="0x66f00000"
15+ CONFIG_IMG_SIZE="0x000d0000"
16+ # CONFIG_REDIRECT_ALL_INTS_AIC is not set
17+ CONFIG_TZC400=y
18+ CONFIG_MCP16502=y
19+ CONFIG_MCP16502_SET_VOLTAGE=y
20+ CONFIG_PMIC_ON_TWI=0
21+ CONFIG_VOLTAGE_OUT4=1150
22+ CONFIG_LED_ON_BOARD=y
23+ CONFIG_LED_R_ON_PIOA=y
24+ CONFIG_LED_R_PIN=21
25+ CONFIG_LED_G_ON_PIOB=y
26+ CONFIG_LED_G_PIN=15
27+ CONFIG_LED_B_ON_PIOB=y
28+ CONFIG_LED_B_PIN=17
29+ CONFIG_FLEXCOM10=y
30+ CONFIG_FLEXCOM10_IOSET=1
31+ CONFIG_WDTS=y
Original file line number Diff line number Diff line change 1+ # Copyright (C) 2025 Microchip Technology Inc. and its subsidiaries
2+ #
3+ # SPDX-License-Identifier: MIT
4+
5+ CONFIG_SAMA7D65=y
6+ CONFIG_CPU_CLK_800MHZ=y
7+ CONFIG_DEBUG=y
8+ CONFIG_CONSOLE_INDEX=19
9+ CONFIG_DDR_SET_BY_DEVICE=y
10+ CONFIG_DDR_W638GU6QB12=y
11+ CONFIG_DDR_8_GBIT=y
12+ CONFIG_MEM_CLOCK_533=y
13+ CONFIG_SDCARD=y
14+ CONFIG_SDHC1=y
15+ CONFIG_JUMP_ADDR="0x66f00000"
16+ # CONFIG_REDIRECT_ALL_INTS_AIC is not set
17+ CONFIG_TZC400=y
18+ CONFIG_MCP16502=y
19+ CONFIG_MCP16502_SET_VOLTAGE=y
20+ CONFIG_PMIC_ON_TWI=0
21+ CONFIG_VOLTAGE_OUT4=1150
22+ CONFIG_LED_ON_BOARD=y
23+ CONFIG_LED_R_ON_PIOA=y
24+ CONFIG_LED_R_PIN=21
25+ CONFIG_LED_G_ON_PIOB=y
26+ CONFIG_LED_G_PIN=15
27+ CONFIG_LED_B_ON_PIOB=y
28+ CONFIG_LED_B_PIN=17
29+ CONFIG_FLEXCOM10=y
30+ CONFIG_FLEXCOM10_IOSET=1
31+ CONFIG_WDTS=y
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