File tree Expand file tree Collapse file tree 5 files changed +212
-0
lines changed Expand file tree Collapse file tree 5 files changed +212
-0
lines changed Original file line number Diff line number Diff line change 1+ # Copyright (C) 2023 Microchip Technology Inc. and its subsidiaries
2+ #
3+ # SPDX-License-Identifier: MIT
4+
5+ CONFIG_CRYSTAL_24_000MHZ=y
6+ CONFIG_CONSOLE_INDEX=0
7+ CONFIG_DEBUG=y
8+ CONFIG_DDR_SET_BY_DEVICE=y
9+ CONFIG_DDR_AS4C128M32MD2A=y
10+ CONFIG_SDCARD=y
11+ CONFIG_BACKUP_MODE=y
12+ CONFIG_FAST_BOOT=y
13+ CONFIG_FASTBOOT_MEM_MAP_ADDRESS=0xC0000000
14+ CONFIG_FASTBOOT_MAX_NB_MEM_MAP=0x20000
15+ CONFIG_FASTBOOT_SIZEOF_PAGE_STRU=0x24
16+ CONFIG_FASTBOOT_OFFSET_OF_PAGETYPE=0x18
17+ CONFIG_FASTBOOT_OFFSET_OF_PRIVATE=0x14
18+ CONFIG_FASTBOOT_SD_PARTITION=3
19+ CONFIG_LED_ON_BOARD=y
20+ CONFIG_LED_R_ON_PIOA=y
21+ CONFIG_LED_R_PIN=7
22+ CONFIG_LED_G_ON_PIOA=y
23+ CONFIG_LED_G_PIN=8
24+ CONFIG_LED_B_ON_PIOA=y
25+ CONFIG_LED_B_PIN=9
Original file line number Diff line number Diff line change 1+ # Copyright (C) 2022 Microchip Technology Inc. and its subsidiaries
2+ #
3+ # SPDX-License-Identifier: MIT
4+
5+ CONFIG_SAMA7D65=y
6+ CONFIG_CPU_CLK_800MHZ=y
7+ CONFIG_DEBUG=y
8+ CONFIG_CONSOLE_INDEX=19
9+ CONFIG_DDR_SET_BY_DEVICE=y
10+ CONFIG_DDR_AS4C512M16D3LA_10BIN=y
11+ CONFIG_DDR_8_GBIT=y
12+ CONFIG_MEM_CLOCK_533=y
13+ CONFIG_NANDFLASH=y
14+ CONFIG_NAND_TIMING_MODE=y
15+ CONFIG_NAND_DMA_SUPPORT=y
16+ CONFIG_JUMP_ADDR="0x66f00000"
17+ CONFIG_IMG_SIZE="0x000d0000"
18+ # CONFIG_REDIRECT_ALL_INTS_AIC is not set
19+ CONFIG_TZC400=y
20+ CONFIG_MCP16502=y
21+ CONFIG_MCP16502_SET_VOLTAGE=y
22+ CONFIG_PMIC_ON_TWI=0
23+ CONFIG_VOLTAGE_OUT4=1150
24+ CONFIG_BACKUP_MODE=y
25+ CONFIG_SHDWC=y
26+ CONFIG_FAST_BOOT=y
27+ CONFIG_FASTBOOT_MEM_MAP_ADDRESS=0xC0000000
28+ CONFIG_FASTBOOT_MAX_NB_MEM_MAP=0x40000
29+ CONFIG_FASTBOOT_SIZEOF_PAGE_STRUCT=0x20
30+ CONFIG_FASTBOOT_OFFSET_OF_PAGETYPE=0x18
31+ CONFIG_FASTBOOT_OFFSET_OF_PRIVATE=0x14
32+ CONFIG_FASTBOOT_IMG_ADDRESS=0x10000000
33+ CONFIG_LED_ON_BOARD=y
34+ CONFIG_LED_R_ON_PIOA=y
35+ CONFIG_LED_R_PIN=21
36+ CONFIG_LED_G_ON_PIOB=y
37+ CONFIG_LED_G_PIN=15
38+ CONFIG_LED_B_ON_PIOB=y
39+ CONFIG_LED_B_PIN=17
40+ CONFIG_FLEXCOM10=y
41+ CONFIG_FLEXCOM10_IOSET=1
42+ CONFIG_WDTS=y
Original file line number Diff line number Diff line change 1+ # Copyright (C) 2006 Microchip Technology Inc. and its subsidiaries
2+ #
3+ # SPDX-License-Identifier: MIT
4+
5+ CONFIG_SAMA7D65=y
6+ CONFIG_CPU_CLK_800MHZ=y
7+ CONFIG_DEBUG=y
8+ CONFIG_CONSOLE_INDEX=19
9+ CONFIG_DDR_SET_BY_DEVICE=y
10+ CONFIG_DDR_AS4C512M16D3LA_10BIN=y
11+ CONFIG_DDR_8_GBIT=y
12+ CONFIG_MEM_CLOCK_533=y
13+ CONFIG_SDCARD=y
14+ CONFIG_SDHC1=y
15+ CONFIG_JUMP_ADDR="0x66f00000"
16+ # CONFIG_REDIRECT_ALL_INTS_AIC is not set
17+ CONFIG_TZC400=y
18+ CONFIG_MCP16502=y
19+ CONFIG_MCP16502_SET_VOLTAGE=y
20+ CONFIG_BACKUP_MODE=y
21+ CONFIG_FAST_BOOT=y
22+ CONFIG_FASTBOOT_MEM_MAP_ADDRESS=0xC0000000
23+ CONFIG_FASTBOOT_MAX_NB_MEM_MAP=0x40000
24+ CONFIG_FASTBOOT_SIZEOF_PAGE_STRU=0x20
25+ CONFIG_FASTBOOT_OFFSET_OF_PAGETYPE=0x18
26+ CONFIG_FASTBOOT_OFFSET_OF_PRIVATE=0x14
27+ CONFIG_FASTBOOT_SD_PARTITION=3
28+ CONFIG_SHDWC=y
29+ CONFIG_PMIC_ON_TWI=0
30+ CONFIG_VOLTAGE_OUT4=1150
31+ CONFIG_LED_ON_BOARD=y
32+ CONFIG_LED_R_ON_PIOA=y
33+ CONFIG_LED_R_PIN=21
34+ CONFIG_LED_G_ON_PIOB=y
35+ CONFIG_LED_G_PIN=15
36+ CONFIG_LED_B_ON_PIOB=y
37+ CONFIG_LED_B_PIN=17
38+ CONFIG_FLEXCOM10=y
39+ CONFIG_FLEXCOM10_IOSET=1
40+ CONFIG_WDTS=y
41+
42+
43+
44+
45+
46+
47+
48+
49+
50+
51+
52+
53+
54+
Original file line number Diff line number Diff line change 1+ # Copyright (C) 2021 Microchip Technology Inc. and its subsidiaries
2+ #
3+ # SPDX-License-Identifier: MIT
4+
5+ CONFIG_SAMA7G5=y
6+ CONFIG_CPU_CLK_800MHZ=y
7+ CONFIG_DEBUG=y
8+ CONFIG_DDR_SET_BY_DEVICE=y
9+ CONFIG_DDR_AS4C256M16D3LC_12BCNTR=y
10+ CONFIG_MEM_CLOCK_533=y
11+ CONFIG_SPI_CLK=133333334
12+ CONFIG_AT91_QSPI_OCTAL=y
13+ CONFIG_QSPI_4B_OPCODES=y
14+ CONFIG_QSPI_OCTAL_IO=y
15+ CONFIG_QSPI_DTR_ENABLE=y
16+ CONFIG_QSPI_DMA_SUPPORT=y
17+ CONFIG_IMG_ADDRESS="0x00040000"
18+ CONFIG_JUMP_ADDR="0x66f00000"
19+ CONFIG_IMG_SIZE="0x000c0000"
20+ # CONFIG_REDIRECT_ALL_INTS_AIC is not set
21+ CONFIG_TZC400=y
22+ CONFIG_BACKUP_MODE=y
23+ CONFIG_SHDWC=y
24+ CONFIG_FAST_BOOT=y
25+ CONFIG_FASTBOOT_MEM_MAP_ADDRESS=0xC0000000
26+ CONFIG_FASTBOOT_MAX_NB_MEM_MAP=0x20000
27+ CONFIG_FASTBOOT_SIZEOF_PAGE_STRUCT=0x20
28+ CONFIG_FASTBOOT_OFFSET_OF_PAGETYPE=0x18
29+ CONFIG_FASTBOOT_OFFSET_OF_PRIVATE=0x14
30+ CONFIG_FASTBOOT_IMG_ADDRESS=0x00800000
31+ CONFIG_LED_ON_BOARD=y
32+ CONFIG_LED_R_ON_PIOB=y
33+ CONFIG_LED_R_PIN=8
34+ CONFIG_LED_G_ON_PIOA=y
35+ CONFIG_LED_G_PIN=13
36+ CONFIG_LED_B_ON_PIOD=y
37+ CONFIG_LED_B_PIN=20
38+ CONFIG_FLEXCOM1=y
39+ CONFIG_FLEXCOM1_IOSET=4
40+ CONFIG_MCP16502=y
41+ CONFIG_MCP16502_SET_VOLTAGE=y
42+ CONFIG_VOLTAGE_OUT1=3300
43+ CONFIG_VOLTAGE_OUT2=1350
44+ CONFIG_VOLTAGE_OUT3=1150
45+ CONFIG_VOLTAGE_OUT4=1150
46+ CONFIG_VOLTAGE_LDO1=1800
47+ CONFIG_VOLTAGE_LDO2=1800
48+ CONFIG_WDTS=y
Original file line number Diff line number Diff line change 1+ # Copyright (C) 2006 Microchip Technology Inc. and its subsidiaries
2+ #
3+ # SPDX-License-Identifier: MIT
4+
5+ CONFIG_SAMA7G5=y
6+ CONFIG_CPU_CLK_800MHZ=y
7+ CONFIG_DEBUG=y
8+ CONFIG_DDR_SET_BY_DEVICE=y
9+ CONFIG_DDR_AS4C256M16D3LC_12BCNTR=y
10+ CONFIG_MEM_CLOCK_533=y
11+ CONFIG_SDCARD=y
12+ CONFIG_SDHC1=y
13+ CONFIG_JUMP_ADDR="0x66f00000"
14+ # CONFIG_REDIRECT_ALL_INTS_AIC is not set
15+ CONFIG_TZC400=y
16+ CONFIG_BACKUP_MODE=y
17+ CONFIG_FAST_BOOT=y
18+ CONFIG_FASTBOOT_MEM_MAP_ADDRESS=0xC0000000
19+ CONFIG_FASTBOOT_MAX_NB_MEM_MAP=0x20000
20+ CONFIG_FASTBOOT_SIZEOF_PAGE_STRU=0x20
21+ CONFIG_FASTBOOT_OFFSET_OF_PAGETYPE=0x18
22+ CONFIG_FASTBOOT_OFFSET_OF_PRIVATE=0x14
23+ CONFIG_FASTBOOT_SD_PARTITION=3
24+ CONFIG_SHDWC=y
25+ CONFIG_BOARD_QUIRK_SAMA7G5_EK=y
26+ CONFIG_LED_ON_BOARD=y
27+ CONFIG_LED_R_ON_PIOB=y
28+ CONFIG_LED_R_PIN=8
29+ CONFIG_LED_G_ON_PIOA=y
30+ CONFIG_LED_G_PIN=13
31+ CONFIG_LED_B_ON_PIOD=y
32+ CONFIG_LED_B_PIN=20
33+ CONFIG_FLEXCOM1=y
34+ CONFIG_FLEXCOM1_IOSET=4
35+ CONFIG_MCP16502=y
36+ CONFIG_MCP16502_SET_VOLTAGE=y
37+ CONFIG_VOLTAGE_OUT1=3300
38+ CONFIG_VOLTAGE_OUT2=1350
39+ CONFIG_VOLTAGE_OUT3=1150
40+ CONFIG_VOLTAGE_OUT4=1150
41+ CONFIG_VOLTAGE_LDO1=1800
42+ CONFIG_VOLTAGE_LDO2=1800
43+ CONFIG_WDTS=y
You can’t perform that action at this time.
0 commit comments