diff --git a/.gitmodules b/.gitmodules index dd91377..bcae734 100644 --- a/.gitmodules +++ b/.gitmodules @@ -1,3 +1,4 @@ -[submodule "litex/data/cpu/vexriscv/verilog/ext/VexRiscv"] +[submodule "pythondata_cpu_vexriscv/verilog/ext/VexRiscv"] path = pythondata_cpu_vexriscv/verilog/ext/VexRiscv url = https://github.com/SpinalHDL/VexRiscv.git + branch = master diff --git a/pythondata_cpu_vexriscv/verilog/.gitignore b/pythondata_cpu_vexriscv/verilog/.gitignore deleted file mode 100644 index 5d70b87..0000000 --- a/pythondata_cpu_vexriscv/verilog/.gitignore +++ /dev/null @@ -1,34 +0,0 @@ -*.class -*.log -*.bak - -# sbt specific -.cache/ -.history/ -.lib/ -dist/* -target -lib_managed/ -src_managed/ -project/boot/ -project/plugins/project/ - -# Scala-IDE specific -.scala_dependencies -.worksheet - -.idea -out - -# Eclipse -bin/ -.classpath -.project -.settings -.cache-main - -#User -*.cf -*.json -*.vcd - diff --git a/pythondata_cpu_vexriscv/verilog/.gitmodules b/pythondata_cpu_vexriscv/verilog/.gitmodules deleted file mode 100644 index 2cef907..0000000 --- a/pythondata_cpu_vexriscv/verilog/.gitmodules +++ /dev/null @@ -1,3 +0,0 @@ -[submodule "ext/VexRiscv"] - path = ext/VexRiscv - url = ../../SpinalHDL/VexRiscv.git diff --git a/pythondata_cpu_vexriscv/verilog/Makefile b/pythondata_cpu_vexriscv/verilog/Makefile index cb4468a..73dad30 100644 --- a/pythondata_cpu_vexriscv/verilog/Makefile +++ b/pythondata_cpu_vexriscv/verilog/Makefile @@ -1,6 +1,6 @@ SRC := ${shell find . -type f -name \*.scala} -all: VexRiscv.v VexRiscv_Debug.v VexRiscv_Lite.v VexRiscv_LiteDebug.v VexRiscv_IMAC.v VexRiscv_IMACDebug.v VexRiscv_Min.v VexRiscv_MinDebug.v VexRiscv_Full.v VexRiscv_FullDebug.v VexRiscv_FullCfu.v VexRiscv_FullCfuDebug.v VexRiscv_Linux.v VexRiscv_LinuxDebug.v VexRiscv_LinuxNoDspFmax.v VexRiscv_Secure.v VexRiscv_SecureDebug.v +all: VexRiscv.v VexRiscv_Debug.v VexRiscv_Lite.v VexRiscv_LiteDebug.v VexRiscv_IMAC.v VexRiscv_IMACDebug.v VexRiscv_Min.v VexRiscv_MinDebug.v VexRiscv_Full.v VexRiscv_FullDebug.v VexRiscv_FullCfu.v VexRiscv_FullCfuDebug.v VexRiscv_Linux.v VexRiscv_LinuxDebug.v VexRiscv_LinuxNoDspFmax.v VexRiscv_Secure.v VexRiscv_SecureDebug.v VexRiscv_SlimCfu.v VexRiscv_SlimCfuDebug.v VexRiscv_Fomu.v VexRiscv_FomuCfu.v VexRiscv_PerfCfu.v VexRiscv_PerfCfuDebug.v VexRiscv_SlimPerfCfu.v VexRiscv_SlimPerfCfuDebug.v VexRiscv.v: $(SRC) sbt compile "runMain vexriscv.GenCoreDefault" @@ -26,6 +26,12 @@ VexRiscv_Min.v: $(SRC) VexRiscv_MinDebug.v: $(SRC) sbt compile "runMain vexriscv.GenCoreDefault -d --iCacheSize 0 --dCacheSize 0 --mulDiv false --singleCycleShift false --singleCycleMulDiv false --bypass false --prediction none --outputFile VexRiscv_MinDebug" +VexRiscv_Fomu.v: $(SRC) + sbt compile "runMain vexriscv.GenCoreDefault --safe false --iCacheSize 2048 --dCacheSize 0 --csrPluginConfig mcycle --mulDiv true --singleCycleShift true --singleCycleMulDiv true --bypass false --prediction none --hardwareDiv false --outputFile VexRiscv_Fomu" + +VexRiscv_FomuCfu.v: $(SRC) + sbt compile "runMain vexriscv.GenCoreDefault --safe false --cfu true --iCacheSize 2048 --dCacheSize 0 --csrPluginConfig mcycle --mulDiv true --singleCycleShift true --singleCycleMulDiv true --bypass false --prediction none --hardwareDiv false --outputFile VexRiscv_FomuCfu" + VexRiscv_Full.v: $(SRC) sbt compile "runMain vexriscv.GenCoreDefault --csrPluginConfig all --outputFile VexRiscv_Full" @@ -33,10 +39,31 @@ VexRiscv_FullDebug.v: $(SRC) sbt compile "runMain vexriscv.GenCoreDefault --csrPluginConfig all -d --outputFile VexRiscv_FullDebug" VexRiscv_FullCfu.v: $(SRC) - sbt compile "runMain vexriscv.GenCoreDefault --csrPluginConfig all --cfu true --outputFile VexRiscv_FullCfu" + sbt compile "runMain vexriscv.GenCoreDefault --dCacheSize 8192 --iCacheSize 8192 --csrPluginConfig all --cfu true --outputFile VexRiscv_FullCfu" VexRiscv_FullCfuDebug.v: $(SRC) - sbt compile "runMain vexriscv.GenCoreDefault --csrPluginConfig all --cfu true -d --outputFile VexRiscv_FullCfuDebug" + sbt compile "runMain vexriscv.GenCoreDefault --dCacheSize 8192 --iCacheSize 8192 --csrPluginConfig all -d --cfu true --outputFile VexRiscv_FullCfuDebug" + +VexRiscv_PerfCfu.v: $(SRC) + sbt compile "runMain vexriscv.GenCoreDefault --dCacheSize 8192 --iCacheSize 8192 --csrPluginConfig all --cfu true --perfCSRs 8 --outputFile VexRiscv_PerfCfu" + +VexRiscv_PerfCfuDebug.v: $(SRC) + sbt compile "runMain vexriscv.GenCoreDefault --dCacheSize 8192 --iCacheSize 8192 --csrPluginConfig all -d --cfu true --perfCSRs 8 --outputFile VexRiscv_PerfCfuDebug" + +VexRiscv_Slim.v: $(SRC) + sbt compile "runMain vexriscv.GenCoreDefault --dCacheSize 4096 --iCacheSize 2048 --csrPluginConfig all --outputFile VexRiscv_Slim" + +VexRiscv_SlimCfu.v: $(SRC) + sbt compile "runMain vexriscv.GenCoreDefault --dCacheSize 4096 --iCacheSize 2048 --csrPluginConfig all --cfu true --outputFile VexRiscv_SlimCfu" + +VexRiscv_SlimCfuDebug.v: $(SRC) + sbt compile "runMain vexriscv.GenCoreDefault --dCacheSize 4096 --iCacheSize 2048 --csrPluginConfig all -d --cfu true --outputFile VexRiscv_SlimCfuDebug" + +VexRiscv_SlimPerfCfu.v: $(SRC) + sbt compile "runMain vexriscv.GenCoreDefault --dCacheSize 4096 --iCacheSize 2048 --csrPluginConfig all --cfu true --perfCSRs 8 --outputFile VexRiscv_SlimPerfCfu" + +VexRiscv_SlimPerfCfuDebug.v: $(SRC) + sbt compile "runMain vexriscv.GenCoreDefault --dCacheSize 4096 --iCacheSize 2048 --csrPluginConfig all -d --cfu true --perfCSRs 8 --outputFile VexRiscv_SlimPerfCfuDebug" VexRiscv_Linux.v: $(SRC) sbt compile "runMain vexriscv.GenCoreDefault --csrPluginConfig linux-minimal --outputFile VexRiscv_Linux" diff --git a/pythondata_cpu_vexriscv/verilog/README.md b/pythondata_cpu_vexriscv/verilog/README.md index 544daea..2152459 100644 --- a/pythondata_cpu_vexriscv/verilog/README.md +++ b/pythondata_cpu_vexriscv/verilog/README.md @@ -17,6 +17,16 @@ src/main/scala/vexriscv GenCoreDefault.scala - Available in normal an -Debug, with the Debug bus exposed +## Changes in `tcal-x`'s fork + +- Now submodule ext/VexRiscv uses tip of `dev` branch +- Added ext/SpinalHDL submodule, also `dev` branch +- Modified `build.sbt` to bring up to date with current `dev` VexRiscv +- Modified `src/main/scala/vexriscv/GenCoreDefault.scala` to add a `--cfu` option, to add the CFU interface +- Added `VexRiscv_FullCfu.v` and `VexRiscv_FullCfuDebug.v` (and yamls), and updated `Makefile` to build them +- I did **not** rebuild the other .v/.yaml files + + ## Requirements - Java 8 diff --git a/pythondata_cpu_vexriscv/verilog/VexRiscv.v b/pythondata_cpu_vexriscv/verilog/VexRiscv.v index 89cc312..59cf28d 100644 --- a/pythondata_cpu_vexriscv/verilog/VexRiscv.v +++ b/pythondata_cpu_vexriscv/verilog/VexRiscv.v @@ -1,6 +1,6 @@ // Generator : SpinalHDL v1.6.0 git head : 73c8d8e2b86b45646e9d0b2e729291f2b65e6be3 // Component : VexRiscv -// Git hash : 6276bf628be9d0a58c0284dca83137b71ef29098 +// Git hash : 593e180abf5ba39e7fa33d4f371646453f84496a `define EnvCtrlEnum_binary_sequential_type [1:0] diff --git a/pythondata_cpu_vexriscv/verilog/VexRiscv_Debug.v b/pythondata_cpu_vexriscv/verilog/VexRiscv_Debug.v index fa4c6ec..27d99db 100644 --- a/pythondata_cpu_vexriscv/verilog/VexRiscv_Debug.v +++ b/pythondata_cpu_vexriscv/verilog/VexRiscv_Debug.v @@ -1,6 +1,6 @@ // Generator : SpinalHDL v1.6.0 git head : 73c8d8e2b86b45646e9d0b2e729291f2b65e6be3 // Component : VexRiscv -// Git hash : 6276bf628be9d0a58c0284dca83137b71ef29098 +// Git hash : 593e180abf5ba39e7fa33d4f371646453f84496a `define EnvCtrlEnum_binary_sequential_type [1:0] diff --git a/pythondata_cpu_vexriscv/verilog/VexRiscv_Fomu.v b/pythondata_cpu_vexriscv/verilog/VexRiscv_Fomu.v new file mode 100644 index 0000000..e637b47 --- /dev/null +++ b/pythondata_cpu_vexriscv/verilog/VexRiscv_Fomu.v @@ -0,0 +1,4522 @@ +// Generator : SpinalHDL v1.6.0 git head : 73c8d8e2b86b45646e9d0b2e729291f2b65e6be3 +// Component : VexRiscv +// Git hash : 593e180abf5ba39e7fa33d4f371646453f84496a + + +`define EnvCtrlEnum_binary_sequential_type [1:0] +`define EnvCtrlEnum_binary_sequential_NONE 2'b00 +`define EnvCtrlEnum_binary_sequential_XRET 2'b01 +`define EnvCtrlEnum_binary_sequential_ECALL 2'b10 + +`define BranchCtrlEnum_binary_sequential_type [1:0] +`define BranchCtrlEnum_binary_sequential_INC 2'b00 +`define BranchCtrlEnum_binary_sequential_B 2'b01 +`define BranchCtrlEnum_binary_sequential_JAL 2'b10 +`define BranchCtrlEnum_binary_sequential_JALR 2'b11 + +`define ShiftCtrlEnum_binary_sequential_type [1:0] +`define ShiftCtrlEnum_binary_sequential_DISABLE_1 2'b00 +`define ShiftCtrlEnum_binary_sequential_SLL_1 2'b01 +`define ShiftCtrlEnum_binary_sequential_SRL_1 2'b10 +`define ShiftCtrlEnum_binary_sequential_SRA_1 2'b11 + +`define AluBitwiseCtrlEnum_binary_sequential_type [1:0] +`define AluBitwiseCtrlEnum_binary_sequential_XOR_1 2'b00 +`define AluBitwiseCtrlEnum_binary_sequential_OR_1 2'b01 +`define AluBitwiseCtrlEnum_binary_sequential_AND_1 2'b10 + +`define AluCtrlEnum_binary_sequential_type [1:0] +`define AluCtrlEnum_binary_sequential_ADD_SUB 2'b00 +`define AluCtrlEnum_binary_sequential_SLT_SLTU 2'b01 +`define AluCtrlEnum_binary_sequential_BITWISE 2'b10 + +`define Src2CtrlEnum_binary_sequential_type [1:0] +`define Src2CtrlEnum_binary_sequential_RS 2'b00 +`define Src2CtrlEnum_binary_sequential_IMI 2'b01 +`define Src2CtrlEnum_binary_sequential_IMS 2'b10 +`define Src2CtrlEnum_binary_sequential_PC 2'b11 + +`define Src1CtrlEnum_binary_sequential_type [1:0] +`define Src1CtrlEnum_binary_sequential_RS 2'b00 +`define Src1CtrlEnum_binary_sequential_IMU 2'b01 +`define Src1CtrlEnum_binary_sequential_PC_INCREMENT 2'b10 +`define Src1CtrlEnum_binary_sequential_URS1 2'b11 + + +module VexRiscv ( + input [31:0] externalResetVector, + input timerInterrupt, + input softwareInterrupt, + input [31:0] externalInterruptArray, + output reg iBusWishbone_CYC, + output reg iBusWishbone_STB, + input iBusWishbone_ACK, + output iBusWishbone_WE, + output [29:0] iBusWishbone_ADR, + input [31:0] iBusWishbone_DAT_MISO, + output [31:0] iBusWishbone_DAT_MOSI, + output [3:0] iBusWishbone_SEL, + input iBusWishbone_ERR, + output [2:0] iBusWishbone_CTI, + output [1:0] iBusWishbone_BTE, + output dBusWishbone_CYC, + output dBusWishbone_STB, + input dBusWishbone_ACK, + output dBusWishbone_WE, + output [29:0] dBusWishbone_ADR, + input [31:0] dBusWishbone_DAT_MISO, + output [31:0] dBusWishbone_DAT_MOSI, + output reg [3:0] dBusWishbone_SEL, + input dBusWishbone_ERR, + output [2:0] dBusWishbone_CTI, + output [1:0] dBusWishbone_BTE, + input clk, + input reset +); + wire IBusCachedPlugin_cache_io_flush; + wire IBusCachedPlugin_cache_io_cpu_prefetch_isValid; + wire IBusCachedPlugin_cache_io_cpu_fetch_isValid; + wire IBusCachedPlugin_cache_io_cpu_fetch_isStuck; + wire IBusCachedPlugin_cache_io_cpu_fetch_isRemoved; + wire IBusCachedPlugin_cache_io_cpu_decode_isValid; + wire IBusCachedPlugin_cache_io_cpu_decode_isStuck; + wire IBusCachedPlugin_cache_io_cpu_decode_isUser; + reg IBusCachedPlugin_cache_io_cpu_fill_valid; + reg [31:0] _zz_RegFilePlugin_regFile_port0; + reg [31:0] _zz_RegFilePlugin_regFile_port1; + wire IBusCachedPlugin_cache_io_cpu_prefetch_haltIt; + wire [31:0] IBusCachedPlugin_cache_io_cpu_fetch_data; + wire [31:0] IBusCachedPlugin_cache_io_cpu_fetch_physicalAddress; + wire IBusCachedPlugin_cache_io_cpu_decode_error; + wire IBusCachedPlugin_cache_io_cpu_decode_mmuRefilling; + wire IBusCachedPlugin_cache_io_cpu_decode_mmuException; + wire [31:0] IBusCachedPlugin_cache_io_cpu_decode_data; + wire IBusCachedPlugin_cache_io_cpu_decode_cacheMiss; + wire [31:0] IBusCachedPlugin_cache_io_cpu_decode_physicalAddress; + wire IBusCachedPlugin_cache_io_mem_cmd_valid; + wire [31:0] IBusCachedPlugin_cache_io_mem_cmd_payload_address; + wire [2:0] IBusCachedPlugin_cache_io_mem_cmd_payload_size; + wire [51:0] _zz_memory_MUL_LOW; + wire [51:0] _zz_memory_MUL_LOW_1; + wire [51:0] _zz_memory_MUL_LOW_2; + wire [51:0] _zz_memory_MUL_LOW_3; + wire [32:0] _zz_memory_MUL_LOW_4; + wire [51:0] _zz_memory_MUL_LOW_5; + wire [49:0] _zz_memory_MUL_LOW_6; + wire [51:0] _zz_memory_MUL_LOW_7; + wire [49:0] _zz_memory_MUL_LOW_8; + wire [31:0] _zz_execute_SHIFT_RIGHT; + wire [32:0] _zz_execute_SHIFT_RIGHT_1; + wire [32:0] _zz_execute_SHIFT_RIGHT_2; + wire [31:0] _zz_decode_LEGAL_INSTRUCTION; + wire [31:0] _zz_decode_LEGAL_INSTRUCTION_1; + wire [31:0] _zz_decode_LEGAL_INSTRUCTION_2; + wire _zz_decode_LEGAL_INSTRUCTION_3; + wire [0:0] _zz_decode_LEGAL_INSTRUCTION_4; + wire [13:0] _zz_decode_LEGAL_INSTRUCTION_5; + wire [31:0] _zz_decode_LEGAL_INSTRUCTION_6; + wire [31:0] _zz_decode_LEGAL_INSTRUCTION_7; + wire [31:0] _zz_decode_LEGAL_INSTRUCTION_8; + wire _zz_decode_LEGAL_INSTRUCTION_9; + wire [0:0] _zz_decode_LEGAL_INSTRUCTION_10; + wire [7:0] _zz_decode_LEGAL_INSTRUCTION_11; + wire [31:0] _zz_decode_LEGAL_INSTRUCTION_12; + wire [31:0] _zz_decode_LEGAL_INSTRUCTION_13; + wire [31:0] _zz_decode_LEGAL_INSTRUCTION_14; + wire _zz_decode_LEGAL_INSTRUCTION_15; + wire [0:0] _zz_decode_LEGAL_INSTRUCTION_16; + wire [1:0] _zz_decode_LEGAL_INSTRUCTION_17; + wire [1:0] _zz_IBusCachedPlugin_jump_pcLoad_payload_1; + wire [1:0] _zz_IBusCachedPlugin_jump_pcLoad_payload_2; + wire [31:0] _zz_IBusCachedPlugin_fetchPc_pc; + wire [2:0] _zz_IBusCachedPlugin_fetchPc_pc_1; + wire [31:0] _zz__zz_decode_IS_MUL; + wire [31:0] _zz__zz_decode_IS_MUL_1; + wire [31:0] _zz__zz_decode_IS_MUL_2; + wire _zz__zz_decode_IS_MUL_3; + wire [1:0] _zz__zz_decode_IS_MUL_4; + wire [31:0] _zz__zz_decode_IS_MUL_5; + wire [31:0] _zz__zz_decode_IS_MUL_6; + wire [31:0] _zz__zz_decode_IS_MUL_7; + wire [31:0] _zz__zz_decode_IS_MUL_8; + wire [1:0] _zz__zz_decode_IS_MUL_9; + wire _zz__zz_decode_IS_MUL_10; + wire _zz__zz_decode_IS_MUL_11; + wire [0:0] _zz__zz_decode_IS_MUL_12; + wire _zz__zz_decode_IS_MUL_13; + wire [21:0] _zz__zz_decode_IS_MUL_14; + wire [1:0] _zz__zz_decode_IS_MUL_15; + wire [31:0] _zz__zz_decode_IS_MUL_16; + wire [31:0] _zz__zz_decode_IS_MUL_17; + wire [31:0] _zz__zz_decode_IS_MUL_18; + wire [31:0] _zz__zz_decode_IS_MUL_19; + wire [1:0] _zz__zz_decode_IS_MUL_20; + wire _zz__zz_decode_IS_MUL_21; + wire [31:0] _zz__zz_decode_IS_MUL_22; + wire [31:0] _zz__zz_decode_IS_MUL_23; + wire [0:0] _zz__zz_decode_IS_MUL_24; + wire [0:0] _zz__zz_decode_IS_MUL_25; + wire [31:0] _zz__zz_decode_IS_MUL_26; + wire [1:0] _zz__zz_decode_IS_MUL_27; + wire [31:0] _zz__zz_decode_IS_MUL_28; + wire [31:0] _zz__zz_decode_IS_MUL_29; + wire [31:0] _zz__zz_decode_IS_MUL_30; + wire [31:0] _zz__zz_decode_IS_MUL_31; + wire [18:0] _zz__zz_decode_IS_MUL_32; + wire [0:0] _zz__zz_decode_IS_MUL_33; + wire [31:0] _zz__zz_decode_IS_MUL_34; + wire [0:0] _zz__zz_decode_IS_MUL_35; + wire _zz__zz_decode_IS_MUL_36; + wire [31:0] _zz__zz_decode_IS_MUL_37; + wire [31:0] _zz__zz_decode_IS_MUL_38; + wire [0:0] _zz__zz_decode_IS_MUL_39; + wire _zz__zz_decode_IS_MUL_40; + wire [15:0] _zz__zz_decode_IS_MUL_41; + wire [1:0] _zz__zz_decode_IS_MUL_42; + wire [31:0] _zz__zz_decode_IS_MUL_43; + wire [31:0] _zz__zz_decode_IS_MUL_44; + wire [31:0] _zz__zz_decode_IS_MUL_45; + wire [31:0] _zz__zz_decode_IS_MUL_46; + wire [1:0] _zz__zz_decode_IS_MUL_47; + wire _zz__zz_decode_IS_MUL_48; + wire [31:0] _zz__zz_decode_IS_MUL_49; + wire [31:0] _zz__zz_decode_IS_MUL_50; + wire [0:0] _zz__zz_decode_IS_MUL_51; + wire [12:0] _zz__zz_decode_IS_MUL_52; + wire [1:0] _zz__zz_decode_IS_MUL_53; + wire [31:0] _zz__zz_decode_IS_MUL_54; + wire [31:0] _zz__zz_decode_IS_MUL_55; + wire [1:0] _zz__zz_decode_IS_MUL_56; + wire _zz__zz_decode_IS_MUL_57; + wire [31:0] _zz__zz_decode_IS_MUL_58; + wire [0:0] _zz__zz_decode_IS_MUL_59; + wire _zz__zz_decode_IS_MUL_60; + wire [0:0] _zz__zz_decode_IS_MUL_61; + wire [1:0] _zz__zz_decode_IS_MUL_62; + wire [31:0] _zz__zz_decode_IS_MUL_63; + wire [31:0] _zz__zz_decode_IS_MUL_64; + wire [31:0] _zz__zz_decode_IS_MUL_65; + wire [31:0] _zz__zz_decode_IS_MUL_66; + wire [9:0] _zz__zz_decode_IS_MUL_67; + wire [0:0] _zz__zz_decode_IS_MUL_68; + wire [3:0] _zz__zz_decode_IS_MUL_69; + wire [31:0] _zz__zz_decode_IS_MUL_70; + wire [31:0] _zz__zz_decode_IS_MUL_71; + wire _zz__zz_decode_IS_MUL_72; + wire [31:0] _zz__zz_decode_IS_MUL_73; + wire [0:0] _zz__zz_decode_IS_MUL_74; + wire [31:0] _zz__zz_decode_IS_MUL_75; + wire [31:0] _zz__zz_decode_IS_MUL_76; + wire [0:0] _zz__zz_decode_IS_MUL_77; + wire [31:0] _zz__zz_decode_IS_MUL_78; + wire [31:0] _zz__zz_decode_IS_MUL_79; + wire [5:0] _zz__zz_decode_IS_MUL_80; + wire _zz__zz_decode_IS_MUL_81; + wire [31:0] _zz__zz_decode_IS_MUL_82; + wire [0:0] _zz__zz_decode_IS_MUL_83; + wire [31:0] _zz__zz_decode_IS_MUL_84; + wire [31:0] _zz__zz_decode_IS_MUL_85; + wire [2:0] _zz__zz_decode_IS_MUL_86; + wire _zz__zz_decode_IS_MUL_87; + wire [31:0] _zz__zz_decode_IS_MUL_88; + wire [0:0] _zz__zz_decode_IS_MUL_89; + wire [31:0] _zz__zz_decode_IS_MUL_90; + wire [31:0] _zz__zz_decode_IS_MUL_91; + wire [0:0] _zz__zz_decode_IS_MUL_92; + wire [31:0] _zz__zz_decode_IS_MUL_93; + wire [31:0] _zz__zz_decode_IS_MUL_94; + wire [5:0] _zz__zz_decode_IS_MUL_95; + wire _zz__zz_decode_IS_MUL_96; + wire _zz__zz_decode_IS_MUL_97; + wire [31:0] _zz__zz_decode_IS_MUL_98; + wire [0:0] _zz__zz_decode_IS_MUL_99; + wire [0:0] _zz__zz_decode_IS_MUL_100; + wire [0:0] _zz__zz_decode_IS_MUL_101; + wire [31:0] _zz__zz_decode_IS_MUL_102; + wire [31:0] _zz__zz_decode_IS_MUL_103; + wire [5:0] _zz__zz_decode_IS_MUL_104; + wire [3:0] _zz__zz_decode_IS_MUL_105; + wire _zz__zz_decode_IS_MUL_106; + wire [31:0] _zz__zz_decode_IS_MUL_107; + wire [0:0] _zz__zz_decode_IS_MUL_108; + wire [31:0] _zz__zz_decode_IS_MUL_109; + wire [31:0] _zz__zz_decode_IS_MUL_110; + wire [1:0] _zz__zz_decode_IS_MUL_111; + wire _zz__zz_decode_IS_MUL_112; + wire [3:0] _zz__zz_decode_IS_MUL_113; + wire _zz__zz_decode_IS_MUL_114; + wire _zz__zz_decode_IS_MUL_115; + wire [31:0] _zz__zz_decode_IS_MUL_116; + wire [0:0] _zz__zz_decode_IS_MUL_117; + wire [2:0] _zz__zz_decode_IS_MUL_118; + wire _zz__zz_decode_IS_MUL_119; + wire [0:0] _zz__zz_decode_IS_MUL_120; + wire [31:0] _zz__zz_decode_IS_MUL_121; + wire [0:0] _zz__zz_decode_IS_MUL_122; + wire [31:0] _zz__zz_decode_IS_MUL_123; + wire [2:0] _zz__zz_decode_IS_MUL_124; + wire [2:0] _zz__zz_decode_IS_MUL_125; + wire _zz__zz_decode_IS_MUL_126; + wire [0:0] _zz__zz_decode_IS_MUL_127; + wire [31:0] _zz__zz_decode_IS_MUL_128; + wire [0:0] _zz__zz_decode_IS_MUL_129; + wire [0:0] _zz__zz_decode_IS_MUL_130; + wire [1:0] _zz__zz_decode_IS_MUL_131; + wire [31:0] _zz__zz_decode_IS_MUL_132; + wire [31:0] _zz__zz_decode_IS_MUL_133; + wire [1:0] _zz__zz_decode_IS_MUL_134; + wire [0:0] _zz__zz_decode_IS_MUL_135; + wire [0:0] _zz__zz_decode_IS_MUL_136; + wire [31:0] _zz__zz_decode_IS_MUL_137; + wire [0:0] _zz__zz_decode_IS_MUL_138; + wire _zz_RegFilePlugin_regFile_port; + wire _zz_decode_RegFilePlugin_rs1Data; + wire _zz_RegFilePlugin_regFile_port_1; + wire _zz_decode_RegFilePlugin_rs2Data; + wire [0:0] _zz__zz_execute_REGFILE_WRITE_DATA; + wire [2:0] _zz__zz_execute_SRC1; + wire [4:0] _zz__zz_execute_SRC1_1; + wire [11:0] _zz__zz_execute_SRC2_3; + wire [31:0] _zz_execute_SrcPlugin_addSub; + wire [31:0] _zz_execute_SrcPlugin_addSub_1; + wire [31:0] _zz_execute_SrcPlugin_addSub_2; + wire [31:0] _zz_execute_SrcPlugin_addSub_3; + wire [31:0] _zz_execute_SrcPlugin_addSub_4; + wire [31:0] _zz_execute_SrcPlugin_addSub_5; + wire [31:0] _zz_execute_SrcPlugin_addSub_6; + wire [19:0] _zz__zz_execute_BranchPlugin_branch_src2; + wire [11:0] _zz__zz_execute_BranchPlugin_branch_src2_4; + wire [65:0] _zz_writeBack_MulPlugin_result; + wire [65:0] _zz_writeBack_MulPlugin_result_1; + wire [31:0] _zz__zz_lastStageRegFileWrite_payload_data; + wire [31:0] _zz__zz_lastStageRegFileWrite_payload_data_1; + wire [26:0] _zz_iBusWishbone_ADR_1; + wire [51:0] memory_MUL_LOW; + wire [31:0] memory_MEMORY_READ_DATA; + wire [33:0] memory_MUL_HH; + wire [33:0] execute_MUL_HH; + wire [33:0] execute_MUL_HL; + wire [33:0] execute_MUL_LH; + wire [31:0] execute_MUL_LL; + wire [31:0] execute_BRANCH_CALC; + wire execute_BRANCH_DO; + wire [31:0] execute_SHIFT_RIGHT; + wire [31:0] writeBack_REGFILE_WRITE_DATA; + wire [31:0] memory_REGFILE_WRITE_DATA; + wire [31:0] execute_REGFILE_WRITE_DATA; + wire [1:0] memory_MEMORY_ADDRESS_LOW; + wire [1:0] execute_MEMORY_ADDRESS_LOW; + wire decode_CSR_READ_OPCODE; + wire decode_CSR_WRITE_OPCODE; + wire decode_SRC2_FORCE_ZERO; + wire [31:0] decode_RS2; + wire [31:0] decode_RS1; + wire memory_IS_MUL; + wire execute_IS_MUL; + wire decode_IS_MUL; + wire `EnvCtrlEnum_binary_sequential_type _zz_memory_to_writeBack_ENV_CTRL; + wire `EnvCtrlEnum_binary_sequential_type _zz_memory_to_writeBack_ENV_CTRL_1; + wire `EnvCtrlEnum_binary_sequential_type _zz_execute_to_memory_ENV_CTRL; + wire `EnvCtrlEnum_binary_sequential_type _zz_execute_to_memory_ENV_CTRL_1; + wire `EnvCtrlEnum_binary_sequential_type decode_ENV_CTRL; + wire `EnvCtrlEnum_binary_sequential_type _zz_decode_ENV_CTRL; + wire `EnvCtrlEnum_binary_sequential_type _zz_decode_to_execute_ENV_CTRL; + wire `EnvCtrlEnum_binary_sequential_type _zz_decode_to_execute_ENV_CTRL_1; + wire decode_IS_CSR; + wire `BranchCtrlEnum_binary_sequential_type decode_BRANCH_CTRL; + wire `BranchCtrlEnum_binary_sequential_type _zz_decode_BRANCH_CTRL; + wire `BranchCtrlEnum_binary_sequential_type _zz_decode_to_execute_BRANCH_CTRL; + wire `BranchCtrlEnum_binary_sequential_type _zz_decode_to_execute_BRANCH_CTRL_1; + wire `ShiftCtrlEnum_binary_sequential_type _zz_execute_to_memory_SHIFT_CTRL; + wire `ShiftCtrlEnum_binary_sequential_type _zz_execute_to_memory_SHIFT_CTRL_1; + wire `ShiftCtrlEnum_binary_sequential_type decode_SHIFT_CTRL; + wire `ShiftCtrlEnum_binary_sequential_type _zz_decode_SHIFT_CTRL; + wire `ShiftCtrlEnum_binary_sequential_type _zz_decode_to_execute_SHIFT_CTRL; + wire `ShiftCtrlEnum_binary_sequential_type _zz_decode_to_execute_SHIFT_CTRL_1; + wire `AluBitwiseCtrlEnum_binary_sequential_type decode_ALU_BITWISE_CTRL; + wire `AluBitwiseCtrlEnum_binary_sequential_type _zz_decode_ALU_BITWISE_CTRL; + wire `AluBitwiseCtrlEnum_binary_sequential_type _zz_decode_to_execute_ALU_BITWISE_CTRL; + wire `AluBitwiseCtrlEnum_binary_sequential_type _zz_decode_to_execute_ALU_BITWISE_CTRL_1; + wire decode_SRC_LESS_UNSIGNED; + wire `AluCtrlEnum_binary_sequential_type decode_ALU_CTRL; + wire `AluCtrlEnum_binary_sequential_type _zz_decode_ALU_CTRL; + wire `AluCtrlEnum_binary_sequential_type _zz_decode_to_execute_ALU_CTRL; + wire `AluCtrlEnum_binary_sequential_type _zz_decode_to_execute_ALU_CTRL_1; + wire decode_MEMORY_STORE; + wire execute_BYPASSABLE_MEMORY_STAGE; + wire decode_BYPASSABLE_MEMORY_STAGE; + wire decode_BYPASSABLE_EXECUTE_STAGE; + wire `Src2CtrlEnum_binary_sequential_type decode_SRC2_CTRL; + wire `Src2CtrlEnum_binary_sequential_type _zz_decode_SRC2_CTRL; + wire `Src2CtrlEnum_binary_sequential_type _zz_decode_to_execute_SRC2_CTRL; + wire `Src2CtrlEnum_binary_sequential_type _zz_decode_to_execute_SRC2_CTRL_1; + wire decode_MEMORY_ENABLE; + wire `Src1CtrlEnum_binary_sequential_type decode_SRC1_CTRL; + wire `Src1CtrlEnum_binary_sequential_type _zz_decode_SRC1_CTRL; + wire `Src1CtrlEnum_binary_sequential_type _zz_decode_to_execute_SRC1_CTRL; + wire `Src1CtrlEnum_binary_sequential_type _zz_decode_to_execute_SRC1_CTRL_1; + wire [31:0] writeBack_FORMAL_PC_NEXT; + wire [31:0] memory_FORMAL_PC_NEXT; + wire [31:0] execute_FORMAL_PC_NEXT; + wire [31:0] decode_FORMAL_PC_NEXT; + wire [31:0] memory_PC; + wire writeBack_IS_MUL; + wire [33:0] writeBack_MUL_HH; + wire [51:0] writeBack_MUL_LOW; + wire [33:0] memory_MUL_HL; + wire [33:0] memory_MUL_LH; + wire [31:0] memory_MUL_LL; + reg [31:0] _zz_execute_to_memory_REGFILE_WRITE_DATA; + wire execute_CSR_READ_OPCODE; + wire execute_CSR_WRITE_OPCODE; + wire execute_IS_CSR; + wire `EnvCtrlEnum_binary_sequential_type memory_ENV_CTRL; + wire `EnvCtrlEnum_binary_sequential_type _zz_memory_ENV_CTRL; + wire `EnvCtrlEnum_binary_sequential_type execute_ENV_CTRL; + wire `EnvCtrlEnum_binary_sequential_type _zz_execute_ENV_CTRL; + wire `EnvCtrlEnum_binary_sequential_type writeBack_ENV_CTRL; + wire `EnvCtrlEnum_binary_sequential_type _zz_writeBack_ENV_CTRL; + wire [31:0] memory_BRANCH_CALC; + wire memory_BRANCH_DO; + wire [31:0] execute_PC; + (* keep , syn_keep *) wire [31:0] execute_RS1 /* synthesis syn_keep = 1 */ ; + wire `BranchCtrlEnum_binary_sequential_type execute_BRANCH_CTRL; + wire `BranchCtrlEnum_binary_sequential_type _zz_execute_BRANCH_CTRL; + wire decode_RS2_USE; + wire decode_RS1_USE; + wire execute_REGFILE_WRITE_VALID; + wire execute_BYPASSABLE_EXECUTE_STAGE; + wire memory_REGFILE_WRITE_VALID; + wire [31:0] memory_INSTRUCTION; + wire memory_BYPASSABLE_MEMORY_STAGE; + wire writeBack_REGFILE_WRITE_VALID; + wire [31:0] memory_SHIFT_RIGHT; + reg [31:0] _zz_memory_to_writeBack_REGFILE_WRITE_DATA; + wire `ShiftCtrlEnum_binary_sequential_type memory_SHIFT_CTRL; + wire `ShiftCtrlEnum_binary_sequential_type _zz_memory_SHIFT_CTRL; + wire `ShiftCtrlEnum_binary_sequential_type execute_SHIFT_CTRL; + wire `ShiftCtrlEnum_binary_sequential_type _zz_execute_SHIFT_CTRL; + wire execute_SRC_LESS_UNSIGNED; + wire execute_SRC2_FORCE_ZERO; + wire execute_SRC_USE_SUB_LESS; + wire [31:0] _zz_execute_SRC2; + wire `Src2CtrlEnum_binary_sequential_type execute_SRC2_CTRL; + wire `Src2CtrlEnum_binary_sequential_type _zz_execute_SRC2_CTRL; + wire `Src1CtrlEnum_binary_sequential_type execute_SRC1_CTRL; + wire `Src1CtrlEnum_binary_sequential_type _zz_execute_SRC1_CTRL; + wire decode_SRC_USE_SUB_LESS; + wire decode_SRC_ADD_ZERO; + wire [31:0] execute_SRC_ADD_SUB; + wire execute_SRC_LESS; + wire `AluCtrlEnum_binary_sequential_type execute_ALU_CTRL; + wire `AluCtrlEnum_binary_sequential_type _zz_execute_ALU_CTRL; + wire [31:0] execute_SRC2; + wire [31:0] execute_SRC1; + wire `AluBitwiseCtrlEnum_binary_sequential_type execute_ALU_BITWISE_CTRL; + wire `AluBitwiseCtrlEnum_binary_sequential_type _zz_execute_ALU_BITWISE_CTRL; + wire [31:0] _zz_lastStageRegFileWrite_payload_address; + wire _zz_lastStageRegFileWrite_valid; + reg _zz_1; + wire [31:0] decode_INSTRUCTION_ANTICIPATED; + reg decode_REGFILE_WRITE_VALID; + wire decode_LEGAL_INSTRUCTION; + wire `EnvCtrlEnum_binary_sequential_type _zz_decode_ENV_CTRL_1; + wire `BranchCtrlEnum_binary_sequential_type _zz_decode_BRANCH_CTRL_1; + wire `ShiftCtrlEnum_binary_sequential_type _zz_decode_SHIFT_CTRL_1; + wire `AluBitwiseCtrlEnum_binary_sequential_type _zz_decode_ALU_BITWISE_CTRL_1; + wire `AluCtrlEnum_binary_sequential_type _zz_decode_ALU_CTRL_1; + wire `Src2CtrlEnum_binary_sequential_type _zz_decode_SRC2_CTRL_1; + wire `Src1CtrlEnum_binary_sequential_type _zz_decode_SRC1_CTRL_1; + wire writeBack_MEMORY_STORE; + reg [31:0] _zz_lastStageRegFileWrite_payload_data; + wire writeBack_MEMORY_ENABLE; + wire [1:0] writeBack_MEMORY_ADDRESS_LOW; + wire [31:0] writeBack_MEMORY_READ_DATA; + wire memory_MEMORY_STORE; + wire memory_MEMORY_ENABLE; + wire [31:0] execute_SRC_ADD; + (* keep , syn_keep *) wire [31:0] execute_RS2 /* synthesis syn_keep = 1 */ ; + wire [31:0] execute_INSTRUCTION; + wire execute_MEMORY_STORE; + wire execute_MEMORY_ENABLE; + wire execute_ALIGNEMENT_FAULT; + wire decode_FLUSH_ALL; + reg IBusCachedPlugin_rsp_issueDetected_2; + reg IBusCachedPlugin_rsp_issueDetected_1; + wire [31:0] decode_INSTRUCTION; + reg [31:0] _zz_memory_to_writeBack_FORMAL_PC_NEXT; + wire [31:0] decode_PC; + wire [31:0] writeBack_PC; + wire [31:0] writeBack_INSTRUCTION; + wire decode_arbitration_haltItself; + reg decode_arbitration_haltByOther; + reg decode_arbitration_removeIt; + wire decode_arbitration_flushIt; + reg decode_arbitration_flushNext; + wire decode_arbitration_isValid; + wire decode_arbitration_isStuck; + wire decode_arbitration_isStuckByOthers; + wire decode_arbitration_isFlushed; + wire decode_arbitration_isMoving; + wire decode_arbitration_isFiring; + reg execute_arbitration_haltItself; + wire execute_arbitration_haltByOther; + reg execute_arbitration_removeIt; + wire execute_arbitration_flushIt; + reg execute_arbitration_flushNext; + reg execute_arbitration_isValid; + wire execute_arbitration_isStuck; + wire execute_arbitration_isStuckByOthers; + wire execute_arbitration_isFlushed; + wire execute_arbitration_isMoving; + wire execute_arbitration_isFiring; + reg memory_arbitration_haltItself; + wire memory_arbitration_haltByOther; + reg memory_arbitration_removeIt; + wire memory_arbitration_flushIt; + reg memory_arbitration_flushNext; + reg memory_arbitration_isValid; + wire memory_arbitration_isStuck; + wire memory_arbitration_isStuckByOthers; + wire memory_arbitration_isFlushed; + wire memory_arbitration_isMoving; + wire memory_arbitration_isFiring; + wire writeBack_arbitration_haltItself; + wire writeBack_arbitration_haltByOther; + reg writeBack_arbitration_removeIt; + wire writeBack_arbitration_flushIt; + reg writeBack_arbitration_flushNext; + reg writeBack_arbitration_isValid; + wire writeBack_arbitration_isStuck; + wire writeBack_arbitration_isStuckByOthers; + wire writeBack_arbitration_isFlushed; + wire writeBack_arbitration_isMoving; + wire writeBack_arbitration_isFiring; + wire [31:0] lastStageInstruction /* verilator public */ ; + wire [31:0] lastStagePc /* verilator public */ ; + wire lastStageIsValid /* verilator public */ ; + wire lastStageIsFiring /* verilator public */ ; + reg IBusCachedPlugin_fetcherHalt; + reg IBusCachedPlugin_incomingInstruction; + wire IBusCachedPlugin_pcValids_0; + wire IBusCachedPlugin_pcValids_1; + wire IBusCachedPlugin_pcValids_2; + wire IBusCachedPlugin_pcValids_3; + wire IBusCachedPlugin_mmuBus_cmd_0_isValid; + wire IBusCachedPlugin_mmuBus_cmd_0_isStuck; + wire [31:0] IBusCachedPlugin_mmuBus_cmd_0_virtualAddress; + wire IBusCachedPlugin_mmuBus_cmd_0_bypassTranslation; + wire [31:0] IBusCachedPlugin_mmuBus_rsp_physicalAddress; + wire IBusCachedPlugin_mmuBus_rsp_isIoAccess; + wire IBusCachedPlugin_mmuBus_rsp_isPaging; + wire IBusCachedPlugin_mmuBus_rsp_allowRead; + wire IBusCachedPlugin_mmuBus_rsp_allowWrite; + wire IBusCachedPlugin_mmuBus_rsp_allowExecute; + wire IBusCachedPlugin_mmuBus_rsp_exception; + wire IBusCachedPlugin_mmuBus_rsp_refilling; + wire IBusCachedPlugin_mmuBus_rsp_bypassTranslation; + wire IBusCachedPlugin_mmuBus_end; + wire IBusCachedPlugin_mmuBus_busy; + wire decodeExceptionPort_valid; + wire [3:0] decodeExceptionPort_payload_code; + wire [31:0] decodeExceptionPort_payload_badAddr; + wire BranchPlugin_jumpInterface_valid; + wire [31:0] BranchPlugin_jumpInterface_payload; + wire [31:0] CsrPlugin_csrMapping_readDataSignal; + wire [31:0] CsrPlugin_csrMapping_readDataInit; + wire [31:0] CsrPlugin_csrMapping_writeDataSignal; + wire CsrPlugin_csrMapping_allowCsrSignal; + wire CsrPlugin_csrMapping_hazardFree; + wire CsrPlugin_inWfi /* verilator public */ ; + wire CsrPlugin_thirdPartyWake; + reg CsrPlugin_jumpInterface_valid; + reg [31:0] CsrPlugin_jumpInterface_payload; + wire CsrPlugin_exceptionPendings_0; + wire CsrPlugin_exceptionPendings_1; + wire CsrPlugin_exceptionPendings_2; + wire CsrPlugin_exceptionPendings_3; + wire externalInterrupt; + wire contextSwitching; + reg [1:0] CsrPlugin_privilege; + wire CsrPlugin_forceMachineWire; + reg CsrPlugin_selfException_valid; + reg [3:0] CsrPlugin_selfException_payload_code; + wire [31:0] CsrPlugin_selfException_payload_badAddr; + wire CsrPlugin_allowInterrupts; + wire CsrPlugin_allowException; + wire CsrPlugin_allowEbreakException; + wire IBusCachedPlugin_externalFlush; + wire IBusCachedPlugin_jump_pcLoad_valid; + wire [31:0] IBusCachedPlugin_jump_pcLoad_payload; + wire [1:0] _zz_IBusCachedPlugin_jump_pcLoad_payload; + wire IBusCachedPlugin_fetchPc_output_valid; + wire IBusCachedPlugin_fetchPc_output_ready; + wire [31:0] IBusCachedPlugin_fetchPc_output_payload; + reg [31:0] IBusCachedPlugin_fetchPc_pcReg /* verilator public */ ; + reg IBusCachedPlugin_fetchPc_correction; + reg IBusCachedPlugin_fetchPc_correctionReg; + wire IBusCachedPlugin_fetchPc_output_fire; + wire IBusCachedPlugin_fetchPc_corrected; + reg IBusCachedPlugin_fetchPc_pcRegPropagate; + reg IBusCachedPlugin_fetchPc_booted; + reg IBusCachedPlugin_fetchPc_inc; + wire when_Fetcher_l131; + wire IBusCachedPlugin_fetchPc_output_fire_1; + wire when_Fetcher_l131_1; + reg [31:0] IBusCachedPlugin_fetchPc_pc; + wire IBusCachedPlugin_fetchPc_redo_valid; + wire [31:0] IBusCachedPlugin_fetchPc_redo_payload; + reg IBusCachedPlugin_fetchPc_flushed; + wire when_Fetcher_l158; + reg IBusCachedPlugin_iBusRsp_redoFetch; + wire IBusCachedPlugin_iBusRsp_stages_0_input_valid; + wire IBusCachedPlugin_iBusRsp_stages_0_input_ready; + wire [31:0] IBusCachedPlugin_iBusRsp_stages_0_input_payload; + wire IBusCachedPlugin_iBusRsp_stages_0_output_valid; + wire IBusCachedPlugin_iBusRsp_stages_0_output_ready; + wire [31:0] IBusCachedPlugin_iBusRsp_stages_0_output_payload; + reg IBusCachedPlugin_iBusRsp_stages_0_halt; + wire IBusCachedPlugin_iBusRsp_stages_1_input_valid; + wire IBusCachedPlugin_iBusRsp_stages_1_input_ready; + wire [31:0] IBusCachedPlugin_iBusRsp_stages_1_input_payload; + wire IBusCachedPlugin_iBusRsp_stages_1_output_valid; + wire IBusCachedPlugin_iBusRsp_stages_1_output_ready; + wire [31:0] IBusCachedPlugin_iBusRsp_stages_1_output_payload; + reg IBusCachedPlugin_iBusRsp_stages_1_halt; + wire IBusCachedPlugin_iBusRsp_stages_2_input_valid; + wire IBusCachedPlugin_iBusRsp_stages_2_input_ready; + wire [31:0] IBusCachedPlugin_iBusRsp_stages_2_input_payload; + wire IBusCachedPlugin_iBusRsp_stages_2_output_valid; + wire IBusCachedPlugin_iBusRsp_stages_2_output_ready; + wire [31:0] IBusCachedPlugin_iBusRsp_stages_2_output_payload; + reg IBusCachedPlugin_iBusRsp_stages_2_halt; + wire _zz_IBusCachedPlugin_iBusRsp_stages_0_input_ready; + wire _zz_IBusCachedPlugin_iBusRsp_stages_1_input_ready; + wire _zz_IBusCachedPlugin_iBusRsp_stages_2_input_ready; + wire IBusCachedPlugin_iBusRsp_flush; + wire _zz_IBusCachedPlugin_iBusRsp_stages_0_output_ready; + wire _zz_IBusCachedPlugin_iBusRsp_stages_0_output_ready_1; + reg _zz_IBusCachedPlugin_iBusRsp_stages_0_output_ready_2; + wire IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_valid; + wire IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_ready; + wire [31:0] IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_payload; + reg _zz_IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_valid; + reg [31:0] _zz_IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_payload; + reg IBusCachedPlugin_iBusRsp_readyForError; + wire IBusCachedPlugin_iBusRsp_output_valid; + wire IBusCachedPlugin_iBusRsp_output_ready; + wire [31:0] IBusCachedPlugin_iBusRsp_output_payload_pc; + wire IBusCachedPlugin_iBusRsp_output_payload_rsp_error; + wire [31:0] IBusCachedPlugin_iBusRsp_output_payload_rsp_inst; + wire IBusCachedPlugin_iBusRsp_output_payload_isRvc; + wire when_Fetcher_l240; + wire when_Fetcher_l320; + reg IBusCachedPlugin_injector_nextPcCalc_valids_0; + wire when_Fetcher_l329; + reg IBusCachedPlugin_injector_nextPcCalc_valids_1; + wire when_Fetcher_l329_1; + reg IBusCachedPlugin_injector_nextPcCalc_valids_2; + wire when_Fetcher_l329_2; + reg IBusCachedPlugin_injector_nextPcCalc_valids_3; + wire when_Fetcher_l329_3; + reg IBusCachedPlugin_injector_nextPcCalc_valids_4; + wire when_Fetcher_l329_4; + wire iBus_cmd_valid; + wire iBus_cmd_ready; + reg [31:0] iBus_cmd_payload_address; + wire [2:0] iBus_cmd_payload_size; + wire iBus_rsp_valid; + wire [31:0] iBus_rsp_payload_data; + wire iBus_rsp_payload_error; + wire [31:0] _zz_IBusCachedPlugin_rspCounter; + reg [31:0] IBusCachedPlugin_rspCounter; + wire IBusCachedPlugin_s0_tightlyCoupledHit; + reg IBusCachedPlugin_s1_tightlyCoupledHit; + reg IBusCachedPlugin_s2_tightlyCoupledHit; + wire IBusCachedPlugin_rsp_iBusRspOutputHalt; + wire IBusCachedPlugin_rsp_issueDetected; + reg IBusCachedPlugin_rsp_redoFetch; + wire when_IBusCachedPlugin_l239; + wire when_IBusCachedPlugin_l250; + wire when_IBusCachedPlugin_l267; + wire dBus_cmd_valid; + wire dBus_cmd_ready; + wire dBus_cmd_payload_wr; + wire [31:0] dBus_cmd_payload_address; + wire [31:0] dBus_cmd_payload_data; + wire [1:0] dBus_cmd_payload_size; + wire dBus_rsp_ready; + wire dBus_rsp_error; + wire [31:0] dBus_rsp_data; + wire _zz_dBus_cmd_valid; + reg execute_DBusSimplePlugin_skipCmd; + reg [31:0] _zz_dBus_cmd_payload_data; + wire when_DBusSimplePlugin_l426; + reg [3:0] _zz_execute_DBusSimplePlugin_formalMask; + wire [3:0] execute_DBusSimplePlugin_formalMask; + wire when_DBusSimplePlugin_l479; + reg [31:0] writeBack_DBusSimplePlugin_rspShifted; + wire [1:0] switch_Misc_l200; + wire _zz_writeBack_DBusSimplePlugin_rspFormated; + reg [31:0] _zz_writeBack_DBusSimplePlugin_rspFormated_1; + wire _zz_writeBack_DBusSimplePlugin_rspFormated_2; + reg [31:0] _zz_writeBack_DBusSimplePlugin_rspFormated_3; + reg [31:0] writeBack_DBusSimplePlugin_rspFormated; + wire when_DBusSimplePlugin_l558; + wire [27:0] _zz_decode_IS_MUL; + wire _zz_decode_IS_MUL_1; + wire _zz_decode_IS_MUL_2; + wire _zz_decode_IS_MUL_3; + wire _zz_decode_IS_MUL_4; + wire `Src1CtrlEnum_binary_sequential_type _zz_decode_SRC1_CTRL_2; + wire `Src2CtrlEnum_binary_sequential_type _zz_decode_SRC2_CTRL_2; + wire `AluCtrlEnum_binary_sequential_type _zz_decode_ALU_CTRL_2; + wire `AluBitwiseCtrlEnum_binary_sequential_type _zz_decode_ALU_BITWISE_CTRL_2; + wire `ShiftCtrlEnum_binary_sequential_type _zz_decode_SHIFT_CTRL_2; + wire `BranchCtrlEnum_binary_sequential_type _zz_decode_BRANCH_CTRL_2; + wire `EnvCtrlEnum_binary_sequential_type _zz_decode_ENV_CTRL_2; + wire when_RegFilePlugin_l63; + wire [4:0] decode_RegFilePlugin_regFileReadAddress1; + wire [4:0] decode_RegFilePlugin_regFileReadAddress2; + wire [31:0] decode_RegFilePlugin_rs1Data; + wire [31:0] decode_RegFilePlugin_rs2Data; + reg lastStageRegFileWrite_valid /* verilator public */ ; + reg [4:0] lastStageRegFileWrite_payload_address /* verilator public */ ; + reg [31:0] lastStageRegFileWrite_payload_data /* verilator public */ ; + reg _zz_2; + reg [31:0] execute_IntAluPlugin_bitwise; + reg [31:0] _zz_execute_REGFILE_WRITE_DATA; + reg [31:0] _zz_execute_SRC1; + wire _zz_execute_SRC2_1; + reg [19:0] _zz_execute_SRC2_2; + wire _zz_execute_SRC2_3; + reg [19:0] _zz_execute_SRC2_4; + reg [31:0] _zz_execute_SRC2_5; + reg [31:0] execute_SrcPlugin_addSub; + wire execute_SrcPlugin_less; + wire [4:0] execute_FullBarrelShifterPlugin_amplitude; + reg [31:0] _zz_execute_FullBarrelShifterPlugin_reversed; + wire [31:0] execute_FullBarrelShifterPlugin_reversed; + reg [31:0] _zz_memory_to_writeBack_REGFILE_WRITE_DATA_1; + reg HazardSimplePlugin_src0Hazard; + reg HazardSimplePlugin_src1Hazard; + wire HazardSimplePlugin_writeBackWrites_valid; + wire [4:0] HazardSimplePlugin_writeBackWrites_payload_address; + wire [31:0] HazardSimplePlugin_writeBackWrites_payload_data; + reg HazardSimplePlugin_writeBackBuffer_valid; + reg [4:0] HazardSimplePlugin_writeBackBuffer_payload_address; + reg [31:0] HazardSimplePlugin_writeBackBuffer_payload_data; + wire HazardSimplePlugin_addr0Match; + wire HazardSimplePlugin_addr1Match; + wire when_HazardSimplePlugin_l59; + wire when_HazardSimplePlugin_l62; + wire when_HazardSimplePlugin_l57; + wire when_HazardSimplePlugin_l58; + wire when_HazardSimplePlugin_l59_1; + wire when_HazardSimplePlugin_l62_1; + wire when_HazardSimplePlugin_l57_1; + wire when_HazardSimplePlugin_l58_1; + wire when_HazardSimplePlugin_l59_2; + wire when_HazardSimplePlugin_l62_2; + wire when_HazardSimplePlugin_l57_2; + wire when_HazardSimplePlugin_l58_2; + wire when_HazardSimplePlugin_l105; + wire when_HazardSimplePlugin_l108; + wire when_HazardSimplePlugin_l113; + wire execute_BranchPlugin_eq; + wire [2:0] switch_Misc_l200_1; + reg _zz_execute_BRANCH_DO; + reg _zz_execute_BRANCH_DO_1; + wire [31:0] execute_BranchPlugin_branch_src1; + wire _zz_execute_BranchPlugin_branch_src2; + reg [10:0] _zz_execute_BranchPlugin_branch_src2_1; + wire _zz_execute_BranchPlugin_branch_src2_2; + reg [19:0] _zz_execute_BranchPlugin_branch_src2_3; + wire _zz_execute_BranchPlugin_branch_src2_4; + reg [18:0] _zz_execute_BranchPlugin_branch_src2_5; + reg [31:0] _zz_execute_BranchPlugin_branch_src2_6; + wire [31:0] execute_BranchPlugin_branch_src2; + wire [31:0] execute_BranchPlugin_branchAdder; + wire [1:0] CsrPlugin_misa_base; + wire [25:0] CsrPlugin_misa_extensions; + reg [1:0] CsrPlugin_mtvec_mode; + reg [29:0] CsrPlugin_mtvec_base; + reg [31:0] CsrPlugin_mepc; + reg CsrPlugin_mstatus_MIE; + reg CsrPlugin_mstatus_MPIE; + reg [1:0] CsrPlugin_mstatus_MPP; + reg CsrPlugin_mip_MEIP; + reg CsrPlugin_mip_MTIP; + reg CsrPlugin_mip_MSIP; + reg CsrPlugin_mie_MEIE; + reg CsrPlugin_mie_MTIE; + reg CsrPlugin_mie_MSIE; + reg CsrPlugin_mcause_interrupt; + reg [3:0] CsrPlugin_mcause_exceptionCode; + reg [31:0] CsrPlugin_mtval; + reg [63:0] CsrPlugin_mcycle = 64'b0000000000000000000000000000000000000000000000000000000000000000; + reg [63:0] CsrPlugin_minstret = 64'b0000000000000000000000000000000000000000000000000000000000000000; + wire _zz_when_CsrPlugin_l952; + wire _zz_when_CsrPlugin_l952_1; + wire _zz_when_CsrPlugin_l952_2; + reg CsrPlugin_exceptionPortCtrl_exceptionValids_decode; + reg CsrPlugin_exceptionPortCtrl_exceptionValids_execute; + reg CsrPlugin_exceptionPortCtrl_exceptionValids_memory; + reg CsrPlugin_exceptionPortCtrl_exceptionValids_writeBack; + reg CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_decode; + reg CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_execute; + reg CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_memory; + reg CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_writeBack; + reg [3:0] CsrPlugin_exceptionPortCtrl_exceptionContext_code; + reg [31:0] CsrPlugin_exceptionPortCtrl_exceptionContext_badAddr; + wire [1:0] CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilegeUncapped; + wire [1:0] CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilege; + wire when_CsrPlugin_l909; + wire when_CsrPlugin_l909_1; + wire when_CsrPlugin_l909_2; + wire when_CsrPlugin_l909_3; + wire when_CsrPlugin_l922; + reg CsrPlugin_interrupt_valid; + reg [3:0] CsrPlugin_interrupt_code /* verilator public */ ; + reg [1:0] CsrPlugin_interrupt_targetPrivilege; + wire when_CsrPlugin_l946; + wire when_CsrPlugin_l952; + wire when_CsrPlugin_l952_1; + wire when_CsrPlugin_l952_2; + wire CsrPlugin_exception; + wire CsrPlugin_lastStageWasWfi; + reg CsrPlugin_pipelineLiberator_pcValids_0; + reg CsrPlugin_pipelineLiberator_pcValids_1; + reg CsrPlugin_pipelineLiberator_pcValids_2; + wire CsrPlugin_pipelineLiberator_active; + wire when_CsrPlugin_l980; + wire when_CsrPlugin_l980_1; + wire when_CsrPlugin_l980_2; + wire when_CsrPlugin_l985; + reg CsrPlugin_pipelineLiberator_done; + wire when_CsrPlugin_l991; + wire CsrPlugin_interruptJump /* verilator public */ ; + reg CsrPlugin_hadException /* verilator public */ ; + reg [1:0] CsrPlugin_targetPrivilege; + reg [3:0] CsrPlugin_trapCause; + reg [1:0] CsrPlugin_xtvec_mode; + reg [29:0] CsrPlugin_xtvec_base; + wire when_CsrPlugin_l1019; + wire when_CsrPlugin_l1064; + wire [1:0] switch_CsrPlugin_l1068; + reg execute_CsrPlugin_wfiWake; + wire when_CsrPlugin_l1116; + wire execute_CsrPlugin_blockedBySideEffects; + reg execute_CsrPlugin_illegalAccess; + reg execute_CsrPlugin_illegalInstruction; + wire when_CsrPlugin_l1136; + wire when_CsrPlugin_l1137; + wire when_CsrPlugin_l1144; + reg execute_CsrPlugin_writeInstruction; + reg execute_CsrPlugin_readInstruction; + wire execute_CsrPlugin_writeEnable; + wire execute_CsrPlugin_readEnable; + wire [31:0] execute_CsrPlugin_readToWriteData; + wire switch_Misc_l200_2; + reg [31:0] _zz_CsrPlugin_csrMapping_writeDataSignal; + wire when_CsrPlugin_l1176; + wire when_CsrPlugin_l1180; + wire [11:0] execute_CsrPlugin_csrAddress; + reg execute_MulPlugin_aSigned; + reg execute_MulPlugin_bSigned; + wire [31:0] execute_MulPlugin_a; + wire [31:0] execute_MulPlugin_b; + wire [1:0] switch_MulPlugin_l87; + wire [15:0] execute_MulPlugin_aULow; + wire [15:0] execute_MulPlugin_bULow; + wire [16:0] execute_MulPlugin_aSLow; + wire [16:0] execute_MulPlugin_bSLow; + wire [16:0] execute_MulPlugin_aHigh; + wire [16:0] execute_MulPlugin_bHigh; + wire [65:0] writeBack_MulPlugin_result; + wire when_MulPlugin_l147; + wire [1:0] switch_MulPlugin_l148; + reg [31:0] externalInterruptArray_regNext; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit; + wire [31:0] _zz_CsrPlugin_csrMapping_readDataInit_1; + wire when_Pipeline_l124; + reg [31:0] decode_to_execute_PC; + wire when_Pipeline_l124_1; + reg [31:0] execute_to_memory_PC; + wire when_Pipeline_l124_2; + reg [31:0] memory_to_writeBack_PC; + wire when_Pipeline_l124_3; + reg [31:0] decode_to_execute_INSTRUCTION; + wire when_Pipeline_l124_4; + reg [31:0] execute_to_memory_INSTRUCTION; + wire when_Pipeline_l124_5; + reg [31:0] memory_to_writeBack_INSTRUCTION; + wire when_Pipeline_l124_6; + reg [31:0] decode_to_execute_FORMAL_PC_NEXT; + wire when_Pipeline_l124_7; + reg [31:0] execute_to_memory_FORMAL_PC_NEXT; + wire when_Pipeline_l124_8; + reg [31:0] memory_to_writeBack_FORMAL_PC_NEXT; + wire when_Pipeline_l124_9; + reg `Src1CtrlEnum_binary_sequential_type decode_to_execute_SRC1_CTRL; + wire when_Pipeline_l124_10; + reg decode_to_execute_SRC_USE_SUB_LESS; + wire when_Pipeline_l124_11; + reg decode_to_execute_MEMORY_ENABLE; + wire when_Pipeline_l124_12; + reg execute_to_memory_MEMORY_ENABLE; + wire when_Pipeline_l124_13; + reg memory_to_writeBack_MEMORY_ENABLE; + wire when_Pipeline_l124_14; + reg `Src2CtrlEnum_binary_sequential_type decode_to_execute_SRC2_CTRL; + wire when_Pipeline_l124_15; + reg decode_to_execute_REGFILE_WRITE_VALID; + wire when_Pipeline_l124_16; + reg execute_to_memory_REGFILE_WRITE_VALID; + wire when_Pipeline_l124_17; + reg memory_to_writeBack_REGFILE_WRITE_VALID; + wire when_Pipeline_l124_18; + reg decode_to_execute_BYPASSABLE_EXECUTE_STAGE; + wire when_Pipeline_l124_19; + reg decode_to_execute_BYPASSABLE_MEMORY_STAGE; + wire when_Pipeline_l124_20; + reg execute_to_memory_BYPASSABLE_MEMORY_STAGE; + wire when_Pipeline_l124_21; + reg decode_to_execute_MEMORY_STORE; + wire when_Pipeline_l124_22; + reg execute_to_memory_MEMORY_STORE; + wire when_Pipeline_l124_23; + reg memory_to_writeBack_MEMORY_STORE; + wire when_Pipeline_l124_24; + reg `AluCtrlEnum_binary_sequential_type decode_to_execute_ALU_CTRL; + wire when_Pipeline_l124_25; + reg decode_to_execute_SRC_LESS_UNSIGNED; + wire when_Pipeline_l124_26; + reg `AluBitwiseCtrlEnum_binary_sequential_type decode_to_execute_ALU_BITWISE_CTRL; + wire when_Pipeline_l124_27; + reg `ShiftCtrlEnum_binary_sequential_type decode_to_execute_SHIFT_CTRL; + wire when_Pipeline_l124_28; + reg `ShiftCtrlEnum_binary_sequential_type execute_to_memory_SHIFT_CTRL; + wire when_Pipeline_l124_29; + reg `BranchCtrlEnum_binary_sequential_type decode_to_execute_BRANCH_CTRL; + wire when_Pipeline_l124_30; + reg decode_to_execute_IS_CSR; + wire when_Pipeline_l124_31; + reg `EnvCtrlEnum_binary_sequential_type decode_to_execute_ENV_CTRL; + wire when_Pipeline_l124_32; + reg `EnvCtrlEnum_binary_sequential_type execute_to_memory_ENV_CTRL; + wire when_Pipeline_l124_33; + reg `EnvCtrlEnum_binary_sequential_type memory_to_writeBack_ENV_CTRL; + wire when_Pipeline_l124_34; + reg decode_to_execute_IS_MUL; + wire when_Pipeline_l124_35; + reg execute_to_memory_IS_MUL; + wire when_Pipeline_l124_36; + reg memory_to_writeBack_IS_MUL; + wire when_Pipeline_l124_37; + reg [31:0] decode_to_execute_RS1; + wire when_Pipeline_l124_38; + reg [31:0] decode_to_execute_RS2; + wire when_Pipeline_l124_39; + reg decode_to_execute_SRC2_FORCE_ZERO; + wire when_Pipeline_l124_40; + reg decode_to_execute_CSR_WRITE_OPCODE; + wire when_Pipeline_l124_41; + reg decode_to_execute_CSR_READ_OPCODE; + wire when_Pipeline_l124_42; + reg [1:0] execute_to_memory_MEMORY_ADDRESS_LOW; + wire when_Pipeline_l124_43; + reg [1:0] memory_to_writeBack_MEMORY_ADDRESS_LOW; + wire when_Pipeline_l124_44; + reg [31:0] execute_to_memory_REGFILE_WRITE_DATA; + wire when_Pipeline_l124_45; + reg [31:0] memory_to_writeBack_REGFILE_WRITE_DATA; + wire when_Pipeline_l124_46; + reg [31:0] execute_to_memory_SHIFT_RIGHT; + wire when_Pipeline_l124_47; + reg execute_to_memory_BRANCH_DO; + wire when_Pipeline_l124_48; + reg [31:0] execute_to_memory_BRANCH_CALC; + wire when_Pipeline_l124_49; + reg [31:0] execute_to_memory_MUL_LL; + wire when_Pipeline_l124_50; + reg [33:0] execute_to_memory_MUL_LH; + wire when_Pipeline_l124_51; + reg [33:0] execute_to_memory_MUL_HL; + wire when_Pipeline_l124_52; + reg [33:0] execute_to_memory_MUL_HH; + wire when_Pipeline_l124_53; + reg [33:0] memory_to_writeBack_MUL_HH; + wire when_Pipeline_l124_54; + reg [31:0] memory_to_writeBack_MEMORY_READ_DATA; + wire when_Pipeline_l124_55; + reg [51:0] memory_to_writeBack_MUL_LOW; + wire when_Pipeline_l151; + wire when_Pipeline_l154; + wire when_Pipeline_l151_1; + wire when_Pipeline_l154_1; + wire when_Pipeline_l151_2; + wire when_Pipeline_l154_2; + wire when_CsrPlugin_l1264; + reg execute_CsrPlugin_csr_768; + wire when_CsrPlugin_l1264_1; + reg execute_CsrPlugin_csr_836; + wire when_CsrPlugin_l1264_2; + reg execute_CsrPlugin_csr_772; + wire when_CsrPlugin_l1264_3; + reg execute_CsrPlugin_csr_773; + wire when_CsrPlugin_l1264_4; + reg execute_CsrPlugin_csr_833; + wire when_CsrPlugin_l1264_5; + reg execute_CsrPlugin_csr_834; + wire when_CsrPlugin_l1264_6; + reg execute_CsrPlugin_csr_835; + wire when_CsrPlugin_l1264_7; + reg execute_CsrPlugin_csr_2816; + wire when_CsrPlugin_l1264_8; + reg execute_CsrPlugin_csr_2944; + wire when_CsrPlugin_l1264_9; + reg execute_CsrPlugin_csr_3008; + wire when_CsrPlugin_l1264_10; + reg execute_CsrPlugin_csr_4032; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_2; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_3; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_4; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_5; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_6; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_7; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_8; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_9; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_10; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_11; + wire when_CsrPlugin_l1297; + wire when_CsrPlugin_l1302; + reg [2:0] _zz_iBusWishbone_ADR; + wire when_InstructionCache_l239; + reg _zz_iBus_rsp_valid; + reg [31:0] iBusWishbone_DAT_MISO_regNext; + wire dBus_cmd_halfPipe_valid; + wire dBus_cmd_halfPipe_ready; + wire dBus_cmd_halfPipe_payload_wr; + wire [31:0] dBus_cmd_halfPipe_payload_address; + wire [31:0] dBus_cmd_halfPipe_payload_data; + wire [1:0] dBus_cmd_halfPipe_payload_size; + reg dBus_cmd_rValid; + wire dBus_cmd_halfPipe_fire; + reg dBus_cmd_rData_wr; + reg [31:0] dBus_cmd_rData_address; + reg [31:0] dBus_cmd_rData_data; + reg [1:0] dBus_cmd_rData_size; + reg [3:0] _zz_dBusWishbone_SEL; + wire when_DBusSimplePlugin_l189; + `ifndef SYNTHESIS + reg [39:0] _zz_memory_to_writeBack_ENV_CTRL_string; + reg [39:0] _zz_memory_to_writeBack_ENV_CTRL_1_string; + reg [39:0] _zz_execute_to_memory_ENV_CTRL_string; + reg [39:0] _zz_execute_to_memory_ENV_CTRL_1_string; + reg [39:0] decode_ENV_CTRL_string; + reg [39:0] _zz_decode_ENV_CTRL_string; + reg [39:0] _zz_decode_to_execute_ENV_CTRL_string; + reg [39:0] _zz_decode_to_execute_ENV_CTRL_1_string; + reg [31:0] decode_BRANCH_CTRL_string; + reg [31:0] _zz_decode_BRANCH_CTRL_string; + reg [31:0] _zz_decode_to_execute_BRANCH_CTRL_string; + reg [31:0] _zz_decode_to_execute_BRANCH_CTRL_1_string; + reg [71:0] _zz_execute_to_memory_SHIFT_CTRL_string; + reg [71:0] _zz_execute_to_memory_SHIFT_CTRL_1_string; + reg [71:0] decode_SHIFT_CTRL_string; + reg [71:0] _zz_decode_SHIFT_CTRL_string; + reg [71:0] _zz_decode_to_execute_SHIFT_CTRL_string; + reg [71:0] _zz_decode_to_execute_SHIFT_CTRL_1_string; + reg [39:0] decode_ALU_BITWISE_CTRL_string; + reg [39:0] _zz_decode_ALU_BITWISE_CTRL_string; + reg [39:0] _zz_decode_to_execute_ALU_BITWISE_CTRL_string; + reg [39:0] _zz_decode_to_execute_ALU_BITWISE_CTRL_1_string; + reg [63:0] decode_ALU_CTRL_string; + reg [63:0] _zz_decode_ALU_CTRL_string; + reg [63:0] _zz_decode_to_execute_ALU_CTRL_string; + reg [63:0] _zz_decode_to_execute_ALU_CTRL_1_string; + reg [23:0] decode_SRC2_CTRL_string; + reg [23:0] _zz_decode_SRC2_CTRL_string; + reg [23:0] _zz_decode_to_execute_SRC2_CTRL_string; + reg [23:0] _zz_decode_to_execute_SRC2_CTRL_1_string; + reg [95:0] decode_SRC1_CTRL_string; + reg [95:0] _zz_decode_SRC1_CTRL_string; + reg [95:0] _zz_decode_to_execute_SRC1_CTRL_string; + reg [95:0] _zz_decode_to_execute_SRC1_CTRL_1_string; + reg [39:0] memory_ENV_CTRL_string; + reg [39:0] _zz_memory_ENV_CTRL_string; + reg [39:0] execute_ENV_CTRL_string; + reg [39:0] _zz_execute_ENV_CTRL_string; + reg [39:0] writeBack_ENV_CTRL_string; + reg [39:0] _zz_writeBack_ENV_CTRL_string; + reg [31:0] execute_BRANCH_CTRL_string; + reg [31:0] _zz_execute_BRANCH_CTRL_string; + reg [71:0] memory_SHIFT_CTRL_string; + reg [71:0] _zz_memory_SHIFT_CTRL_string; + reg [71:0] execute_SHIFT_CTRL_string; + reg [71:0] _zz_execute_SHIFT_CTRL_string; + reg [23:0] execute_SRC2_CTRL_string; + reg [23:0] _zz_execute_SRC2_CTRL_string; + reg [95:0] execute_SRC1_CTRL_string; + reg [95:0] _zz_execute_SRC1_CTRL_string; + reg [63:0] execute_ALU_CTRL_string; + reg [63:0] _zz_execute_ALU_CTRL_string; + reg [39:0] execute_ALU_BITWISE_CTRL_string; + reg [39:0] _zz_execute_ALU_BITWISE_CTRL_string; + reg [39:0] _zz_decode_ENV_CTRL_1_string; + reg [31:0] _zz_decode_BRANCH_CTRL_1_string; + reg [71:0] _zz_decode_SHIFT_CTRL_1_string; + reg [39:0] _zz_decode_ALU_BITWISE_CTRL_1_string; + reg [63:0] _zz_decode_ALU_CTRL_1_string; + reg [23:0] _zz_decode_SRC2_CTRL_1_string; + reg [95:0] _zz_decode_SRC1_CTRL_1_string; + reg [95:0] _zz_decode_SRC1_CTRL_2_string; + reg [23:0] _zz_decode_SRC2_CTRL_2_string; + reg [63:0] _zz_decode_ALU_CTRL_2_string; + reg [39:0] _zz_decode_ALU_BITWISE_CTRL_2_string; + reg [71:0] _zz_decode_SHIFT_CTRL_2_string; + reg [31:0] _zz_decode_BRANCH_CTRL_2_string; + reg [39:0] _zz_decode_ENV_CTRL_2_string; + reg [95:0] decode_to_execute_SRC1_CTRL_string; + reg [23:0] decode_to_execute_SRC2_CTRL_string; + reg [63:0] decode_to_execute_ALU_CTRL_string; + reg [39:0] decode_to_execute_ALU_BITWISE_CTRL_string; + reg [71:0] decode_to_execute_SHIFT_CTRL_string; + reg [71:0] execute_to_memory_SHIFT_CTRL_string; + reg [31:0] decode_to_execute_BRANCH_CTRL_string; + reg [39:0] decode_to_execute_ENV_CTRL_string; + reg [39:0] execute_to_memory_ENV_CTRL_string; + reg [39:0] memory_to_writeBack_ENV_CTRL_string; + `endif + + (* ram_style = "block" *) reg [31:0] RegFilePlugin_regFile [0:31] /* verilator public */ ; + + assign _zz_memory_MUL_LOW = ($signed(_zz_memory_MUL_LOW_1) + $signed(_zz_memory_MUL_LOW_5)); + assign _zz_memory_MUL_LOW_1 = ($signed(_zz_memory_MUL_LOW_2) + $signed(_zz_memory_MUL_LOW_3)); + assign _zz_memory_MUL_LOW_2 = 52'h0; + assign _zz_memory_MUL_LOW_4 = {1'b0,memory_MUL_LL}; + assign _zz_memory_MUL_LOW_3 = {{19{_zz_memory_MUL_LOW_4[32]}}, _zz_memory_MUL_LOW_4}; + assign _zz_memory_MUL_LOW_6 = ({16'd0,memory_MUL_LH} <<< 16); + assign _zz_memory_MUL_LOW_5 = {{2{_zz_memory_MUL_LOW_6[49]}}, _zz_memory_MUL_LOW_6}; + assign _zz_memory_MUL_LOW_8 = ({16'd0,memory_MUL_HL} <<< 16); + assign _zz_memory_MUL_LOW_7 = {{2{_zz_memory_MUL_LOW_8[49]}}, _zz_memory_MUL_LOW_8}; + assign _zz_execute_SHIFT_RIGHT_1 = ($signed(_zz_execute_SHIFT_RIGHT_2) >>> execute_FullBarrelShifterPlugin_amplitude); + assign _zz_execute_SHIFT_RIGHT = _zz_execute_SHIFT_RIGHT_1[31 : 0]; + assign _zz_execute_SHIFT_RIGHT_2 = {((execute_SHIFT_CTRL == `ShiftCtrlEnum_binary_sequential_SRA_1) && execute_FullBarrelShifterPlugin_reversed[31]),execute_FullBarrelShifterPlugin_reversed}; + assign _zz_IBusCachedPlugin_jump_pcLoad_payload_1 = (_zz_IBusCachedPlugin_jump_pcLoad_payload & (~ _zz_IBusCachedPlugin_jump_pcLoad_payload_2)); + assign _zz_IBusCachedPlugin_jump_pcLoad_payload_2 = (_zz_IBusCachedPlugin_jump_pcLoad_payload - 2'b01); + assign _zz_IBusCachedPlugin_fetchPc_pc_1 = {IBusCachedPlugin_fetchPc_inc,2'b00}; + assign _zz_IBusCachedPlugin_fetchPc_pc = {29'd0, _zz_IBusCachedPlugin_fetchPc_pc_1}; + assign _zz__zz_execute_REGFILE_WRITE_DATA = execute_SRC_LESS; + assign _zz__zz_execute_SRC1 = 3'b100; + assign _zz__zz_execute_SRC1_1 = execute_INSTRUCTION[19 : 15]; + assign _zz__zz_execute_SRC2_3 = {execute_INSTRUCTION[31 : 25],execute_INSTRUCTION[11 : 7]}; + assign _zz_execute_SrcPlugin_addSub = ($signed(_zz_execute_SrcPlugin_addSub_1) + $signed(_zz_execute_SrcPlugin_addSub_4)); + assign _zz_execute_SrcPlugin_addSub_1 = ($signed(_zz_execute_SrcPlugin_addSub_2) + $signed(_zz_execute_SrcPlugin_addSub_3)); + assign _zz_execute_SrcPlugin_addSub_2 = execute_SRC1; + assign _zz_execute_SrcPlugin_addSub_3 = (execute_SRC_USE_SUB_LESS ? (~ execute_SRC2) : execute_SRC2); + assign _zz_execute_SrcPlugin_addSub_4 = (execute_SRC_USE_SUB_LESS ? _zz_execute_SrcPlugin_addSub_5 : _zz_execute_SrcPlugin_addSub_6); + assign _zz_execute_SrcPlugin_addSub_5 = 32'h00000001; + assign _zz_execute_SrcPlugin_addSub_6 = 32'h0; + assign _zz__zz_execute_BranchPlugin_branch_src2 = {{{execute_INSTRUCTION[31],execute_INSTRUCTION[19 : 12]},execute_INSTRUCTION[20]},execute_INSTRUCTION[30 : 21]}; + assign _zz__zz_execute_BranchPlugin_branch_src2_4 = {{{execute_INSTRUCTION[31],execute_INSTRUCTION[7]},execute_INSTRUCTION[30 : 25]},execute_INSTRUCTION[11 : 8]}; + assign _zz_writeBack_MulPlugin_result = {{14{writeBack_MUL_LOW[51]}}, writeBack_MUL_LOW}; + assign _zz_writeBack_MulPlugin_result_1 = ({32'd0,writeBack_MUL_HH} <<< 32); + assign _zz__zz_lastStageRegFileWrite_payload_data = writeBack_MUL_LOW[31 : 0]; + assign _zz__zz_lastStageRegFileWrite_payload_data_1 = writeBack_MulPlugin_result[63 : 32]; + assign _zz_iBusWishbone_ADR_1 = (iBus_cmd_payload_address >>> 5); + assign _zz_decode_RegFilePlugin_rs1Data = 1'b1; + assign _zz_decode_RegFilePlugin_rs2Data = 1'b1; + assign _zz_decode_LEGAL_INSTRUCTION = 32'h0000107f; + assign _zz_decode_LEGAL_INSTRUCTION_1 = (decode_INSTRUCTION & 32'h0000207f); + assign _zz_decode_LEGAL_INSTRUCTION_2 = 32'h00002073; + assign _zz_decode_LEGAL_INSTRUCTION_3 = ((decode_INSTRUCTION & 32'h0000407f) == 32'h00004063); + assign _zz_decode_LEGAL_INSTRUCTION_4 = ((decode_INSTRUCTION & 32'h0000207f) == 32'h00002013); + assign _zz_decode_LEGAL_INSTRUCTION_5 = {((decode_INSTRUCTION & 32'h0000603f) == 32'h00000023),{((decode_INSTRUCTION & 32'h0000207f) == 32'h00000003),{((decode_INSTRUCTION & _zz_decode_LEGAL_INSTRUCTION_6) == 32'h00000003),{(_zz_decode_LEGAL_INSTRUCTION_7 == _zz_decode_LEGAL_INSTRUCTION_8),{_zz_decode_LEGAL_INSTRUCTION_9,{_zz_decode_LEGAL_INSTRUCTION_10,_zz_decode_LEGAL_INSTRUCTION_11}}}}}}; + assign _zz_decode_LEGAL_INSTRUCTION_6 = 32'h0000505f; + assign _zz_decode_LEGAL_INSTRUCTION_7 = (decode_INSTRUCTION & 32'h0000707b); + assign _zz_decode_LEGAL_INSTRUCTION_8 = 32'h00000063; + assign _zz_decode_LEGAL_INSTRUCTION_9 = ((decode_INSTRUCTION & 32'h0000607f) == 32'h0000000f); + assign _zz_decode_LEGAL_INSTRUCTION_10 = ((decode_INSTRUCTION & 32'hfc00407f) == 32'h00000033); + assign _zz_decode_LEGAL_INSTRUCTION_11 = {((decode_INSTRUCTION & 32'hfe00007f) == 32'h00000033),{((decode_INSTRUCTION & 32'hbc00707f) == 32'h00005013),{((decode_INSTRUCTION & _zz_decode_LEGAL_INSTRUCTION_12) == 32'h00001013),{(_zz_decode_LEGAL_INSTRUCTION_13 == _zz_decode_LEGAL_INSTRUCTION_14),{_zz_decode_LEGAL_INSTRUCTION_15,{_zz_decode_LEGAL_INSTRUCTION_16,_zz_decode_LEGAL_INSTRUCTION_17}}}}}}; + assign _zz_decode_LEGAL_INSTRUCTION_12 = 32'hfc00307f; + assign _zz_decode_LEGAL_INSTRUCTION_13 = (decode_INSTRUCTION & 32'hbe00707f); + assign _zz_decode_LEGAL_INSTRUCTION_14 = 32'h00005033; + assign _zz_decode_LEGAL_INSTRUCTION_15 = ((decode_INSTRUCTION & 32'hbe00707f) == 32'h00000033); + assign _zz_decode_LEGAL_INSTRUCTION_16 = ((decode_INSTRUCTION & 32'hdfffffff) == 32'h10200073); + assign _zz_decode_LEGAL_INSTRUCTION_17 = {((decode_INSTRUCTION & 32'hffffffff) == 32'h10500073),((decode_INSTRUCTION & 32'hffffffff) == 32'h00000073)}; + assign _zz__zz_decode_IS_MUL = 32'h02000074; + assign _zz__zz_decode_IS_MUL_1 = (decode_INSTRUCTION & 32'h10003050); + assign _zz__zz_decode_IS_MUL_2 = 32'h00000050; + assign _zz__zz_decode_IS_MUL_3 = ((decode_INSTRUCTION & 32'h10403050) == 32'h10000050); + assign _zz__zz_decode_IS_MUL_4 = {(_zz__zz_decode_IS_MUL_5 == _zz__zz_decode_IS_MUL_6),(_zz__zz_decode_IS_MUL_7 == _zz__zz_decode_IS_MUL_8)}; + assign _zz__zz_decode_IS_MUL_9 = 2'b00; + assign _zz__zz_decode_IS_MUL_10 = ({_zz_decode_IS_MUL_4,_zz__zz_decode_IS_MUL_11} != 2'b00); + assign _zz__zz_decode_IS_MUL_12 = (_zz__zz_decode_IS_MUL_13 != 1'b0); + assign _zz__zz_decode_IS_MUL_14 = {(_zz__zz_decode_IS_MUL_15 != _zz__zz_decode_IS_MUL_20),{_zz__zz_decode_IS_MUL_21,{_zz__zz_decode_IS_MUL_24,_zz__zz_decode_IS_MUL_32}}}; + assign _zz__zz_decode_IS_MUL_5 = (decode_INSTRUCTION & 32'h00001050); + assign _zz__zz_decode_IS_MUL_6 = 32'h00001050; + assign _zz__zz_decode_IS_MUL_7 = (decode_INSTRUCTION & 32'h00002050); + assign _zz__zz_decode_IS_MUL_8 = 32'h00002050; + assign _zz__zz_decode_IS_MUL_11 = ((decode_INSTRUCTION & 32'h0000001c) == 32'h00000004); + assign _zz__zz_decode_IS_MUL_13 = ((decode_INSTRUCTION & 32'h00000058) == 32'h00000040); + assign _zz__zz_decode_IS_MUL_15 = {(_zz__zz_decode_IS_MUL_16 == _zz__zz_decode_IS_MUL_17),(_zz__zz_decode_IS_MUL_18 == _zz__zz_decode_IS_MUL_19)}; + assign _zz__zz_decode_IS_MUL_20 = 2'b00; + assign _zz__zz_decode_IS_MUL_21 = ((_zz__zz_decode_IS_MUL_22 == _zz__zz_decode_IS_MUL_23) != 1'b0); + assign _zz__zz_decode_IS_MUL_24 = ({_zz__zz_decode_IS_MUL_25,_zz__zz_decode_IS_MUL_27} != 3'b000); + assign _zz__zz_decode_IS_MUL_32 = {(_zz__zz_decode_IS_MUL_33 != _zz__zz_decode_IS_MUL_35),{_zz__zz_decode_IS_MUL_36,{_zz__zz_decode_IS_MUL_39,_zz__zz_decode_IS_MUL_41}}}; + assign _zz__zz_decode_IS_MUL_16 = (decode_INSTRUCTION & 32'h00000050); + assign _zz__zz_decode_IS_MUL_17 = 32'h00000040; + assign _zz__zz_decode_IS_MUL_18 = (decode_INSTRUCTION & 32'h00403040); + assign _zz__zz_decode_IS_MUL_19 = 32'h00000040; + assign _zz__zz_decode_IS_MUL_22 = (decode_INSTRUCTION & 32'h00007054); + assign _zz__zz_decode_IS_MUL_23 = 32'h00005010; + assign _zz__zz_decode_IS_MUL_25 = ((decode_INSTRUCTION & _zz__zz_decode_IS_MUL_26) == 32'h40001010); + assign _zz__zz_decode_IS_MUL_27 = {(_zz__zz_decode_IS_MUL_28 == _zz__zz_decode_IS_MUL_29),(_zz__zz_decode_IS_MUL_30 == _zz__zz_decode_IS_MUL_31)}; + assign _zz__zz_decode_IS_MUL_33 = ((decode_INSTRUCTION & _zz__zz_decode_IS_MUL_34) == 32'h00000024); + assign _zz__zz_decode_IS_MUL_35 = 1'b0; + assign _zz__zz_decode_IS_MUL_36 = ((_zz__zz_decode_IS_MUL_37 == _zz__zz_decode_IS_MUL_38) != 1'b0); + assign _zz__zz_decode_IS_MUL_39 = (_zz__zz_decode_IS_MUL_40 != 1'b0); + assign _zz__zz_decode_IS_MUL_41 = {(_zz__zz_decode_IS_MUL_42 != _zz__zz_decode_IS_MUL_47),{_zz__zz_decode_IS_MUL_48,{_zz__zz_decode_IS_MUL_51,_zz__zz_decode_IS_MUL_52}}}; + assign _zz__zz_decode_IS_MUL_26 = 32'h40003054; + assign _zz__zz_decode_IS_MUL_28 = (decode_INSTRUCTION & 32'h00007034); + assign _zz__zz_decode_IS_MUL_29 = 32'h00001010; + assign _zz__zz_decode_IS_MUL_30 = (decode_INSTRUCTION & 32'h02007054); + assign _zz__zz_decode_IS_MUL_31 = 32'h00001010; + assign _zz__zz_decode_IS_MUL_34 = 32'h00000064; + assign _zz__zz_decode_IS_MUL_37 = (decode_INSTRUCTION & 32'h00001000); + assign _zz__zz_decode_IS_MUL_38 = 32'h00001000; + assign _zz__zz_decode_IS_MUL_40 = ((decode_INSTRUCTION & 32'h00003000) == 32'h00002000); + assign _zz__zz_decode_IS_MUL_42 = {(_zz__zz_decode_IS_MUL_43 == _zz__zz_decode_IS_MUL_44),(_zz__zz_decode_IS_MUL_45 == _zz__zz_decode_IS_MUL_46)}; + assign _zz__zz_decode_IS_MUL_47 = 2'b00; + assign _zz__zz_decode_IS_MUL_48 = ((_zz__zz_decode_IS_MUL_49 == _zz__zz_decode_IS_MUL_50) != 1'b0); + assign _zz__zz_decode_IS_MUL_51 = (_zz_decode_IS_MUL_2 != 1'b0); + assign _zz__zz_decode_IS_MUL_52 = {(_zz__zz_decode_IS_MUL_53 != _zz__zz_decode_IS_MUL_56),{_zz__zz_decode_IS_MUL_57,{_zz__zz_decode_IS_MUL_59,_zz__zz_decode_IS_MUL_67}}}; + assign _zz__zz_decode_IS_MUL_43 = (decode_INSTRUCTION & 32'h00002010); + assign _zz__zz_decode_IS_MUL_44 = 32'h00002000; + assign _zz__zz_decode_IS_MUL_45 = (decode_INSTRUCTION & 32'h00005000); + assign _zz__zz_decode_IS_MUL_46 = 32'h00001000; + assign _zz__zz_decode_IS_MUL_49 = (decode_INSTRUCTION & 32'h00004004); + assign _zz__zz_decode_IS_MUL_50 = 32'h00004000; + assign _zz__zz_decode_IS_MUL_53 = {((decode_INSTRUCTION & _zz__zz_decode_IS_MUL_54) == 32'h00000020),((decode_INSTRUCTION & _zz__zz_decode_IS_MUL_55) == 32'h00000020)}; + assign _zz__zz_decode_IS_MUL_56 = 2'b00; + assign _zz__zz_decode_IS_MUL_57 = (((decode_INSTRUCTION & _zz__zz_decode_IS_MUL_58) == 32'h00000020) != 1'b0); + assign _zz__zz_decode_IS_MUL_59 = ({_zz__zz_decode_IS_MUL_60,{_zz__zz_decode_IS_MUL_61,_zz__zz_decode_IS_MUL_62}} != 4'b0000); + assign _zz__zz_decode_IS_MUL_67 = {({_zz__zz_decode_IS_MUL_68,_zz__zz_decode_IS_MUL_69} != 5'h0),{(_zz__zz_decode_IS_MUL_80 != _zz__zz_decode_IS_MUL_95),{_zz__zz_decode_IS_MUL_96,{_zz__zz_decode_IS_MUL_99,_zz__zz_decode_IS_MUL_104}}}}; + assign _zz__zz_decode_IS_MUL_54 = 32'h00000034; + assign _zz__zz_decode_IS_MUL_55 = 32'h00000064; + assign _zz__zz_decode_IS_MUL_58 = 32'h00000020; + assign _zz__zz_decode_IS_MUL_60 = ((decode_INSTRUCTION & 32'h00000040) == 32'h00000040); + assign _zz__zz_decode_IS_MUL_61 = _zz_decode_IS_MUL_3; + assign _zz__zz_decode_IS_MUL_62 = {(_zz__zz_decode_IS_MUL_63 == _zz__zz_decode_IS_MUL_64),(_zz__zz_decode_IS_MUL_65 == _zz__zz_decode_IS_MUL_66)}; + assign _zz__zz_decode_IS_MUL_68 = _zz_decode_IS_MUL_3; + assign _zz__zz_decode_IS_MUL_69 = {(_zz__zz_decode_IS_MUL_70 == _zz__zz_decode_IS_MUL_71),{_zz__zz_decode_IS_MUL_72,{_zz__zz_decode_IS_MUL_74,_zz__zz_decode_IS_MUL_77}}}; + assign _zz__zz_decode_IS_MUL_80 = {_zz_decode_IS_MUL_4,{_zz__zz_decode_IS_MUL_81,{_zz__zz_decode_IS_MUL_83,_zz__zz_decode_IS_MUL_86}}}; + assign _zz__zz_decode_IS_MUL_95 = 6'h0; + assign _zz__zz_decode_IS_MUL_96 = ({_zz_decode_IS_MUL_3,_zz__zz_decode_IS_MUL_97} != 2'b00); + assign _zz__zz_decode_IS_MUL_99 = ({_zz__zz_decode_IS_MUL_100,_zz__zz_decode_IS_MUL_101} != 2'b00); + assign _zz__zz_decode_IS_MUL_104 = {(_zz__zz_decode_IS_MUL_105 != _zz__zz_decode_IS_MUL_113),{_zz__zz_decode_IS_MUL_114,{_zz__zz_decode_IS_MUL_117,_zz__zz_decode_IS_MUL_125}}}; + assign _zz__zz_decode_IS_MUL_63 = (decode_INSTRUCTION & 32'h00000030); + assign _zz__zz_decode_IS_MUL_64 = 32'h00000010; + assign _zz__zz_decode_IS_MUL_65 = (decode_INSTRUCTION & 32'h02000020); + assign _zz__zz_decode_IS_MUL_66 = 32'h00000020; + assign _zz__zz_decode_IS_MUL_70 = (decode_INSTRUCTION & 32'h00002030); + assign _zz__zz_decode_IS_MUL_71 = 32'h00002010; + assign _zz__zz_decode_IS_MUL_72 = ((decode_INSTRUCTION & _zz__zz_decode_IS_MUL_73) == 32'h00000010); + assign _zz__zz_decode_IS_MUL_74 = (_zz__zz_decode_IS_MUL_75 == _zz__zz_decode_IS_MUL_76); + assign _zz__zz_decode_IS_MUL_77 = (_zz__zz_decode_IS_MUL_78 == _zz__zz_decode_IS_MUL_79); + assign _zz__zz_decode_IS_MUL_81 = ((decode_INSTRUCTION & _zz__zz_decode_IS_MUL_82) == 32'h00001010); + assign _zz__zz_decode_IS_MUL_83 = (_zz__zz_decode_IS_MUL_84 == _zz__zz_decode_IS_MUL_85); + assign _zz__zz_decode_IS_MUL_86 = {_zz__zz_decode_IS_MUL_87,{_zz__zz_decode_IS_MUL_89,_zz__zz_decode_IS_MUL_92}}; + assign _zz__zz_decode_IS_MUL_97 = ((decode_INSTRUCTION & _zz__zz_decode_IS_MUL_98) == 32'h00000020); + assign _zz__zz_decode_IS_MUL_100 = _zz_decode_IS_MUL_3; + assign _zz__zz_decode_IS_MUL_101 = (_zz__zz_decode_IS_MUL_102 == _zz__zz_decode_IS_MUL_103); + assign _zz__zz_decode_IS_MUL_105 = {_zz__zz_decode_IS_MUL_106,{_zz__zz_decode_IS_MUL_108,_zz__zz_decode_IS_MUL_111}}; + assign _zz__zz_decode_IS_MUL_113 = 4'b0000; + assign _zz__zz_decode_IS_MUL_114 = (_zz__zz_decode_IS_MUL_115 != 1'b0); + assign _zz__zz_decode_IS_MUL_117 = (_zz__zz_decode_IS_MUL_118 != _zz__zz_decode_IS_MUL_124); + assign _zz__zz_decode_IS_MUL_125 = {_zz__zz_decode_IS_MUL_126,{_zz__zz_decode_IS_MUL_130,_zz__zz_decode_IS_MUL_135}}; + assign _zz__zz_decode_IS_MUL_73 = 32'h00001030; + assign _zz__zz_decode_IS_MUL_75 = (decode_INSTRUCTION & 32'h02002060); + assign _zz__zz_decode_IS_MUL_76 = 32'h00002020; + assign _zz__zz_decode_IS_MUL_78 = (decode_INSTRUCTION & 32'h02003020); + assign _zz__zz_decode_IS_MUL_79 = 32'h00000020; + assign _zz__zz_decode_IS_MUL_82 = 32'h00001010; + assign _zz__zz_decode_IS_MUL_84 = (decode_INSTRUCTION & 32'h00002010); + assign _zz__zz_decode_IS_MUL_85 = 32'h00002010; + assign _zz__zz_decode_IS_MUL_87 = ((decode_INSTRUCTION & _zz__zz_decode_IS_MUL_88) == 32'h00000010); + assign _zz__zz_decode_IS_MUL_89 = (_zz__zz_decode_IS_MUL_90 == _zz__zz_decode_IS_MUL_91); + assign _zz__zz_decode_IS_MUL_92 = (_zz__zz_decode_IS_MUL_93 == _zz__zz_decode_IS_MUL_94); + assign _zz__zz_decode_IS_MUL_98 = 32'h00000070; + assign _zz__zz_decode_IS_MUL_102 = (decode_INSTRUCTION & 32'h00000020); + assign _zz__zz_decode_IS_MUL_103 = 32'h0; + assign _zz__zz_decode_IS_MUL_106 = ((decode_INSTRUCTION & _zz__zz_decode_IS_MUL_107) == 32'h0); + assign _zz__zz_decode_IS_MUL_108 = (_zz__zz_decode_IS_MUL_109 == _zz__zz_decode_IS_MUL_110); + assign _zz__zz_decode_IS_MUL_111 = {_zz_decode_IS_MUL_2,_zz__zz_decode_IS_MUL_112}; + assign _zz__zz_decode_IS_MUL_115 = ((decode_INSTRUCTION & _zz__zz_decode_IS_MUL_116) == 32'h0); + assign _zz__zz_decode_IS_MUL_118 = {_zz__zz_decode_IS_MUL_119,{_zz__zz_decode_IS_MUL_120,_zz__zz_decode_IS_MUL_122}}; + assign _zz__zz_decode_IS_MUL_124 = 3'b000; + assign _zz__zz_decode_IS_MUL_126 = ({_zz__zz_decode_IS_MUL_127,_zz__zz_decode_IS_MUL_129} != 2'b00); + assign _zz__zz_decode_IS_MUL_130 = (_zz__zz_decode_IS_MUL_131 != _zz__zz_decode_IS_MUL_134); + assign _zz__zz_decode_IS_MUL_135 = (_zz__zz_decode_IS_MUL_136 != _zz__zz_decode_IS_MUL_138); + assign _zz__zz_decode_IS_MUL_88 = 32'h00000050; + assign _zz__zz_decode_IS_MUL_90 = (decode_INSTRUCTION & 32'h0000000c); + assign _zz__zz_decode_IS_MUL_91 = 32'h00000004; + assign _zz__zz_decode_IS_MUL_93 = (decode_INSTRUCTION & 32'h00000028); + assign _zz__zz_decode_IS_MUL_94 = 32'h0; + assign _zz__zz_decode_IS_MUL_107 = 32'h00000044; + assign _zz__zz_decode_IS_MUL_109 = (decode_INSTRUCTION & 32'h00000018); + assign _zz__zz_decode_IS_MUL_110 = 32'h0; + assign _zz__zz_decode_IS_MUL_112 = ((decode_INSTRUCTION & 32'h00005004) == 32'h00001000); + assign _zz__zz_decode_IS_MUL_116 = 32'h00000058; + assign _zz__zz_decode_IS_MUL_119 = ((decode_INSTRUCTION & 32'h00000044) == 32'h00000040); + assign _zz__zz_decode_IS_MUL_120 = ((decode_INSTRUCTION & _zz__zz_decode_IS_MUL_121) == 32'h00002010); + assign _zz__zz_decode_IS_MUL_122 = ((decode_INSTRUCTION & _zz__zz_decode_IS_MUL_123) == 32'h40000030); + assign _zz__zz_decode_IS_MUL_127 = ((decode_INSTRUCTION & _zz__zz_decode_IS_MUL_128) == 32'h00000004); + assign _zz__zz_decode_IS_MUL_129 = _zz_decode_IS_MUL_1; + assign _zz__zz_decode_IS_MUL_131 = {(_zz__zz_decode_IS_MUL_132 == _zz__zz_decode_IS_MUL_133),_zz_decode_IS_MUL_1}; + assign _zz__zz_decode_IS_MUL_134 = 2'b00; + assign _zz__zz_decode_IS_MUL_136 = ((decode_INSTRUCTION & _zz__zz_decode_IS_MUL_137) == 32'h00001008); + assign _zz__zz_decode_IS_MUL_138 = 1'b0; + assign _zz__zz_decode_IS_MUL_121 = 32'h00002014; + assign _zz__zz_decode_IS_MUL_123 = 32'h40000034; + assign _zz__zz_decode_IS_MUL_128 = 32'h00000014; + assign _zz__zz_decode_IS_MUL_132 = (decode_INSTRUCTION & 32'h00000044); + assign _zz__zz_decode_IS_MUL_133 = 32'h00000004; + assign _zz__zz_decode_IS_MUL_137 = 32'h00001048; + always @(posedge clk) begin + if(_zz_decode_RegFilePlugin_rs1Data) begin + _zz_RegFilePlugin_regFile_port0 <= RegFilePlugin_regFile[decode_RegFilePlugin_regFileReadAddress1]; + end + end + + always @(posedge clk) begin + if(_zz_decode_RegFilePlugin_rs2Data) begin + _zz_RegFilePlugin_regFile_port1 <= RegFilePlugin_regFile[decode_RegFilePlugin_regFileReadAddress2]; + end + end + + always @(posedge clk) begin + if(_zz_1) begin + RegFilePlugin_regFile[lastStageRegFileWrite_payload_address] <= lastStageRegFileWrite_payload_data; + end + end + + InstructionCache IBusCachedPlugin_cache ( + .io_flush (IBusCachedPlugin_cache_io_flush ), //i + .io_cpu_prefetch_isValid (IBusCachedPlugin_cache_io_cpu_prefetch_isValid ), //i + .io_cpu_prefetch_haltIt (IBusCachedPlugin_cache_io_cpu_prefetch_haltIt ), //o + .io_cpu_prefetch_pc (IBusCachedPlugin_iBusRsp_stages_0_input_payload ), //i + .io_cpu_fetch_isValid (IBusCachedPlugin_cache_io_cpu_fetch_isValid ), //i + .io_cpu_fetch_isStuck (IBusCachedPlugin_cache_io_cpu_fetch_isStuck ), //i + .io_cpu_fetch_isRemoved (IBusCachedPlugin_cache_io_cpu_fetch_isRemoved ), //i + .io_cpu_fetch_pc (IBusCachedPlugin_iBusRsp_stages_1_input_payload ), //i + .io_cpu_fetch_data (IBusCachedPlugin_cache_io_cpu_fetch_data ), //o + .io_cpu_fetch_mmuRsp_physicalAddress (IBusCachedPlugin_mmuBus_rsp_physicalAddress ), //i + .io_cpu_fetch_mmuRsp_isIoAccess (IBusCachedPlugin_mmuBus_rsp_isIoAccess ), //i + .io_cpu_fetch_mmuRsp_isPaging (IBusCachedPlugin_mmuBus_rsp_isPaging ), //i + .io_cpu_fetch_mmuRsp_allowRead (IBusCachedPlugin_mmuBus_rsp_allowRead ), //i + .io_cpu_fetch_mmuRsp_allowWrite (IBusCachedPlugin_mmuBus_rsp_allowWrite ), //i + .io_cpu_fetch_mmuRsp_allowExecute (IBusCachedPlugin_mmuBus_rsp_allowExecute ), //i + .io_cpu_fetch_mmuRsp_exception (IBusCachedPlugin_mmuBus_rsp_exception ), //i + .io_cpu_fetch_mmuRsp_refilling (IBusCachedPlugin_mmuBus_rsp_refilling ), //i + .io_cpu_fetch_mmuRsp_bypassTranslation (IBusCachedPlugin_mmuBus_rsp_bypassTranslation ), //i + .io_cpu_fetch_physicalAddress (IBusCachedPlugin_cache_io_cpu_fetch_physicalAddress ), //o + .io_cpu_decode_isValid (IBusCachedPlugin_cache_io_cpu_decode_isValid ), //i + .io_cpu_decode_isStuck (IBusCachedPlugin_cache_io_cpu_decode_isStuck ), //i + .io_cpu_decode_pc (IBusCachedPlugin_iBusRsp_stages_2_input_payload ), //i + .io_cpu_decode_physicalAddress (IBusCachedPlugin_cache_io_cpu_decode_physicalAddress ), //o + .io_cpu_decode_data (IBusCachedPlugin_cache_io_cpu_decode_data ), //o + .io_cpu_decode_cacheMiss (IBusCachedPlugin_cache_io_cpu_decode_cacheMiss ), //o + .io_cpu_decode_error (IBusCachedPlugin_cache_io_cpu_decode_error ), //o + .io_cpu_decode_mmuRefilling (IBusCachedPlugin_cache_io_cpu_decode_mmuRefilling ), //o + .io_cpu_decode_mmuException (IBusCachedPlugin_cache_io_cpu_decode_mmuException ), //o + .io_cpu_decode_isUser (IBusCachedPlugin_cache_io_cpu_decode_isUser ), //i + .io_cpu_fill_valid (IBusCachedPlugin_cache_io_cpu_fill_valid ), //i + .io_cpu_fill_payload (IBusCachedPlugin_cache_io_cpu_decode_physicalAddress ), //i + .io_mem_cmd_valid (IBusCachedPlugin_cache_io_mem_cmd_valid ), //o + .io_mem_cmd_ready (iBus_cmd_ready ), //i + .io_mem_cmd_payload_address (IBusCachedPlugin_cache_io_mem_cmd_payload_address ), //o + .io_mem_cmd_payload_size (IBusCachedPlugin_cache_io_mem_cmd_payload_size ), //o + .io_mem_rsp_valid (iBus_rsp_valid ), //i + .io_mem_rsp_payload_data (iBus_rsp_payload_data ), //i + .io_mem_rsp_payload_error (iBus_rsp_payload_error ), //i + .clk (clk ), //i + .reset (reset ) //i + ); + `ifndef SYNTHESIS + always @(*) begin + case(_zz_memory_to_writeBack_ENV_CTRL) + `EnvCtrlEnum_binary_sequential_NONE : _zz_memory_to_writeBack_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : _zz_memory_to_writeBack_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_binary_sequential_ECALL : _zz_memory_to_writeBack_ENV_CTRL_string = "ECALL"; + default : _zz_memory_to_writeBack_ENV_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(_zz_memory_to_writeBack_ENV_CTRL_1) + `EnvCtrlEnum_binary_sequential_NONE : _zz_memory_to_writeBack_ENV_CTRL_1_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : _zz_memory_to_writeBack_ENV_CTRL_1_string = "XRET "; + `EnvCtrlEnum_binary_sequential_ECALL : _zz_memory_to_writeBack_ENV_CTRL_1_string = "ECALL"; + default : _zz_memory_to_writeBack_ENV_CTRL_1_string = "?????"; + endcase + end + always @(*) begin + case(_zz_execute_to_memory_ENV_CTRL) + `EnvCtrlEnum_binary_sequential_NONE : _zz_execute_to_memory_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : _zz_execute_to_memory_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_binary_sequential_ECALL : _zz_execute_to_memory_ENV_CTRL_string = "ECALL"; + default : _zz_execute_to_memory_ENV_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(_zz_execute_to_memory_ENV_CTRL_1) + `EnvCtrlEnum_binary_sequential_NONE : _zz_execute_to_memory_ENV_CTRL_1_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : _zz_execute_to_memory_ENV_CTRL_1_string = "XRET "; + `EnvCtrlEnum_binary_sequential_ECALL : _zz_execute_to_memory_ENV_CTRL_1_string = "ECALL"; + default : _zz_execute_to_memory_ENV_CTRL_1_string = "?????"; + endcase + end + always @(*) begin + case(decode_ENV_CTRL) + `EnvCtrlEnum_binary_sequential_NONE : decode_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : decode_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_binary_sequential_ECALL : decode_ENV_CTRL_string = "ECALL"; + default : decode_ENV_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(_zz_decode_ENV_CTRL) + `EnvCtrlEnum_binary_sequential_NONE : _zz_decode_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : _zz_decode_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_binary_sequential_ECALL : _zz_decode_ENV_CTRL_string = "ECALL"; + default : _zz_decode_ENV_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(_zz_decode_to_execute_ENV_CTRL) + `EnvCtrlEnum_binary_sequential_NONE : _zz_decode_to_execute_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : _zz_decode_to_execute_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_binary_sequential_ECALL : _zz_decode_to_execute_ENV_CTRL_string = "ECALL"; + default : _zz_decode_to_execute_ENV_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(_zz_decode_to_execute_ENV_CTRL_1) + `EnvCtrlEnum_binary_sequential_NONE : _zz_decode_to_execute_ENV_CTRL_1_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : _zz_decode_to_execute_ENV_CTRL_1_string = "XRET "; + `EnvCtrlEnum_binary_sequential_ECALL : _zz_decode_to_execute_ENV_CTRL_1_string = "ECALL"; + default : _zz_decode_to_execute_ENV_CTRL_1_string = "?????"; + endcase + end + always @(*) begin + case(decode_BRANCH_CTRL) + `BranchCtrlEnum_binary_sequential_INC : decode_BRANCH_CTRL_string = "INC "; + `BranchCtrlEnum_binary_sequential_B : decode_BRANCH_CTRL_string = "B "; + `BranchCtrlEnum_binary_sequential_JAL : decode_BRANCH_CTRL_string = "JAL "; + `BranchCtrlEnum_binary_sequential_JALR : decode_BRANCH_CTRL_string = "JALR"; + default : decode_BRANCH_CTRL_string = "????"; + endcase + end + always @(*) begin + case(_zz_decode_BRANCH_CTRL) + `BranchCtrlEnum_binary_sequential_INC : _zz_decode_BRANCH_CTRL_string = "INC "; + `BranchCtrlEnum_binary_sequential_B : _zz_decode_BRANCH_CTRL_string = "B "; + `BranchCtrlEnum_binary_sequential_JAL : _zz_decode_BRANCH_CTRL_string = "JAL "; + `BranchCtrlEnum_binary_sequential_JALR : _zz_decode_BRANCH_CTRL_string = "JALR"; + default : _zz_decode_BRANCH_CTRL_string = "????"; + endcase + end + always @(*) begin + case(_zz_decode_to_execute_BRANCH_CTRL) + `BranchCtrlEnum_binary_sequential_INC : _zz_decode_to_execute_BRANCH_CTRL_string = "INC "; + `BranchCtrlEnum_binary_sequential_B : _zz_decode_to_execute_BRANCH_CTRL_string = "B "; + `BranchCtrlEnum_binary_sequential_JAL : _zz_decode_to_execute_BRANCH_CTRL_string = "JAL "; + `BranchCtrlEnum_binary_sequential_JALR : _zz_decode_to_execute_BRANCH_CTRL_string = "JALR"; + default : _zz_decode_to_execute_BRANCH_CTRL_string = "????"; + endcase + end + always @(*) begin + case(_zz_decode_to_execute_BRANCH_CTRL_1) + `BranchCtrlEnum_binary_sequential_INC : _zz_decode_to_execute_BRANCH_CTRL_1_string = "INC "; + `BranchCtrlEnum_binary_sequential_B : _zz_decode_to_execute_BRANCH_CTRL_1_string = "B "; + `BranchCtrlEnum_binary_sequential_JAL : _zz_decode_to_execute_BRANCH_CTRL_1_string = "JAL "; + `BranchCtrlEnum_binary_sequential_JALR : _zz_decode_to_execute_BRANCH_CTRL_1_string = "JALR"; + default : _zz_decode_to_execute_BRANCH_CTRL_1_string = "????"; + endcase + end + always @(*) begin + case(_zz_execute_to_memory_SHIFT_CTRL) + `ShiftCtrlEnum_binary_sequential_DISABLE_1 : _zz_execute_to_memory_SHIFT_CTRL_string = "DISABLE_1"; + `ShiftCtrlEnum_binary_sequential_SLL_1 : _zz_execute_to_memory_SHIFT_CTRL_string = "SLL_1 "; + `ShiftCtrlEnum_binary_sequential_SRL_1 : _zz_execute_to_memory_SHIFT_CTRL_string = "SRL_1 "; + `ShiftCtrlEnum_binary_sequential_SRA_1 : _zz_execute_to_memory_SHIFT_CTRL_string = "SRA_1 "; + default : _zz_execute_to_memory_SHIFT_CTRL_string = "?????????"; + endcase + end + always @(*) begin + case(_zz_execute_to_memory_SHIFT_CTRL_1) + `ShiftCtrlEnum_binary_sequential_DISABLE_1 : _zz_execute_to_memory_SHIFT_CTRL_1_string = "DISABLE_1"; + `ShiftCtrlEnum_binary_sequential_SLL_1 : _zz_execute_to_memory_SHIFT_CTRL_1_string = "SLL_1 "; + `ShiftCtrlEnum_binary_sequential_SRL_1 : _zz_execute_to_memory_SHIFT_CTRL_1_string = "SRL_1 "; + `ShiftCtrlEnum_binary_sequential_SRA_1 : _zz_execute_to_memory_SHIFT_CTRL_1_string = "SRA_1 "; + default : _zz_execute_to_memory_SHIFT_CTRL_1_string = "?????????"; + endcase + end + always @(*) begin + case(decode_SHIFT_CTRL) + `ShiftCtrlEnum_binary_sequential_DISABLE_1 : decode_SHIFT_CTRL_string = "DISABLE_1"; + `ShiftCtrlEnum_binary_sequential_SLL_1 : decode_SHIFT_CTRL_string = "SLL_1 "; + `ShiftCtrlEnum_binary_sequential_SRL_1 : decode_SHIFT_CTRL_string = "SRL_1 "; + `ShiftCtrlEnum_binary_sequential_SRA_1 : decode_SHIFT_CTRL_string = "SRA_1 "; + default : decode_SHIFT_CTRL_string = "?????????"; + endcase + end + always @(*) begin + case(_zz_decode_SHIFT_CTRL) + `ShiftCtrlEnum_binary_sequential_DISABLE_1 : _zz_decode_SHIFT_CTRL_string = "DISABLE_1"; + `ShiftCtrlEnum_binary_sequential_SLL_1 : _zz_decode_SHIFT_CTRL_string = "SLL_1 "; + `ShiftCtrlEnum_binary_sequential_SRL_1 : _zz_decode_SHIFT_CTRL_string = "SRL_1 "; + `ShiftCtrlEnum_binary_sequential_SRA_1 : _zz_decode_SHIFT_CTRL_string = "SRA_1 "; + default : _zz_decode_SHIFT_CTRL_string = "?????????"; + endcase + end + always @(*) begin + case(_zz_decode_to_execute_SHIFT_CTRL) + `ShiftCtrlEnum_binary_sequential_DISABLE_1 : _zz_decode_to_execute_SHIFT_CTRL_string = "DISABLE_1"; + `ShiftCtrlEnum_binary_sequential_SLL_1 : _zz_decode_to_execute_SHIFT_CTRL_string = "SLL_1 "; + `ShiftCtrlEnum_binary_sequential_SRL_1 : _zz_decode_to_execute_SHIFT_CTRL_string = "SRL_1 "; + `ShiftCtrlEnum_binary_sequential_SRA_1 : _zz_decode_to_execute_SHIFT_CTRL_string = "SRA_1 "; + default : _zz_decode_to_execute_SHIFT_CTRL_string = "?????????"; + endcase + end + always @(*) begin + case(_zz_decode_to_execute_SHIFT_CTRL_1) + `ShiftCtrlEnum_binary_sequential_DISABLE_1 : _zz_decode_to_execute_SHIFT_CTRL_1_string = "DISABLE_1"; + `ShiftCtrlEnum_binary_sequential_SLL_1 : _zz_decode_to_execute_SHIFT_CTRL_1_string = "SLL_1 "; + `ShiftCtrlEnum_binary_sequential_SRL_1 : _zz_decode_to_execute_SHIFT_CTRL_1_string = "SRL_1 "; + `ShiftCtrlEnum_binary_sequential_SRA_1 : _zz_decode_to_execute_SHIFT_CTRL_1_string = "SRA_1 "; + default : _zz_decode_to_execute_SHIFT_CTRL_1_string = "?????????"; + endcase + end + always @(*) begin + case(decode_ALU_BITWISE_CTRL) + `AluBitwiseCtrlEnum_binary_sequential_XOR_1 : decode_ALU_BITWISE_CTRL_string = "XOR_1"; + `AluBitwiseCtrlEnum_binary_sequential_OR_1 : decode_ALU_BITWISE_CTRL_string = "OR_1 "; + `AluBitwiseCtrlEnum_binary_sequential_AND_1 : decode_ALU_BITWISE_CTRL_string = "AND_1"; + default : decode_ALU_BITWISE_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(_zz_decode_ALU_BITWISE_CTRL) + `AluBitwiseCtrlEnum_binary_sequential_XOR_1 : _zz_decode_ALU_BITWISE_CTRL_string = "XOR_1"; + `AluBitwiseCtrlEnum_binary_sequential_OR_1 : _zz_decode_ALU_BITWISE_CTRL_string = "OR_1 "; + `AluBitwiseCtrlEnum_binary_sequential_AND_1 : _zz_decode_ALU_BITWISE_CTRL_string = "AND_1"; + default : _zz_decode_ALU_BITWISE_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(_zz_decode_to_execute_ALU_BITWISE_CTRL) + `AluBitwiseCtrlEnum_binary_sequential_XOR_1 : _zz_decode_to_execute_ALU_BITWISE_CTRL_string = "XOR_1"; + `AluBitwiseCtrlEnum_binary_sequential_OR_1 : _zz_decode_to_execute_ALU_BITWISE_CTRL_string = "OR_1 "; + `AluBitwiseCtrlEnum_binary_sequential_AND_1 : _zz_decode_to_execute_ALU_BITWISE_CTRL_string = "AND_1"; + default : _zz_decode_to_execute_ALU_BITWISE_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(_zz_decode_to_execute_ALU_BITWISE_CTRL_1) + `AluBitwiseCtrlEnum_binary_sequential_XOR_1 : _zz_decode_to_execute_ALU_BITWISE_CTRL_1_string = "XOR_1"; + `AluBitwiseCtrlEnum_binary_sequential_OR_1 : _zz_decode_to_execute_ALU_BITWISE_CTRL_1_string = "OR_1 "; + `AluBitwiseCtrlEnum_binary_sequential_AND_1 : _zz_decode_to_execute_ALU_BITWISE_CTRL_1_string = "AND_1"; + default : _zz_decode_to_execute_ALU_BITWISE_CTRL_1_string = "?????"; + endcase + end + always @(*) begin + case(decode_ALU_CTRL) + `AluCtrlEnum_binary_sequential_ADD_SUB : decode_ALU_CTRL_string = "ADD_SUB "; + `AluCtrlEnum_binary_sequential_SLT_SLTU : decode_ALU_CTRL_string = "SLT_SLTU"; + `AluCtrlEnum_binary_sequential_BITWISE : decode_ALU_CTRL_string = "BITWISE "; + default : decode_ALU_CTRL_string = "????????"; + endcase + end + always @(*) begin + case(_zz_decode_ALU_CTRL) + `AluCtrlEnum_binary_sequential_ADD_SUB : _zz_decode_ALU_CTRL_string = "ADD_SUB "; + `AluCtrlEnum_binary_sequential_SLT_SLTU : _zz_decode_ALU_CTRL_string = "SLT_SLTU"; + `AluCtrlEnum_binary_sequential_BITWISE : _zz_decode_ALU_CTRL_string = "BITWISE "; + default : _zz_decode_ALU_CTRL_string = "????????"; + endcase + end + always @(*) begin + case(_zz_decode_to_execute_ALU_CTRL) + `AluCtrlEnum_binary_sequential_ADD_SUB : _zz_decode_to_execute_ALU_CTRL_string = "ADD_SUB "; + `AluCtrlEnum_binary_sequential_SLT_SLTU : _zz_decode_to_execute_ALU_CTRL_string = "SLT_SLTU"; + `AluCtrlEnum_binary_sequential_BITWISE : _zz_decode_to_execute_ALU_CTRL_string = "BITWISE "; + default : _zz_decode_to_execute_ALU_CTRL_string = "????????"; + endcase + end + always @(*) begin + case(_zz_decode_to_execute_ALU_CTRL_1) + `AluCtrlEnum_binary_sequential_ADD_SUB : _zz_decode_to_execute_ALU_CTRL_1_string = "ADD_SUB "; + `AluCtrlEnum_binary_sequential_SLT_SLTU : _zz_decode_to_execute_ALU_CTRL_1_string = "SLT_SLTU"; + `AluCtrlEnum_binary_sequential_BITWISE : _zz_decode_to_execute_ALU_CTRL_1_string = "BITWISE "; + default : _zz_decode_to_execute_ALU_CTRL_1_string = "????????"; + endcase + end + always @(*) begin + case(decode_SRC2_CTRL) + `Src2CtrlEnum_binary_sequential_RS : decode_SRC2_CTRL_string = "RS "; + `Src2CtrlEnum_binary_sequential_IMI : decode_SRC2_CTRL_string = "IMI"; + `Src2CtrlEnum_binary_sequential_IMS : decode_SRC2_CTRL_string = "IMS"; + `Src2CtrlEnum_binary_sequential_PC : decode_SRC2_CTRL_string = "PC "; + default : decode_SRC2_CTRL_string = "???"; + endcase + end + always @(*) begin + case(_zz_decode_SRC2_CTRL) + `Src2CtrlEnum_binary_sequential_RS : _zz_decode_SRC2_CTRL_string = "RS "; + `Src2CtrlEnum_binary_sequential_IMI : _zz_decode_SRC2_CTRL_string = "IMI"; + `Src2CtrlEnum_binary_sequential_IMS : _zz_decode_SRC2_CTRL_string = "IMS"; + `Src2CtrlEnum_binary_sequential_PC : _zz_decode_SRC2_CTRL_string = "PC "; + default : _zz_decode_SRC2_CTRL_string = "???"; + endcase + end + always @(*) begin + case(_zz_decode_to_execute_SRC2_CTRL) + `Src2CtrlEnum_binary_sequential_RS : _zz_decode_to_execute_SRC2_CTRL_string = "RS "; + `Src2CtrlEnum_binary_sequential_IMI : _zz_decode_to_execute_SRC2_CTRL_string = "IMI"; + `Src2CtrlEnum_binary_sequential_IMS : _zz_decode_to_execute_SRC2_CTRL_string = "IMS"; + `Src2CtrlEnum_binary_sequential_PC : _zz_decode_to_execute_SRC2_CTRL_string = "PC "; + default : _zz_decode_to_execute_SRC2_CTRL_string = "???"; + endcase + end + always @(*) begin + case(_zz_decode_to_execute_SRC2_CTRL_1) + `Src2CtrlEnum_binary_sequential_RS : _zz_decode_to_execute_SRC2_CTRL_1_string = "RS "; + `Src2CtrlEnum_binary_sequential_IMI : _zz_decode_to_execute_SRC2_CTRL_1_string = "IMI"; + `Src2CtrlEnum_binary_sequential_IMS : _zz_decode_to_execute_SRC2_CTRL_1_string = "IMS"; + `Src2CtrlEnum_binary_sequential_PC : _zz_decode_to_execute_SRC2_CTRL_1_string = "PC "; + default : _zz_decode_to_execute_SRC2_CTRL_1_string = "???"; + endcase + end + always @(*) begin + case(decode_SRC1_CTRL) + `Src1CtrlEnum_binary_sequential_RS : decode_SRC1_CTRL_string = "RS "; + `Src1CtrlEnum_binary_sequential_IMU : decode_SRC1_CTRL_string = "IMU "; + `Src1CtrlEnum_binary_sequential_PC_INCREMENT : decode_SRC1_CTRL_string = "PC_INCREMENT"; + `Src1CtrlEnum_binary_sequential_URS1 : decode_SRC1_CTRL_string = "URS1 "; + default : decode_SRC1_CTRL_string = "????????????"; + endcase + end + always @(*) begin + case(_zz_decode_SRC1_CTRL) + `Src1CtrlEnum_binary_sequential_RS : _zz_decode_SRC1_CTRL_string = "RS "; + `Src1CtrlEnum_binary_sequential_IMU : _zz_decode_SRC1_CTRL_string = "IMU "; + `Src1CtrlEnum_binary_sequential_PC_INCREMENT : _zz_decode_SRC1_CTRL_string = "PC_INCREMENT"; + `Src1CtrlEnum_binary_sequential_URS1 : _zz_decode_SRC1_CTRL_string = "URS1 "; + default : _zz_decode_SRC1_CTRL_string = "????????????"; + endcase + end + always @(*) begin + case(_zz_decode_to_execute_SRC1_CTRL) + `Src1CtrlEnum_binary_sequential_RS : _zz_decode_to_execute_SRC1_CTRL_string = "RS "; + `Src1CtrlEnum_binary_sequential_IMU : _zz_decode_to_execute_SRC1_CTRL_string = "IMU "; + `Src1CtrlEnum_binary_sequential_PC_INCREMENT : _zz_decode_to_execute_SRC1_CTRL_string = "PC_INCREMENT"; + `Src1CtrlEnum_binary_sequential_URS1 : _zz_decode_to_execute_SRC1_CTRL_string = "URS1 "; + default : _zz_decode_to_execute_SRC1_CTRL_string = "????????????"; + endcase + end + always @(*) begin + case(_zz_decode_to_execute_SRC1_CTRL_1) + `Src1CtrlEnum_binary_sequential_RS : _zz_decode_to_execute_SRC1_CTRL_1_string = "RS "; + `Src1CtrlEnum_binary_sequential_IMU : _zz_decode_to_execute_SRC1_CTRL_1_string = "IMU "; + `Src1CtrlEnum_binary_sequential_PC_INCREMENT : _zz_decode_to_execute_SRC1_CTRL_1_string = "PC_INCREMENT"; + `Src1CtrlEnum_binary_sequential_URS1 : _zz_decode_to_execute_SRC1_CTRL_1_string = "URS1 "; + default : _zz_decode_to_execute_SRC1_CTRL_1_string = "????????????"; + endcase + end + always @(*) begin + case(memory_ENV_CTRL) + `EnvCtrlEnum_binary_sequential_NONE : memory_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : memory_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_binary_sequential_ECALL : memory_ENV_CTRL_string = "ECALL"; + default : memory_ENV_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(_zz_memory_ENV_CTRL) + `EnvCtrlEnum_binary_sequential_NONE : _zz_memory_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : _zz_memory_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_binary_sequential_ECALL : _zz_memory_ENV_CTRL_string = "ECALL"; + default : _zz_memory_ENV_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(execute_ENV_CTRL) + `EnvCtrlEnum_binary_sequential_NONE : execute_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : execute_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_binary_sequential_ECALL : execute_ENV_CTRL_string = "ECALL"; + default : execute_ENV_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(_zz_execute_ENV_CTRL) + `EnvCtrlEnum_binary_sequential_NONE : _zz_execute_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : _zz_execute_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_binary_sequential_ECALL : _zz_execute_ENV_CTRL_string = "ECALL"; + default : _zz_execute_ENV_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(writeBack_ENV_CTRL) + `EnvCtrlEnum_binary_sequential_NONE : writeBack_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : writeBack_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_binary_sequential_ECALL : writeBack_ENV_CTRL_string = "ECALL"; + default : writeBack_ENV_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(_zz_writeBack_ENV_CTRL) + `EnvCtrlEnum_binary_sequential_NONE : _zz_writeBack_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : _zz_writeBack_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_binary_sequential_ECALL : _zz_writeBack_ENV_CTRL_string = "ECALL"; + default : _zz_writeBack_ENV_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(execute_BRANCH_CTRL) + `BranchCtrlEnum_binary_sequential_INC : execute_BRANCH_CTRL_string = "INC "; + `BranchCtrlEnum_binary_sequential_B : execute_BRANCH_CTRL_string = "B "; + `BranchCtrlEnum_binary_sequential_JAL : execute_BRANCH_CTRL_string = "JAL "; + `BranchCtrlEnum_binary_sequential_JALR : execute_BRANCH_CTRL_string = "JALR"; + default : execute_BRANCH_CTRL_string = "????"; + endcase + end + always @(*) begin + case(_zz_execute_BRANCH_CTRL) + `BranchCtrlEnum_binary_sequential_INC : _zz_execute_BRANCH_CTRL_string = "INC "; + `BranchCtrlEnum_binary_sequential_B : _zz_execute_BRANCH_CTRL_string = "B "; + `BranchCtrlEnum_binary_sequential_JAL : _zz_execute_BRANCH_CTRL_string = "JAL "; + `BranchCtrlEnum_binary_sequential_JALR : _zz_execute_BRANCH_CTRL_string = "JALR"; + default : _zz_execute_BRANCH_CTRL_string = "????"; + endcase + end + always @(*) begin + case(memory_SHIFT_CTRL) + `ShiftCtrlEnum_binary_sequential_DISABLE_1 : memory_SHIFT_CTRL_string = "DISABLE_1"; + `ShiftCtrlEnum_binary_sequential_SLL_1 : memory_SHIFT_CTRL_string = "SLL_1 "; + `ShiftCtrlEnum_binary_sequential_SRL_1 : memory_SHIFT_CTRL_string = "SRL_1 "; + `ShiftCtrlEnum_binary_sequential_SRA_1 : memory_SHIFT_CTRL_string = "SRA_1 "; + default : memory_SHIFT_CTRL_string = "?????????"; + endcase + end + always @(*) begin + case(_zz_memory_SHIFT_CTRL) + `ShiftCtrlEnum_binary_sequential_DISABLE_1 : _zz_memory_SHIFT_CTRL_string = "DISABLE_1"; + `ShiftCtrlEnum_binary_sequential_SLL_1 : _zz_memory_SHIFT_CTRL_string = "SLL_1 "; + `ShiftCtrlEnum_binary_sequential_SRL_1 : _zz_memory_SHIFT_CTRL_string = "SRL_1 "; + `ShiftCtrlEnum_binary_sequential_SRA_1 : _zz_memory_SHIFT_CTRL_string = "SRA_1 "; + default : _zz_memory_SHIFT_CTRL_string = "?????????"; + endcase + end + always @(*) begin + case(execute_SHIFT_CTRL) + `ShiftCtrlEnum_binary_sequential_DISABLE_1 : execute_SHIFT_CTRL_string = "DISABLE_1"; + `ShiftCtrlEnum_binary_sequential_SLL_1 : execute_SHIFT_CTRL_string = "SLL_1 "; + `ShiftCtrlEnum_binary_sequential_SRL_1 : execute_SHIFT_CTRL_string = "SRL_1 "; + `ShiftCtrlEnum_binary_sequential_SRA_1 : execute_SHIFT_CTRL_string = "SRA_1 "; + default : execute_SHIFT_CTRL_string = "?????????"; + endcase + end + always @(*) begin + case(_zz_execute_SHIFT_CTRL) + `ShiftCtrlEnum_binary_sequential_DISABLE_1 : _zz_execute_SHIFT_CTRL_string = "DISABLE_1"; + `ShiftCtrlEnum_binary_sequential_SLL_1 : _zz_execute_SHIFT_CTRL_string = "SLL_1 "; + `ShiftCtrlEnum_binary_sequential_SRL_1 : _zz_execute_SHIFT_CTRL_string = "SRL_1 "; + `ShiftCtrlEnum_binary_sequential_SRA_1 : _zz_execute_SHIFT_CTRL_string = "SRA_1 "; + default : _zz_execute_SHIFT_CTRL_string = "?????????"; + endcase + end + always @(*) begin + case(execute_SRC2_CTRL) + `Src2CtrlEnum_binary_sequential_RS : execute_SRC2_CTRL_string = "RS "; + `Src2CtrlEnum_binary_sequential_IMI : execute_SRC2_CTRL_string = "IMI"; + `Src2CtrlEnum_binary_sequential_IMS : execute_SRC2_CTRL_string = "IMS"; + `Src2CtrlEnum_binary_sequential_PC : execute_SRC2_CTRL_string = "PC "; + default : execute_SRC2_CTRL_string = "???"; + endcase + end + always @(*) begin + case(_zz_execute_SRC2_CTRL) + `Src2CtrlEnum_binary_sequential_RS : _zz_execute_SRC2_CTRL_string = "RS "; + `Src2CtrlEnum_binary_sequential_IMI : _zz_execute_SRC2_CTRL_string = "IMI"; + `Src2CtrlEnum_binary_sequential_IMS : _zz_execute_SRC2_CTRL_string = "IMS"; + `Src2CtrlEnum_binary_sequential_PC : _zz_execute_SRC2_CTRL_string = "PC "; + default : _zz_execute_SRC2_CTRL_string = "???"; + endcase + end + always @(*) begin + case(execute_SRC1_CTRL) + `Src1CtrlEnum_binary_sequential_RS : execute_SRC1_CTRL_string = "RS "; + `Src1CtrlEnum_binary_sequential_IMU : execute_SRC1_CTRL_string = "IMU "; + `Src1CtrlEnum_binary_sequential_PC_INCREMENT : execute_SRC1_CTRL_string = "PC_INCREMENT"; + `Src1CtrlEnum_binary_sequential_URS1 : execute_SRC1_CTRL_string = "URS1 "; + default : execute_SRC1_CTRL_string = "????????????"; + endcase + end + always @(*) begin + case(_zz_execute_SRC1_CTRL) + `Src1CtrlEnum_binary_sequential_RS : _zz_execute_SRC1_CTRL_string = "RS "; + `Src1CtrlEnum_binary_sequential_IMU : _zz_execute_SRC1_CTRL_string = "IMU "; + `Src1CtrlEnum_binary_sequential_PC_INCREMENT : _zz_execute_SRC1_CTRL_string = "PC_INCREMENT"; + `Src1CtrlEnum_binary_sequential_URS1 : _zz_execute_SRC1_CTRL_string = "URS1 "; + default : _zz_execute_SRC1_CTRL_string = "????????????"; + endcase + end + always @(*) begin + case(execute_ALU_CTRL) + `AluCtrlEnum_binary_sequential_ADD_SUB : execute_ALU_CTRL_string = "ADD_SUB "; + `AluCtrlEnum_binary_sequential_SLT_SLTU : execute_ALU_CTRL_string = "SLT_SLTU"; + `AluCtrlEnum_binary_sequential_BITWISE : execute_ALU_CTRL_string = "BITWISE "; + default : execute_ALU_CTRL_string = "????????"; + endcase + end + always @(*) begin + case(_zz_execute_ALU_CTRL) + `AluCtrlEnum_binary_sequential_ADD_SUB : _zz_execute_ALU_CTRL_string = "ADD_SUB "; + `AluCtrlEnum_binary_sequential_SLT_SLTU : _zz_execute_ALU_CTRL_string = "SLT_SLTU"; + `AluCtrlEnum_binary_sequential_BITWISE : _zz_execute_ALU_CTRL_string = "BITWISE "; + default : _zz_execute_ALU_CTRL_string = "????????"; + endcase + end + always @(*) begin + case(execute_ALU_BITWISE_CTRL) + `AluBitwiseCtrlEnum_binary_sequential_XOR_1 : execute_ALU_BITWISE_CTRL_string = "XOR_1"; + `AluBitwiseCtrlEnum_binary_sequential_OR_1 : execute_ALU_BITWISE_CTRL_string = "OR_1 "; + `AluBitwiseCtrlEnum_binary_sequential_AND_1 : execute_ALU_BITWISE_CTRL_string = "AND_1"; + default : execute_ALU_BITWISE_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(_zz_execute_ALU_BITWISE_CTRL) + `AluBitwiseCtrlEnum_binary_sequential_XOR_1 : _zz_execute_ALU_BITWISE_CTRL_string = "XOR_1"; + `AluBitwiseCtrlEnum_binary_sequential_OR_1 : _zz_execute_ALU_BITWISE_CTRL_string = "OR_1 "; + `AluBitwiseCtrlEnum_binary_sequential_AND_1 : _zz_execute_ALU_BITWISE_CTRL_string = "AND_1"; + default : _zz_execute_ALU_BITWISE_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(_zz_decode_ENV_CTRL_1) + `EnvCtrlEnum_binary_sequential_NONE : _zz_decode_ENV_CTRL_1_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : _zz_decode_ENV_CTRL_1_string = "XRET "; + `EnvCtrlEnum_binary_sequential_ECALL : _zz_decode_ENV_CTRL_1_string = "ECALL"; + default : _zz_decode_ENV_CTRL_1_string = "?????"; + endcase + end + always @(*) begin + case(_zz_decode_BRANCH_CTRL_1) + `BranchCtrlEnum_binary_sequential_INC : _zz_decode_BRANCH_CTRL_1_string = "INC "; + `BranchCtrlEnum_binary_sequential_B : _zz_decode_BRANCH_CTRL_1_string = "B "; + `BranchCtrlEnum_binary_sequential_JAL : _zz_decode_BRANCH_CTRL_1_string = "JAL "; + `BranchCtrlEnum_binary_sequential_JALR : _zz_decode_BRANCH_CTRL_1_string = "JALR"; + default : _zz_decode_BRANCH_CTRL_1_string = "????"; + endcase + end + always @(*) begin + case(_zz_decode_SHIFT_CTRL_1) + `ShiftCtrlEnum_binary_sequential_DISABLE_1 : _zz_decode_SHIFT_CTRL_1_string = "DISABLE_1"; + `ShiftCtrlEnum_binary_sequential_SLL_1 : _zz_decode_SHIFT_CTRL_1_string = "SLL_1 "; + `ShiftCtrlEnum_binary_sequential_SRL_1 : _zz_decode_SHIFT_CTRL_1_string = "SRL_1 "; + `ShiftCtrlEnum_binary_sequential_SRA_1 : _zz_decode_SHIFT_CTRL_1_string = "SRA_1 "; + default : _zz_decode_SHIFT_CTRL_1_string = "?????????"; + endcase + end + always @(*) begin + case(_zz_decode_ALU_BITWISE_CTRL_1) + `AluBitwiseCtrlEnum_binary_sequential_XOR_1 : _zz_decode_ALU_BITWISE_CTRL_1_string = "XOR_1"; + `AluBitwiseCtrlEnum_binary_sequential_OR_1 : _zz_decode_ALU_BITWISE_CTRL_1_string = "OR_1 "; + `AluBitwiseCtrlEnum_binary_sequential_AND_1 : _zz_decode_ALU_BITWISE_CTRL_1_string = "AND_1"; + default : _zz_decode_ALU_BITWISE_CTRL_1_string = "?????"; + endcase + end + always @(*) begin + case(_zz_decode_ALU_CTRL_1) + `AluCtrlEnum_binary_sequential_ADD_SUB : _zz_decode_ALU_CTRL_1_string = "ADD_SUB "; + `AluCtrlEnum_binary_sequential_SLT_SLTU : _zz_decode_ALU_CTRL_1_string = "SLT_SLTU"; + `AluCtrlEnum_binary_sequential_BITWISE : _zz_decode_ALU_CTRL_1_string = "BITWISE "; + default : _zz_decode_ALU_CTRL_1_string = "????????"; + endcase + end + always @(*) begin + case(_zz_decode_SRC2_CTRL_1) + `Src2CtrlEnum_binary_sequential_RS : _zz_decode_SRC2_CTRL_1_string = "RS "; + `Src2CtrlEnum_binary_sequential_IMI : _zz_decode_SRC2_CTRL_1_string = "IMI"; + `Src2CtrlEnum_binary_sequential_IMS : _zz_decode_SRC2_CTRL_1_string = "IMS"; + `Src2CtrlEnum_binary_sequential_PC : _zz_decode_SRC2_CTRL_1_string = "PC "; + default : _zz_decode_SRC2_CTRL_1_string = "???"; + endcase + end + always @(*) begin + case(_zz_decode_SRC1_CTRL_1) + `Src1CtrlEnum_binary_sequential_RS : _zz_decode_SRC1_CTRL_1_string = "RS "; + `Src1CtrlEnum_binary_sequential_IMU : _zz_decode_SRC1_CTRL_1_string = "IMU "; + `Src1CtrlEnum_binary_sequential_PC_INCREMENT : _zz_decode_SRC1_CTRL_1_string = "PC_INCREMENT"; + `Src1CtrlEnum_binary_sequential_URS1 : _zz_decode_SRC1_CTRL_1_string = "URS1 "; + default : _zz_decode_SRC1_CTRL_1_string = "????????????"; + endcase + end + always @(*) begin + case(_zz_decode_SRC1_CTRL_2) + `Src1CtrlEnum_binary_sequential_RS : _zz_decode_SRC1_CTRL_2_string = "RS "; + `Src1CtrlEnum_binary_sequential_IMU : _zz_decode_SRC1_CTRL_2_string = "IMU "; + `Src1CtrlEnum_binary_sequential_PC_INCREMENT : _zz_decode_SRC1_CTRL_2_string = "PC_INCREMENT"; + `Src1CtrlEnum_binary_sequential_URS1 : _zz_decode_SRC1_CTRL_2_string = "URS1 "; + default : _zz_decode_SRC1_CTRL_2_string = "????????????"; + endcase + end + always @(*) begin + case(_zz_decode_SRC2_CTRL_2) + `Src2CtrlEnum_binary_sequential_RS : _zz_decode_SRC2_CTRL_2_string = "RS "; + `Src2CtrlEnum_binary_sequential_IMI : _zz_decode_SRC2_CTRL_2_string = "IMI"; + `Src2CtrlEnum_binary_sequential_IMS : _zz_decode_SRC2_CTRL_2_string = "IMS"; + `Src2CtrlEnum_binary_sequential_PC : _zz_decode_SRC2_CTRL_2_string = "PC "; + default : _zz_decode_SRC2_CTRL_2_string = "???"; + endcase + end + always @(*) begin + case(_zz_decode_ALU_CTRL_2) + `AluCtrlEnum_binary_sequential_ADD_SUB : _zz_decode_ALU_CTRL_2_string = "ADD_SUB "; + `AluCtrlEnum_binary_sequential_SLT_SLTU : _zz_decode_ALU_CTRL_2_string = "SLT_SLTU"; + `AluCtrlEnum_binary_sequential_BITWISE : _zz_decode_ALU_CTRL_2_string = "BITWISE "; + default : _zz_decode_ALU_CTRL_2_string = "????????"; + endcase + end + always @(*) begin + case(_zz_decode_ALU_BITWISE_CTRL_2) + `AluBitwiseCtrlEnum_binary_sequential_XOR_1 : _zz_decode_ALU_BITWISE_CTRL_2_string = "XOR_1"; + `AluBitwiseCtrlEnum_binary_sequential_OR_1 : _zz_decode_ALU_BITWISE_CTRL_2_string = "OR_1 "; + `AluBitwiseCtrlEnum_binary_sequential_AND_1 : _zz_decode_ALU_BITWISE_CTRL_2_string = "AND_1"; + default : _zz_decode_ALU_BITWISE_CTRL_2_string = "?????"; + endcase + end + always @(*) begin + case(_zz_decode_SHIFT_CTRL_2) + `ShiftCtrlEnum_binary_sequential_DISABLE_1 : _zz_decode_SHIFT_CTRL_2_string = "DISABLE_1"; + `ShiftCtrlEnum_binary_sequential_SLL_1 : _zz_decode_SHIFT_CTRL_2_string = "SLL_1 "; + `ShiftCtrlEnum_binary_sequential_SRL_1 : _zz_decode_SHIFT_CTRL_2_string = "SRL_1 "; + `ShiftCtrlEnum_binary_sequential_SRA_1 : _zz_decode_SHIFT_CTRL_2_string = "SRA_1 "; + default : _zz_decode_SHIFT_CTRL_2_string = "?????????"; + endcase + end + always @(*) begin + case(_zz_decode_BRANCH_CTRL_2) + `BranchCtrlEnum_binary_sequential_INC : _zz_decode_BRANCH_CTRL_2_string = "INC "; + `BranchCtrlEnum_binary_sequential_B : _zz_decode_BRANCH_CTRL_2_string = "B "; + `BranchCtrlEnum_binary_sequential_JAL : _zz_decode_BRANCH_CTRL_2_string = "JAL "; + `BranchCtrlEnum_binary_sequential_JALR : _zz_decode_BRANCH_CTRL_2_string = "JALR"; + default : _zz_decode_BRANCH_CTRL_2_string = "????"; + endcase + end + always @(*) begin + case(_zz_decode_ENV_CTRL_2) + `EnvCtrlEnum_binary_sequential_NONE : _zz_decode_ENV_CTRL_2_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : _zz_decode_ENV_CTRL_2_string = "XRET "; + `EnvCtrlEnum_binary_sequential_ECALL : _zz_decode_ENV_CTRL_2_string = "ECALL"; + default : _zz_decode_ENV_CTRL_2_string = "?????"; + endcase + end + always @(*) begin + case(decode_to_execute_SRC1_CTRL) + `Src1CtrlEnum_binary_sequential_RS : decode_to_execute_SRC1_CTRL_string = "RS "; + `Src1CtrlEnum_binary_sequential_IMU : decode_to_execute_SRC1_CTRL_string = "IMU "; + `Src1CtrlEnum_binary_sequential_PC_INCREMENT : decode_to_execute_SRC1_CTRL_string = "PC_INCREMENT"; + `Src1CtrlEnum_binary_sequential_URS1 : decode_to_execute_SRC1_CTRL_string = "URS1 "; + default : decode_to_execute_SRC1_CTRL_string = "????????????"; + endcase + end + always @(*) begin + case(decode_to_execute_SRC2_CTRL) + `Src2CtrlEnum_binary_sequential_RS : decode_to_execute_SRC2_CTRL_string = "RS "; + `Src2CtrlEnum_binary_sequential_IMI : decode_to_execute_SRC2_CTRL_string = "IMI"; + `Src2CtrlEnum_binary_sequential_IMS : decode_to_execute_SRC2_CTRL_string = "IMS"; + `Src2CtrlEnum_binary_sequential_PC : decode_to_execute_SRC2_CTRL_string = "PC "; + default : decode_to_execute_SRC2_CTRL_string = "???"; + endcase + end + always @(*) begin + case(decode_to_execute_ALU_CTRL) + `AluCtrlEnum_binary_sequential_ADD_SUB : decode_to_execute_ALU_CTRL_string = "ADD_SUB "; + `AluCtrlEnum_binary_sequential_SLT_SLTU : decode_to_execute_ALU_CTRL_string = "SLT_SLTU"; + `AluCtrlEnum_binary_sequential_BITWISE : decode_to_execute_ALU_CTRL_string = "BITWISE "; + default : decode_to_execute_ALU_CTRL_string = "????????"; + endcase + end + always @(*) begin + case(decode_to_execute_ALU_BITWISE_CTRL) + `AluBitwiseCtrlEnum_binary_sequential_XOR_1 : decode_to_execute_ALU_BITWISE_CTRL_string = "XOR_1"; + `AluBitwiseCtrlEnum_binary_sequential_OR_1 : decode_to_execute_ALU_BITWISE_CTRL_string = "OR_1 "; + `AluBitwiseCtrlEnum_binary_sequential_AND_1 : decode_to_execute_ALU_BITWISE_CTRL_string = "AND_1"; + default : decode_to_execute_ALU_BITWISE_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(decode_to_execute_SHIFT_CTRL) + `ShiftCtrlEnum_binary_sequential_DISABLE_1 : decode_to_execute_SHIFT_CTRL_string = "DISABLE_1"; + `ShiftCtrlEnum_binary_sequential_SLL_1 : decode_to_execute_SHIFT_CTRL_string = "SLL_1 "; + `ShiftCtrlEnum_binary_sequential_SRL_1 : decode_to_execute_SHIFT_CTRL_string = "SRL_1 "; + `ShiftCtrlEnum_binary_sequential_SRA_1 : decode_to_execute_SHIFT_CTRL_string = "SRA_1 "; + default : decode_to_execute_SHIFT_CTRL_string = "?????????"; + endcase + end + always @(*) begin + case(execute_to_memory_SHIFT_CTRL) + `ShiftCtrlEnum_binary_sequential_DISABLE_1 : execute_to_memory_SHIFT_CTRL_string = "DISABLE_1"; + `ShiftCtrlEnum_binary_sequential_SLL_1 : execute_to_memory_SHIFT_CTRL_string = "SLL_1 "; + `ShiftCtrlEnum_binary_sequential_SRL_1 : execute_to_memory_SHIFT_CTRL_string = "SRL_1 "; + `ShiftCtrlEnum_binary_sequential_SRA_1 : execute_to_memory_SHIFT_CTRL_string = "SRA_1 "; + default : execute_to_memory_SHIFT_CTRL_string = "?????????"; + endcase + end + always @(*) begin + case(decode_to_execute_BRANCH_CTRL) + `BranchCtrlEnum_binary_sequential_INC : decode_to_execute_BRANCH_CTRL_string = "INC "; + `BranchCtrlEnum_binary_sequential_B : decode_to_execute_BRANCH_CTRL_string = "B "; + `BranchCtrlEnum_binary_sequential_JAL : decode_to_execute_BRANCH_CTRL_string = "JAL "; + `BranchCtrlEnum_binary_sequential_JALR : decode_to_execute_BRANCH_CTRL_string = "JALR"; + default : decode_to_execute_BRANCH_CTRL_string = "????"; + endcase + end + always @(*) begin + case(decode_to_execute_ENV_CTRL) + `EnvCtrlEnum_binary_sequential_NONE : decode_to_execute_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : decode_to_execute_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_binary_sequential_ECALL : decode_to_execute_ENV_CTRL_string = "ECALL"; + default : decode_to_execute_ENV_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(execute_to_memory_ENV_CTRL) + `EnvCtrlEnum_binary_sequential_NONE : execute_to_memory_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : execute_to_memory_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_binary_sequential_ECALL : execute_to_memory_ENV_CTRL_string = "ECALL"; + default : execute_to_memory_ENV_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(memory_to_writeBack_ENV_CTRL) + `EnvCtrlEnum_binary_sequential_NONE : memory_to_writeBack_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : memory_to_writeBack_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_binary_sequential_ECALL : memory_to_writeBack_ENV_CTRL_string = "ECALL"; + default : memory_to_writeBack_ENV_CTRL_string = "?????"; + endcase + end + `endif + + assign memory_MUL_LOW = ($signed(_zz_memory_MUL_LOW) + $signed(_zz_memory_MUL_LOW_7)); + assign memory_MEMORY_READ_DATA = dBus_rsp_data; + assign memory_MUL_HH = execute_to_memory_MUL_HH; + assign execute_MUL_HH = ($signed(execute_MulPlugin_aHigh) * $signed(execute_MulPlugin_bHigh)); + assign execute_MUL_HL = ($signed(execute_MulPlugin_aHigh) * $signed(execute_MulPlugin_bSLow)); + assign execute_MUL_LH = ($signed(execute_MulPlugin_aSLow) * $signed(execute_MulPlugin_bHigh)); + assign execute_MUL_LL = (execute_MulPlugin_aULow * execute_MulPlugin_bULow); + assign execute_BRANCH_CALC = {execute_BranchPlugin_branchAdder[31 : 1],1'b0}; + assign execute_BRANCH_DO = _zz_execute_BRANCH_DO_1; + assign execute_SHIFT_RIGHT = _zz_execute_SHIFT_RIGHT; + assign writeBack_REGFILE_WRITE_DATA = memory_to_writeBack_REGFILE_WRITE_DATA; + assign memory_REGFILE_WRITE_DATA = execute_to_memory_REGFILE_WRITE_DATA; + assign execute_REGFILE_WRITE_DATA = _zz_execute_REGFILE_WRITE_DATA; + assign memory_MEMORY_ADDRESS_LOW = execute_to_memory_MEMORY_ADDRESS_LOW; + assign execute_MEMORY_ADDRESS_LOW = dBus_cmd_payload_address[1 : 0]; + assign decode_CSR_READ_OPCODE = (decode_INSTRUCTION[13 : 7] != 7'h20); + assign decode_CSR_WRITE_OPCODE = (! (((decode_INSTRUCTION[14 : 13] == 2'b01) && (decode_INSTRUCTION[19 : 15] == 5'h0)) || ((decode_INSTRUCTION[14 : 13] == 2'b11) && (decode_INSTRUCTION[19 : 15] == 5'h0)))); + assign decode_SRC2_FORCE_ZERO = (decode_SRC_ADD_ZERO && (! decode_SRC_USE_SUB_LESS)); + assign decode_RS2 = decode_RegFilePlugin_rs2Data; + assign decode_RS1 = decode_RegFilePlugin_rs1Data; + assign memory_IS_MUL = execute_to_memory_IS_MUL; + assign execute_IS_MUL = decode_to_execute_IS_MUL; + assign decode_IS_MUL = _zz_decode_IS_MUL[27]; + assign _zz_memory_to_writeBack_ENV_CTRL = _zz_memory_to_writeBack_ENV_CTRL_1; + assign _zz_execute_to_memory_ENV_CTRL = _zz_execute_to_memory_ENV_CTRL_1; + assign decode_ENV_CTRL = _zz_decode_ENV_CTRL; + assign _zz_decode_to_execute_ENV_CTRL = _zz_decode_to_execute_ENV_CTRL_1; + assign decode_IS_CSR = _zz_decode_IS_MUL[24]; + assign decode_BRANCH_CTRL = _zz_decode_BRANCH_CTRL; + assign _zz_decode_to_execute_BRANCH_CTRL = _zz_decode_to_execute_BRANCH_CTRL_1; + assign _zz_execute_to_memory_SHIFT_CTRL = _zz_execute_to_memory_SHIFT_CTRL_1; + assign decode_SHIFT_CTRL = _zz_decode_SHIFT_CTRL; + assign _zz_decode_to_execute_SHIFT_CTRL = _zz_decode_to_execute_SHIFT_CTRL_1; + assign decode_ALU_BITWISE_CTRL = _zz_decode_ALU_BITWISE_CTRL; + assign _zz_decode_to_execute_ALU_BITWISE_CTRL = _zz_decode_to_execute_ALU_BITWISE_CTRL_1; + assign decode_SRC_LESS_UNSIGNED = _zz_decode_IS_MUL[15]; + assign decode_ALU_CTRL = _zz_decode_ALU_CTRL; + assign _zz_decode_to_execute_ALU_CTRL = _zz_decode_to_execute_ALU_CTRL_1; + assign decode_MEMORY_STORE = _zz_decode_IS_MUL[11]; + assign execute_BYPASSABLE_MEMORY_STAGE = decode_to_execute_BYPASSABLE_MEMORY_STAGE; + assign decode_BYPASSABLE_MEMORY_STAGE = _zz_decode_IS_MUL[10]; + assign decode_BYPASSABLE_EXECUTE_STAGE = _zz_decode_IS_MUL[9]; + assign decode_SRC2_CTRL = _zz_decode_SRC2_CTRL; + assign _zz_decode_to_execute_SRC2_CTRL = _zz_decode_to_execute_SRC2_CTRL_1; + assign decode_MEMORY_ENABLE = _zz_decode_IS_MUL[4]; + assign decode_SRC1_CTRL = _zz_decode_SRC1_CTRL; + assign _zz_decode_to_execute_SRC1_CTRL = _zz_decode_to_execute_SRC1_CTRL_1; + assign writeBack_FORMAL_PC_NEXT = memory_to_writeBack_FORMAL_PC_NEXT; + assign memory_FORMAL_PC_NEXT = execute_to_memory_FORMAL_PC_NEXT; + assign execute_FORMAL_PC_NEXT = decode_to_execute_FORMAL_PC_NEXT; + assign decode_FORMAL_PC_NEXT = (decode_PC + 32'h00000004); + assign memory_PC = execute_to_memory_PC; + assign writeBack_IS_MUL = memory_to_writeBack_IS_MUL; + assign writeBack_MUL_HH = memory_to_writeBack_MUL_HH; + assign writeBack_MUL_LOW = memory_to_writeBack_MUL_LOW; + assign memory_MUL_HL = execute_to_memory_MUL_HL; + assign memory_MUL_LH = execute_to_memory_MUL_LH; + assign memory_MUL_LL = execute_to_memory_MUL_LL; + always @(*) begin + _zz_execute_to_memory_REGFILE_WRITE_DATA = execute_REGFILE_WRITE_DATA; + if(when_CsrPlugin_l1176) begin + _zz_execute_to_memory_REGFILE_WRITE_DATA = CsrPlugin_csrMapping_readDataSignal; + end + end + + assign execute_CSR_READ_OPCODE = decode_to_execute_CSR_READ_OPCODE; + assign execute_CSR_WRITE_OPCODE = decode_to_execute_CSR_WRITE_OPCODE; + assign execute_IS_CSR = decode_to_execute_IS_CSR; + assign memory_ENV_CTRL = _zz_memory_ENV_CTRL; + assign execute_ENV_CTRL = _zz_execute_ENV_CTRL; + assign writeBack_ENV_CTRL = _zz_writeBack_ENV_CTRL; + assign memory_BRANCH_CALC = execute_to_memory_BRANCH_CALC; + assign memory_BRANCH_DO = execute_to_memory_BRANCH_DO; + assign execute_PC = decode_to_execute_PC; + assign execute_RS1 = decode_to_execute_RS1; + assign execute_BRANCH_CTRL = _zz_execute_BRANCH_CTRL; + assign decode_RS2_USE = _zz_decode_IS_MUL[12]; + assign decode_RS1_USE = _zz_decode_IS_MUL[5]; + assign execute_REGFILE_WRITE_VALID = decode_to_execute_REGFILE_WRITE_VALID; + assign execute_BYPASSABLE_EXECUTE_STAGE = decode_to_execute_BYPASSABLE_EXECUTE_STAGE; + assign memory_REGFILE_WRITE_VALID = execute_to_memory_REGFILE_WRITE_VALID; + assign memory_INSTRUCTION = execute_to_memory_INSTRUCTION; + assign memory_BYPASSABLE_MEMORY_STAGE = execute_to_memory_BYPASSABLE_MEMORY_STAGE; + assign writeBack_REGFILE_WRITE_VALID = memory_to_writeBack_REGFILE_WRITE_VALID; + assign memory_SHIFT_RIGHT = execute_to_memory_SHIFT_RIGHT; + always @(*) begin + _zz_memory_to_writeBack_REGFILE_WRITE_DATA = memory_REGFILE_WRITE_DATA; + if(memory_arbitration_isValid) begin + case(memory_SHIFT_CTRL) + `ShiftCtrlEnum_binary_sequential_SLL_1 : begin + _zz_memory_to_writeBack_REGFILE_WRITE_DATA = _zz_memory_to_writeBack_REGFILE_WRITE_DATA_1; + end + `ShiftCtrlEnum_binary_sequential_SRL_1, `ShiftCtrlEnum_binary_sequential_SRA_1 : begin + _zz_memory_to_writeBack_REGFILE_WRITE_DATA = memory_SHIFT_RIGHT; + end + default : begin + end + endcase + end + end + + assign memory_SHIFT_CTRL = _zz_memory_SHIFT_CTRL; + assign execute_SHIFT_CTRL = _zz_execute_SHIFT_CTRL; + assign execute_SRC_LESS_UNSIGNED = decode_to_execute_SRC_LESS_UNSIGNED; + assign execute_SRC2_FORCE_ZERO = decode_to_execute_SRC2_FORCE_ZERO; + assign execute_SRC_USE_SUB_LESS = decode_to_execute_SRC_USE_SUB_LESS; + assign _zz_execute_SRC2 = execute_PC; + assign execute_SRC2_CTRL = _zz_execute_SRC2_CTRL; + assign execute_SRC1_CTRL = _zz_execute_SRC1_CTRL; + assign decode_SRC_USE_SUB_LESS = _zz_decode_IS_MUL[3]; + assign decode_SRC_ADD_ZERO = _zz_decode_IS_MUL[18]; + assign execute_SRC_ADD_SUB = execute_SrcPlugin_addSub; + assign execute_SRC_LESS = execute_SrcPlugin_less; + assign execute_ALU_CTRL = _zz_execute_ALU_CTRL; + assign execute_SRC2 = _zz_execute_SRC2_5; + assign execute_SRC1 = _zz_execute_SRC1; + assign execute_ALU_BITWISE_CTRL = _zz_execute_ALU_BITWISE_CTRL; + assign _zz_lastStageRegFileWrite_payload_address = writeBack_INSTRUCTION; + assign _zz_lastStageRegFileWrite_valid = writeBack_REGFILE_WRITE_VALID; + always @(*) begin + _zz_1 = 1'b0; + if(lastStageRegFileWrite_valid) begin + _zz_1 = 1'b1; + end + end + + assign decode_INSTRUCTION_ANTICIPATED = (decode_arbitration_isStuck ? decode_INSTRUCTION : IBusCachedPlugin_cache_io_cpu_fetch_data); + always @(*) begin + decode_REGFILE_WRITE_VALID = _zz_decode_IS_MUL[8]; + if(when_RegFilePlugin_l63) begin + decode_REGFILE_WRITE_VALID = 1'b0; + end + end + + assign decode_LEGAL_INSTRUCTION = ({((decode_INSTRUCTION & 32'h0000005f) == 32'h00000017),{((decode_INSTRUCTION & 32'h0000007f) == 32'h0000006f),{((decode_INSTRUCTION & 32'h0000106f) == 32'h00000003),{((decode_INSTRUCTION & _zz_decode_LEGAL_INSTRUCTION) == 32'h00001073),{(_zz_decode_LEGAL_INSTRUCTION_1 == _zz_decode_LEGAL_INSTRUCTION_2),{_zz_decode_LEGAL_INSTRUCTION_3,{_zz_decode_LEGAL_INSTRUCTION_4,_zz_decode_LEGAL_INSTRUCTION_5}}}}}}} != 21'h0); + assign writeBack_MEMORY_STORE = memory_to_writeBack_MEMORY_STORE; + always @(*) begin + _zz_lastStageRegFileWrite_payload_data = writeBack_REGFILE_WRITE_DATA; + if(when_DBusSimplePlugin_l558) begin + _zz_lastStageRegFileWrite_payload_data = writeBack_DBusSimplePlugin_rspFormated; + end + if(when_MulPlugin_l147) begin + case(switch_MulPlugin_l148) + 2'b00 : begin + _zz_lastStageRegFileWrite_payload_data = _zz__zz_lastStageRegFileWrite_payload_data; + end + default : begin + _zz_lastStageRegFileWrite_payload_data = _zz__zz_lastStageRegFileWrite_payload_data_1; + end + endcase + end + end + + assign writeBack_MEMORY_ENABLE = memory_to_writeBack_MEMORY_ENABLE; + assign writeBack_MEMORY_ADDRESS_LOW = memory_to_writeBack_MEMORY_ADDRESS_LOW; + assign writeBack_MEMORY_READ_DATA = memory_to_writeBack_MEMORY_READ_DATA; + assign memory_MEMORY_STORE = execute_to_memory_MEMORY_STORE; + assign memory_MEMORY_ENABLE = execute_to_memory_MEMORY_ENABLE; + assign execute_SRC_ADD = execute_SrcPlugin_addSub; + assign execute_RS2 = decode_to_execute_RS2; + assign execute_INSTRUCTION = decode_to_execute_INSTRUCTION; + assign execute_MEMORY_STORE = decode_to_execute_MEMORY_STORE; + assign execute_MEMORY_ENABLE = decode_to_execute_MEMORY_ENABLE; + assign execute_ALIGNEMENT_FAULT = 1'b0; + assign decode_FLUSH_ALL = _zz_decode_IS_MUL[0]; + always @(*) begin + IBusCachedPlugin_rsp_issueDetected_2 = IBusCachedPlugin_rsp_issueDetected_1; + if(when_IBusCachedPlugin_l250) begin + IBusCachedPlugin_rsp_issueDetected_2 = 1'b1; + end + end + + always @(*) begin + IBusCachedPlugin_rsp_issueDetected_1 = IBusCachedPlugin_rsp_issueDetected; + if(when_IBusCachedPlugin_l239) begin + IBusCachedPlugin_rsp_issueDetected_1 = 1'b1; + end + end + + assign decode_INSTRUCTION = IBusCachedPlugin_iBusRsp_output_payload_rsp_inst; + always @(*) begin + _zz_memory_to_writeBack_FORMAL_PC_NEXT = memory_FORMAL_PC_NEXT; + if(BranchPlugin_jumpInterface_valid) begin + _zz_memory_to_writeBack_FORMAL_PC_NEXT = BranchPlugin_jumpInterface_payload; + end + end + + assign decode_PC = IBusCachedPlugin_iBusRsp_output_payload_pc; + assign writeBack_PC = memory_to_writeBack_PC; + assign writeBack_INSTRUCTION = memory_to_writeBack_INSTRUCTION; + assign decode_arbitration_haltItself = 1'b0; + always @(*) begin + decode_arbitration_haltByOther = 1'b0; + if(when_HazardSimplePlugin_l113) begin + decode_arbitration_haltByOther = 1'b1; + end + if(CsrPlugin_pipelineLiberator_active) begin + decode_arbitration_haltByOther = 1'b1; + end + if(when_CsrPlugin_l1116) begin + decode_arbitration_haltByOther = 1'b1; + end + end + + always @(*) begin + decode_arbitration_removeIt = 1'b0; + if(decodeExceptionPort_valid) begin + decode_arbitration_removeIt = 1'b1; + end + if(decode_arbitration_isFlushed) begin + decode_arbitration_removeIt = 1'b1; + end + end + + assign decode_arbitration_flushIt = 1'b0; + always @(*) begin + decode_arbitration_flushNext = 1'b0; + if(decodeExceptionPort_valid) begin + decode_arbitration_flushNext = 1'b1; + end + end + + always @(*) begin + execute_arbitration_haltItself = 1'b0; + if(when_DBusSimplePlugin_l426) begin + execute_arbitration_haltItself = 1'b1; + end + if(when_CsrPlugin_l1180) begin + if(execute_CsrPlugin_blockedBySideEffects) begin + execute_arbitration_haltItself = 1'b1; + end + end + end + + assign execute_arbitration_haltByOther = 1'b0; + always @(*) begin + execute_arbitration_removeIt = 1'b0; + if(CsrPlugin_selfException_valid) begin + execute_arbitration_removeIt = 1'b1; + end + if(execute_arbitration_isFlushed) begin + execute_arbitration_removeIt = 1'b1; + end + end + + assign execute_arbitration_flushIt = 1'b0; + always @(*) begin + execute_arbitration_flushNext = 1'b0; + if(CsrPlugin_selfException_valid) begin + execute_arbitration_flushNext = 1'b1; + end + end + + always @(*) begin + memory_arbitration_haltItself = 1'b0; + if(when_DBusSimplePlugin_l479) begin + memory_arbitration_haltItself = 1'b1; + end + end + + assign memory_arbitration_haltByOther = 1'b0; + always @(*) begin + memory_arbitration_removeIt = 1'b0; + if(memory_arbitration_isFlushed) begin + memory_arbitration_removeIt = 1'b1; + end + end + + assign memory_arbitration_flushIt = 1'b0; + always @(*) begin + memory_arbitration_flushNext = 1'b0; + if(BranchPlugin_jumpInterface_valid) begin + memory_arbitration_flushNext = 1'b1; + end + end + + assign writeBack_arbitration_haltItself = 1'b0; + assign writeBack_arbitration_haltByOther = 1'b0; + always @(*) begin + writeBack_arbitration_removeIt = 1'b0; + if(writeBack_arbitration_isFlushed) begin + writeBack_arbitration_removeIt = 1'b1; + end + end + + assign writeBack_arbitration_flushIt = 1'b0; + always @(*) begin + writeBack_arbitration_flushNext = 1'b0; + if(when_CsrPlugin_l1019) begin + writeBack_arbitration_flushNext = 1'b1; + end + if(when_CsrPlugin_l1064) begin + writeBack_arbitration_flushNext = 1'b1; + end + end + + assign lastStageInstruction = writeBack_INSTRUCTION; + assign lastStagePc = writeBack_PC; + assign lastStageIsValid = writeBack_arbitration_isValid; + assign lastStageIsFiring = writeBack_arbitration_isFiring; + always @(*) begin + IBusCachedPlugin_fetcherHalt = 1'b0; + if(when_CsrPlugin_l922) begin + IBusCachedPlugin_fetcherHalt = 1'b1; + end + if(when_CsrPlugin_l1019) begin + IBusCachedPlugin_fetcherHalt = 1'b1; + end + if(when_CsrPlugin_l1064) begin + IBusCachedPlugin_fetcherHalt = 1'b1; + end + end + + always @(*) begin + IBusCachedPlugin_incomingInstruction = 1'b0; + if(when_Fetcher_l240) begin + IBusCachedPlugin_incomingInstruction = 1'b1; + end + end + + assign CsrPlugin_csrMapping_allowCsrSignal = 1'b0; + assign CsrPlugin_csrMapping_readDataSignal = CsrPlugin_csrMapping_readDataInit; + assign CsrPlugin_inWfi = 1'b0; + assign CsrPlugin_thirdPartyWake = 1'b0; + always @(*) begin + CsrPlugin_jumpInterface_valid = 1'b0; + if(when_CsrPlugin_l1019) begin + CsrPlugin_jumpInterface_valid = 1'b1; + end + if(when_CsrPlugin_l1064) begin + CsrPlugin_jumpInterface_valid = 1'b1; + end + end + + always @(*) begin + CsrPlugin_jumpInterface_payload = 32'bxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx; + if(when_CsrPlugin_l1019) begin + CsrPlugin_jumpInterface_payload = {CsrPlugin_xtvec_base,2'b00}; + end + if(when_CsrPlugin_l1064) begin + case(switch_CsrPlugin_l1068) + 2'b11 : begin + CsrPlugin_jumpInterface_payload = CsrPlugin_mepc; + end + default : begin + end + endcase + end + end + + assign CsrPlugin_forceMachineWire = 1'b0; + assign CsrPlugin_allowInterrupts = 1'b1; + assign CsrPlugin_allowException = 1'b1; + assign CsrPlugin_allowEbreakException = 1'b1; + assign IBusCachedPlugin_externalFlush = ({writeBack_arbitration_flushNext,{memory_arbitration_flushNext,{execute_arbitration_flushNext,decode_arbitration_flushNext}}} != 4'b0000); + assign IBusCachedPlugin_jump_pcLoad_valid = ({CsrPlugin_jumpInterface_valid,BranchPlugin_jumpInterface_valid} != 2'b00); + assign _zz_IBusCachedPlugin_jump_pcLoad_payload = {BranchPlugin_jumpInterface_valid,CsrPlugin_jumpInterface_valid}; + assign IBusCachedPlugin_jump_pcLoad_payload = (_zz_IBusCachedPlugin_jump_pcLoad_payload_1[0] ? CsrPlugin_jumpInterface_payload : BranchPlugin_jumpInterface_payload); + always @(*) begin + IBusCachedPlugin_fetchPc_correction = 1'b0; + if(IBusCachedPlugin_fetchPc_redo_valid) begin + IBusCachedPlugin_fetchPc_correction = 1'b1; + end + if(IBusCachedPlugin_jump_pcLoad_valid) begin + IBusCachedPlugin_fetchPc_correction = 1'b1; + end + end + + assign IBusCachedPlugin_fetchPc_output_fire = (IBusCachedPlugin_fetchPc_output_valid && IBusCachedPlugin_fetchPc_output_ready); + assign IBusCachedPlugin_fetchPc_corrected = (IBusCachedPlugin_fetchPc_correction || IBusCachedPlugin_fetchPc_correctionReg); + always @(*) begin + IBusCachedPlugin_fetchPc_pcRegPropagate = 1'b0; + if(IBusCachedPlugin_iBusRsp_stages_1_input_ready) begin + IBusCachedPlugin_fetchPc_pcRegPropagate = 1'b1; + end + end + + assign when_Fetcher_l131 = (IBusCachedPlugin_fetchPc_correction || IBusCachedPlugin_fetchPc_pcRegPropagate); + assign IBusCachedPlugin_fetchPc_output_fire_1 = (IBusCachedPlugin_fetchPc_output_valid && IBusCachedPlugin_fetchPc_output_ready); + assign when_Fetcher_l131_1 = ((! IBusCachedPlugin_fetchPc_output_valid) && IBusCachedPlugin_fetchPc_output_ready); + always @(*) begin + IBusCachedPlugin_fetchPc_pc = (IBusCachedPlugin_fetchPc_pcReg + _zz_IBusCachedPlugin_fetchPc_pc); + if(IBusCachedPlugin_fetchPc_redo_valid) begin + IBusCachedPlugin_fetchPc_pc = IBusCachedPlugin_fetchPc_redo_payload; + end + if(IBusCachedPlugin_jump_pcLoad_valid) begin + IBusCachedPlugin_fetchPc_pc = IBusCachedPlugin_jump_pcLoad_payload; + end + IBusCachedPlugin_fetchPc_pc[0] = 1'b0; + IBusCachedPlugin_fetchPc_pc[1] = 1'b0; + end + + always @(*) begin + IBusCachedPlugin_fetchPc_flushed = 1'b0; + if(IBusCachedPlugin_fetchPc_redo_valid) begin + IBusCachedPlugin_fetchPc_flushed = 1'b1; + end + if(IBusCachedPlugin_jump_pcLoad_valid) begin + IBusCachedPlugin_fetchPc_flushed = 1'b1; + end + end + + assign when_Fetcher_l158 = (IBusCachedPlugin_fetchPc_booted && ((IBusCachedPlugin_fetchPc_output_ready || IBusCachedPlugin_fetchPc_correction) || IBusCachedPlugin_fetchPc_pcRegPropagate)); + assign IBusCachedPlugin_fetchPc_output_valid = ((! IBusCachedPlugin_fetcherHalt) && IBusCachedPlugin_fetchPc_booted); + assign IBusCachedPlugin_fetchPc_output_payload = IBusCachedPlugin_fetchPc_pc; + always @(*) begin + IBusCachedPlugin_iBusRsp_redoFetch = 1'b0; + if(IBusCachedPlugin_rsp_redoFetch) begin + IBusCachedPlugin_iBusRsp_redoFetch = 1'b1; + end + end + + assign IBusCachedPlugin_iBusRsp_stages_0_input_valid = IBusCachedPlugin_fetchPc_output_valid; + assign IBusCachedPlugin_fetchPc_output_ready = IBusCachedPlugin_iBusRsp_stages_0_input_ready; + assign IBusCachedPlugin_iBusRsp_stages_0_input_payload = IBusCachedPlugin_fetchPc_output_payload; + always @(*) begin + IBusCachedPlugin_iBusRsp_stages_0_halt = 1'b0; + if(IBusCachedPlugin_cache_io_cpu_prefetch_haltIt) begin + IBusCachedPlugin_iBusRsp_stages_0_halt = 1'b1; + end + end + + assign _zz_IBusCachedPlugin_iBusRsp_stages_0_input_ready = (! IBusCachedPlugin_iBusRsp_stages_0_halt); + assign IBusCachedPlugin_iBusRsp_stages_0_input_ready = (IBusCachedPlugin_iBusRsp_stages_0_output_ready && _zz_IBusCachedPlugin_iBusRsp_stages_0_input_ready); + assign IBusCachedPlugin_iBusRsp_stages_0_output_valid = (IBusCachedPlugin_iBusRsp_stages_0_input_valid && _zz_IBusCachedPlugin_iBusRsp_stages_0_input_ready); + assign IBusCachedPlugin_iBusRsp_stages_0_output_payload = IBusCachedPlugin_iBusRsp_stages_0_input_payload; + always @(*) begin + IBusCachedPlugin_iBusRsp_stages_1_halt = 1'b0; + if(IBusCachedPlugin_mmuBus_busy) begin + IBusCachedPlugin_iBusRsp_stages_1_halt = 1'b1; + end + end + + assign _zz_IBusCachedPlugin_iBusRsp_stages_1_input_ready = (! IBusCachedPlugin_iBusRsp_stages_1_halt); + assign IBusCachedPlugin_iBusRsp_stages_1_input_ready = (IBusCachedPlugin_iBusRsp_stages_1_output_ready && _zz_IBusCachedPlugin_iBusRsp_stages_1_input_ready); + assign IBusCachedPlugin_iBusRsp_stages_1_output_valid = (IBusCachedPlugin_iBusRsp_stages_1_input_valid && _zz_IBusCachedPlugin_iBusRsp_stages_1_input_ready); + assign IBusCachedPlugin_iBusRsp_stages_1_output_payload = IBusCachedPlugin_iBusRsp_stages_1_input_payload; + always @(*) begin + IBusCachedPlugin_iBusRsp_stages_2_halt = 1'b0; + if(when_IBusCachedPlugin_l267) begin + IBusCachedPlugin_iBusRsp_stages_2_halt = 1'b1; + end + end + + assign _zz_IBusCachedPlugin_iBusRsp_stages_2_input_ready = (! IBusCachedPlugin_iBusRsp_stages_2_halt); + assign IBusCachedPlugin_iBusRsp_stages_2_input_ready = (IBusCachedPlugin_iBusRsp_stages_2_output_ready && _zz_IBusCachedPlugin_iBusRsp_stages_2_input_ready); + assign IBusCachedPlugin_iBusRsp_stages_2_output_valid = (IBusCachedPlugin_iBusRsp_stages_2_input_valid && _zz_IBusCachedPlugin_iBusRsp_stages_2_input_ready); + assign IBusCachedPlugin_iBusRsp_stages_2_output_payload = IBusCachedPlugin_iBusRsp_stages_2_input_payload; + assign IBusCachedPlugin_fetchPc_redo_valid = IBusCachedPlugin_iBusRsp_redoFetch; + assign IBusCachedPlugin_fetchPc_redo_payload = IBusCachedPlugin_iBusRsp_stages_2_input_payload; + assign IBusCachedPlugin_iBusRsp_flush = ((decode_arbitration_removeIt || (decode_arbitration_flushNext && (! decode_arbitration_isStuck))) || IBusCachedPlugin_iBusRsp_redoFetch); + assign IBusCachedPlugin_iBusRsp_stages_0_output_ready = _zz_IBusCachedPlugin_iBusRsp_stages_0_output_ready; + assign _zz_IBusCachedPlugin_iBusRsp_stages_0_output_ready = ((1'b0 && (! _zz_IBusCachedPlugin_iBusRsp_stages_0_output_ready_1)) || IBusCachedPlugin_iBusRsp_stages_1_input_ready); + assign _zz_IBusCachedPlugin_iBusRsp_stages_0_output_ready_1 = _zz_IBusCachedPlugin_iBusRsp_stages_0_output_ready_2; + assign IBusCachedPlugin_iBusRsp_stages_1_input_valid = _zz_IBusCachedPlugin_iBusRsp_stages_0_output_ready_1; + assign IBusCachedPlugin_iBusRsp_stages_1_input_payload = IBusCachedPlugin_fetchPc_pcReg; + assign IBusCachedPlugin_iBusRsp_stages_1_output_ready = ((1'b0 && (! IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_valid)) || IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_ready); + assign IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_valid = _zz_IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_valid; + assign IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_payload = _zz_IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_payload; + assign IBusCachedPlugin_iBusRsp_stages_2_input_valid = IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_valid; + assign IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_ready = IBusCachedPlugin_iBusRsp_stages_2_input_ready; + assign IBusCachedPlugin_iBusRsp_stages_2_input_payload = IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_payload; + always @(*) begin + IBusCachedPlugin_iBusRsp_readyForError = 1'b1; + if(when_Fetcher_l320) begin + IBusCachedPlugin_iBusRsp_readyForError = 1'b0; + end + end + + assign when_Fetcher_l240 = (IBusCachedPlugin_iBusRsp_stages_1_input_valid || IBusCachedPlugin_iBusRsp_stages_2_input_valid); + assign when_Fetcher_l320 = (! IBusCachedPlugin_pcValids_0); + assign when_Fetcher_l329 = (! (! IBusCachedPlugin_iBusRsp_stages_1_input_ready)); + assign when_Fetcher_l329_1 = (! (! IBusCachedPlugin_iBusRsp_stages_2_input_ready)); + assign when_Fetcher_l329_2 = (! execute_arbitration_isStuck); + assign when_Fetcher_l329_3 = (! memory_arbitration_isStuck); + assign when_Fetcher_l329_4 = (! writeBack_arbitration_isStuck); + assign IBusCachedPlugin_pcValids_0 = IBusCachedPlugin_injector_nextPcCalc_valids_1; + assign IBusCachedPlugin_pcValids_1 = IBusCachedPlugin_injector_nextPcCalc_valids_2; + assign IBusCachedPlugin_pcValids_2 = IBusCachedPlugin_injector_nextPcCalc_valids_3; + assign IBusCachedPlugin_pcValids_3 = IBusCachedPlugin_injector_nextPcCalc_valids_4; + assign IBusCachedPlugin_iBusRsp_output_ready = (! decode_arbitration_isStuck); + assign decode_arbitration_isValid = IBusCachedPlugin_iBusRsp_output_valid; + assign iBus_cmd_valid = IBusCachedPlugin_cache_io_mem_cmd_valid; + always @(*) begin + iBus_cmd_payload_address = IBusCachedPlugin_cache_io_mem_cmd_payload_address; + iBus_cmd_payload_address = IBusCachedPlugin_cache_io_mem_cmd_payload_address; + end + + assign iBus_cmd_payload_size = IBusCachedPlugin_cache_io_mem_cmd_payload_size; + assign IBusCachedPlugin_s0_tightlyCoupledHit = 1'b0; + assign IBusCachedPlugin_cache_io_cpu_prefetch_isValid = (IBusCachedPlugin_iBusRsp_stages_0_input_valid && (! IBusCachedPlugin_s0_tightlyCoupledHit)); + assign IBusCachedPlugin_cache_io_cpu_fetch_isValid = (IBusCachedPlugin_iBusRsp_stages_1_input_valid && (! IBusCachedPlugin_s1_tightlyCoupledHit)); + assign IBusCachedPlugin_cache_io_cpu_fetch_isStuck = (! IBusCachedPlugin_iBusRsp_stages_1_input_ready); + assign IBusCachedPlugin_mmuBus_cmd_0_isValid = IBusCachedPlugin_cache_io_cpu_fetch_isValid; + assign IBusCachedPlugin_mmuBus_cmd_0_isStuck = (! IBusCachedPlugin_iBusRsp_stages_1_input_ready); + assign IBusCachedPlugin_mmuBus_cmd_0_virtualAddress = IBusCachedPlugin_iBusRsp_stages_1_input_payload; + assign IBusCachedPlugin_mmuBus_cmd_0_bypassTranslation = 1'b0; + assign IBusCachedPlugin_mmuBus_end = (IBusCachedPlugin_iBusRsp_stages_1_input_ready || IBusCachedPlugin_externalFlush); + assign IBusCachedPlugin_cache_io_cpu_decode_isValid = (IBusCachedPlugin_iBusRsp_stages_2_input_valid && (! IBusCachedPlugin_s2_tightlyCoupledHit)); + assign IBusCachedPlugin_cache_io_cpu_decode_isStuck = (! IBusCachedPlugin_iBusRsp_stages_2_input_ready); + assign IBusCachedPlugin_cache_io_cpu_decode_isUser = (CsrPlugin_privilege == 2'b00); + assign IBusCachedPlugin_rsp_iBusRspOutputHalt = 1'b0; + assign IBusCachedPlugin_rsp_issueDetected = 1'b0; + always @(*) begin + IBusCachedPlugin_rsp_redoFetch = 1'b0; + if(when_IBusCachedPlugin_l239) begin + IBusCachedPlugin_rsp_redoFetch = 1'b1; + end + if(when_IBusCachedPlugin_l250) begin + IBusCachedPlugin_rsp_redoFetch = 1'b1; + end + end + + always @(*) begin + IBusCachedPlugin_cache_io_cpu_fill_valid = (IBusCachedPlugin_rsp_redoFetch && (! IBusCachedPlugin_cache_io_cpu_decode_mmuRefilling)); + if(when_IBusCachedPlugin_l250) begin + IBusCachedPlugin_cache_io_cpu_fill_valid = 1'b1; + end + end + + assign when_IBusCachedPlugin_l239 = ((IBusCachedPlugin_cache_io_cpu_decode_isValid && IBusCachedPlugin_cache_io_cpu_decode_mmuRefilling) && (! IBusCachedPlugin_rsp_issueDetected)); + assign when_IBusCachedPlugin_l250 = ((IBusCachedPlugin_cache_io_cpu_decode_isValid && IBusCachedPlugin_cache_io_cpu_decode_cacheMiss) && (! IBusCachedPlugin_rsp_issueDetected_1)); + assign when_IBusCachedPlugin_l267 = (IBusCachedPlugin_rsp_issueDetected_2 || IBusCachedPlugin_rsp_iBusRspOutputHalt); + assign IBusCachedPlugin_iBusRsp_output_valid = IBusCachedPlugin_iBusRsp_stages_2_output_valid; + assign IBusCachedPlugin_iBusRsp_stages_2_output_ready = IBusCachedPlugin_iBusRsp_output_ready; + assign IBusCachedPlugin_iBusRsp_output_payload_rsp_inst = IBusCachedPlugin_cache_io_cpu_decode_data; + assign IBusCachedPlugin_iBusRsp_output_payload_pc = IBusCachedPlugin_iBusRsp_stages_2_output_payload; + assign IBusCachedPlugin_cache_io_flush = (decode_arbitration_isValid && decode_FLUSH_ALL); + assign _zz_dBus_cmd_valid = 1'b0; + always @(*) begin + execute_DBusSimplePlugin_skipCmd = 1'b0; + if(execute_ALIGNEMENT_FAULT) begin + execute_DBusSimplePlugin_skipCmd = 1'b1; + end + end + + assign dBus_cmd_valid = (((((execute_arbitration_isValid && execute_MEMORY_ENABLE) && (! execute_arbitration_isStuckByOthers)) && (! execute_arbitration_isFlushed)) && (! execute_DBusSimplePlugin_skipCmd)) && (! _zz_dBus_cmd_valid)); + assign dBus_cmd_payload_wr = execute_MEMORY_STORE; + assign dBus_cmd_payload_size = execute_INSTRUCTION[13 : 12]; + always @(*) begin + case(dBus_cmd_payload_size) + 2'b00 : begin + _zz_dBus_cmd_payload_data = {{{execute_RS2[7 : 0],execute_RS2[7 : 0]},execute_RS2[7 : 0]},execute_RS2[7 : 0]}; + end + 2'b01 : begin + _zz_dBus_cmd_payload_data = {execute_RS2[15 : 0],execute_RS2[15 : 0]}; + end + default : begin + _zz_dBus_cmd_payload_data = execute_RS2[31 : 0]; + end + endcase + end + + assign dBus_cmd_payload_data = _zz_dBus_cmd_payload_data; + assign when_DBusSimplePlugin_l426 = ((((execute_arbitration_isValid && execute_MEMORY_ENABLE) && (! dBus_cmd_ready)) && (! execute_DBusSimplePlugin_skipCmd)) && (! _zz_dBus_cmd_valid)); + always @(*) begin + case(dBus_cmd_payload_size) + 2'b00 : begin + _zz_execute_DBusSimplePlugin_formalMask = 4'b0001; + end + 2'b01 : begin + _zz_execute_DBusSimplePlugin_formalMask = 4'b0011; + end + default : begin + _zz_execute_DBusSimplePlugin_formalMask = 4'b1111; + end + endcase + end + + assign execute_DBusSimplePlugin_formalMask = (_zz_execute_DBusSimplePlugin_formalMask <<< dBus_cmd_payload_address[1 : 0]); + assign dBus_cmd_payload_address = execute_SRC_ADD; + assign when_DBusSimplePlugin_l479 = (((memory_arbitration_isValid && memory_MEMORY_ENABLE) && (! memory_MEMORY_STORE)) && ((! dBus_rsp_ready) || 1'b0)); + always @(*) begin + writeBack_DBusSimplePlugin_rspShifted = writeBack_MEMORY_READ_DATA; + case(writeBack_MEMORY_ADDRESS_LOW) + 2'b01 : begin + writeBack_DBusSimplePlugin_rspShifted[7 : 0] = writeBack_MEMORY_READ_DATA[15 : 8]; + end + 2'b10 : begin + writeBack_DBusSimplePlugin_rspShifted[15 : 0] = writeBack_MEMORY_READ_DATA[31 : 16]; + end + 2'b11 : begin + writeBack_DBusSimplePlugin_rspShifted[7 : 0] = writeBack_MEMORY_READ_DATA[31 : 24]; + end + default : begin + end + endcase + end + + assign switch_Misc_l200 = writeBack_INSTRUCTION[13 : 12]; + assign _zz_writeBack_DBusSimplePlugin_rspFormated = (writeBack_DBusSimplePlugin_rspShifted[7] && (! writeBack_INSTRUCTION[14])); + always @(*) begin + _zz_writeBack_DBusSimplePlugin_rspFormated_1[31] = _zz_writeBack_DBusSimplePlugin_rspFormated; + _zz_writeBack_DBusSimplePlugin_rspFormated_1[30] = _zz_writeBack_DBusSimplePlugin_rspFormated; + _zz_writeBack_DBusSimplePlugin_rspFormated_1[29] = _zz_writeBack_DBusSimplePlugin_rspFormated; + _zz_writeBack_DBusSimplePlugin_rspFormated_1[28] = _zz_writeBack_DBusSimplePlugin_rspFormated; + _zz_writeBack_DBusSimplePlugin_rspFormated_1[27] = _zz_writeBack_DBusSimplePlugin_rspFormated; + _zz_writeBack_DBusSimplePlugin_rspFormated_1[26] = _zz_writeBack_DBusSimplePlugin_rspFormated; + _zz_writeBack_DBusSimplePlugin_rspFormated_1[25] = _zz_writeBack_DBusSimplePlugin_rspFormated; + _zz_writeBack_DBusSimplePlugin_rspFormated_1[24] = _zz_writeBack_DBusSimplePlugin_rspFormated; + _zz_writeBack_DBusSimplePlugin_rspFormated_1[23] = _zz_writeBack_DBusSimplePlugin_rspFormated; + _zz_writeBack_DBusSimplePlugin_rspFormated_1[22] = _zz_writeBack_DBusSimplePlugin_rspFormated; + _zz_writeBack_DBusSimplePlugin_rspFormated_1[21] = _zz_writeBack_DBusSimplePlugin_rspFormated; + _zz_writeBack_DBusSimplePlugin_rspFormated_1[20] = _zz_writeBack_DBusSimplePlugin_rspFormated; + _zz_writeBack_DBusSimplePlugin_rspFormated_1[19] = _zz_writeBack_DBusSimplePlugin_rspFormated; + _zz_writeBack_DBusSimplePlugin_rspFormated_1[18] = _zz_writeBack_DBusSimplePlugin_rspFormated; + _zz_writeBack_DBusSimplePlugin_rspFormated_1[17] = _zz_writeBack_DBusSimplePlugin_rspFormated; + _zz_writeBack_DBusSimplePlugin_rspFormated_1[16] = _zz_writeBack_DBusSimplePlugin_rspFormated; + _zz_writeBack_DBusSimplePlugin_rspFormated_1[15] = _zz_writeBack_DBusSimplePlugin_rspFormated; + _zz_writeBack_DBusSimplePlugin_rspFormated_1[14] = _zz_writeBack_DBusSimplePlugin_rspFormated; + _zz_writeBack_DBusSimplePlugin_rspFormated_1[13] = _zz_writeBack_DBusSimplePlugin_rspFormated; + _zz_writeBack_DBusSimplePlugin_rspFormated_1[12] = _zz_writeBack_DBusSimplePlugin_rspFormated; + _zz_writeBack_DBusSimplePlugin_rspFormated_1[11] = _zz_writeBack_DBusSimplePlugin_rspFormated; + _zz_writeBack_DBusSimplePlugin_rspFormated_1[10] = _zz_writeBack_DBusSimplePlugin_rspFormated; + _zz_writeBack_DBusSimplePlugin_rspFormated_1[9] = _zz_writeBack_DBusSimplePlugin_rspFormated; + _zz_writeBack_DBusSimplePlugin_rspFormated_1[8] = _zz_writeBack_DBusSimplePlugin_rspFormated; + _zz_writeBack_DBusSimplePlugin_rspFormated_1[7 : 0] = writeBack_DBusSimplePlugin_rspShifted[7 : 0]; + end + + assign _zz_writeBack_DBusSimplePlugin_rspFormated_2 = (writeBack_DBusSimplePlugin_rspShifted[15] && (! writeBack_INSTRUCTION[14])); + always @(*) begin + _zz_writeBack_DBusSimplePlugin_rspFormated_3[31] = _zz_writeBack_DBusSimplePlugin_rspFormated_2; + _zz_writeBack_DBusSimplePlugin_rspFormated_3[30] = _zz_writeBack_DBusSimplePlugin_rspFormated_2; + _zz_writeBack_DBusSimplePlugin_rspFormated_3[29] = _zz_writeBack_DBusSimplePlugin_rspFormated_2; + _zz_writeBack_DBusSimplePlugin_rspFormated_3[28] = _zz_writeBack_DBusSimplePlugin_rspFormated_2; + _zz_writeBack_DBusSimplePlugin_rspFormated_3[27] = _zz_writeBack_DBusSimplePlugin_rspFormated_2; + _zz_writeBack_DBusSimplePlugin_rspFormated_3[26] = _zz_writeBack_DBusSimplePlugin_rspFormated_2; + _zz_writeBack_DBusSimplePlugin_rspFormated_3[25] = _zz_writeBack_DBusSimplePlugin_rspFormated_2; + _zz_writeBack_DBusSimplePlugin_rspFormated_3[24] = _zz_writeBack_DBusSimplePlugin_rspFormated_2; + _zz_writeBack_DBusSimplePlugin_rspFormated_3[23] = _zz_writeBack_DBusSimplePlugin_rspFormated_2; + _zz_writeBack_DBusSimplePlugin_rspFormated_3[22] = _zz_writeBack_DBusSimplePlugin_rspFormated_2; + _zz_writeBack_DBusSimplePlugin_rspFormated_3[21] = _zz_writeBack_DBusSimplePlugin_rspFormated_2; + _zz_writeBack_DBusSimplePlugin_rspFormated_3[20] = _zz_writeBack_DBusSimplePlugin_rspFormated_2; + _zz_writeBack_DBusSimplePlugin_rspFormated_3[19] = _zz_writeBack_DBusSimplePlugin_rspFormated_2; + _zz_writeBack_DBusSimplePlugin_rspFormated_3[18] = _zz_writeBack_DBusSimplePlugin_rspFormated_2; + _zz_writeBack_DBusSimplePlugin_rspFormated_3[17] = _zz_writeBack_DBusSimplePlugin_rspFormated_2; + _zz_writeBack_DBusSimplePlugin_rspFormated_3[16] = _zz_writeBack_DBusSimplePlugin_rspFormated_2; + _zz_writeBack_DBusSimplePlugin_rspFormated_3[15 : 0] = writeBack_DBusSimplePlugin_rspShifted[15 : 0]; + end + + always @(*) begin + case(switch_Misc_l200) + 2'b00 : begin + writeBack_DBusSimplePlugin_rspFormated = _zz_writeBack_DBusSimplePlugin_rspFormated_1; + end + 2'b01 : begin + writeBack_DBusSimplePlugin_rspFormated = _zz_writeBack_DBusSimplePlugin_rspFormated_3; + end + default : begin + writeBack_DBusSimplePlugin_rspFormated = writeBack_DBusSimplePlugin_rspShifted; + end + endcase + end + + assign when_DBusSimplePlugin_l558 = (writeBack_arbitration_isValid && writeBack_MEMORY_ENABLE); + assign IBusCachedPlugin_mmuBus_rsp_physicalAddress = IBusCachedPlugin_mmuBus_cmd_0_virtualAddress; + assign IBusCachedPlugin_mmuBus_rsp_allowRead = 1'b1; + assign IBusCachedPlugin_mmuBus_rsp_allowWrite = 1'b1; + assign IBusCachedPlugin_mmuBus_rsp_allowExecute = 1'b1; + assign IBusCachedPlugin_mmuBus_rsp_isIoAccess = IBusCachedPlugin_mmuBus_rsp_physicalAddress[31]; + assign IBusCachedPlugin_mmuBus_rsp_isPaging = 1'b0; + assign IBusCachedPlugin_mmuBus_rsp_exception = 1'b0; + assign IBusCachedPlugin_mmuBus_rsp_refilling = 1'b0; + assign IBusCachedPlugin_mmuBus_busy = 1'b0; + assign _zz_decode_IS_MUL_1 = ((decode_INSTRUCTION & 32'h00004050) == 32'h00004050); + assign _zz_decode_IS_MUL_2 = ((decode_INSTRUCTION & 32'h00006004) == 32'h00002000); + assign _zz_decode_IS_MUL_3 = ((decode_INSTRUCTION & 32'h00000004) == 32'h00000004); + assign _zz_decode_IS_MUL_4 = ((decode_INSTRUCTION & 32'h00000048) == 32'h00000048); + assign _zz_decode_IS_MUL = {(((decode_INSTRUCTION & _zz__zz_decode_IS_MUL) == 32'h02000030) != 1'b0),{((_zz__zz_decode_IS_MUL_1 == _zz__zz_decode_IS_MUL_2) != 1'b0),{(_zz__zz_decode_IS_MUL_3 != 1'b0),{(_zz__zz_decode_IS_MUL_4 != _zz__zz_decode_IS_MUL_9),{_zz__zz_decode_IS_MUL_10,{_zz__zz_decode_IS_MUL_12,_zz__zz_decode_IS_MUL_14}}}}}}; + assign _zz_decode_SRC1_CTRL_2 = _zz_decode_IS_MUL[2 : 1]; + assign _zz_decode_SRC1_CTRL_1 = _zz_decode_SRC1_CTRL_2; + assign _zz_decode_SRC2_CTRL_2 = _zz_decode_IS_MUL[7 : 6]; + assign _zz_decode_SRC2_CTRL_1 = _zz_decode_SRC2_CTRL_2; + assign _zz_decode_ALU_CTRL_2 = _zz_decode_IS_MUL[14 : 13]; + assign _zz_decode_ALU_CTRL_1 = _zz_decode_ALU_CTRL_2; + assign _zz_decode_ALU_BITWISE_CTRL_2 = _zz_decode_IS_MUL[17 : 16]; + assign _zz_decode_ALU_BITWISE_CTRL_1 = _zz_decode_ALU_BITWISE_CTRL_2; + assign _zz_decode_SHIFT_CTRL_2 = _zz_decode_IS_MUL[20 : 19]; + assign _zz_decode_SHIFT_CTRL_1 = _zz_decode_SHIFT_CTRL_2; + assign _zz_decode_BRANCH_CTRL_2 = _zz_decode_IS_MUL[23 : 22]; + assign _zz_decode_BRANCH_CTRL_1 = _zz_decode_BRANCH_CTRL_2; + assign _zz_decode_ENV_CTRL_2 = _zz_decode_IS_MUL[26 : 25]; + assign _zz_decode_ENV_CTRL_1 = _zz_decode_ENV_CTRL_2; + assign decodeExceptionPort_valid = (decode_arbitration_isValid && (! decode_LEGAL_INSTRUCTION)); + assign decodeExceptionPort_payload_code = 4'b0010; + assign decodeExceptionPort_payload_badAddr = decode_INSTRUCTION; + assign when_RegFilePlugin_l63 = (decode_INSTRUCTION[11 : 7] == 5'h0); + assign decode_RegFilePlugin_regFileReadAddress1 = decode_INSTRUCTION_ANTICIPATED[19 : 15]; + assign decode_RegFilePlugin_regFileReadAddress2 = decode_INSTRUCTION_ANTICIPATED[24 : 20]; + assign decode_RegFilePlugin_rs1Data = _zz_RegFilePlugin_regFile_port0; + assign decode_RegFilePlugin_rs2Data = _zz_RegFilePlugin_regFile_port1; + always @(*) begin + lastStageRegFileWrite_valid = (_zz_lastStageRegFileWrite_valid && writeBack_arbitration_isFiring); + if(_zz_2) begin + lastStageRegFileWrite_valid = 1'b1; + end + end + + always @(*) begin + lastStageRegFileWrite_payload_address = _zz_lastStageRegFileWrite_payload_address[11 : 7]; + if(_zz_2) begin + lastStageRegFileWrite_payload_address = 5'h0; + end + end + + always @(*) begin + lastStageRegFileWrite_payload_data = _zz_lastStageRegFileWrite_payload_data; + if(_zz_2) begin + lastStageRegFileWrite_payload_data = 32'h0; + end + end + + always @(*) begin + case(execute_ALU_BITWISE_CTRL) + `AluBitwiseCtrlEnum_binary_sequential_AND_1 : begin + execute_IntAluPlugin_bitwise = (execute_SRC1 & execute_SRC2); + end + `AluBitwiseCtrlEnum_binary_sequential_OR_1 : begin + execute_IntAluPlugin_bitwise = (execute_SRC1 | execute_SRC2); + end + default : begin + execute_IntAluPlugin_bitwise = (execute_SRC1 ^ execute_SRC2); + end + endcase + end + + always @(*) begin + case(execute_ALU_CTRL) + `AluCtrlEnum_binary_sequential_BITWISE : begin + _zz_execute_REGFILE_WRITE_DATA = execute_IntAluPlugin_bitwise; + end + `AluCtrlEnum_binary_sequential_SLT_SLTU : begin + _zz_execute_REGFILE_WRITE_DATA = {31'd0, _zz__zz_execute_REGFILE_WRITE_DATA}; + end + default : begin + _zz_execute_REGFILE_WRITE_DATA = execute_SRC_ADD_SUB; + end + endcase + end + + always @(*) begin + case(execute_SRC1_CTRL) + `Src1CtrlEnum_binary_sequential_RS : begin + _zz_execute_SRC1 = execute_RS1; + end + `Src1CtrlEnum_binary_sequential_PC_INCREMENT : begin + _zz_execute_SRC1 = {29'd0, _zz__zz_execute_SRC1}; + end + `Src1CtrlEnum_binary_sequential_IMU : begin + _zz_execute_SRC1 = {execute_INSTRUCTION[31 : 12],12'h0}; + end + default : begin + _zz_execute_SRC1 = {27'd0, _zz__zz_execute_SRC1_1}; + end + endcase + end + + assign _zz_execute_SRC2_1 = execute_INSTRUCTION[31]; + always @(*) begin + _zz_execute_SRC2_2[19] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[18] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[17] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[16] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[15] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[14] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[13] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[12] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[11] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[10] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[9] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[8] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[7] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[6] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[5] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[4] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[3] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[2] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[1] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[0] = _zz_execute_SRC2_1; + end + + assign _zz_execute_SRC2_3 = _zz__zz_execute_SRC2_3[11]; + always @(*) begin + _zz_execute_SRC2_4[19] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[18] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[17] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[16] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[15] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[14] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[13] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[12] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[11] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[10] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[9] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[8] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[7] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[6] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[5] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[4] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[3] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[2] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[1] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[0] = _zz_execute_SRC2_3; + end + + always @(*) begin + case(execute_SRC2_CTRL) + `Src2CtrlEnum_binary_sequential_RS : begin + _zz_execute_SRC2_5 = execute_RS2; + end + `Src2CtrlEnum_binary_sequential_IMI : begin + _zz_execute_SRC2_5 = {_zz_execute_SRC2_2,execute_INSTRUCTION[31 : 20]}; + end + `Src2CtrlEnum_binary_sequential_IMS : begin + _zz_execute_SRC2_5 = {_zz_execute_SRC2_4,{execute_INSTRUCTION[31 : 25],execute_INSTRUCTION[11 : 7]}}; + end + default : begin + _zz_execute_SRC2_5 = _zz_execute_SRC2; + end + endcase + end + + always @(*) begin + execute_SrcPlugin_addSub = _zz_execute_SrcPlugin_addSub; + if(execute_SRC2_FORCE_ZERO) begin + execute_SrcPlugin_addSub = execute_SRC1; + end + end + + assign execute_SrcPlugin_less = ((execute_SRC1[31] == execute_SRC2[31]) ? execute_SrcPlugin_addSub[31] : (execute_SRC_LESS_UNSIGNED ? execute_SRC2[31] : execute_SRC1[31])); + assign execute_FullBarrelShifterPlugin_amplitude = execute_SRC2[4 : 0]; + always @(*) begin + _zz_execute_FullBarrelShifterPlugin_reversed[0] = execute_SRC1[31]; + _zz_execute_FullBarrelShifterPlugin_reversed[1] = execute_SRC1[30]; + _zz_execute_FullBarrelShifterPlugin_reversed[2] = execute_SRC1[29]; + _zz_execute_FullBarrelShifterPlugin_reversed[3] = execute_SRC1[28]; + _zz_execute_FullBarrelShifterPlugin_reversed[4] = execute_SRC1[27]; + _zz_execute_FullBarrelShifterPlugin_reversed[5] = execute_SRC1[26]; + _zz_execute_FullBarrelShifterPlugin_reversed[6] = execute_SRC1[25]; + _zz_execute_FullBarrelShifterPlugin_reversed[7] = execute_SRC1[24]; + _zz_execute_FullBarrelShifterPlugin_reversed[8] = execute_SRC1[23]; + _zz_execute_FullBarrelShifterPlugin_reversed[9] = execute_SRC1[22]; + _zz_execute_FullBarrelShifterPlugin_reversed[10] = execute_SRC1[21]; + _zz_execute_FullBarrelShifterPlugin_reversed[11] = execute_SRC1[20]; + _zz_execute_FullBarrelShifterPlugin_reversed[12] = execute_SRC1[19]; + _zz_execute_FullBarrelShifterPlugin_reversed[13] = execute_SRC1[18]; + _zz_execute_FullBarrelShifterPlugin_reversed[14] = execute_SRC1[17]; + _zz_execute_FullBarrelShifterPlugin_reversed[15] = execute_SRC1[16]; + _zz_execute_FullBarrelShifterPlugin_reversed[16] = execute_SRC1[15]; + _zz_execute_FullBarrelShifterPlugin_reversed[17] = execute_SRC1[14]; + _zz_execute_FullBarrelShifterPlugin_reversed[18] = execute_SRC1[13]; + _zz_execute_FullBarrelShifterPlugin_reversed[19] = execute_SRC1[12]; + _zz_execute_FullBarrelShifterPlugin_reversed[20] = execute_SRC1[11]; + _zz_execute_FullBarrelShifterPlugin_reversed[21] = execute_SRC1[10]; + _zz_execute_FullBarrelShifterPlugin_reversed[22] = execute_SRC1[9]; + _zz_execute_FullBarrelShifterPlugin_reversed[23] = execute_SRC1[8]; + _zz_execute_FullBarrelShifterPlugin_reversed[24] = execute_SRC1[7]; + _zz_execute_FullBarrelShifterPlugin_reversed[25] = execute_SRC1[6]; + _zz_execute_FullBarrelShifterPlugin_reversed[26] = execute_SRC1[5]; + _zz_execute_FullBarrelShifterPlugin_reversed[27] = execute_SRC1[4]; + _zz_execute_FullBarrelShifterPlugin_reversed[28] = execute_SRC1[3]; + _zz_execute_FullBarrelShifterPlugin_reversed[29] = execute_SRC1[2]; + _zz_execute_FullBarrelShifterPlugin_reversed[30] = execute_SRC1[1]; + _zz_execute_FullBarrelShifterPlugin_reversed[31] = execute_SRC1[0]; + end + + assign execute_FullBarrelShifterPlugin_reversed = ((execute_SHIFT_CTRL == `ShiftCtrlEnum_binary_sequential_SLL_1) ? _zz_execute_FullBarrelShifterPlugin_reversed : execute_SRC1); + always @(*) begin + _zz_memory_to_writeBack_REGFILE_WRITE_DATA_1[0] = memory_SHIFT_RIGHT[31]; + _zz_memory_to_writeBack_REGFILE_WRITE_DATA_1[1] = memory_SHIFT_RIGHT[30]; + _zz_memory_to_writeBack_REGFILE_WRITE_DATA_1[2] = memory_SHIFT_RIGHT[29]; + _zz_memory_to_writeBack_REGFILE_WRITE_DATA_1[3] = memory_SHIFT_RIGHT[28]; + _zz_memory_to_writeBack_REGFILE_WRITE_DATA_1[4] = memory_SHIFT_RIGHT[27]; + _zz_memory_to_writeBack_REGFILE_WRITE_DATA_1[5] = memory_SHIFT_RIGHT[26]; + _zz_memory_to_writeBack_REGFILE_WRITE_DATA_1[6] = memory_SHIFT_RIGHT[25]; + _zz_memory_to_writeBack_REGFILE_WRITE_DATA_1[7] = memory_SHIFT_RIGHT[24]; + _zz_memory_to_writeBack_REGFILE_WRITE_DATA_1[8] = memory_SHIFT_RIGHT[23]; + _zz_memory_to_writeBack_REGFILE_WRITE_DATA_1[9] = memory_SHIFT_RIGHT[22]; + _zz_memory_to_writeBack_REGFILE_WRITE_DATA_1[10] = memory_SHIFT_RIGHT[21]; + _zz_memory_to_writeBack_REGFILE_WRITE_DATA_1[11] = memory_SHIFT_RIGHT[20]; + _zz_memory_to_writeBack_REGFILE_WRITE_DATA_1[12] = memory_SHIFT_RIGHT[19]; + _zz_memory_to_writeBack_REGFILE_WRITE_DATA_1[13] = memory_SHIFT_RIGHT[18]; + _zz_memory_to_writeBack_REGFILE_WRITE_DATA_1[14] = memory_SHIFT_RIGHT[17]; + _zz_memory_to_writeBack_REGFILE_WRITE_DATA_1[15] = memory_SHIFT_RIGHT[16]; + _zz_memory_to_writeBack_REGFILE_WRITE_DATA_1[16] = memory_SHIFT_RIGHT[15]; + _zz_memory_to_writeBack_REGFILE_WRITE_DATA_1[17] = memory_SHIFT_RIGHT[14]; + _zz_memory_to_writeBack_REGFILE_WRITE_DATA_1[18] = memory_SHIFT_RIGHT[13]; + _zz_memory_to_writeBack_REGFILE_WRITE_DATA_1[19] = memory_SHIFT_RIGHT[12]; + _zz_memory_to_writeBack_REGFILE_WRITE_DATA_1[20] = memory_SHIFT_RIGHT[11]; + _zz_memory_to_writeBack_REGFILE_WRITE_DATA_1[21] = memory_SHIFT_RIGHT[10]; + _zz_memory_to_writeBack_REGFILE_WRITE_DATA_1[22] = memory_SHIFT_RIGHT[9]; + _zz_memory_to_writeBack_REGFILE_WRITE_DATA_1[23] = memory_SHIFT_RIGHT[8]; + _zz_memory_to_writeBack_REGFILE_WRITE_DATA_1[24] = memory_SHIFT_RIGHT[7]; + _zz_memory_to_writeBack_REGFILE_WRITE_DATA_1[25] = memory_SHIFT_RIGHT[6]; + _zz_memory_to_writeBack_REGFILE_WRITE_DATA_1[26] = memory_SHIFT_RIGHT[5]; + _zz_memory_to_writeBack_REGFILE_WRITE_DATA_1[27] = memory_SHIFT_RIGHT[4]; + _zz_memory_to_writeBack_REGFILE_WRITE_DATA_1[28] = memory_SHIFT_RIGHT[3]; + _zz_memory_to_writeBack_REGFILE_WRITE_DATA_1[29] = memory_SHIFT_RIGHT[2]; + _zz_memory_to_writeBack_REGFILE_WRITE_DATA_1[30] = memory_SHIFT_RIGHT[1]; + _zz_memory_to_writeBack_REGFILE_WRITE_DATA_1[31] = memory_SHIFT_RIGHT[0]; + end + + always @(*) begin + HazardSimplePlugin_src0Hazard = 1'b0; + if(HazardSimplePlugin_writeBackBuffer_valid) begin + if(HazardSimplePlugin_addr0Match) begin + HazardSimplePlugin_src0Hazard = 1'b1; + end + end + if(when_HazardSimplePlugin_l57) begin + if(when_HazardSimplePlugin_l58) begin + if(when_HazardSimplePlugin_l59) begin + HazardSimplePlugin_src0Hazard = 1'b1; + end + end + end + if(when_HazardSimplePlugin_l57_1) begin + if(when_HazardSimplePlugin_l58_1) begin + if(when_HazardSimplePlugin_l59_1) begin + HazardSimplePlugin_src0Hazard = 1'b1; + end + end + end + if(when_HazardSimplePlugin_l57_2) begin + if(when_HazardSimplePlugin_l58_2) begin + if(when_HazardSimplePlugin_l59_2) begin + HazardSimplePlugin_src0Hazard = 1'b1; + end + end + end + if(when_HazardSimplePlugin_l105) begin + HazardSimplePlugin_src0Hazard = 1'b0; + end + end + + always @(*) begin + HazardSimplePlugin_src1Hazard = 1'b0; + if(HazardSimplePlugin_writeBackBuffer_valid) begin + if(HazardSimplePlugin_addr1Match) begin + HazardSimplePlugin_src1Hazard = 1'b1; + end + end + if(when_HazardSimplePlugin_l57) begin + if(when_HazardSimplePlugin_l58) begin + if(when_HazardSimplePlugin_l62) begin + HazardSimplePlugin_src1Hazard = 1'b1; + end + end + end + if(when_HazardSimplePlugin_l57_1) begin + if(when_HazardSimplePlugin_l58_1) begin + if(when_HazardSimplePlugin_l62_1) begin + HazardSimplePlugin_src1Hazard = 1'b1; + end + end + end + if(when_HazardSimplePlugin_l57_2) begin + if(when_HazardSimplePlugin_l58_2) begin + if(when_HazardSimplePlugin_l62_2) begin + HazardSimplePlugin_src1Hazard = 1'b1; + end + end + end + if(when_HazardSimplePlugin_l108) begin + HazardSimplePlugin_src1Hazard = 1'b0; + end + end + + assign HazardSimplePlugin_writeBackWrites_valid = (_zz_lastStageRegFileWrite_valid && writeBack_arbitration_isFiring); + assign HazardSimplePlugin_writeBackWrites_payload_address = _zz_lastStageRegFileWrite_payload_address[11 : 7]; + assign HazardSimplePlugin_writeBackWrites_payload_data = _zz_lastStageRegFileWrite_payload_data; + assign HazardSimplePlugin_addr0Match = (HazardSimplePlugin_writeBackBuffer_payload_address == decode_INSTRUCTION[19 : 15]); + assign HazardSimplePlugin_addr1Match = (HazardSimplePlugin_writeBackBuffer_payload_address == decode_INSTRUCTION[24 : 20]); + assign when_HazardSimplePlugin_l59 = (writeBack_INSTRUCTION[11 : 7] == decode_INSTRUCTION[19 : 15]); + assign when_HazardSimplePlugin_l62 = (writeBack_INSTRUCTION[11 : 7] == decode_INSTRUCTION[24 : 20]); + assign when_HazardSimplePlugin_l57 = (writeBack_arbitration_isValid && writeBack_REGFILE_WRITE_VALID); + assign when_HazardSimplePlugin_l58 = (1'b1 || (! 1'b1)); + assign when_HazardSimplePlugin_l59_1 = (memory_INSTRUCTION[11 : 7] == decode_INSTRUCTION[19 : 15]); + assign when_HazardSimplePlugin_l62_1 = (memory_INSTRUCTION[11 : 7] == decode_INSTRUCTION[24 : 20]); + assign when_HazardSimplePlugin_l57_1 = (memory_arbitration_isValid && memory_REGFILE_WRITE_VALID); + assign when_HazardSimplePlugin_l58_1 = (1'b1 || (! memory_BYPASSABLE_MEMORY_STAGE)); + assign when_HazardSimplePlugin_l59_2 = (execute_INSTRUCTION[11 : 7] == decode_INSTRUCTION[19 : 15]); + assign when_HazardSimplePlugin_l62_2 = (execute_INSTRUCTION[11 : 7] == decode_INSTRUCTION[24 : 20]); + assign when_HazardSimplePlugin_l57_2 = (execute_arbitration_isValid && execute_REGFILE_WRITE_VALID); + assign when_HazardSimplePlugin_l58_2 = (1'b1 || (! execute_BYPASSABLE_EXECUTE_STAGE)); + assign when_HazardSimplePlugin_l105 = (! decode_RS1_USE); + assign when_HazardSimplePlugin_l108 = (! decode_RS2_USE); + assign when_HazardSimplePlugin_l113 = (decode_arbitration_isValid && (HazardSimplePlugin_src0Hazard || HazardSimplePlugin_src1Hazard)); + assign execute_BranchPlugin_eq = (execute_SRC1 == execute_SRC2); + assign switch_Misc_l200_1 = execute_INSTRUCTION[14 : 12]; + always @(*) begin + casez(switch_Misc_l200_1) + 3'b000 : begin + _zz_execute_BRANCH_DO = execute_BranchPlugin_eq; + end + 3'b001 : begin + _zz_execute_BRANCH_DO = (! execute_BranchPlugin_eq); + end + 3'b1?1 : begin + _zz_execute_BRANCH_DO = (! execute_SRC_LESS); + end + default : begin + _zz_execute_BRANCH_DO = execute_SRC_LESS; + end + endcase + end + + always @(*) begin + case(execute_BRANCH_CTRL) + `BranchCtrlEnum_binary_sequential_INC : begin + _zz_execute_BRANCH_DO_1 = 1'b0; + end + `BranchCtrlEnum_binary_sequential_JAL : begin + _zz_execute_BRANCH_DO_1 = 1'b1; + end + `BranchCtrlEnum_binary_sequential_JALR : begin + _zz_execute_BRANCH_DO_1 = 1'b1; + end + default : begin + _zz_execute_BRANCH_DO_1 = _zz_execute_BRANCH_DO; + end + endcase + end + + assign execute_BranchPlugin_branch_src1 = ((execute_BRANCH_CTRL == `BranchCtrlEnum_binary_sequential_JALR) ? execute_RS1 : execute_PC); + assign _zz_execute_BranchPlugin_branch_src2 = _zz__zz_execute_BranchPlugin_branch_src2[19]; + always @(*) begin + _zz_execute_BranchPlugin_branch_src2_1[10] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[9] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[8] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[7] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[6] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[5] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[4] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[3] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[2] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[1] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[0] = _zz_execute_BranchPlugin_branch_src2; + end + + assign _zz_execute_BranchPlugin_branch_src2_2 = execute_INSTRUCTION[31]; + always @(*) begin + _zz_execute_BranchPlugin_branch_src2_3[19] = _zz_execute_BranchPlugin_branch_src2_2; + _zz_execute_BranchPlugin_branch_src2_3[18] = _zz_execute_BranchPlugin_branch_src2_2; + _zz_execute_BranchPlugin_branch_src2_3[17] = _zz_execute_BranchPlugin_branch_src2_2; + _zz_execute_BranchPlugin_branch_src2_3[16] = _zz_execute_BranchPlugin_branch_src2_2; + _zz_execute_BranchPlugin_branch_src2_3[15] = _zz_execute_BranchPlugin_branch_src2_2; + _zz_execute_BranchPlugin_branch_src2_3[14] = _zz_execute_BranchPlugin_branch_src2_2; + _zz_execute_BranchPlugin_branch_src2_3[13] = _zz_execute_BranchPlugin_branch_src2_2; + _zz_execute_BranchPlugin_branch_src2_3[12] = _zz_execute_BranchPlugin_branch_src2_2; + _zz_execute_BranchPlugin_branch_src2_3[11] = _zz_execute_BranchPlugin_branch_src2_2; + _zz_execute_BranchPlugin_branch_src2_3[10] = _zz_execute_BranchPlugin_branch_src2_2; + _zz_execute_BranchPlugin_branch_src2_3[9] = _zz_execute_BranchPlugin_branch_src2_2; + _zz_execute_BranchPlugin_branch_src2_3[8] = _zz_execute_BranchPlugin_branch_src2_2; + _zz_execute_BranchPlugin_branch_src2_3[7] = _zz_execute_BranchPlugin_branch_src2_2; + _zz_execute_BranchPlugin_branch_src2_3[6] = _zz_execute_BranchPlugin_branch_src2_2; + _zz_execute_BranchPlugin_branch_src2_3[5] = _zz_execute_BranchPlugin_branch_src2_2; + _zz_execute_BranchPlugin_branch_src2_3[4] = _zz_execute_BranchPlugin_branch_src2_2; + _zz_execute_BranchPlugin_branch_src2_3[3] = _zz_execute_BranchPlugin_branch_src2_2; + _zz_execute_BranchPlugin_branch_src2_3[2] = _zz_execute_BranchPlugin_branch_src2_2; + _zz_execute_BranchPlugin_branch_src2_3[1] = _zz_execute_BranchPlugin_branch_src2_2; + _zz_execute_BranchPlugin_branch_src2_3[0] = _zz_execute_BranchPlugin_branch_src2_2; + end + + assign _zz_execute_BranchPlugin_branch_src2_4 = _zz__zz_execute_BranchPlugin_branch_src2_4[11]; + always @(*) begin + _zz_execute_BranchPlugin_branch_src2_5[18] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[17] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[16] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[15] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[14] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[13] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[12] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[11] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[10] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[9] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[8] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[7] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[6] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[5] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[4] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[3] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[2] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[1] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[0] = _zz_execute_BranchPlugin_branch_src2_4; + end + + always @(*) begin + case(execute_BRANCH_CTRL) + `BranchCtrlEnum_binary_sequential_JAL : begin + _zz_execute_BranchPlugin_branch_src2_6 = {{_zz_execute_BranchPlugin_branch_src2_1,{{{execute_INSTRUCTION[31],execute_INSTRUCTION[19 : 12]},execute_INSTRUCTION[20]},execute_INSTRUCTION[30 : 21]}},1'b0}; + end + `BranchCtrlEnum_binary_sequential_JALR : begin + _zz_execute_BranchPlugin_branch_src2_6 = {_zz_execute_BranchPlugin_branch_src2_3,execute_INSTRUCTION[31 : 20]}; + end + default : begin + _zz_execute_BranchPlugin_branch_src2_6 = {{_zz_execute_BranchPlugin_branch_src2_5,{{{execute_INSTRUCTION[31],execute_INSTRUCTION[7]},execute_INSTRUCTION[30 : 25]},execute_INSTRUCTION[11 : 8]}},1'b0}; + end + endcase + end + + assign execute_BranchPlugin_branch_src2 = _zz_execute_BranchPlugin_branch_src2_6; + assign execute_BranchPlugin_branchAdder = (execute_BranchPlugin_branch_src1 + execute_BranchPlugin_branch_src2); + assign BranchPlugin_jumpInterface_valid = ((memory_arbitration_isValid && memory_BRANCH_DO) && (! 1'b0)); + assign BranchPlugin_jumpInterface_payload = memory_BRANCH_CALC; + always @(*) begin + CsrPlugin_privilege = 2'b11; + if(CsrPlugin_forceMachineWire) begin + CsrPlugin_privilege = 2'b11; + end + end + + assign CsrPlugin_misa_base = 2'b01; + assign CsrPlugin_misa_extensions = 26'h0000042; + assign _zz_when_CsrPlugin_l952 = (CsrPlugin_mip_MTIP && CsrPlugin_mie_MTIE); + assign _zz_when_CsrPlugin_l952_1 = (CsrPlugin_mip_MSIP && CsrPlugin_mie_MSIE); + assign _zz_when_CsrPlugin_l952_2 = (CsrPlugin_mip_MEIP && CsrPlugin_mie_MEIE); + assign CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilegeUncapped = 2'b11; + assign CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilege = ((CsrPlugin_privilege < CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilegeUncapped) ? CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilegeUncapped : CsrPlugin_privilege); + always @(*) begin + CsrPlugin_exceptionPortCtrl_exceptionValids_decode = CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_decode; + if(decodeExceptionPort_valid) begin + CsrPlugin_exceptionPortCtrl_exceptionValids_decode = 1'b1; + end + if(decode_arbitration_isFlushed) begin + CsrPlugin_exceptionPortCtrl_exceptionValids_decode = 1'b0; + end + end + + always @(*) begin + CsrPlugin_exceptionPortCtrl_exceptionValids_execute = CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_execute; + if(CsrPlugin_selfException_valid) begin + CsrPlugin_exceptionPortCtrl_exceptionValids_execute = 1'b1; + end + if(execute_arbitration_isFlushed) begin + CsrPlugin_exceptionPortCtrl_exceptionValids_execute = 1'b0; + end + end + + always @(*) begin + CsrPlugin_exceptionPortCtrl_exceptionValids_memory = CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_memory; + if(memory_arbitration_isFlushed) begin + CsrPlugin_exceptionPortCtrl_exceptionValids_memory = 1'b0; + end + end + + always @(*) begin + CsrPlugin_exceptionPortCtrl_exceptionValids_writeBack = CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_writeBack; + if(writeBack_arbitration_isFlushed) begin + CsrPlugin_exceptionPortCtrl_exceptionValids_writeBack = 1'b0; + end + end + + assign when_CsrPlugin_l909 = (! decode_arbitration_isStuck); + assign when_CsrPlugin_l909_1 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l909_2 = (! memory_arbitration_isStuck); + assign when_CsrPlugin_l909_3 = (! writeBack_arbitration_isStuck); + assign when_CsrPlugin_l922 = ({CsrPlugin_exceptionPortCtrl_exceptionValids_writeBack,{CsrPlugin_exceptionPortCtrl_exceptionValids_memory,{CsrPlugin_exceptionPortCtrl_exceptionValids_execute,CsrPlugin_exceptionPortCtrl_exceptionValids_decode}}} != 4'b0000); + assign CsrPlugin_exceptionPendings_0 = CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_decode; + assign CsrPlugin_exceptionPendings_1 = CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_execute; + assign CsrPlugin_exceptionPendings_2 = CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_memory; + assign CsrPlugin_exceptionPendings_3 = CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_writeBack; + assign when_CsrPlugin_l946 = (CsrPlugin_mstatus_MIE || (CsrPlugin_privilege < 2'b11)); + assign when_CsrPlugin_l952 = ((_zz_when_CsrPlugin_l952 && 1'b1) && (! 1'b0)); + assign when_CsrPlugin_l952_1 = ((_zz_when_CsrPlugin_l952_1 && 1'b1) && (! 1'b0)); + assign when_CsrPlugin_l952_2 = ((_zz_when_CsrPlugin_l952_2 && 1'b1) && (! 1'b0)); + assign CsrPlugin_exception = (CsrPlugin_exceptionPortCtrl_exceptionValids_writeBack && CsrPlugin_allowException); + assign CsrPlugin_lastStageWasWfi = 1'b0; + assign CsrPlugin_pipelineLiberator_active = ((CsrPlugin_interrupt_valid && CsrPlugin_allowInterrupts) && decode_arbitration_isValid); + assign when_CsrPlugin_l980 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l980_1 = (! memory_arbitration_isStuck); + assign when_CsrPlugin_l980_2 = (! writeBack_arbitration_isStuck); + assign when_CsrPlugin_l985 = ((! CsrPlugin_pipelineLiberator_active) || decode_arbitration_removeIt); + always @(*) begin + CsrPlugin_pipelineLiberator_done = CsrPlugin_pipelineLiberator_pcValids_2; + if(when_CsrPlugin_l991) begin + CsrPlugin_pipelineLiberator_done = 1'b0; + end + if(CsrPlugin_hadException) begin + CsrPlugin_pipelineLiberator_done = 1'b0; + end + end + + assign when_CsrPlugin_l991 = ({CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_writeBack,{CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_memory,CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_execute}} != 3'b000); + assign CsrPlugin_interruptJump = ((CsrPlugin_interrupt_valid && CsrPlugin_pipelineLiberator_done) && CsrPlugin_allowInterrupts); + always @(*) begin + CsrPlugin_targetPrivilege = CsrPlugin_interrupt_targetPrivilege; + if(CsrPlugin_hadException) begin + CsrPlugin_targetPrivilege = CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilege; + end + end + + always @(*) begin + CsrPlugin_trapCause = CsrPlugin_interrupt_code; + if(CsrPlugin_hadException) begin + CsrPlugin_trapCause = CsrPlugin_exceptionPortCtrl_exceptionContext_code; + end + end + + always @(*) begin + CsrPlugin_xtvec_mode = 2'bxx; + case(CsrPlugin_targetPrivilege) + 2'b11 : begin + CsrPlugin_xtvec_mode = CsrPlugin_mtvec_mode; + end + default : begin + end + endcase + end + + always @(*) begin + CsrPlugin_xtvec_base = 30'bxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx; + case(CsrPlugin_targetPrivilege) + 2'b11 : begin + CsrPlugin_xtvec_base = CsrPlugin_mtvec_base; + end + default : begin + end + endcase + end + + assign when_CsrPlugin_l1019 = (CsrPlugin_hadException || CsrPlugin_interruptJump); + assign when_CsrPlugin_l1064 = (writeBack_arbitration_isValid && (writeBack_ENV_CTRL == `EnvCtrlEnum_binary_sequential_XRET)); + assign switch_CsrPlugin_l1068 = writeBack_INSTRUCTION[29 : 28]; + assign contextSwitching = CsrPlugin_jumpInterface_valid; + assign when_CsrPlugin_l1116 = ({(writeBack_arbitration_isValid && (writeBack_ENV_CTRL == `EnvCtrlEnum_binary_sequential_XRET)),{(memory_arbitration_isValid && (memory_ENV_CTRL == `EnvCtrlEnum_binary_sequential_XRET)),(execute_arbitration_isValid && (execute_ENV_CTRL == `EnvCtrlEnum_binary_sequential_XRET))}} != 3'b000); + assign execute_CsrPlugin_blockedBySideEffects = (({writeBack_arbitration_isValid,memory_arbitration_isValid} != 2'b00) || 1'b0); + always @(*) begin + execute_CsrPlugin_illegalAccess = 1'b1; + if(execute_CsrPlugin_csr_768) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(execute_CsrPlugin_csr_836) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(execute_CsrPlugin_csr_772) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(execute_CsrPlugin_csr_773) begin + if(execute_CSR_WRITE_OPCODE) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + end + if(execute_CsrPlugin_csr_833) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(execute_CsrPlugin_csr_834) begin + if(execute_CSR_READ_OPCODE) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + end + if(execute_CsrPlugin_csr_835) begin + if(execute_CSR_READ_OPCODE) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + end + if(execute_CsrPlugin_csr_2816) begin + if(execute_CSR_READ_OPCODE) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + end + if(execute_CsrPlugin_csr_2944) begin + if(execute_CSR_READ_OPCODE) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + end + if(execute_CsrPlugin_csr_3008) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(execute_CsrPlugin_csr_4032) begin + if(execute_CSR_READ_OPCODE) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + end + if(CsrPlugin_csrMapping_allowCsrSignal) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(when_CsrPlugin_l1297) begin + execute_CsrPlugin_illegalAccess = 1'b1; + end + if(when_CsrPlugin_l1302) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + end + + always @(*) begin + execute_CsrPlugin_illegalInstruction = 1'b0; + if(when_CsrPlugin_l1136) begin + if(when_CsrPlugin_l1137) begin + execute_CsrPlugin_illegalInstruction = 1'b1; + end + end + end + + always @(*) begin + CsrPlugin_selfException_valid = 1'b0; + if(when_CsrPlugin_l1144) begin + CsrPlugin_selfException_valid = 1'b1; + end + end + + always @(*) begin + CsrPlugin_selfException_payload_code = 4'bxxxx; + if(when_CsrPlugin_l1144) begin + case(CsrPlugin_privilege) + 2'b00 : begin + CsrPlugin_selfException_payload_code = 4'b1000; + end + default : begin + CsrPlugin_selfException_payload_code = 4'b1011; + end + endcase + end + end + + assign CsrPlugin_selfException_payload_badAddr = execute_INSTRUCTION; + assign when_CsrPlugin_l1136 = (execute_arbitration_isValid && (execute_ENV_CTRL == `EnvCtrlEnum_binary_sequential_XRET)); + assign when_CsrPlugin_l1137 = (CsrPlugin_privilege < execute_INSTRUCTION[29 : 28]); + assign when_CsrPlugin_l1144 = (execute_arbitration_isValid && (execute_ENV_CTRL == `EnvCtrlEnum_binary_sequential_ECALL)); + always @(*) begin + execute_CsrPlugin_writeInstruction = ((execute_arbitration_isValid && execute_IS_CSR) && execute_CSR_WRITE_OPCODE); + if(when_CsrPlugin_l1297) begin + execute_CsrPlugin_writeInstruction = 1'b0; + end + end + + always @(*) begin + execute_CsrPlugin_readInstruction = ((execute_arbitration_isValid && execute_IS_CSR) && execute_CSR_READ_OPCODE); + if(when_CsrPlugin_l1297) begin + execute_CsrPlugin_readInstruction = 1'b0; + end + end + + assign execute_CsrPlugin_writeEnable = (execute_CsrPlugin_writeInstruction && (! execute_arbitration_isStuck)); + assign execute_CsrPlugin_readEnable = (execute_CsrPlugin_readInstruction && (! execute_arbitration_isStuck)); + assign CsrPlugin_csrMapping_hazardFree = (! execute_CsrPlugin_blockedBySideEffects); + assign execute_CsrPlugin_readToWriteData = CsrPlugin_csrMapping_readDataSignal; + assign switch_Misc_l200_2 = execute_INSTRUCTION[13]; + always @(*) begin + case(switch_Misc_l200_2) + 1'b0 : begin + _zz_CsrPlugin_csrMapping_writeDataSignal = execute_SRC1; + end + default : begin + _zz_CsrPlugin_csrMapping_writeDataSignal = (execute_INSTRUCTION[12] ? (execute_CsrPlugin_readToWriteData & (~ execute_SRC1)) : (execute_CsrPlugin_readToWriteData | execute_SRC1)); + end + endcase + end + + assign CsrPlugin_csrMapping_writeDataSignal = _zz_CsrPlugin_csrMapping_writeDataSignal; + assign when_CsrPlugin_l1176 = (execute_arbitration_isValid && execute_IS_CSR); + assign when_CsrPlugin_l1180 = (execute_arbitration_isValid && (execute_IS_CSR || 1'b0)); + assign execute_CsrPlugin_csrAddress = execute_INSTRUCTION[31 : 20]; + assign execute_MulPlugin_a = execute_RS1; + assign execute_MulPlugin_b = execute_RS2; + assign switch_MulPlugin_l87 = execute_INSTRUCTION[13 : 12]; + always @(*) begin + case(switch_MulPlugin_l87) + 2'b01 : begin + execute_MulPlugin_aSigned = 1'b1; + end + 2'b10 : begin + execute_MulPlugin_aSigned = 1'b1; + end + default : begin + execute_MulPlugin_aSigned = 1'b0; + end + endcase + end + + always @(*) begin + case(switch_MulPlugin_l87) + 2'b01 : begin + execute_MulPlugin_bSigned = 1'b1; + end + 2'b10 : begin + execute_MulPlugin_bSigned = 1'b0; + end + default : begin + execute_MulPlugin_bSigned = 1'b0; + end + endcase + end + + assign execute_MulPlugin_aULow = execute_MulPlugin_a[15 : 0]; + assign execute_MulPlugin_bULow = execute_MulPlugin_b[15 : 0]; + assign execute_MulPlugin_aSLow = {1'b0,execute_MulPlugin_a[15 : 0]}; + assign execute_MulPlugin_bSLow = {1'b0,execute_MulPlugin_b[15 : 0]}; + assign execute_MulPlugin_aHigh = {(execute_MulPlugin_aSigned && execute_MulPlugin_a[31]),execute_MulPlugin_a[31 : 16]}; + assign execute_MulPlugin_bHigh = {(execute_MulPlugin_bSigned && execute_MulPlugin_b[31]),execute_MulPlugin_b[31 : 16]}; + assign writeBack_MulPlugin_result = ($signed(_zz_writeBack_MulPlugin_result) + $signed(_zz_writeBack_MulPlugin_result_1)); + assign when_MulPlugin_l147 = (writeBack_arbitration_isValid && writeBack_IS_MUL); + assign switch_MulPlugin_l148 = writeBack_INSTRUCTION[13 : 12]; + assign _zz_CsrPlugin_csrMapping_readDataInit_1 = (_zz_CsrPlugin_csrMapping_readDataInit & externalInterruptArray_regNext); + assign externalInterrupt = (_zz_CsrPlugin_csrMapping_readDataInit_1 != 32'h0); + assign when_Pipeline_l124 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_1 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_2 = ((! writeBack_arbitration_isStuck) && (! CsrPlugin_exceptionPortCtrl_exceptionValids_writeBack)); + assign when_Pipeline_l124_3 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_4 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_5 = (! writeBack_arbitration_isStuck); + assign when_Pipeline_l124_6 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_7 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_8 = (! writeBack_arbitration_isStuck); + assign _zz_decode_to_execute_SRC1_CTRL_1 = decode_SRC1_CTRL; + assign _zz_decode_SRC1_CTRL = _zz_decode_SRC1_CTRL_1; + assign when_Pipeline_l124_9 = (! execute_arbitration_isStuck); + assign _zz_execute_SRC1_CTRL = decode_to_execute_SRC1_CTRL; + assign when_Pipeline_l124_10 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_11 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_12 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_13 = (! writeBack_arbitration_isStuck); + assign _zz_decode_to_execute_SRC2_CTRL_1 = decode_SRC2_CTRL; + assign _zz_decode_SRC2_CTRL = _zz_decode_SRC2_CTRL_1; + assign when_Pipeline_l124_14 = (! execute_arbitration_isStuck); + assign _zz_execute_SRC2_CTRL = decode_to_execute_SRC2_CTRL; + assign when_Pipeline_l124_15 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_16 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_17 = (! writeBack_arbitration_isStuck); + assign when_Pipeline_l124_18 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_19 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_20 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_21 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_22 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_23 = (! writeBack_arbitration_isStuck); + assign _zz_decode_to_execute_ALU_CTRL_1 = decode_ALU_CTRL; + assign _zz_decode_ALU_CTRL = _zz_decode_ALU_CTRL_1; + assign when_Pipeline_l124_24 = (! execute_arbitration_isStuck); + assign _zz_execute_ALU_CTRL = decode_to_execute_ALU_CTRL; + assign when_Pipeline_l124_25 = (! execute_arbitration_isStuck); + assign _zz_decode_to_execute_ALU_BITWISE_CTRL_1 = decode_ALU_BITWISE_CTRL; + assign _zz_decode_ALU_BITWISE_CTRL = _zz_decode_ALU_BITWISE_CTRL_1; + assign when_Pipeline_l124_26 = (! execute_arbitration_isStuck); + assign _zz_execute_ALU_BITWISE_CTRL = decode_to_execute_ALU_BITWISE_CTRL; + assign _zz_decode_to_execute_SHIFT_CTRL_1 = decode_SHIFT_CTRL; + assign _zz_execute_to_memory_SHIFT_CTRL_1 = execute_SHIFT_CTRL; + assign _zz_decode_SHIFT_CTRL = _zz_decode_SHIFT_CTRL_1; + assign when_Pipeline_l124_27 = (! execute_arbitration_isStuck); + assign _zz_execute_SHIFT_CTRL = decode_to_execute_SHIFT_CTRL; + assign when_Pipeline_l124_28 = (! memory_arbitration_isStuck); + assign _zz_memory_SHIFT_CTRL = execute_to_memory_SHIFT_CTRL; + assign _zz_decode_to_execute_BRANCH_CTRL_1 = decode_BRANCH_CTRL; + assign _zz_decode_BRANCH_CTRL = _zz_decode_BRANCH_CTRL_1; + assign when_Pipeline_l124_29 = (! execute_arbitration_isStuck); + assign _zz_execute_BRANCH_CTRL = decode_to_execute_BRANCH_CTRL; + assign when_Pipeline_l124_30 = (! execute_arbitration_isStuck); + assign _zz_decode_to_execute_ENV_CTRL_1 = decode_ENV_CTRL; + assign _zz_execute_to_memory_ENV_CTRL_1 = execute_ENV_CTRL; + assign _zz_memory_to_writeBack_ENV_CTRL_1 = memory_ENV_CTRL; + assign _zz_decode_ENV_CTRL = _zz_decode_ENV_CTRL_1; + assign when_Pipeline_l124_31 = (! execute_arbitration_isStuck); + assign _zz_execute_ENV_CTRL = decode_to_execute_ENV_CTRL; + assign when_Pipeline_l124_32 = (! memory_arbitration_isStuck); + assign _zz_memory_ENV_CTRL = execute_to_memory_ENV_CTRL; + assign when_Pipeline_l124_33 = (! writeBack_arbitration_isStuck); + assign _zz_writeBack_ENV_CTRL = memory_to_writeBack_ENV_CTRL; + assign when_Pipeline_l124_34 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_35 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_36 = (! writeBack_arbitration_isStuck); + assign when_Pipeline_l124_37 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_38 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_39 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_40 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_41 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_42 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_43 = (! writeBack_arbitration_isStuck); + assign when_Pipeline_l124_44 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_45 = (! writeBack_arbitration_isStuck); + assign when_Pipeline_l124_46 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_47 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_48 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_49 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_50 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_51 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_52 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_53 = (! writeBack_arbitration_isStuck); + assign when_Pipeline_l124_54 = (! writeBack_arbitration_isStuck); + assign when_Pipeline_l124_55 = (! writeBack_arbitration_isStuck); + assign decode_arbitration_isFlushed = (({writeBack_arbitration_flushNext,{memory_arbitration_flushNext,execute_arbitration_flushNext}} != 3'b000) || ({writeBack_arbitration_flushIt,{memory_arbitration_flushIt,{execute_arbitration_flushIt,decode_arbitration_flushIt}}} != 4'b0000)); + assign execute_arbitration_isFlushed = (({writeBack_arbitration_flushNext,memory_arbitration_flushNext} != 2'b00) || ({writeBack_arbitration_flushIt,{memory_arbitration_flushIt,execute_arbitration_flushIt}} != 3'b000)); + assign memory_arbitration_isFlushed = ((writeBack_arbitration_flushNext != 1'b0) || ({writeBack_arbitration_flushIt,memory_arbitration_flushIt} != 2'b00)); + assign writeBack_arbitration_isFlushed = (1'b0 || (writeBack_arbitration_flushIt != 1'b0)); + assign decode_arbitration_isStuckByOthers = (decode_arbitration_haltByOther || (((1'b0 || execute_arbitration_isStuck) || memory_arbitration_isStuck) || writeBack_arbitration_isStuck)); + assign decode_arbitration_isStuck = (decode_arbitration_haltItself || decode_arbitration_isStuckByOthers); + assign decode_arbitration_isMoving = ((! decode_arbitration_isStuck) && (! decode_arbitration_removeIt)); + assign decode_arbitration_isFiring = ((decode_arbitration_isValid && (! decode_arbitration_isStuck)) && (! decode_arbitration_removeIt)); + assign execute_arbitration_isStuckByOthers = (execute_arbitration_haltByOther || ((1'b0 || memory_arbitration_isStuck) || writeBack_arbitration_isStuck)); + assign execute_arbitration_isStuck = (execute_arbitration_haltItself || execute_arbitration_isStuckByOthers); + assign execute_arbitration_isMoving = ((! execute_arbitration_isStuck) && (! execute_arbitration_removeIt)); + assign execute_arbitration_isFiring = ((execute_arbitration_isValid && (! execute_arbitration_isStuck)) && (! execute_arbitration_removeIt)); + assign memory_arbitration_isStuckByOthers = (memory_arbitration_haltByOther || (1'b0 || writeBack_arbitration_isStuck)); + assign memory_arbitration_isStuck = (memory_arbitration_haltItself || memory_arbitration_isStuckByOthers); + assign memory_arbitration_isMoving = ((! memory_arbitration_isStuck) && (! memory_arbitration_removeIt)); + assign memory_arbitration_isFiring = ((memory_arbitration_isValid && (! memory_arbitration_isStuck)) && (! memory_arbitration_removeIt)); + assign writeBack_arbitration_isStuckByOthers = (writeBack_arbitration_haltByOther || 1'b0); + assign writeBack_arbitration_isStuck = (writeBack_arbitration_haltItself || writeBack_arbitration_isStuckByOthers); + assign writeBack_arbitration_isMoving = ((! writeBack_arbitration_isStuck) && (! writeBack_arbitration_removeIt)); + assign writeBack_arbitration_isFiring = ((writeBack_arbitration_isValid && (! writeBack_arbitration_isStuck)) && (! writeBack_arbitration_removeIt)); + assign when_Pipeline_l151 = ((! execute_arbitration_isStuck) || execute_arbitration_removeIt); + assign when_Pipeline_l154 = ((! decode_arbitration_isStuck) && (! decode_arbitration_removeIt)); + assign when_Pipeline_l151_1 = ((! memory_arbitration_isStuck) || memory_arbitration_removeIt); + assign when_Pipeline_l154_1 = ((! execute_arbitration_isStuck) && (! execute_arbitration_removeIt)); + assign when_Pipeline_l151_2 = ((! writeBack_arbitration_isStuck) || writeBack_arbitration_removeIt); + assign when_Pipeline_l154_2 = ((! memory_arbitration_isStuck) && (! memory_arbitration_removeIt)); + assign when_CsrPlugin_l1264 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_1 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_2 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_3 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_4 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_5 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_6 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_7 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_8 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_9 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_10 = (! execute_arbitration_isStuck); + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_2 = 32'h0; + if(execute_CsrPlugin_csr_768) begin + _zz_CsrPlugin_csrMapping_readDataInit_2[12 : 11] = CsrPlugin_mstatus_MPP; + _zz_CsrPlugin_csrMapping_readDataInit_2[7 : 7] = CsrPlugin_mstatus_MPIE; + _zz_CsrPlugin_csrMapping_readDataInit_2[3 : 3] = CsrPlugin_mstatus_MIE; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_3 = 32'h0; + if(execute_CsrPlugin_csr_836) begin + _zz_CsrPlugin_csrMapping_readDataInit_3[11 : 11] = CsrPlugin_mip_MEIP; + _zz_CsrPlugin_csrMapping_readDataInit_3[7 : 7] = CsrPlugin_mip_MTIP; + _zz_CsrPlugin_csrMapping_readDataInit_3[3 : 3] = CsrPlugin_mip_MSIP; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_4 = 32'h0; + if(execute_CsrPlugin_csr_772) begin + _zz_CsrPlugin_csrMapping_readDataInit_4[11 : 11] = CsrPlugin_mie_MEIE; + _zz_CsrPlugin_csrMapping_readDataInit_4[7 : 7] = CsrPlugin_mie_MTIE; + _zz_CsrPlugin_csrMapping_readDataInit_4[3 : 3] = CsrPlugin_mie_MSIE; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_5 = 32'h0; + if(execute_CsrPlugin_csr_833) begin + _zz_CsrPlugin_csrMapping_readDataInit_5[31 : 0] = CsrPlugin_mepc; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_6 = 32'h0; + if(execute_CsrPlugin_csr_834) begin + _zz_CsrPlugin_csrMapping_readDataInit_6[31 : 31] = CsrPlugin_mcause_interrupt; + _zz_CsrPlugin_csrMapping_readDataInit_6[3 : 0] = CsrPlugin_mcause_exceptionCode; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_7 = 32'h0; + if(execute_CsrPlugin_csr_835) begin + _zz_CsrPlugin_csrMapping_readDataInit_7[31 : 0] = CsrPlugin_mtval; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_8 = 32'h0; + if(execute_CsrPlugin_csr_2816) begin + _zz_CsrPlugin_csrMapping_readDataInit_8[31 : 0] = CsrPlugin_mcycle[31 : 0]; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_9 = 32'h0; + if(execute_CsrPlugin_csr_2944) begin + _zz_CsrPlugin_csrMapping_readDataInit_9[31 : 0] = CsrPlugin_mcycle[63 : 32]; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_10 = 32'h0; + if(execute_CsrPlugin_csr_3008) begin + _zz_CsrPlugin_csrMapping_readDataInit_10[31 : 0] = _zz_CsrPlugin_csrMapping_readDataInit; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_11 = 32'h0; + if(execute_CsrPlugin_csr_4032) begin + _zz_CsrPlugin_csrMapping_readDataInit_11[31 : 0] = _zz_CsrPlugin_csrMapping_readDataInit_1; + end + end + + assign CsrPlugin_csrMapping_readDataInit = ((((_zz_CsrPlugin_csrMapping_readDataInit_2 | _zz_CsrPlugin_csrMapping_readDataInit_3) | (_zz_CsrPlugin_csrMapping_readDataInit_4 | _zz_CsrPlugin_csrMapping_readDataInit_5)) | ((_zz_CsrPlugin_csrMapping_readDataInit_6 | _zz_CsrPlugin_csrMapping_readDataInit_7) | (_zz_CsrPlugin_csrMapping_readDataInit_8 | _zz_CsrPlugin_csrMapping_readDataInit_9))) | (_zz_CsrPlugin_csrMapping_readDataInit_10 | _zz_CsrPlugin_csrMapping_readDataInit_11)); + assign when_CsrPlugin_l1297 = (CsrPlugin_privilege < execute_CsrPlugin_csrAddress[9 : 8]); + assign when_CsrPlugin_l1302 = ((! execute_arbitration_isValid) || (! execute_IS_CSR)); + assign iBusWishbone_ADR = {_zz_iBusWishbone_ADR_1,_zz_iBusWishbone_ADR}; + assign iBusWishbone_CTI = ((_zz_iBusWishbone_ADR == 3'b111) ? 3'b111 : 3'b010); + assign iBusWishbone_BTE = 2'b00; + assign iBusWishbone_SEL = 4'b1111; + assign iBusWishbone_WE = 1'b0; + assign iBusWishbone_DAT_MOSI = 32'bxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx; + always @(*) begin + iBusWishbone_CYC = 1'b0; + if(when_InstructionCache_l239) begin + iBusWishbone_CYC = 1'b1; + end + end + + always @(*) begin + iBusWishbone_STB = 1'b0; + if(when_InstructionCache_l239) begin + iBusWishbone_STB = 1'b1; + end + end + + assign when_InstructionCache_l239 = (iBus_cmd_valid || (_zz_iBusWishbone_ADR != 3'b000)); + assign iBus_cmd_ready = (iBus_cmd_valid && iBusWishbone_ACK); + assign iBus_rsp_valid = _zz_iBus_rsp_valid; + assign iBus_rsp_payload_data = iBusWishbone_DAT_MISO_regNext; + assign iBus_rsp_payload_error = 1'b0; + assign dBus_cmd_halfPipe_fire = (dBus_cmd_halfPipe_valid && dBus_cmd_halfPipe_ready); + assign dBus_cmd_ready = (! dBus_cmd_rValid); + assign dBus_cmd_halfPipe_valid = dBus_cmd_rValid; + assign dBus_cmd_halfPipe_payload_wr = dBus_cmd_rData_wr; + assign dBus_cmd_halfPipe_payload_address = dBus_cmd_rData_address; + assign dBus_cmd_halfPipe_payload_data = dBus_cmd_rData_data; + assign dBus_cmd_halfPipe_payload_size = dBus_cmd_rData_size; + assign dBusWishbone_ADR = (dBus_cmd_halfPipe_payload_address >>> 2); + assign dBusWishbone_CTI = 3'b000; + assign dBusWishbone_BTE = 2'b00; + always @(*) begin + case(dBus_cmd_halfPipe_payload_size) + 2'b00 : begin + _zz_dBusWishbone_SEL = 4'b0001; + end + 2'b01 : begin + _zz_dBusWishbone_SEL = 4'b0011; + end + default : begin + _zz_dBusWishbone_SEL = 4'b1111; + end + endcase + end + + always @(*) begin + dBusWishbone_SEL = (_zz_dBusWishbone_SEL <<< dBus_cmd_halfPipe_payload_address[1 : 0]); + if(when_DBusSimplePlugin_l189) begin + dBusWishbone_SEL = 4'b1111; + end + end + + assign when_DBusSimplePlugin_l189 = (! dBus_cmd_halfPipe_payload_wr); + assign dBusWishbone_WE = dBus_cmd_halfPipe_payload_wr; + assign dBusWishbone_DAT_MOSI = dBus_cmd_halfPipe_payload_data; + assign dBus_cmd_halfPipe_ready = (dBus_cmd_halfPipe_valid && dBusWishbone_ACK); + assign dBusWishbone_CYC = dBus_cmd_halfPipe_valid; + assign dBusWishbone_STB = dBus_cmd_halfPipe_valid; + assign dBus_rsp_ready = ((dBus_cmd_halfPipe_valid && (! dBusWishbone_WE)) && dBusWishbone_ACK); + assign dBus_rsp_data = dBusWishbone_DAT_MISO; + assign dBus_rsp_error = 1'b0; + always @(posedge clk) begin + if(reset) begin + IBusCachedPlugin_fetchPc_pcReg <= externalResetVector; + IBusCachedPlugin_fetchPc_correctionReg <= 1'b0; + IBusCachedPlugin_fetchPc_booted <= 1'b0; + IBusCachedPlugin_fetchPc_inc <= 1'b0; + _zz_IBusCachedPlugin_iBusRsp_stages_0_output_ready_2 <= 1'b0; + _zz_IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_valid <= 1'b0; + IBusCachedPlugin_injector_nextPcCalc_valids_0 <= 1'b0; + IBusCachedPlugin_injector_nextPcCalc_valids_1 <= 1'b0; + IBusCachedPlugin_injector_nextPcCalc_valids_2 <= 1'b0; + IBusCachedPlugin_injector_nextPcCalc_valids_3 <= 1'b0; + IBusCachedPlugin_injector_nextPcCalc_valids_4 <= 1'b0; + IBusCachedPlugin_rspCounter <= _zz_IBusCachedPlugin_rspCounter; + IBusCachedPlugin_rspCounter <= 32'h0; + _zz_2 <= 1'b1; + HazardSimplePlugin_writeBackBuffer_valid <= 1'b0; + CsrPlugin_mstatus_MIE <= 1'b0; + CsrPlugin_mstatus_MPIE <= 1'b0; + CsrPlugin_mstatus_MPP <= 2'b11; + CsrPlugin_mie_MEIE <= 1'b0; + CsrPlugin_mie_MTIE <= 1'b0; + CsrPlugin_mie_MSIE <= 1'b0; + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_decode <= 1'b0; + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_execute <= 1'b0; + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_memory <= 1'b0; + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_writeBack <= 1'b0; + CsrPlugin_interrupt_valid <= 1'b0; + CsrPlugin_pipelineLiberator_pcValids_0 <= 1'b0; + CsrPlugin_pipelineLiberator_pcValids_1 <= 1'b0; + CsrPlugin_pipelineLiberator_pcValids_2 <= 1'b0; + CsrPlugin_hadException <= 1'b0; + execute_CsrPlugin_wfiWake <= 1'b0; + _zz_CsrPlugin_csrMapping_readDataInit <= 32'h0; + execute_arbitration_isValid <= 1'b0; + memory_arbitration_isValid <= 1'b0; + writeBack_arbitration_isValid <= 1'b0; + _zz_iBusWishbone_ADR <= 3'b000; + _zz_iBus_rsp_valid <= 1'b0; + dBus_cmd_rValid <= 1'b0; + end else begin + if(IBusCachedPlugin_fetchPc_correction) begin + IBusCachedPlugin_fetchPc_correctionReg <= 1'b1; + end + if(IBusCachedPlugin_fetchPc_output_fire) begin + IBusCachedPlugin_fetchPc_correctionReg <= 1'b0; + end + IBusCachedPlugin_fetchPc_booted <= 1'b1; + if(when_Fetcher_l131) begin + IBusCachedPlugin_fetchPc_inc <= 1'b0; + end + if(IBusCachedPlugin_fetchPc_output_fire_1) begin + IBusCachedPlugin_fetchPc_inc <= 1'b1; + end + if(when_Fetcher_l131_1) begin + IBusCachedPlugin_fetchPc_inc <= 1'b0; + end + if(when_Fetcher_l158) begin + IBusCachedPlugin_fetchPc_pcReg <= IBusCachedPlugin_fetchPc_pc; + end + if(IBusCachedPlugin_iBusRsp_flush) begin + _zz_IBusCachedPlugin_iBusRsp_stages_0_output_ready_2 <= 1'b0; + end + if(_zz_IBusCachedPlugin_iBusRsp_stages_0_output_ready) begin + _zz_IBusCachedPlugin_iBusRsp_stages_0_output_ready_2 <= (IBusCachedPlugin_iBusRsp_stages_0_output_valid && (! 1'b0)); + end + if(IBusCachedPlugin_iBusRsp_flush) begin + _zz_IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_valid <= 1'b0; + end + if(IBusCachedPlugin_iBusRsp_stages_1_output_ready) begin + _zz_IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_valid <= (IBusCachedPlugin_iBusRsp_stages_1_output_valid && (! IBusCachedPlugin_iBusRsp_flush)); + end + if(IBusCachedPlugin_fetchPc_flushed) begin + IBusCachedPlugin_injector_nextPcCalc_valids_0 <= 1'b0; + end + if(when_Fetcher_l329) begin + IBusCachedPlugin_injector_nextPcCalc_valids_0 <= 1'b1; + end + if(IBusCachedPlugin_fetchPc_flushed) begin + IBusCachedPlugin_injector_nextPcCalc_valids_1 <= 1'b0; + end + if(when_Fetcher_l329_1) begin + IBusCachedPlugin_injector_nextPcCalc_valids_1 <= IBusCachedPlugin_injector_nextPcCalc_valids_0; + end + if(IBusCachedPlugin_fetchPc_flushed) begin + IBusCachedPlugin_injector_nextPcCalc_valids_1 <= 1'b0; + end + if(IBusCachedPlugin_fetchPc_flushed) begin + IBusCachedPlugin_injector_nextPcCalc_valids_2 <= 1'b0; + end + if(when_Fetcher_l329_2) begin + IBusCachedPlugin_injector_nextPcCalc_valids_2 <= IBusCachedPlugin_injector_nextPcCalc_valids_1; + end + if(IBusCachedPlugin_fetchPc_flushed) begin + IBusCachedPlugin_injector_nextPcCalc_valids_2 <= 1'b0; + end + if(IBusCachedPlugin_fetchPc_flushed) begin + IBusCachedPlugin_injector_nextPcCalc_valids_3 <= 1'b0; + end + if(when_Fetcher_l329_3) begin + IBusCachedPlugin_injector_nextPcCalc_valids_3 <= IBusCachedPlugin_injector_nextPcCalc_valids_2; + end + if(IBusCachedPlugin_fetchPc_flushed) begin + IBusCachedPlugin_injector_nextPcCalc_valids_3 <= 1'b0; + end + if(IBusCachedPlugin_fetchPc_flushed) begin + IBusCachedPlugin_injector_nextPcCalc_valids_4 <= 1'b0; + end + if(when_Fetcher_l329_4) begin + IBusCachedPlugin_injector_nextPcCalc_valids_4 <= IBusCachedPlugin_injector_nextPcCalc_valids_3; + end + if(IBusCachedPlugin_fetchPc_flushed) begin + IBusCachedPlugin_injector_nextPcCalc_valids_4 <= 1'b0; + end + if(iBus_rsp_valid) begin + IBusCachedPlugin_rspCounter <= (IBusCachedPlugin_rspCounter + 32'h00000001); + end + `ifndef SYNTHESIS + `ifdef FORMAL + assert((! (((dBus_rsp_ready && memory_MEMORY_ENABLE) && memory_arbitration_isValid) && memory_arbitration_isStuck))); + `else + if(!(! (((dBus_rsp_ready && memory_MEMORY_ENABLE) && memory_arbitration_isValid) && memory_arbitration_isStuck))) begin + $display("FAILURE DBusSimplePlugin doesn't allow memory stage stall when read happend"); + $finish; + end + `endif + `endif + `ifndef SYNTHESIS + `ifdef FORMAL + assert((! (((writeBack_arbitration_isValid && writeBack_MEMORY_ENABLE) && (! writeBack_MEMORY_STORE)) && writeBack_arbitration_isStuck))); + `else + if(!(! (((writeBack_arbitration_isValid && writeBack_MEMORY_ENABLE) && (! writeBack_MEMORY_STORE)) && writeBack_arbitration_isStuck))) begin + $display("FAILURE DBusSimplePlugin doesn't allow writeback stage stall when read happend"); + $finish; + end + `endif + `endif + _zz_2 <= 1'b0; + HazardSimplePlugin_writeBackBuffer_valid <= HazardSimplePlugin_writeBackWrites_valid; + if(when_CsrPlugin_l909) begin + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_decode <= 1'b0; + end else begin + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_decode <= CsrPlugin_exceptionPortCtrl_exceptionValids_decode; + end + if(when_CsrPlugin_l909_1) begin + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_execute <= (CsrPlugin_exceptionPortCtrl_exceptionValids_decode && (! decode_arbitration_isStuck)); + end else begin + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_execute <= CsrPlugin_exceptionPortCtrl_exceptionValids_execute; + end + if(when_CsrPlugin_l909_2) begin + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_memory <= (CsrPlugin_exceptionPortCtrl_exceptionValids_execute && (! execute_arbitration_isStuck)); + end else begin + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_memory <= CsrPlugin_exceptionPortCtrl_exceptionValids_memory; + end + if(when_CsrPlugin_l909_3) begin + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_writeBack <= (CsrPlugin_exceptionPortCtrl_exceptionValids_memory && (! memory_arbitration_isStuck)); + end else begin + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_writeBack <= 1'b0; + end + CsrPlugin_interrupt_valid <= 1'b0; + if(when_CsrPlugin_l946) begin + if(when_CsrPlugin_l952) begin + CsrPlugin_interrupt_valid <= 1'b1; + end + if(when_CsrPlugin_l952_1) begin + CsrPlugin_interrupt_valid <= 1'b1; + end + if(when_CsrPlugin_l952_2) begin + CsrPlugin_interrupt_valid <= 1'b1; + end + end + if(CsrPlugin_pipelineLiberator_active) begin + if(when_CsrPlugin_l980) begin + CsrPlugin_pipelineLiberator_pcValids_0 <= 1'b1; + end + if(when_CsrPlugin_l980_1) begin + CsrPlugin_pipelineLiberator_pcValids_1 <= CsrPlugin_pipelineLiberator_pcValids_0; + end + if(when_CsrPlugin_l980_2) begin + CsrPlugin_pipelineLiberator_pcValids_2 <= CsrPlugin_pipelineLiberator_pcValids_1; + end + end + if(when_CsrPlugin_l985) begin + CsrPlugin_pipelineLiberator_pcValids_0 <= 1'b0; + CsrPlugin_pipelineLiberator_pcValids_1 <= 1'b0; + CsrPlugin_pipelineLiberator_pcValids_2 <= 1'b0; + end + if(CsrPlugin_interruptJump) begin + CsrPlugin_interrupt_valid <= 1'b0; + end + CsrPlugin_hadException <= CsrPlugin_exception; + if(when_CsrPlugin_l1019) begin + case(CsrPlugin_targetPrivilege) + 2'b11 : begin + CsrPlugin_mstatus_MIE <= 1'b0; + CsrPlugin_mstatus_MPIE <= CsrPlugin_mstatus_MIE; + CsrPlugin_mstatus_MPP <= CsrPlugin_privilege; + end + default : begin + end + endcase + end + if(when_CsrPlugin_l1064) begin + case(switch_CsrPlugin_l1068) + 2'b11 : begin + CsrPlugin_mstatus_MPP <= 2'b00; + CsrPlugin_mstatus_MIE <= CsrPlugin_mstatus_MPIE; + CsrPlugin_mstatus_MPIE <= 1'b1; + end + default : begin + end + endcase + end + execute_CsrPlugin_wfiWake <= (({_zz_when_CsrPlugin_l952_2,{_zz_when_CsrPlugin_l952_1,_zz_when_CsrPlugin_l952}} != 3'b000) || CsrPlugin_thirdPartyWake); + if(when_Pipeline_l151) begin + execute_arbitration_isValid <= 1'b0; + end + if(when_Pipeline_l154) begin + execute_arbitration_isValid <= decode_arbitration_isValid; + end + if(when_Pipeline_l151_1) begin + memory_arbitration_isValid <= 1'b0; + end + if(when_Pipeline_l154_1) begin + memory_arbitration_isValid <= execute_arbitration_isValid; + end + if(when_Pipeline_l151_2) begin + writeBack_arbitration_isValid <= 1'b0; + end + if(when_Pipeline_l154_2) begin + writeBack_arbitration_isValid <= memory_arbitration_isValid; + end + if(execute_CsrPlugin_csr_768) begin + if(execute_CsrPlugin_writeEnable) begin + CsrPlugin_mstatus_MPP <= CsrPlugin_csrMapping_writeDataSignal[12 : 11]; + CsrPlugin_mstatus_MPIE <= CsrPlugin_csrMapping_writeDataSignal[7]; + CsrPlugin_mstatus_MIE <= CsrPlugin_csrMapping_writeDataSignal[3]; + end + end + if(execute_CsrPlugin_csr_772) begin + if(execute_CsrPlugin_writeEnable) begin + CsrPlugin_mie_MEIE <= CsrPlugin_csrMapping_writeDataSignal[11]; + CsrPlugin_mie_MTIE <= CsrPlugin_csrMapping_writeDataSignal[7]; + CsrPlugin_mie_MSIE <= CsrPlugin_csrMapping_writeDataSignal[3]; + end + end + if(execute_CsrPlugin_csr_3008) begin + if(execute_CsrPlugin_writeEnable) begin + _zz_CsrPlugin_csrMapping_readDataInit <= CsrPlugin_csrMapping_writeDataSignal[31 : 0]; + end + end + if(when_InstructionCache_l239) begin + if(iBusWishbone_ACK) begin + _zz_iBusWishbone_ADR <= (_zz_iBusWishbone_ADR + 3'b001); + end + end + _zz_iBus_rsp_valid <= (iBusWishbone_CYC && iBusWishbone_ACK); + if(dBus_cmd_valid) begin + dBus_cmd_rValid <= 1'b1; + end + if(dBus_cmd_halfPipe_fire) begin + dBus_cmd_rValid <= 1'b0; + end + end + end + + always @(posedge clk) begin + if(IBusCachedPlugin_iBusRsp_stages_1_output_ready) begin + _zz_IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_payload <= IBusCachedPlugin_iBusRsp_stages_1_output_payload; + end + if(IBusCachedPlugin_iBusRsp_stages_1_input_ready) begin + IBusCachedPlugin_s1_tightlyCoupledHit <= IBusCachedPlugin_s0_tightlyCoupledHit; + end + if(IBusCachedPlugin_iBusRsp_stages_2_input_ready) begin + IBusCachedPlugin_s2_tightlyCoupledHit <= IBusCachedPlugin_s1_tightlyCoupledHit; + end + HazardSimplePlugin_writeBackBuffer_payload_address <= HazardSimplePlugin_writeBackWrites_payload_address; + HazardSimplePlugin_writeBackBuffer_payload_data <= HazardSimplePlugin_writeBackWrites_payload_data; + CsrPlugin_mip_MEIP <= externalInterrupt; + CsrPlugin_mip_MTIP <= timerInterrupt; + CsrPlugin_mip_MSIP <= softwareInterrupt; + CsrPlugin_mcycle <= (CsrPlugin_mcycle + 64'h0000000000000001); + if(writeBack_arbitration_isFiring) begin + CsrPlugin_minstret <= (CsrPlugin_minstret + 64'h0000000000000001); + end + if(decodeExceptionPort_valid) begin + CsrPlugin_exceptionPortCtrl_exceptionContext_code <= decodeExceptionPort_payload_code; + CsrPlugin_exceptionPortCtrl_exceptionContext_badAddr <= decodeExceptionPort_payload_badAddr; + end + if(CsrPlugin_selfException_valid) begin + CsrPlugin_exceptionPortCtrl_exceptionContext_code <= CsrPlugin_selfException_payload_code; + CsrPlugin_exceptionPortCtrl_exceptionContext_badAddr <= CsrPlugin_selfException_payload_badAddr; + end + if(when_CsrPlugin_l946) begin + if(when_CsrPlugin_l952) begin + CsrPlugin_interrupt_code <= 4'b0111; + CsrPlugin_interrupt_targetPrivilege <= 2'b11; + end + if(when_CsrPlugin_l952_1) begin + CsrPlugin_interrupt_code <= 4'b0011; + CsrPlugin_interrupt_targetPrivilege <= 2'b11; + end + if(when_CsrPlugin_l952_2) begin + CsrPlugin_interrupt_code <= 4'b1011; + CsrPlugin_interrupt_targetPrivilege <= 2'b11; + end + end + if(when_CsrPlugin_l1019) begin + case(CsrPlugin_targetPrivilege) + 2'b11 : begin + CsrPlugin_mcause_interrupt <= (! CsrPlugin_hadException); + CsrPlugin_mcause_exceptionCode <= CsrPlugin_trapCause; + CsrPlugin_mepc <= writeBack_PC; + if(CsrPlugin_hadException) begin + CsrPlugin_mtval <= CsrPlugin_exceptionPortCtrl_exceptionContext_badAddr; + end + end + default : begin + end + endcase + end + externalInterruptArray_regNext <= externalInterruptArray; + if(when_Pipeline_l124) begin + decode_to_execute_PC <= decode_PC; + end + if(when_Pipeline_l124_1) begin + execute_to_memory_PC <= _zz_execute_SRC2; + end + if(when_Pipeline_l124_2) begin + memory_to_writeBack_PC <= memory_PC; + end + if(when_Pipeline_l124_3) begin + decode_to_execute_INSTRUCTION <= decode_INSTRUCTION; + end + if(when_Pipeline_l124_4) begin + execute_to_memory_INSTRUCTION <= execute_INSTRUCTION; + end + if(when_Pipeline_l124_5) begin + memory_to_writeBack_INSTRUCTION <= memory_INSTRUCTION; + end + if(when_Pipeline_l124_6) begin + decode_to_execute_FORMAL_PC_NEXT <= decode_FORMAL_PC_NEXT; + end + if(when_Pipeline_l124_7) begin + execute_to_memory_FORMAL_PC_NEXT <= execute_FORMAL_PC_NEXT; + end + if(when_Pipeline_l124_8) begin + memory_to_writeBack_FORMAL_PC_NEXT <= _zz_memory_to_writeBack_FORMAL_PC_NEXT; + end + if(when_Pipeline_l124_9) begin + decode_to_execute_SRC1_CTRL <= _zz_decode_to_execute_SRC1_CTRL; + end + if(when_Pipeline_l124_10) begin + decode_to_execute_SRC_USE_SUB_LESS <= decode_SRC_USE_SUB_LESS; + end + if(when_Pipeline_l124_11) begin + decode_to_execute_MEMORY_ENABLE <= decode_MEMORY_ENABLE; + end + if(when_Pipeline_l124_12) begin + execute_to_memory_MEMORY_ENABLE <= execute_MEMORY_ENABLE; + end + if(when_Pipeline_l124_13) begin + memory_to_writeBack_MEMORY_ENABLE <= memory_MEMORY_ENABLE; + end + if(when_Pipeline_l124_14) begin + decode_to_execute_SRC2_CTRL <= _zz_decode_to_execute_SRC2_CTRL; + end + if(when_Pipeline_l124_15) begin + decode_to_execute_REGFILE_WRITE_VALID <= decode_REGFILE_WRITE_VALID; + end + if(when_Pipeline_l124_16) begin + execute_to_memory_REGFILE_WRITE_VALID <= execute_REGFILE_WRITE_VALID; + end + if(when_Pipeline_l124_17) begin + memory_to_writeBack_REGFILE_WRITE_VALID <= memory_REGFILE_WRITE_VALID; + end + if(when_Pipeline_l124_18) begin + decode_to_execute_BYPASSABLE_EXECUTE_STAGE <= decode_BYPASSABLE_EXECUTE_STAGE; + end + if(when_Pipeline_l124_19) begin + decode_to_execute_BYPASSABLE_MEMORY_STAGE <= decode_BYPASSABLE_MEMORY_STAGE; + end + if(when_Pipeline_l124_20) begin + execute_to_memory_BYPASSABLE_MEMORY_STAGE <= execute_BYPASSABLE_MEMORY_STAGE; + end + if(when_Pipeline_l124_21) begin + decode_to_execute_MEMORY_STORE <= decode_MEMORY_STORE; + end + if(when_Pipeline_l124_22) begin + execute_to_memory_MEMORY_STORE <= execute_MEMORY_STORE; + end + if(when_Pipeline_l124_23) begin + memory_to_writeBack_MEMORY_STORE <= memory_MEMORY_STORE; + end + if(when_Pipeline_l124_24) begin + decode_to_execute_ALU_CTRL <= _zz_decode_to_execute_ALU_CTRL; + end + if(when_Pipeline_l124_25) begin + decode_to_execute_SRC_LESS_UNSIGNED <= decode_SRC_LESS_UNSIGNED; + end + if(when_Pipeline_l124_26) begin + decode_to_execute_ALU_BITWISE_CTRL <= _zz_decode_to_execute_ALU_BITWISE_CTRL; + end + if(when_Pipeline_l124_27) begin + decode_to_execute_SHIFT_CTRL <= _zz_decode_to_execute_SHIFT_CTRL; + end + if(when_Pipeline_l124_28) begin + execute_to_memory_SHIFT_CTRL <= _zz_execute_to_memory_SHIFT_CTRL; + end + if(when_Pipeline_l124_29) begin + decode_to_execute_BRANCH_CTRL <= _zz_decode_to_execute_BRANCH_CTRL; + end + if(when_Pipeline_l124_30) begin + decode_to_execute_IS_CSR <= decode_IS_CSR; + end + if(when_Pipeline_l124_31) begin + decode_to_execute_ENV_CTRL <= _zz_decode_to_execute_ENV_CTRL; + end + if(when_Pipeline_l124_32) begin + execute_to_memory_ENV_CTRL <= _zz_execute_to_memory_ENV_CTRL; + end + if(when_Pipeline_l124_33) begin + memory_to_writeBack_ENV_CTRL <= _zz_memory_to_writeBack_ENV_CTRL; + end + if(when_Pipeline_l124_34) begin + decode_to_execute_IS_MUL <= decode_IS_MUL; + end + if(when_Pipeline_l124_35) begin + execute_to_memory_IS_MUL <= execute_IS_MUL; + end + if(when_Pipeline_l124_36) begin + memory_to_writeBack_IS_MUL <= memory_IS_MUL; + end + if(when_Pipeline_l124_37) begin + decode_to_execute_RS1 <= decode_RS1; + end + if(when_Pipeline_l124_38) begin + decode_to_execute_RS2 <= decode_RS2; + end + if(when_Pipeline_l124_39) begin + decode_to_execute_SRC2_FORCE_ZERO <= decode_SRC2_FORCE_ZERO; + end + if(when_Pipeline_l124_40) begin + decode_to_execute_CSR_WRITE_OPCODE <= decode_CSR_WRITE_OPCODE; + end + if(when_Pipeline_l124_41) begin + decode_to_execute_CSR_READ_OPCODE <= decode_CSR_READ_OPCODE; + end + if(when_Pipeline_l124_42) begin + execute_to_memory_MEMORY_ADDRESS_LOW <= execute_MEMORY_ADDRESS_LOW; + end + if(when_Pipeline_l124_43) begin + memory_to_writeBack_MEMORY_ADDRESS_LOW <= memory_MEMORY_ADDRESS_LOW; + end + if(when_Pipeline_l124_44) begin + execute_to_memory_REGFILE_WRITE_DATA <= _zz_execute_to_memory_REGFILE_WRITE_DATA; + end + if(when_Pipeline_l124_45) begin + memory_to_writeBack_REGFILE_WRITE_DATA <= _zz_memory_to_writeBack_REGFILE_WRITE_DATA; + end + if(when_Pipeline_l124_46) begin + execute_to_memory_SHIFT_RIGHT <= execute_SHIFT_RIGHT; + end + if(when_Pipeline_l124_47) begin + execute_to_memory_BRANCH_DO <= execute_BRANCH_DO; + end + if(when_Pipeline_l124_48) begin + execute_to_memory_BRANCH_CALC <= execute_BRANCH_CALC; + end + if(when_Pipeline_l124_49) begin + execute_to_memory_MUL_LL <= execute_MUL_LL; + end + if(when_Pipeline_l124_50) begin + execute_to_memory_MUL_LH <= execute_MUL_LH; + end + if(when_Pipeline_l124_51) begin + execute_to_memory_MUL_HL <= execute_MUL_HL; + end + if(when_Pipeline_l124_52) begin + execute_to_memory_MUL_HH <= execute_MUL_HH; + end + if(when_Pipeline_l124_53) begin + memory_to_writeBack_MUL_HH <= memory_MUL_HH; + end + if(when_Pipeline_l124_54) begin + memory_to_writeBack_MEMORY_READ_DATA <= memory_MEMORY_READ_DATA; + end + if(when_Pipeline_l124_55) begin + memory_to_writeBack_MUL_LOW <= memory_MUL_LOW; + end + if(when_CsrPlugin_l1264) begin + execute_CsrPlugin_csr_768 <= (decode_INSTRUCTION[31 : 20] == 12'h300); + end + if(when_CsrPlugin_l1264_1) begin + execute_CsrPlugin_csr_836 <= (decode_INSTRUCTION[31 : 20] == 12'h344); + end + if(when_CsrPlugin_l1264_2) begin + execute_CsrPlugin_csr_772 <= (decode_INSTRUCTION[31 : 20] == 12'h304); + end + if(when_CsrPlugin_l1264_3) begin + execute_CsrPlugin_csr_773 <= (decode_INSTRUCTION[31 : 20] == 12'h305); + end + if(when_CsrPlugin_l1264_4) begin + execute_CsrPlugin_csr_833 <= (decode_INSTRUCTION[31 : 20] == 12'h341); + end + if(when_CsrPlugin_l1264_5) begin + execute_CsrPlugin_csr_834 <= (decode_INSTRUCTION[31 : 20] == 12'h342); + end + if(when_CsrPlugin_l1264_6) begin + execute_CsrPlugin_csr_835 <= (decode_INSTRUCTION[31 : 20] == 12'h343); + end + if(when_CsrPlugin_l1264_7) begin + execute_CsrPlugin_csr_2816 <= (decode_INSTRUCTION[31 : 20] == 12'hb00); + end + if(when_CsrPlugin_l1264_8) begin + execute_CsrPlugin_csr_2944 <= (decode_INSTRUCTION[31 : 20] == 12'hb80); + end + if(when_CsrPlugin_l1264_9) begin + execute_CsrPlugin_csr_3008 <= (decode_INSTRUCTION[31 : 20] == 12'hbc0); + end + if(when_CsrPlugin_l1264_10) begin + execute_CsrPlugin_csr_4032 <= (decode_INSTRUCTION[31 : 20] == 12'hfc0); + end + if(execute_CsrPlugin_csr_836) begin + if(execute_CsrPlugin_writeEnable) begin + CsrPlugin_mip_MSIP <= CsrPlugin_csrMapping_writeDataSignal[3]; + end + end + if(execute_CsrPlugin_csr_773) begin + if(execute_CsrPlugin_writeEnable) begin + CsrPlugin_mtvec_base <= CsrPlugin_csrMapping_writeDataSignal[31 : 2]; + CsrPlugin_mtvec_mode <= CsrPlugin_csrMapping_writeDataSignal[1 : 0]; + end + end + if(execute_CsrPlugin_csr_833) begin + if(execute_CsrPlugin_writeEnable) begin + CsrPlugin_mepc <= CsrPlugin_csrMapping_writeDataSignal[31 : 0]; + end + end + iBusWishbone_DAT_MISO_regNext <= iBusWishbone_DAT_MISO; + if(dBus_cmd_ready) begin + dBus_cmd_rData_wr <= dBus_cmd_payload_wr; + dBus_cmd_rData_address <= dBus_cmd_payload_address; + dBus_cmd_rData_data <= dBus_cmd_payload_data; + dBus_cmd_rData_size <= dBus_cmd_payload_size; + end + end + + +endmodule + +module InstructionCache ( + input io_flush, + input io_cpu_prefetch_isValid, + output reg io_cpu_prefetch_haltIt, + input [31:0] io_cpu_prefetch_pc, + input io_cpu_fetch_isValid, + input io_cpu_fetch_isStuck, + input io_cpu_fetch_isRemoved, + input [31:0] io_cpu_fetch_pc, + output [31:0] io_cpu_fetch_data, + input [31:0] io_cpu_fetch_mmuRsp_physicalAddress, + input io_cpu_fetch_mmuRsp_isIoAccess, + input io_cpu_fetch_mmuRsp_isPaging, + input io_cpu_fetch_mmuRsp_allowRead, + input io_cpu_fetch_mmuRsp_allowWrite, + input io_cpu_fetch_mmuRsp_allowExecute, + input io_cpu_fetch_mmuRsp_exception, + input io_cpu_fetch_mmuRsp_refilling, + input io_cpu_fetch_mmuRsp_bypassTranslation, + output [31:0] io_cpu_fetch_physicalAddress, + input io_cpu_decode_isValid, + input io_cpu_decode_isStuck, + input [31:0] io_cpu_decode_pc, + output [31:0] io_cpu_decode_physicalAddress, + output [31:0] io_cpu_decode_data, + output io_cpu_decode_cacheMiss, + output io_cpu_decode_error, + output io_cpu_decode_mmuRefilling, + output io_cpu_decode_mmuException, + input io_cpu_decode_isUser, + input io_cpu_fill_valid, + input [31:0] io_cpu_fill_payload, + output io_mem_cmd_valid, + input io_mem_cmd_ready, + output [31:0] io_mem_cmd_payload_address, + output [2:0] io_mem_cmd_payload_size, + input io_mem_rsp_valid, + input [31:0] io_mem_rsp_payload_data, + input io_mem_rsp_payload_error, + input clk, + input reset +); + reg [31:0] _zz_banks_0_port1; + reg [22:0] _zz_ways_0_tags_port1; + wire [22:0] _zz_ways_0_tags_port; + reg _zz_1; + reg _zz_2; + reg lineLoader_fire; + reg lineLoader_valid; + (* keep , syn_keep *) reg [31:0] lineLoader_address /* synthesis syn_keep = 1 */ ; + reg lineLoader_hadError; + reg lineLoader_flushPending; + reg [6:0] lineLoader_flushCounter; + wire when_InstructionCache_l338; + reg _zz_when_InstructionCache_l342; + wire when_InstructionCache_l342; + wire when_InstructionCache_l351; + reg lineLoader_cmdSent; + wire io_mem_cmd_fire; + wire when_Utils_l357; + reg lineLoader_wayToAllocate_willIncrement; + wire lineLoader_wayToAllocate_willClear; + wire lineLoader_wayToAllocate_willOverflowIfInc; + wire lineLoader_wayToAllocate_willOverflow; + (* keep , syn_keep *) reg [2:0] lineLoader_wordIndex /* synthesis syn_keep = 1 */ ; + wire lineLoader_write_tag_0_valid; + wire [5:0] lineLoader_write_tag_0_payload_address; + wire lineLoader_write_tag_0_payload_data_valid; + wire lineLoader_write_tag_0_payload_data_error; + wire [20:0] lineLoader_write_tag_0_payload_data_address; + wire lineLoader_write_data_0_valid; + wire [8:0] lineLoader_write_data_0_payload_address; + wire [31:0] lineLoader_write_data_0_payload_data; + wire when_InstructionCache_l401; + wire [8:0] _zz_fetchStage_read_banksValue_0_dataMem; + wire _zz_fetchStage_read_banksValue_0_dataMem_1; + wire [31:0] fetchStage_read_banksValue_0_dataMem; + wire [31:0] fetchStage_read_banksValue_0_data; + wire [5:0] _zz_fetchStage_read_waysValues_0_tag_valid; + wire _zz_fetchStage_read_waysValues_0_tag_valid_1; + wire fetchStage_read_waysValues_0_tag_valid; + wire fetchStage_read_waysValues_0_tag_error; + wire [20:0] fetchStage_read_waysValues_0_tag_address; + wire [22:0] _zz_fetchStage_read_waysValues_0_tag_valid_2; + wire fetchStage_hit_hits_0; + wire fetchStage_hit_valid; + wire fetchStage_hit_error; + wire [31:0] fetchStage_hit_data; + wire [31:0] fetchStage_hit_word; + wire when_InstructionCache_l435; + reg [31:0] io_cpu_fetch_data_regNextWhen; + wire when_InstructionCache_l459; + reg [31:0] decodeStage_mmuRsp_physicalAddress; + reg decodeStage_mmuRsp_isIoAccess; + reg decodeStage_mmuRsp_isPaging; + reg decodeStage_mmuRsp_allowRead; + reg decodeStage_mmuRsp_allowWrite; + reg decodeStage_mmuRsp_allowExecute; + reg decodeStage_mmuRsp_exception; + reg decodeStage_mmuRsp_refilling; + reg decodeStage_mmuRsp_bypassTranslation; + wire when_InstructionCache_l459_1; + reg decodeStage_hit_valid; + wire when_InstructionCache_l459_2; + reg decodeStage_hit_error; + (* ram_style = "block" *) reg [31:0] banks_0 [0:511]; + (* ram_style = "block" *) reg [22:0] ways_0_tags [0:63]; + + assign _zz_ways_0_tags_port = {lineLoader_write_tag_0_payload_data_address,{lineLoader_write_tag_0_payload_data_error,lineLoader_write_tag_0_payload_data_valid}}; + always @(posedge clk) begin + if(_zz_1) begin + banks_0[lineLoader_write_data_0_payload_address] <= lineLoader_write_data_0_payload_data; + end + end + + always @(posedge clk) begin + if(_zz_fetchStage_read_banksValue_0_dataMem_1) begin + _zz_banks_0_port1 <= banks_0[_zz_fetchStage_read_banksValue_0_dataMem]; + end + end + + always @(posedge clk) begin + if(_zz_2) begin + ways_0_tags[lineLoader_write_tag_0_payload_address] <= _zz_ways_0_tags_port; + end + end + + always @(posedge clk) begin + if(_zz_fetchStage_read_waysValues_0_tag_valid_1) begin + _zz_ways_0_tags_port1 <= ways_0_tags[_zz_fetchStage_read_waysValues_0_tag_valid]; + end + end + + always @(*) begin + _zz_1 = 1'b0; + if(lineLoader_write_data_0_valid) begin + _zz_1 = 1'b1; + end + end + + always @(*) begin + _zz_2 = 1'b0; + if(lineLoader_write_tag_0_valid) begin + _zz_2 = 1'b1; + end + end + + always @(*) begin + lineLoader_fire = 1'b0; + if(io_mem_rsp_valid) begin + if(when_InstructionCache_l401) begin + lineLoader_fire = 1'b1; + end + end + end + + always @(*) begin + io_cpu_prefetch_haltIt = (lineLoader_valid || lineLoader_flushPending); + if(when_InstructionCache_l338) begin + io_cpu_prefetch_haltIt = 1'b1; + end + if(when_InstructionCache_l342) begin + io_cpu_prefetch_haltIt = 1'b1; + end + if(io_flush) begin + io_cpu_prefetch_haltIt = 1'b1; + end + end + + assign when_InstructionCache_l338 = (! lineLoader_flushCounter[6]); + assign when_InstructionCache_l342 = (! _zz_when_InstructionCache_l342); + assign when_InstructionCache_l351 = (lineLoader_flushPending && (! (lineLoader_valid || io_cpu_fetch_isValid))); + assign io_mem_cmd_fire = (io_mem_cmd_valid && io_mem_cmd_ready); + assign io_mem_cmd_valid = (lineLoader_valid && (! lineLoader_cmdSent)); + assign io_mem_cmd_payload_address = {lineLoader_address[31 : 5],5'h0}; + assign io_mem_cmd_payload_size = 3'b101; + assign when_Utils_l357 = (! lineLoader_valid); + always @(*) begin + lineLoader_wayToAllocate_willIncrement = 1'b0; + if(when_Utils_l357) begin + lineLoader_wayToAllocate_willIncrement = 1'b1; + end + end + + assign lineLoader_wayToAllocate_willClear = 1'b0; + assign lineLoader_wayToAllocate_willOverflowIfInc = 1'b1; + assign lineLoader_wayToAllocate_willOverflow = (lineLoader_wayToAllocate_willOverflowIfInc && lineLoader_wayToAllocate_willIncrement); + assign lineLoader_write_tag_0_valid = ((1'b1 && lineLoader_fire) || (! lineLoader_flushCounter[6])); + assign lineLoader_write_tag_0_payload_address = (lineLoader_flushCounter[6] ? lineLoader_address[10 : 5] : lineLoader_flushCounter[5 : 0]); + assign lineLoader_write_tag_0_payload_data_valid = lineLoader_flushCounter[6]; + assign lineLoader_write_tag_0_payload_data_error = (lineLoader_hadError || io_mem_rsp_payload_error); + assign lineLoader_write_tag_0_payload_data_address = lineLoader_address[31 : 11]; + assign lineLoader_write_data_0_valid = (io_mem_rsp_valid && 1'b1); + assign lineLoader_write_data_0_payload_address = {lineLoader_address[10 : 5],lineLoader_wordIndex}; + assign lineLoader_write_data_0_payload_data = io_mem_rsp_payload_data; + assign when_InstructionCache_l401 = (lineLoader_wordIndex == 3'b111); + assign _zz_fetchStage_read_banksValue_0_dataMem = io_cpu_prefetch_pc[10 : 2]; + assign _zz_fetchStage_read_banksValue_0_dataMem_1 = (! io_cpu_fetch_isStuck); + assign fetchStage_read_banksValue_0_dataMem = _zz_banks_0_port1; + assign fetchStage_read_banksValue_0_data = fetchStage_read_banksValue_0_dataMem[31 : 0]; + assign _zz_fetchStage_read_waysValues_0_tag_valid = io_cpu_prefetch_pc[10 : 5]; + assign _zz_fetchStage_read_waysValues_0_tag_valid_1 = (! io_cpu_fetch_isStuck); + assign _zz_fetchStage_read_waysValues_0_tag_valid_2 = _zz_ways_0_tags_port1; + assign fetchStage_read_waysValues_0_tag_valid = _zz_fetchStage_read_waysValues_0_tag_valid_2[0]; + assign fetchStage_read_waysValues_0_tag_error = _zz_fetchStage_read_waysValues_0_tag_valid_2[1]; + assign fetchStage_read_waysValues_0_tag_address = _zz_fetchStage_read_waysValues_0_tag_valid_2[22 : 2]; + assign fetchStage_hit_hits_0 = (fetchStage_read_waysValues_0_tag_valid && (fetchStage_read_waysValues_0_tag_address == io_cpu_fetch_mmuRsp_physicalAddress[31 : 11])); + assign fetchStage_hit_valid = (fetchStage_hit_hits_0 != 1'b0); + assign fetchStage_hit_error = fetchStage_read_waysValues_0_tag_error; + assign fetchStage_hit_data = fetchStage_read_banksValue_0_data; + assign fetchStage_hit_word = fetchStage_hit_data; + assign io_cpu_fetch_data = fetchStage_hit_word; + assign when_InstructionCache_l435 = (! io_cpu_decode_isStuck); + assign io_cpu_decode_data = io_cpu_fetch_data_regNextWhen; + assign io_cpu_fetch_physicalAddress = io_cpu_fetch_mmuRsp_physicalAddress; + assign when_InstructionCache_l459 = (! io_cpu_decode_isStuck); + assign when_InstructionCache_l459_1 = (! io_cpu_decode_isStuck); + assign when_InstructionCache_l459_2 = (! io_cpu_decode_isStuck); + assign io_cpu_decode_cacheMiss = (! decodeStage_hit_valid); + assign io_cpu_decode_error = (decodeStage_hit_error || ((! decodeStage_mmuRsp_isPaging) && (decodeStage_mmuRsp_exception || (! decodeStage_mmuRsp_allowExecute)))); + assign io_cpu_decode_mmuRefilling = decodeStage_mmuRsp_refilling; + assign io_cpu_decode_mmuException = (((! decodeStage_mmuRsp_refilling) && decodeStage_mmuRsp_isPaging) && (decodeStage_mmuRsp_exception || (! decodeStage_mmuRsp_allowExecute))); + assign io_cpu_decode_physicalAddress = decodeStage_mmuRsp_physicalAddress; + always @(posedge clk) begin + if(reset) begin + lineLoader_valid <= 1'b0; + lineLoader_hadError <= 1'b0; + lineLoader_flushPending <= 1'b1; + lineLoader_cmdSent <= 1'b0; + lineLoader_wordIndex <= 3'b000; + end else begin + if(lineLoader_fire) begin + lineLoader_valid <= 1'b0; + end + if(lineLoader_fire) begin + lineLoader_hadError <= 1'b0; + end + if(io_cpu_fill_valid) begin + lineLoader_valid <= 1'b1; + end + if(io_flush) begin + lineLoader_flushPending <= 1'b1; + end + if(when_InstructionCache_l351) begin + lineLoader_flushPending <= 1'b0; + end + if(io_mem_cmd_fire) begin + lineLoader_cmdSent <= 1'b1; + end + if(lineLoader_fire) begin + lineLoader_cmdSent <= 1'b0; + end + if(io_mem_rsp_valid) begin + lineLoader_wordIndex <= (lineLoader_wordIndex + 3'b001); + if(io_mem_rsp_payload_error) begin + lineLoader_hadError <= 1'b1; + end + end + end + end + + always @(posedge clk) begin + if(io_cpu_fill_valid) begin + lineLoader_address <= io_cpu_fill_payload; + end + if(when_InstructionCache_l338) begin + lineLoader_flushCounter <= (lineLoader_flushCounter + 7'h01); + end + _zz_when_InstructionCache_l342 <= lineLoader_flushCounter[6]; + if(when_InstructionCache_l351) begin + lineLoader_flushCounter <= 7'h0; + end + if(when_InstructionCache_l435) begin + io_cpu_fetch_data_regNextWhen <= io_cpu_fetch_data; + end + if(when_InstructionCache_l459) begin + decodeStage_mmuRsp_physicalAddress <= io_cpu_fetch_mmuRsp_physicalAddress; + decodeStage_mmuRsp_isIoAccess <= io_cpu_fetch_mmuRsp_isIoAccess; + decodeStage_mmuRsp_isPaging <= io_cpu_fetch_mmuRsp_isPaging; + decodeStage_mmuRsp_allowRead <= io_cpu_fetch_mmuRsp_allowRead; + decodeStage_mmuRsp_allowWrite <= io_cpu_fetch_mmuRsp_allowWrite; + decodeStage_mmuRsp_allowExecute <= io_cpu_fetch_mmuRsp_allowExecute; + decodeStage_mmuRsp_exception <= io_cpu_fetch_mmuRsp_exception; + decodeStage_mmuRsp_refilling <= io_cpu_fetch_mmuRsp_refilling; + decodeStage_mmuRsp_bypassTranslation <= io_cpu_fetch_mmuRsp_bypassTranslation; + end + if(when_InstructionCache_l459_1) begin + decodeStage_hit_valid <= fetchStage_hit_valid; + end + if(when_InstructionCache_l459_2) begin + decodeStage_hit_error <= fetchStage_hit_error; + end + end + + +endmodule diff --git a/pythondata_cpu_vexriscv/verilog/VexRiscv_Fomu.yaml b/pythondata_cpu_vexriscv/verilog/VexRiscv_Fomu.yaml new file mode 100644 index 0000000..b55f8e5 --- /dev/null +++ b/pythondata_cpu_vexriscv/verilog/VexRiscv_Fomu.yaml @@ -0,0 +1,4 @@ +iBus: !!vexriscv.BusReport + flushInstructions: [4111, 19, 19, 19] + info: !!vexriscv.CacheReport {bytePerLine: 32, size: 2048} + kind: cached diff --git a/pythondata_cpu_vexriscv/verilog/VexRiscv_FomuCfu.v b/pythondata_cpu_vexriscv/verilog/VexRiscv_FomuCfu.v new file mode 100644 index 0000000..ac7ffb6 --- /dev/null +++ b/pythondata_cpu_vexriscv/verilog/VexRiscv_FomuCfu.v @@ -0,0 +1,4784 @@ +// Generator : SpinalHDL v1.6.0 git head : 73c8d8e2b86b45646e9d0b2e729291f2b65e6be3 +// Component : VexRiscv +// Git hash : 593e180abf5ba39e7fa33d4f371646453f84496a + + +`define Input2Kind_binary_sequential_type [0:0] +`define Input2Kind_binary_sequential_RS 1'b0 +`define Input2Kind_binary_sequential_IMM_I 1'b1 + +`define EnvCtrlEnum_binary_sequential_type [1:0] +`define EnvCtrlEnum_binary_sequential_NONE 2'b00 +`define EnvCtrlEnum_binary_sequential_XRET 2'b01 +`define EnvCtrlEnum_binary_sequential_ECALL 2'b10 + +`define BranchCtrlEnum_binary_sequential_type [1:0] +`define BranchCtrlEnum_binary_sequential_INC 2'b00 +`define BranchCtrlEnum_binary_sequential_B 2'b01 +`define BranchCtrlEnum_binary_sequential_JAL 2'b10 +`define BranchCtrlEnum_binary_sequential_JALR 2'b11 + +`define ShiftCtrlEnum_binary_sequential_type [1:0] +`define ShiftCtrlEnum_binary_sequential_DISABLE_1 2'b00 +`define ShiftCtrlEnum_binary_sequential_SLL_1 2'b01 +`define ShiftCtrlEnum_binary_sequential_SRL_1 2'b10 +`define ShiftCtrlEnum_binary_sequential_SRA_1 2'b11 + +`define AluBitwiseCtrlEnum_binary_sequential_type [1:0] +`define AluBitwiseCtrlEnum_binary_sequential_XOR_1 2'b00 +`define AluBitwiseCtrlEnum_binary_sequential_OR_1 2'b01 +`define AluBitwiseCtrlEnum_binary_sequential_AND_1 2'b10 + +`define AluCtrlEnum_binary_sequential_type [1:0] +`define AluCtrlEnum_binary_sequential_ADD_SUB 2'b00 +`define AluCtrlEnum_binary_sequential_SLT_SLTU 2'b01 +`define AluCtrlEnum_binary_sequential_BITWISE 2'b10 + +`define Src2CtrlEnum_binary_sequential_type [1:0] +`define Src2CtrlEnum_binary_sequential_RS 2'b00 +`define Src2CtrlEnum_binary_sequential_IMI 2'b01 +`define Src2CtrlEnum_binary_sequential_IMS 2'b10 +`define Src2CtrlEnum_binary_sequential_PC 2'b11 + +`define Src1CtrlEnum_binary_sequential_type [1:0] +`define Src1CtrlEnum_binary_sequential_RS 2'b00 +`define Src1CtrlEnum_binary_sequential_IMU 2'b01 +`define Src1CtrlEnum_binary_sequential_PC_INCREMENT 2'b10 +`define Src1CtrlEnum_binary_sequential_URS1 2'b11 + + +module VexRiscv ( + input [31:0] externalResetVector, + input timerInterrupt, + input softwareInterrupt, + input [31:0] externalInterruptArray, + output CfuPlugin_bus_cmd_valid, + input CfuPlugin_bus_cmd_ready, + output [9:0] CfuPlugin_bus_cmd_payload_function_id, + output [31:0] CfuPlugin_bus_cmd_payload_inputs_0, + output [31:0] CfuPlugin_bus_cmd_payload_inputs_1, + input CfuPlugin_bus_rsp_valid, + output CfuPlugin_bus_rsp_ready, + input [31:0] CfuPlugin_bus_rsp_payload_outputs_0, + output reg iBusWishbone_CYC, + output reg iBusWishbone_STB, + input iBusWishbone_ACK, + output iBusWishbone_WE, + output [29:0] iBusWishbone_ADR, + input [31:0] iBusWishbone_DAT_MISO, + output [31:0] iBusWishbone_DAT_MOSI, + output [3:0] iBusWishbone_SEL, + input iBusWishbone_ERR, + output [2:0] iBusWishbone_CTI, + output [1:0] iBusWishbone_BTE, + output dBusWishbone_CYC, + output dBusWishbone_STB, + input dBusWishbone_ACK, + output dBusWishbone_WE, + output [29:0] dBusWishbone_ADR, + input [31:0] dBusWishbone_DAT_MISO, + output [31:0] dBusWishbone_DAT_MOSI, + output reg [3:0] dBusWishbone_SEL, + input dBusWishbone_ERR, + output [2:0] dBusWishbone_CTI, + output [1:0] dBusWishbone_BTE, + input clk, + input reset +); + wire IBusCachedPlugin_cache_io_flush; + wire IBusCachedPlugin_cache_io_cpu_prefetch_isValid; + wire IBusCachedPlugin_cache_io_cpu_fetch_isValid; + wire IBusCachedPlugin_cache_io_cpu_fetch_isStuck; + wire IBusCachedPlugin_cache_io_cpu_fetch_isRemoved; + wire IBusCachedPlugin_cache_io_cpu_decode_isValid; + wire IBusCachedPlugin_cache_io_cpu_decode_isStuck; + wire IBusCachedPlugin_cache_io_cpu_decode_isUser; + reg IBusCachedPlugin_cache_io_cpu_fill_valid; + reg [31:0] _zz_RegFilePlugin_regFile_port0; + reg [31:0] _zz_RegFilePlugin_regFile_port1; + wire IBusCachedPlugin_cache_io_cpu_prefetch_haltIt; + wire [31:0] IBusCachedPlugin_cache_io_cpu_fetch_data; + wire [31:0] IBusCachedPlugin_cache_io_cpu_fetch_physicalAddress; + wire IBusCachedPlugin_cache_io_cpu_decode_error; + wire IBusCachedPlugin_cache_io_cpu_decode_mmuRefilling; + wire IBusCachedPlugin_cache_io_cpu_decode_mmuException; + wire [31:0] IBusCachedPlugin_cache_io_cpu_decode_data; + wire IBusCachedPlugin_cache_io_cpu_decode_cacheMiss; + wire [31:0] IBusCachedPlugin_cache_io_cpu_decode_physicalAddress; + wire IBusCachedPlugin_cache_io_mem_cmd_valid; + wire [31:0] IBusCachedPlugin_cache_io_mem_cmd_payload_address; + wire [2:0] IBusCachedPlugin_cache_io_mem_cmd_payload_size; + wire [51:0] _zz_memory_MUL_LOW; + wire [51:0] _zz_memory_MUL_LOW_1; + wire [51:0] _zz_memory_MUL_LOW_2; + wire [51:0] _zz_memory_MUL_LOW_3; + wire [32:0] _zz_memory_MUL_LOW_4; + wire [51:0] _zz_memory_MUL_LOW_5; + wire [49:0] _zz_memory_MUL_LOW_6; + wire [51:0] _zz_memory_MUL_LOW_7; + wire [49:0] _zz_memory_MUL_LOW_8; + wire [31:0] _zz_execute_SHIFT_RIGHT; + wire [32:0] _zz_execute_SHIFT_RIGHT_1; + wire [32:0] _zz_execute_SHIFT_RIGHT_2; + wire [31:0] _zz_decode_LEGAL_INSTRUCTION; + wire [31:0] _zz_decode_LEGAL_INSTRUCTION_1; + wire [31:0] _zz_decode_LEGAL_INSTRUCTION_2; + wire _zz_decode_LEGAL_INSTRUCTION_3; + wire [0:0] _zz_decode_LEGAL_INSTRUCTION_4; + wire [14:0] _zz_decode_LEGAL_INSTRUCTION_5; + wire [31:0] _zz_decode_LEGAL_INSTRUCTION_6; + wire [31:0] _zz_decode_LEGAL_INSTRUCTION_7; + wire [31:0] _zz_decode_LEGAL_INSTRUCTION_8; + wire _zz_decode_LEGAL_INSTRUCTION_9; + wire [0:0] _zz_decode_LEGAL_INSTRUCTION_10; + wire [8:0] _zz_decode_LEGAL_INSTRUCTION_11; + wire [31:0] _zz_decode_LEGAL_INSTRUCTION_12; + wire [31:0] _zz_decode_LEGAL_INSTRUCTION_13; + wire [31:0] _zz_decode_LEGAL_INSTRUCTION_14; + wire _zz_decode_LEGAL_INSTRUCTION_15; + wire [0:0] _zz_decode_LEGAL_INSTRUCTION_16; + wire [2:0] _zz_decode_LEGAL_INSTRUCTION_17; + wire [1:0] _zz_IBusCachedPlugin_jump_pcLoad_payload_1; + wire [1:0] _zz_IBusCachedPlugin_jump_pcLoad_payload_2; + wire [31:0] _zz_IBusCachedPlugin_fetchPc_pc; + wire [2:0] _zz_IBusCachedPlugin_fetchPc_pc_1; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_1; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_2; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_3; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_4; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_5; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_6; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_7; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_8; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_9; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_10; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_11; + wire [22:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_12; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_13; + wire [1:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_14; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_15; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_16; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_17; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_18; + wire [1:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_19; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_20; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_21; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_22; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_23; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_24; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_25; + wire [1:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_26; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_27; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_28; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_29; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_30; + wire [18:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_31; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_32; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_33; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_34; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_35; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_36; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_37; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_38; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_39; + wire [15:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_40; + wire [1:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_41; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_42; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_43; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_44; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_45; + wire [1:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_46; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_47; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_48; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_49; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_50; + wire [12:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_51; + wire [2:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_52; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_53; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_54; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_55; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_56; + wire [2:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_57; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_58; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_59; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_60; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_61; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_62; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_63; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_64; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_65; + wire [2:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_66; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_67; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_68; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_69; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_70; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_71; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_72; + wire [9:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_73; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_74; + wire [3:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_75; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_76; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_77; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_78; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_79; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_80; + wire [1:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_81; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_82; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_83; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_84; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_85; + wire [5:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_86; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_87; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_88; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_89; + wire [3:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_90; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_91; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_92; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_93; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_94; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_95; + wire [1:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_96; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_97; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_98; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_99; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_100; + wire [5:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_101; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_102; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_103; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_104; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_105; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_106; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_107; + wire [1:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_108; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_109; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_110; + wire [1:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_111; + wire [5:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_112; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_113; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_114; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_115; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_116; + wire [2:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_117; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_118; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_119; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_120; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_121; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_122; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_123; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_124; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_125; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_126; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_127; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_128; + wire [3:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_129; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_130; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_131; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_132; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_133; + wire [1:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_134; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_135; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_136; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_137; + wire [1:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_138; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_139; + wire [1:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_140; + wire [1:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_141; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_142; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_143; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_144; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_145; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_146; + wire _zz_RegFilePlugin_regFile_port; + wire _zz_decode_RegFilePlugin_rs1Data; + wire _zz_RegFilePlugin_regFile_port_1; + wire _zz_decode_RegFilePlugin_rs2Data; + wire [0:0] _zz__zz_execute_REGFILE_WRITE_DATA; + wire [2:0] _zz__zz_execute_SRC1; + wire [4:0] _zz__zz_execute_SRC1_1; + wire [11:0] _zz__zz_execute_SRC2_3; + wire [31:0] _zz_execute_SrcPlugin_addSub; + wire [31:0] _zz_execute_SrcPlugin_addSub_1; + wire [31:0] _zz_execute_SrcPlugin_addSub_2; + wire [31:0] _zz_execute_SrcPlugin_addSub_3; + wire [31:0] _zz_execute_SrcPlugin_addSub_4; + wire [31:0] _zz_execute_SrcPlugin_addSub_5; + wire [31:0] _zz_execute_SrcPlugin_addSub_6; + wire [19:0] _zz__zz_execute_BranchPlugin_branch_src2; + wire [11:0] _zz__zz_execute_BranchPlugin_branch_src2_4; + wire [65:0] _zz_writeBack_MulPlugin_result; + wire [65:0] _zz_writeBack_MulPlugin_result_1; + wire [31:0] _zz__zz_lastStageRegFileWrite_payload_data; + wire [31:0] _zz__zz_lastStageRegFileWrite_payload_data_1; + wire [9:0] _zz_execute_CfuPlugin_functionsIds_0; + wire [26:0] _zz_iBusWishbone_ADR_1; + wire [51:0] memory_MUL_LOW; + wire [31:0] memory_MEMORY_READ_DATA; + wire writeBack_CfuPlugin_CFU_IN_FLIGHT; + wire execute_CfuPlugin_CFU_IN_FLIGHT; + wire [33:0] memory_MUL_HH; + wire [33:0] execute_MUL_HH; + wire [33:0] execute_MUL_HL; + wire [33:0] execute_MUL_LH; + wire [31:0] execute_MUL_LL; + wire [31:0] execute_SHIFT_RIGHT; + wire [31:0] writeBack_REGFILE_WRITE_DATA; + wire [31:0] memory_REGFILE_WRITE_DATA; + wire [31:0] execute_REGFILE_WRITE_DATA; + wire [1:0] memory_MEMORY_ADDRESS_LOW; + wire [1:0] execute_MEMORY_ADDRESS_LOW; + wire decode_CSR_READ_OPCODE; + wire decode_CSR_WRITE_OPCODE; + wire decode_SRC2_FORCE_ZERO; + wire [31:0] decode_RS2; + wire [31:0] decode_RS1; + wire `Input2Kind_binary_sequential_type decode_CfuPlugin_CFU_INPUT_2_KIND; + wire `Input2Kind_binary_sequential_type _zz_decode_CfuPlugin_CFU_INPUT_2_KIND; + wire `Input2Kind_binary_sequential_type _zz_decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND; + wire `Input2Kind_binary_sequential_type _zz_decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND_1; + wire decode_CfuPlugin_CFU_ENABLE; + wire memory_IS_MUL; + wire execute_IS_MUL; + wire decode_IS_MUL; + wire `EnvCtrlEnum_binary_sequential_type _zz_memory_to_writeBack_ENV_CTRL; + wire `EnvCtrlEnum_binary_sequential_type _zz_memory_to_writeBack_ENV_CTRL_1; + wire `EnvCtrlEnum_binary_sequential_type _zz_execute_to_memory_ENV_CTRL; + wire `EnvCtrlEnum_binary_sequential_type _zz_execute_to_memory_ENV_CTRL_1; + wire `EnvCtrlEnum_binary_sequential_type decode_ENV_CTRL; + wire `EnvCtrlEnum_binary_sequential_type _zz_decode_ENV_CTRL; + wire `EnvCtrlEnum_binary_sequential_type _zz_decode_to_execute_ENV_CTRL; + wire `EnvCtrlEnum_binary_sequential_type _zz_decode_to_execute_ENV_CTRL_1; + wire decode_IS_CSR; + wire `BranchCtrlEnum_binary_sequential_type decode_BRANCH_CTRL; + wire `BranchCtrlEnum_binary_sequential_type _zz_decode_BRANCH_CTRL; + wire `BranchCtrlEnum_binary_sequential_type _zz_decode_to_execute_BRANCH_CTRL; + wire `BranchCtrlEnum_binary_sequential_type _zz_decode_to_execute_BRANCH_CTRL_1; + wire `ShiftCtrlEnum_binary_sequential_type _zz_execute_to_memory_SHIFT_CTRL; + wire `ShiftCtrlEnum_binary_sequential_type _zz_execute_to_memory_SHIFT_CTRL_1; + wire `ShiftCtrlEnum_binary_sequential_type decode_SHIFT_CTRL; + wire `ShiftCtrlEnum_binary_sequential_type _zz_decode_SHIFT_CTRL; + wire `ShiftCtrlEnum_binary_sequential_type _zz_decode_to_execute_SHIFT_CTRL; + wire `ShiftCtrlEnum_binary_sequential_type _zz_decode_to_execute_SHIFT_CTRL_1; + wire `AluBitwiseCtrlEnum_binary_sequential_type decode_ALU_BITWISE_CTRL; + wire `AluBitwiseCtrlEnum_binary_sequential_type _zz_decode_ALU_BITWISE_CTRL; + wire `AluBitwiseCtrlEnum_binary_sequential_type _zz_decode_to_execute_ALU_BITWISE_CTRL; + wire `AluBitwiseCtrlEnum_binary_sequential_type _zz_decode_to_execute_ALU_BITWISE_CTRL_1; + wire decode_SRC_LESS_UNSIGNED; + wire `AluCtrlEnum_binary_sequential_type decode_ALU_CTRL; + wire `AluCtrlEnum_binary_sequential_type _zz_decode_ALU_CTRL; + wire `AluCtrlEnum_binary_sequential_type _zz_decode_to_execute_ALU_CTRL; + wire `AluCtrlEnum_binary_sequential_type _zz_decode_to_execute_ALU_CTRL_1; + wire decode_MEMORY_STORE; + wire execute_BYPASSABLE_MEMORY_STAGE; + wire decode_BYPASSABLE_MEMORY_STAGE; + wire decode_BYPASSABLE_EXECUTE_STAGE; + wire `Src2CtrlEnum_binary_sequential_type decode_SRC2_CTRL; + wire `Src2CtrlEnum_binary_sequential_type _zz_decode_SRC2_CTRL; + wire `Src2CtrlEnum_binary_sequential_type _zz_decode_to_execute_SRC2_CTRL; + wire `Src2CtrlEnum_binary_sequential_type _zz_decode_to_execute_SRC2_CTRL_1; + wire decode_MEMORY_ENABLE; + wire `Src1CtrlEnum_binary_sequential_type decode_SRC1_CTRL; + wire `Src1CtrlEnum_binary_sequential_type _zz_decode_SRC1_CTRL; + wire `Src1CtrlEnum_binary_sequential_type _zz_decode_to_execute_SRC1_CTRL; + wire `Src1CtrlEnum_binary_sequential_type _zz_decode_to_execute_SRC1_CTRL_1; + wire [31:0] writeBack_FORMAL_PC_NEXT; + wire [31:0] memory_FORMAL_PC_NEXT; + wire [31:0] execute_FORMAL_PC_NEXT; + wire [31:0] decode_FORMAL_PC_NEXT; + wire [31:0] memory_PC; + reg _zz_memory_to_writeBack_CfuPlugin_CFU_IN_FLIGHT; + reg _zz_execute_to_memory_CfuPlugin_CFU_IN_FLIGHT; + wire memory_CfuPlugin_CFU_IN_FLIGHT; + wire `Input2Kind_binary_sequential_type execute_CfuPlugin_CFU_INPUT_2_KIND; + wire `Input2Kind_binary_sequential_type _zz_execute_CfuPlugin_CFU_INPUT_2_KIND; + wire execute_CfuPlugin_CFU_ENABLE; + wire writeBack_IS_MUL; + wire [33:0] writeBack_MUL_HH; + wire [51:0] writeBack_MUL_LOW; + wire [33:0] memory_MUL_HL; + wire [33:0] memory_MUL_LH; + wire [31:0] memory_MUL_LL; + reg [31:0] _zz_execute_to_memory_REGFILE_WRITE_DATA; + wire execute_CSR_READ_OPCODE; + wire execute_CSR_WRITE_OPCODE; + wire execute_IS_CSR; + wire `EnvCtrlEnum_binary_sequential_type memory_ENV_CTRL; + wire `EnvCtrlEnum_binary_sequential_type _zz_memory_ENV_CTRL; + wire `EnvCtrlEnum_binary_sequential_type execute_ENV_CTRL; + wire `EnvCtrlEnum_binary_sequential_type _zz_execute_ENV_CTRL; + wire `EnvCtrlEnum_binary_sequential_type writeBack_ENV_CTRL; + wire `EnvCtrlEnum_binary_sequential_type _zz_writeBack_ENV_CTRL; + wire [31:0] execute_BRANCH_CALC; + wire execute_BRANCH_DO; + wire [31:0] execute_PC; + (* keep , syn_keep *) wire [31:0] execute_RS1 /* synthesis syn_keep = 1 */ ; + wire `BranchCtrlEnum_binary_sequential_type execute_BRANCH_CTRL; + wire `BranchCtrlEnum_binary_sequential_type _zz_execute_BRANCH_CTRL; + wire decode_RS2_USE; + wire decode_RS1_USE; + wire execute_REGFILE_WRITE_VALID; + wire execute_BYPASSABLE_EXECUTE_STAGE; + wire memory_REGFILE_WRITE_VALID; + wire [31:0] memory_INSTRUCTION; + wire memory_BYPASSABLE_MEMORY_STAGE; + wire writeBack_REGFILE_WRITE_VALID; + wire [31:0] memory_SHIFT_RIGHT; + reg [31:0] _zz_memory_to_writeBack_REGFILE_WRITE_DATA; + wire `ShiftCtrlEnum_binary_sequential_type memory_SHIFT_CTRL; + wire `ShiftCtrlEnum_binary_sequential_type _zz_memory_SHIFT_CTRL; + wire `ShiftCtrlEnum_binary_sequential_type execute_SHIFT_CTRL; + wire `ShiftCtrlEnum_binary_sequential_type _zz_execute_SHIFT_CTRL; + wire execute_SRC_LESS_UNSIGNED; + wire execute_SRC2_FORCE_ZERO; + wire execute_SRC_USE_SUB_LESS; + wire [31:0] _zz_execute_SRC2; + wire `Src2CtrlEnum_binary_sequential_type execute_SRC2_CTRL; + wire `Src2CtrlEnum_binary_sequential_type _zz_execute_SRC2_CTRL; + wire `Src1CtrlEnum_binary_sequential_type execute_SRC1_CTRL; + wire `Src1CtrlEnum_binary_sequential_type _zz_execute_SRC1_CTRL; + wire decode_SRC_USE_SUB_LESS; + wire decode_SRC_ADD_ZERO; + wire [31:0] execute_SRC_ADD_SUB; + wire execute_SRC_LESS; + wire `AluCtrlEnum_binary_sequential_type execute_ALU_CTRL; + wire `AluCtrlEnum_binary_sequential_type _zz_execute_ALU_CTRL; + wire [31:0] execute_SRC2; + wire [31:0] execute_SRC1; + wire `AluBitwiseCtrlEnum_binary_sequential_type execute_ALU_BITWISE_CTRL; + wire `AluBitwiseCtrlEnum_binary_sequential_type _zz_execute_ALU_BITWISE_CTRL; + wire [31:0] _zz_lastStageRegFileWrite_payload_address; + wire _zz_lastStageRegFileWrite_valid; + reg _zz_1; + wire [31:0] decode_INSTRUCTION_ANTICIPATED; + reg decode_REGFILE_WRITE_VALID; + wire decode_LEGAL_INSTRUCTION; + wire `Input2Kind_binary_sequential_type _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_1; + wire `EnvCtrlEnum_binary_sequential_type _zz_decode_ENV_CTRL_1; + wire `BranchCtrlEnum_binary_sequential_type _zz_decode_BRANCH_CTRL_1; + wire `ShiftCtrlEnum_binary_sequential_type _zz_decode_SHIFT_CTRL_1; + wire `AluBitwiseCtrlEnum_binary_sequential_type _zz_decode_ALU_BITWISE_CTRL_1; + wire `AluCtrlEnum_binary_sequential_type _zz_decode_ALU_CTRL_1; + wire `Src2CtrlEnum_binary_sequential_type _zz_decode_SRC2_CTRL_1; + wire `Src1CtrlEnum_binary_sequential_type _zz_decode_SRC1_CTRL_1; + wire writeBack_MEMORY_STORE; + reg [31:0] _zz_lastStageRegFileWrite_payload_data; + wire writeBack_MEMORY_ENABLE; + wire [1:0] writeBack_MEMORY_ADDRESS_LOW; + wire [31:0] writeBack_MEMORY_READ_DATA; + wire memory_MEMORY_STORE; + wire memory_MEMORY_ENABLE; + wire [31:0] execute_SRC_ADD; + (* keep , syn_keep *) wire [31:0] execute_RS2 /* synthesis syn_keep = 1 */ ; + wire [31:0] execute_INSTRUCTION; + wire execute_MEMORY_STORE; + wire execute_MEMORY_ENABLE; + wire execute_ALIGNEMENT_FAULT; + wire decode_FLUSH_ALL; + reg IBusCachedPlugin_rsp_issueDetected_2; + reg IBusCachedPlugin_rsp_issueDetected_1; + wire [31:0] decode_INSTRUCTION; + reg [31:0] _zz_execute_to_memory_FORMAL_PC_NEXT; + wire [31:0] decode_PC; + wire [31:0] writeBack_PC; + wire [31:0] writeBack_INSTRUCTION; + wire decode_arbitration_haltItself; + reg decode_arbitration_haltByOther; + reg decode_arbitration_removeIt; + wire decode_arbitration_flushIt; + reg decode_arbitration_flushNext; + wire decode_arbitration_isValid; + wire decode_arbitration_isStuck; + wire decode_arbitration_isStuckByOthers; + wire decode_arbitration_isFlushed; + wire decode_arbitration_isMoving; + wire decode_arbitration_isFiring; + reg execute_arbitration_haltItself; + wire execute_arbitration_haltByOther; + reg execute_arbitration_removeIt; + wire execute_arbitration_flushIt; + reg execute_arbitration_flushNext; + reg execute_arbitration_isValid; + wire execute_arbitration_isStuck; + wire execute_arbitration_isStuckByOthers; + wire execute_arbitration_isFlushed; + wire execute_arbitration_isMoving; + wire execute_arbitration_isFiring; + reg memory_arbitration_haltItself; + wire memory_arbitration_haltByOther; + reg memory_arbitration_removeIt; + wire memory_arbitration_flushIt; + wire memory_arbitration_flushNext; + reg memory_arbitration_isValid; + wire memory_arbitration_isStuck; + wire memory_arbitration_isStuckByOthers; + wire memory_arbitration_isFlushed; + wire memory_arbitration_isMoving; + wire memory_arbitration_isFiring; + wire writeBack_arbitration_haltItself; + wire writeBack_arbitration_haltByOther; + reg writeBack_arbitration_removeIt; + wire writeBack_arbitration_flushIt; + reg writeBack_arbitration_flushNext; + reg writeBack_arbitration_isValid; + wire writeBack_arbitration_isStuck; + wire writeBack_arbitration_isStuckByOthers; + wire writeBack_arbitration_isFlushed; + wire writeBack_arbitration_isMoving; + wire writeBack_arbitration_isFiring; + wire [31:0] lastStageInstruction /* verilator public */ ; + wire [31:0] lastStagePc /* verilator public */ ; + wire lastStageIsValid /* verilator public */ ; + wire lastStageIsFiring /* verilator public */ ; + reg IBusCachedPlugin_fetcherHalt; + reg IBusCachedPlugin_incomingInstruction; + wire IBusCachedPlugin_pcValids_0; + wire IBusCachedPlugin_pcValids_1; + wire IBusCachedPlugin_pcValids_2; + wire IBusCachedPlugin_pcValids_3; + wire IBusCachedPlugin_mmuBus_cmd_0_isValid; + wire IBusCachedPlugin_mmuBus_cmd_0_isStuck; + wire [31:0] IBusCachedPlugin_mmuBus_cmd_0_virtualAddress; + wire IBusCachedPlugin_mmuBus_cmd_0_bypassTranslation; + wire [31:0] IBusCachedPlugin_mmuBus_rsp_physicalAddress; + wire IBusCachedPlugin_mmuBus_rsp_isIoAccess; + wire IBusCachedPlugin_mmuBus_rsp_isPaging; + wire IBusCachedPlugin_mmuBus_rsp_allowRead; + wire IBusCachedPlugin_mmuBus_rsp_allowWrite; + wire IBusCachedPlugin_mmuBus_rsp_allowExecute; + wire IBusCachedPlugin_mmuBus_rsp_exception; + wire IBusCachedPlugin_mmuBus_rsp_refilling; + wire IBusCachedPlugin_mmuBus_rsp_bypassTranslation; + wire IBusCachedPlugin_mmuBus_end; + wire IBusCachedPlugin_mmuBus_busy; + wire decodeExceptionPort_valid; + wire [3:0] decodeExceptionPort_payload_code; + wire [31:0] decodeExceptionPort_payload_badAddr; + wire BranchPlugin_jumpInterface_valid; + wire [31:0] BranchPlugin_jumpInterface_payload; + wire [31:0] CsrPlugin_csrMapping_readDataSignal; + wire [31:0] CsrPlugin_csrMapping_readDataInit; + wire [31:0] CsrPlugin_csrMapping_writeDataSignal; + wire CsrPlugin_csrMapping_allowCsrSignal; + wire CsrPlugin_csrMapping_hazardFree; + wire CsrPlugin_inWfi /* verilator public */ ; + wire CsrPlugin_thirdPartyWake; + reg CsrPlugin_jumpInterface_valid; + reg [31:0] CsrPlugin_jumpInterface_payload; + wire CsrPlugin_exceptionPendings_0; + wire CsrPlugin_exceptionPendings_1; + wire CsrPlugin_exceptionPendings_2; + wire CsrPlugin_exceptionPendings_3; + wire externalInterrupt; + wire contextSwitching; + reg [1:0] CsrPlugin_privilege; + wire CsrPlugin_forceMachineWire; + reg CsrPlugin_selfException_valid; + reg [3:0] CsrPlugin_selfException_payload_code; + wire [31:0] CsrPlugin_selfException_payload_badAddr; + wire CsrPlugin_allowInterrupts; + wire CsrPlugin_allowException; + wire CsrPlugin_allowEbreakException; + wire IBusCachedPlugin_externalFlush; + wire IBusCachedPlugin_jump_pcLoad_valid; + wire [31:0] IBusCachedPlugin_jump_pcLoad_payload; + wire [1:0] _zz_IBusCachedPlugin_jump_pcLoad_payload; + wire IBusCachedPlugin_fetchPc_output_valid; + wire IBusCachedPlugin_fetchPc_output_ready; + wire [31:0] IBusCachedPlugin_fetchPc_output_payload; + reg [31:0] IBusCachedPlugin_fetchPc_pcReg /* verilator public */ ; + reg IBusCachedPlugin_fetchPc_correction; + reg IBusCachedPlugin_fetchPc_correctionReg; + wire IBusCachedPlugin_fetchPc_output_fire; + wire IBusCachedPlugin_fetchPc_corrected; + reg IBusCachedPlugin_fetchPc_pcRegPropagate; + reg IBusCachedPlugin_fetchPc_booted; + reg IBusCachedPlugin_fetchPc_inc; + wire when_Fetcher_l131; + wire IBusCachedPlugin_fetchPc_output_fire_1; + wire when_Fetcher_l131_1; + reg [31:0] IBusCachedPlugin_fetchPc_pc; + wire IBusCachedPlugin_fetchPc_redo_valid; + wire [31:0] IBusCachedPlugin_fetchPc_redo_payload; + reg IBusCachedPlugin_fetchPc_flushed; + wire when_Fetcher_l158; + reg IBusCachedPlugin_iBusRsp_redoFetch; + wire IBusCachedPlugin_iBusRsp_stages_0_input_valid; + wire IBusCachedPlugin_iBusRsp_stages_0_input_ready; + wire [31:0] IBusCachedPlugin_iBusRsp_stages_0_input_payload; + wire IBusCachedPlugin_iBusRsp_stages_0_output_valid; + wire IBusCachedPlugin_iBusRsp_stages_0_output_ready; + wire [31:0] IBusCachedPlugin_iBusRsp_stages_0_output_payload; + reg IBusCachedPlugin_iBusRsp_stages_0_halt; + wire IBusCachedPlugin_iBusRsp_stages_1_input_valid; + wire IBusCachedPlugin_iBusRsp_stages_1_input_ready; + wire [31:0] IBusCachedPlugin_iBusRsp_stages_1_input_payload; + wire IBusCachedPlugin_iBusRsp_stages_1_output_valid; + wire IBusCachedPlugin_iBusRsp_stages_1_output_ready; + wire [31:0] IBusCachedPlugin_iBusRsp_stages_1_output_payload; + reg IBusCachedPlugin_iBusRsp_stages_1_halt; + wire IBusCachedPlugin_iBusRsp_stages_2_input_valid; + wire IBusCachedPlugin_iBusRsp_stages_2_input_ready; + wire [31:0] IBusCachedPlugin_iBusRsp_stages_2_input_payload; + wire IBusCachedPlugin_iBusRsp_stages_2_output_valid; + wire IBusCachedPlugin_iBusRsp_stages_2_output_ready; + wire [31:0] IBusCachedPlugin_iBusRsp_stages_2_output_payload; + reg IBusCachedPlugin_iBusRsp_stages_2_halt; + wire _zz_IBusCachedPlugin_iBusRsp_stages_0_input_ready; + wire _zz_IBusCachedPlugin_iBusRsp_stages_1_input_ready; + wire _zz_IBusCachedPlugin_iBusRsp_stages_2_input_ready; + wire IBusCachedPlugin_iBusRsp_flush; + wire _zz_IBusCachedPlugin_iBusRsp_stages_0_output_ready; + wire _zz_IBusCachedPlugin_iBusRsp_stages_0_output_ready_1; + reg _zz_IBusCachedPlugin_iBusRsp_stages_0_output_ready_2; + wire IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_valid; + wire IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_ready; + wire [31:0] IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_payload; + reg _zz_IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_valid; + reg [31:0] _zz_IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_payload; + reg IBusCachedPlugin_iBusRsp_readyForError; + wire IBusCachedPlugin_iBusRsp_output_valid; + wire IBusCachedPlugin_iBusRsp_output_ready; + wire [31:0] IBusCachedPlugin_iBusRsp_output_payload_pc; + wire IBusCachedPlugin_iBusRsp_output_payload_rsp_error; + wire [31:0] IBusCachedPlugin_iBusRsp_output_payload_rsp_inst; + wire IBusCachedPlugin_iBusRsp_output_payload_isRvc; + wire when_Fetcher_l240; + wire when_Fetcher_l320; + reg IBusCachedPlugin_injector_nextPcCalc_valids_0; + wire when_Fetcher_l329; + reg IBusCachedPlugin_injector_nextPcCalc_valids_1; + wire when_Fetcher_l329_1; + reg IBusCachedPlugin_injector_nextPcCalc_valids_2; + wire when_Fetcher_l329_2; + reg IBusCachedPlugin_injector_nextPcCalc_valids_3; + wire when_Fetcher_l329_3; + reg IBusCachedPlugin_injector_nextPcCalc_valids_4; + wire when_Fetcher_l329_4; + wire iBus_cmd_valid; + wire iBus_cmd_ready; + reg [31:0] iBus_cmd_payload_address; + wire [2:0] iBus_cmd_payload_size; + wire iBus_rsp_valid; + wire [31:0] iBus_rsp_payload_data; + wire iBus_rsp_payload_error; + wire [31:0] _zz_IBusCachedPlugin_rspCounter; + reg [31:0] IBusCachedPlugin_rspCounter; + wire IBusCachedPlugin_s0_tightlyCoupledHit; + reg IBusCachedPlugin_s1_tightlyCoupledHit; + reg IBusCachedPlugin_s2_tightlyCoupledHit; + wire IBusCachedPlugin_rsp_iBusRspOutputHalt; + wire IBusCachedPlugin_rsp_issueDetected; + reg IBusCachedPlugin_rsp_redoFetch; + wire when_IBusCachedPlugin_l239; + wire when_IBusCachedPlugin_l250; + wire when_IBusCachedPlugin_l267; + wire dBus_cmd_valid; + wire dBus_cmd_ready; + wire dBus_cmd_payload_wr; + wire [31:0] dBus_cmd_payload_address; + wire [31:0] dBus_cmd_payload_data; + wire [1:0] dBus_cmd_payload_size; + wire dBus_rsp_ready; + wire dBus_rsp_error; + wire [31:0] dBus_rsp_data; + wire _zz_dBus_cmd_valid; + reg execute_DBusSimplePlugin_skipCmd; + reg [31:0] _zz_dBus_cmd_payload_data; + wire when_DBusSimplePlugin_l426; + reg [3:0] _zz_execute_DBusSimplePlugin_formalMask; + wire [3:0] execute_DBusSimplePlugin_formalMask; + wire when_DBusSimplePlugin_l479; + reg [31:0] writeBack_DBusSimplePlugin_rspShifted; + wire [1:0] switch_Misc_l200; + wire _zz_writeBack_DBusSimplePlugin_rspFormated; + reg [31:0] _zz_writeBack_DBusSimplePlugin_rspFormated_1; + wire _zz_writeBack_DBusSimplePlugin_rspFormated_2; + reg [31:0] _zz_writeBack_DBusSimplePlugin_rspFormated_3; + reg [31:0] writeBack_DBusSimplePlugin_rspFormated; + wire when_DBusSimplePlugin_l558; + wire [29:0] _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2; + wire _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_3; + wire _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_4; + wire _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_5; + wire _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_6; + wire _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_7; + wire `Src1CtrlEnum_binary_sequential_type _zz_decode_SRC1_CTRL_2; + wire `Src2CtrlEnum_binary_sequential_type _zz_decode_SRC2_CTRL_2; + wire `AluCtrlEnum_binary_sequential_type _zz_decode_ALU_CTRL_2; + wire `AluBitwiseCtrlEnum_binary_sequential_type _zz_decode_ALU_BITWISE_CTRL_2; + wire `ShiftCtrlEnum_binary_sequential_type _zz_decode_SHIFT_CTRL_2; + wire `BranchCtrlEnum_binary_sequential_type _zz_decode_BRANCH_CTRL_2; + wire `EnvCtrlEnum_binary_sequential_type _zz_decode_ENV_CTRL_2; + wire `Input2Kind_binary_sequential_type _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_8; + wire when_RegFilePlugin_l63; + wire [4:0] decode_RegFilePlugin_regFileReadAddress1; + wire [4:0] decode_RegFilePlugin_regFileReadAddress2; + wire [31:0] decode_RegFilePlugin_rs1Data; + wire [31:0] decode_RegFilePlugin_rs2Data; + reg lastStageRegFileWrite_valid /* verilator public */ ; + reg [4:0] lastStageRegFileWrite_payload_address /* verilator public */ ; + reg [31:0] lastStageRegFileWrite_payload_data /* verilator public */ ; + reg _zz_2; + reg [31:0] execute_IntAluPlugin_bitwise; + reg [31:0] _zz_execute_REGFILE_WRITE_DATA; + reg [31:0] _zz_execute_SRC1; + wire _zz_execute_SRC2_1; + reg [19:0] _zz_execute_SRC2_2; + wire _zz_execute_SRC2_3; + reg [19:0] _zz_execute_SRC2_4; + reg [31:0] _zz_execute_SRC2_5; + reg [31:0] execute_SrcPlugin_addSub; + wire execute_SrcPlugin_less; + wire [4:0] execute_FullBarrelShifterPlugin_amplitude; + reg [31:0] _zz_execute_FullBarrelShifterPlugin_reversed; + wire [31:0] execute_FullBarrelShifterPlugin_reversed; + reg [31:0] _zz_memory_to_writeBack_REGFILE_WRITE_DATA_1; + reg HazardSimplePlugin_src0Hazard; + reg HazardSimplePlugin_src1Hazard; + wire HazardSimplePlugin_writeBackWrites_valid; + wire [4:0] HazardSimplePlugin_writeBackWrites_payload_address; + wire [31:0] HazardSimplePlugin_writeBackWrites_payload_data; + reg HazardSimplePlugin_writeBackBuffer_valid; + reg [4:0] HazardSimplePlugin_writeBackBuffer_payload_address; + reg [31:0] HazardSimplePlugin_writeBackBuffer_payload_data; + wire HazardSimplePlugin_addr0Match; + wire HazardSimplePlugin_addr1Match; + wire when_HazardSimplePlugin_l59; + wire when_HazardSimplePlugin_l62; + wire when_HazardSimplePlugin_l57; + wire when_HazardSimplePlugin_l58; + wire when_HazardSimplePlugin_l59_1; + wire when_HazardSimplePlugin_l62_1; + wire when_HazardSimplePlugin_l57_1; + wire when_HazardSimplePlugin_l58_1; + wire when_HazardSimplePlugin_l59_2; + wire when_HazardSimplePlugin_l62_2; + wire when_HazardSimplePlugin_l57_2; + wire when_HazardSimplePlugin_l58_2; + wire when_HazardSimplePlugin_l105; + wire when_HazardSimplePlugin_l108; + wire when_HazardSimplePlugin_l113; + wire execute_BranchPlugin_eq; + wire [2:0] switch_Misc_l200_1; + reg _zz_execute_BRANCH_DO; + reg _zz_execute_BRANCH_DO_1; + wire [31:0] execute_BranchPlugin_branch_src1; + wire _zz_execute_BranchPlugin_branch_src2; + reg [10:0] _zz_execute_BranchPlugin_branch_src2_1; + wire _zz_execute_BranchPlugin_branch_src2_2; + reg [19:0] _zz_execute_BranchPlugin_branch_src2_3; + wire _zz_execute_BranchPlugin_branch_src2_4; + reg [18:0] _zz_execute_BranchPlugin_branch_src2_5; + reg [31:0] _zz_execute_BranchPlugin_branch_src2_6; + wire [31:0] execute_BranchPlugin_branch_src2; + wire [31:0] execute_BranchPlugin_branchAdder; + wire [1:0] CsrPlugin_misa_base; + wire [25:0] CsrPlugin_misa_extensions; + reg [1:0] CsrPlugin_mtvec_mode; + reg [29:0] CsrPlugin_mtvec_base; + reg [31:0] CsrPlugin_mepc; + reg CsrPlugin_mstatus_MIE; + reg CsrPlugin_mstatus_MPIE; + reg [1:0] CsrPlugin_mstatus_MPP; + reg CsrPlugin_mip_MEIP; + reg CsrPlugin_mip_MTIP; + reg CsrPlugin_mip_MSIP; + reg CsrPlugin_mie_MEIE; + reg CsrPlugin_mie_MTIE; + reg CsrPlugin_mie_MSIE; + reg CsrPlugin_mcause_interrupt; + reg [3:0] CsrPlugin_mcause_exceptionCode; + reg [31:0] CsrPlugin_mtval; + reg [63:0] CsrPlugin_mcycle = 64'b0000000000000000000000000000000000000000000000000000000000000000; + reg [63:0] CsrPlugin_minstret = 64'b0000000000000000000000000000000000000000000000000000000000000000; + wire _zz_when_CsrPlugin_l952; + wire _zz_when_CsrPlugin_l952_1; + wire _zz_when_CsrPlugin_l952_2; + reg CsrPlugin_exceptionPortCtrl_exceptionValids_decode; + reg CsrPlugin_exceptionPortCtrl_exceptionValids_execute; + reg CsrPlugin_exceptionPortCtrl_exceptionValids_memory; + reg CsrPlugin_exceptionPortCtrl_exceptionValids_writeBack; + reg CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_decode; + reg CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_execute; + reg CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_memory; + reg CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_writeBack; + reg [3:0] CsrPlugin_exceptionPortCtrl_exceptionContext_code; + reg [31:0] CsrPlugin_exceptionPortCtrl_exceptionContext_badAddr; + wire [1:0] CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilegeUncapped; + wire [1:0] CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilege; + wire when_CsrPlugin_l909; + wire when_CsrPlugin_l909_1; + wire when_CsrPlugin_l909_2; + wire when_CsrPlugin_l909_3; + wire when_CsrPlugin_l922; + reg CsrPlugin_interrupt_valid; + reg [3:0] CsrPlugin_interrupt_code /* verilator public */ ; + reg [1:0] CsrPlugin_interrupt_targetPrivilege; + wire when_CsrPlugin_l946; + wire when_CsrPlugin_l952; + wire when_CsrPlugin_l952_1; + wire when_CsrPlugin_l952_2; + wire CsrPlugin_exception; + wire CsrPlugin_lastStageWasWfi; + reg CsrPlugin_pipelineLiberator_pcValids_0; + reg CsrPlugin_pipelineLiberator_pcValids_1; + reg CsrPlugin_pipelineLiberator_pcValids_2; + wire CsrPlugin_pipelineLiberator_active; + wire when_CsrPlugin_l980; + wire when_CsrPlugin_l980_1; + wire when_CsrPlugin_l980_2; + wire when_CsrPlugin_l985; + reg CsrPlugin_pipelineLiberator_done; + wire when_CsrPlugin_l991; + wire CsrPlugin_interruptJump /* verilator public */ ; + reg CsrPlugin_hadException /* verilator public */ ; + reg [1:0] CsrPlugin_targetPrivilege; + reg [3:0] CsrPlugin_trapCause; + reg [1:0] CsrPlugin_xtvec_mode; + reg [29:0] CsrPlugin_xtvec_base; + wire when_CsrPlugin_l1019; + wire when_CsrPlugin_l1064; + wire [1:0] switch_CsrPlugin_l1068; + reg execute_CsrPlugin_wfiWake; + wire when_CsrPlugin_l1116; + wire execute_CsrPlugin_blockedBySideEffects; + reg execute_CsrPlugin_illegalAccess; + reg execute_CsrPlugin_illegalInstruction; + wire when_CsrPlugin_l1136; + wire when_CsrPlugin_l1137; + wire when_CsrPlugin_l1144; + reg execute_CsrPlugin_writeInstruction; + reg execute_CsrPlugin_readInstruction; + wire execute_CsrPlugin_writeEnable; + wire execute_CsrPlugin_readEnable; + wire [31:0] execute_CsrPlugin_readToWriteData; + wire switch_Misc_l200_2; + reg [31:0] _zz_CsrPlugin_csrMapping_writeDataSignal; + wire when_CsrPlugin_l1176; + wire when_CsrPlugin_l1180; + wire [11:0] execute_CsrPlugin_csrAddress; + reg execute_MulPlugin_aSigned; + reg execute_MulPlugin_bSigned; + wire [31:0] execute_MulPlugin_a; + wire [31:0] execute_MulPlugin_b; + wire [1:0] switch_MulPlugin_l87; + wire [15:0] execute_MulPlugin_aULow; + wire [15:0] execute_MulPlugin_bULow; + wire [16:0] execute_MulPlugin_aSLow; + wire [16:0] execute_MulPlugin_bSLow; + wire [16:0] execute_MulPlugin_aHigh; + wire [16:0] execute_MulPlugin_bHigh; + wire [65:0] writeBack_MulPlugin_result; + wire when_MulPlugin_l147; + wire [1:0] switch_MulPlugin_l148; + reg [31:0] externalInterruptArray_regNext; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit; + wire [31:0] _zz_CsrPlugin_csrMapping_readDataInit_1; + wire execute_CfuPlugin_schedule; + reg execute_CfuPlugin_hold; + reg execute_CfuPlugin_fired; + wire CfuPlugin_bus_cmd_fire; + wire when_CfuPlugin_l171; + wire when_CfuPlugin_l175; + wire [9:0] execute_CfuPlugin_functionsIds_0; + wire _zz_CfuPlugin_bus_cmd_payload_inputs_1; + reg [23:0] _zz_CfuPlugin_bus_cmd_payload_inputs_1_1; + reg [31:0] _zz_CfuPlugin_bus_cmd_payload_inputs_1_2; + wire CfuPlugin_bus_rsp_rsp_valid; + reg CfuPlugin_bus_rsp_rsp_ready; + wire [31:0] CfuPlugin_bus_rsp_rsp_payload_outputs_0; + reg CfuPlugin_bus_rsp_rValid; + reg [31:0] CfuPlugin_bus_rsp_rData_outputs_0; + wire when_CfuPlugin_l208; + wire when_Pipeline_l124; + reg [31:0] decode_to_execute_PC; + wire when_Pipeline_l124_1; + reg [31:0] execute_to_memory_PC; + wire when_Pipeline_l124_2; + reg [31:0] memory_to_writeBack_PC; + wire when_Pipeline_l124_3; + reg [31:0] decode_to_execute_INSTRUCTION; + wire when_Pipeline_l124_4; + reg [31:0] execute_to_memory_INSTRUCTION; + wire when_Pipeline_l124_5; + reg [31:0] memory_to_writeBack_INSTRUCTION; + wire when_Pipeline_l124_6; + reg [31:0] decode_to_execute_FORMAL_PC_NEXT; + wire when_Pipeline_l124_7; + reg [31:0] execute_to_memory_FORMAL_PC_NEXT; + wire when_Pipeline_l124_8; + reg [31:0] memory_to_writeBack_FORMAL_PC_NEXT; + wire when_Pipeline_l124_9; + reg `Src1CtrlEnum_binary_sequential_type decode_to_execute_SRC1_CTRL; + wire when_Pipeline_l124_10; + reg decode_to_execute_SRC_USE_SUB_LESS; + wire when_Pipeline_l124_11; + reg decode_to_execute_MEMORY_ENABLE; + wire when_Pipeline_l124_12; + reg execute_to_memory_MEMORY_ENABLE; + wire when_Pipeline_l124_13; + reg memory_to_writeBack_MEMORY_ENABLE; + wire when_Pipeline_l124_14; + reg `Src2CtrlEnum_binary_sequential_type decode_to_execute_SRC2_CTRL; + wire when_Pipeline_l124_15; + reg decode_to_execute_REGFILE_WRITE_VALID; + wire when_Pipeline_l124_16; + reg execute_to_memory_REGFILE_WRITE_VALID; + wire when_Pipeline_l124_17; + reg memory_to_writeBack_REGFILE_WRITE_VALID; + wire when_Pipeline_l124_18; + reg decode_to_execute_BYPASSABLE_EXECUTE_STAGE; + wire when_Pipeline_l124_19; + reg decode_to_execute_BYPASSABLE_MEMORY_STAGE; + wire when_Pipeline_l124_20; + reg execute_to_memory_BYPASSABLE_MEMORY_STAGE; + wire when_Pipeline_l124_21; + reg decode_to_execute_MEMORY_STORE; + wire when_Pipeline_l124_22; + reg execute_to_memory_MEMORY_STORE; + wire when_Pipeline_l124_23; + reg memory_to_writeBack_MEMORY_STORE; + wire when_Pipeline_l124_24; + reg `AluCtrlEnum_binary_sequential_type decode_to_execute_ALU_CTRL; + wire when_Pipeline_l124_25; + reg decode_to_execute_SRC_LESS_UNSIGNED; + wire when_Pipeline_l124_26; + reg `AluBitwiseCtrlEnum_binary_sequential_type decode_to_execute_ALU_BITWISE_CTRL; + wire when_Pipeline_l124_27; + reg `ShiftCtrlEnum_binary_sequential_type decode_to_execute_SHIFT_CTRL; + wire when_Pipeline_l124_28; + reg `ShiftCtrlEnum_binary_sequential_type execute_to_memory_SHIFT_CTRL; + wire when_Pipeline_l124_29; + reg `BranchCtrlEnum_binary_sequential_type decode_to_execute_BRANCH_CTRL; + wire when_Pipeline_l124_30; + reg decode_to_execute_IS_CSR; + wire when_Pipeline_l124_31; + reg `EnvCtrlEnum_binary_sequential_type decode_to_execute_ENV_CTRL; + wire when_Pipeline_l124_32; + reg `EnvCtrlEnum_binary_sequential_type execute_to_memory_ENV_CTRL; + wire when_Pipeline_l124_33; + reg `EnvCtrlEnum_binary_sequential_type memory_to_writeBack_ENV_CTRL; + wire when_Pipeline_l124_34; + reg decode_to_execute_IS_MUL; + wire when_Pipeline_l124_35; + reg execute_to_memory_IS_MUL; + wire when_Pipeline_l124_36; + reg memory_to_writeBack_IS_MUL; + wire when_Pipeline_l124_37; + reg decode_to_execute_CfuPlugin_CFU_ENABLE; + wire when_Pipeline_l124_38; + reg `Input2Kind_binary_sequential_type decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND; + wire when_Pipeline_l124_39; + reg [31:0] decode_to_execute_RS1; + wire when_Pipeline_l124_40; + reg [31:0] decode_to_execute_RS2; + wire when_Pipeline_l124_41; + reg decode_to_execute_SRC2_FORCE_ZERO; + wire when_Pipeline_l124_42; + reg decode_to_execute_CSR_WRITE_OPCODE; + wire when_Pipeline_l124_43; + reg decode_to_execute_CSR_READ_OPCODE; + wire when_Pipeline_l124_44; + reg [1:0] execute_to_memory_MEMORY_ADDRESS_LOW; + wire when_Pipeline_l124_45; + reg [1:0] memory_to_writeBack_MEMORY_ADDRESS_LOW; + wire when_Pipeline_l124_46; + reg [31:0] execute_to_memory_REGFILE_WRITE_DATA; + wire when_Pipeline_l124_47; + reg [31:0] memory_to_writeBack_REGFILE_WRITE_DATA; + wire when_Pipeline_l124_48; + reg [31:0] execute_to_memory_SHIFT_RIGHT; + wire when_Pipeline_l124_49; + reg [31:0] execute_to_memory_MUL_LL; + wire when_Pipeline_l124_50; + reg [33:0] execute_to_memory_MUL_LH; + wire when_Pipeline_l124_51; + reg [33:0] execute_to_memory_MUL_HL; + wire when_Pipeline_l124_52; + reg [33:0] execute_to_memory_MUL_HH; + wire when_Pipeline_l124_53; + reg [33:0] memory_to_writeBack_MUL_HH; + wire when_Pipeline_l124_54; + reg execute_to_memory_CfuPlugin_CFU_IN_FLIGHT; + wire when_Pipeline_l124_55; + reg memory_to_writeBack_CfuPlugin_CFU_IN_FLIGHT; + wire when_Pipeline_l124_56; + reg [31:0] memory_to_writeBack_MEMORY_READ_DATA; + wire when_Pipeline_l124_57; + reg [51:0] memory_to_writeBack_MUL_LOW; + wire when_Pipeline_l151; + wire when_Pipeline_l154; + wire when_Pipeline_l151_1; + wire when_Pipeline_l154_1; + wire when_Pipeline_l151_2; + wire when_Pipeline_l154_2; + wire when_CsrPlugin_l1264; + reg execute_CsrPlugin_csr_768; + wire when_CsrPlugin_l1264_1; + reg execute_CsrPlugin_csr_836; + wire when_CsrPlugin_l1264_2; + reg execute_CsrPlugin_csr_772; + wire when_CsrPlugin_l1264_3; + reg execute_CsrPlugin_csr_773; + wire when_CsrPlugin_l1264_4; + reg execute_CsrPlugin_csr_833; + wire when_CsrPlugin_l1264_5; + reg execute_CsrPlugin_csr_834; + wire when_CsrPlugin_l1264_6; + reg execute_CsrPlugin_csr_835; + wire when_CsrPlugin_l1264_7; + reg execute_CsrPlugin_csr_2816; + wire when_CsrPlugin_l1264_8; + reg execute_CsrPlugin_csr_2944; + wire when_CsrPlugin_l1264_9; + reg execute_CsrPlugin_csr_3008; + wire when_CsrPlugin_l1264_10; + reg execute_CsrPlugin_csr_4032; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_2; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_3; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_4; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_5; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_6; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_7; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_8; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_9; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_10; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_11; + wire when_CsrPlugin_l1297; + wire when_CsrPlugin_l1302; + reg [2:0] _zz_iBusWishbone_ADR; + wire when_InstructionCache_l239; + reg _zz_iBus_rsp_valid; + reg [31:0] iBusWishbone_DAT_MISO_regNext; + wire dBus_cmd_halfPipe_valid; + wire dBus_cmd_halfPipe_ready; + wire dBus_cmd_halfPipe_payload_wr; + wire [31:0] dBus_cmd_halfPipe_payload_address; + wire [31:0] dBus_cmd_halfPipe_payload_data; + wire [1:0] dBus_cmd_halfPipe_payload_size; + reg dBus_cmd_rValid; + wire dBus_cmd_halfPipe_fire; + reg dBus_cmd_rData_wr; + reg [31:0] dBus_cmd_rData_address; + reg [31:0] dBus_cmd_rData_data; + reg [1:0] dBus_cmd_rData_size; + reg [3:0] _zz_dBusWishbone_SEL; + wire when_DBusSimplePlugin_l189; + `ifndef SYNTHESIS + reg [39:0] decode_CfuPlugin_CFU_INPUT_2_KIND_string; + reg [39:0] _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_string; + reg [39:0] _zz_decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND_string; + reg [39:0] _zz_decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND_1_string; + reg [39:0] _zz_memory_to_writeBack_ENV_CTRL_string; + reg [39:0] _zz_memory_to_writeBack_ENV_CTRL_1_string; + reg [39:0] _zz_execute_to_memory_ENV_CTRL_string; + reg [39:0] _zz_execute_to_memory_ENV_CTRL_1_string; + reg [39:0] decode_ENV_CTRL_string; + reg [39:0] _zz_decode_ENV_CTRL_string; + reg [39:0] _zz_decode_to_execute_ENV_CTRL_string; + reg [39:0] _zz_decode_to_execute_ENV_CTRL_1_string; + reg [31:0] decode_BRANCH_CTRL_string; + reg [31:0] _zz_decode_BRANCH_CTRL_string; + reg [31:0] _zz_decode_to_execute_BRANCH_CTRL_string; + reg [31:0] _zz_decode_to_execute_BRANCH_CTRL_1_string; + reg [71:0] _zz_execute_to_memory_SHIFT_CTRL_string; + reg [71:0] _zz_execute_to_memory_SHIFT_CTRL_1_string; + reg [71:0] decode_SHIFT_CTRL_string; + reg [71:0] _zz_decode_SHIFT_CTRL_string; + reg [71:0] _zz_decode_to_execute_SHIFT_CTRL_string; + reg [71:0] _zz_decode_to_execute_SHIFT_CTRL_1_string; + reg [39:0] decode_ALU_BITWISE_CTRL_string; + reg [39:0] _zz_decode_ALU_BITWISE_CTRL_string; + reg [39:0] _zz_decode_to_execute_ALU_BITWISE_CTRL_string; + reg [39:0] _zz_decode_to_execute_ALU_BITWISE_CTRL_1_string; + reg [63:0] decode_ALU_CTRL_string; + reg [63:0] _zz_decode_ALU_CTRL_string; + reg [63:0] _zz_decode_to_execute_ALU_CTRL_string; + reg [63:0] _zz_decode_to_execute_ALU_CTRL_1_string; + reg [23:0] decode_SRC2_CTRL_string; + reg [23:0] _zz_decode_SRC2_CTRL_string; + reg [23:0] _zz_decode_to_execute_SRC2_CTRL_string; + reg [23:0] _zz_decode_to_execute_SRC2_CTRL_1_string; + reg [95:0] decode_SRC1_CTRL_string; + reg [95:0] _zz_decode_SRC1_CTRL_string; + reg [95:0] _zz_decode_to_execute_SRC1_CTRL_string; + reg [95:0] _zz_decode_to_execute_SRC1_CTRL_1_string; + reg [39:0] execute_CfuPlugin_CFU_INPUT_2_KIND_string; + reg [39:0] _zz_execute_CfuPlugin_CFU_INPUT_2_KIND_string; + reg [39:0] memory_ENV_CTRL_string; + reg [39:0] _zz_memory_ENV_CTRL_string; + reg [39:0] execute_ENV_CTRL_string; + reg [39:0] _zz_execute_ENV_CTRL_string; + reg [39:0] writeBack_ENV_CTRL_string; + reg [39:0] _zz_writeBack_ENV_CTRL_string; + reg [31:0] execute_BRANCH_CTRL_string; + reg [31:0] _zz_execute_BRANCH_CTRL_string; + reg [71:0] memory_SHIFT_CTRL_string; + reg [71:0] _zz_memory_SHIFT_CTRL_string; + reg [71:0] execute_SHIFT_CTRL_string; + reg [71:0] _zz_execute_SHIFT_CTRL_string; + reg [23:0] execute_SRC2_CTRL_string; + reg [23:0] _zz_execute_SRC2_CTRL_string; + reg [95:0] execute_SRC1_CTRL_string; + reg [95:0] _zz_execute_SRC1_CTRL_string; + reg [63:0] execute_ALU_CTRL_string; + reg [63:0] _zz_execute_ALU_CTRL_string; + reg [39:0] execute_ALU_BITWISE_CTRL_string; + reg [39:0] _zz_execute_ALU_BITWISE_CTRL_string; + reg [39:0] _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_1_string; + reg [39:0] _zz_decode_ENV_CTRL_1_string; + reg [31:0] _zz_decode_BRANCH_CTRL_1_string; + reg [71:0] _zz_decode_SHIFT_CTRL_1_string; + reg [39:0] _zz_decode_ALU_BITWISE_CTRL_1_string; + reg [63:0] _zz_decode_ALU_CTRL_1_string; + reg [23:0] _zz_decode_SRC2_CTRL_1_string; + reg [95:0] _zz_decode_SRC1_CTRL_1_string; + reg [95:0] _zz_decode_SRC1_CTRL_2_string; + reg [23:0] _zz_decode_SRC2_CTRL_2_string; + reg [63:0] _zz_decode_ALU_CTRL_2_string; + reg [39:0] _zz_decode_ALU_BITWISE_CTRL_2_string; + reg [71:0] _zz_decode_SHIFT_CTRL_2_string; + reg [31:0] _zz_decode_BRANCH_CTRL_2_string; + reg [39:0] _zz_decode_ENV_CTRL_2_string; + reg [39:0] _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_8_string; + reg [95:0] decode_to_execute_SRC1_CTRL_string; + reg [23:0] decode_to_execute_SRC2_CTRL_string; + reg [63:0] decode_to_execute_ALU_CTRL_string; + reg [39:0] decode_to_execute_ALU_BITWISE_CTRL_string; + reg [71:0] decode_to_execute_SHIFT_CTRL_string; + reg [71:0] execute_to_memory_SHIFT_CTRL_string; + reg [31:0] decode_to_execute_BRANCH_CTRL_string; + reg [39:0] decode_to_execute_ENV_CTRL_string; + reg [39:0] execute_to_memory_ENV_CTRL_string; + reg [39:0] memory_to_writeBack_ENV_CTRL_string; + reg [39:0] decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND_string; + `endif + + (* ram_style = "block" *) reg [31:0] RegFilePlugin_regFile [0:31] /* verilator public */ ; + + assign _zz_memory_MUL_LOW = ($signed(_zz_memory_MUL_LOW_1) + $signed(_zz_memory_MUL_LOW_5)); + assign _zz_memory_MUL_LOW_1 = ($signed(_zz_memory_MUL_LOW_2) + $signed(_zz_memory_MUL_LOW_3)); + assign _zz_memory_MUL_LOW_2 = 52'h0; + assign _zz_memory_MUL_LOW_4 = {1'b0,memory_MUL_LL}; + assign _zz_memory_MUL_LOW_3 = {{19{_zz_memory_MUL_LOW_4[32]}}, _zz_memory_MUL_LOW_4}; + assign _zz_memory_MUL_LOW_6 = ({16'd0,memory_MUL_LH} <<< 16); + assign _zz_memory_MUL_LOW_5 = {{2{_zz_memory_MUL_LOW_6[49]}}, _zz_memory_MUL_LOW_6}; + assign _zz_memory_MUL_LOW_8 = ({16'd0,memory_MUL_HL} <<< 16); + assign _zz_memory_MUL_LOW_7 = {{2{_zz_memory_MUL_LOW_8[49]}}, _zz_memory_MUL_LOW_8}; + assign _zz_execute_SHIFT_RIGHT_1 = ($signed(_zz_execute_SHIFT_RIGHT_2) >>> execute_FullBarrelShifterPlugin_amplitude); + assign _zz_execute_SHIFT_RIGHT = _zz_execute_SHIFT_RIGHT_1[31 : 0]; + assign _zz_execute_SHIFT_RIGHT_2 = {((execute_SHIFT_CTRL == `ShiftCtrlEnum_binary_sequential_SRA_1) && execute_FullBarrelShifterPlugin_reversed[31]),execute_FullBarrelShifterPlugin_reversed}; + assign _zz_IBusCachedPlugin_jump_pcLoad_payload_1 = (_zz_IBusCachedPlugin_jump_pcLoad_payload & (~ _zz_IBusCachedPlugin_jump_pcLoad_payload_2)); + assign _zz_IBusCachedPlugin_jump_pcLoad_payload_2 = (_zz_IBusCachedPlugin_jump_pcLoad_payload - 2'b01); + assign _zz_IBusCachedPlugin_fetchPc_pc_1 = {IBusCachedPlugin_fetchPc_inc,2'b00}; + assign _zz_IBusCachedPlugin_fetchPc_pc = {29'd0, _zz_IBusCachedPlugin_fetchPc_pc_1}; + assign _zz__zz_execute_REGFILE_WRITE_DATA = execute_SRC_LESS; + assign _zz__zz_execute_SRC1 = 3'b100; + assign _zz__zz_execute_SRC1_1 = execute_INSTRUCTION[19 : 15]; + assign _zz__zz_execute_SRC2_3 = {execute_INSTRUCTION[31 : 25],execute_INSTRUCTION[11 : 7]}; + assign _zz_execute_SrcPlugin_addSub = ($signed(_zz_execute_SrcPlugin_addSub_1) + $signed(_zz_execute_SrcPlugin_addSub_4)); + assign _zz_execute_SrcPlugin_addSub_1 = ($signed(_zz_execute_SrcPlugin_addSub_2) + $signed(_zz_execute_SrcPlugin_addSub_3)); + assign _zz_execute_SrcPlugin_addSub_2 = execute_SRC1; + assign _zz_execute_SrcPlugin_addSub_3 = (execute_SRC_USE_SUB_LESS ? (~ execute_SRC2) : execute_SRC2); + assign _zz_execute_SrcPlugin_addSub_4 = (execute_SRC_USE_SUB_LESS ? _zz_execute_SrcPlugin_addSub_5 : _zz_execute_SrcPlugin_addSub_6); + assign _zz_execute_SrcPlugin_addSub_5 = 32'h00000001; + assign _zz_execute_SrcPlugin_addSub_6 = 32'h0; + assign _zz__zz_execute_BranchPlugin_branch_src2 = {{{execute_INSTRUCTION[31],execute_INSTRUCTION[19 : 12]},execute_INSTRUCTION[20]},execute_INSTRUCTION[30 : 21]}; + assign _zz__zz_execute_BranchPlugin_branch_src2_4 = {{{execute_INSTRUCTION[31],execute_INSTRUCTION[7]},execute_INSTRUCTION[30 : 25]},execute_INSTRUCTION[11 : 8]}; + assign _zz_writeBack_MulPlugin_result = {{14{writeBack_MUL_LOW[51]}}, writeBack_MUL_LOW}; + assign _zz_writeBack_MulPlugin_result_1 = ({32'd0,writeBack_MUL_HH} <<< 32); + assign _zz__zz_lastStageRegFileWrite_payload_data = writeBack_MUL_LOW[31 : 0]; + assign _zz__zz_lastStageRegFileWrite_payload_data_1 = writeBack_MulPlugin_result[63 : 32]; + assign _zz_execute_CfuPlugin_functionsIds_0 = {execute_INSTRUCTION[31 : 25],execute_INSTRUCTION[14 : 12]}; + assign _zz_iBusWishbone_ADR_1 = (iBus_cmd_payload_address >>> 5); + assign _zz_decode_RegFilePlugin_rs1Data = 1'b1; + assign _zz_decode_RegFilePlugin_rs2Data = 1'b1; + assign _zz_decode_LEGAL_INSTRUCTION = 32'h0000106f; + assign _zz_decode_LEGAL_INSTRUCTION_1 = (decode_INSTRUCTION & 32'h0000107f); + assign _zz_decode_LEGAL_INSTRUCTION_2 = 32'h00001073; + assign _zz_decode_LEGAL_INSTRUCTION_3 = ((decode_INSTRUCTION & 32'h0000207f) == 32'h00002073); + assign _zz_decode_LEGAL_INSTRUCTION_4 = ((decode_INSTRUCTION & 32'h0000407f) == 32'h00004063); + assign _zz_decode_LEGAL_INSTRUCTION_5 = {((decode_INSTRUCTION & 32'h0000207f) == 32'h00002013),{((decode_INSTRUCTION & 32'h0000603f) == 32'h00000023),{((decode_INSTRUCTION & _zz_decode_LEGAL_INSTRUCTION_6) == 32'h00000003),{(_zz_decode_LEGAL_INSTRUCTION_7 == _zz_decode_LEGAL_INSTRUCTION_8),{_zz_decode_LEGAL_INSTRUCTION_9,{_zz_decode_LEGAL_INSTRUCTION_10,_zz_decode_LEGAL_INSTRUCTION_11}}}}}}; + assign _zz_decode_LEGAL_INSTRUCTION_6 = 32'h0000207f; + assign _zz_decode_LEGAL_INSTRUCTION_7 = (decode_INSTRUCTION & 32'h0000505f); + assign _zz_decode_LEGAL_INSTRUCTION_8 = 32'h00000003; + assign _zz_decode_LEGAL_INSTRUCTION_9 = ((decode_INSTRUCTION & 32'h0000707b) == 32'h00000063); + assign _zz_decode_LEGAL_INSTRUCTION_10 = ((decode_INSTRUCTION & 32'h0000607f) == 32'h0000000f); + assign _zz_decode_LEGAL_INSTRUCTION_11 = {((decode_INSTRUCTION & 32'hfc00407f) == 32'h00000033),{((decode_INSTRUCTION & 32'hfe00007f) == 32'h00000033),{((decode_INSTRUCTION & _zz_decode_LEGAL_INSTRUCTION_12) == 32'h00005013),{(_zz_decode_LEGAL_INSTRUCTION_13 == _zz_decode_LEGAL_INSTRUCTION_14),{_zz_decode_LEGAL_INSTRUCTION_15,{_zz_decode_LEGAL_INSTRUCTION_16,_zz_decode_LEGAL_INSTRUCTION_17}}}}}}; + assign _zz_decode_LEGAL_INSTRUCTION_12 = 32'hbc00707f; + assign _zz_decode_LEGAL_INSTRUCTION_13 = (decode_INSTRUCTION & 32'hfc00307f); + assign _zz_decode_LEGAL_INSTRUCTION_14 = 32'h00001013; + assign _zz_decode_LEGAL_INSTRUCTION_15 = ((decode_INSTRUCTION & 32'hbe00707f) == 32'h00005033); + assign _zz_decode_LEGAL_INSTRUCTION_16 = ((decode_INSTRUCTION & 32'hbe00707f) == 32'h00000033); + assign _zz_decode_LEGAL_INSTRUCTION_17 = {((decode_INSTRUCTION & 32'hdfffffff) == 32'h10200073),{((decode_INSTRUCTION & 32'hffffffff) == 32'h10500073),((decode_INSTRUCTION & 32'hffffffff) == 32'h00000073)}}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2 = (decode_INSTRUCTION & 32'h02000074); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_1 = 32'h02000030; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_2 = ((decode_INSTRUCTION & 32'h10003050) == 32'h00000050); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_3 = ((decode_INSTRUCTION & 32'h10403050) == 32'h10000050); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_4 = 1'b0; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_5 = ({(_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_6 == _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_7),(_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_8 == _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_9)} != 2'b00); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_10 = ({_zz_decode_CfuPlugin_CFU_INPUT_2_KIND_6,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_11} != 2'b00); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_12 = {(_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_13 != 1'b0),{(_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_14 != _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_19),{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_20,{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_23,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_31}}}}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_6 = (decode_INSTRUCTION & 32'h00001050); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_7 = 32'h00001050; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_8 = (decode_INSTRUCTION & 32'h00002050); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_9 = 32'h00002050; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_11 = ((decode_INSTRUCTION & 32'h0000001c) == 32'h00000004); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_13 = ((decode_INSTRUCTION & 32'h00000058) == 32'h00000040); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_14 = {(_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_15 == _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_16),(_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_17 == _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_18)}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_19 = 2'b00; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_20 = ((_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_21 == _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_22) != 1'b0); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_23 = ({_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_24,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_26} != 3'b000); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_31 = {(_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_32 != _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_34),{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_35,{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_38,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_40}}}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_15 = (decode_INSTRUCTION & 32'h00000050); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_16 = 32'h00000040; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_17 = (decode_INSTRUCTION & 32'h00403040); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_18 = 32'h00000040; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_21 = (decode_INSTRUCTION & 32'h00007054); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_22 = 32'h00005010; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_24 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_25) == 32'h40001010); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_26 = {(_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_27 == _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_28),(_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_29 == _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_30)}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_32 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_33) == 32'h00000024); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_34 = 1'b0; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_35 = ((_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_36 == _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_37) != 1'b0); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_38 = (_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_39 != 1'b0); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_40 = {(_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_41 != _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_46),{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_47,{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_50,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_51}}}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_25 = 32'h40003054; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_27 = (decode_INSTRUCTION & 32'h00007034); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_28 = 32'h00001010; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_29 = (decode_INSTRUCTION & 32'h02007054); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_30 = 32'h00001010; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_33 = 32'h00000064; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_36 = (decode_INSTRUCTION & 32'h00001000); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_37 = 32'h00001000; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_39 = ((decode_INSTRUCTION & 32'h00003000) == 32'h00002000); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_41 = {(_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_42 == _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_43),(_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_44 == _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_45)}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_46 = 2'b00; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_47 = ((_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_48 == _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_49) != 1'b0); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_50 = (_zz_decode_CfuPlugin_CFU_INPUT_2_KIND_4 != 1'b0); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_51 = {(_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_52 != _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_57),{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_58,{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_60,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_73}}}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_42 = (decode_INSTRUCTION & 32'h00002010); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_43 = 32'h00002000; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_44 = (decode_INSTRUCTION & 32'h00005000); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_45 = 32'h00001000; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_48 = (decode_INSTRUCTION & 32'h00004004); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_49 = 32'h00004000; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_52 = {_zz_decode_CfuPlugin_CFU_INPUT_2_KIND_7,{(_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_53 == _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_54),(_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_55 == _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_56)}}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_57 = 3'b000; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_58 = (((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_59) == 32'h00000020) != 1'b0); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_60 = ({_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_61,{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_63,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_66}} != 5'h0); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_73 = {({_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_74,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_75} != 5'h0),{(_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_86 != _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_101),{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_102,{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_107,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_112}}}}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_53 = (decode_INSTRUCTION & 32'h00000034); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_54 = 32'h00000020; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_55 = (decode_INSTRUCTION & 32'h00000064); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_56 = 32'h00000020; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_59 = 32'h00000020; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_61 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_62) == 32'h00000008); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_63 = (_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_64 == _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_65); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_66 = {_zz_decode_CfuPlugin_CFU_INPUT_2_KIND_5,{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_67,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_70}}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_74 = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_5; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_75 = {_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_76,{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_78,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_81}}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_86 = {_zz_decode_CfuPlugin_CFU_INPUT_2_KIND_6,{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_87,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_90}}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_101 = 6'h0; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_102 = ({_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_103,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_104} != 2'b00); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_107 = (_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_108 != _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_111); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_112 = {_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_113,{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_124,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_129}}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_62 = 32'h00000008; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_64 = (decode_INSTRUCTION & 32'h00000040); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_65 = 32'h00000040; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_67 = (_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_68 == _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_69); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_70 = (_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_71 == _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_72); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_76 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_77) == 32'h00002010); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_78 = (_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_79 == _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_80); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_81 = {_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_82,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_84}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_87 = (_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_88 == _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_89); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_90 = {_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_91,{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_93,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_96}}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_103 = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_5; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_104 = (_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_105 == _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_106); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_108 = {_zz_decode_CfuPlugin_CFU_INPUT_2_KIND_5,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_109}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_111 = 2'b00; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_113 = ({_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_114,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_117} != 4'b0000); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_124 = (_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_125 != _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_128); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_129 = {_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_130,{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_137,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_141}}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_68 = (decode_INSTRUCTION & 32'h00000030); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_69 = 32'h00000010; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_71 = (decode_INSTRUCTION & 32'h02000020); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_72 = 32'h00000020; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_77 = 32'h00002030; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_79 = (decode_INSTRUCTION & 32'h00001030); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_80 = 32'h00000010; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_82 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_83) == 32'h00002020); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_84 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_85) == 32'h00000020); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_88 = (decode_INSTRUCTION & 32'h00001010); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_89 = 32'h00001010; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_91 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_92) == 32'h00002010); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_93 = (_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_94 == _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_95); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_96 = {_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_97,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_99}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_105 = (decode_INSTRUCTION & 32'h00000070); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_106 = 32'h00000020; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_109 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_110) == 32'h0); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_114 = (_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_115 == _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_116); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_117 = {_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_118,{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_120,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_121}}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_125 = (_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_126 == _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_127); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_128 = 1'b0; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_130 = ({_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_131,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_134} != 3'b000); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_137 = (_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_138 != _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_140); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_141 = {_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_142,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_145}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_83 = 32'h02002060; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_85 = 32'h02003020; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_92 = 32'h00002010; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_94 = (decode_INSTRUCTION & 32'h00000050); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_95 = 32'h00000010; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_97 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_98) == 32'h00000004); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_99 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_100) == 32'h0); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_110 = 32'h00000020; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_115 = (decode_INSTRUCTION & 32'h00000044); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_116 = 32'h0; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_118 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_119) == 32'h0); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_120 = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_4; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_121 = (_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_122 == _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_123); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_126 = (decode_INSTRUCTION & 32'h00000058); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_127 = 32'h0; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_131 = (_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_132 == _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_133); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_134 = {_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_135,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_136}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_138 = {_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_139,_zz_decode_CfuPlugin_CFU_INPUT_2_KIND_3}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_140 = 2'b00; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_142 = ({_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_143,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_144} != 2'b00); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_145 = (_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_146 != 1'b0); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_98 = 32'h0000000c; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_100 = 32'h00000024; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_119 = 32'h00000018; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_122 = (decode_INSTRUCTION & 32'h00005004); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_123 = 32'h00001000; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_132 = (decode_INSTRUCTION & 32'h00000044); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_133 = 32'h00000040; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_135 = ((decode_INSTRUCTION & 32'h00002014) == 32'h00002010); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_136 = ((decode_INSTRUCTION & 32'h40000034) == 32'h40000030); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_139 = ((decode_INSTRUCTION & 32'h00000014) == 32'h00000004); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_143 = ((decode_INSTRUCTION & 32'h00000044) == 32'h00000004); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_144 = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_3; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_146 = ((decode_INSTRUCTION & 32'h00001054) == 32'h00001004); + always @(posedge clk) begin + if(_zz_decode_RegFilePlugin_rs1Data) begin + _zz_RegFilePlugin_regFile_port0 <= RegFilePlugin_regFile[decode_RegFilePlugin_regFileReadAddress1]; + end + end + + always @(posedge clk) begin + if(_zz_decode_RegFilePlugin_rs2Data) begin + _zz_RegFilePlugin_regFile_port1 <= RegFilePlugin_regFile[decode_RegFilePlugin_regFileReadAddress2]; + end + end + + always @(posedge clk) begin + if(_zz_1) begin + RegFilePlugin_regFile[lastStageRegFileWrite_payload_address] <= lastStageRegFileWrite_payload_data; + end + end + + InstructionCache IBusCachedPlugin_cache ( + .io_flush (IBusCachedPlugin_cache_io_flush ), //i + .io_cpu_prefetch_isValid (IBusCachedPlugin_cache_io_cpu_prefetch_isValid ), //i + .io_cpu_prefetch_haltIt (IBusCachedPlugin_cache_io_cpu_prefetch_haltIt ), //o + .io_cpu_prefetch_pc (IBusCachedPlugin_iBusRsp_stages_0_input_payload ), //i + .io_cpu_fetch_isValid (IBusCachedPlugin_cache_io_cpu_fetch_isValid ), //i + .io_cpu_fetch_isStuck (IBusCachedPlugin_cache_io_cpu_fetch_isStuck ), //i + .io_cpu_fetch_isRemoved (IBusCachedPlugin_cache_io_cpu_fetch_isRemoved ), //i + .io_cpu_fetch_pc (IBusCachedPlugin_iBusRsp_stages_1_input_payload ), //i + .io_cpu_fetch_data (IBusCachedPlugin_cache_io_cpu_fetch_data ), //o + .io_cpu_fetch_mmuRsp_physicalAddress (IBusCachedPlugin_mmuBus_rsp_physicalAddress ), //i + .io_cpu_fetch_mmuRsp_isIoAccess (IBusCachedPlugin_mmuBus_rsp_isIoAccess ), //i + .io_cpu_fetch_mmuRsp_isPaging (IBusCachedPlugin_mmuBus_rsp_isPaging ), //i + .io_cpu_fetch_mmuRsp_allowRead (IBusCachedPlugin_mmuBus_rsp_allowRead ), //i + .io_cpu_fetch_mmuRsp_allowWrite (IBusCachedPlugin_mmuBus_rsp_allowWrite ), //i + .io_cpu_fetch_mmuRsp_allowExecute (IBusCachedPlugin_mmuBus_rsp_allowExecute ), //i + .io_cpu_fetch_mmuRsp_exception (IBusCachedPlugin_mmuBus_rsp_exception ), //i + .io_cpu_fetch_mmuRsp_refilling (IBusCachedPlugin_mmuBus_rsp_refilling ), //i + .io_cpu_fetch_mmuRsp_bypassTranslation (IBusCachedPlugin_mmuBus_rsp_bypassTranslation ), //i + .io_cpu_fetch_physicalAddress (IBusCachedPlugin_cache_io_cpu_fetch_physicalAddress ), //o + .io_cpu_decode_isValid (IBusCachedPlugin_cache_io_cpu_decode_isValid ), //i + .io_cpu_decode_isStuck (IBusCachedPlugin_cache_io_cpu_decode_isStuck ), //i + .io_cpu_decode_pc (IBusCachedPlugin_iBusRsp_stages_2_input_payload ), //i + .io_cpu_decode_physicalAddress (IBusCachedPlugin_cache_io_cpu_decode_physicalAddress ), //o + .io_cpu_decode_data (IBusCachedPlugin_cache_io_cpu_decode_data ), //o + .io_cpu_decode_cacheMiss (IBusCachedPlugin_cache_io_cpu_decode_cacheMiss ), //o + .io_cpu_decode_error (IBusCachedPlugin_cache_io_cpu_decode_error ), //o + .io_cpu_decode_mmuRefilling (IBusCachedPlugin_cache_io_cpu_decode_mmuRefilling ), //o + .io_cpu_decode_mmuException (IBusCachedPlugin_cache_io_cpu_decode_mmuException ), //o + .io_cpu_decode_isUser (IBusCachedPlugin_cache_io_cpu_decode_isUser ), //i + .io_cpu_fill_valid (IBusCachedPlugin_cache_io_cpu_fill_valid ), //i + .io_cpu_fill_payload (IBusCachedPlugin_cache_io_cpu_decode_physicalAddress ), //i + .io_mem_cmd_valid (IBusCachedPlugin_cache_io_mem_cmd_valid ), //o + .io_mem_cmd_ready (iBus_cmd_ready ), //i + .io_mem_cmd_payload_address (IBusCachedPlugin_cache_io_mem_cmd_payload_address ), //o + .io_mem_cmd_payload_size (IBusCachedPlugin_cache_io_mem_cmd_payload_size ), //o + .io_mem_rsp_valid (iBus_rsp_valid ), //i + .io_mem_rsp_payload_data (iBus_rsp_payload_data ), //i + .io_mem_rsp_payload_error (iBus_rsp_payload_error ), //i + .clk (clk ), //i + .reset (reset ) //i + ); + `ifndef SYNTHESIS + always @(*) begin + case(decode_CfuPlugin_CFU_INPUT_2_KIND) + `Input2Kind_binary_sequential_RS : decode_CfuPlugin_CFU_INPUT_2_KIND_string = "RS "; + `Input2Kind_binary_sequential_IMM_I : decode_CfuPlugin_CFU_INPUT_2_KIND_string = "IMM_I"; + default : decode_CfuPlugin_CFU_INPUT_2_KIND_string = "?????"; + endcase + end + always @(*) begin + case(_zz_decode_CfuPlugin_CFU_INPUT_2_KIND) + `Input2Kind_binary_sequential_RS : _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_string = "RS "; + `Input2Kind_binary_sequential_IMM_I : _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_string = "IMM_I"; + default : _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_string = "?????"; + endcase + end + always @(*) begin + case(_zz_decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND) + `Input2Kind_binary_sequential_RS : _zz_decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND_string = "RS "; + `Input2Kind_binary_sequential_IMM_I : _zz_decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND_string = "IMM_I"; + default : _zz_decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND_string = "?????"; + endcase + end + always @(*) begin + case(_zz_decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND_1) + `Input2Kind_binary_sequential_RS : _zz_decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND_1_string = "RS "; + `Input2Kind_binary_sequential_IMM_I : _zz_decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND_1_string = "IMM_I"; + default : _zz_decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND_1_string = "?????"; + endcase + end + always @(*) begin + case(_zz_memory_to_writeBack_ENV_CTRL) + `EnvCtrlEnum_binary_sequential_NONE : _zz_memory_to_writeBack_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : _zz_memory_to_writeBack_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_binary_sequential_ECALL : _zz_memory_to_writeBack_ENV_CTRL_string = "ECALL"; + default : _zz_memory_to_writeBack_ENV_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(_zz_memory_to_writeBack_ENV_CTRL_1) + `EnvCtrlEnum_binary_sequential_NONE : _zz_memory_to_writeBack_ENV_CTRL_1_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : _zz_memory_to_writeBack_ENV_CTRL_1_string = "XRET "; + `EnvCtrlEnum_binary_sequential_ECALL : _zz_memory_to_writeBack_ENV_CTRL_1_string = "ECALL"; + default : _zz_memory_to_writeBack_ENV_CTRL_1_string = "?????"; + endcase + end + always @(*) begin + case(_zz_execute_to_memory_ENV_CTRL) + `EnvCtrlEnum_binary_sequential_NONE : _zz_execute_to_memory_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : _zz_execute_to_memory_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_binary_sequential_ECALL : _zz_execute_to_memory_ENV_CTRL_string = "ECALL"; + default : _zz_execute_to_memory_ENV_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(_zz_execute_to_memory_ENV_CTRL_1) + `EnvCtrlEnum_binary_sequential_NONE : _zz_execute_to_memory_ENV_CTRL_1_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : _zz_execute_to_memory_ENV_CTRL_1_string = "XRET "; + `EnvCtrlEnum_binary_sequential_ECALL : _zz_execute_to_memory_ENV_CTRL_1_string = "ECALL"; + default : _zz_execute_to_memory_ENV_CTRL_1_string = "?????"; + endcase + end + always @(*) begin + case(decode_ENV_CTRL) + `EnvCtrlEnum_binary_sequential_NONE : decode_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : decode_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_binary_sequential_ECALL : decode_ENV_CTRL_string = "ECALL"; + default : decode_ENV_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(_zz_decode_ENV_CTRL) + `EnvCtrlEnum_binary_sequential_NONE : _zz_decode_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : _zz_decode_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_binary_sequential_ECALL : _zz_decode_ENV_CTRL_string = "ECALL"; + default : _zz_decode_ENV_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(_zz_decode_to_execute_ENV_CTRL) + `EnvCtrlEnum_binary_sequential_NONE : _zz_decode_to_execute_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : _zz_decode_to_execute_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_binary_sequential_ECALL : _zz_decode_to_execute_ENV_CTRL_string = "ECALL"; + default : _zz_decode_to_execute_ENV_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(_zz_decode_to_execute_ENV_CTRL_1) + `EnvCtrlEnum_binary_sequential_NONE : _zz_decode_to_execute_ENV_CTRL_1_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : _zz_decode_to_execute_ENV_CTRL_1_string = "XRET "; + `EnvCtrlEnum_binary_sequential_ECALL : _zz_decode_to_execute_ENV_CTRL_1_string = "ECALL"; + default : _zz_decode_to_execute_ENV_CTRL_1_string = "?????"; + endcase + end + always @(*) begin + case(decode_BRANCH_CTRL) + `BranchCtrlEnum_binary_sequential_INC : decode_BRANCH_CTRL_string = "INC "; + `BranchCtrlEnum_binary_sequential_B : decode_BRANCH_CTRL_string = "B "; + `BranchCtrlEnum_binary_sequential_JAL : decode_BRANCH_CTRL_string = "JAL "; + `BranchCtrlEnum_binary_sequential_JALR : decode_BRANCH_CTRL_string = "JALR"; + default : decode_BRANCH_CTRL_string = "????"; + endcase + end + always @(*) begin + case(_zz_decode_BRANCH_CTRL) + `BranchCtrlEnum_binary_sequential_INC : _zz_decode_BRANCH_CTRL_string = "INC "; + `BranchCtrlEnum_binary_sequential_B : _zz_decode_BRANCH_CTRL_string = "B "; + `BranchCtrlEnum_binary_sequential_JAL : _zz_decode_BRANCH_CTRL_string = "JAL "; + `BranchCtrlEnum_binary_sequential_JALR : _zz_decode_BRANCH_CTRL_string = "JALR"; + default : _zz_decode_BRANCH_CTRL_string = "????"; + endcase + end + always @(*) begin + case(_zz_decode_to_execute_BRANCH_CTRL) + `BranchCtrlEnum_binary_sequential_INC : _zz_decode_to_execute_BRANCH_CTRL_string = "INC "; + `BranchCtrlEnum_binary_sequential_B : _zz_decode_to_execute_BRANCH_CTRL_string = "B "; + `BranchCtrlEnum_binary_sequential_JAL : _zz_decode_to_execute_BRANCH_CTRL_string = "JAL "; + `BranchCtrlEnum_binary_sequential_JALR : _zz_decode_to_execute_BRANCH_CTRL_string = "JALR"; + default : _zz_decode_to_execute_BRANCH_CTRL_string = "????"; + endcase + end + always @(*) begin + case(_zz_decode_to_execute_BRANCH_CTRL_1) + `BranchCtrlEnum_binary_sequential_INC : _zz_decode_to_execute_BRANCH_CTRL_1_string = "INC "; + `BranchCtrlEnum_binary_sequential_B : _zz_decode_to_execute_BRANCH_CTRL_1_string = "B "; + `BranchCtrlEnum_binary_sequential_JAL : _zz_decode_to_execute_BRANCH_CTRL_1_string = "JAL "; + `BranchCtrlEnum_binary_sequential_JALR : _zz_decode_to_execute_BRANCH_CTRL_1_string = "JALR"; + default : _zz_decode_to_execute_BRANCH_CTRL_1_string = "????"; + endcase + end + always @(*) begin + case(_zz_execute_to_memory_SHIFT_CTRL) + `ShiftCtrlEnum_binary_sequential_DISABLE_1 : _zz_execute_to_memory_SHIFT_CTRL_string = "DISABLE_1"; + `ShiftCtrlEnum_binary_sequential_SLL_1 : _zz_execute_to_memory_SHIFT_CTRL_string = "SLL_1 "; + `ShiftCtrlEnum_binary_sequential_SRL_1 : _zz_execute_to_memory_SHIFT_CTRL_string = "SRL_1 "; + `ShiftCtrlEnum_binary_sequential_SRA_1 : _zz_execute_to_memory_SHIFT_CTRL_string = "SRA_1 "; + default : _zz_execute_to_memory_SHIFT_CTRL_string = "?????????"; + endcase + end + always @(*) begin + case(_zz_execute_to_memory_SHIFT_CTRL_1) + `ShiftCtrlEnum_binary_sequential_DISABLE_1 : _zz_execute_to_memory_SHIFT_CTRL_1_string = "DISABLE_1"; + `ShiftCtrlEnum_binary_sequential_SLL_1 : _zz_execute_to_memory_SHIFT_CTRL_1_string = "SLL_1 "; + `ShiftCtrlEnum_binary_sequential_SRL_1 : _zz_execute_to_memory_SHIFT_CTRL_1_string = "SRL_1 "; + `ShiftCtrlEnum_binary_sequential_SRA_1 : _zz_execute_to_memory_SHIFT_CTRL_1_string = "SRA_1 "; + default : _zz_execute_to_memory_SHIFT_CTRL_1_string = "?????????"; + endcase + end + always @(*) begin + case(decode_SHIFT_CTRL) + `ShiftCtrlEnum_binary_sequential_DISABLE_1 : decode_SHIFT_CTRL_string = "DISABLE_1"; + `ShiftCtrlEnum_binary_sequential_SLL_1 : decode_SHIFT_CTRL_string = "SLL_1 "; + `ShiftCtrlEnum_binary_sequential_SRL_1 : decode_SHIFT_CTRL_string = "SRL_1 "; + `ShiftCtrlEnum_binary_sequential_SRA_1 : decode_SHIFT_CTRL_string = "SRA_1 "; + default : decode_SHIFT_CTRL_string = "?????????"; + endcase + end + always @(*) begin + case(_zz_decode_SHIFT_CTRL) + `ShiftCtrlEnum_binary_sequential_DISABLE_1 : _zz_decode_SHIFT_CTRL_string = "DISABLE_1"; + `ShiftCtrlEnum_binary_sequential_SLL_1 : _zz_decode_SHIFT_CTRL_string = "SLL_1 "; + `ShiftCtrlEnum_binary_sequential_SRL_1 : _zz_decode_SHIFT_CTRL_string = "SRL_1 "; + `ShiftCtrlEnum_binary_sequential_SRA_1 : _zz_decode_SHIFT_CTRL_string = "SRA_1 "; + default : _zz_decode_SHIFT_CTRL_string = "?????????"; + endcase + end + always @(*) begin + case(_zz_decode_to_execute_SHIFT_CTRL) + `ShiftCtrlEnum_binary_sequential_DISABLE_1 : _zz_decode_to_execute_SHIFT_CTRL_string = "DISABLE_1"; + `ShiftCtrlEnum_binary_sequential_SLL_1 : _zz_decode_to_execute_SHIFT_CTRL_string = "SLL_1 "; + `ShiftCtrlEnum_binary_sequential_SRL_1 : _zz_decode_to_execute_SHIFT_CTRL_string = "SRL_1 "; + `ShiftCtrlEnum_binary_sequential_SRA_1 : _zz_decode_to_execute_SHIFT_CTRL_string = "SRA_1 "; + default : _zz_decode_to_execute_SHIFT_CTRL_string = "?????????"; + endcase + end + always @(*) begin + case(_zz_decode_to_execute_SHIFT_CTRL_1) + `ShiftCtrlEnum_binary_sequential_DISABLE_1 : _zz_decode_to_execute_SHIFT_CTRL_1_string = "DISABLE_1"; + `ShiftCtrlEnum_binary_sequential_SLL_1 : _zz_decode_to_execute_SHIFT_CTRL_1_string = "SLL_1 "; + `ShiftCtrlEnum_binary_sequential_SRL_1 : _zz_decode_to_execute_SHIFT_CTRL_1_string = "SRL_1 "; + `ShiftCtrlEnum_binary_sequential_SRA_1 : _zz_decode_to_execute_SHIFT_CTRL_1_string = "SRA_1 "; + default : _zz_decode_to_execute_SHIFT_CTRL_1_string = "?????????"; + endcase + end + always @(*) begin + case(decode_ALU_BITWISE_CTRL) + `AluBitwiseCtrlEnum_binary_sequential_XOR_1 : decode_ALU_BITWISE_CTRL_string = "XOR_1"; + `AluBitwiseCtrlEnum_binary_sequential_OR_1 : decode_ALU_BITWISE_CTRL_string = "OR_1 "; + `AluBitwiseCtrlEnum_binary_sequential_AND_1 : decode_ALU_BITWISE_CTRL_string = "AND_1"; + default : decode_ALU_BITWISE_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(_zz_decode_ALU_BITWISE_CTRL) + `AluBitwiseCtrlEnum_binary_sequential_XOR_1 : _zz_decode_ALU_BITWISE_CTRL_string = "XOR_1"; + `AluBitwiseCtrlEnum_binary_sequential_OR_1 : _zz_decode_ALU_BITWISE_CTRL_string = "OR_1 "; + `AluBitwiseCtrlEnum_binary_sequential_AND_1 : _zz_decode_ALU_BITWISE_CTRL_string = "AND_1"; + default : _zz_decode_ALU_BITWISE_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(_zz_decode_to_execute_ALU_BITWISE_CTRL) + `AluBitwiseCtrlEnum_binary_sequential_XOR_1 : _zz_decode_to_execute_ALU_BITWISE_CTRL_string = "XOR_1"; + `AluBitwiseCtrlEnum_binary_sequential_OR_1 : _zz_decode_to_execute_ALU_BITWISE_CTRL_string = "OR_1 "; + `AluBitwiseCtrlEnum_binary_sequential_AND_1 : _zz_decode_to_execute_ALU_BITWISE_CTRL_string = "AND_1"; + default : _zz_decode_to_execute_ALU_BITWISE_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(_zz_decode_to_execute_ALU_BITWISE_CTRL_1) + `AluBitwiseCtrlEnum_binary_sequential_XOR_1 : _zz_decode_to_execute_ALU_BITWISE_CTRL_1_string = "XOR_1"; + `AluBitwiseCtrlEnum_binary_sequential_OR_1 : _zz_decode_to_execute_ALU_BITWISE_CTRL_1_string = "OR_1 "; + `AluBitwiseCtrlEnum_binary_sequential_AND_1 : _zz_decode_to_execute_ALU_BITWISE_CTRL_1_string = "AND_1"; + default : _zz_decode_to_execute_ALU_BITWISE_CTRL_1_string = "?????"; + endcase + end + always @(*) begin + case(decode_ALU_CTRL) + `AluCtrlEnum_binary_sequential_ADD_SUB : decode_ALU_CTRL_string = "ADD_SUB "; + `AluCtrlEnum_binary_sequential_SLT_SLTU : decode_ALU_CTRL_string = "SLT_SLTU"; + `AluCtrlEnum_binary_sequential_BITWISE : decode_ALU_CTRL_string = "BITWISE "; + default : decode_ALU_CTRL_string = "????????"; + endcase + end + always @(*) begin + case(_zz_decode_ALU_CTRL) + `AluCtrlEnum_binary_sequential_ADD_SUB : _zz_decode_ALU_CTRL_string = "ADD_SUB "; + `AluCtrlEnum_binary_sequential_SLT_SLTU : _zz_decode_ALU_CTRL_string = "SLT_SLTU"; + `AluCtrlEnum_binary_sequential_BITWISE : _zz_decode_ALU_CTRL_string = "BITWISE "; + default : _zz_decode_ALU_CTRL_string = "????????"; + endcase + end + always @(*) begin + case(_zz_decode_to_execute_ALU_CTRL) + `AluCtrlEnum_binary_sequential_ADD_SUB : _zz_decode_to_execute_ALU_CTRL_string = "ADD_SUB "; + `AluCtrlEnum_binary_sequential_SLT_SLTU : _zz_decode_to_execute_ALU_CTRL_string = "SLT_SLTU"; + `AluCtrlEnum_binary_sequential_BITWISE : _zz_decode_to_execute_ALU_CTRL_string = "BITWISE "; + default : _zz_decode_to_execute_ALU_CTRL_string = "????????"; + endcase + end + always @(*) begin + case(_zz_decode_to_execute_ALU_CTRL_1) + `AluCtrlEnum_binary_sequential_ADD_SUB : _zz_decode_to_execute_ALU_CTRL_1_string = "ADD_SUB "; + `AluCtrlEnum_binary_sequential_SLT_SLTU : _zz_decode_to_execute_ALU_CTRL_1_string = "SLT_SLTU"; + `AluCtrlEnum_binary_sequential_BITWISE : _zz_decode_to_execute_ALU_CTRL_1_string = "BITWISE "; + default : _zz_decode_to_execute_ALU_CTRL_1_string = "????????"; + endcase + end + always @(*) begin + case(decode_SRC2_CTRL) + `Src2CtrlEnum_binary_sequential_RS : decode_SRC2_CTRL_string = "RS "; + `Src2CtrlEnum_binary_sequential_IMI : decode_SRC2_CTRL_string = "IMI"; + `Src2CtrlEnum_binary_sequential_IMS : decode_SRC2_CTRL_string = "IMS"; + `Src2CtrlEnum_binary_sequential_PC : decode_SRC2_CTRL_string = "PC "; + default : decode_SRC2_CTRL_string = "???"; + endcase + end + always @(*) begin + case(_zz_decode_SRC2_CTRL) + `Src2CtrlEnum_binary_sequential_RS : _zz_decode_SRC2_CTRL_string = "RS "; + `Src2CtrlEnum_binary_sequential_IMI : _zz_decode_SRC2_CTRL_string = "IMI"; + `Src2CtrlEnum_binary_sequential_IMS : _zz_decode_SRC2_CTRL_string = "IMS"; + `Src2CtrlEnum_binary_sequential_PC : _zz_decode_SRC2_CTRL_string = "PC "; + default : _zz_decode_SRC2_CTRL_string = "???"; + endcase + end + always @(*) begin + case(_zz_decode_to_execute_SRC2_CTRL) + `Src2CtrlEnum_binary_sequential_RS : _zz_decode_to_execute_SRC2_CTRL_string = "RS "; + `Src2CtrlEnum_binary_sequential_IMI : _zz_decode_to_execute_SRC2_CTRL_string = "IMI"; + `Src2CtrlEnum_binary_sequential_IMS : _zz_decode_to_execute_SRC2_CTRL_string = "IMS"; + `Src2CtrlEnum_binary_sequential_PC : _zz_decode_to_execute_SRC2_CTRL_string = "PC "; + default : _zz_decode_to_execute_SRC2_CTRL_string = "???"; + endcase + end + always @(*) begin + case(_zz_decode_to_execute_SRC2_CTRL_1) + `Src2CtrlEnum_binary_sequential_RS : _zz_decode_to_execute_SRC2_CTRL_1_string = "RS "; + `Src2CtrlEnum_binary_sequential_IMI : _zz_decode_to_execute_SRC2_CTRL_1_string = "IMI"; + `Src2CtrlEnum_binary_sequential_IMS : _zz_decode_to_execute_SRC2_CTRL_1_string = "IMS"; + `Src2CtrlEnum_binary_sequential_PC : _zz_decode_to_execute_SRC2_CTRL_1_string = "PC "; + default : _zz_decode_to_execute_SRC2_CTRL_1_string = "???"; + endcase + end + always @(*) begin + case(decode_SRC1_CTRL) + `Src1CtrlEnum_binary_sequential_RS : decode_SRC1_CTRL_string = "RS "; + `Src1CtrlEnum_binary_sequential_IMU : decode_SRC1_CTRL_string = "IMU "; + `Src1CtrlEnum_binary_sequential_PC_INCREMENT : decode_SRC1_CTRL_string = "PC_INCREMENT"; + `Src1CtrlEnum_binary_sequential_URS1 : decode_SRC1_CTRL_string = "URS1 "; + default : decode_SRC1_CTRL_string = "????????????"; + endcase + end + always @(*) begin + case(_zz_decode_SRC1_CTRL) + `Src1CtrlEnum_binary_sequential_RS : _zz_decode_SRC1_CTRL_string = "RS "; + `Src1CtrlEnum_binary_sequential_IMU : _zz_decode_SRC1_CTRL_string = "IMU "; + `Src1CtrlEnum_binary_sequential_PC_INCREMENT : _zz_decode_SRC1_CTRL_string = "PC_INCREMENT"; + `Src1CtrlEnum_binary_sequential_URS1 : _zz_decode_SRC1_CTRL_string = "URS1 "; + default : _zz_decode_SRC1_CTRL_string = "????????????"; + endcase + end + always @(*) begin + case(_zz_decode_to_execute_SRC1_CTRL) + `Src1CtrlEnum_binary_sequential_RS : _zz_decode_to_execute_SRC1_CTRL_string = "RS "; + `Src1CtrlEnum_binary_sequential_IMU : _zz_decode_to_execute_SRC1_CTRL_string = "IMU "; + `Src1CtrlEnum_binary_sequential_PC_INCREMENT : _zz_decode_to_execute_SRC1_CTRL_string = "PC_INCREMENT"; + `Src1CtrlEnum_binary_sequential_URS1 : _zz_decode_to_execute_SRC1_CTRL_string = "URS1 "; + default : _zz_decode_to_execute_SRC1_CTRL_string = "????????????"; + endcase + end + always @(*) begin + case(_zz_decode_to_execute_SRC1_CTRL_1) + `Src1CtrlEnum_binary_sequential_RS : _zz_decode_to_execute_SRC1_CTRL_1_string = "RS "; + `Src1CtrlEnum_binary_sequential_IMU : _zz_decode_to_execute_SRC1_CTRL_1_string = "IMU "; + `Src1CtrlEnum_binary_sequential_PC_INCREMENT : _zz_decode_to_execute_SRC1_CTRL_1_string = "PC_INCREMENT"; + `Src1CtrlEnum_binary_sequential_URS1 : _zz_decode_to_execute_SRC1_CTRL_1_string = "URS1 "; + default : _zz_decode_to_execute_SRC1_CTRL_1_string = "????????????"; + endcase + end + always @(*) begin + case(execute_CfuPlugin_CFU_INPUT_2_KIND) + `Input2Kind_binary_sequential_RS : execute_CfuPlugin_CFU_INPUT_2_KIND_string = "RS "; + `Input2Kind_binary_sequential_IMM_I : execute_CfuPlugin_CFU_INPUT_2_KIND_string = "IMM_I"; + default : execute_CfuPlugin_CFU_INPUT_2_KIND_string = "?????"; + endcase + end + always @(*) begin + case(_zz_execute_CfuPlugin_CFU_INPUT_2_KIND) + `Input2Kind_binary_sequential_RS : _zz_execute_CfuPlugin_CFU_INPUT_2_KIND_string = "RS "; + `Input2Kind_binary_sequential_IMM_I : _zz_execute_CfuPlugin_CFU_INPUT_2_KIND_string = "IMM_I"; + default : _zz_execute_CfuPlugin_CFU_INPUT_2_KIND_string = "?????"; + endcase + end + always @(*) begin + case(memory_ENV_CTRL) + `EnvCtrlEnum_binary_sequential_NONE : memory_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : memory_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_binary_sequential_ECALL : memory_ENV_CTRL_string = "ECALL"; + default : memory_ENV_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(_zz_memory_ENV_CTRL) + `EnvCtrlEnum_binary_sequential_NONE : _zz_memory_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : _zz_memory_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_binary_sequential_ECALL : _zz_memory_ENV_CTRL_string = "ECALL"; + default : _zz_memory_ENV_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(execute_ENV_CTRL) + `EnvCtrlEnum_binary_sequential_NONE : execute_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : execute_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_binary_sequential_ECALL : execute_ENV_CTRL_string = "ECALL"; + default : execute_ENV_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(_zz_execute_ENV_CTRL) + `EnvCtrlEnum_binary_sequential_NONE : _zz_execute_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : _zz_execute_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_binary_sequential_ECALL : _zz_execute_ENV_CTRL_string = "ECALL"; + default : _zz_execute_ENV_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(writeBack_ENV_CTRL) + `EnvCtrlEnum_binary_sequential_NONE : writeBack_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : writeBack_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_binary_sequential_ECALL : writeBack_ENV_CTRL_string = "ECALL"; + default : writeBack_ENV_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(_zz_writeBack_ENV_CTRL) + `EnvCtrlEnum_binary_sequential_NONE : _zz_writeBack_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : _zz_writeBack_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_binary_sequential_ECALL : _zz_writeBack_ENV_CTRL_string = "ECALL"; + default : _zz_writeBack_ENV_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(execute_BRANCH_CTRL) + `BranchCtrlEnum_binary_sequential_INC : execute_BRANCH_CTRL_string = "INC "; + `BranchCtrlEnum_binary_sequential_B : execute_BRANCH_CTRL_string = "B "; + `BranchCtrlEnum_binary_sequential_JAL : execute_BRANCH_CTRL_string = "JAL "; + `BranchCtrlEnum_binary_sequential_JALR : execute_BRANCH_CTRL_string = "JALR"; + default : execute_BRANCH_CTRL_string = "????"; + endcase + end + always @(*) begin + case(_zz_execute_BRANCH_CTRL) + `BranchCtrlEnum_binary_sequential_INC : _zz_execute_BRANCH_CTRL_string = "INC "; + `BranchCtrlEnum_binary_sequential_B : _zz_execute_BRANCH_CTRL_string = "B "; + `BranchCtrlEnum_binary_sequential_JAL : _zz_execute_BRANCH_CTRL_string = "JAL "; + `BranchCtrlEnum_binary_sequential_JALR : _zz_execute_BRANCH_CTRL_string = "JALR"; + default : _zz_execute_BRANCH_CTRL_string = "????"; + endcase + end + always @(*) begin + case(memory_SHIFT_CTRL) + `ShiftCtrlEnum_binary_sequential_DISABLE_1 : memory_SHIFT_CTRL_string = "DISABLE_1"; + `ShiftCtrlEnum_binary_sequential_SLL_1 : memory_SHIFT_CTRL_string = "SLL_1 "; + `ShiftCtrlEnum_binary_sequential_SRL_1 : memory_SHIFT_CTRL_string = "SRL_1 "; + `ShiftCtrlEnum_binary_sequential_SRA_1 : memory_SHIFT_CTRL_string = "SRA_1 "; + default : memory_SHIFT_CTRL_string = "?????????"; + endcase + end + always @(*) begin + case(_zz_memory_SHIFT_CTRL) + `ShiftCtrlEnum_binary_sequential_DISABLE_1 : _zz_memory_SHIFT_CTRL_string = "DISABLE_1"; + `ShiftCtrlEnum_binary_sequential_SLL_1 : _zz_memory_SHIFT_CTRL_string = "SLL_1 "; + `ShiftCtrlEnum_binary_sequential_SRL_1 : _zz_memory_SHIFT_CTRL_string = "SRL_1 "; + `ShiftCtrlEnum_binary_sequential_SRA_1 : _zz_memory_SHIFT_CTRL_string = "SRA_1 "; + default : _zz_memory_SHIFT_CTRL_string = "?????????"; + endcase + end + always @(*) begin + case(execute_SHIFT_CTRL) + `ShiftCtrlEnum_binary_sequential_DISABLE_1 : execute_SHIFT_CTRL_string = "DISABLE_1"; + `ShiftCtrlEnum_binary_sequential_SLL_1 : execute_SHIFT_CTRL_string = "SLL_1 "; + `ShiftCtrlEnum_binary_sequential_SRL_1 : execute_SHIFT_CTRL_string = "SRL_1 "; + `ShiftCtrlEnum_binary_sequential_SRA_1 : execute_SHIFT_CTRL_string = "SRA_1 "; + default : execute_SHIFT_CTRL_string = "?????????"; + endcase + end + always @(*) begin + case(_zz_execute_SHIFT_CTRL) + `ShiftCtrlEnum_binary_sequential_DISABLE_1 : _zz_execute_SHIFT_CTRL_string = "DISABLE_1"; + `ShiftCtrlEnum_binary_sequential_SLL_1 : _zz_execute_SHIFT_CTRL_string = "SLL_1 "; + `ShiftCtrlEnum_binary_sequential_SRL_1 : _zz_execute_SHIFT_CTRL_string = "SRL_1 "; + `ShiftCtrlEnum_binary_sequential_SRA_1 : _zz_execute_SHIFT_CTRL_string = "SRA_1 "; + default : _zz_execute_SHIFT_CTRL_string = "?????????"; + endcase + end + always @(*) begin + case(execute_SRC2_CTRL) + `Src2CtrlEnum_binary_sequential_RS : execute_SRC2_CTRL_string = "RS "; + `Src2CtrlEnum_binary_sequential_IMI : execute_SRC2_CTRL_string = "IMI"; + `Src2CtrlEnum_binary_sequential_IMS : execute_SRC2_CTRL_string = "IMS"; + `Src2CtrlEnum_binary_sequential_PC : execute_SRC2_CTRL_string = "PC "; + default : execute_SRC2_CTRL_string = "???"; + endcase + end + always @(*) begin + case(_zz_execute_SRC2_CTRL) + `Src2CtrlEnum_binary_sequential_RS : _zz_execute_SRC2_CTRL_string = "RS "; + `Src2CtrlEnum_binary_sequential_IMI : _zz_execute_SRC2_CTRL_string = "IMI"; + `Src2CtrlEnum_binary_sequential_IMS : _zz_execute_SRC2_CTRL_string = "IMS"; + `Src2CtrlEnum_binary_sequential_PC : _zz_execute_SRC2_CTRL_string = "PC "; + default : _zz_execute_SRC2_CTRL_string = "???"; + endcase + end + always @(*) begin + case(execute_SRC1_CTRL) + `Src1CtrlEnum_binary_sequential_RS : execute_SRC1_CTRL_string = "RS "; + `Src1CtrlEnum_binary_sequential_IMU : execute_SRC1_CTRL_string = "IMU "; + `Src1CtrlEnum_binary_sequential_PC_INCREMENT : execute_SRC1_CTRL_string = "PC_INCREMENT"; + `Src1CtrlEnum_binary_sequential_URS1 : execute_SRC1_CTRL_string = "URS1 "; + default : execute_SRC1_CTRL_string = "????????????"; + endcase + end + always @(*) begin + case(_zz_execute_SRC1_CTRL) + `Src1CtrlEnum_binary_sequential_RS : _zz_execute_SRC1_CTRL_string = "RS "; + `Src1CtrlEnum_binary_sequential_IMU : _zz_execute_SRC1_CTRL_string = "IMU "; + `Src1CtrlEnum_binary_sequential_PC_INCREMENT : _zz_execute_SRC1_CTRL_string = "PC_INCREMENT"; + `Src1CtrlEnum_binary_sequential_URS1 : _zz_execute_SRC1_CTRL_string = "URS1 "; + default : _zz_execute_SRC1_CTRL_string = "????????????"; + endcase + end + always @(*) begin + case(execute_ALU_CTRL) + `AluCtrlEnum_binary_sequential_ADD_SUB : execute_ALU_CTRL_string = "ADD_SUB "; + `AluCtrlEnum_binary_sequential_SLT_SLTU : execute_ALU_CTRL_string = "SLT_SLTU"; + `AluCtrlEnum_binary_sequential_BITWISE : execute_ALU_CTRL_string = "BITWISE "; + default : execute_ALU_CTRL_string = "????????"; + endcase + end + always @(*) begin + case(_zz_execute_ALU_CTRL) + `AluCtrlEnum_binary_sequential_ADD_SUB : _zz_execute_ALU_CTRL_string = "ADD_SUB "; + `AluCtrlEnum_binary_sequential_SLT_SLTU : _zz_execute_ALU_CTRL_string = "SLT_SLTU"; + `AluCtrlEnum_binary_sequential_BITWISE : _zz_execute_ALU_CTRL_string = "BITWISE "; + default : _zz_execute_ALU_CTRL_string = "????????"; + endcase + end + always @(*) begin + case(execute_ALU_BITWISE_CTRL) + `AluBitwiseCtrlEnum_binary_sequential_XOR_1 : execute_ALU_BITWISE_CTRL_string = "XOR_1"; + `AluBitwiseCtrlEnum_binary_sequential_OR_1 : execute_ALU_BITWISE_CTRL_string = "OR_1 "; + `AluBitwiseCtrlEnum_binary_sequential_AND_1 : execute_ALU_BITWISE_CTRL_string = "AND_1"; + default : execute_ALU_BITWISE_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(_zz_execute_ALU_BITWISE_CTRL) + `AluBitwiseCtrlEnum_binary_sequential_XOR_1 : _zz_execute_ALU_BITWISE_CTRL_string = "XOR_1"; + `AluBitwiseCtrlEnum_binary_sequential_OR_1 : _zz_execute_ALU_BITWISE_CTRL_string = "OR_1 "; + `AluBitwiseCtrlEnum_binary_sequential_AND_1 : _zz_execute_ALU_BITWISE_CTRL_string = "AND_1"; + default : _zz_execute_ALU_BITWISE_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(_zz_decode_CfuPlugin_CFU_INPUT_2_KIND_1) + `Input2Kind_binary_sequential_RS : _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_1_string = "RS "; + `Input2Kind_binary_sequential_IMM_I : _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_1_string = "IMM_I"; + default : _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_1_string = "?????"; + endcase + end + always @(*) begin + case(_zz_decode_ENV_CTRL_1) + `EnvCtrlEnum_binary_sequential_NONE : _zz_decode_ENV_CTRL_1_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : _zz_decode_ENV_CTRL_1_string = "XRET "; + `EnvCtrlEnum_binary_sequential_ECALL : _zz_decode_ENV_CTRL_1_string = "ECALL"; + default : _zz_decode_ENV_CTRL_1_string = "?????"; + endcase + end + always @(*) begin + case(_zz_decode_BRANCH_CTRL_1) + `BranchCtrlEnum_binary_sequential_INC : _zz_decode_BRANCH_CTRL_1_string = "INC "; + `BranchCtrlEnum_binary_sequential_B : _zz_decode_BRANCH_CTRL_1_string = "B "; + `BranchCtrlEnum_binary_sequential_JAL : _zz_decode_BRANCH_CTRL_1_string = "JAL "; + `BranchCtrlEnum_binary_sequential_JALR : _zz_decode_BRANCH_CTRL_1_string = "JALR"; + default : _zz_decode_BRANCH_CTRL_1_string = "????"; + endcase + end + always @(*) begin + case(_zz_decode_SHIFT_CTRL_1) + `ShiftCtrlEnum_binary_sequential_DISABLE_1 : _zz_decode_SHIFT_CTRL_1_string = "DISABLE_1"; + `ShiftCtrlEnum_binary_sequential_SLL_1 : _zz_decode_SHIFT_CTRL_1_string = "SLL_1 "; + `ShiftCtrlEnum_binary_sequential_SRL_1 : _zz_decode_SHIFT_CTRL_1_string = "SRL_1 "; + `ShiftCtrlEnum_binary_sequential_SRA_1 : _zz_decode_SHIFT_CTRL_1_string = "SRA_1 "; + default : _zz_decode_SHIFT_CTRL_1_string = "?????????"; + endcase + end + always @(*) begin + case(_zz_decode_ALU_BITWISE_CTRL_1) + `AluBitwiseCtrlEnum_binary_sequential_XOR_1 : _zz_decode_ALU_BITWISE_CTRL_1_string = "XOR_1"; + `AluBitwiseCtrlEnum_binary_sequential_OR_1 : _zz_decode_ALU_BITWISE_CTRL_1_string = "OR_1 "; + `AluBitwiseCtrlEnum_binary_sequential_AND_1 : _zz_decode_ALU_BITWISE_CTRL_1_string = "AND_1"; + default : _zz_decode_ALU_BITWISE_CTRL_1_string = "?????"; + endcase + end + always @(*) begin + case(_zz_decode_ALU_CTRL_1) + `AluCtrlEnum_binary_sequential_ADD_SUB : _zz_decode_ALU_CTRL_1_string = "ADD_SUB "; + `AluCtrlEnum_binary_sequential_SLT_SLTU : _zz_decode_ALU_CTRL_1_string = "SLT_SLTU"; + `AluCtrlEnum_binary_sequential_BITWISE : _zz_decode_ALU_CTRL_1_string = "BITWISE "; + default : _zz_decode_ALU_CTRL_1_string = "????????"; + endcase + end + always @(*) begin + case(_zz_decode_SRC2_CTRL_1) + `Src2CtrlEnum_binary_sequential_RS : _zz_decode_SRC2_CTRL_1_string = "RS "; + `Src2CtrlEnum_binary_sequential_IMI : _zz_decode_SRC2_CTRL_1_string = "IMI"; + `Src2CtrlEnum_binary_sequential_IMS : _zz_decode_SRC2_CTRL_1_string = "IMS"; + `Src2CtrlEnum_binary_sequential_PC : _zz_decode_SRC2_CTRL_1_string = "PC "; + default : _zz_decode_SRC2_CTRL_1_string = "???"; + endcase + end + always @(*) begin + case(_zz_decode_SRC1_CTRL_1) + `Src1CtrlEnum_binary_sequential_RS : _zz_decode_SRC1_CTRL_1_string = "RS "; + `Src1CtrlEnum_binary_sequential_IMU : _zz_decode_SRC1_CTRL_1_string = "IMU "; + `Src1CtrlEnum_binary_sequential_PC_INCREMENT : _zz_decode_SRC1_CTRL_1_string = "PC_INCREMENT"; + `Src1CtrlEnum_binary_sequential_URS1 : _zz_decode_SRC1_CTRL_1_string = "URS1 "; + default : _zz_decode_SRC1_CTRL_1_string = "????????????"; + endcase + end + always @(*) begin + case(_zz_decode_SRC1_CTRL_2) + `Src1CtrlEnum_binary_sequential_RS : _zz_decode_SRC1_CTRL_2_string = "RS "; + `Src1CtrlEnum_binary_sequential_IMU : _zz_decode_SRC1_CTRL_2_string = "IMU "; + `Src1CtrlEnum_binary_sequential_PC_INCREMENT : _zz_decode_SRC1_CTRL_2_string = "PC_INCREMENT"; + `Src1CtrlEnum_binary_sequential_URS1 : _zz_decode_SRC1_CTRL_2_string = "URS1 "; + default : _zz_decode_SRC1_CTRL_2_string = "????????????"; + endcase + end + always @(*) begin + case(_zz_decode_SRC2_CTRL_2) + `Src2CtrlEnum_binary_sequential_RS : _zz_decode_SRC2_CTRL_2_string = "RS "; + `Src2CtrlEnum_binary_sequential_IMI : _zz_decode_SRC2_CTRL_2_string = "IMI"; + `Src2CtrlEnum_binary_sequential_IMS : _zz_decode_SRC2_CTRL_2_string = "IMS"; + `Src2CtrlEnum_binary_sequential_PC : _zz_decode_SRC2_CTRL_2_string = "PC "; + default : _zz_decode_SRC2_CTRL_2_string = "???"; + endcase + end + always @(*) begin + case(_zz_decode_ALU_CTRL_2) + `AluCtrlEnum_binary_sequential_ADD_SUB : _zz_decode_ALU_CTRL_2_string = "ADD_SUB "; + `AluCtrlEnum_binary_sequential_SLT_SLTU : _zz_decode_ALU_CTRL_2_string = "SLT_SLTU"; + `AluCtrlEnum_binary_sequential_BITWISE : _zz_decode_ALU_CTRL_2_string = "BITWISE "; + default : _zz_decode_ALU_CTRL_2_string = "????????"; + endcase + end + always @(*) begin + case(_zz_decode_ALU_BITWISE_CTRL_2) + `AluBitwiseCtrlEnum_binary_sequential_XOR_1 : _zz_decode_ALU_BITWISE_CTRL_2_string = "XOR_1"; + `AluBitwiseCtrlEnum_binary_sequential_OR_1 : _zz_decode_ALU_BITWISE_CTRL_2_string = "OR_1 "; + `AluBitwiseCtrlEnum_binary_sequential_AND_1 : _zz_decode_ALU_BITWISE_CTRL_2_string = "AND_1"; + default : _zz_decode_ALU_BITWISE_CTRL_2_string = "?????"; + endcase + end + always @(*) begin + case(_zz_decode_SHIFT_CTRL_2) + `ShiftCtrlEnum_binary_sequential_DISABLE_1 : _zz_decode_SHIFT_CTRL_2_string = "DISABLE_1"; + `ShiftCtrlEnum_binary_sequential_SLL_1 : _zz_decode_SHIFT_CTRL_2_string = "SLL_1 "; + `ShiftCtrlEnum_binary_sequential_SRL_1 : _zz_decode_SHIFT_CTRL_2_string = "SRL_1 "; + `ShiftCtrlEnum_binary_sequential_SRA_1 : _zz_decode_SHIFT_CTRL_2_string = "SRA_1 "; + default : _zz_decode_SHIFT_CTRL_2_string = "?????????"; + endcase + end + always @(*) begin + case(_zz_decode_BRANCH_CTRL_2) + `BranchCtrlEnum_binary_sequential_INC : _zz_decode_BRANCH_CTRL_2_string = "INC "; + `BranchCtrlEnum_binary_sequential_B : _zz_decode_BRANCH_CTRL_2_string = "B "; + `BranchCtrlEnum_binary_sequential_JAL : _zz_decode_BRANCH_CTRL_2_string = "JAL "; + `BranchCtrlEnum_binary_sequential_JALR : _zz_decode_BRANCH_CTRL_2_string = "JALR"; + default : _zz_decode_BRANCH_CTRL_2_string = "????"; + endcase + end + always @(*) begin + case(_zz_decode_ENV_CTRL_2) + `EnvCtrlEnum_binary_sequential_NONE : _zz_decode_ENV_CTRL_2_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : _zz_decode_ENV_CTRL_2_string = "XRET "; + `EnvCtrlEnum_binary_sequential_ECALL : _zz_decode_ENV_CTRL_2_string = "ECALL"; + default : _zz_decode_ENV_CTRL_2_string = "?????"; + endcase + end + always @(*) begin + case(_zz_decode_CfuPlugin_CFU_INPUT_2_KIND_8) + `Input2Kind_binary_sequential_RS : _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_8_string = "RS "; + `Input2Kind_binary_sequential_IMM_I : _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_8_string = "IMM_I"; + default : _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_8_string = "?????"; + endcase + end + always @(*) begin + case(decode_to_execute_SRC1_CTRL) + `Src1CtrlEnum_binary_sequential_RS : decode_to_execute_SRC1_CTRL_string = "RS "; + `Src1CtrlEnum_binary_sequential_IMU : decode_to_execute_SRC1_CTRL_string = "IMU "; + `Src1CtrlEnum_binary_sequential_PC_INCREMENT : decode_to_execute_SRC1_CTRL_string = "PC_INCREMENT"; + `Src1CtrlEnum_binary_sequential_URS1 : decode_to_execute_SRC1_CTRL_string = "URS1 "; + default : decode_to_execute_SRC1_CTRL_string = "????????????"; + endcase + end + always @(*) begin + case(decode_to_execute_SRC2_CTRL) + `Src2CtrlEnum_binary_sequential_RS : decode_to_execute_SRC2_CTRL_string = "RS "; + `Src2CtrlEnum_binary_sequential_IMI : decode_to_execute_SRC2_CTRL_string = "IMI"; + `Src2CtrlEnum_binary_sequential_IMS : decode_to_execute_SRC2_CTRL_string = "IMS"; + `Src2CtrlEnum_binary_sequential_PC : decode_to_execute_SRC2_CTRL_string = "PC "; + default : decode_to_execute_SRC2_CTRL_string = "???"; + endcase + end + always @(*) begin + case(decode_to_execute_ALU_CTRL) + `AluCtrlEnum_binary_sequential_ADD_SUB : decode_to_execute_ALU_CTRL_string = "ADD_SUB "; + `AluCtrlEnum_binary_sequential_SLT_SLTU : decode_to_execute_ALU_CTRL_string = "SLT_SLTU"; + `AluCtrlEnum_binary_sequential_BITWISE : decode_to_execute_ALU_CTRL_string = "BITWISE "; + default : decode_to_execute_ALU_CTRL_string = "????????"; + endcase + end + always @(*) begin + case(decode_to_execute_ALU_BITWISE_CTRL) + `AluBitwiseCtrlEnum_binary_sequential_XOR_1 : decode_to_execute_ALU_BITWISE_CTRL_string = "XOR_1"; + `AluBitwiseCtrlEnum_binary_sequential_OR_1 : decode_to_execute_ALU_BITWISE_CTRL_string = "OR_1 "; + `AluBitwiseCtrlEnum_binary_sequential_AND_1 : decode_to_execute_ALU_BITWISE_CTRL_string = "AND_1"; + default : decode_to_execute_ALU_BITWISE_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(decode_to_execute_SHIFT_CTRL) + `ShiftCtrlEnum_binary_sequential_DISABLE_1 : decode_to_execute_SHIFT_CTRL_string = "DISABLE_1"; + `ShiftCtrlEnum_binary_sequential_SLL_1 : decode_to_execute_SHIFT_CTRL_string = "SLL_1 "; + `ShiftCtrlEnum_binary_sequential_SRL_1 : decode_to_execute_SHIFT_CTRL_string = "SRL_1 "; + `ShiftCtrlEnum_binary_sequential_SRA_1 : decode_to_execute_SHIFT_CTRL_string = "SRA_1 "; + default : decode_to_execute_SHIFT_CTRL_string = "?????????"; + endcase + end + always @(*) begin + case(execute_to_memory_SHIFT_CTRL) + `ShiftCtrlEnum_binary_sequential_DISABLE_1 : execute_to_memory_SHIFT_CTRL_string = "DISABLE_1"; + `ShiftCtrlEnum_binary_sequential_SLL_1 : execute_to_memory_SHIFT_CTRL_string = "SLL_1 "; + `ShiftCtrlEnum_binary_sequential_SRL_1 : execute_to_memory_SHIFT_CTRL_string = "SRL_1 "; + `ShiftCtrlEnum_binary_sequential_SRA_1 : execute_to_memory_SHIFT_CTRL_string = "SRA_1 "; + default : execute_to_memory_SHIFT_CTRL_string = "?????????"; + endcase + end + always @(*) begin + case(decode_to_execute_BRANCH_CTRL) + `BranchCtrlEnum_binary_sequential_INC : decode_to_execute_BRANCH_CTRL_string = "INC "; + `BranchCtrlEnum_binary_sequential_B : decode_to_execute_BRANCH_CTRL_string = "B "; + `BranchCtrlEnum_binary_sequential_JAL : decode_to_execute_BRANCH_CTRL_string = "JAL "; + `BranchCtrlEnum_binary_sequential_JALR : decode_to_execute_BRANCH_CTRL_string = "JALR"; + default : decode_to_execute_BRANCH_CTRL_string = "????"; + endcase + end + always @(*) begin + case(decode_to_execute_ENV_CTRL) + `EnvCtrlEnum_binary_sequential_NONE : decode_to_execute_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : decode_to_execute_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_binary_sequential_ECALL : decode_to_execute_ENV_CTRL_string = "ECALL"; + default : decode_to_execute_ENV_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(execute_to_memory_ENV_CTRL) + `EnvCtrlEnum_binary_sequential_NONE : execute_to_memory_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : execute_to_memory_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_binary_sequential_ECALL : execute_to_memory_ENV_CTRL_string = "ECALL"; + default : execute_to_memory_ENV_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(memory_to_writeBack_ENV_CTRL) + `EnvCtrlEnum_binary_sequential_NONE : memory_to_writeBack_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : memory_to_writeBack_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_binary_sequential_ECALL : memory_to_writeBack_ENV_CTRL_string = "ECALL"; + default : memory_to_writeBack_ENV_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND) + `Input2Kind_binary_sequential_RS : decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND_string = "RS "; + `Input2Kind_binary_sequential_IMM_I : decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND_string = "IMM_I"; + default : decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND_string = "?????"; + endcase + end + `endif + + assign memory_MUL_LOW = ($signed(_zz_memory_MUL_LOW) + $signed(_zz_memory_MUL_LOW_7)); + assign memory_MEMORY_READ_DATA = dBus_rsp_data; + assign writeBack_CfuPlugin_CFU_IN_FLIGHT = memory_to_writeBack_CfuPlugin_CFU_IN_FLIGHT; + assign execute_CfuPlugin_CFU_IN_FLIGHT = ((execute_CfuPlugin_schedule || execute_CfuPlugin_hold) || execute_CfuPlugin_fired); + assign memory_MUL_HH = execute_to_memory_MUL_HH; + assign execute_MUL_HH = ($signed(execute_MulPlugin_aHigh) * $signed(execute_MulPlugin_bHigh)); + assign execute_MUL_HL = ($signed(execute_MulPlugin_aHigh) * $signed(execute_MulPlugin_bSLow)); + assign execute_MUL_LH = ($signed(execute_MulPlugin_aSLow) * $signed(execute_MulPlugin_bHigh)); + assign execute_MUL_LL = (execute_MulPlugin_aULow * execute_MulPlugin_bULow); + assign execute_SHIFT_RIGHT = _zz_execute_SHIFT_RIGHT; + assign writeBack_REGFILE_WRITE_DATA = memory_to_writeBack_REGFILE_WRITE_DATA; + assign memory_REGFILE_WRITE_DATA = execute_to_memory_REGFILE_WRITE_DATA; + assign execute_REGFILE_WRITE_DATA = _zz_execute_REGFILE_WRITE_DATA; + assign memory_MEMORY_ADDRESS_LOW = execute_to_memory_MEMORY_ADDRESS_LOW; + assign execute_MEMORY_ADDRESS_LOW = dBus_cmd_payload_address[1 : 0]; + assign decode_CSR_READ_OPCODE = (decode_INSTRUCTION[13 : 7] != 7'h20); + assign decode_CSR_WRITE_OPCODE = (! (((decode_INSTRUCTION[14 : 13] == 2'b01) && (decode_INSTRUCTION[19 : 15] == 5'h0)) || ((decode_INSTRUCTION[14 : 13] == 2'b11) && (decode_INSTRUCTION[19 : 15] == 5'h0)))); + assign decode_SRC2_FORCE_ZERO = (decode_SRC_ADD_ZERO && (! decode_SRC_USE_SUB_LESS)); + assign decode_RS2 = decode_RegFilePlugin_rs2Data; + assign decode_RS1 = decode_RegFilePlugin_rs1Data; + assign decode_CfuPlugin_CFU_INPUT_2_KIND = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND; + assign _zz_decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND = _zz_decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND_1; + assign decode_CfuPlugin_CFU_ENABLE = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[28]; + assign memory_IS_MUL = execute_to_memory_IS_MUL; + assign execute_IS_MUL = decode_to_execute_IS_MUL; + assign decode_IS_MUL = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[27]; + assign _zz_memory_to_writeBack_ENV_CTRL = _zz_memory_to_writeBack_ENV_CTRL_1; + assign _zz_execute_to_memory_ENV_CTRL = _zz_execute_to_memory_ENV_CTRL_1; + assign decode_ENV_CTRL = _zz_decode_ENV_CTRL; + assign _zz_decode_to_execute_ENV_CTRL = _zz_decode_to_execute_ENV_CTRL_1; + assign decode_IS_CSR = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[24]; + assign decode_BRANCH_CTRL = _zz_decode_BRANCH_CTRL; + assign _zz_decode_to_execute_BRANCH_CTRL = _zz_decode_to_execute_BRANCH_CTRL_1; + assign _zz_execute_to_memory_SHIFT_CTRL = _zz_execute_to_memory_SHIFT_CTRL_1; + assign decode_SHIFT_CTRL = _zz_decode_SHIFT_CTRL; + assign _zz_decode_to_execute_SHIFT_CTRL = _zz_decode_to_execute_SHIFT_CTRL_1; + assign decode_ALU_BITWISE_CTRL = _zz_decode_ALU_BITWISE_CTRL; + assign _zz_decode_to_execute_ALU_BITWISE_CTRL = _zz_decode_to_execute_ALU_BITWISE_CTRL_1; + assign decode_SRC_LESS_UNSIGNED = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[15]; + assign decode_ALU_CTRL = _zz_decode_ALU_CTRL; + assign _zz_decode_to_execute_ALU_CTRL = _zz_decode_to_execute_ALU_CTRL_1; + assign decode_MEMORY_STORE = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[11]; + assign execute_BYPASSABLE_MEMORY_STAGE = decode_to_execute_BYPASSABLE_MEMORY_STAGE; + assign decode_BYPASSABLE_MEMORY_STAGE = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[10]; + assign decode_BYPASSABLE_EXECUTE_STAGE = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[9]; + assign decode_SRC2_CTRL = _zz_decode_SRC2_CTRL; + assign _zz_decode_to_execute_SRC2_CTRL = _zz_decode_to_execute_SRC2_CTRL_1; + assign decode_MEMORY_ENABLE = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[4]; + assign decode_SRC1_CTRL = _zz_decode_SRC1_CTRL; + assign _zz_decode_to_execute_SRC1_CTRL = _zz_decode_to_execute_SRC1_CTRL_1; + assign writeBack_FORMAL_PC_NEXT = memory_to_writeBack_FORMAL_PC_NEXT; + assign memory_FORMAL_PC_NEXT = execute_to_memory_FORMAL_PC_NEXT; + assign execute_FORMAL_PC_NEXT = decode_to_execute_FORMAL_PC_NEXT; + assign decode_FORMAL_PC_NEXT = (decode_PC + 32'h00000004); + assign memory_PC = execute_to_memory_PC; + always @(*) begin + _zz_memory_to_writeBack_CfuPlugin_CFU_IN_FLIGHT = memory_CfuPlugin_CFU_IN_FLIGHT; + if(memory_arbitration_isStuck) begin + _zz_memory_to_writeBack_CfuPlugin_CFU_IN_FLIGHT = 1'b0; + end + end + + always @(*) begin + _zz_execute_to_memory_CfuPlugin_CFU_IN_FLIGHT = execute_CfuPlugin_CFU_IN_FLIGHT; + if(execute_arbitration_isStuck) begin + _zz_execute_to_memory_CfuPlugin_CFU_IN_FLIGHT = 1'b0; + end + end + + assign memory_CfuPlugin_CFU_IN_FLIGHT = execute_to_memory_CfuPlugin_CFU_IN_FLIGHT; + assign execute_CfuPlugin_CFU_INPUT_2_KIND = _zz_execute_CfuPlugin_CFU_INPUT_2_KIND; + assign execute_CfuPlugin_CFU_ENABLE = decode_to_execute_CfuPlugin_CFU_ENABLE; + assign writeBack_IS_MUL = memory_to_writeBack_IS_MUL; + assign writeBack_MUL_HH = memory_to_writeBack_MUL_HH; + assign writeBack_MUL_LOW = memory_to_writeBack_MUL_LOW; + assign memory_MUL_HL = execute_to_memory_MUL_HL; + assign memory_MUL_LH = execute_to_memory_MUL_LH; + assign memory_MUL_LL = execute_to_memory_MUL_LL; + always @(*) begin + _zz_execute_to_memory_REGFILE_WRITE_DATA = execute_REGFILE_WRITE_DATA; + if(when_CsrPlugin_l1176) begin + _zz_execute_to_memory_REGFILE_WRITE_DATA = CsrPlugin_csrMapping_readDataSignal; + end + end + + assign execute_CSR_READ_OPCODE = decode_to_execute_CSR_READ_OPCODE; + assign execute_CSR_WRITE_OPCODE = decode_to_execute_CSR_WRITE_OPCODE; + assign execute_IS_CSR = decode_to_execute_IS_CSR; + assign memory_ENV_CTRL = _zz_memory_ENV_CTRL; + assign execute_ENV_CTRL = _zz_execute_ENV_CTRL; + assign writeBack_ENV_CTRL = _zz_writeBack_ENV_CTRL; + assign execute_BRANCH_CALC = {execute_BranchPlugin_branchAdder[31 : 1],1'b0}; + assign execute_BRANCH_DO = _zz_execute_BRANCH_DO_1; + assign execute_PC = decode_to_execute_PC; + assign execute_RS1 = decode_to_execute_RS1; + assign execute_BRANCH_CTRL = _zz_execute_BRANCH_CTRL; + assign decode_RS2_USE = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[12]; + assign decode_RS1_USE = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[5]; + assign execute_REGFILE_WRITE_VALID = decode_to_execute_REGFILE_WRITE_VALID; + assign execute_BYPASSABLE_EXECUTE_STAGE = decode_to_execute_BYPASSABLE_EXECUTE_STAGE; + assign memory_REGFILE_WRITE_VALID = execute_to_memory_REGFILE_WRITE_VALID; + assign memory_INSTRUCTION = execute_to_memory_INSTRUCTION; + assign memory_BYPASSABLE_MEMORY_STAGE = execute_to_memory_BYPASSABLE_MEMORY_STAGE; + assign writeBack_REGFILE_WRITE_VALID = memory_to_writeBack_REGFILE_WRITE_VALID; + assign memory_SHIFT_RIGHT = execute_to_memory_SHIFT_RIGHT; + always @(*) begin + _zz_memory_to_writeBack_REGFILE_WRITE_DATA = memory_REGFILE_WRITE_DATA; + if(memory_arbitration_isValid) begin + case(memory_SHIFT_CTRL) + `ShiftCtrlEnum_binary_sequential_SLL_1 : begin + _zz_memory_to_writeBack_REGFILE_WRITE_DATA = _zz_memory_to_writeBack_REGFILE_WRITE_DATA_1; + end + `ShiftCtrlEnum_binary_sequential_SRL_1, `ShiftCtrlEnum_binary_sequential_SRA_1 : begin + _zz_memory_to_writeBack_REGFILE_WRITE_DATA = memory_SHIFT_RIGHT; + end + default : begin + end + endcase + end + if(memory_CfuPlugin_CFU_IN_FLIGHT) begin + _zz_memory_to_writeBack_REGFILE_WRITE_DATA = CfuPlugin_bus_rsp_rsp_payload_outputs_0; + end + end + + assign memory_SHIFT_CTRL = _zz_memory_SHIFT_CTRL; + assign execute_SHIFT_CTRL = _zz_execute_SHIFT_CTRL; + assign execute_SRC_LESS_UNSIGNED = decode_to_execute_SRC_LESS_UNSIGNED; + assign execute_SRC2_FORCE_ZERO = decode_to_execute_SRC2_FORCE_ZERO; + assign execute_SRC_USE_SUB_LESS = decode_to_execute_SRC_USE_SUB_LESS; + assign _zz_execute_SRC2 = execute_PC; + assign execute_SRC2_CTRL = _zz_execute_SRC2_CTRL; + assign execute_SRC1_CTRL = _zz_execute_SRC1_CTRL; + assign decode_SRC_USE_SUB_LESS = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[3]; + assign decode_SRC_ADD_ZERO = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[18]; + assign execute_SRC_ADD_SUB = execute_SrcPlugin_addSub; + assign execute_SRC_LESS = execute_SrcPlugin_less; + assign execute_ALU_CTRL = _zz_execute_ALU_CTRL; + assign execute_SRC2 = _zz_execute_SRC2_5; + assign execute_SRC1 = _zz_execute_SRC1; + assign execute_ALU_BITWISE_CTRL = _zz_execute_ALU_BITWISE_CTRL; + assign _zz_lastStageRegFileWrite_payload_address = writeBack_INSTRUCTION; + assign _zz_lastStageRegFileWrite_valid = writeBack_REGFILE_WRITE_VALID; + always @(*) begin + _zz_1 = 1'b0; + if(lastStageRegFileWrite_valid) begin + _zz_1 = 1'b1; + end + end + + assign decode_INSTRUCTION_ANTICIPATED = (decode_arbitration_isStuck ? decode_INSTRUCTION : IBusCachedPlugin_cache_io_cpu_fetch_data); + always @(*) begin + decode_REGFILE_WRITE_VALID = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[8]; + if(when_RegFilePlugin_l63) begin + decode_REGFILE_WRITE_VALID = 1'b0; + end + end + + assign decode_LEGAL_INSTRUCTION = ({((decode_INSTRUCTION & 32'h0000005f) == 32'h00000017),{((decode_INSTRUCTION & 32'h0000007f) == 32'h0000006f),{((decode_INSTRUCTION & 32'h0000007f) == 32'h0000000b),{((decode_INSTRUCTION & _zz_decode_LEGAL_INSTRUCTION) == 32'h00000003),{(_zz_decode_LEGAL_INSTRUCTION_1 == _zz_decode_LEGAL_INSTRUCTION_2),{_zz_decode_LEGAL_INSTRUCTION_3,{_zz_decode_LEGAL_INSTRUCTION_4,_zz_decode_LEGAL_INSTRUCTION_5}}}}}}} != 22'h0); + assign writeBack_MEMORY_STORE = memory_to_writeBack_MEMORY_STORE; + always @(*) begin + _zz_lastStageRegFileWrite_payload_data = writeBack_REGFILE_WRITE_DATA; + if(when_DBusSimplePlugin_l558) begin + _zz_lastStageRegFileWrite_payload_data = writeBack_DBusSimplePlugin_rspFormated; + end + if(when_MulPlugin_l147) begin + case(switch_MulPlugin_l148) + 2'b00 : begin + _zz_lastStageRegFileWrite_payload_data = _zz__zz_lastStageRegFileWrite_payload_data; + end + default : begin + _zz_lastStageRegFileWrite_payload_data = _zz__zz_lastStageRegFileWrite_payload_data_1; + end + endcase + end + end + + assign writeBack_MEMORY_ENABLE = memory_to_writeBack_MEMORY_ENABLE; + assign writeBack_MEMORY_ADDRESS_LOW = memory_to_writeBack_MEMORY_ADDRESS_LOW; + assign writeBack_MEMORY_READ_DATA = memory_to_writeBack_MEMORY_READ_DATA; + assign memory_MEMORY_STORE = execute_to_memory_MEMORY_STORE; + assign memory_MEMORY_ENABLE = execute_to_memory_MEMORY_ENABLE; + assign execute_SRC_ADD = execute_SrcPlugin_addSub; + assign execute_RS2 = decode_to_execute_RS2; + assign execute_INSTRUCTION = decode_to_execute_INSTRUCTION; + assign execute_MEMORY_STORE = decode_to_execute_MEMORY_STORE; + assign execute_MEMORY_ENABLE = decode_to_execute_MEMORY_ENABLE; + assign execute_ALIGNEMENT_FAULT = 1'b0; + assign decode_FLUSH_ALL = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[0]; + always @(*) begin + IBusCachedPlugin_rsp_issueDetected_2 = IBusCachedPlugin_rsp_issueDetected_1; + if(when_IBusCachedPlugin_l250) begin + IBusCachedPlugin_rsp_issueDetected_2 = 1'b1; + end + end + + always @(*) begin + IBusCachedPlugin_rsp_issueDetected_1 = IBusCachedPlugin_rsp_issueDetected; + if(when_IBusCachedPlugin_l239) begin + IBusCachedPlugin_rsp_issueDetected_1 = 1'b1; + end + end + + assign decode_INSTRUCTION = IBusCachedPlugin_iBusRsp_output_payload_rsp_inst; + always @(*) begin + _zz_execute_to_memory_FORMAL_PC_NEXT = execute_FORMAL_PC_NEXT; + if(BranchPlugin_jumpInterface_valid) begin + _zz_execute_to_memory_FORMAL_PC_NEXT = BranchPlugin_jumpInterface_payload; + end + end + + assign decode_PC = IBusCachedPlugin_iBusRsp_output_payload_pc; + assign writeBack_PC = memory_to_writeBack_PC; + assign writeBack_INSTRUCTION = memory_to_writeBack_INSTRUCTION; + assign decode_arbitration_haltItself = 1'b0; + always @(*) begin + decode_arbitration_haltByOther = 1'b0; + if(when_HazardSimplePlugin_l113) begin + decode_arbitration_haltByOther = 1'b1; + end + if(CsrPlugin_pipelineLiberator_active) begin + decode_arbitration_haltByOther = 1'b1; + end + if(when_CsrPlugin_l1116) begin + decode_arbitration_haltByOther = 1'b1; + end + end + + always @(*) begin + decode_arbitration_removeIt = 1'b0; + if(decodeExceptionPort_valid) begin + decode_arbitration_removeIt = 1'b1; + end + if(decode_arbitration_isFlushed) begin + decode_arbitration_removeIt = 1'b1; + end + end + + assign decode_arbitration_flushIt = 1'b0; + always @(*) begin + decode_arbitration_flushNext = 1'b0; + if(decodeExceptionPort_valid) begin + decode_arbitration_flushNext = 1'b1; + end + end + + always @(*) begin + execute_arbitration_haltItself = 1'b0; + if(when_DBusSimplePlugin_l426) begin + execute_arbitration_haltItself = 1'b1; + end + if(when_CsrPlugin_l1180) begin + if(execute_CsrPlugin_blockedBySideEffects) begin + execute_arbitration_haltItself = 1'b1; + end + end + if(when_CfuPlugin_l175) begin + execute_arbitration_haltItself = 1'b1; + end + end + + assign execute_arbitration_haltByOther = 1'b0; + always @(*) begin + execute_arbitration_removeIt = 1'b0; + if(CsrPlugin_selfException_valid) begin + execute_arbitration_removeIt = 1'b1; + end + if(execute_arbitration_isFlushed) begin + execute_arbitration_removeIt = 1'b1; + end + end + + assign execute_arbitration_flushIt = 1'b0; + always @(*) begin + execute_arbitration_flushNext = 1'b0; + if(BranchPlugin_jumpInterface_valid) begin + execute_arbitration_flushNext = 1'b1; + end + if(CsrPlugin_selfException_valid) begin + execute_arbitration_flushNext = 1'b1; + end + end + + always @(*) begin + memory_arbitration_haltItself = 1'b0; + if(when_DBusSimplePlugin_l479) begin + memory_arbitration_haltItself = 1'b1; + end + if(memory_CfuPlugin_CFU_IN_FLIGHT) begin + if(when_CfuPlugin_l208) begin + memory_arbitration_haltItself = 1'b1; + end + end + end + + assign memory_arbitration_haltByOther = 1'b0; + always @(*) begin + memory_arbitration_removeIt = 1'b0; + if(memory_arbitration_isFlushed) begin + memory_arbitration_removeIt = 1'b1; + end + end + + assign memory_arbitration_flushIt = 1'b0; + assign memory_arbitration_flushNext = 1'b0; + assign writeBack_arbitration_haltItself = 1'b0; + assign writeBack_arbitration_haltByOther = 1'b0; + always @(*) begin + writeBack_arbitration_removeIt = 1'b0; + if(writeBack_arbitration_isFlushed) begin + writeBack_arbitration_removeIt = 1'b1; + end + end + + assign writeBack_arbitration_flushIt = 1'b0; + always @(*) begin + writeBack_arbitration_flushNext = 1'b0; + if(when_CsrPlugin_l1019) begin + writeBack_arbitration_flushNext = 1'b1; + end + if(when_CsrPlugin_l1064) begin + writeBack_arbitration_flushNext = 1'b1; + end + end + + assign lastStageInstruction = writeBack_INSTRUCTION; + assign lastStagePc = writeBack_PC; + assign lastStageIsValid = writeBack_arbitration_isValid; + assign lastStageIsFiring = writeBack_arbitration_isFiring; + always @(*) begin + IBusCachedPlugin_fetcherHalt = 1'b0; + if(when_CsrPlugin_l922) begin + IBusCachedPlugin_fetcherHalt = 1'b1; + end + if(when_CsrPlugin_l1019) begin + IBusCachedPlugin_fetcherHalt = 1'b1; + end + if(when_CsrPlugin_l1064) begin + IBusCachedPlugin_fetcherHalt = 1'b1; + end + end + + always @(*) begin + IBusCachedPlugin_incomingInstruction = 1'b0; + if(when_Fetcher_l240) begin + IBusCachedPlugin_incomingInstruction = 1'b1; + end + end + + assign CsrPlugin_csrMapping_allowCsrSignal = 1'b0; + assign CsrPlugin_csrMapping_readDataSignal = CsrPlugin_csrMapping_readDataInit; + assign CsrPlugin_inWfi = 1'b0; + assign CsrPlugin_thirdPartyWake = 1'b0; + always @(*) begin + CsrPlugin_jumpInterface_valid = 1'b0; + if(when_CsrPlugin_l1019) begin + CsrPlugin_jumpInterface_valid = 1'b1; + end + if(when_CsrPlugin_l1064) begin + CsrPlugin_jumpInterface_valid = 1'b1; + end + end + + always @(*) begin + CsrPlugin_jumpInterface_payload = 32'bxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx; + if(when_CsrPlugin_l1019) begin + CsrPlugin_jumpInterface_payload = {CsrPlugin_xtvec_base,2'b00}; + end + if(when_CsrPlugin_l1064) begin + case(switch_CsrPlugin_l1068) + 2'b11 : begin + CsrPlugin_jumpInterface_payload = CsrPlugin_mepc; + end + default : begin + end + endcase + end + end + + assign CsrPlugin_forceMachineWire = 1'b0; + assign CsrPlugin_allowInterrupts = 1'b1; + assign CsrPlugin_allowException = 1'b1; + assign CsrPlugin_allowEbreakException = 1'b1; + assign IBusCachedPlugin_externalFlush = ({writeBack_arbitration_flushNext,{memory_arbitration_flushNext,{execute_arbitration_flushNext,decode_arbitration_flushNext}}} != 4'b0000); + assign IBusCachedPlugin_jump_pcLoad_valid = ({CsrPlugin_jumpInterface_valid,BranchPlugin_jumpInterface_valid} != 2'b00); + assign _zz_IBusCachedPlugin_jump_pcLoad_payload = {BranchPlugin_jumpInterface_valid,CsrPlugin_jumpInterface_valid}; + assign IBusCachedPlugin_jump_pcLoad_payload = (_zz_IBusCachedPlugin_jump_pcLoad_payload_1[0] ? CsrPlugin_jumpInterface_payload : BranchPlugin_jumpInterface_payload); + always @(*) begin + IBusCachedPlugin_fetchPc_correction = 1'b0; + if(IBusCachedPlugin_fetchPc_redo_valid) begin + IBusCachedPlugin_fetchPc_correction = 1'b1; + end + if(IBusCachedPlugin_jump_pcLoad_valid) begin + IBusCachedPlugin_fetchPc_correction = 1'b1; + end + end + + assign IBusCachedPlugin_fetchPc_output_fire = (IBusCachedPlugin_fetchPc_output_valid && IBusCachedPlugin_fetchPc_output_ready); + assign IBusCachedPlugin_fetchPc_corrected = (IBusCachedPlugin_fetchPc_correction || IBusCachedPlugin_fetchPc_correctionReg); + always @(*) begin + IBusCachedPlugin_fetchPc_pcRegPropagate = 1'b0; + if(IBusCachedPlugin_iBusRsp_stages_1_input_ready) begin + IBusCachedPlugin_fetchPc_pcRegPropagate = 1'b1; + end + end + + assign when_Fetcher_l131 = (IBusCachedPlugin_fetchPc_correction || IBusCachedPlugin_fetchPc_pcRegPropagate); + assign IBusCachedPlugin_fetchPc_output_fire_1 = (IBusCachedPlugin_fetchPc_output_valid && IBusCachedPlugin_fetchPc_output_ready); + assign when_Fetcher_l131_1 = ((! IBusCachedPlugin_fetchPc_output_valid) && IBusCachedPlugin_fetchPc_output_ready); + always @(*) begin + IBusCachedPlugin_fetchPc_pc = (IBusCachedPlugin_fetchPc_pcReg + _zz_IBusCachedPlugin_fetchPc_pc); + if(IBusCachedPlugin_fetchPc_redo_valid) begin + IBusCachedPlugin_fetchPc_pc = IBusCachedPlugin_fetchPc_redo_payload; + end + if(IBusCachedPlugin_jump_pcLoad_valid) begin + IBusCachedPlugin_fetchPc_pc = IBusCachedPlugin_jump_pcLoad_payload; + end + IBusCachedPlugin_fetchPc_pc[0] = 1'b0; + IBusCachedPlugin_fetchPc_pc[1] = 1'b0; + end + + always @(*) begin + IBusCachedPlugin_fetchPc_flushed = 1'b0; + if(IBusCachedPlugin_fetchPc_redo_valid) begin + IBusCachedPlugin_fetchPc_flushed = 1'b1; + end + if(IBusCachedPlugin_jump_pcLoad_valid) begin + IBusCachedPlugin_fetchPc_flushed = 1'b1; + end + end + + assign when_Fetcher_l158 = (IBusCachedPlugin_fetchPc_booted && ((IBusCachedPlugin_fetchPc_output_ready || IBusCachedPlugin_fetchPc_correction) || IBusCachedPlugin_fetchPc_pcRegPropagate)); + assign IBusCachedPlugin_fetchPc_output_valid = ((! IBusCachedPlugin_fetcherHalt) && IBusCachedPlugin_fetchPc_booted); + assign IBusCachedPlugin_fetchPc_output_payload = IBusCachedPlugin_fetchPc_pc; + always @(*) begin + IBusCachedPlugin_iBusRsp_redoFetch = 1'b0; + if(IBusCachedPlugin_rsp_redoFetch) begin + IBusCachedPlugin_iBusRsp_redoFetch = 1'b1; + end + end + + assign IBusCachedPlugin_iBusRsp_stages_0_input_valid = IBusCachedPlugin_fetchPc_output_valid; + assign IBusCachedPlugin_fetchPc_output_ready = IBusCachedPlugin_iBusRsp_stages_0_input_ready; + assign IBusCachedPlugin_iBusRsp_stages_0_input_payload = IBusCachedPlugin_fetchPc_output_payload; + always @(*) begin + IBusCachedPlugin_iBusRsp_stages_0_halt = 1'b0; + if(IBusCachedPlugin_cache_io_cpu_prefetch_haltIt) begin + IBusCachedPlugin_iBusRsp_stages_0_halt = 1'b1; + end + end + + assign _zz_IBusCachedPlugin_iBusRsp_stages_0_input_ready = (! IBusCachedPlugin_iBusRsp_stages_0_halt); + assign IBusCachedPlugin_iBusRsp_stages_0_input_ready = (IBusCachedPlugin_iBusRsp_stages_0_output_ready && _zz_IBusCachedPlugin_iBusRsp_stages_0_input_ready); + assign IBusCachedPlugin_iBusRsp_stages_0_output_valid = (IBusCachedPlugin_iBusRsp_stages_0_input_valid && _zz_IBusCachedPlugin_iBusRsp_stages_0_input_ready); + assign IBusCachedPlugin_iBusRsp_stages_0_output_payload = IBusCachedPlugin_iBusRsp_stages_0_input_payload; + always @(*) begin + IBusCachedPlugin_iBusRsp_stages_1_halt = 1'b0; + if(IBusCachedPlugin_mmuBus_busy) begin + IBusCachedPlugin_iBusRsp_stages_1_halt = 1'b1; + end + end + + assign _zz_IBusCachedPlugin_iBusRsp_stages_1_input_ready = (! IBusCachedPlugin_iBusRsp_stages_1_halt); + assign IBusCachedPlugin_iBusRsp_stages_1_input_ready = (IBusCachedPlugin_iBusRsp_stages_1_output_ready && _zz_IBusCachedPlugin_iBusRsp_stages_1_input_ready); + assign IBusCachedPlugin_iBusRsp_stages_1_output_valid = (IBusCachedPlugin_iBusRsp_stages_1_input_valid && _zz_IBusCachedPlugin_iBusRsp_stages_1_input_ready); + assign IBusCachedPlugin_iBusRsp_stages_1_output_payload = IBusCachedPlugin_iBusRsp_stages_1_input_payload; + always @(*) begin + IBusCachedPlugin_iBusRsp_stages_2_halt = 1'b0; + if(when_IBusCachedPlugin_l267) begin + IBusCachedPlugin_iBusRsp_stages_2_halt = 1'b1; + end + end + + assign _zz_IBusCachedPlugin_iBusRsp_stages_2_input_ready = (! IBusCachedPlugin_iBusRsp_stages_2_halt); + assign IBusCachedPlugin_iBusRsp_stages_2_input_ready = (IBusCachedPlugin_iBusRsp_stages_2_output_ready && _zz_IBusCachedPlugin_iBusRsp_stages_2_input_ready); + assign IBusCachedPlugin_iBusRsp_stages_2_output_valid = (IBusCachedPlugin_iBusRsp_stages_2_input_valid && _zz_IBusCachedPlugin_iBusRsp_stages_2_input_ready); + assign IBusCachedPlugin_iBusRsp_stages_2_output_payload = IBusCachedPlugin_iBusRsp_stages_2_input_payload; + assign IBusCachedPlugin_fetchPc_redo_valid = IBusCachedPlugin_iBusRsp_redoFetch; + assign IBusCachedPlugin_fetchPc_redo_payload = IBusCachedPlugin_iBusRsp_stages_2_input_payload; + assign IBusCachedPlugin_iBusRsp_flush = ((decode_arbitration_removeIt || (decode_arbitration_flushNext && (! decode_arbitration_isStuck))) || IBusCachedPlugin_iBusRsp_redoFetch); + assign IBusCachedPlugin_iBusRsp_stages_0_output_ready = _zz_IBusCachedPlugin_iBusRsp_stages_0_output_ready; + assign _zz_IBusCachedPlugin_iBusRsp_stages_0_output_ready = ((1'b0 && (! _zz_IBusCachedPlugin_iBusRsp_stages_0_output_ready_1)) || IBusCachedPlugin_iBusRsp_stages_1_input_ready); + assign _zz_IBusCachedPlugin_iBusRsp_stages_0_output_ready_1 = _zz_IBusCachedPlugin_iBusRsp_stages_0_output_ready_2; + assign IBusCachedPlugin_iBusRsp_stages_1_input_valid = _zz_IBusCachedPlugin_iBusRsp_stages_0_output_ready_1; + assign IBusCachedPlugin_iBusRsp_stages_1_input_payload = IBusCachedPlugin_fetchPc_pcReg; + assign IBusCachedPlugin_iBusRsp_stages_1_output_ready = ((1'b0 && (! IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_valid)) || IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_ready); + assign IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_valid = _zz_IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_valid; + assign IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_payload = _zz_IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_payload; + assign IBusCachedPlugin_iBusRsp_stages_2_input_valid = IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_valid; + assign IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_ready = IBusCachedPlugin_iBusRsp_stages_2_input_ready; + assign IBusCachedPlugin_iBusRsp_stages_2_input_payload = IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_payload; + always @(*) begin + IBusCachedPlugin_iBusRsp_readyForError = 1'b1; + if(when_Fetcher_l320) begin + IBusCachedPlugin_iBusRsp_readyForError = 1'b0; + end + end + + assign when_Fetcher_l240 = (IBusCachedPlugin_iBusRsp_stages_1_input_valid || IBusCachedPlugin_iBusRsp_stages_2_input_valid); + assign when_Fetcher_l320 = (! IBusCachedPlugin_pcValids_0); + assign when_Fetcher_l329 = (! (! IBusCachedPlugin_iBusRsp_stages_1_input_ready)); + assign when_Fetcher_l329_1 = (! (! IBusCachedPlugin_iBusRsp_stages_2_input_ready)); + assign when_Fetcher_l329_2 = (! execute_arbitration_isStuck); + assign when_Fetcher_l329_3 = (! memory_arbitration_isStuck); + assign when_Fetcher_l329_4 = (! writeBack_arbitration_isStuck); + assign IBusCachedPlugin_pcValids_0 = IBusCachedPlugin_injector_nextPcCalc_valids_1; + assign IBusCachedPlugin_pcValids_1 = IBusCachedPlugin_injector_nextPcCalc_valids_2; + assign IBusCachedPlugin_pcValids_2 = IBusCachedPlugin_injector_nextPcCalc_valids_3; + assign IBusCachedPlugin_pcValids_3 = IBusCachedPlugin_injector_nextPcCalc_valids_4; + assign IBusCachedPlugin_iBusRsp_output_ready = (! decode_arbitration_isStuck); + assign decode_arbitration_isValid = IBusCachedPlugin_iBusRsp_output_valid; + assign iBus_cmd_valid = IBusCachedPlugin_cache_io_mem_cmd_valid; + always @(*) begin + iBus_cmd_payload_address = IBusCachedPlugin_cache_io_mem_cmd_payload_address; + iBus_cmd_payload_address = IBusCachedPlugin_cache_io_mem_cmd_payload_address; + end + + assign iBus_cmd_payload_size = IBusCachedPlugin_cache_io_mem_cmd_payload_size; + assign IBusCachedPlugin_s0_tightlyCoupledHit = 1'b0; + assign IBusCachedPlugin_cache_io_cpu_prefetch_isValid = (IBusCachedPlugin_iBusRsp_stages_0_input_valid && (! IBusCachedPlugin_s0_tightlyCoupledHit)); + assign IBusCachedPlugin_cache_io_cpu_fetch_isValid = (IBusCachedPlugin_iBusRsp_stages_1_input_valid && (! IBusCachedPlugin_s1_tightlyCoupledHit)); + assign IBusCachedPlugin_cache_io_cpu_fetch_isStuck = (! IBusCachedPlugin_iBusRsp_stages_1_input_ready); + assign IBusCachedPlugin_mmuBus_cmd_0_isValid = IBusCachedPlugin_cache_io_cpu_fetch_isValid; + assign IBusCachedPlugin_mmuBus_cmd_0_isStuck = (! IBusCachedPlugin_iBusRsp_stages_1_input_ready); + assign IBusCachedPlugin_mmuBus_cmd_0_virtualAddress = IBusCachedPlugin_iBusRsp_stages_1_input_payload; + assign IBusCachedPlugin_mmuBus_cmd_0_bypassTranslation = 1'b0; + assign IBusCachedPlugin_mmuBus_end = (IBusCachedPlugin_iBusRsp_stages_1_input_ready || IBusCachedPlugin_externalFlush); + assign IBusCachedPlugin_cache_io_cpu_decode_isValid = (IBusCachedPlugin_iBusRsp_stages_2_input_valid && (! IBusCachedPlugin_s2_tightlyCoupledHit)); + assign IBusCachedPlugin_cache_io_cpu_decode_isStuck = (! IBusCachedPlugin_iBusRsp_stages_2_input_ready); + assign IBusCachedPlugin_cache_io_cpu_decode_isUser = (CsrPlugin_privilege == 2'b00); + assign IBusCachedPlugin_rsp_iBusRspOutputHalt = 1'b0; + assign IBusCachedPlugin_rsp_issueDetected = 1'b0; + always @(*) begin + IBusCachedPlugin_rsp_redoFetch = 1'b0; + if(when_IBusCachedPlugin_l239) begin + IBusCachedPlugin_rsp_redoFetch = 1'b1; + end + if(when_IBusCachedPlugin_l250) begin + IBusCachedPlugin_rsp_redoFetch = 1'b1; + end + end + + always @(*) begin + IBusCachedPlugin_cache_io_cpu_fill_valid = (IBusCachedPlugin_rsp_redoFetch && (! IBusCachedPlugin_cache_io_cpu_decode_mmuRefilling)); + if(when_IBusCachedPlugin_l250) begin + IBusCachedPlugin_cache_io_cpu_fill_valid = 1'b1; + end + end + + assign when_IBusCachedPlugin_l239 = ((IBusCachedPlugin_cache_io_cpu_decode_isValid && IBusCachedPlugin_cache_io_cpu_decode_mmuRefilling) && (! IBusCachedPlugin_rsp_issueDetected)); + assign when_IBusCachedPlugin_l250 = ((IBusCachedPlugin_cache_io_cpu_decode_isValid && IBusCachedPlugin_cache_io_cpu_decode_cacheMiss) && (! IBusCachedPlugin_rsp_issueDetected_1)); + assign when_IBusCachedPlugin_l267 = (IBusCachedPlugin_rsp_issueDetected_2 || IBusCachedPlugin_rsp_iBusRspOutputHalt); + assign IBusCachedPlugin_iBusRsp_output_valid = IBusCachedPlugin_iBusRsp_stages_2_output_valid; + assign IBusCachedPlugin_iBusRsp_stages_2_output_ready = IBusCachedPlugin_iBusRsp_output_ready; + assign IBusCachedPlugin_iBusRsp_output_payload_rsp_inst = IBusCachedPlugin_cache_io_cpu_decode_data; + assign IBusCachedPlugin_iBusRsp_output_payload_pc = IBusCachedPlugin_iBusRsp_stages_2_output_payload; + assign IBusCachedPlugin_cache_io_flush = (decode_arbitration_isValid && decode_FLUSH_ALL); + assign _zz_dBus_cmd_valid = 1'b0; + always @(*) begin + execute_DBusSimplePlugin_skipCmd = 1'b0; + if(execute_ALIGNEMENT_FAULT) begin + execute_DBusSimplePlugin_skipCmd = 1'b1; + end + end + + assign dBus_cmd_valid = (((((execute_arbitration_isValid && execute_MEMORY_ENABLE) && (! execute_arbitration_isStuckByOthers)) && (! execute_arbitration_isFlushed)) && (! execute_DBusSimplePlugin_skipCmd)) && (! _zz_dBus_cmd_valid)); + assign dBus_cmd_payload_wr = execute_MEMORY_STORE; + assign dBus_cmd_payload_size = execute_INSTRUCTION[13 : 12]; + always @(*) begin + case(dBus_cmd_payload_size) + 2'b00 : begin + _zz_dBus_cmd_payload_data = {{{execute_RS2[7 : 0],execute_RS2[7 : 0]},execute_RS2[7 : 0]},execute_RS2[7 : 0]}; + end + 2'b01 : begin + _zz_dBus_cmd_payload_data = {execute_RS2[15 : 0],execute_RS2[15 : 0]}; + end + default : begin + _zz_dBus_cmd_payload_data = execute_RS2[31 : 0]; + end + endcase + end + + assign dBus_cmd_payload_data = _zz_dBus_cmd_payload_data; + assign when_DBusSimplePlugin_l426 = ((((execute_arbitration_isValid && execute_MEMORY_ENABLE) && (! dBus_cmd_ready)) && (! execute_DBusSimplePlugin_skipCmd)) && (! _zz_dBus_cmd_valid)); + always @(*) begin + case(dBus_cmd_payload_size) + 2'b00 : begin + _zz_execute_DBusSimplePlugin_formalMask = 4'b0001; + end + 2'b01 : begin + _zz_execute_DBusSimplePlugin_formalMask = 4'b0011; + end + default : begin + _zz_execute_DBusSimplePlugin_formalMask = 4'b1111; + end + endcase + end + + assign execute_DBusSimplePlugin_formalMask = (_zz_execute_DBusSimplePlugin_formalMask <<< dBus_cmd_payload_address[1 : 0]); + assign dBus_cmd_payload_address = execute_SRC_ADD; + assign when_DBusSimplePlugin_l479 = (((memory_arbitration_isValid && memory_MEMORY_ENABLE) && (! memory_MEMORY_STORE)) && ((! dBus_rsp_ready) || 1'b0)); + always @(*) begin + writeBack_DBusSimplePlugin_rspShifted = writeBack_MEMORY_READ_DATA; + case(writeBack_MEMORY_ADDRESS_LOW) + 2'b01 : begin + writeBack_DBusSimplePlugin_rspShifted[7 : 0] = writeBack_MEMORY_READ_DATA[15 : 8]; + end + 2'b10 : begin + writeBack_DBusSimplePlugin_rspShifted[15 : 0] = writeBack_MEMORY_READ_DATA[31 : 16]; + end + 2'b11 : begin + writeBack_DBusSimplePlugin_rspShifted[7 : 0] = writeBack_MEMORY_READ_DATA[31 : 24]; + end + default : begin + end + endcase + end + + assign switch_Misc_l200 = writeBack_INSTRUCTION[13 : 12]; + assign _zz_writeBack_DBusSimplePlugin_rspFormated = (writeBack_DBusSimplePlugin_rspShifted[7] && (! writeBack_INSTRUCTION[14])); + always @(*) begin + _zz_writeBack_DBusSimplePlugin_rspFormated_1[31] = _zz_writeBack_DBusSimplePlugin_rspFormated; + _zz_writeBack_DBusSimplePlugin_rspFormated_1[30] = _zz_writeBack_DBusSimplePlugin_rspFormated; + _zz_writeBack_DBusSimplePlugin_rspFormated_1[29] = _zz_writeBack_DBusSimplePlugin_rspFormated; + _zz_writeBack_DBusSimplePlugin_rspFormated_1[28] = _zz_writeBack_DBusSimplePlugin_rspFormated; + _zz_writeBack_DBusSimplePlugin_rspFormated_1[27] = _zz_writeBack_DBusSimplePlugin_rspFormated; + _zz_writeBack_DBusSimplePlugin_rspFormated_1[26] = _zz_writeBack_DBusSimplePlugin_rspFormated; + _zz_writeBack_DBusSimplePlugin_rspFormated_1[25] = _zz_writeBack_DBusSimplePlugin_rspFormated; + _zz_writeBack_DBusSimplePlugin_rspFormated_1[24] = _zz_writeBack_DBusSimplePlugin_rspFormated; + _zz_writeBack_DBusSimplePlugin_rspFormated_1[23] = _zz_writeBack_DBusSimplePlugin_rspFormated; + _zz_writeBack_DBusSimplePlugin_rspFormated_1[22] = _zz_writeBack_DBusSimplePlugin_rspFormated; + _zz_writeBack_DBusSimplePlugin_rspFormated_1[21] = _zz_writeBack_DBusSimplePlugin_rspFormated; + _zz_writeBack_DBusSimplePlugin_rspFormated_1[20] = _zz_writeBack_DBusSimplePlugin_rspFormated; + _zz_writeBack_DBusSimplePlugin_rspFormated_1[19] = _zz_writeBack_DBusSimplePlugin_rspFormated; + _zz_writeBack_DBusSimplePlugin_rspFormated_1[18] = _zz_writeBack_DBusSimplePlugin_rspFormated; + _zz_writeBack_DBusSimplePlugin_rspFormated_1[17] = _zz_writeBack_DBusSimplePlugin_rspFormated; + _zz_writeBack_DBusSimplePlugin_rspFormated_1[16] = _zz_writeBack_DBusSimplePlugin_rspFormated; + _zz_writeBack_DBusSimplePlugin_rspFormated_1[15] = _zz_writeBack_DBusSimplePlugin_rspFormated; + _zz_writeBack_DBusSimplePlugin_rspFormated_1[14] = _zz_writeBack_DBusSimplePlugin_rspFormated; + _zz_writeBack_DBusSimplePlugin_rspFormated_1[13] = _zz_writeBack_DBusSimplePlugin_rspFormated; + _zz_writeBack_DBusSimplePlugin_rspFormated_1[12] = _zz_writeBack_DBusSimplePlugin_rspFormated; + _zz_writeBack_DBusSimplePlugin_rspFormated_1[11] = _zz_writeBack_DBusSimplePlugin_rspFormated; + _zz_writeBack_DBusSimplePlugin_rspFormated_1[10] = _zz_writeBack_DBusSimplePlugin_rspFormated; + _zz_writeBack_DBusSimplePlugin_rspFormated_1[9] = _zz_writeBack_DBusSimplePlugin_rspFormated; + _zz_writeBack_DBusSimplePlugin_rspFormated_1[8] = _zz_writeBack_DBusSimplePlugin_rspFormated; + _zz_writeBack_DBusSimplePlugin_rspFormated_1[7 : 0] = writeBack_DBusSimplePlugin_rspShifted[7 : 0]; + end + + assign _zz_writeBack_DBusSimplePlugin_rspFormated_2 = (writeBack_DBusSimplePlugin_rspShifted[15] && (! writeBack_INSTRUCTION[14])); + always @(*) begin + _zz_writeBack_DBusSimplePlugin_rspFormated_3[31] = _zz_writeBack_DBusSimplePlugin_rspFormated_2; + _zz_writeBack_DBusSimplePlugin_rspFormated_3[30] = _zz_writeBack_DBusSimplePlugin_rspFormated_2; + _zz_writeBack_DBusSimplePlugin_rspFormated_3[29] = _zz_writeBack_DBusSimplePlugin_rspFormated_2; + _zz_writeBack_DBusSimplePlugin_rspFormated_3[28] = _zz_writeBack_DBusSimplePlugin_rspFormated_2; + _zz_writeBack_DBusSimplePlugin_rspFormated_3[27] = _zz_writeBack_DBusSimplePlugin_rspFormated_2; + _zz_writeBack_DBusSimplePlugin_rspFormated_3[26] = _zz_writeBack_DBusSimplePlugin_rspFormated_2; + _zz_writeBack_DBusSimplePlugin_rspFormated_3[25] = _zz_writeBack_DBusSimplePlugin_rspFormated_2; + _zz_writeBack_DBusSimplePlugin_rspFormated_3[24] = _zz_writeBack_DBusSimplePlugin_rspFormated_2; + _zz_writeBack_DBusSimplePlugin_rspFormated_3[23] = _zz_writeBack_DBusSimplePlugin_rspFormated_2; + _zz_writeBack_DBusSimplePlugin_rspFormated_3[22] = _zz_writeBack_DBusSimplePlugin_rspFormated_2; + _zz_writeBack_DBusSimplePlugin_rspFormated_3[21] = _zz_writeBack_DBusSimplePlugin_rspFormated_2; + _zz_writeBack_DBusSimplePlugin_rspFormated_3[20] = _zz_writeBack_DBusSimplePlugin_rspFormated_2; + _zz_writeBack_DBusSimplePlugin_rspFormated_3[19] = _zz_writeBack_DBusSimplePlugin_rspFormated_2; + _zz_writeBack_DBusSimplePlugin_rspFormated_3[18] = _zz_writeBack_DBusSimplePlugin_rspFormated_2; + _zz_writeBack_DBusSimplePlugin_rspFormated_3[17] = _zz_writeBack_DBusSimplePlugin_rspFormated_2; + _zz_writeBack_DBusSimplePlugin_rspFormated_3[16] = _zz_writeBack_DBusSimplePlugin_rspFormated_2; + _zz_writeBack_DBusSimplePlugin_rspFormated_3[15 : 0] = writeBack_DBusSimplePlugin_rspShifted[15 : 0]; + end + + always @(*) begin + case(switch_Misc_l200) + 2'b00 : begin + writeBack_DBusSimplePlugin_rspFormated = _zz_writeBack_DBusSimplePlugin_rspFormated_1; + end + 2'b01 : begin + writeBack_DBusSimplePlugin_rspFormated = _zz_writeBack_DBusSimplePlugin_rspFormated_3; + end + default : begin + writeBack_DBusSimplePlugin_rspFormated = writeBack_DBusSimplePlugin_rspShifted; + end + endcase + end + + assign when_DBusSimplePlugin_l558 = (writeBack_arbitration_isValid && writeBack_MEMORY_ENABLE); + assign IBusCachedPlugin_mmuBus_rsp_physicalAddress = IBusCachedPlugin_mmuBus_cmd_0_virtualAddress; + assign IBusCachedPlugin_mmuBus_rsp_allowRead = 1'b1; + assign IBusCachedPlugin_mmuBus_rsp_allowWrite = 1'b1; + assign IBusCachedPlugin_mmuBus_rsp_allowExecute = 1'b1; + assign IBusCachedPlugin_mmuBus_rsp_isIoAccess = IBusCachedPlugin_mmuBus_rsp_physicalAddress[31]; + assign IBusCachedPlugin_mmuBus_rsp_isPaging = 1'b0; + assign IBusCachedPlugin_mmuBus_rsp_exception = 1'b0; + assign IBusCachedPlugin_mmuBus_rsp_refilling = 1'b0; + assign IBusCachedPlugin_mmuBus_busy = 1'b0; + assign _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_3 = ((decode_INSTRUCTION & 32'h00004050) == 32'h00004050); + assign _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_4 = ((decode_INSTRUCTION & 32'h00006004) == 32'h00002000); + assign _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_5 = ((decode_INSTRUCTION & 32'h00000004) == 32'h00000004); + assign _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_6 = ((decode_INSTRUCTION & 32'h00000048) == 32'h00000048); + assign _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_7 = ((decode_INSTRUCTION & 32'h0000000c) == 32'h00000008); + assign _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2 = {1'b0,{(_zz_decode_CfuPlugin_CFU_INPUT_2_KIND_7 != 1'b0),{((_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2 == _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_1) != 1'b0),{(_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_2 != 1'b0),{(_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_3 != _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_4),{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_5,{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_10,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_12}}}}}}}; + assign _zz_decode_SRC1_CTRL_2 = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[2 : 1]; + assign _zz_decode_SRC1_CTRL_1 = _zz_decode_SRC1_CTRL_2; + assign _zz_decode_SRC2_CTRL_2 = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[7 : 6]; + assign _zz_decode_SRC2_CTRL_1 = _zz_decode_SRC2_CTRL_2; + assign _zz_decode_ALU_CTRL_2 = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[14 : 13]; + assign _zz_decode_ALU_CTRL_1 = _zz_decode_ALU_CTRL_2; + assign _zz_decode_ALU_BITWISE_CTRL_2 = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[17 : 16]; + assign _zz_decode_ALU_BITWISE_CTRL_1 = _zz_decode_ALU_BITWISE_CTRL_2; + assign _zz_decode_SHIFT_CTRL_2 = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[20 : 19]; + assign _zz_decode_SHIFT_CTRL_1 = _zz_decode_SHIFT_CTRL_2; + assign _zz_decode_BRANCH_CTRL_2 = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[23 : 22]; + assign _zz_decode_BRANCH_CTRL_1 = _zz_decode_BRANCH_CTRL_2; + assign _zz_decode_ENV_CTRL_2 = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[26 : 25]; + assign _zz_decode_ENV_CTRL_1 = _zz_decode_ENV_CTRL_2; + assign _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_8 = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[29 : 29]; + assign _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_1 = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_8; + assign decodeExceptionPort_valid = (decode_arbitration_isValid && (! decode_LEGAL_INSTRUCTION)); + assign decodeExceptionPort_payload_code = 4'b0010; + assign decodeExceptionPort_payload_badAddr = decode_INSTRUCTION; + assign when_RegFilePlugin_l63 = (decode_INSTRUCTION[11 : 7] == 5'h0); + assign decode_RegFilePlugin_regFileReadAddress1 = decode_INSTRUCTION_ANTICIPATED[19 : 15]; + assign decode_RegFilePlugin_regFileReadAddress2 = decode_INSTRUCTION_ANTICIPATED[24 : 20]; + assign decode_RegFilePlugin_rs1Data = _zz_RegFilePlugin_regFile_port0; + assign decode_RegFilePlugin_rs2Data = _zz_RegFilePlugin_regFile_port1; + always @(*) begin + lastStageRegFileWrite_valid = (_zz_lastStageRegFileWrite_valid && writeBack_arbitration_isFiring); + if(_zz_2) begin + lastStageRegFileWrite_valid = 1'b1; + end + end + + always @(*) begin + lastStageRegFileWrite_payload_address = _zz_lastStageRegFileWrite_payload_address[11 : 7]; + if(_zz_2) begin + lastStageRegFileWrite_payload_address = 5'h0; + end + end + + always @(*) begin + lastStageRegFileWrite_payload_data = _zz_lastStageRegFileWrite_payload_data; + if(_zz_2) begin + lastStageRegFileWrite_payload_data = 32'h0; + end + end + + always @(*) begin + case(execute_ALU_BITWISE_CTRL) + `AluBitwiseCtrlEnum_binary_sequential_AND_1 : begin + execute_IntAluPlugin_bitwise = (execute_SRC1 & execute_SRC2); + end + `AluBitwiseCtrlEnum_binary_sequential_OR_1 : begin + execute_IntAluPlugin_bitwise = (execute_SRC1 | execute_SRC2); + end + default : begin + execute_IntAluPlugin_bitwise = (execute_SRC1 ^ execute_SRC2); + end + endcase + end + + always @(*) begin + case(execute_ALU_CTRL) + `AluCtrlEnum_binary_sequential_BITWISE : begin + _zz_execute_REGFILE_WRITE_DATA = execute_IntAluPlugin_bitwise; + end + `AluCtrlEnum_binary_sequential_SLT_SLTU : begin + _zz_execute_REGFILE_WRITE_DATA = {31'd0, _zz__zz_execute_REGFILE_WRITE_DATA}; + end + default : begin + _zz_execute_REGFILE_WRITE_DATA = execute_SRC_ADD_SUB; + end + endcase + end + + always @(*) begin + case(execute_SRC1_CTRL) + `Src1CtrlEnum_binary_sequential_RS : begin + _zz_execute_SRC1 = execute_RS1; + end + `Src1CtrlEnum_binary_sequential_PC_INCREMENT : begin + _zz_execute_SRC1 = {29'd0, _zz__zz_execute_SRC1}; + end + `Src1CtrlEnum_binary_sequential_IMU : begin + _zz_execute_SRC1 = {execute_INSTRUCTION[31 : 12],12'h0}; + end + default : begin + _zz_execute_SRC1 = {27'd0, _zz__zz_execute_SRC1_1}; + end + endcase + end + + assign _zz_execute_SRC2_1 = execute_INSTRUCTION[31]; + always @(*) begin + _zz_execute_SRC2_2[19] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[18] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[17] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[16] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[15] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[14] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[13] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[12] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[11] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[10] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[9] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[8] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[7] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[6] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[5] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[4] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[3] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[2] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[1] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[0] = _zz_execute_SRC2_1; + end + + assign _zz_execute_SRC2_3 = _zz__zz_execute_SRC2_3[11]; + always @(*) begin + _zz_execute_SRC2_4[19] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[18] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[17] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[16] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[15] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[14] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[13] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[12] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[11] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[10] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[9] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[8] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[7] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[6] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[5] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[4] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[3] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[2] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[1] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[0] = _zz_execute_SRC2_3; + end + + always @(*) begin + case(execute_SRC2_CTRL) + `Src2CtrlEnum_binary_sequential_RS : begin + _zz_execute_SRC2_5 = execute_RS2; + end + `Src2CtrlEnum_binary_sequential_IMI : begin + _zz_execute_SRC2_5 = {_zz_execute_SRC2_2,execute_INSTRUCTION[31 : 20]}; + end + `Src2CtrlEnum_binary_sequential_IMS : begin + _zz_execute_SRC2_5 = {_zz_execute_SRC2_4,{execute_INSTRUCTION[31 : 25],execute_INSTRUCTION[11 : 7]}}; + end + default : begin + _zz_execute_SRC2_5 = _zz_execute_SRC2; + end + endcase + end + + always @(*) begin + execute_SrcPlugin_addSub = _zz_execute_SrcPlugin_addSub; + if(execute_SRC2_FORCE_ZERO) begin + execute_SrcPlugin_addSub = execute_SRC1; + end + end + + assign execute_SrcPlugin_less = ((execute_SRC1[31] == execute_SRC2[31]) ? execute_SrcPlugin_addSub[31] : (execute_SRC_LESS_UNSIGNED ? execute_SRC2[31] : execute_SRC1[31])); + assign execute_FullBarrelShifterPlugin_amplitude = execute_SRC2[4 : 0]; + always @(*) begin + _zz_execute_FullBarrelShifterPlugin_reversed[0] = execute_SRC1[31]; + _zz_execute_FullBarrelShifterPlugin_reversed[1] = execute_SRC1[30]; + _zz_execute_FullBarrelShifterPlugin_reversed[2] = execute_SRC1[29]; + _zz_execute_FullBarrelShifterPlugin_reversed[3] = execute_SRC1[28]; + _zz_execute_FullBarrelShifterPlugin_reversed[4] = execute_SRC1[27]; + _zz_execute_FullBarrelShifterPlugin_reversed[5] = execute_SRC1[26]; + _zz_execute_FullBarrelShifterPlugin_reversed[6] = execute_SRC1[25]; + _zz_execute_FullBarrelShifterPlugin_reversed[7] = execute_SRC1[24]; + _zz_execute_FullBarrelShifterPlugin_reversed[8] = execute_SRC1[23]; + _zz_execute_FullBarrelShifterPlugin_reversed[9] = execute_SRC1[22]; + _zz_execute_FullBarrelShifterPlugin_reversed[10] = execute_SRC1[21]; + _zz_execute_FullBarrelShifterPlugin_reversed[11] = execute_SRC1[20]; + _zz_execute_FullBarrelShifterPlugin_reversed[12] = execute_SRC1[19]; + _zz_execute_FullBarrelShifterPlugin_reversed[13] = execute_SRC1[18]; + _zz_execute_FullBarrelShifterPlugin_reversed[14] = execute_SRC1[17]; + _zz_execute_FullBarrelShifterPlugin_reversed[15] = execute_SRC1[16]; + _zz_execute_FullBarrelShifterPlugin_reversed[16] = execute_SRC1[15]; + _zz_execute_FullBarrelShifterPlugin_reversed[17] = execute_SRC1[14]; + _zz_execute_FullBarrelShifterPlugin_reversed[18] = execute_SRC1[13]; + _zz_execute_FullBarrelShifterPlugin_reversed[19] = execute_SRC1[12]; + _zz_execute_FullBarrelShifterPlugin_reversed[20] = execute_SRC1[11]; + _zz_execute_FullBarrelShifterPlugin_reversed[21] = execute_SRC1[10]; + _zz_execute_FullBarrelShifterPlugin_reversed[22] = execute_SRC1[9]; + _zz_execute_FullBarrelShifterPlugin_reversed[23] = execute_SRC1[8]; + _zz_execute_FullBarrelShifterPlugin_reversed[24] = execute_SRC1[7]; + _zz_execute_FullBarrelShifterPlugin_reversed[25] = execute_SRC1[6]; + _zz_execute_FullBarrelShifterPlugin_reversed[26] = execute_SRC1[5]; + _zz_execute_FullBarrelShifterPlugin_reversed[27] = execute_SRC1[4]; + _zz_execute_FullBarrelShifterPlugin_reversed[28] = execute_SRC1[3]; + _zz_execute_FullBarrelShifterPlugin_reversed[29] = execute_SRC1[2]; + _zz_execute_FullBarrelShifterPlugin_reversed[30] = execute_SRC1[1]; + _zz_execute_FullBarrelShifterPlugin_reversed[31] = execute_SRC1[0]; + end + + assign execute_FullBarrelShifterPlugin_reversed = ((execute_SHIFT_CTRL == `ShiftCtrlEnum_binary_sequential_SLL_1) ? _zz_execute_FullBarrelShifterPlugin_reversed : execute_SRC1); + always @(*) begin + _zz_memory_to_writeBack_REGFILE_WRITE_DATA_1[0] = memory_SHIFT_RIGHT[31]; + _zz_memory_to_writeBack_REGFILE_WRITE_DATA_1[1] = memory_SHIFT_RIGHT[30]; + _zz_memory_to_writeBack_REGFILE_WRITE_DATA_1[2] = memory_SHIFT_RIGHT[29]; + _zz_memory_to_writeBack_REGFILE_WRITE_DATA_1[3] = memory_SHIFT_RIGHT[28]; + _zz_memory_to_writeBack_REGFILE_WRITE_DATA_1[4] = memory_SHIFT_RIGHT[27]; + _zz_memory_to_writeBack_REGFILE_WRITE_DATA_1[5] = memory_SHIFT_RIGHT[26]; + _zz_memory_to_writeBack_REGFILE_WRITE_DATA_1[6] = memory_SHIFT_RIGHT[25]; + _zz_memory_to_writeBack_REGFILE_WRITE_DATA_1[7] = memory_SHIFT_RIGHT[24]; + _zz_memory_to_writeBack_REGFILE_WRITE_DATA_1[8] = memory_SHIFT_RIGHT[23]; + _zz_memory_to_writeBack_REGFILE_WRITE_DATA_1[9] = memory_SHIFT_RIGHT[22]; + _zz_memory_to_writeBack_REGFILE_WRITE_DATA_1[10] = memory_SHIFT_RIGHT[21]; + _zz_memory_to_writeBack_REGFILE_WRITE_DATA_1[11] = memory_SHIFT_RIGHT[20]; + _zz_memory_to_writeBack_REGFILE_WRITE_DATA_1[12] = memory_SHIFT_RIGHT[19]; + _zz_memory_to_writeBack_REGFILE_WRITE_DATA_1[13] = memory_SHIFT_RIGHT[18]; + _zz_memory_to_writeBack_REGFILE_WRITE_DATA_1[14] = memory_SHIFT_RIGHT[17]; + _zz_memory_to_writeBack_REGFILE_WRITE_DATA_1[15] = memory_SHIFT_RIGHT[16]; + _zz_memory_to_writeBack_REGFILE_WRITE_DATA_1[16] = memory_SHIFT_RIGHT[15]; + _zz_memory_to_writeBack_REGFILE_WRITE_DATA_1[17] = memory_SHIFT_RIGHT[14]; + _zz_memory_to_writeBack_REGFILE_WRITE_DATA_1[18] = memory_SHIFT_RIGHT[13]; + _zz_memory_to_writeBack_REGFILE_WRITE_DATA_1[19] = memory_SHIFT_RIGHT[12]; + _zz_memory_to_writeBack_REGFILE_WRITE_DATA_1[20] = memory_SHIFT_RIGHT[11]; + _zz_memory_to_writeBack_REGFILE_WRITE_DATA_1[21] = memory_SHIFT_RIGHT[10]; + _zz_memory_to_writeBack_REGFILE_WRITE_DATA_1[22] = memory_SHIFT_RIGHT[9]; + _zz_memory_to_writeBack_REGFILE_WRITE_DATA_1[23] = memory_SHIFT_RIGHT[8]; + _zz_memory_to_writeBack_REGFILE_WRITE_DATA_1[24] = memory_SHIFT_RIGHT[7]; + _zz_memory_to_writeBack_REGFILE_WRITE_DATA_1[25] = memory_SHIFT_RIGHT[6]; + _zz_memory_to_writeBack_REGFILE_WRITE_DATA_1[26] = memory_SHIFT_RIGHT[5]; + _zz_memory_to_writeBack_REGFILE_WRITE_DATA_1[27] = memory_SHIFT_RIGHT[4]; + _zz_memory_to_writeBack_REGFILE_WRITE_DATA_1[28] = memory_SHIFT_RIGHT[3]; + _zz_memory_to_writeBack_REGFILE_WRITE_DATA_1[29] = memory_SHIFT_RIGHT[2]; + _zz_memory_to_writeBack_REGFILE_WRITE_DATA_1[30] = memory_SHIFT_RIGHT[1]; + _zz_memory_to_writeBack_REGFILE_WRITE_DATA_1[31] = memory_SHIFT_RIGHT[0]; + end + + always @(*) begin + HazardSimplePlugin_src0Hazard = 1'b0; + if(HazardSimplePlugin_writeBackBuffer_valid) begin + if(HazardSimplePlugin_addr0Match) begin + HazardSimplePlugin_src0Hazard = 1'b1; + end + end + if(when_HazardSimplePlugin_l57) begin + if(when_HazardSimplePlugin_l58) begin + if(when_HazardSimplePlugin_l59) begin + HazardSimplePlugin_src0Hazard = 1'b1; + end + end + end + if(when_HazardSimplePlugin_l57_1) begin + if(when_HazardSimplePlugin_l58_1) begin + if(when_HazardSimplePlugin_l59_1) begin + HazardSimplePlugin_src0Hazard = 1'b1; + end + end + end + if(when_HazardSimplePlugin_l57_2) begin + if(when_HazardSimplePlugin_l58_2) begin + if(when_HazardSimplePlugin_l59_2) begin + HazardSimplePlugin_src0Hazard = 1'b1; + end + end + end + if(when_HazardSimplePlugin_l105) begin + HazardSimplePlugin_src0Hazard = 1'b0; + end + end + + always @(*) begin + HazardSimplePlugin_src1Hazard = 1'b0; + if(HazardSimplePlugin_writeBackBuffer_valid) begin + if(HazardSimplePlugin_addr1Match) begin + HazardSimplePlugin_src1Hazard = 1'b1; + end + end + if(when_HazardSimplePlugin_l57) begin + if(when_HazardSimplePlugin_l58) begin + if(when_HazardSimplePlugin_l62) begin + HazardSimplePlugin_src1Hazard = 1'b1; + end + end + end + if(when_HazardSimplePlugin_l57_1) begin + if(when_HazardSimplePlugin_l58_1) begin + if(when_HazardSimplePlugin_l62_1) begin + HazardSimplePlugin_src1Hazard = 1'b1; + end + end + end + if(when_HazardSimplePlugin_l57_2) begin + if(when_HazardSimplePlugin_l58_2) begin + if(when_HazardSimplePlugin_l62_2) begin + HazardSimplePlugin_src1Hazard = 1'b1; + end + end + end + if(when_HazardSimplePlugin_l108) begin + HazardSimplePlugin_src1Hazard = 1'b0; + end + end + + assign HazardSimplePlugin_writeBackWrites_valid = (_zz_lastStageRegFileWrite_valid && writeBack_arbitration_isFiring); + assign HazardSimplePlugin_writeBackWrites_payload_address = _zz_lastStageRegFileWrite_payload_address[11 : 7]; + assign HazardSimplePlugin_writeBackWrites_payload_data = _zz_lastStageRegFileWrite_payload_data; + assign HazardSimplePlugin_addr0Match = (HazardSimplePlugin_writeBackBuffer_payload_address == decode_INSTRUCTION[19 : 15]); + assign HazardSimplePlugin_addr1Match = (HazardSimplePlugin_writeBackBuffer_payload_address == decode_INSTRUCTION[24 : 20]); + assign when_HazardSimplePlugin_l59 = (writeBack_INSTRUCTION[11 : 7] == decode_INSTRUCTION[19 : 15]); + assign when_HazardSimplePlugin_l62 = (writeBack_INSTRUCTION[11 : 7] == decode_INSTRUCTION[24 : 20]); + assign when_HazardSimplePlugin_l57 = (writeBack_arbitration_isValid && writeBack_REGFILE_WRITE_VALID); + assign when_HazardSimplePlugin_l58 = (1'b1 || (! 1'b1)); + assign when_HazardSimplePlugin_l59_1 = (memory_INSTRUCTION[11 : 7] == decode_INSTRUCTION[19 : 15]); + assign when_HazardSimplePlugin_l62_1 = (memory_INSTRUCTION[11 : 7] == decode_INSTRUCTION[24 : 20]); + assign when_HazardSimplePlugin_l57_1 = (memory_arbitration_isValid && memory_REGFILE_WRITE_VALID); + assign when_HazardSimplePlugin_l58_1 = (1'b1 || (! memory_BYPASSABLE_MEMORY_STAGE)); + assign when_HazardSimplePlugin_l59_2 = (execute_INSTRUCTION[11 : 7] == decode_INSTRUCTION[19 : 15]); + assign when_HazardSimplePlugin_l62_2 = (execute_INSTRUCTION[11 : 7] == decode_INSTRUCTION[24 : 20]); + assign when_HazardSimplePlugin_l57_2 = (execute_arbitration_isValid && execute_REGFILE_WRITE_VALID); + assign when_HazardSimplePlugin_l58_2 = (1'b1 || (! execute_BYPASSABLE_EXECUTE_STAGE)); + assign when_HazardSimplePlugin_l105 = (! decode_RS1_USE); + assign when_HazardSimplePlugin_l108 = (! decode_RS2_USE); + assign when_HazardSimplePlugin_l113 = (decode_arbitration_isValid && (HazardSimplePlugin_src0Hazard || HazardSimplePlugin_src1Hazard)); + assign execute_BranchPlugin_eq = (execute_SRC1 == execute_SRC2); + assign switch_Misc_l200_1 = execute_INSTRUCTION[14 : 12]; + always @(*) begin + casez(switch_Misc_l200_1) + 3'b000 : begin + _zz_execute_BRANCH_DO = execute_BranchPlugin_eq; + end + 3'b001 : begin + _zz_execute_BRANCH_DO = (! execute_BranchPlugin_eq); + end + 3'b1?1 : begin + _zz_execute_BRANCH_DO = (! execute_SRC_LESS); + end + default : begin + _zz_execute_BRANCH_DO = execute_SRC_LESS; + end + endcase + end + + always @(*) begin + case(execute_BRANCH_CTRL) + `BranchCtrlEnum_binary_sequential_INC : begin + _zz_execute_BRANCH_DO_1 = 1'b0; + end + `BranchCtrlEnum_binary_sequential_JAL : begin + _zz_execute_BRANCH_DO_1 = 1'b1; + end + `BranchCtrlEnum_binary_sequential_JALR : begin + _zz_execute_BRANCH_DO_1 = 1'b1; + end + default : begin + _zz_execute_BRANCH_DO_1 = _zz_execute_BRANCH_DO; + end + endcase + end + + assign execute_BranchPlugin_branch_src1 = ((execute_BRANCH_CTRL == `BranchCtrlEnum_binary_sequential_JALR) ? execute_RS1 : execute_PC); + assign _zz_execute_BranchPlugin_branch_src2 = _zz__zz_execute_BranchPlugin_branch_src2[19]; + always @(*) begin + _zz_execute_BranchPlugin_branch_src2_1[10] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[9] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[8] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[7] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[6] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[5] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[4] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[3] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[2] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[1] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[0] = _zz_execute_BranchPlugin_branch_src2; + end + + assign _zz_execute_BranchPlugin_branch_src2_2 = execute_INSTRUCTION[31]; + always @(*) begin + _zz_execute_BranchPlugin_branch_src2_3[19] = _zz_execute_BranchPlugin_branch_src2_2; + _zz_execute_BranchPlugin_branch_src2_3[18] = _zz_execute_BranchPlugin_branch_src2_2; + _zz_execute_BranchPlugin_branch_src2_3[17] = _zz_execute_BranchPlugin_branch_src2_2; + _zz_execute_BranchPlugin_branch_src2_3[16] = _zz_execute_BranchPlugin_branch_src2_2; + _zz_execute_BranchPlugin_branch_src2_3[15] = _zz_execute_BranchPlugin_branch_src2_2; + _zz_execute_BranchPlugin_branch_src2_3[14] = _zz_execute_BranchPlugin_branch_src2_2; + _zz_execute_BranchPlugin_branch_src2_3[13] = _zz_execute_BranchPlugin_branch_src2_2; + _zz_execute_BranchPlugin_branch_src2_3[12] = _zz_execute_BranchPlugin_branch_src2_2; + _zz_execute_BranchPlugin_branch_src2_3[11] = _zz_execute_BranchPlugin_branch_src2_2; + _zz_execute_BranchPlugin_branch_src2_3[10] = _zz_execute_BranchPlugin_branch_src2_2; + _zz_execute_BranchPlugin_branch_src2_3[9] = _zz_execute_BranchPlugin_branch_src2_2; + _zz_execute_BranchPlugin_branch_src2_3[8] = _zz_execute_BranchPlugin_branch_src2_2; + _zz_execute_BranchPlugin_branch_src2_3[7] = _zz_execute_BranchPlugin_branch_src2_2; + _zz_execute_BranchPlugin_branch_src2_3[6] = _zz_execute_BranchPlugin_branch_src2_2; + _zz_execute_BranchPlugin_branch_src2_3[5] = _zz_execute_BranchPlugin_branch_src2_2; + _zz_execute_BranchPlugin_branch_src2_3[4] = _zz_execute_BranchPlugin_branch_src2_2; + _zz_execute_BranchPlugin_branch_src2_3[3] = _zz_execute_BranchPlugin_branch_src2_2; + _zz_execute_BranchPlugin_branch_src2_3[2] = _zz_execute_BranchPlugin_branch_src2_2; + _zz_execute_BranchPlugin_branch_src2_3[1] = _zz_execute_BranchPlugin_branch_src2_2; + _zz_execute_BranchPlugin_branch_src2_3[0] = _zz_execute_BranchPlugin_branch_src2_2; + end + + assign _zz_execute_BranchPlugin_branch_src2_4 = _zz__zz_execute_BranchPlugin_branch_src2_4[11]; + always @(*) begin + _zz_execute_BranchPlugin_branch_src2_5[18] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[17] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[16] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[15] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[14] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[13] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[12] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[11] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[10] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[9] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[8] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[7] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[6] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[5] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[4] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[3] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[2] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[1] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[0] = _zz_execute_BranchPlugin_branch_src2_4; + end + + always @(*) begin + case(execute_BRANCH_CTRL) + `BranchCtrlEnum_binary_sequential_JAL : begin + _zz_execute_BranchPlugin_branch_src2_6 = {{_zz_execute_BranchPlugin_branch_src2_1,{{{execute_INSTRUCTION[31],execute_INSTRUCTION[19 : 12]},execute_INSTRUCTION[20]},execute_INSTRUCTION[30 : 21]}},1'b0}; + end + `BranchCtrlEnum_binary_sequential_JALR : begin + _zz_execute_BranchPlugin_branch_src2_6 = {_zz_execute_BranchPlugin_branch_src2_3,execute_INSTRUCTION[31 : 20]}; + end + default : begin + _zz_execute_BranchPlugin_branch_src2_6 = {{_zz_execute_BranchPlugin_branch_src2_5,{{{execute_INSTRUCTION[31],execute_INSTRUCTION[7]},execute_INSTRUCTION[30 : 25]},execute_INSTRUCTION[11 : 8]}},1'b0}; + end + endcase + end + + assign execute_BranchPlugin_branch_src2 = _zz_execute_BranchPlugin_branch_src2_6; + assign execute_BranchPlugin_branchAdder = (execute_BranchPlugin_branch_src1 + execute_BranchPlugin_branch_src2); + assign BranchPlugin_jumpInterface_valid = ((execute_arbitration_isValid && execute_BRANCH_DO) && (! 1'b0)); + assign BranchPlugin_jumpInterface_payload = execute_BRANCH_CALC; + always @(*) begin + CsrPlugin_privilege = 2'b11; + if(CsrPlugin_forceMachineWire) begin + CsrPlugin_privilege = 2'b11; + end + end + + assign CsrPlugin_misa_base = 2'b01; + assign CsrPlugin_misa_extensions = 26'h0000042; + assign _zz_when_CsrPlugin_l952 = (CsrPlugin_mip_MTIP && CsrPlugin_mie_MTIE); + assign _zz_when_CsrPlugin_l952_1 = (CsrPlugin_mip_MSIP && CsrPlugin_mie_MSIE); + assign _zz_when_CsrPlugin_l952_2 = (CsrPlugin_mip_MEIP && CsrPlugin_mie_MEIE); + assign CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilegeUncapped = 2'b11; + assign CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilege = ((CsrPlugin_privilege < CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilegeUncapped) ? CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilegeUncapped : CsrPlugin_privilege); + always @(*) begin + CsrPlugin_exceptionPortCtrl_exceptionValids_decode = CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_decode; + if(decodeExceptionPort_valid) begin + CsrPlugin_exceptionPortCtrl_exceptionValids_decode = 1'b1; + end + if(decode_arbitration_isFlushed) begin + CsrPlugin_exceptionPortCtrl_exceptionValids_decode = 1'b0; + end + end + + always @(*) begin + CsrPlugin_exceptionPortCtrl_exceptionValids_execute = CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_execute; + if(CsrPlugin_selfException_valid) begin + CsrPlugin_exceptionPortCtrl_exceptionValids_execute = 1'b1; + end + if(execute_arbitration_isFlushed) begin + CsrPlugin_exceptionPortCtrl_exceptionValids_execute = 1'b0; + end + end + + always @(*) begin + CsrPlugin_exceptionPortCtrl_exceptionValids_memory = CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_memory; + if(memory_arbitration_isFlushed) begin + CsrPlugin_exceptionPortCtrl_exceptionValids_memory = 1'b0; + end + end + + always @(*) begin + CsrPlugin_exceptionPortCtrl_exceptionValids_writeBack = CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_writeBack; + if(writeBack_arbitration_isFlushed) begin + CsrPlugin_exceptionPortCtrl_exceptionValids_writeBack = 1'b0; + end + end + + assign when_CsrPlugin_l909 = (! decode_arbitration_isStuck); + assign when_CsrPlugin_l909_1 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l909_2 = (! memory_arbitration_isStuck); + assign when_CsrPlugin_l909_3 = (! writeBack_arbitration_isStuck); + assign when_CsrPlugin_l922 = ({CsrPlugin_exceptionPortCtrl_exceptionValids_writeBack,{CsrPlugin_exceptionPortCtrl_exceptionValids_memory,{CsrPlugin_exceptionPortCtrl_exceptionValids_execute,CsrPlugin_exceptionPortCtrl_exceptionValids_decode}}} != 4'b0000); + assign CsrPlugin_exceptionPendings_0 = CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_decode; + assign CsrPlugin_exceptionPendings_1 = CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_execute; + assign CsrPlugin_exceptionPendings_2 = CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_memory; + assign CsrPlugin_exceptionPendings_3 = CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_writeBack; + assign when_CsrPlugin_l946 = (CsrPlugin_mstatus_MIE || (CsrPlugin_privilege < 2'b11)); + assign when_CsrPlugin_l952 = ((_zz_when_CsrPlugin_l952 && 1'b1) && (! 1'b0)); + assign when_CsrPlugin_l952_1 = ((_zz_when_CsrPlugin_l952_1 && 1'b1) && (! 1'b0)); + assign when_CsrPlugin_l952_2 = ((_zz_when_CsrPlugin_l952_2 && 1'b1) && (! 1'b0)); + assign CsrPlugin_exception = (CsrPlugin_exceptionPortCtrl_exceptionValids_writeBack && CsrPlugin_allowException); + assign CsrPlugin_lastStageWasWfi = 1'b0; + assign CsrPlugin_pipelineLiberator_active = ((CsrPlugin_interrupt_valid && CsrPlugin_allowInterrupts) && decode_arbitration_isValid); + assign when_CsrPlugin_l980 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l980_1 = (! memory_arbitration_isStuck); + assign when_CsrPlugin_l980_2 = (! writeBack_arbitration_isStuck); + assign when_CsrPlugin_l985 = ((! CsrPlugin_pipelineLiberator_active) || decode_arbitration_removeIt); + always @(*) begin + CsrPlugin_pipelineLiberator_done = CsrPlugin_pipelineLiberator_pcValids_2; + if(when_CsrPlugin_l991) begin + CsrPlugin_pipelineLiberator_done = 1'b0; + end + if(CsrPlugin_hadException) begin + CsrPlugin_pipelineLiberator_done = 1'b0; + end + end + + assign when_CsrPlugin_l991 = ({CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_writeBack,{CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_memory,CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_execute}} != 3'b000); + assign CsrPlugin_interruptJump = ((CsrPlugin_interrupt_valid && CsrPlugin_pipelineLiberator_done) && CsrPlugin_allowInterrupts); + always @(*) begin + CsrPlugin_targetPrivilege = CsrPlugin_interrupt_targetPrivilege; + if(CsrPlugin_hadException) begin + CsrPlugin_targetPrivilege = CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilege; + end + end + + always @(*) begin + CsrPlugin_trapCause = CsrPlugin_interrupt_code; + if(CsrPlugin_hadException) begin + CsrPlugin_trapCause = CsrPlugin_exceptionPortCtrl_exceptionContext_code; + end + end + + always @(*) begin + CsrPlugin_xtvec_mode = 2'bxx; + case(CsrPlugin_targetPrivilege) + 2'b11 : begin + CsrPlugin_xtvec_mode = CsrPlugin_mtvec_mode; + end + default : begin + end + endcase + end + + always @(*) begin + CsrPlugin_xtvec_base = 30'bxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx; + case(CsrPlugin_targetPrivilege) + 2'b11 : begin + CsrPlugin_xtvec_base = CsrPlugin_mtvec_base; + end + default : begin + end + endcase + end + + assign when_CsrPlugin_l1019 = (CsrPlugin_hadException || CsrPlugin_interruptJump); + assign when_CsrPlugin_l1064 = (writeBack_arbitration_isValid && (writeBack_ENV_CTRL == `EnvCtrlEnum_binary_sequential_XRET)); + assign switch_CsrPlugin_l1068 = writeBack_INSTRUCTION[29 : 28]; + assign contextSwitching = CsrPlugin_jumpInterface_valid; + assign when_CsrPlugin_l1116 = ({(writeBack_arbitration_isValid && (writeBack_ENV_CTRL == `EnvCtrlEnum_binary_sequential_XRET)),{(memory_arbitration_isValid && (memory_ENV_CTRL == `EnvCtrlEnum_binary_sequential_XRET)),(execute_arbitration_isValid && (execute_ENV_CTRL == `EnvCtrlEnum_binary_sequential_XRET))}} != 3'b000); + assign execute_CsrPlugin_blockedBySideEffects = (({writeBack_arbitration_isValid,memory_arbitration_isValid} != 2'b00) || 1'b0); + always @(*) begin + execute_CsrPlugin_illegalAccess = 1'b1; + if(execute_CsrPlugin_csr_768) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(execute_CsrPlugin_csr_836) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(execute_CsrPlugin_csr_772) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(execute_CsrPlugin_csr_773) begin + if(execute_CSR_WRITE_OPCODE) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + end + if(execute_CsrPlugin_csr_833) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(execute_CsrPlugin_csr_834) begin + if(execute_CSR_READ_OPCODE) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + end + if(execute_CsrPlugin_csr_835) begin + if(execute_CSR_READ_OPCODE) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + end + if(execute_CsrPlugin_csr_2816) begin + if(execute_CSR_READ_OPCODE) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + end + if(execute_CsrPlugin_csr_2944) begin + if(execute_CSR_READ_OPCODE) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + end + if(execute_CsrPlugin_csr_3008) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(execute_CsrPlugin_csr_4032) begin + if(execute_CSR_READ_OPCODE) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + end + if(CsrPlugin_csrMapping_allowCsrSignal) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(when_CsrPlugin_l1297) begin + execute_CsrPlugin_illegalAccess = 1'b1; + end + if(when_CsrPlugin_l1302) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + end + + always @(*) begin + execute_CsrPlugin_illegalInstruction = 1'b0; + if(when_CsrPlugin_l1136) begin + if(when_CsrPlugin_l1137) begin + execute_CsrPlugin_illegalInstruction = 1'b1; + end + end + end + + always @(*) begin + CsrPlugin_selfException_valid = 1'b0; + if(when_CsrPlugin_l1144) begin + CsrPlugin_selfException_valid = 1'b1; + end + end + + always @(*) begin + CsrPlugin_selfException_payload_code = 4'bxxxx; + if(when_CsrPlugin_l1144) begin + case(CsrPlugin_privilege) + 2'b00 : begin + CsrPlugin_selfException_payload_code = 4'b1000; + end + default : begin + CsrPlugin_selfException_payload_code = 4'b1011; + end + endcase + end + end + + assign CsrPlugin_selfException_payload_badAddr = execute_INSTRUCTION; + assign when_CsrPlugin_l1136 = (execute_arbitration_isValid && (execute_ENV_CTRL == `EnvCtrlEnum_binary_sequential_XRET)); + assign when_CsrPlugin_l1137 = (CsrPlugin_privilege < execute_INSTRUCTION[29 : 28]); + assign when_CsrPlugin_l1144 = (execute_arbitration_isValid && (execute_ENV_CTRL == `EnvCtrlEnum_binary_sequential_ECALL)); + always @(*) begin + execute_CsrPlugin_writeInstruction = ((execute_arbitration_isValid && execute_IS_CSR) && execute_CSR_WRITE_OPCODE); + if(when_CsrPlugin_l1297) begin + execute_CsrPlugin_writeInstruction = 1'b0; + end + end + + always @(*) begin + execute_CsrPlugin_readInstruction = ((execute_arbitration_isValid && execute_IS_CSR) && execute_CSR_READ_OPCODE); + if(when_CsrPlugin_l1297) begin + execute_CsrPlugin_readInstruction = 1'b0; + end + end + + assign execute_CsrPlugin_writeEnable = (execute_CsrPlugin_writeInstruction && (! execute_arbitration_isStuck)); + assign execute_CsrPlugin_readEnable = (execute_CsrPlugin_readInstruction && (! execute_arbitration_isStuck)); + assign CsrPlugin_csrMapping_hazardFree = (! execute_CsrPlugin_blockedBySideEffects); + assign execute_CsrPlugin_readToWriteData = CsrPlugin_csrMapping_readDataSignal; + assign switch_Misc_l200_2 = execute_INSTRUCTION[13]; + always @(*) begin + case(switch_Misc_l200_2) + 1'b0 : begin + _zz_CsrPlugin_csrMapping_writeDataSignal = execute_SRC1; + end + default : begin + _zz_CsrPlugin_csrMapping_writeDataSignal = (execute_INSTRUCTION[12] ? (execute_CsrPlugin_readToWriteData & (~ execute_SRC1)) : (execute_CsrPlugin_readToWriteData | execute_SRC1)); + end + endcase + end + + assign CsrPlugin_csrMapping_writeDataSignal = _zz_CsrPlugin_csrMapping_writeDataSignal; + assign when_CsrPlugin_l1176 = (execute_arbitration_isValid && execute_IS_CSR); + assign when_CsrPlugin_l1180 = (execute_arbitration_isValid && (execute_IS_CSR || 1'b0)); + assign execute_CsrPlugin_csrAddress = execute_INSTRUCTION[31 : 20]; + assign execute_MulPlugin_a = execute_RS1; + assign execute_MulPlugin_b = execute_RS2; + assign switch_MulPlugin_l87 = execute_INSTRUCTION[13 : 12]; + always @(*) begin + case(switch_MulPlugin_l87) + 2'b01 : begin + execute_MulPlugin_aSigned = 1'b1; + end + 2'b10 : begin + execute_MulPlugin_aSigned = 1'b1; + end + default : begin + execute_MulPlugin_aSigned = 1'b0; + end + endcase + end + + always @(*) begin + case(switch_MulPlugin_l87) + 2'b01 : begin + execute_MulPlugin_bSigned = 1'b1; + end + 2'b10 : begin + execute_MulPlugin_bSigned = 1'b0; + end + default : begin + execute_MulPlugin_bSigned = 1'b0; + end + endcase + end + + assign execute_MulPlugin_aULow = execute_MulPlugin_a[15 : 0]; + assign execute_MulPlugin_bULow = execute_MulPlugin_b[15 : 0]; + assign execute_MulPlugin_aSLow = {1'b0,execute_MulPlugin_a[15 : 0]}; + assign execute_MulPlugin_bSLow = {1'b0,execute_MulPlugin_b[15 : 0]}; + assign execute_MulPlugin_aHigh = {(execute_MulPlugin_aSigned && execute_MulPlugin_a[31]),execute_MulPlugin_a[31 : 16]}; + assign execute_MulPlugin_bHigh = {(execute_MulPlugin_bSigned && execute_MulPlugin_b[31]),execute_MulPlugin_b[31 : 16]}; + assign writeBack_MulPlugin_result = ($signed(_zz_writeBack_MulPlugin_result) + $signed(_zz_writeBack_MulPlugin_result_1)); + assign when_MulPlugin_l147 = (writeBack_arbitration_isValid && writeBack_IS_MUL); + assign switch_MulPlugin_l148 = writeBack_INSTRUCTION[13 : 12]; + assign _zz_CsrPlugin_csrMapping_readDataInit_1 = (_zz_CsrPlugin_csrMapping_readDataInit & externalInterruptArray_regNext); + assign externalInterrupt = (_zz_CsrPlugin_csrMapping_readDataInit_1 != 32'h0); + assign execute_CfuPlugin_schedule = (execute_arbitration_isValid && execute_CfuPlugin_CFU_ENABLE); + assign CfuPlugin_bus_cmd_fire = (CfuPlugin_bus_cmd_valid && CfuPlugin_bus_cmd_ready); + assign when_CfuPlugin_l171 = (! execute_arbitration_isStuckByOthers); + assign CfuPlugin_bus_cmd_valid = ((execute_CfuPlugin_schedule || execute_CfuPlugin_hold) && (! execute_CfuPlugin_fired)); + assign when_CfuPlugin_l175 = (CfuPlugin_bus_cmd_valid && (! CfuPlugin_bus_cmd_ready)); + assign execute_CfuPlugin_functionsIds_0 = _zz_execute_CfuPlugin_functionsIds_0; + assign CfuPlugin_bus_cmd_payload_function_id = execute_CfuPlugin_functionsIds_0; + assign CfuPlugin_bus_cmd_payload_inputs_0 = execute_RS1; + assign _zz_CfuPlugin_bus_cmd_payload_inputs_1 = execute_INSTRUCTION[31]; + always @(*) begin + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[23] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[22] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[21] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[20] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[19] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[18] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[17] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[16] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[15] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[14] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[13] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[12] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[11] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[10] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[9] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[8] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[7] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[6] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[5] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[4] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[3] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[2] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[1] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[0] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + end + + always @(*) begin + case(execute_CfuPlugin_CFU_INPUT_2_KIND) + `Input2Kind_binary_sequential_RS : begin + _zz_CfuPlugin_bus_cmd_payload_inputs_1_2 = execute_RS2; + end + default : begin + _zz_CfuPlugin_bus_cmd_payload_inputs_1_2 = {_zz_CfuPlugin_bus_cmd_payload_inputs_1_1,execute_INSTRUCTION[31 : 24]}; + end + endcase + end + + assign CfuPlugin_bus_cmd_payload_inputs_1 = _zz_CfuPlugin_bus_cmd_payload_inputs_1_2; + assign CfuPlugin_bus_rsp_ready = (! CfuPlugin_bus_rsp_rValid); + assign CfuPlugin_bus_rsp_rsp_valid = (CfuPlugin_bus_rsp_valid || CfuPlugin_bus_rsp_rValid); + assign CfuPlugin_bus_rsp_rsp_payload_outputs_0 = (CfuPlugin_bus_rsp_rValid ? CfuPlugin_bus_rsp_rData_outputs_0 : CfuPlugin_bus_rsp_payload_outputs_0); + always @(*) begin + CfuPlugin_bus_rsp_rsp_ready = 1'b0; + if(memory_CfuPlugin_CFU_IN_FLIGHT) begin + CfuPlugin_bus_rsp_rsp_ready = (! memory_arbitration_isStuckByOthers); + end + end + + assign when_CfuPlugin_l208 = (! CfuPlugin_bus_rsp_rsp_valid); + assign when_Pipeline_l124 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_1 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_2 = ((! writeBack_arbitration_isStuck) && (! CsrPlugin_exceptionPortCtrl_exceptionValids_writeBack)); + assign when_Pipeline_l124_3 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_4 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_5 = (! writeBack_arbitration_isStuck); + assign when_Pipeline_l124_6 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_7 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_8 = (! writeBack_arbitration_isStuck); + assign _zz_decode_to_execute_SRC1_CTRL_1 = decode_SRC1_CTRL; + assign _zz_decode_SRC1_CTRL = _zz_decode_SRC1_CTRL_1; + assign when_Pipeline_l124_9 = (! execute_arbitration_isStuck); + assign _zz_execute_SRC1_CTRL = decode_to_execute_SRC1_CTRL; + assign when_Pipeline_l124_10 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_11 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_12 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_13 = (! writeBack_arbitration_isStuck); + assign _zz_decode_to_execute_SRC2_CTRL_1 = decode_SRC2_CTRL; + assign _zz_decode_SRC2_CTRL = _zz_decode_SRC2_CTRL_1; + assign when_Pipeline_l124_14 = (! execute_arbitration_isStuck); + assign _zz_execute_SRC2_CTRL = decode_to_execute_SRC2_CTRL; + assign when_Pipeline_l124_15 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_16 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_17 = (! writeBack_arbitration_isStuck); + assign when_Pipeline_l124_18 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_19 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_20 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_21 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_22 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_23 = (! writeBack_arbitration_isStuck); + assign _zz_decode_to_execute_ALU_CTRL_1 = decode_ALU_CTRL; + assign _zz_decode_ALU_CTRL = _zz_decode_ALU_CTRL_1; + assign when_Pipeline_l124_24 = (! execute_arbitration_isStuck); + assign _zz_execute_ALU_CTRL = decode_to_execute_ALU_CTRL; + assign when_Pipeline_l124_25 = (! execute_arbitration_isStuck); + assign _zz_decode_to_execute_ALU_BITWISE_CTRL_1 = decode_ALU_BITWISE_CTRL; + assign _zz_decode_ALU_BITWISE_CTRL = _zz_decode_ALU_BITWISE_CTRL_1; + assign when_Pipeline_l124_26 = (! execute_arbitration_isStuck); + assign _zz_execute_ALU_BITWISE_CTRL = decode_to_execute_ALU_BITWISE_CTRL; + assign _zz_decode_to_execute_SHIFT_CTRL_1 = decode_SHIFT_CTRL; + assign _zz_execute_to_memory_SHIFT_CTRL_1 = execute_SHIFT_CTRL; + assign _zz_decode_SHIFT_CTRL = _zz_decode_SHIFT_CTRL_1; + assign when_Pipeline_l124_27 = (! execute_arbitration_isStuck); + assign _zz_execute_SHIFT_CTRL = decode_to_execute_SHIFT_CTRL; + assign when_Pipeline_l124_28 = (! memory_arbitration_isStuck); + assign _zz_memory_SHIFT_CTRL = execute_to_memory_SHIFT_CTRL; + assign _zz_decode_to_execute_BRANCH_CTRL_1 = decode_BRANCH_CTRL; + assign _zz_decode_BRANCH_CTRL = _zz_decode_BRANCH_CTRL_1; + assign when_Pipeline_l124_29 = (! execute_arbitration_isStuck); + assign _zz_execute_BRANCH_CTRL = decode_to_execute_BRANCH_CTRL; + assign when_Pipeline_l124_30 = (! execute_arbitration_isStuck); + assign _zz_decode_to_execute_ENV_CTRL_1 = decode_ENV_CTRL; + assign _zz_execute_to_memory_ENV_CTRL_1 = execute_ENV_CTRL; + assign _zz_memory_to_writeBack_ENV_CTRL_1 = memory_ENV_CTRL; + assign _zz_decode_ENV_CTRL = _zz_decode_ENV_CTRL_1; + assign when_Pipeline_l124_31 = (! execute_arbitration_isStuck); + assign _zz_execute_ENV_CTRL = decode_to_execute_ENV_CTRL; + assign when_Pipeline_l124_32 = (! memory_arbitration_isStuck); + assign _zz_memory_ENV_CTRL = execute_to_memory_ENV_CTRL; + assign when_Pipeline_l124_33 = (! writeBack_arbitration_isStuck); + assign _zz_writeBack_ENV_CTRL = memory_to_writeBack_ENV_CTRL; + assign when_Pipeline_l124_34 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_35 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_36 = (! writeBack_arbitration_isStuck); + assign when_Pipeline_l124_37 = (! execute_arbitration_isStuck); + assign _zz_decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND_1 = decode_CfuPlugin_CFU_INPUT_2_KIND; + assign _zz_decode_CfuPlugin_CFU_INPUT_2_KIND = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_1; + assign when_Pipeline_l124_38 = (! execute_arbitration_isStuck); + assign _zz_execute_CfuPlugin_CFU_INPUT_2_KIND = decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND; + assign when_Pipeline_l124_39 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_40 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_41 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_42 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_43 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_44 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_45 = (! writeBack_arbitration_isStuck); + assign when_Pipeline_l124_46 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_47 = (! writeBack_arbitration_isStuck); + assign when_Pipeline_l124_48 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_49 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_50 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_51 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_52 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_53 = (! writeBack_arbitration_isStuck); + assign when_Pipeline_l124_54 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_55 = (! writeBack_arbitration_isStuck); + assign when_Pipeline_l124_56 = (! writeBack_arbitration_isStuck); + assign when_Pipeline_l124_57 = (! writeBack_arbitration_isStuck); + assign decode_arbitration_isFlushed = (({writeBack_arbitration_flushNext,{memory_arbitration_flushNext,execute_arbitration_flushNext}} != 3'b000) || ({writeBack_arbitration_flushIt,{memory_arbitration_flushIt,{execute_arbitration_flushIt,decode_arbitration_flushIt}}} != 4'b0000)); + assign execute_arbitration_isFlushed = (({writeBack_arbitration_flushNext,memory_arbitration_flushNext} != 2'b00) || ({writeBack_arbitration_flushIt,{memory_arbitration_flushIt,execute_arbitration_flushIt}} != 3'b000)); + assign memory_arbitration_isFlushed = ((writeBack_arbitration_flushNext != 1'b0) || ({writeBack_arbitration_flushIt,memory_arbitration_flushIt} != 2'b00)); + assign writeBack_arbitration_isFlushed = (1'b0 || (writeBack_arbitration_flushIt != 1'b0)); + assign decode_arbitration_isStuckByOthers = (decode_arbitration_haltByOther || (((1'b0 || execute_arbitration_isStuck) || memory_arbitration_isStuck) || writeBack_arbitration_isStuck)); + assign decode_arbitration_isStuck = (decode_arbitration_haltItself || decode_arbitration_isStuckByOthers); + assign decode_arbitration_isMoving = ((! decode_arbitration_isStuck) && (! decode_arbitration_removeIt)); + assign decode_arbitration_isFiring = ((decode_arbitration_isValid && (! decode_arbitration_isStuck)) && (! decode_arbitration_removeIt)); + assign execute_arbitration_isStuckByOthers = (execute_arbitration_haltByOther || ((1'b0 || memory_arbitration_isStuck) || writeBack_arbitration_isStuck)); + assign execute_arbitration_isStuck = (execute_arbitration_haltItself || execute_arbitration_isStuckByOthers); + assign execute_arbitration_isMoving = ((! execute_arbitration_isStuck) && (! execute_arbitration_removeIt)); + assign execute_arbitration_isFiring = ((execute_arbitration_isValid && (! execute_arbitration_isStuck)) && (! execute_arbitration_removeIt)); + assign memory_arbitration_isStuckByOthers = (memory_arbitration_haltByOther || (1'b0 || writeBack_arbitration_isStuck)); + assign memory_arbitration_isStuck = (memory_arbitration_haltItself || memory_arbitration_isStuckByOthers); + assign memory_arbitration_isMoving = ((! memory_arbitration_isStuck) && (! memory_arbitration_removeIt)); + assign memory_arbitration_isFiring = ((memory_arbitration_isValid && (! memory_arbitration_isStuck)) && (! memory_arbitration_removeIt)); + assign writeBack_arbitration_isStuckByOthers = (writeBack_arbitration_haltByOther || 1'b0); + assign writeBack_arbitration_isStuck = (writeBack_arbitration_haltItself || writeBack_arbitration_isStuckByOthers); + assign writeBack_arbitration_isMoving = ((! writeBack_arbitration_isStuck) && (! writeBack_arbitration_removeIt)); + assign writeBack_arbitration_isFiring = ((writeBack_arbitration_isValid && (! writeBack_arbitration_isStuck)) && (! writeBack_arbitration_removeIt)); + assign when_Pipeline_l151 = ((! execute_arbitration_isStuck) || execute_arbitration_removeIt); + assign when_Pipeline_l154 = ((! decode_arbitration_isStuck) && (! decode_arbitration_removeIt)); + assign when_Pipeline_l151_1 = ((! memory_arbitration_isStuck) || memory_arbitration_removeIt); + assign when_Pipeline_l154_1 = ((! execute_arbitration_isStuck) && (! execute_arbitration_removeIt)); + assign when_Pipeline_l151_2 = ((! writeBack_arbitration_isStuck) || writeBack_arbitration_removeIt); + assign when_Pipeline_l154_2 = ((! memory_arbitration_isStuck) && (! memory_arbitration_removeIt)); + assign when_CsrPlugin_l1264 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_1 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_2 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_3 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_4 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_5 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_6 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_7 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_8 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_9 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_10 = (! execute_arbitration_isStuck); + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_2 = 32'h0; + if(execute_CsrPlugin_csr_768) begin + _zz_CsrPlugin_csrMapping_readDataInit_2[12 : 11] = CsrPlugin_mstatus_MPP; + _zz_CsrPlugin_csrMapping_readDataInit_2[7 : 7] = CsrPlugin_mstatus_MPIE; + _zz_CsrPlugin_csrMapping_readDataInit_2[3 : 3] = CsrPlugin_mstatus_MIE; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_3 = 32'h0; + if(execute_CsrPlugin_csr_836) begin + _zz_CsrPlugin_csrMapping_readDataInit_3[11 : 11] = CsrPlugin_mip_MEIP; + _zz_CsrPlugin_csrMapping_readDataInit_3[7 : 7] = CsrPlugin_mip_MTIP; + _zz_CsrPlugin_csrMapping_readDataInit_3[3 : 3] = CsrPlugin_mip_MSIP; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_4 = 32'h0; + if(execute_CsrPlugin_csr_772) begin + _zz_CsrPlugin_csrMapping_readDataInit_4[11 : 11] = CsrPlugin_mie_MEIE; + _zz_CsrPlugin_csrMapping_readDataInit_4[7 : 7] = CsrPlugin_mie_MTIE; + _zz_CsrPlugin_csrMapping_readDataInit_4[3 : 3] = CsrPlugin_mie_MSIE; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_5 = 32'h0; + if(execute_CsrPlugin_csr_833) begin + _zz_CsrPlugin_csrMapping_readDataInit_5[31 : 0] = CsrPlugin_mepc; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_6 = 32'h0; + if(execute_CsrPlugin_csr_834) begin + _zz_CsrPlugin_csrMapping_readDataInit_6[31 : 31] = CsrPlugin_mcause_interrupt; + _zz_CsrPlugin_csrMapping_readDataInit_6[3 : 0] = CsrPlugin_mcause_exceptionCode; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_7 = 32'h0; + if(execute_CsrPlugin_csr_835) begin + _zz_CsrPlugin_csrMapping_readDataInit_7[31 : 0] = CsrPlugin_mtval; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_8 = 32'h0; + if(execute_CsrPlugin_csr_2816) begin + _zz_CsrPlugin_csrMapping_readDataInit_8[31 : 0] = CsrPlugin_mcycle[31 : 0]; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_9 = 32'h0; + if(execute_CsrPlugin_csr_2944) begin + _zz_CsrPlugin_csrMapping_readDataInit_9[31 : 0] = CsrPlugin_mcycle[63 : 32]; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_10 = 32'h0; + if(execute_CsrPlugin_csr_3008) begin + _zz_CsrPlugin_csrMapping_readDataInit_10[31 : 0] = _zz_CsrPlugin_csrMapping_readDataInit; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_11 = 32'h0; + if(execute_CsrPlugin_csr_4032) begin + _zz_CsrPlugin_csrMapping_readDataInit_11[31 : 0] = _zz_CsrPlugin_csrMapping_readDataInit_1; + end + end + + assign CsrPlugin_csrMapping_readDataInit = ((((_zz_CsrPlugin_csrMapping_readDataInit_2 | _zz_CsrPlugin_csrMapping_readDataInit_3) | (_zz_CsrPlugin_csrMapping_readDataInit_4 | _zz_CsrPlugin_csrMapping_readDataInit_5)) | ((_zz_CsrPlugin_csrMapping_readDataInit_6 | _zz_CsrPlugin_csrMapping_readDataInit_7) | (_zz_CsrPlugin_csrMapping_readDataInit_8 | _zz_CsrPlugin_csrMapping_readDataInit_9))) | (_zz_CsrPlugin_csrMapping_readDataInit_10 | _zz_CsrPlugin_csrMapping_readDataInit_11)); + assign when_CsrPlugin_l1297 = (CsrPlugin_privilege < execute_CsrPlugin_csrAddress[9 : 8]); + assign when_CsrPlugin_l1302 = ((! execute_arbitration_isValid) || (! execute_IS_CSR)); + assign iBusWishbone_ADR = {_zz_iBusWishbone_ADR_1,_zz_iBusWishbone_ADR}; + assign iBusWishbone_CTI = ((_zz_iBusWishbone_ADR == 3'b111) ? 3'b111 : 3'b010); + assign iBusWishbone_BTE = 2'b00; + assign iBusWishbone_SEL = 4'b1111; + assign iBusWishbone_WE = 1'b0; + assign iBusWishbone_DAT_MOSI = 32'bxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx; + always @(*) begin + iBusWishbone_CYC = 1'b0; + if(when_InstructionCache_l239) begin + iBusWishbone_CYC = 1'b1; + end + end + + always @(*) begin + iBusWishbone_STB = 1'b0; + if(when_InstructionCache_l239) begin + iBusWishbone_STB = 1'b1; + end + end + + assign when_InstructionCache_l239 = (iBus_cmd_valid || (_zz_iBusWishbone_ADR != 3'b000)); + assign iBus_cmd_ready = (iBus_cmd_valid && iBusWishbone_ACK); + assign iBus_rsp_valid = _zz_iBus_rsp_valid; + assign iBus_rsp_payload_data = iBusWishbone_DAT_MISO_regNext; + assign iBus_rsp_payload_error = 1'b0; + assign dBus_cmd_halfPipe_fire = (dBus_cmd_halfPipe_valid && dBus_cmd_halfPipe_ready); + assign dBus_cmd_ready = (! dBus_cmd_rValid); + assign dBus_cmd_halfPipe_valid = dBus_cmd_rValid; + assign dBus_cmd_halfPipe_payload_wr = dBus_cmd_rData_wr; + assign dBus_cmd_halfPipe_payload_address = dBus_cmd_rData_address; + assign dBus_cmd_halfPipe_payload_data = dBus_cmd_rData_data; + assign dBus_cmd_halfPipe_payload_size = dBus_cmd_rData_size; + assign dBusWishbone_ADR = (dBus_cmd_halfPipe_payload_address >>> 2); + assign dBusWishbone_CTI = 3'b000; + assign dBusWishbone_BTE = 2'b00; + always @(*) begin + case(dBus_cmd_halfPipe_payload_size) + 2'b00 : begin + _zz_dBusWishbone_SEL = 4'b0001; + end + 2'b01 : begin + _zz_dBusWishbone_SEL = 4'b0011; + end + default : begin + _zz_dBusWishbone_SEL = 4'b1111; + end + endcase + end + + always @(*) begin + dBusWishbone_SEL = (_zz_dBusWishbone_SEL <<< dBus_cmd_halfPipe_payload_address[1 : 0]); + if(when_DBusSimplePlugin_l189) begin + dBusWishbone_SEL = 4'b1111; + end + end + + assign when_DBusSimplePlugin_l189 = (! dBus_cmd_halfPipe_payload_wr); + assign dBusWishbone_WE = dBus_cmd_halfPipe_payload_wr; + assign dBusWishbone_DAT_MOSI = dBus_cmd_halfPipe_payload_data; + assign dBus_cmd_halfPipe_ready = (dBus_cmd_halfPipe_valid && dBusWishbone_ACK); + assign dBusWishbone_CYC = dBus_cmd_halfPipe_valid; + assign dBusWishbone_STB = dBus_cmd_halfPipe_valid; + assign dBus_rsp_ready = ((dBus_cmd_halfPipe_valid && (! dBusWishbone_WE)) && dBusWishbone_ACK); + assign dBus_rsp_data = dBusWishbone_DAT_MISO; + assign dBus_rsp_error = 1'b0; + always @(posedge clk) begin + if(reset) begin + IBusCachedPlugin_fetchPc_pcReg <= externalResetVector; + IBusCachedPlugin_fetchPc_correctionReg <= 1'b0; + IBusCachedPlugin_fetchPc_booted <= 1'b0; + IBusCachedPlugin_fetchPc_inc <= 1'b0; + _zz_IBusCachedPlugin_iBusRsp_stages_0_output_ready_2 <= 1'b0; + _zz_IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_valid <= 1'b0; + IBusCachedPlugin_injector_nextPcCalc_valids_0 <= 1'b0; + IBusCachedPlugin_injector_nextPcCalc_valids_1 <= 1'b0; + IBusCachedPlugin_injector_nextPcCalc_valids_2 <= 1'b0; + IBusCachedPlugin_injector_nextPcCalc_valids_3 <= 1'b0; + IBusCachedPlugin_injector_nextPcCalc_valids_4 <= 1'b0; + IBusCachedPlugin_rspCounter <= _zz_IBusCachedPlugin_rspCounter; + IBusCachedPlugin_rspCounter <= 32'h0; + _zz_2 <= 1'b1; + HazardSimplePlugin_writeBackBuffer_valid <= 1'b0; + CsrPlugin_mstatus_MIE <= 1'b0; + CsrPlugin_mstatus_MPIE <= 1'b0; + CsrPlugin_mstatus_MPP <= 2'b11; + CsrPlugin_mie_MEIE <= 1'b0; + CsrPlugin_mie_MTIE <= 1'b0; + CsrPlugin_mie_MSIE <= 1'b0; + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_decode <= 1'b0; + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_execute <= 1'b0; + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_memory <= 1'b0; + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_writeBack <= 1'b0; + CsrPlugin_interrupt_valid <= 1'b0; + CsrPlugin_pipelineLiberator_pcValids_0 <= 1'b0; + CsrPlugin_pipelineLiberator_pcValids_1 <= 1'b0; + CsrPlugin_pipelineLiberator_pcValids_2 <= 1'b0; + CsrPlugin_hadException <= 1'b0; + execute_CsrPlugin_wfiWake <= 1'b0; + _zz_CsrPlugin_csrMapping_readDataInit <= 32'h0; + execute_CfuPlugin_hold <= 1'b0; + execute_CfuPlugin_fired <= 1'b0; + CfuPlugin_bus_rsp_rValid <= 1'b0; + execute_arbitration_isValid <= 1'b0; + memory_arbitration_isValid <= 1'b0; + writeBack_arbitration_isValid <= 1'b0; + execute_to_memory_CfuPlugin_CFU_IN_FLIGHT <= 1'b0; + _zz_iBusWishbone_ADR <= 3'b000; + _zz_iBus_rsp_valid <= 1'b0; + dBus_cmd_rValid <= 1'b0; + end else begin + if(IBusCachedPlugin_fetchPc_correction) begin + IBusCachedPlugin_fetchPc_correctionReg <= 1'b1; + end + if(IBusCachedPlugin_fetchPc_output_fire) begin + IBusCachedPlugin_fetchPc_correctionReg <= 1'b0; + end + IBusCachedPlugin_fetchPc_booted <= 1'b1; + if(when_Fetcher_l131) begin + IBusCachedPlugin_fetchPc_inc <= 1'b0; + end + if(IBusCachedPlugin_fetchPc_output_fire_1) begin + IBusCachedPlugin_fetchPc_inc <= 1'b1; + end + if(when_Fetcher_l131_1) begin + IBusCachedPlugin_fetchPc_inc <= 1'b0; + end + if(when_Fetcher_l158) begin + IBusCachedPlugin_fetchPc_pcReg <= IBusCachedPlugin_fetchPc_pc; + end + if(IBusCachedPlugin_iBusRsp_flush) begin + _zz_IBusCachedPlugin_iBusRsp_stages_0_output_ready_2 <= 1'b0; + end + if(_zz_IBusCachedPlugin_iBusRsp_stages_0_output_ready) begin + _zz_IBusCachedPlugin_iBusRsp_stages_0_output_ready_2 <= (IBusCachedPlugin_iBusRsp_stages_0_output_valid && (! 1'b0)); + end + if(IBusCachedPlugin_iBusRsp_flush) begin + _zz_IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_valid <= 1'b0; + end + if(IBusCachedPlugin_iBusRsp_stages_1_output_ready) begin + _zz_IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_valid <= (IBusCachedPlugin_iBusRsp_stages_1_output_valid && (! IBusCachedPlugin_iBusRsp_flush)); + end + if(IBusCachedPlugin_fetchPc_flushed) begin + IBusCachedPlugin_injector_nextPcCalc_valids_0 <= 1'b0; + end + if(when_Fetcher_l329) begin + IBusCachedPlugin_injector_nextPcCalc_valids_0 <= 1'b1; + end + if(IBusCachedPlugin_fetchPc_flushed) begin + IBusCachedPlugin_injector_nextPcCalc_valids_1 <= 1'b0; + end + if(when_Fetcher_l329_1) begin + IBusCachedPlugin_injector_nextPcCalc_valids_1 <= IBusCachedPlugin_injector_nextPcCalc_valids_0; + end + if(IBusCachedPlugin_fetchPc_flushed) begin + IBusCachedPlugin_injector_nextPcCalc_valids_1 <= 1'b0; + end + if(IBusCachedPlugin_fetchPc_flushed) begin + IBusCachedPlugin_injector_nextPcCalc_valids_2 <= 1'b0; + end + if(when_Fetcher_l329_2) begin + IBusCachedPlugin_injector_nextPcCalc_valids_2 <= IBusCachedPlugin_injector_nextPcCalc_valids_1; + end + if(IBusCachedPlugin_fetchPc_flushed) begin + IBusCachedPlugin_injector_nextPcCalc_valids_2 <= 1'b0; + end + if(IBusCachedPlugin_fetchPc_flushed) begin + IBusCachedPlugin_injector_nextPcCalc_valids_3 <= 1'b0; + end + if(when_Fetcher_l329_3) begin + IBusCachedPlugin_injector_nextPcCalc_valids_3 <= IBusCachedPlugin_injector_nextPcCalc_valids_2; + end + if(IBusCachedPlugin_fetchPc_flushed) begin + IBusCachedPlugin_injector_nextPcCalc_valids_3 <= 1'b0; + end + if(IBusCachedPlugin_fetchPc_flushed) begin + IBusCachedPlugin_injector_nextPcCalc_valids_4 <= 1'b0; + end + if(when_Fetcher_l329_4) begin + IBusCachedPlugin_injector_nextPcCalc_valids_4 <= IBusCachedPlugin_injector_nextPcCalc_valids_3; + end + if(IBusCachedPlugin_fetchPc_flushed) begin + IBusCachedPlugin_injector_nextPcCalc_valids_4 <= 1'b0; + end + if(iBus_rsp_valid) begin + IBusCachedPlugin_rspCounter <= (IBusCachedPlugin_rspCounter + 32'h00000001); + end + `ifndef SYNTHESIS + `ifdef FORMAL + assert((! (((dBus_rsp_ready && memory_MEMORY_ENABLE) && memory_arbitration_isValid) && memory_arbitration_isStuck))); + `else + if(!(! (((dBus_rsp_ready && memory_MEMORY_ENABLE) && memory_arbitration_isValid) && memory_arbitration_isStuck))) begin + $display("FAILURE DBusSimplePlugin doesn't allow memory stage stall when read happend"); + $finish; + end + `endif + `endif + `ifndef SYNTHESIS + `ifdef FORMAL + assert((! (((writeBack_arbitration_isValid && writeBack_MEMORY_ENABLE) && (! writeBack_MEMORY_STORE)) && writeBack_arbitration_isStuck))); + `else + if(!(! (((writeBack_arbitration_isValid && writeBack_MEMORY_ENABLE) && (! writeBack_MEMORY_STORE)) && writeBack_arbitration_isStuck))) begin + $display("FAILURE DBusSimplePlugin doesn't allow writeback stage stall when read happend"); + $finish; + end + `endif + `endif + _zz_2 <= 1'b0; + HazardSimplePlugin_writeBackBuffer_valid <= HazardSimplePlugin_writeBackWrites_valid; + if(when_CsrPlugin_l909) begin + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_decode <= 1'b0; + end else begin + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_decode <= CsrPlugin_exceptionPortCtrl_exceptionValids_decode; + end + if(when_CsrPlugin_l909_1) begin + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_execute <= (CsrPlugin_exceptionPortCtrl_exceptionValids_decode && (! decode_arbitration_isStuck)); + end else begin + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_execute <= CsrPlugin_exceptionPortCtrl_exceptionValids_execute; + end + if(when_CsrPlugin_l909_2) begin + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_memory <= (CsrPlugin_exceptionPortCtrl_exceptionValids_execute && (! execute_arbitration_isStuck)); + end else begin + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_memory <= CsrPlugin_exceptionPortCtrl_exceptionValids_memory; + end + if(when_CsrPlugin_l909_3) begin + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_writeBack <= (CsrPlugin_exceptionPortCtrl_exceptionValids_memory && (! memory_arbitration_isStuck)); + end else begin + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_writeBack <= 1'b0; + end + CsrPlugin_interrupt_valid <= 1'b0; + if(when_CsrPlugin_l946) begin + if(when_CsrPlugin_l952) begin + CsrPlugin_interrupt_valid <= 1'b1; + end + if(when_CsrPlugin_l952_1) begin + CsrPlugin_interrupt_valid <= 1'b1; + end + if(when_CsrPlugin_l952_2) begin + CsrPlugin_interrupt_valid <= 1'b1; + end + end + if(CsrPlugin_pipelineLiberator_active) begin + if(when_CsrPlugin_l980) begin + CsrPlugin_pipelineLiberator_pcValids_0 <= 1'b1; + end + if(when_CsrPlugin_l980_1) begin + CsrPlugin_pipelineLiberator_pcValids_1 <= CsrPlugin_pipelineLiberator_pcValids_0; + end + if(when_CsrPlugin_l980_2) begin + CsrPlugin_pipelineLiberator_pcValids_2 <= CsrPlugin_pipelineLiberator_pcValids_1; + end + end + if(when_CsrPlugin_l985) begin + CsrPlugin_pipelineLiberator_pcValids_0 <= 1'b0; + CsrPlugin_pipelineLiberator_pcValids_1 <= 1'b0; + CsrPlugin_pipelineLiberator_pcValids_2 <= 1'b0; + end + if(CsrPlugin_interruptJump) begin + CsrPlugin_interrupt_valid <= 1'b0; + end + CsrPlugin_hadException <= CsrPlugin_exception; + if(when_CsrPlugin_l1019) begin + case(CsrPlugin_targetPrivilege) + 2'b11 : begin + CsrPlugin_mstatus_MIE <= 1'b0; + CsrPlugin_mstatus_MPIE <= CsrPlugin_mstatus_MIE; + CsrPlugin_mstatus_MPP <= CsrPlugin_privilege; + end + default : begin + end + endcase + end + if(when_CsrPlugin_l1064) begin + case(switch_CsrPlugin_l1068) + 2'b11 : begin + CsrPlugin_mstatus_MPP <= 2'b00; + CsrPlugin_mstatus_MIE <= CsrPlugin_mstatus_MPIE; + CsrPlugin_mstatus_MPIE <= 1'b1; + end + default : begin + end + endcase + end + execute_CsrPlugin_wfiWake <= (({_zz_when_CsrPlugin_l952_2,{_zz_when_CsrPlugin_l952_1,_zz_when_CsrPlugin_l952}} != 3'b000) || CsrPlugin_thirdPartyWake); + if(execute_CfuPlugin_schedule) begin + execute_CfuPlugin_hold <= 1'b1; + end + if(CfuPlugin_bus_cmd_ready) begin + execute_CfuPlugin_hold <= 1'b0; + end + if(CfuPlugin_bus_cmd_fire) begin + execute_CfuPlugin_fired <= 1'b1; + end + if(when_CfuPlugin_l171) begin + execute_CfuPlugin_fired <= 1'b0; + end + if(CfuPlugin_bus_rsp_valid) begin + CfuPlugin_bus_rsp_rValid <= 1'b1; + end + if(CfuPlugin_bus_rsp_rsp_ready) begin + CfuPlugin_bus_rsp_rValid <= 1'b0; + end + if(when_Pipeline_l124_54) begin + execute_to_memory_CfuPlugin_CFU_IN_FLIGHT <= _zz_execute_to_memory_CfuPlugin_CFU_IN_FLIGHT; + end + if(when_Pipeline_l151) begin + execute_arbitration_isValid <= 1'b0; + end + if(when_Pipeline_l154) begin + execute_arbitration_isValid <= decode_arbitration_isValid; + end + if(when_Pipeline_l151_1) begin + memory_arbitration_isValid <= 1'b0; + end + if(when_Pipeline_l154_1) begin + memory_arbitration_isValid <= execute_arbitration_isValid; + end + if(when_Pipeline_l151_2) begin + writeBack_arbitration_isValid <= 1'b0; + end + if(when_Pipeline_l154_2) begin + writeBack_arbitration_isValid <= memory_arbitration_isValid; + end + if(execute_CsrPlugin_csr_768) begin + if(execute_CsrPlugin_writeEnable) begin + CsrPlugin_mstatus_MPP <= CsrPlugin_csrMapping_writeDataSignal[12 : 11]; + CsrPlugin_mstatus_MPIE <= CsrPlugin_csrMapping_writeDataSignal[7]; + CsrPlugin_mstatus_MIE <= CsrPlugin_csrMapping_writeDataSignal[3]; + end + end + if(execute_CsrPlugin_csr_772) begin + if(execute_CsrPlugin_writeEnable) begin + CsrPlugin_mie_MEIE <= CsrPlugin_csrMapping_writeDataSignal[11]; + CsrPlugin_mie_MTIE <= CsrPlugin_csrMapping_writeDataSignal[7]; + CsrPlugin_mie_MSIE <= CsrPlugin_csrMapping_writeDataSignal[3]; + end + end + if(execute_CsrPlugin_csr_3008) begin + if(execute_CsrPlugin_writeEnable) begin + _zz_CsrPlugin_csrMapping_readDataInit <= CsrPlugin_csrMapping_writeDataSignal[31 : 0]; + end + end + if(when_InstructionCache_l239) begin + if(iBusWishbone_ACK) begin + _zz_iBusWishbone_ADR <= (_zz_iBusWishbone_ADR + 3'b001); + end + end + _zz_iBus_rsp_valid <= (iBusWishbone_CYC && iBusWishbone_ACK); + if(dBus_cmd_valid) begin + dBus_cmd_rValid <= 1'b1; + end + if(dBus_cmd_halfPipe_fire) begin + dBus_cmd_rValid <= 1'b0; + end + end + end + + always @(posedge clk) begin + if(IBusCachedPlugin_iBusRsp_stages_1_output_ready) begin + _zz_IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_payload <= IBusCachedPlugin_iBusRsp_stages_1_output_payload; + end + if(IBusCachedPlugin_iBusRsp_stages_1_input_ready) begin + IBusCachedPlugin_s1_tightlyCoupledHit <= IBusCachedPlugin_s0_tightlyCoupledHit; + end + if(IBusCachedPlugin_iBusRsp_stages_2_input_ready) begin + IBusCachedPlugin_s2_tightlyCoupledHit <= IBusCachedPlugin_s1_tightlyCoupledHit; + end + HazardSimplePlugin_writeBackBuffer_payload_address <= HazardSimplePlugin_writeBackWrites_payload_address; + HazardSimplePlugin_writeBackBuffer_payload_data <= HazardSimplePlugin_writeBackWrites_payload_data; + CsrPlugin_mip_MEIP <= externalInterrupt; + CsrPlugin_mip_MTIP <= timerInterrupt; + CsrPlugin_mip_MSIP <= softwareInterrupt; + CsrPlugin_mcycle <= (CsrPlugin_mcycle + 64'h0000000000000001); + if(writeBack_arbitration_isFiring) begin + CsrPlugin_minstret <= (CsrPlugin_minstret + 64'h0000000000000001); + end + if(decodeExceptionPort_valid) begin + CsrPlugin_exceptionPortCtrl_exceptionContext_code <= decodeExceptionPort_payload_code; + CsrPlugin_exceptionPortCtrl_exceptionContext_badAddr <= decodeExceptionPort_payload_badAddr; + end + if(CsrPlugin_selfException_valid) begin + CsrPlugin_exceptionPortCtrl_exceptionContext_code <= CsrPlugin_selfException_payload_code; + CsrPlugin_exceptionPortCtrl_exceptionContext_badAddr <= CsrPlugin_selfException_payload_badAddr; + end + if(when_CsrPlugin_l946) begin + if(when_CsrPlugin_l952) begin + CsrPlugin_interrupt_code <= 4'b0111; + CsrPlugin_interrupt_targetPrivilege <= 2'b11; + end + if(when_CsrPlugin_l952_1) begin + CsrPlugin_interrupt_code <= 4'b0011; + CsrPlugin_interrupt_targetPrivilege <= 2'b11; + end + if(when_CsrPlugin_l952_2) begin + CsrPlugin_interrupt_code <= 4'b1011; + CsrPlugin_interrupt_targetPrivilege <= 2'b11; + end + end + if(when_CsrPlugin_l1019) begin + case(CsrPlugin_targetPrivilege) + 2'b11 : begin + CsrPlugin_mcause_interrupt <= (! CsrPlugin_hadException); + CsrPlugin_mcause_exceptionCode <= CsrPlugin_trapCause; + CsrPlugin_mepc <= writeBack_PC; + if(CsrPlugin_hadException) begin + CsrPlugin_mtval <= CsrPlugin_exceptionPortCtrl_exceptionContext_badAddr; + end + end + default : begin + end + endcase + end + externalInterruptArray_regNext <= externalInterruptArray; + if(CfuPlugin_bus_rsp_ready) begin + CfuPlugin_bus_rsp_rData_outputs_0 <= CfuPlugin_bus_rsp_payload_outputs_0; + end + if(when_Pipeline_l124) begin + decode_to_execute_PC <= decode_PC; + end + if(when_Pipeline_l124_1) begin + execute_to_memory_PC <= _zz_execute_SRC2; + end + if(when_Pipeline_l124_2) begin + memory_to_writeBack_PC <= memory_PC; + end + if(when_Pipeline_l124_3) begin + decode_to_execute_INSTRUCTION <= decode_INSTRUCTION; + end + if(when_Pipeline_l124_4) begin + execute_to_memory_INSTRUCTION <= execute_INSTRUCTION; + end + if(when_Pipeline_l124_5) begin + memory_to_writeBack_INSTRUCTION <= memory_INSTRUCTION; + end + if(when_Pipeline_l124_6) begin + decode_to_execute_FORMAL_PC_NEXT <= decode_FORMAL_PC_NEXT; + end + if(when_Pipeline_l124_7) begin + execute_to_memory_FORMAL_PC_NEXT <= _zz_execute_to_memory_FORMAL_PC_NEXT; + end + if(when_Pipeline_l124_8) begin + memory_to_writeBack_FORMAL_PC_NEXT <= memory_FORMAL_PC_NEXT; + end + if(when_Pipeline_l124_9) begin + decode_to_execute_SRC1_CTRL <= _zz_decode_to_execute_SRC1_CTRL; + end + if(when_Pipeline_l124_10) begin + decode_to_execute_SRC_USE_SUB_LESS <= decode_SRC_USE_SUB_LESS; + end + if(when_Pipeline_l124_11) begin + decode_to_execute_MEMORY_ENABLE <= decode_MEMORY_ENABLE; + end + if(when_Pipeline_l124_12) begin + execute_to_memory_MEMORY_ENABLE <= execute_MEMORY_ENABLE; + end + if(when_Pipeline_l124_13) begin + memory_to_writeBack_MEMORY_ENABLE <= memory_MEMORY_ENABLE; + end + if(when_Pipeline_l124_14) begin + decode_to_execute_SRC2_CTRL <= _zz_decode_to_execute_SRC2_CTRL; + end + if(when_Pipeline_l124_15) begin + decode_to_execute_REGFILE_WRITE_VALID <= decode_REGFILE_WRITE_VALID; + end + if(when_Pipeline_l124_16) begin + execute_to_memory_REGFILE_WRITE_VALID <= execute_REGFILE_WRITE_VALID; + end + if(when_Pipeline_l124_17) begin + memory_to_writeBack_REGFILE_WRITE_VALID <= memory_REGFILE_WRITE_VALID; + end + if(when_Pipeline_l124_18) begin + decode_to_execute_BYPASSABLE_EXECUTE_STAGE <= decode_BYPASSABLE_EXECUTE_STAGE; + end + if(when_Pipeline_l124_19) begin + decode_to_execute_BYPASSABLE_MEMORY_STAGE <= decode_BYPASSABLE_MEMORY_STAGE; + end + if(when_Pipeline_l124_20) begin + execute_to_memory_BYPASSABLE_MEMORY_STAGE <= execute_BYPASSABLE_MEMORY_STAGE; + end + if(when_Pipeline_l124_21) begin + decode_to_execute_MEMORY_STORE <= decode_MEMORY_STORE; + end + if(when_Pipeline_l124_22) begin + execute_to_memory_MEMORY_STORE <= execute_MEMORY_STORE; + end + if(when_Pipeline_l124_23) begin + memory_to_writeBack_MEMORY_STORE <= memory_MEMORY_STORE; + end + if(when_Pipeline_l124_24) begin + decode_to_execute_ALU_CTRL <= _zz_decode_to_execute_ALU_CTRL; + end + if(when_Pipeline_l124_25) begin + decode_to_execute_SRC_LESS_UNSIGNED <= decode_SRC_LESS_UNSIGNED; + end + if(when_Pipeline_l124_26) begin + decode_to_execute_ALU_BITWISE_CTRL <= _zz_decode_to_execute_ALU_BITWISE_CTRL; + end + if(when_Pipeline_l124_27) begin + decode_to_execute_SHIFT_CTRL <= _zz_decode_to_execute_SHIFT_CTRL; + end + if(when_Pipeline_l124_28) begin + execute_to_memory_SHIFT_CTRL <= _zz_execute_to_memory_SHIFT_CTRL; + end + if(when_Pipeline_l124_29) begin + decode_to_execute_BRANCH_CTRL <= _zz_decode_to_execute_BRANCH_CTRL; + end + if(when_Pipeline_l124_30) begin + decode_to_execute_IS_CSR <= decode_IS_CSR; + end + if(when_Pipeline_l124_31) begin + decode_to_execute_ENV_CTRL <= _zz_decode_to_execute_ENV_CTRL; + end + if(when_Pipeline_l124_32) begin + execute_to_memory_ENV_CTRL <= _zz_execute_to_memory_ENV_CTRL; + end + if(when_Pipeline_l124_33) begin + memory_to_writeBack_ENV_CTRL <= _zz_memory_to_writeBack_ENV_CTRL; + end + if(when_Pipeline_l124_34) begin + decode_to_execute_IS_MUL <= decode_IS_MUL; + end + if(when_Pipeline_l124_35) begin + execute_to_memory_IS_MUL <= execute_IS_MUL; + end + if(when_Pipeline_l124_36) begin + memory_to_writeBack_IS_MUL <= memory_IS_MUL; + end + if(when_Pipeline_l124_37) begin + decode_to_execute_CfuPlugin_CFU_ENABLE <= decode_CfuPlugin_CFU_ENABLE; + end + if(when_Pipeline_l124_38) begin + decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND <= _zz_decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND; + end + if(when_Pipeline_l124_39) begin + decode_to_execute_RS1 <= decode_RS1; + end + if(when_Pipeline_l124_40) begin + decode_to_execute_RS2 <= decode_RS2; + end + if(when_Pipeline_l124_41) begin + decode_to_execute_SRC2_FORCE_ZERO <= decode_SRC2_FORCE_ZERO; + end + if(when_Pipeline_l124_42) begin + decode_to_execute_CSR_WRITE_OPCODE <= decode_CSR_WRITE_OPCODE; + end + if(when_Pipeline_l124_43) begin + decode_to_execute_CSR_READ_OPCODE <= decode_CSR_READ_OPCODE; + end + if(when_Pipeline_l124_44) begin + execute_to_memory_MEMORY_ADDRESS_LOW <= execute_MEMORY_ADDRESS_LOW; + end + if(when_Pipeline_l124_45) begin + memory_to_writeBack_MEMORY_ADDRESS_LOW <= memory_MEMORY_ADDRESS_LOW; + end + if(when_Pipeline_l124_46) begin + execute_to_memory_REGFILE_WRITE_DATA <= _zz_execute_to_memory_REGFILE_WRITE_DATA; + end + if(when_Pipeline_l124_47) begin + memory_to_writeBack_REGFILE_WRITE_DATA <= _zz_memory_to_writeBack_REGFILE_WRITE_DATA; + end + if(when_Pipeline_l124_48) begin + execute_to_memory_SHIFT_RIGHT <= execute_SHIFT_RIGHT; + end + if(when_Pipeline_l124_49) begin + execute_to_memory_MUL_LL <= execute_MUL_LL; + end + if(when_Pipeline_l124_50) begin + execute_to_memory_MUL_LH <= execute_MUL_LH; + end + if(when_Pipeline_l124_51) begin + execute_to_memory_MUL_HL <= execute_MUL_HL; + end + if(when_Pipeline_l124_52) begin + execute_to_memory_MUL_HH <= execute_MUL_HH; + end + if(when_Pipeline_l124_53) begin + memory_to_writeBack_MUL_HH <= memory_MUL_HH; + end + if(when_Pipeline_l124_55) begin + memory_to_writeBack_CfuPlugin_CFU_IN_FLIGHT <= _zz_memory_to_writeBack_CfuPlugin_CFU_IN_FLIGHT; + end + if(when_Pipeline_l124_56) begin + memory_to_writeBack_MEMORY_READ_DATA <= memory_MEMORY_READ_DATA; + end + if(when_Pipeline_l124_57) begin + memory_to_writeBack_MUL_LOW <= memory_MUL_LOW; + end + if(when_CsrPlugin_l1264) begin + execute_CsrPlugin_csr_768 <= (decode_INSTRUCTION[31 : 20] == 12'h300); + end + if(when_CsrPlugin_l1264_1) begin + execute_CsrPlugin_csr_836 <= (decode_INSTRUCTION[31 : 20] == 12'h344); + end + if(when_CsrPlugin_l1264_2) begin + execute_CsrPlugin_csr_772 <= (decode_INSTRUCTION[31 : 20] == 12'h304); + end + if(when_CsrPlugin_l1264_3) begin + execute_CsrPlugin_csr_773 <= (decode_INSTRUCTION[31 : 20] == 12'h305); + end + if(when_CsrPlugin_l1264_4) begin + execute_CsrPlugin_csr_833 <= (decode_INSTRUCTION[31 : 20] == 12'h341); + end + if(when_CsrPlugin_l1264_5) begin + execute_CsrPlugin_csr_834 <= (decode_INSTRUCTION[31 : 20] == 12'h342); + end + if(when_CsrPlugin_l1264_6) begin + execute_CsrPlugin_csr_835 <= (decode_INSTRUCTION[31 : 20] == 12'h343); + end + if(when_CsrPlugin_l1264_7) begin + execute_CsrPlugin_csr_2816 <= (decode_INSTRUCTION[31 : 20] == 12'hb00); + end + if(when_CsrPlugin_l1264_8) begin + execute_CsrPlugin_csr_2944 <= (decode_INSTRUCTION[31 : 20] == 12'hb80); + end + if(when_CsrPlugin_l1264_9) begin + execute_CsrPlugin_csr_3008 <= (decode_INSTRUCTION[31 : 20] == 12'hbc0); + end + if(when_CsrPlugin_l1264_10) begin + execute_CsrPlugin_csr_4032 <= (decode_INSTRUCTION[31 : 20] == 12'hfc0); + end + if(execute_CsrPlugin_csr_836) begin + if(execute_CsrPlugin_writeEnable) begin + CsrPlugin_mip_MSIP <= CsrPlugin_csrMapping_writeDataSignal[3]; + end + end + if(execute_CsrPlugin_csr_773) begin + if(execute_CsrPlugin_writeEnable) begin + CsrPlugin_mtvec_base <= CsrPlugin_csrMapping_writeDataSignal[31 : 2]; + CsrPlugin_mtvec_mode <= CsrPlugin_csrMapping_writeDataSignal[1 : 0]; + end + end + if(execute_CsrPlugin_csr_833) begin + if(execute_CsrPlugin_writeEnable) begin + CsrPlugin_mepc <= CsrPlugin_csrMapping_writeDataSignal[31 : 0]; + end + end + iBusWishbone_DAT_MISO_regNext <= iBusWishbone_DAT_MISO; + if(dBus_cmd_ready) begin + dBus_cmd_rData_wr <= dBus_cmd_payload_wr; + dBus_cmd_rData_address <= dBus_cmd_payload_address; + dBus_cmd_rData_data <= dBus_cmd_payload_data; + dBus_cmd_rData_size <= dBus_cmd_payload_size; + end + end + + +endmodule + +module InstructionCache ( + input io_flush, + input io_cpu_prefetch_isValid, + output reg io_cpu_prefetch_haltIt, + input [31:0] io_cpu_prefetch_pc, + input io_cpu_fetch_isValid, + input io_cpu_fetch_isStuck, + input io_cpu_fetch_isRemoved, + input [31:0] io_cpu_fetch_pc, + output [31:0] io_cpu_fetch_data, + input [31:0] io_cpu_fetch_mmuRsp_physicalAddress, + input io_cpu_fetch_mmuRsp_isIoAccess, + input io_cpu_fetch_mmuRsp_isPaging, + input io_cpu_fetch_mmuRsp_allowRead, + input io_cpu_fetch_mmuRsp_allowWrite, + input io_cpu_fetch_mmuRsp_allowExecute, + input io_cpu_fetch_mmuRsp_exception, + input io_cpu_fetch_mmuRsp_refilling, + input io_cpu_fetch_mmuRsp_bypassTranslation, + output [31:0] io_cpu_fetch_physicalAddress, + input io_cpu_decode_isValid, + input io_cpu_decode_isStuck, + input [31:0] io_cpu_decode_pc, + output [31:0] io_cpu_decode_physicalAddress, + output [31:0] io_cpu_decode_data, + output io_cpu_decode_cacheMiss, + output io_cpu_decode_error, + output io_cpu_decode_mmuRefilling, + output io_cpu_decode_mmuException, + input io_cpu_decode_isUser, + input io_cpu_fill_valid, + input [31:0] io_cpu_fill_payload, + output io_mem_cmd_valid, + input io_mem_cmd_ready, + output [31:0] io_mem_cmd_payload_address, + output [2:0] io_mem_cmd_payload_size, + input io_mem_rsp_valid, + input [31:0] io_mem_rsp_payload_data, + input io_mem_rsp_payload_error, + input clk, + input reset +); + reg [31:0] _zz_banks_0_port1; + reg [22:0] _zz_ways_0_tags_port1; + wire [22:0] _zz_ways_0_tags_port; + reg _zz_1; + reg _zz_2; + reg lineLoader_fire; + reg lineLoader_valid; + (* keep , syn_keep *) reg [31:0] lineLoader_address /* synthesis syn_keep = 1 */ ; + reg lineLoader_hadError; + reg lineLoader_flushPending; + reg [6:0] lineLoader_flushCounter; + wire when_InstructionCache_l338; + reg _zz_when_InstructionCache_l342; + wire when_InstructionCache_l342; + wire when_InstructionCache_l351; + reg lineLoader_cmdSent; + wire io_mem_cmd_fire; + wire when_Utils_l357; + reg lineLoader_wayToAllocate_willIncrement; + wire lineLoader_wayToAllocate_willClear; + wire lineLoader_wayToAllocate_willOverflowIfInc; + wire lineLoader_wayToAllocate_willOverflow; + (* keep , syn_keep *) reg [2:0] lineLoader_wordIndex /* synthesis syn_keep = 1 */ ; + wire lineLoader_write_tag_0_valid; + wire [5:0] lineLoader_write_tag_0_payload_address; + wire lineLoader_write_tag_0_payload_data_valid; + wire lineLoader_write_tag_0_payload_data_error; + wire [20:0] lineLoader_write_tag_0_payload_data_address; + wire lineLoader_write_data_0_valid; + wire [8:0] lineLoader_write_data_0_payload_address; + wire [31:0] lineLoader_write_data_0_payload_data; + wire when_InstructionCache_l401; + wire [8:0] _zz_fetchStage_read_banksValue_0_dataMem; + wire _zz_fetchStage_read_banksValue_0_dataMem_1; + wire [31:0] fetchStage_read_banksValue_0_dataMem; + wire [31:0] fetchStage_read_banksValue_0_data; + wire [5:0] _zz_fetchStage_read_waysValues_0_tag_valid; + wire _zz_fetchStage_read_waysValues_0_tag_valid_1; + wire fetchStage_read_waysValues_0_tag_valid; + wire fetchStage_read_waysValues_0_tag_error; + wire [20:0] fetchStage_read_waysValues_0_tag_address; + wire [22:0] _zz_fetchStage_read_waysValues_0_tag_valid_2; + wire fetchStage_hit_hits_0; + wire fetchStage_hit_valid; + wire fetchStage_hit_error; + wire [31:0] fetchStage_hit_data; + wire [31:0] fetchStage_hit_word; + wire when_InstructionCache_l435; + reg [31:0] io_cpu_fetch_data_regNextWhen; + wire when_InstructionCache_l459; + reg [31:0] decodeStage_mmuRsp_physicalAddress; + reg decodeStage_mmuRsp_isIoAccess; + reg decodeStage_mmuRsp_isPaging; + reg decodeStage_mmuRsp_allowRead; + reg decodeStage_mmuRsp_allowWrite; + reg decodeStage_mmuRsp_allowExecute; + reg decodeStage_mmuRsp_exception; + reg decodeStage_mmuRsp_refilling; + reg decodeStage_mmuRsp_bypassTranslation; + wire when_InstructionCache_l459_1; + reg decodeStage_hit_valid; + wire when_InstructionCache_l459_2; + reg decodeStage_hit_error; + (* ram_style = "block" *) reg [31:0] banks_0 [0:511]; + (* ram_style = "block" *) reg [22:0] ways_0_tags [0:63]; + + assign _zz_ways_0_tags_port = {lineLoader_write_tag_0_payload_data_address,{lineLoader_write_tag_0_payload_data_error,lineLoader_write_tag_0_payload_data_valid}}; + always @(posedge clk) begin + if(_zz_1) begin + banks_0[lineLoader_write_data_0_payload_address] <= lineLoader_write_data_0_payload_data; + end + end + + always @(posedge clk) begin + if(_zz_fetchStage_read_banksValue_0_dataMem_1) begin + _zz_banks_0_port1 <= banks_0[_zz_fetchStage_read_banksValue_0_dataMem]; + end + end + + always @(posedge clk) begin + if(_zz_2) begin + ways_0_tags[lineLoader_write_tag_0_payload_address] <= _zz_ways_0_tags_port; + end + end + + always @(posedge clk) begin + if(_zz_fetchStage_read_waysValues_0_tag_valid_1) begin + _zz_ways_0_tags_port1 <= ways_0_tags[_zz_fetchStage_read_waysValues_0_tag_valid]; + end + end + + always @(*) begin + _zz_1 = 1'b0; + if(lineLoader_write_data_0_valid) begin + _zz_1 = 1'b1; + end + end + + always @(*) begin + _zz_2 = 1'b0; + if(lineLoader_write_tag_0_valid) begin + _zz_2 = 1'b1; + end + end + + always @(*) begin + lineLoader_fire = 1'b0; + if(io_mem_rsp_valid) begin + if(when_InstructionCache_l401) begin + lineLoader_fire = 1'b1; + end + end + end + + always @(*) begin + io_cpu_prefetch_haltIt = (lineLoader_valid || lineLoader_flushPending); + if(when_InstructionCache_l338) begin + io_cpu_prefetch_haltIt = 1'b1; + end + if(when_InstructionCache_l342) begin + io_cpu_prefetch_haltIt = 1'b1; + end + if(io_flush) begin + io_cpu_prefetch_haltIt = 1'b1; + end + end + + assign when_InstructionCache_l338 = (! lineLoader_flushCounter[6]); + assign when_InstructionCache_l342 = (! _zz_when_InstructionCache_l342); + assign when_InstructionCache_l351 = (lineLoader_flushPending && (! (lineLoader_valid || io_cpu_fetch_isValid))); + assign io_mem_cmd_fire = (io_mem_cmd_valid && io_mem_cmd_ready); + assign io_mem_cmd_valid = (lineLoader_valid && (! lineLoader_cmdSent)); + assign io_mem_cmd_payload_address = {lineLoader_address[31 : 5],5'h0}; + assign io_mem_cmd_payload_size = 3'b101; + assign when_Utils_l357 = (! lineLoader_valid); + always @(*) begin + lineLoader_wayToAllocate_willIncrement = 1'b0; + if(when_Utils_l357) begin + lineLoader_wayToAllocate_willIncrement = 1'b1; + end + end + + assign lineLoader_wayToAllocate_willClear = 1'b0; + assign lineLoader_wayToAllocate_willOverflowIfInc = 1'b1; + assign lineLoader_wayToAllocate_willOverflow = (lineLoader_wayToAllocate_willOverflowIfInc && lineLoader_wayToAllocate_willIncrement); + assign lineLoader_write_tag_0_valid = ((1'b1 && lineLoader_fire) || (! lineLoader_flushCounter[6])); + assign lineLoader_write_tag_0_payload_address = (lineLoader_flushCounter[6] ? lineLoader_address[10 : 5] : lineLoader_flushCounter[5 : 0]); + assign lineLoader_write_tag_0_payload_data_valid = lineLoader_flushCounter[6]; + assign lineLoader_write_tag_0_payload_data_error = (lineLoader_hadError || io_mem_rsp_payload_error); + assign lineLoader_write_tag_0_payload_data_address = lineLoader_address[31 : 11]; + assign lineLoader_write_data_0_valid = (io_mem_rsp_valid && 1'b1); + assign lineLoader_write_data_0_payload_address = {lineLoader_address[10 : 5],lineLoader_wordIndex}; + assign lineLoader_write_data_0_payload_data = io_mem_rsp_payload_data; + assign when_InstructionCache_l401 = (lineLoader_wordIndex == 3'b111); + assign _zz_fetchStage_read_banksValue_0_dataMem = io_cpu_prefetch_pc[10 : 2]; + assign _zz_fetchStage_read_banksValue_0_dataMem_1 = (! io_cpu_fetch_isStuck); + assign fetchStage_read_banksValue_0_dataMem = _zz_banks_0_port1; + assign fetchStage_read_banksValue_0_data = fetchStage_read_banksValue_0_dataMem[31 : 0]; + assign _zz_fetchStage_read_waysValues_0_tag_valid = io_cpu_prefetch_pc[10 : 5]; + assign _zz_fetchStage_read_waysValues_0_tag_valid_1 = (! io_cpu_fetch_isStuck); + assign _zz_fetchStage_read_waysValues_0_tag_valid_2 = _zz_ways_0_tags_port1; + assign fetchStage_read_waysValues_0_tag_valid = _zz_fetchStage_read_waysValues_0_tag_valid_2[0]; + assign fetchStage_read_waysValues_0_tag_error = _zz_fetchStage_read_waysValues_0_tag_valid_2[1]; + assign fetchStage_read_waysValues_0_tag_address = _zz_fetchStage_read_waysValues_0_tag_valid_2[22 : 2]; + assign fetchStage_hit_hits_0 = (fetchStage_read_waysValues_0_tag_valid && (fetchStage_read_waysValues_0_tag_address == io_cpu_fetch_mmuRsp_physicalAddress[31 : 11])); + assign fetchStage_hit_valid = (fetchStage_hit_hits_0 != 1'b0); + assign fetchStage_hit_error = fetchStage_read_waysValues_0_tag_error; + assign fetchStage_hit_data = fetchStage_read_banksValue_0_data; + assign fetchStage_hit_word = fetchStage_hit_data; + assign io_cpu_fetch_data = fetchStage_hit_word; + assign when_InstructionCache_l435 = (! io_cpu_decode_isStuck); + assign io_cpu_decode_data = io_cpu_fetch_data_regNextWhen; + assign io_cpu_fetch_physicalAddress = io_cpu_fetch_mmuRsp_physicalAddress; + assign when_InstructionCache_l459 = (! io_cpu_decode_isStuck); + assign when_InstructionCache_l459_1 = (! io_cpu_decode_isStuck); + assign when_InstructionCache_l459_2 = (! io_cpu_decode_isStuck); + assign io_cpu_decode_cacheMiss = (! decodeStage_hit_valid); + assign io_cpu_decode_error = (decodeStage_hit_error || ((! decodeStage_mmuRsp_isPaging) && (decodeStage_mmuRsp_exception || (! decodeStage_mmuRsp_allowExecute)))); + assign io_cpu_decode_mmuRefilling = decodeStage_mmuRsp_refilling; + assign io_cpu_decode_mmuException = (((! decodeStage_mmuRsp_refilling) && decodeStage_mmuRsp_isPaging) && (decodeStage_mmuRsp_exception || (! decodeStage_mmuRsp_allowExecute))); + assign io_cpu_decode_physicalAddress = decodeStage_mmuRsp_physicalAddress; + always @(posedge clk) begin + if(reset) begin + lineLoader_valid <= 1'b0; + lineLoader_hadError <= 1'b0; + lineLoader_flushPending <= 1'b1; + lineLoader_cmdSent <= 1'b0; + lineLoader_wordIndex <= 3'b000; + end else begin + if(lineLoader_fire) begin + lineLoader_valid <= 1'b0; + end + if(lineLoader_fire) begin + lineLoader_hadError <= 1'b0; + end + if(io_cpu_fill_valid) begin + lineLoader_valid <= 1'b1; + end + if(io_flush) begin + lineLoader_flushPending <= 1'b1; + end + if(when_InstructionCache_l351) begin + lineLoader_flushPending <= 1'b0; + end + if(io_mem_cmd_fire) begin + lineLoader_cmdSent <= 1'b1; + end + if(lineLoader_fire) begin + lineLoader_cmdSent <= 1'b0; + end + if(io_mem_rsp_valid) begin + lineLoader_wordIndex <= (lineLoader_wordIndex + 3'b001); + if(io_mem_rsp_payload_error) begin + lineLoader_hadError <= 1'b1; + end + end + end + end + + always @(posedge clk) begin + if(io_cpu_fill_valid) begin + lineLoader_address <= io_cpu_fill_payload; + end + if(when_InstructionCache_l338) begin + lineLoader_flushCounter <= (lineLoader_flushCounter + 7'h01); + end + _zz_when_InstructionCache_l342 <= lineLoader_flushCounter[6]; + if(when_InstructionCache_l351) begin + lineLoader_flushCounter <= 7'h0; + end + if(when_InstructionCache_l435) begin + io_cpu_fetch_data_regNextWhen <= io_cpu_fetch_data; + end + if(when_InstructionCache_l459) begin + decodeStage_mmuRsp_physicalAddress <= io_cpu_fetch_mmuRsp_physicalAddress; + decodeStage_mmuRsp_isIoAccess <= io_cpu_fetch_mmuRsp_isIoAccess; + decodeStage_mmuRsp_isPaging <= io_cpu_fetch_mmuRsp_isPaging; + decodeStage_mmuRsp_allowRead <= io_cpu_fetch_mmuRsp_allowRead; + decodeStage_mmuRsp_allowWrite <= io_cpu_fetch_mmuRsp_allowWrite; + decodeStage_mmuRsp_allowExecute <= io_cpu_fetch_mmuRsp_allowExecute; + decodeStage_mmuRsp_exception <= io_cpu_fetch_mmuRsp_exception; + decodeStage_mmuRsp_refilling <= io_cpu_fetch_mmuRsp_refilling; + decodeStage_mmuRsp_bypassTranslation <= io_cpu_fetch_mmuRsp_bypassTranslation; + end + if(when_InstructionCache_l459_1) begin + decodeStage_hit_valid <= fetchStage_hit_valid; + end + if(when_InstructionCache_l459_2) begin + decodeStage_hit_error <= fetchStage_hit_error; + end + end + + +endmodule diff --git a/pythondata_cpu_vexriscv/verilog/VexRiscv_FomuCfu.yaml b/pythondata_cpu_vexriscv/verilog/VexRiscv_FomuCfu.yaml new file mode 100644 index 0000000..b55f8e5 --- /dev/null +++ b/pythondata_cpu_vexriscv/verilog/VexRiscv_FomuCfu.yaml @@ -0,0 +1,4 @@ +iBus: !!vexriscv.BusReport + flushInstructions: [4111, 19, 19, 19] + info: !!vexriscv.CacheReport {bytePerLine: 32, size: 2048} + kind: cached diff --git a/pythondata_cpu_vexriscv/verilog/VexRiscv_Full.v b/pythondata_cpu_vexriscv/verilog/VexRiscv_Full.v index 69eccef..ca6283f 100644 --- a/pythondata_cpu_vexriscv/verilog/VexRiscv_Full.v +++ b/pythondata_cpu_vexriscv/verilog/VexRiscv_Full.v @@ -1,6 +1,6 @@ // Generator : SpinalHDL v1.6.0 git head : 73c8d8e2b86b45646e9d0b2e729291f2b65e6be3 // Component : VexRiscv -// Git hash : 6276bf628be9d0a58c0284dca83137b71ef29098 +// Git hash : 593e180abf5ba39e7fa33d4f371646453f84496a `define EnvCtrlEnum_binary_sequential_type [1:0] diff --git a/pythondata_cpu_vexriscv/verilog/VexRiscv_FullCfu.v b/pythondata_cpu_vexriscv/verilog/VexRiscv_FullCfu.v index 5064ec7..c722c42 100644 --- a/pythondata_cpu_vexriscv/verilog/VexRiscv_FullCfu.v +++ b/pythondata_cpu_vexriscv/verilog/VexRiscv_FullCfu.v @@ -1,6 +1,6 @@ // Generator : SpinalHDL v1.6.0 git head : 73c8d8e2b86b45646e9d0b2e729291f2b65e6be3 // Component : VexRiscv -// Git hash : 6276bf628be9d0a58c0284dca83137b71ef29098 +// Git hash : 7454d1ac406f4e81ba8a81e164d3d67822e1b45b `define Input2Kind_binary_sequential_type [0:0] @@ -4863,7 +4863,7 @@ module VexRiscv ( always @(*) begin _zz_CsrPlugin_csrMapping_readDataInit_2 = 32'h0; if(execute_CsrPlugin_csr_3264) begin - _zz_CsrPlugin_csrMapping_readDataInit_2[12 : 0] = 13'h1000; + _zz_CsrPlugin_csrMapping_readDataInit_2[13 : 0] = 14'h2000; _zz_CsrPlugin_csrMapping_readDataInit_2[25 : 20] = 6'h20; end end @@ -5861,11 +5861,11 @@ module DataCache ( input clk, input reset ); - reg [21:0] _zz_ways_0_tags_port0; + reg [20:0] _zz_ways_0_tags_port0; reg [31:0] _zz_ways_0_data_port0; - wire [21:0] _zz_ways_0_tags_port; - wire [9:0] _zz_stage0_dataColisions; - wire [9:0] _zz__zz_stageA_dataColisions; + wire [20:0] _zz_ways_0_tags_port; + wire [10:0] _zz_stage0_dataColisions; + wire [10:0] _zz__zz_stageA_dataColisions; wire [0:0] _zz_when; wire [2:0] _zz_loader_counter_valueNext; wire [0:0] _zz_loader_counter_valueNext_1; @@ -5874,31 +5874,31 @@ module DataCache ( reg _zz_2; wire haltCpu; reg tagsReadCmd_valid; - reg [6:0] tagsReadCmd_payload; + reg [7:0] tagsReadCmd_payload; reg tagsWriteCmd_valid; reg [0:0] tagsWriteCmd_payload_way; - reg [6:0] tagsWriteCmd_payload_address; + reg [7:0] tagsWriteCmd_payload_address; reg tagsWriteCmd_payload_data_valid; reg tagsWriteCmd_payload_data_error; - reg [19:0] tagsWriteCmd_payload_data_address; + reg [18:0] tagsWriteCmd_payload_data_address; reg tagsWriteLastCmd_valid; reg [0:0] tagsWriteLastCmd_payload_way; - reg [6:0] tagsWriteLastCmd_payload_address; + reg [7:0] tagsWriteLastCmd_payload_address; reg tagsWriteLastCmd_payload_data_valid; reg tagsWriteLastCmd_payload_data_error; - reg [19:0] tagsWriteLastCmd_payload_data_address; + reg [18:0] tagsWriteLastCmd_payload_data_address; reg dataReadCmd_valid; - reg [9:0] dataReadCmd_payload; + reg [10:0] dataReadCmd_payload; reg dataWriteCmd_valid; reg [0:0] dataWriteCmd_payload_way; - reg [9:0] dataWriteCmd_payload_address; + reg [10:0] dataWriteCmd_payload_address; reg [31:0] dataWriteCmd_payload_data; reg [3:0] dataWriteCmd_payload_mask; wire _zz_ways_0_tagsReadRsp_valid; wire ways_0_tagsReadRsp_valid; wire ways_0_tagsReadRsp_error; - wire [19:0] ways_0_tagsReadRsp_address; - wire [21:0] _zz_ways_0_tagsReadRsp_valid_1; + wire [18:0] ways_0_tagsReadRsp_address; + wire [20:0] _zz_ways_0_tagsReadRsp_valid_1; wire _zz_ways_0_dataReadRspMem; wire [31:0] ways_0_dataReadRspMem; wire [31:0] ways_0_dataReadRsp; @@ -5948,7 +5948,7 @@ module DataCache ( wire when_DataCache_l813; reg stageB_tagsReadRsp_0_valid; reg stageB_tagsReadRsp_0_error; - reg [19:0] stageB_tagsReadRsp_0_address; + reg [18:0] stageB_tagsReadRsp_0_address; wire when_DataCache_l813_1; reg [31:0] stageB_dataReadRsp_0; wire when_DataCache_l812; @@ -5969,7 +5969,7 @@ module DataCache ( wire [31:0] stageB_ioMemRspMuxed; reg stageB_flusher_waitDone; wire stageB_flusher_hold; - reg [7:0] stageB_flusher_counter; + reg [8:0] stageB_flusher_counter; wire when_DataCache_l842; wire when_DataCache_l848; reg stageB_flusher_start; @@ -6008,18 +6008,18 @@ module DataCache ( reg loader_valid_regNext; wire when_DataCache_l1107; wire when_DataCache_l1110; - (* ram_style = "block" *) reg [21:0] ways_0_tags [0:127]; - (* ram_style = "block" *) reg [7:0] ways_0_data_symbol0 [0:1023]; - (* ram_style = "block" *) reg [7:0] ways_0_data_symbol1 [0:1023]; - (* ram_style = "block" *) reg [7:0] ways_0_data_symbol2 [0:1023]; - (* ram_style = "block" *) reg [7:0] ways_0_data_symbol3 [0:1023]; + (* ram_style = "block" *) reg [20:0] ways_0_tags [0:255]; + (* ram_style = "block" *) reg [7:0] ways_0_data_symbol0 [0:2047]; + (* ram_style = "block" *) reg [7:0] ways_0_data_symbol1 [0:2047]; + (* ram_style = "block" *) reg [7:0] ways_0_data_symbol2 [0:2047]; + (* ram_style = "block" *) reg [7:0] ways_0_data_symbol3 [0:2047]; reg [7:0] _zz_ways_0_datasymbol_read; reg [7:0] _zz_ways_0_datasymbol_read_1; reg [7:0] _zz_ways_0_datasymbol_read_2; reg [7:0] _zz_ways_0_datasymbol_read_3; - assign _zz_stage0_dataColisions = (io_cpu_execute_address[11 : 2] >>> 0); - assign _zz__zz_stageA_dataColisions = (io_cpu_memory_address[11 : 2] >>> 0); + assign _zz_stage0_dataColisions = (io_cpu_execute_address[12 : 2] >>> 0); + assign _zz__zz_stageA_dataColisions = (io_cpu_memory_address[12 : 2] >>> 0); assign _zz_when = 1'b1; assign _zz_loader_counter_valueNext_1 = loader_counter_willIncrement; assign _zz_loader_counter_valueNext = {2'd0, _zz_loader_counter_valueNext_1}; @@ -6083,7 +6083,7 @@ module DataCache ( assign _zz_ways_0_tagsReadRsp_valid_1 = _zz_ways_0_tags_port0; assign ways_0_tagsReadRsp_valid = _zz_ways_0_tagsReadRsp_valid_1[0]; assign ways_0_tagsReadRsp_error = _zz_ways_0_tagsReadRsp_valid_1[1]; - assign ways_0_tagsReadRsp_address = _zz_ways_0_tagsReadRsp_valid_1[21 : 2]; + assign ways_0_tagsReadRsp_address = _zz_ways_0_tagsReadRsp_valid_1[20 : 2]; assign _zz_ways_0_dataReadRspMem = (dataReadCmd_valid && (! io_cpu_memory_isStuck)); assign ways_0_dataReadRspMem = _zz_ways_0_data_port0; assign ways_0_dataReadRsp = ways_0_dataReadRspMem[31 : 0]; @@ -6097,9 +6097,9 @@ module DataCache ( end always @(*) begin - tagsReadCmd_payload = 7'bxxxxxxx; + tagsReadCmd_payload = 8'bxxxxxxxx; if(when_DataCache_l656) begin - tagsReadCmd_payload = io_cpu_execute_address[11 : 5]; + tagsReadCmd_payload = io_cpu_execute_address[12 : 5]; end end @@ -6111,9 +6111,9 @@ module DataCache ( end always @(*) begin - dataReadCmd_payload = 10'bxxxxxxxxxx; + dataReadCmd_payload = 11'bxxxxxxxxxxx; if(when_DataCache_l656) begin - dataReadCmd_payload = io_cpu_execute_address[11 : 2]; + dataReadCmd_payload = io_cpu_execute_address[12 : 2]; end end @@ -6141,12 +6141,12 @@ module DataCache ( end always @(*) begin - tagsWriteCmd_payload_address = 7'bxxxxxxx; + tagsWriteCmd_payload_address = 8'bxxxxxxxx; if(when_DataCache_l842) begin - tagsWriteCmd_payload_address = stageB_flusher_counter[6:0]; + tagsWriteCmd_payload_address = stageB_flusher_counter[7:0]; end if(loader_done) begin - tagsWriteCmd_payload_address = stageB_mmuRsp_physicalAddress[11 : 5]; + tagsWriteCmd_payload_address = stageB_mmuRsp_physicalAddress[12 : 5]; end end @@ -6168,9 +6168,9 @@ module DataCache ( end always @(*) begin - tagsWriteCmd_payload_data_address = 20'bxxxxxxxxxxxxxxxxxxxx; + tagsWriteCmd_payload_data_address = 19'bxxxxxxxxxxxxxxxxxxx; if(loader_done) begin - tagsWriteCmd_payload_data_address = stageB_mmuRsp_physicalAddress[31 : 12]; + tagsWriteCmd_payload_data_address = stageB_mmuRsp_physicalAddress[31 : 13]; end end @@ -6200,12 +6200,12 @@ module DataCache ( end always @(*) begin - dataWriteCmd_payload_address = 10'bxxxxxxxxxx; + dataWriteCmd_payload_address = 11'bxxxxxxxxxxx; if(stageB_cpuWriteToCache) begin - dataWriteCmd_payload_address = stageB_mmuRsp_physicalAddress[11 : 2]; + dataWriteCmd_payload_address = stageB_mmuRsp_physicalAddress[12 : 2]; end if(when_DataCache_l1075) begin - dataWriteCmd_payload_address = {stageB_mmuRsp_physicalAddress[11 : 5],loader_counter_value}; + dataWriteCmd_payload_address = {stageB_mmuRsp_physicalAddress[12 : 5],loader_counter_value}; end end @@ -6270,7 +6270,7 @@ module DataCache ( assign io_cpu_memory_isWrite = stageA_request_wr; assign stageA_isAmo = 1'b0; assign stageA_isLrsc = 1'b0; - assign stageA_wayHits = ((io_cpu_memory_mmuRsp_physicalAddress[31 : 12] == ways_0_tagsReadRsp_address) && ways_0_tagsReadRsp_valid); + assign stageA_wayHits = ((io_cpu_memory_mmuRsp_physicalAddress[31 : 13] == ways_0_tagsReadRsp_address) && ways_0_tagsReadRsp_valid); assign when_DataCache_l763_2 = (! io_cpu_memory_isStuck); assign when_DataCache_l763_3 = (! io_cpu_memory_isStuck); assign _zz_stageA_dataColisions[0] = (((dataWriteCmd_valid && dataWriteCmd_payload_way[0]) && (dataWriteCmd_payload_address == _zz__zz_stageA_dataColisions)) && ((stageA_mask & dataWriteCmd_payload_mask[3 : 0]) != 4'b0000)); @@ -6337,9 +6337,9 @@ module DataCache ( end assign stageB_flusher_hold = 1'b0; - assign when_DataCache_l842 = (! stageB_flusher_counter[7]); + assign when_DataCache_l842 = (! stageB_flusher_counter[8]); assign when_DataCache_l848 = (! stageB_flusher_hold); - assign io_cpu_flush_ready = (stageB_flusher_waitDone && stageB_flusher_counter[7]); + assign io_cpu_flush_ready = (stageB_flusher_waitDone && stageB_flusher_counter[8]); assign stageB_isAmo = 1'b0; assign stageB_isAmoCached = 1'b0; assign stageB_isExternalLsrc = 1'b0; @@ -6570,7 +6570,7 @@ module DataCache ( if(reset) begin memCmdSent <= 1'b0; stageB_flusher_waitDone <= 1'b0; - stageB_flusher_counter <= 8'h0; + stageB_flusher_counter <= 9'h0; stageB_flusher_start <= 1'b1; loader_valid <= 1'b0; loader_counter_value <= 3'b000; @@ -6589,13 +6589,13 @@ module DataCache ( end if(when_DataCache_l842) begin if(when_DataCache_l848) begin - stageB_flusher_counter <= (stageB_flusher_counter + 8'h01); + stageB_flusher_counter <= (stageB_flusher_counter + 9'h001); end end stageB_flusher_start <= (((((((! stageB_flusher_waitDone) && (! stageB_flusher_start)) && io_cpu_flush_valid) && (! io_cpu_execute_isValid)) && (! io_cpu_memory_isValid)) && (! io_cpu_writeBack_isValid)) && (! io_cpu_redo)); if(stageB_flusher_start) begin stageB_flusher_waitDone <= 1'b1; - stageB_flusher_counter <= 8'h0; + stageB_flusher_counter <= 9'h0; end `ifndef SYNTHESIS `ifdef FORMAL @@ -6673,8 +6673,8 @@ module InstructionCache ( input reset ); reg [31:0] _zz_banks_0_port1; - reg [21:0] _zz_ways_0_tags_port1; - wire [21:0] _zz_ways_0_tags_port; + reg [20:0] _zz_ways_0_tags_port1; + wire [20:0] _zz_ways_0_tags_port; reg _zz_1; reg _zz_2; reg lineLoader_fire; @@ -6682,7 +6682,7 @@ module InstructionCache ( (* keep , syn_keep *) reg [31:0] lineLoader_address /* synthesis syn_keep = 1 */ ; reg lineLoader_hadError; reg lineLoader_flushPending; - reg [7:0] lineLoader_flushCounter; + reg [8:0] lineLoader_flushCounter; wire when_InstructionCache_l338; reg _zz_when_InstructionCache_l342; wire when_InstructionCache_l342; @@ -6696,24 +6696,24 @@ module InstructionCache ( wire lineLoader_wayToAllocate_willOverflow; (* keep , syn_keep *) reg [2:0] lineLoader_wordIndex /* synthesis syn_keep = 1 */ ; wire lineLoader_write_tag_0_valid; - wire [6:0] lineLoader_write_tag_0_payload_address; + wire [7:0] lineLoader_write_tag_0_payload_address; wire lineLoader_write_tag_0_payload_data_valid; wire lineLoader_write_tag_0_payload_data_error; - wire [19:0] lineLoader_write_tag_0_payload_data_address; + wire [18:0] lineLoader_write_tag_0_payload_data_address; wire lineLoader_write_data_0_valid; - wire [9:0] lineLoader_write_data_0_payload_address; + wire [10:0] lineLoader_write_data_0_payload_address; wire [31:0] lineLoader_write_data_0_payload_data; wire when_InstructionCache_l401; - wire [9:0] _zz_fetchStage_read_banksValue_0_dataMem; + wire [10:0] _zz_fetchStage_read_banksValue_0_dataMem; wire _zz_fetchStage_read_banksValue_0_dataMem_1; wire [31:0] fetchStage_read_banksValue_0_dataMem; wire [31:0] fetchStage_read_banksValue_0_data; - wire [6:0] _zz_fetchStage_read_waysValues_0_tag_valid; + wire [7:0] _zz_fetchStage_read_waysValues_0_tag_valid; wire _zz_fetchStage_read_waysValues_0_tag_valid_1; wire fetchStage_read_waysValues_0_tag_valid; wire fetchStage_read_waysValues_0_tag_error; - wire [19:0] fetchStage_read_waysValues_0_tag_address; - wire [21:0] _zz_fetchStage_read_waysValues_0_tag_valid_2; + wire [18:0] fetchStage_read_waysValues_0_tag_address; + wire [20:0] _zz_fetchStage_read_waysValues_0_tag_valid_2; wire fetchStage_hit_hits_0; wire fetchStage_hit_valid; wire fetchStage_hit_error; @@ -6735,8 +6735,8 @@ module InstructionCache ( reg decodeStage_hit_valid; wire when_InstructionCache_l459_2; reg decodeStage_hit_error; - (* ram_style = "block" *) reg [31:0] banks_0 [0:1023]; - (* ram_style = "block" *) reg [21:0] ways_0_tags [0:127]; + (* ram_style = "block" *) reg [31:0] banks_0 [0:2047]; + (* ram_style = "block" *) reg [20:0] ways_0_tags [0:255]; assign _zz_ways_0_tags_port = {lineLoader_write_tag_0_payload_data_address,{lineLoader_write_tag_0_payload_data_error,lineLoader_write_tag_0_payload_data_valid}}; always @(posedge clk) begin @@ -6799,7 +6799,7 @@ module InstructionCache ( end end - assign when_InstructionCache_l338 = (! lineLoader_flushCounter[7]); + assign when_InstructionCache_l338 = (! lineLoader_flushCounter[8]); assign when_InstructionCache_l342 = (! _zz_when_InstructionCache_l342); assign when_InstructionCache_l351 = (lineLoader_flushPending && (! (lineLoader_valid || io_cpu_fetch_isValid))); assign io_mem_cmd_fire = (io_mem_cmd_valid && io_mem_cmd_ready); @@ -6817,26 +6817,26 @@ module InstructionCache ( assign lineLoader_wayToAllocate_willClear = 1'b0; assign lineLoader_wayToAllocate_willOverflowIfInc = 1'b1; assign lineLoader_wayToAllocate_willOverflow = (lineLoader_wayToAllocate_willOverflowIfInc && lineLoader_wayToAllocate_willIncrement); - assign lineLoader_write_tag_0_valid = ((1'b1 && lineLoader_fire) || (! lineLoader_flushCounter[7])); - assign lineLoader_write_tag_0_payload_address = (lineLoader_flushCounter[7] ? lineLoader_address[11 : 5] : lineLoader_flushCounter[6 : 0]); - assign lineLoader_write_tag_0_payload_data_valid = lineLoader_flushCounter[7]; + assign lineLoader_write_tag_0_valid = ((1'b1 && lineLoader_fire) || (! lineLoader_flushCounter[8])); + assign lineLoader_write_tag_0_payload_address = (lineLoader_flushCounter[8] ? lineLoader_address[12 : 5] : lineLoader_flushCounter[7 : 0]); + assign lineLoader_write_tag_0_payload_data_valid = lineLoader_flushCounter[8]; assign lineLoader_write_tag_0_payload_data_error = (lineLoader_hadError || io_mem_rsp_payload_error); - assign lineLoader_write_tag_0_payload_data_address = lineLoader_address[31 : 12]; + assign lineLoader_write_tag_0_payload_data_address = lineLoader_address[31 : 13]; assign lineLoader_write_data_0_valid = (io_mem_rsp_valid && 1'b1); - assign lineLoader_write_data_0_payload_address = {lineLoader_address[11 : 5],lineLoader_wordIndex}; + assign lineLoader_write_data_0_payload_address = {lineLoader_address[12 : 5],lineLoader_wordIndex}; assign lineLoader_write_data_0_payload_data = io_mem_rsp_payload_data; assign when_InstructionCache_l401 = (lineLoader_wordIndex == 3'b111); - assign _zz_fetchStage_read_banksValue_0_dataMem = io_cpu_prefetch_pc[11 : 2]; + assign _zz_fetchStage_read_banksValue_0_dataMem = io_cpu_prefetch_pc[12 : 2]; assign _zz_fetchStage_read_banksValue_0_dataMem_1 = (! io_cpu_fetch_isStuck); assign fetchStage_read_banksValue_0_dataMem = _zz_banks_0_port1; assign fetchStage_read_banksValue_0_data = fetchStage_read_banksValue_0_dataMem[31 : 0]; - assign _zz_fetchStage_read_waysValues_0_tag_valid = io_cpu_prefetch_pc[11 : 5]; + assign _zz_fetchStage_read_waysValues_0_tag_valid = io_cpu_prefetch_pc[12 : 5]; assign _zz_fetchStage_read_waysValues_0_tag_valid_1 = (! io_cpu_fetch_isStuck); assign _zz_fetchStage_read_waysValues_0_tag_valid_2 = _zz_ways_0_tags_port1; assign fetchStage_read_waysValues_0_tag_valid = _zz_fetchStage_read_waysValues_0_tag_valid_2[0]; assign fetchStage_read_waysValues_0_tag_error = _zz_fetchStage_read_waysValues_0_tag_valid_2[1]; - assign fetchStage_read_waysValues_0_tag_address = _zz_fetchStage_read_waysValues_0_tag_valid_2[21 : 2]; - assign fetchStage_hit_hits_0 = (fetchStage_read_waysValues_0_tag_valid && (fetchStage_read_waysValues_0_tag_address == io_cpu_fetch_mmuRsp_physicalAddress[31 : 12])); + assign fetchStage_read_waysValues_0_tag_address = _zz_fetchStage_read_waysValues_0_tag_valid_2[20 : 2]; + assign fetchStage_hit_hits_0 = (fetchStage_read_waysValues_0_tag_valid && (fetchStage_read_waysValues_0_tag_address == io_cpu_fetch_mmuRsp_physicalAddress[31 : 13])); assign fetchStage_hit_valid = (fetchStage_hit_hits_0 != 1'b0); assign fetchStage_hit_error = fetchStage_read_waysValues_0_tag_error; assign fetchStage_hit_data = fetchStage_read_banksValue_0_data; @@ -6896,11 +6896,11 @@ module InstructionCache ( lineLoader_address <= io_cpu_fill_payload; end if(when_InstructionCache_l338) begin - lineLoader_flushCounter <= (lineLoader_flushCounter + 8'h01); + lineLoader_flushCounter <= (lineLoader_flushCounter + 9'h001); end - _zz_when_InstructionCache_l342 <= lineLoader_flushCounter[7]; + _zz_when_InstructionCache_l342 <= lineLoader_flushCounter[8]; if(when_InstructionCache_l351) begin - lineLoader_flushCounter <= 8'h0; + lineLoader_flushCounter <= 9'h0; end if(when_InstructionCache_l435) begin io_cpu_fetch_data_regNextWhen <= io_cpu_fetch_data; diff --git a/pythondata_cpu_vexriscv/verilog/VexRiscv_FullCfu.yaml b/pythondata_cpu_vexriscv/verilog/VexRiscv_FullCfu.yaml index cf27a68..1f28413 100644 --- a/pythondata_cpu_vexriscv/verilog/VexRiscv_FullCfu.yaml +++ b/pythondata_cpu_vexriscv/verilog/VexRiscv_FullCfu.yaml @@ -1,4 +1,4 @@ iBus: !!vexriscv.BusReport flushInstructions: [4111, 19, 19, 19] - info: !!vexriscv.CacheReport {bytePerLine: 32, size: 4096} + info: !!vexriscv.CacheReport {bytePerLine: 32, size: 8192} kind: cached diff --git a/pythondata_cpu_vexriscv/verilog/VexRiscv_FullCfuDebug.v b/pythondata_cpu_vexriscv/verilog/VexRiscv_FullCfuDebug.v index c1451e2..adc7fff 100644 --- a/pythondata_cpu_vexriscv/verilog/VexRiscv_FullCfuDebug.v +++ b/pythondata_cpu_vexriscv/verilog/VexRiscv_FullCfuDebug.v @@ -1,6 +1,6 @@ // Generator : SpinalHDL v1.6.0 git head : 73c8d8e2b86b45646e9d0b2e729291f2b65e6be3 // Component : VexRiscv -// Git hash : 6276bf628be9d0a58c0284dca83137b71ef29098 +// Git hash : 7454d1ac406f4e81ba8a81e164d3d67822e1b45b `define Input2Kind_binary_sequential_type [0:0] @@ -5076,7 +5076,7 @@ module VexRiscv ( always @(*) begin _zz_CsrPlugin_csrMapping_readDataInit_2 = 32'h0; if(execute_CsrPlugin_csr_3264) begin - _zz_CsrPlugin_csrMapping_readDataInit_2[12 : 0] = 13'h1000; + _zz_CsrPlugin_csrMapping_readDataInit_2[13 : 0] = 14'h2000; _zz_CsrPlugin_csrMapping_readDataInit_2[25 : 20] = 6'h20; end end @@ -6183,11 +6183,11 @@ module DataCache ( input clk, input reset ); - reg [21:0] _zz_ways_0_tags_port0; + reg [20:0] _zz_ways_0_tags_port0; reg [31:0] _zz_ways_0_data_port0; - wire [21:0] _zz_ways_0_tags_port; - wire [9:0] _zz_stage0_dataColisions; - wire [9:0] _zz__zz_stageA_dataColisions; + wire [20:0] _zz_ways_0_tags_port; + wire [10:0] _zz_stage0_dataColisions; + wire [10:0] _zz__zz_stageA_dataColisions; wire [0:0] _zz_when; wire [2:0] _zz_loader_counter_valueNext; wire [0:0] _zz_loader_counter_valueNext_1; @@ -6196,31 +6196,31 @@ module DataCache ( reg _zz_2; wire haltCpu; reg tagsReadCmd_valid; - reg [6:0] tagsReadCmd_payload; + reg [7:0] tagsReadCmd_payload; reg tagsWriteCmd_valid; reg [0:0] tagsWriteCmd_payload_way; - reg [6:0] tagsWriteCmd_payload_address; + reg [7:0] tagsWriteCmd_payload_address; reg tagsWriteCmd_payload_data_valid; reg tagsWriteCmd_payload_data_error; - reg [19:0] tagsWriteCmd_payload_data_address; + reg [18:0] tagsWriteCmd_payload_data_address; reg tagsWriteLastCmd_valid; reg [0:0] tagsWriteLastCmd_payload_way; - reg [6:0] tagsWriteLastCmd_payload_address; + reg [7:0] tagsWriteLastCmd_payload_address; reg tagsWriteLastCmd_payload_data_valid; reg tagsWriteLastCmd_payload_data_error; - reg [19:0] tagsWriteLastCmd_payload_data_address; + reg [18:0] tagsWriteLastCmd_payload_data_address; reg dataReadCmd_valid; - reg [9:0] dataReadCmd_payload; + reg [10:0] dataReadCmd_payload; reg dataWriteCmd_valid; reg [0:0] dataWriteCmd_payload_way; - reg [9:0] dataWriteCmd_payload_address; + reg [10:0] dataWriteCmd_payload_address; reg [31:0] dataWriteCmd_payload_data; reg [3:0] dataWriteCmd_payload_mask; wire _zz_ways_0_tagsReadRsp_valid; wire ways_0_tagsReadRsp_valid; wire ways_0_tagsReadRsp_error; - wire [19:0] ways_0_tagsReadRsp_address; - wire [21:0] _zz_ways_0_tagsReadRsp_valid_1; + wire [18:0] ways_0_tagsReadRsp_address; + wire [20:0] _zz_ways_0_tagsReadRsp_valid_1; wire _zz_ways_0_dataReadRspMem; wire [31:0] ways_0_dataReadRspMem; wire [31:0] ways_0_dataReadRsp; @@ -6270,7 +6270,7 @@ module DataCache ( wire when_DataCache_l813; reg stageB_tagsReadRsp_0_valid; reg stageB_tagsReadRsp_0_error; - reg [19:0] stageB_tagsReadRsp_0_address; + reg [18:0] stageB_tagsReadRsp_0_address; wire when_DataCache_l813_1; reg [31:0] stageB_dataReadRsp_0; wire when_DataCache_l812; @@ -6291,7 +6291,7 @@ module DataCache ( wire [31:0] stageB_ioMemRspMuxed; reg stageB_flusher_waitDone; wire stageB_flusher_hold; - reg [7:0] stageB_flusher_counter; + reg [8:0] stageB_flusher_counter; wire when_DataCache_l842; wire when_DataCache_l848; reg stageB_flusher_start; @@ -6330,18 +6330,18 @@ module DataCache ( reg loader_valid_regNext; wire when_DataCache_l1107; wire when_DataCache_l1110; - (* ram_style = "block" *) reg [21:0] ways_0_tags [0:127]; - (* ram_style = "block" *) reg [7:0] ways_0_data_symbol0 [0:1023]; - (* ram_style = "block" *) reg [7:0] ways_0_data_symbol1 [0:1023]; - (* ram_style = "block" *) reg [7:0] ways_0_data_symbol2 [0:1023]; - (* ram_style = "block" *) reg [7:0] ways_0_data_symbol3 [0:1023]; + (* ram_style = "block" *) reg [20:0] ways_0_tags [0:255]; + (* ram_style = "block" *) reg [7:0] ways_0_data_symbol0 [0:2047]; + (* ram_style = "block" *) reg [7:0] ways_0_data_symbol1 [0:2047]; + (* ram_style = "block" *) reg [7:0] ways_0_data_symbol2 [0:2047]; + (* ram_style = "block" *) reg [7:0] ways_0_data_symbol3 [0:2047]; reg [7:0] _zz_ways_0_datasymbol_read; reg [7:0] _zz_ways_0_datasymbol_read_1; reg [7:0] _zz_ways_0_datasymbol_read_2; reg [7:0] _zz_ways_0_datasymbol_read_3; - assign _zz_stage0_dataColisions = (io_cpu_execute_address[11 : 2] >>> 0); - assign _zz__zz_stageA_dataColisions = (io_cpu_memory_address[11 : 2] >>> 0); + assign _zz_stage0_dataColisions = (io_cpu_execute_address[12 : 2] >>> 0); + assign _zz__zz_stageA_dataColisions = (io_cpu_memory_address[12 : 2] >>> 0); assign _zz_when = 1'b1; assign _zz_loader_counter_valueNext_1 = loader_counter_willIncrement; assign _zz_loader_counter_valueNext = {2'd0, _zz_loader_counter_valueNext_1}; @@ -6405,7 +6405,7 @@ module DataCache ( assign _zz_ways_0_tagsReadRsp_valid_1 = _zz_ways_0_tags_port0; assign ways_0_tagsReadRsp_valid = _zz_ways_0_tagsReadRsp_valid_1[0]; assign ways_0_tagsReadRsp_error = _zz_ways_0_tagsReadRsp_valid_1[1]; - assign ways_0_tagsReadRsp_address = _zz_ways_0_tagsReadRsp_valid_1[21 : 2]; + assign ways_0_tagsReadRsp_address = _zz_ways_0_tagsReadRsp_valid_1[20 : 2]; assign _zz_ways_0_dataReadRspMem = (dataReadCmd_valid && (! io_cpu_memory_isStuck)); assign ways_0_dataReadRspMem = _zz_ways_0_data_port0; assign ways_0_dataReadRsp = ways_0_dataReadRspMem[31 : 0]; @@ -6419,9 +6419,9 @@ module DataCache ( end always @(*) begin - tagsReadCmd_payload = 7'bxxxxxxx; + tagsReadCmd_payload = 8'bxxxxxxxx; if(when_DataCache_l656) begin - tagsReadCmd_payload = io_cpu_execute_address[11 : 5]; + tagsReadCmd_payload = io_cpu_execute_address[12 : 5]; end end @@ -6433,9 +6433,9 @@ module DataCache ( end always @(*) begin - dataReadCmd_payload = 10'bxxxxxxxxxx; + dataReadCmd_payload = 11'bxxxxxxxxxxx; if(when_DataCache_l656) begin - dataReadCmd_payload = io_cpu_execute_address[11 : 2]; + dataReadCmd_payload = io_cpu_execute_address[12 : 2]; end end @@ -6463,12 +6463,12 @@ module DataCache ( end always @(*) begin - tagsWriteCmd_payload_address = 7'bxxxxxxx; + tagsWriteCmd_payload_address = 8'bxxxxxxxx; if(when_DataCache_l842) begin - tagsWriteCmd_payload_address = stageB_flusher_counter[6:0]; + tagsWriteCmd_payload_address = stageB_flusher_counter[7:0]; end if(loader_done) begin - tagsWriteCmd_payload_address = stageB_mmuRsp_physicalAddress[11 : 5]; + tagsWriteCmd_payload_address = stageB_mmuRsp_physicalAddress[12 : 5]; end end @@ -6490,9 +6490,9 @@ module DataCache ( end always @(*) begin - tagsWriteCmd_payload_data_address = 20'bxxxxxxxxxxxxxxxxxxxx; + tagsWriteCmd_payload_data_address = 19'bxxxxxxxxxxxxxxxxxxx; if(loader_done) begin - tagsWriteCmd_payload_data_address = stageB_mmuRsp_physicalAddress[31 : 12]; + tagsWriteCmd_payload_data_address = stageB_mmuRsp_physicalAddress[31 : 13]; end end @@ -6522,12 +6522,12 @@ module DataCache ( end always @(*) begin - dataWriteCmd_payload_address = 10'bxxxxxxxxxx; + dataWriteCmd_payload_address = 11'bxxxxxxxxxxx; if(stageB_cpuWriteToCache) begin - dataWriteCmd_payload_address = stageB_mmuRsp_physicalAddress[11 : 2]; + dataWriteCmd_payload_address = stageB_mmuRsp_physicalAddress[12 : 2]; end if(when_DataCache_l1075) begin - dataWriteCmd_payload_address = {stageB_mmuRsp_physicalAddress[11 : 5],loader_counter_value}; + dataWriteCmd_payload_address = {stageB_mmuRsp_physicalAddress[12 : 5],loader_counter_value}; end end @@ -6592,7 +6592,7 @@ module DataCache ( assign io_cpu_memory_isWrite = stageA_request_wr; assign stageA_isAmo = 1'b0; assign stageA_isLrsc = 1'b0; - assign stageA_wayHits = ((io_cpu_memory_mmuRsp_physicalAddress[31 : 12] == ways_0_tagsReadRsp_address) && ways_0_tagsReadRsp_valid); + assign stageA_wayHits = ((io_cpu_memory_mmuRsp_physicalAddress[31 : 13] == ways_0_tagsReadRsp_address) && ways_0_tagsReadRsp_valid); assign when_DataCache_l763_2 = (! io_cpu_memory_isStuck); assign when_DataCache_l763_3 = (! io_cpu_memory_isStuck); assign _zz_stageA_dataColisions[0] = (((dataWriteCmd_valid && dataWriteCmd_payload_way[0]) && (dataWriteCmd_payload_address == _zz__zz_stageA_dataColisions)) && ((stageA_mask & dataWriteCmd_payload_mask[3 : 0]) != 4'b0000)); @@ -6659,9 +6659,9 @@ module DataCache ( end assign stageB_flusher_hold = 1'b0; - assign when_DataCache_l842 = (! stageB_flusher_counter[7]); + assign when_DataCache_l842 = (! stageB_flusher_counter[8]); assign when_DataCache_l848 = (! stageB_flusher_hold); - assign io_cpu_flush_ready = (stageB_flusher_waitDone && stageB_flusher_counter[7]); + assign io_cpu_flush_ready = (stageB_flusher_waitDone && stageB_flusher_counter[8]); assign stageB_isAmo = 1'b0; assign stageB_isAmoCached = 1'b0; assign stageB_isExternalLsrc = 1'b0; @@ -6892,7 +6892,7 @@ module DataCache ( if(reset) begin memCmdSent <= 1'b0; stageB_flusher_waitDone <= 1'b0; - stageB_flusher_counter <= 8'h0; + stageB_flusher_counter <= 9'h0; stageB_flusher_start <= 1'b1; loader_valid <= 1'b0; loader_counter_value <= 3'b000; @@ -6911,13 +6911,13 @@ module DataCache ( end if(when_DataCache_l842) begin if(when_DataCache_l848) begin - stageB_flusher_counter <= (stageB_flusher_counter + 8'h01); + stageB_flusher_counter <= (stageB_flusher_counter + 9'h001); end end stageB_flusher_start <= (((((((! stageB_flusher_waitDone) && (! stageB_flusher_start)) && io_cpu_flush_valid) && (! io_cpu_execute_isValid)) && (! io_cpu_memory_isValid)) && (! io_cpu_writeBack_isValid)) && (! io_cpu_redo)); if(stageB_flusher_start) begin stageB_flusher_waitDone <= 1'b1; - stageB_flusher_counter <= 8'h0; + stageB_flusher_counter <= 9'h0; end `ifndef SYNTHESIS `ifdef FORMAL @@ -6997,8 +6997,8 @@ module InstructionCache ( input reset ); reg [31:0] _zz_banks_0_port1; - reg [21:0] _zz_ways_0_tags_port1; - wire [21:0] _zz_ways_0_tags_port; + reg [20:0] _zz_ways_0_tags_port1; + wire [20:0] _zz_ways_0_tags_port; reg _zz_1; reg _zz_2; reg lineLoader_fire; @@ -7006,7 +7006,7 @@ module InstructionCache ( (* keep , syn_keep *) reg [31:0] lineLoader_address /* synthesis syn_keep = 1 */ ; reg lineLoader_hadError; reg lineLoader_flushPending; - reg [7:0] lineLoader_flushCounter; + reg [8:0] lineLoader_flushCounter; wire when_InstructionCache_l338; reg _zz_when_InstructionCache_l342; wire when_InstructionCache_l342; @@ -7020,24 +7020,24 @@ module InstructionCache ( wire lineLoader_wayToAllocate_willOverflow; (* keep , syn_keep *) reg [2:0] lineLoader_wordIndex /* synthesis syn_keep = 1 */ ; wire lineLoader_write_tag_0_valid; - wire [6:0] lineLoader_write_tag_0_payload_address; + wire [7:0] lineLoader_write_tag_0_payload_address; wire lineLoader_write_tag_0_payload_data_valid; wire lineLoader_write_tag_0_payload_data_error; - wire [19:0] lineLoader_write_tag_0_payload_data_address; + wire [18:0] lineLoader_write_tag_0_payload_data_address; wire lineLoader_write_data_0_valid; - wire [9:0] lineLoader_write_data_0_payload_address; + wire [10:0] lineLoader_write_data_0_payload_address; wire [31:0] lineLoader_write_data_0_payload_data; wire when_InstructionCache_l401; - wire [9:0] _zz_fetchStage_read_banksValue_0_dataMem; + wire [10:0] _zz_fetchStage_read_banksValue_0_dataMem; wire _zz_fetchStage_read_banksValue_0_dataMem_1; wire [31:0] fetchStage_read_banksValue_0_dataMem; wire [31:0] fetchStage_read_banksValue_0_data; - wire [6:0] _zz_fetchStage_read_waysValues_0_tag_valid; + wire [7:0] _zz_fetchStage_read_waysValues_0_tag_valid; wire _zz_fetchStage_read_waysValues_0_tag_valid_1; wire fetchStage_read_waysValues_0_tag_valid; wire fetchStage_read_waysValues_0_tag_error; - wire [19:0] fetchStage_read_waysValues_0_tag_address; - wire [21:0] _zz_fetchStage_read_waysValues_0_tag_valid_2; + wire [18:0] fetchStage_read_waysValues_0_tag_address; + wire [20:0] _zz_fetchStage_read_waysValues_0_tag_valid_2; wire fetchStage_hit_hits_0; wire fetchStage_hit_valid; wire fetchStage_hit_error; @@ -7060,8 +7060,8 @@ module InstructionCache ( wire when_InstructionCache_l459_2; reg decodeStage_hit_error; wire when_Fetcher_l398; - (* ram_style = "block" *) reg [31:0] banks_0 [0:1023]; - (* ram_style = "block" *) reg [21:0] ways_0_tags [0:127]; + (* ram_style = "block" *) reg [31:0] banks_0 [0:2047]; + (* ram_style = "block" *) reg [20:0] ways_0_tags [0:255]; assign _zz_ways_0_tags_port = {lineLoader_write_tag_0_payload_data_address,{lineLoader_write_tag_0_payload_data_error,lineLoader_write_tag_0_payload_data_valid}}; always @(posedge clk) begin @@ -7124,7 +7124,7 @@ module InstructionCache ( end end - assign when_InstructionCache_l338 = (! lineLoader_flushCounter[7]); + assign when_InstructionCache_l338 = (! lineLoader_flushCounter[8]); assign when_InstructionCache_l342 = (! _zz_when_InstructionCache_l342); assign when_InstructionCache_l351 = (lineLoader_flushPending && (! (lineLoader_valid || io_cpu_fetch_isValid))); assign io_mem_cmd_fire = (io_mem_cmd_valid && io_mem_cmd_ready); @@ -7142,26 +7142,26 @@ module InstructionCache ( assign lineLoader_wayToAllocate_willClear = 1'b0; assign lineLoader_wayToAllocate_willOverflowIfInc = 1'b1; assign lineLoader_wayToAllocate_willOverflow = (lineLoader_wayToAllocate_willOverflowIfInc && lineLoader_wayToAllocate_willIncrement); - assign lineLoader_write_tag_0_valid = ((1'b1 && lineLoader_fire) || (! lineLoader_flushCounter[7])); - assign lineLoader_write_tag_0_payload_address = (lineLoader_flushCounter[7] ? lineLoader_address[11 : 5] : lineLoader_flushCounter[6 : 0]); - assign lineLoader_write_tag_0_payload_data_valid = lineLoader_flushCounter[7]; + assign lineLoader_write_tag_0_valid = ((1'b1 && lineLoader_fire) || (! lineLoader_flushCounter[8])); + assign lineLoader_write_tag_0_payload_address = (lineLoader_flushCounter[8] ? lineLoader_address[12 : 5] : lineLoader_flushCounter[7 : 0]); + assign lineLoader_write_tag_0_payload_data_valid = lineLoader_flushCounter[8]; assign lineLoader_write_tag_0_payload_data_error = (lineLoader_hadError || io_mem_rsp_payload_error); - assign lineLoader_write_tag_0_payload_data_address = lineLoader_address[31 : 12]; + assign lineLoader_write_tag_0_payload_data_address = lineLoader_address[31 : 13]; assign lineLoader_write_data_0_valid = (io_mem_rsp_valid && 1'b1); - assign lineLoader_write_data_0_payload_address = {lineLoader_address[11 : 5],lineLoader_wordIndex}; + assign lineLoader_write_data_0_payload_address = {lineLoader_address[12 : 5],lineLoader_wordIndex}; assign lineLoader_write_data_0_payload_data = io_mem_rsp_payload_data; assign when_InstructionCache_l401 = (lineLoader_wordIndex == 3'b111); - assign _zz_fetchStage_read_banksValue_0_dataMem = io_cpu_prefetch_pc[11 : 2]; + assign _zz_fetchStage_read_banksValue_0_dataMem = io_cpu_prefetch_pc[12 : 2]; assign _zz_fetchStage_read_banksValue_0_dataMem_1 = (! io_cpu_fetch_isStuck); assign fetchStage_read_banksValue_0_dataMem = _zz_banks_0_port1; assign fetchStage_read_banksValue_0_data = fetchStage_read_banksValue_0_dataMem[31 : 0]; - assign _zz_fetchStage_read_waysValues_0_tag_valid = io_cpu_prefetch_pc[11 : 5]; + assign _zz_fetchStage_read_waysValues_0_tag_valid = io_cpu_prefetch_pc[12 : 5]; assign _zz_fetchStage_read_waysValues_0_tag_valid_1 = (! io_cpu_fetch_isStuck); assign _zz_fetchStage_read_waysValues_0_tag_valid_2 = _zz_ways_0_tags_port1; assign fetchStage_read_waysValues_0_tag_valid = _zz_fetchStage_read_waysValues_0_tag_valid_2[0]; assign fetchStage_read_waysValues_0_tag_error = _zz_fetchStage_read_waysValues_0_tag_valid_2[1]; - assign fetchStage_read_waysValues_0_tag_address = _zz_fetchStage_read_waysValues_0_tag_valid_2[21 : 2]; - assign fetchStage_hit_hits_0 = (fetchStage_read_waysValues_0_tag_valid && (fetchStage_read_waysValues_0_tag_address == io_cpu_fetch_mmuRsp_physicalAddress[31 : 12])); + assign fetchStage_read_waysValues_0_tag_address = _zz_fetchStage_read_waysValues_0_tag_valid_2[20 : 2]; + assign fetchStage_hit_hits_0 = (fetchStage_read_waysValues_0_tag_valid && (fetchStage_read_waysValues_0_tag_address == io_cpu_fetch_mmuRsp_physicalAddress[31 : 13])); assign fetchStage_hit_valid = (fetchStage_hit_hits_0 != 1'b0); assign fetchStage_hit_error = fetchStage_read_waysValues_0_tag_error; assign fetchStage_hit_data = fetchStage_read_banksValue_0_data; @@ -7222,11 +7222,11 @@ module InstructionCache ( lineLoader_address <= io_cpu_fill_payload; end if(when_InstructionCache_l338) begin - lineLoader_flushCounter <= (lineLoader_flushCounter + 8'h01); + lineLoader_flushCounter <= (lineLoader_flushCounter + 9'h001); end - _zz_when_InstructionCache_l342 <= lineLoader_flushCounter[7]; + _zz_when_InstructionCache_l342 <= lineLoader_flushCounter[8]; if(when_InstructionCache_l351) begin - lineLoader_flushCounter <= 8'h0; + lineLoader_flushCounter <= 9'h0; end if(when_InstructionCache_l435) begin io_cpu_fetch_data_regNextWhen <= io_cpu_fetch_data; diff --git a/pythondata_cpu_vexriscv/verilog/VexRiscv_FullCfuDebug.yaml b/pythondata_cpu_vexriscv/verilog/VexRiscv_FullCfuDebug.yaml index 24597c0..c869dbe 100644 --- a/pythondata_cpu_vexriscv/verilog/VexRiscv_FullCfuDebug.yaml +++ b/pythondata_cpu_vexriscv/verilog/VexRiscv_FullCfuDebug.yaml @@ -1,5 +1,5 @@ debug: !!vexriscv.DebugReport {hardwareBreakpointCount: 0} iBus: !!vexriscv.BusReport flushInstructions: [4111, 19, 19, 19] - info: !!vexriscv.CacheReport {bytePerLine: 32, size: 4096} + info: !!vexriscv.CacheReport {bytePerLine: 32, size: 8192} kind: cached diff --git a/pythondata_cpu_vexriscv/verilog/VexRiscv_FullDebug.v b/pythondata_cpu_vexriscv/verilog/VexRiscv_FullDebug.v index 42b4327..af090b8 100644 --- a/pythondata_cpu_vexriscv/verilog/VexRiscv_FullDebug.v +++ b/pythondata_cpu_vexriscv/verilog/VexRiscv_FullDebug.v @@ -1,6 +1,6 @@ // Generator : SpinalHDL v1.6.0 git head : 73c8d8e2b86b45646e9d0b2e729291f2b65e6be3 // Component : VexRiscv -// Git hash : 6276bf628be9d0a58c0284dca83137b71ef29098 +// Git hash : 593e180abf5ba39e7fa33d4f371646453f84496a `define EnvCtrlEnum_binary_sequential_type [1:0] diff --git a/pythondata_cpu_vexriscv/verilog/VexRiscv_IMAC.v b/pythondata_cpu_vexriscv/verilog/VexRiscv_IMAC.v index 352d999..330be8a 100644 --- a/pythondata_cpu_vexriscv/verilog/VexRiscv_IMAC.v +++ b/pythondata_cpu_vexriscv/verilog/VexRiscv_IMAC.v @@ -1,6 +1,6 @@ // Generator : SpinalHDL v1.6.0 git head : 73c8d8e2b86b45646e9d0b2e729291f2b65e6be3 // Component : VexRiscv -// Git hash : 6276bf628be9d0a58c0284dca83137b71ef29098 +// Git hash : 593e180abf5ba39e7fa33d4f371646453f84496a `define EnvCtrlEnum_binary_sequential_type [1:0] diff --git a/pythondata_cpu_vexriscv/verilog/VexRiscv_IMACDebug.v b/pythondata_cpu_vexriscv/verilog/VexRiscv_IMACDebug.v index df604dd..04c18ce 100644 --- a/pythondata_cpu_vexriscv/verilog/VexRiscv_IMACDebug.v +++ b/pythondata_cpu_vexriscv/verilog/VexRiscv_IMACDebug.v @@ -1,6 +1,6 @@ // Generator : SpinalHDL v1.6.0 git head : 73c8d8e2b86b45646e9d0b2e729291f2b65e6be3 // Component : VexRiscv -// Git hash : 6276bf628be9d0a58c0284dca83137b71ef29098 +// Git hash : 593e180abf5ba39e7fa33d4f371646453f84496a `define EnvCtrlEnum_binary_sequential_type [1:0] diff --git a/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v b/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v index b61d8a3..e7ea0a9 100644 --- a/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v +++ b/pythondata_cpu_vexriscv/verilog/VexRiscv_Linux.v @@ -1,6 +1,6 @@ // Generator : SpinalHDL v1.6.0 git head : 73c8d8e2b86b45646e9d0b2e729291f2b65e6be3 // Component : VexRiscv -// Git hash : 6276bf628be9d0a58c0284dca83137b71ef29098 +// Git hash : 593e180abf5ba39e7fa33d4f371646453f84496a `define EnvCtrlEnum_binary_sequential_type [1:0] diff --git a/pythondata_cpu_vexriscv/verilog/VexRiscv_LinuxDebug.v b/pythondata_cpu_vexriscv/verilog/VexRiscv_LinuxDebug.v index 677ae75..9699b01 100644 --- a/pythondata_cpu_vexriscv/verilog/VexRiscv_LinuxDebug.v +++ b/pythondata_cpu_vexriscv/verilog/VexRiscv_LinuxDebug.v @@ -1,6 +1,6 @@ // Generator : SpinalHDL v1.6.0 git head : 73c8d8e2b86b45646e9d0b2e729291f2b65e6be3 // Component : VexRiscv -// Git hash : 6276bf628be9d0a58c0284dca83137b71ef29098 +// Git hash : 593e180abf5ba39e7fa33d4f371646453f84496a `define EnvCtrlEnum_binary_sequential_type [1:0] diff --git a/pythondata_cpu_vexriscv/verilog/VexRiscv_LinuxNoDspFmax.v b/pythondata_cpu_vexriscv/verilog/VexRiscv_LinuxNoDspFmax.v index 684b5ea..cc8e971 100644 --- a/pythondata_cpu_vexriscv/verilog/VexRiscv_LinuxNoDspFmax.v +++ b/pythondata_cpu_vexriscv/verilog/VexRiscv_LinuxNoDspFmax.v @@ -1,6 +1,6 @@ // Generator : SpinalHDL v1.6.0 git head : 73c8d8e2b86b45646e9d0b2e729291f2b65e6be3 // Component : VexRiscv -// Git hash : 6276bf628be9d0a58c0284dca83137b71ef29098 +// Git hash : 593e180abf5ba39e7fa33d4f371646453f84496a `define EnvCtrlEnum_binary_sequential_type [1:0] diff --git a/pythondata_cpu_vexriscv/verilog/VexRiscv_Lite.v b/pythondata_cpu_vexriscv/verilog/VexRiscv_Lite.v index 34bf8be..01e1f6d 100644 --- a/pythondata_cpu_vexriscv/verilog/VexRiscv_Lite.v +++ b/pythondata_cpu_vexriscv/verilog/VexRiscv_Lite.v @@ -1,6 +1,6 @@ // Generator : SpinalHDL v1.6.0 git head : 73c8d8e2b86b45646e9d0b2e729291f2b65e6be3 // Component : VexRiscv -// Git hash : 6276bf628be9d0a58c0284dca83137b71ef29098 +// Git hash : 593e180abf5ba39e7fa33d4f371646453f84496a `define EnvCtrlEnum_binary_sequential_type [1:0] diff --git a/pythondata_cpu_vexriscv/verilog/VexRiscv_LiteDebug.v b/pythondata_cpu_vexriscv/verilog/VexRiscv_LiteDebug.v index 86f5f8e..b13e65a 100644 --- a/pythondata_cpu_vexriscv/verilog/VexRiscv_LiteDebug.v +++ b/pythondata_cpu_vexriscv/verilog/VexRiscv_LiteDebug.v @@ -1,6 +1,6 @@ // Generator : SpinalHDL v1.6.0 git head : 73c8d8e2b86b45646e9d0b2e729291f2b65e6be3 // Component : VexRiscv -// Git hash : 6276bf628be9d0a58c0284dca83137b71ef29098 +// Git hash : 593e180abf5ba39e7fa33d4f371646453f84496a `define EnvCtrlEnum_binary_sequential_type [1:0] diff --git a/pythondata_cpu_vexriscv/verilog/VexRiscv_Min.v b/pythondata_cpu_vexriscv/verilog/VexRiscv_Min.v index 49c1979..02bc40f 100644 --- a/pythondata_cpu_vexriscv/verilog/VexRiscv_Min.v +++ b/pythondata_cpu_vexriscv/verilog/VexRiscv_Min.v @@ -1,6 +1,6 @@ // Generator : SpinalHDL v1.6.0 git head : 73c8d8e2b86b45646e9d0b2e729291f2b65e6be3 // Component : VexRiscv -// Git hash : 6276bf628be9d0a58c0284dca83137b71ef29098 +// Git hash : 593e180abf5ba39e7fa33d4f371646453f84496a `define EnvCtrlEnum_binary_sequential_type [1:0] diff --git a/pythondata_cpu_vexriscv/verilog/VexRiscv_MinDebug.v b/pythondata_cpu_vexriscv/verilog/VexRiscv_MinDebug.v index 8d0916f..8f08a8e 100644 --- a/pythondata_cpu_vexriscv/verilog/VexRiscv_MinDebug.v +++ b/pythondata_cpu_vexriscv/verilog/VexRiscv_MinDebug.v @@ -1,6 +1,6 @@ // Generator : SpinalHDL v1.6.0 git head : 73c8d8e2b86b45646e9d0b2e729291f2b65e6be3 // Component : VexRiscv -// Git hash : 6276bf628be9d0a58c0284dca83137b71ef29098 +// Git hash : 593e180abf5ba39e7fa33d4f371646453f84496a `define EnvCtrlEnum_binary_sequential_type [1:0] diff --git a/pythondata_cpu_vexriscv/verilog/VexRiscv_PerfCfu.v b/pythondata_cpu_vexriscv/verilog/VexRiscv_PerfCfu.v new file mode 100644 index 0000000..11834d9 --- /dev/null +++ b/pythondata_cpu_vexriscv/verilog/VexRiscv_PerfCfu.v @@ -0,0 +1,7288 @@ +// Generator : SpinalHDL v1.6.0 git head : 73c8d8e2b86b45646e9d0b2e729291f2b65e6be3 +// Component : VexRiscv +// Git hash : 593e180abf5ba39e7fa33d4f371646453f84496a + + +`define Input2Kind_binary_sequential_type [0:0] +`define Input2Kind_binary_sequential_RS 1'b0 +`define Input2Kind_binary_sequential_IMM_I 1'b1 + +`define EnvCtrlEnum_binary_sequential_type [1:0] +`define EnvCtrlEnum_binary_sequential_NONE 2'b00 +`define EnvCtrlEnum_binary_sequential_XRET 2'b01 +`define EnvCtrlEnum_binary_sequential_WFI 2'b10 +`define EnvCtrlEnum_binary_sequential_ECALL 2'b11 + +`define BranchCtrlEnum_binary_sequential_type [1:0] +`define BranchCtrlEnum_binary_sequential_INC 2'b00 +`define BranchCtrlEnum_binary_sequential_B 2'b01 +`define BranchCtrlEnum_binary_sequential_JAL 2'b10 +`define BranchCtrlEnum_binary_sequential_JALR 2'b11 + +`define ShiftCtrlEnum_binary_sequential_type [1:0] +`define ShiftCtrlEnum_binary_sequential_DISABLE_1 2'b00 +`define ShiftCtrlEnum_binary_sequential_SLL_1 2'b01 +`define ShiftCtrlEnum_binary_sequential_SRL_1 2'b10 +`define ShiftCtrlEnum_binary_sequential_SRA_1 2'b11 + +`define AluBitwiseCtrlEnum_binary_sequential_type [1:0] +`define AluBitwiseCtrlEnum_binary_sequential_XOR_1 2'b00 +`define AluBitwiseCtrlEnum_binary_sequential_OR_1 2'b01 +`define AluBitwiseCtrlEnum_binary_sequential_AND_1 2'b10 + +`define Src2CtrlEnum_binary_sequential_type [1:0] +`define Src2CtrlEnum_binary_sequential_RS 2'b00 +`define Src2CtrlEnum_binary_sequential_IMI 2'b01 +`define Src2CtrlEnum_binary_sequential_IMS 2'b10 +`define Src2CtrlEnum_binary_sequential_PC 2'b11 + +`define AluCtrlEnum_binary_sequential_type [1:0] +`define AluCtrlEnum_binary_sequential_ADD_SUB 2'b00 +`define AluCtrlEnum_binary_sequential_SLT_SLTU 2'b01 +`define AluCtrlEnum_binary_sequential_BITWISE 2'b10 + +`define Src1CtrlEnum_binary_sequential_type [1:0] +`define Src1CtrlEnum_binary_sequential_RS 2'b00 +`define Src1CtrlEnum_binary_sequential_IMU 2'b01 +`define Src1CtrlEnum_binary_sequential_PC_INCREMENT 2'b10 +`define Src1CtrlEnum_binary_sequential_URS1 2'b11 + + +module VexRiscv ( + input [31:0] externalResetVector, + input timerInterrupt, + input softwareInterrupt, + input [31:0] externalInterruptArray, + output CfuPlugin_bus_cmd_valid, + input CfuPlugin_bus_cmd_ready, + output [9:0] CfuPlugin_bus_cmd_payload_function_id, + output [31:0] CfuPlugin_bus_cmd_payload_inputs_0, + output [31:0] CfuPlugin_bus_cmd_payload_inputs_1, + input CfuPlugin_bus_rsp_valid, + output CfuPlugin_bus_rsp_ready, + input [31:0] CfuPlugin_bus_rsp_payload_outputs_0, + output reg iBusWishbone_CYC, + output reg iBusWishbone_STB, + input iBusWishbone_ACK, + output iBusWishbone_WE, + output [29:0] iBusWishbone_ADR, + input [31:0] iBusWishbone_DAT_MISO, + output [31:0] iBusWishbone_DAT_MOSI, + output [3:0] iBusWishbone_SEL, + input iBusWishbone_ERR, + output [2:0] iBusWishbone_CTI, + output [1:0] iBusWishbone_BTE, + output dBusWishbone_CYC, + output dBusWishbone_STB, + input dBusWishbone_ACK, + output dBusWishbone_WE, + output [29:0] dBusWishbone_ADR, + input [31:0] dBusWishbone_DAT_MISO, + output [31:0] dBusWishbone_DAT_MOSI, + output [3:0] dBusWishbone_SEL, + input dBusWishbone_ERR, + output [2:0] dBusWishbone_CTI, + output [1:0] dBusWishbone_BTE, + input clk, + input reset +); + wire IBusCachedPlugin_cache_io_flush; + wire IBusCachedPlugin_cache_io_cpu_prefetch_isValid; + wire IBusCachedPlugin_cache_io_cpu_fetch_isValid; + wire IBusCachedPlugin_cache_io_cpu_fetch_isStuck; + wire IBusCachedPlugin_cache_io_cpu_fetch_isRemoved; + wire IBusCachedPlugin_cache_io_cpu_decode_isValid; + wire IBusCachedPlugin_cache_io_cpu_decode_isStuck; + wire IBusCachedPlugin_cache_io_cpu_decode_isUser; + reg IBusCachedPlugin_cache_io_cpu_fill_valid; + wire dataCache_1_io_cpu_execute_isValid; + wire [31:0] dataCache_1_io_cpu_execute_address; + wire dataCache_1_io_cpu_memory_isValid; + wire [31:0] dataCache_1_io_cpu_memory_address; + reg dataCache_1_io_cpu_memory_mmuRsp_isIoAccess; + reg dataCache_1_io_cpu_writeBack_isValid; + wire dataCache_1_io_cpu_writeBack_isUser; + wire [31:0] dataCache_1_io_cpu_writeBack_storeData; + wire [31:0] dataCache_1_io_cpu_writeBack_address; + wire dataCache_1_io_cpu_writeBack_fence_SW; + wire dataCache_1_io_cpu_writeBack_fence_SR; + wire dataCache_1_io_cpu_writeBack_fence_SO; + wire dataCache_1_io_cpu_writeBack_fence_SI; + wire dataCache_1_io_cpu_writeBack_fence_PW; + wire dataCache_1_io_cpu_writeBack_fence_PR; + wire dataCache_1_io_cpu_writeBack_fence_PO; + wire dataCache_1_io_cpu_writeBack_fence_PI; + wire [3:0] dataCache_1_io_cpu_writeBack_fence_FM; + wire dataCache_1_io_cpu_flush_valid; + wire dataCache_1_io_mem_cmd_ready; + reg [31:0] _zz_RegFilePlugin_regFile_port0; + reg [31:0] _zz_RegFilePlugin_regFile_port1; + wire IBusCachedPlugin_cache_io_cpu_prefetch_haltIt; + wire [31:0] IBusCachedPlugin_cache_io_cpu_fetch_data; + wire [31:0] IBusCachedPlugin_cache_io_cpu_fetch_physicalAddress; + wire IBusCachedPlugin_cache_io_cpu_decode_error; + wire IBusCachedPlugin_cache_io_cpu_decode_mmuRefilling; + wire IBusCachedPlugin_cache_io_cpu_decode_mmuException; + wire [31:0] IBusCachedPlugin_cache_io_cpu_decode_data; + wire IBusCachedPlugin_cache_io_cpu_decode_cacheMiss; + wire [31:0] IBusCachedPlugin_cache_io_cpu_decode_physicalAddress; + wire IBusCachedPlugin_cache_io_mem_cmd_valid; + wire [31:0] IBusCachedPlugin_cache_io_mem_cmd_payload_address; + wire [2:0] IBusCachedPlugin_cache_io_mem_cmd_payload_size; + wire dataCache_1_io_cpu_execute_haltIt; + wire dataCache_1_io_cpu_execute_refilling; + wire dataCache_1_io_cpu_memory_isWrite; + wire dataCache_1_io_cpu_writeBack_haltIt; + wire [31:0] dataCache_1_io_cpu_writeBack_data; + wire dataCache_1_io_cpu_writeBack_mmuException; + wire dataCache_1_io_cpu_writeBack_unalignedAccess; + wire dataCache_1_io_cpu_writeBack_accessError; + wire dataCache_1_io_cpu_writeBack_isWrite; + wire dataCache_1_io_cpu_writeBack_keepMemRspData; + wire dataCache_1_io_cpu_writeBack_exclusiveOk; + wire dataCache_1_io_cpu_flush_ready; + wire dataCache_1_io_cpu_redo; + wire dataCache_1_io_mem_cmd_valid; + wire dataCache_1_io_mem_cmd_payload_wr; + wire dataCache_1_io_mem_cmd_payload_uncached; + wire [31:0] dataCache_1_io_mem_cmd_payload_address; + wire [31:0] dataCache_1_io_mem_cmd_payload_data; + wire [3:0] dataCache_1_io_mem_cmd_payload_mask; + wire [2:0] dataCache_1_io_mem_cmd_payload_size; + wire dataCache_1_io_mem_cmd_payload_last; + wire [51:0] _zz_memory_MUL_LOW; + wire [51:0] _zz_memory_MUL_LOW_1; + wire [51:0] _zz_memory_MUL_LOW_2; + wire [51:0] _zz_memory_MUL_LOW_3; + wire [32:0] _zz_memory_MUL_LOW_4; + wire [51:0] _zz_memory_MUL_LOW_5; + wire [49:0] _zz_memory_MUL_LOW_6; + wire [51:0] _zz_memory_MUL_LOW_7; + wire [49:0] _zz_memory_MUL_LOW_8; + wire [31:0] _zz_execute_SHIFT_RIGHT; + wire [32:0] _zz_execute_SHIFT_RIGHT_1; + wire [32:0] _zz_execute_SHIFT_RIGHT_2; + wire [31:0] _zz_decode_LEGAL_INSTRUCTION; + wire [31:0] _zz_decode_LEGAL_INSTRUCTION_1; + wire [31:0] _zz_decode_LEGAL_INSTRUCTION_2; + wire _zz_decode_LEGAL_INSTRUCTION_3; + wire [0:0] _zz_decode_LEGAL_INSTRUCTION_4; + wire [14:0] _zz_decode_LEGAL_INSTRUCTION_5; + wire [31:0] _zz_decode_LEGAL_INSTRUCTION_6; + wire [31:0] _zz_decode_LEGAL_INSTRUCTION_7; + wire [31:0] _zz_decode_LEGAL_INSTRUCTION_8; + wire _zz_decode_LEGAL_INSTRUCTION_9; + wire [0:0] _zz_decode_LEGAL_INSTRUCTION_10; + wire [8:0] _zz_decode_LEGAL_INSTRUCTION_11; + wire [31:0] _zz_decode_LEGAL_INSTRUCTION_12; + wire [31:0] _zz_decode_LEGAL_INSTRUCTION_13; + wire [31:0] _zz_decode_LEGAL_INSTRUCTION_14; + wire _zz_decode_LEGAL_INSTRUCTION_15; + wire [0:0] _zz_decode_LEGAL_INSTRUCTION_16; + wire [2:0] _zz_decode_LEGAL_INSTRUCTION_17; + wire [3:0] _zz__zz_IBusCachedPlugin_jump_pcLoad_payload_1; + reg [31:0] _zz_IBusCachedPlugin_jump_pcLoad_payload_5; + wire [1:0] _zz_IBusCachedPlugin_jump_pcLoad_payload_6; + wire [31:0] _zz_IBusCachedPlugin_fetchPc_pc; + wire [2:0] _zz_IBusCachedPlugin_fetchPc_pc_1; + wire [11:0] _zz__zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch; + wire [31:0] _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_2; + wire [19:0] _zz__zz_2; + wire [11:0] _zz__zz_4; + wire [31:0] _zz__zz_6; + wire [31:0] _zz__zz_6_1; + wire [19:0] _zz__zz_IBusCachedPlugin_predictionJumpInterface_payload; + wire [11:0] _zz__zz_IBusCachedPlugin_predictionJumpInterface_payload_2; + wire _zz_IBusCachedPlugin_predictionJumpInterface_payload_4; + wire _zz_IBusCachedPlugin_predictionJumpInterface_payload_5; + wire _zz_IBusCachedPlugin_predictionJumpInterface_payload_6; + wire [2:0] _zz_DBusCachedPlugin_exceptionBus_payload_code; + wire [2:0] _zz_DBusCachedPlugin_exceptionBus_payload_code_1; + reg [7:0] _zz_writeBack_DBusCachedPlugin_rspShifted; + wire [1:0] _zz_writeBack_DBusCachedPlugin_rspShifted_1; + reg [7:0] _zz_writeBack_DBusCachedPlugin_rspShifted_2; + wire [0:0] _zz_writeBack_DBusCachedPlugin_rspShifted_3; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_1; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_2; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_3; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_4; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_5; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_6; + wire [26:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_7; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_8; + wire [1:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_9; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_10; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_11; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_12; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_13; + wire [1:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_14; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_15; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_16; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_17; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_18; + wire [22:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_19; + wire [1:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_20; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_21; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_22; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_23; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_24; + wire [1:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_25; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_26; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_27; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_28; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_29; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_30; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_31; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_32; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_33; + wire [19:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_34; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_35; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_36; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_37; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_38; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_39; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_40; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_41; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_42; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_43; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_44; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_45; + wire [16:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_46; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_47; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_48; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_49; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_50; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_51; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_52; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_53; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_54; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_55; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_56; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_57; + wire [3:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_58; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_59; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_60; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_61; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_62; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_63; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_64; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_65; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_66; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_67; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_68; + wire [13:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_69; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_70; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_71; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_72; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_73; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_74; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_75; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_76; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_77; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_78; + wire [3:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_79; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_80; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_81; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_82; + wire [1:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_83; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_84; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_85; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_86; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_87; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_88; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_89; + wire [3:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_90; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_91; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_92; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_93; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_94; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_95; + wire [1:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_96; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_97; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_98; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_99; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_100; + wire [10:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_101; + wire [5:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_102; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_103; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_104; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_105; + wire [3:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_106; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_107; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_108; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_109; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_110; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_111; + wire [1:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_112; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_113; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_114; + wire [5:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_115; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_116; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_117; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_118; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_119; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_120; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_121; + wire [1:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_122; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_123; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_124; + wire [1:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_125; + wire [7:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_126; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_127; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_128; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_129; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_130; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_131; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_132; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_133; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_134; + wire [5:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_135; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_136; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_137; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_138; + wire [2:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_139; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_140; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_141; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_142; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_143; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_144; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_145; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_146; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_147; + wire [3:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_148; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_149; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_150; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_151; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_152; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_153; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_154; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_155; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_156; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_157; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_158; + wire [1:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_159; + wire [1:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_160; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_161; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_162; + wire [1:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_163; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_164; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_165; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_166; + wire _zz_RegFilePlugin_regFile_port; + wire _zz_decode_RegFilePlugin_rs1Data; + wire _zz_RegFilePlugin_regFile_port_1; + wire _zz_decode_RegFilePlugin_rs2Data; + wire [0:0] _zz__zz_execute_REGFILE_WRITE_DATA; + wire [2:0] _zz__zz_execute_SRC1; + wire [4:0] _zz__zz_execute_SRC1_1; + wire [11:0] _zz__zz_execute_SRC2_3; + wire [31:0] _zz_execute_SrcPlugin_addSub; + wire [31:0] _zz_execute_SrcPlugin_addSub_1; + wire [31:0] _zz_execute_SrcPlugin_addSub_2; + wire [31:0] _zz_execute_SrcPlugin_addSub_3; + wire [31:0] _zz_execute_SrcPlugin_addSub_4; + wire [31:0] _zz_execute_SrcPlugin_addSub_5; + wire [31:0] _zz_execute_SrcPlugin_addSub_6; + wire [19:0] _zz__zz_execute_BranchPlugin_missAlignedTarget_2; + wire [11:0] _zz__zz_execute_BranchPlugin_missAlignedTarget_4; + wire [31:0] _zz__zz_execute_BranchPlugin_missAlignedTarget_6; + wire [31:0] _zz__zz_execute_BranchPlugin_missAlignedTarget_6_1; + wire [31:0] _zz__zz_execute_BranchPlugin_missAlignedTarget_6_2; + wire [19:0] _zz__zz_execute_BranchPlugin_branch_src2_2; + wire [11:0] _zz__zz_execute_BranchPlugin_branch_src2_4; + wire _zz_execute_BranchPlugin_branch_src2_6; + wire _zz_execute_BranchPlugin_branch_src2_7; + wire _zz_execute_BranchPlugin_branch_src2_8; + wire [2:0] _zz_execute_BranchPlugin_branch_src2_9; + wire [1:0] _zz__zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_1; + wire [1:0] _zz__zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_1_1; + wire [1:0] _zz__zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_3; + wire [1:0] _zz__zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_3_1; + wire _zz_when; + wire _zz_when_1; + wire [65:0] _zz_writeBack_MulPlugin_result; + wire [65:0] _zz_writeBack_MulPlugin_result_1; + wire [31:0] _zz__zz_decode_RS2_2; + wire [31:0] _zz__zz_decode_RS2_2_1; + wire [5:0] _zz_memory_DivPlugin_div_counter_valueNext; + wire [0:0] _zz_memory_DivPlugin_div_counter_valueNext_1; + wire [32:0] _zz_memory_DivPlugin_div_stage_0_remainderMinusDenominator; + wire [31:0] _zz_memory_DivPlugin_div_stage_0_outRemainder; + wire [31:0] _zz_memory_DivPlugin_div_stage_0_outRemainder_1; + wire [32:0] _zz_memory_DivPlugin_div_stage_0_outNumerator; + wire [32:0] _zz_memory_DivPlugin_div_result_1; + wire [32:0] _zz_memory_DivPlugin_div_result_2; + wire [32:0] _zz_memory_DivPlugin_div_result_3; + wire [32:0] _zz_memory_DivPlugin_div_result_4; + wire [0:0] _zz_memory_DivPlugin_div_result_5; + wire [32:0] _zz_memory_DivPlugin_rs1_2; + wire [0:0] _zz_memory_DivPlugin_rs1_3; + wire [31:0] _zz_memory_DivPlugin_rs2_1; + wire [0:0] _zz_memory_DivPlugin_rs2_2; + wire [9:0] _zz_execute_CfuPlugin_functionsIds_0; + wire [31:0] _zz_CsrPlugin_csrMapping_readDataInit_41; + wire [26:0] _zz_iBusWishbone_ADR_1; + wire [51:0] memory_MUL_LOW; + wire writeBack_CfuPlugin_CFU_IN_FLIGHT; + wire execute_CfuPlugin_CFU_IN_FLIGHT; + wire [33:0] memory_MUL_HH; + wire [33:0] execute_MUL_HH; + wire [33:0] execute_MUL_HL; + wire [33:0] execute_MUL_LH; + wire [31:0] execute_MUL_LL; + wire [31:0] execute_SHIFT_RIGHT; + wire [31:0] execute_REGFILE_WRITE_DATA; + wire [31:0] memory_MEMORY_STORE_DATA_RF; + wire [31:0] execute_MEMORY_STORE_DATA_RF; + wire decode_CSR_READ_OPCODE; + wire decode_CSR_WRITE_OPCODE; + wire decode_PREDICTION_HAD_BRANCHED2; + wire decode_SRC2_FORCE_ZERO; + wire `Input2Kind_binary_sequential_type decode_CfuPlugin_CFU_INPUT_2_KIND; + wire `Input2Kind_binary_sequential_type _zz_decode_CfuPlugin_CFU_INPUT_2_KIND; + wire `Input2Kind_binary_sequential_type _zz_decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND; + wire `Input2Kind_binary_sequential_type _zz_decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND_1; + wire decode_CfuPlugin_CFU_ENABLE; + wire decode_IS_RS2_SIGNED; + wire decode_IS_RS1_SIGNED; + wire decode_IS_DIV; + wire memory_IS_MUL; + wire execute_IS_MUL; + wire decode_IS_MUL; + wire `EnvCtrlEnum_binary_sequential_type _zz_memory_to_writeBack_ENV_CTRL; + wire `EnvCtrlEnum_binary_sequential_type _zz_memory_to_writeBack_ENV_CTRL_1; + wire `EnvCtrlEnum_binary_sequential_type _zz_execute_to_memory_ENV_CTRL; + wire `EnvCtrlEnum_binary_sequential_type _zz_execute_to_memory_ENV_CTRL_1; + wire `EnvCtrlEnum_binary_sequential_type decode_ENV_CTRL; + wire `EnvCtrlEnum_binary_sequential_type _zz_decode_ENV_CTRL; + wire `EnvCtrlEnum_binary_sequential_type _zz_decode_to_execute_ENV_CTRL; + wire `EnvCtrlEnum_binary_sequential_type _zz_decode_to_execute_ENV_CTRL_1; + wire decode_IS_CSR; + wire `BranchCtrlEnum_binary_sequential_type _zz_decode_to_execute_BRANCH_CTRL; + wire `BranchCtrlEnum_binary_sequential_type _zz_decode_to_execute_BRANCH_CTRL_1; + wire `ShiftCtrlEnum_binary_sequential_type _zz_execute_to_memory_SHIFT_CTRL; + wire `ShiftCtrlEnum_binary_sequential_type _zz_execute_to_memory_SHIFT_CTRL_1; + wire `ShiftCtrlEnum_binary_sequential_type decode_SHIFT_CTRL; + wire `ShiftCtrlEnum_binary_sequential_type _zz_decode_SHIFT_CTRL; + wire `ShiftCtrlEnum_binary_sequential_type _zz_decode_to_execute_SHIFT_CTRL; + wire `ShiftCtrlEnum_binary_sequential_type _zz_decode_to_execute_SHIFT_CTRL_1; + wire `AluBitwiseCtrlEnum_binary_sequential_type decode_ALU_BITWISE_CTRL; + wire `AluBitwiseCtrlEnum_binary_sequential_type _zz_decode_ALU_BITWISE_CTRL; + wire `AluBitwiseCtrlEnum_binary_sequential_type _zz_decode_to_execute_ALU_BITWISE_CTRL; + wire `AluBitwiseCtrlEnum_binary_sequential_type _zz_decode_to_execute_ALU_BITWISE_CTRL_1; + wire decode_SRC_LESS_UNSIGNED; + wire decode_MEMORY_MANAGMENT; + wire memory_MEMORY_WR; + wire decode_MEMORY_WR; + wire execute_BYPASSABLE_MEMORY_STAGE; + wire decode_BYPASSABLE_MEMORY_STAGE; + wire decode_BYPASSABLE_EXECUTE_STAGE; + wire `Src2CtrlEnum_binary_sequential_type decode_SRC2_CTRL; + wire `Src2CtrlEnum_binary_sequential_type _zz_decode_SRC2_CTRL; + wire `Src2CtrlEnum_binary_sequential_type _zz_decode_to_execute_SRC2_CTRL; + wire `Src2CtrlEnum_binary_sequential_type _zz_decode_to_execute_SRC2_CTRL_1; + wire `AluCtrlEnum_binary_sequential_type decode_ALU_CTRL; + wire `AluCtrlEnum_binary_sequential_type _zz_decode_ALU_CTRL; + wire `AluCtrlEnum_binary_sequential_type _zz_decode_to_execute_ALU_CTRL; + wire `AluCtrlEnum_binary_sequential_type _zz_decode_to_execute_ALU_CTRL_1; + wire `Src1CtrlEnum_binary_sequential_type decode_SRC1_CTRL; + wire `Src1CtrlEnum_binary_sequential_type _zz_decode_SRC1_CTRL; + wire `Src1CtrlEnum_binary_sequential_type _zz_decode_to_execute_SRC1_CTRL; + wire `Src1CtrlEnum_binary_sequential_type _zz_decode_to_execute_SRC1_CTRL_1; + wire decode_MEMORY_FORCE_CONSTISTENCY; + wire [31:0] writeBack_FORMAL_PC_NEXT; + wire [31:0] memory_FORMAL_PC_NEXT; + wire [31:0] execute_FORMAL_PC_NEXT; + wire [31:0] decode_FORMAL_PC_NEXT; + wire [31:0] memory_PC; + reg _zz_memory_to_writeBack_CfuPlugin_CFU_IN_FLIGHT; + reg _zz_execute_to_memory_CfuPlugin_CFU_IN_FLIGHT; + wire memory_CfuPlugin_CFU_IN_FLIGHT; + wire `Input2Kind_binary_sequential_type execute_CfuPlugin_CFU_INPUT_2_KIND; + wire `Input2Kind_binary_sequential_type _zz_execute_CfuPlugin_CFU_INPUT_2_KIND; + wire execute_CfuPlugin_CFU_ENABLE; + wire execute_IS_RS1_SIGNED; + wire execute_IS_DIV; + wire execute_IS_RS2_SIGNED; + wire memory_IS_DIV; + wire writeBack_IS_MUL; + wire [33:0] writeBack_MUL_HH; + wire [51:0] writeBack_MUL_LOW; + wire [33:0] memory_MUL_HL; + wire [33:0] memory_MUL_LH; + wire [31:0] memory_MUL_LL; + wire execute_CSR_READ_OPCODE; + wire execute_CSR_WRITE_OPCODE; + wire execute_IS_CSR; + wire `EnvCtrlEnum_binary_sequential_type memory_ENV_CTRL; + wire `EnvCtrlEnum_binary_sequential_type _zz_memory_ENV_CTRL; + wire `EnvCtrlEnum_binary_sequential_type execute_ENV_CTRL; + wire `EnvCtrlEnum_binary_sequential_type _zz_execute_ENV_CTRL; + wire `EnvCtrlEnum_binary_sequential_type writeBack_ENV_CTRL; + wire `EnvCtrlEnum_binary_sequential_type _zz_writeBack_ENV_CTRL; + wire [31:0] execute_BRANCH_CALC; + wire execute_BRANCH_DO; + wire [31:0] execute_PC; + wire execute_PREDICTION_HAD_BRANCHED2; + (* keep , syn_keep *) wire [31:0] execute_RS1 /* synthesis syn_keep = 1 */ ; + wire execute_BRANCH_COND_RESULT; + wire `BranchCtrlEnum_binary_sequential_type execute_BRANCH_CTRL; + wire `BranchCtrlEnum_binary_sequential_type _zz_execute_BRANCH_CTRL; + wire decode_RS2_USE; + wire decode_RS1_USE; + reg [31:0] _zz_decode_RS2; + wire execute_REGFILE_WRITE_VALID; + wire execute_BYPASSABLE_EXECUTE_STAGE; + wire memory_REGFILE_WRITE_VALID; + wire [31:0] memory_INSTRUCTION; + wire memory_BYPASSABLE_MEMORY_STAGE; + wire writeBack_REGFILE_WRITE_VALID; + reg [31:0] decode_RS2; + reg [31:0] decode_RS1; + wire [31:0] memory_SHIFT_RIGHT; + reg [31:0] _zz_decode_RS2_1; + wire `ShiftCtrlEnum_binary_sequential_type memory_SHIFT_CTRL; + wire `ShiftCtrlEnum_binary_sequential_type _zz_memory_SHIFT_CTRL; + wire `ShiftCtrlEnum_binary_sequential_type execute_SHIFT_CTRL; + wire `ShiftCtrlEnum_binary_sequential_type _zz_execute_SHIFT_CTRL; + wire execute_SRC_LESS_UNSIGNED; + wire execute_SRC2_FORCE_ZERO; + wire execute_SRC_USE_SUB_LESS; + wire [31:0] _zz_execute_SRC2; + wire `Src2CtrlEnum_binary_sequential_type execute_SRC2_CTRL; + wire `Src2CtrlEnum_binary_sequential_type _zz_execute_SRC2_CTRL; + wire `Src1CtrlEnum_binary_sequential_type execute_SRC1_CTRL; + wire `Src1CtrlEnum_binary_sequential_type _zz_execute_SRC1_CTRL; + wire decode_SRC_USE_SUB_LESS; + wire decode_SRC_ADD_ZERO; + wire [31:0] execute_SRC_ADD_SUB; + wire execute_SRC_LESS; + wire `AluCtrlEnum_binary_sequential_type execute_ALU_CTRL; + wire `AluCtrlEnum_binary_sequential_type _zz_execute_ALU_CTRL; + wire [31:0] execute_SRC2; + wire [31:0] execute_SRC1; + wire `AluBitwiseCtrlEnum_binary_sequential_type execute_ALU_BITWISE_CTRL; + wire `AluBitwiseCtrlEnum_binary_sequential_type _zz_execute_ALU_BITWISE_CTRL; + wire [31:0] _zz_lastStageRegFileWrite_payload_address; + wire _zz_lastStageRegFileWrite_valid; + reg _zz_1; + wire [31:0] decode_INSTRUCTION_ANTICIPATED; + reg decode_REGFILE_WRITE_VALID; + wire decode_LEGAL_INSTRUCTION; + wire `Input2Kind_binary_sequential_type _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_1; + wire `EnvCtrlEnum_binary_sequential_type _zz_decode_ENV_CTRL_1; + wire `BranchCtrlEnum_binary_sequential_type _zz_decode_BRANCH_CTRL; + wire `ShiftCtrlEnum_binary_sequential_type _zz_decode_SHIFT_CTRL_1; + wire `AluBitwiseCtrlEnum_binary_sequential_type _zz_decode_ALU_BITWISE_CTRL_1; + wire `Src2CtrlEnum_binary_sequential_type _zz_decode_SRC2_CTRL_1; + wire `AluCtrlEnum_binary_sequential_type _zz_decode_ALU_CTRL_1; + wire `Src1CtrlEnum_binary_sequential_type _zz_decode_SRC1_CTRL_1; + reg [31:0] _zz_decode_RS2_2; + wire writeBack_MEMORY_WR; + wire [31:0] writeBack_MEMORY_STORE_DATA_RF; + wire [31:0] writeBack_REGFILE_WRITE_DATA; + wire writeBack_MEMORY_ENABLE; + wire [31:0] memory_REGFILE_WRITE_DATA; + wire memory_MEMORY_ENABLE; + wire execute_MEMORY_FORCE_CONSTISTENCY; + wire execute_MEMORY_MANAGMENT; + (* keep , syn_keep *) wire [31:0] execute_RS2 /* synthesis syn_keep = 1 */ ; + wire execute_MEMORY_WR; + wire [31:0] execute_SRC_ADD; + wire execute_MEMORY_ENABLE; + wire [31:0] execute_INSTRUCTION; + wire decode_MEMORY_ENABLE; + wire decode_FLUSH_ALL; + reg IBusCachedPlugin_rsp_issueDetected_4; + reg IBusCachedPlugin_rsp_issueDetected_3; + reg IBusCachedPlugin_rsp_issueDetected_2; + reg IBusCachedPlugin_rsp_issueDetected_1; + wire `BranchCtrlEnum_binary_sequential_type decode_BRANCH_CTRL; + wire `BranchCtrlEnum_binary_sequential_type _zz_decode_BRANCH_CTRL_1; + wire [31:0] decode_INSTRUCTION; + reg [31:0] _zz_execute_to_memory_FORMAL_PC_NEXT; + reg [31:0] _zz_decode_to_execute_FORMAL_PC_NEXT; + wire [31:0] decode_PC; + wire [31:0] writeBack_PC; + wire [31:0] writeBack_INSTRUCTION; + reg decode_arbitration_haltItself; + reg decode_arbitration_haltByOther; + reg decode_arbitration_removeIt; + wire decode_arbitration_flushIt; + reg decode_arbitration_flushNext; + wire decode_arbitration_isValid; + wire decode_arbitration_isStuck; + wire decode_arbitration_isStuckByOthers; + wire decode_arbitration_isFlushed; + wire decode_arbitration_isMoving; + wire decode_arbitration_isFiring; + reg execute_arbitration_haltItself; + reg execute_arbitration_haltByOther; + reg execute_arbitration_removeIt; + wire execute_arbitration_flushIt; + reg execute_arbitration_flushNext; + reg execute_arbitration_isValid; + wire execute_arbitration_isStuck; + wire execute_arbitration_isStuckByOthers; + wire execute_arbitration_isFlushed; + wire execute_arbitration_isMoving; + wire execute_arbitration_isFiring; + reg memory_arbitration_haltItself; + wire memory_arbitration_haltByOther; + reg memory_arbitration_removeIt; + wire memory_arbitration_flushIt; + wire memory_arbitration_flushNext; + reg memory_arbitration_isValid; + wire memory_arbitration_isStuck; + wire memory_arbitration_isStuckByOthers; + wire memory_arbitration_isFlushed; + wire memory_arbitration_isMoving; + wire memory_arbitration_isFiring; + reg writeBack_arbitration_haltItself; + wire writeBack_arbitration_haltByOther; + reg writeBack_arbitration_removeIt; + reg writeBack_arbitration_flushIt; + reg writeBack_arbitration_flushNext; + reg writeBack_arbitration_isValid; + wire writeBack_arbitration_isStuck; + wire writeBack_arbitration_isStuckByOthers; + wire writeBack_arbitration_isFlushed; + wire writeBack_arbitration_isMoving; + wire writeBack_arbitration_isFiring; + wire [31:0] lastStageInstruction /* verilator public */ ; + wire [31:0] lastStagePc /* verilator public */ ; + wire lastStageIsValid /* verilator public */ ; + wire lastStageIsFiring /* verilator public */ ; + reg IBusCachedPlugin_fetcherHalt; + reg IBusCachedPlugin_incomingInstruction; + wire IBusCachedPlugin_predictionJumpInterface_valid; + (* keep , syn_keep *) wire [31:0] IBusCachedPlugin_predictionJumpInterface_payload /* synthesis syn_keep = 1 */ ; + reg IBusCachedPlugin_decodePrediction_cmd_hadBranch; + wire IBusCachedPlugin_decodePrediction_rsp_wasWrong; + wire IBusCachedPlugin_pcValids_0; + wire IBusCachedPlugin_pcValids_1; + wire IBusCachedPlugin_pcValids_2; + wire IBusCachedPlugin_pcValids_3; + reg IBusCachedPlugin_decodeExceptionPort_valid; + reg [3:0] IBusCachedPlugin_decodeExceptionPort_payload_code; + wire [31:0] IBusCachedPlugin_decodeExceptionPort_payload_badAddr; + wire IBusCachedPlugin_mmuBus_cmd_0_isValid; + wire IBusCachedPlugin_mmuBus_cmd_0_isStuck; + wire [31:0] IBusCachedPlugin_mmuBus_cmd_0_virtualAddress; + wire IBusCachedPlugin_mmuBus_cmd_0_bypassTranslation; + wire [31:0] IBusCachedPlugin_mmuBus_rsp_physicalAddress; + wire IBusCachedPlugin_mmuBus_rsp_isIoAccess; + wire IBusCachedPlugin_mmuBus_rsp_isPaging; + wire IBusCachedPlugin_mmuBus_rsp_allowRead; + wire IBusCachedPlugin_mmuBus_rsp_allowWrite; + wire IBusCachedPlugin_mmuBus_rsp_allowExecute; + wire IBusCachedPlugin_mmuBus_rsp_exception; + wire IBusCachedPlugin_mmuBus_rsp_refilling; + wire IBusCachedPlugin_mmuBus_rsp_bypassTranslation; + wire IBusCachedPlugin_mmuBus_end; + wire IBusCachedPlugin_mmuBus_busy; + wire dBus_cmd_valid; + wire dBus_cmd_ready; + wire dBus_cmd_payload_wr; + wire dBus_cmd_payload_uncached; + wire [31:0] dBus_cmd_payload_address; + wire [31:0] dBus_cmd_payload_data; + wire [3:0] dBus_cmd_payload_mask; + wire [2:0] dBus_cmd_payload_size; + wire dBus_cmd_payload_last; + wire dBus_rsp_valid; + wire dBus_rsp_payload_last; + wire [31:0] dBus_rsp_payload_data; + wire dBus_rsp_payload_error; + wire DBusCachedPlugin_mmuBus_cmd_0_isValid; + wire DBusCachedPlugin_mmuBus_cmd_0_isStuck; + wire [31:0] DBusCachedPlugin_mmuBus_cmd_0_virtualAddress; + wire DBusCachedPlugin_mmuBus_cmd_0_bypassTranslation; + wire [31:0] DBusCachedPlugin_mmuBus_rsp_physicalAddress; + wire DBusCachedPlugin_mmuBus_rsp_isIoAccess; + wire DBusCachedPlugin_mmuBus_rsp_isPaging; + wire DBusCachedPlugin_mmuBus_rsp_allowRead; + wire DBusCachedPlugin_mmuBus_rsp_allowWrite; + wire DBusCachedPlugin_mmuBus_rsp_allowExecute; + wire DBusCachedPlugin_mmuBus_rsp_exception; + wire DBusCachedPlugin_mmuBus_rsp_refilling; + wire DBusCachedPlugin_mmuBus_rsp_bypassTranslation; + wire DBusCachedPlugin_mmuBus_end; + wire DBusCachedPlugin_mmuBus_busy; + reg DBusCachedPlugin_redoBranch_valid; + wire [31:0] DBusCachedPlugin_redoBranch_payload; + reg DBusCachedPlugin_exceptionBus_valid; + reg [3:0] DBusCachedPlugin_exceptionBus_payload_code; + wire [31:0] DBusCachedPlugin_exceptionBus_payload_badAddr; + wire decodeExceptionPort_valid; + wire [3:0] decodeExceptionPort_payload_code; + wire [31:0] decodeExceptionPort_payload_badAddr; + wire BranchPlugin_jumpInterface_valid; + wire [31:0] BranchPlugin_jumpInterface_payload; + reg BranchPlugin_branchExceptionPort_valid; + wire [3:0] BranchPlugin_branchExceptionPort_payload_code; + wire [31:0] BranchPlugin_branchExceptionPort_payload_badAddr; + wire [31:0] CsrPlugin_csrMapping_readDataSignal; + wire [31:0] CsrPlugin_csrMapping_readDataInit; + wire [31:0] CsrPlugin_csrMapping_writeDataSignal; + wire CsrPlugin_csrMapping_allowCsrSignal; + wire CsrPlugin_csrMapping_hazardFree; + reg CsrPlugin_inWfi /* verilator public */ ; + wire CsrPlugin_thirdPartyWake; + reg CsrPlugin_jumpInterface_valid; + reg [31:0] CsrPlugin_jumpInterface_payload; + wire CsrPlugin_exceptionPendings_0; + wire CsrPlugin_exceptionPendings_1; + wire CsrPlugin_exceptionPendings_2; + wire CsrPlugin_exceptionPendings_3; + wire externalInterrupt; + wire contextSwitching; + reg [1:0] CsrPlugin_privilege; + wire CsrPlugin_forceMachineWire; + reg CsrPlugin_selfException_valid; + reg [3:0] CsrPlugin_selfException_payload_code; + wire [31:0] CsrPlugin_selfException_payload_badAddr; + wire CsrPlugin_allowInterrupts; + wire CsrPlugin_allowException; + wire CsrPlugin_allowEbreakException; + wire IBusCachedPlugin_externalFlush; + wire IBusCachedPlugin_jump_pcLoad_valid; + wire [31:0] IBusCachedPlugin_jump_pcLoad_payload; + wire [3:0] _zz_IBusCachedPlugin_jump_pcLoad_payload; + wire [3:0] _zz_IBusCachedPlugin_jump_pcLoad_payload_1; + wire _zz_IBusCachedPlugin_jump_pcLoad_payload_2; + wire _zz_IBusCachedPlugin_jump_pcLoad_payload_3; + wire _zz_IBusCachedPlugin_jump_pcLoad_payload_4; + wire IBusCachedPlugin_fetchPc_output_valid; + wire IBusCachedPlugin_fetchPc_output_ready; + wire [31:0] IBusCachedPlugin_fetchPc_output_payload; + reg [31:0] IBusCachedPlugin_fetchPc_pcReg /* verilator public */ ; + reg IBusCachedPlugin_fetchPc_correction; + reg IBusCachedPlugin_fetchPc_correctionReg; + wire IBusCachedPlugin_fetchPc_output_fire; + wire IBusCachedPlugin_fetchPc_corrected; + reg IBusCachedPlugin_fetchPc_pcRegPropagate; + reg IBusCachedPlugin_fetchPc_booted; + reg IBusCachedPlugin_fetchPc_inc; + wire when_Fetcher_l131; + wire IBusCachedPlugin_fetchPc_output_fire_1; + wire when_Fetcher_l131_1; + reg [31:0] IBusCachedPlugin_fetchPc_pc; + wire IBusCachedPlugin_fetchPc_redo_valid; + wire [31:0] IBusCachedPlugin_fetchPc_redo_payload; + reg IBusCachedPlugin_fetchPc_flushed; + wire when_Fetcher_l158; + reg IBusCachedPlugin_iBusRsp_redoFetch; + wire IBusCachedPlugin_iBusRsp_stages_0_input_valid; + wire IBusCachedPlugin_iBusRsp_stages_0_input_ready; + wire [31:0] IBusCachedPlugin_iBusRsp_stages_0_input_payload; + wire IBusCachedPlugin_iBusRsp_stages_0_output_valid; + wire IBusCachedPlugin_iBusRsp_stages_0_output_ready; + wire [31:0] IBusCachedPlugin_iBusRsp_stages_0_output_payload; + reg IBusCachedPlugin_iBusRsp_stages_0_halt; + wire IBusCachedPlugin_iBusRsp_stages_1_input_valid; + wire IBusCachedPlugin_iBusRsp_stages_1_input_ready; + wire [31:0] IBusCachedPlugin_iBusRsp_stages_1_input_payload; + wire IBusCachedPlugin_iBusRsp_stages_1_output_valid; + wire IBusCachedPlugin_iBusRsp_stages_1_output_ready; + wire [31:0] IBusCachedPlugin_iBusRsp_stages_1_output_payload; + reg IBusCachedPlugin_iBusRsp_stages_1_halt; + wire IBusCachedPlugin_iBusRsp_stages_2_input_valid; + wire IBusCachedPlugin_iBusRsp_stages_2_input_ready; + wire [31:0] IBusCachedPlugin_iBusRsp_stages_2_input_payload; + wire IBusCachedPlugin_iBusRsp_stages_2_output_valid; + wire IBusCachedPlugin_iBusRsp_stages_2_output_ready; + wire [31:0] IBusCachedPlugin_iBusRsp_stages_2_output_payload; + reg IBusCachedPlugin_iBusRsp_stages_2_halt; + wire _zz_IBusCachedPlugin_iBusRsp_stages_0_input_ready; + wire _zz_IBusCachedPlugin_iBusRsp_stages_1_input_ready; + wire _zz_IBusCachedPlugin_iBusRsp_stages_2_input_ready; + wire IBusCachedPlugin_iBusRsp_flush; + wire _zz_IBusCachedPlugin_iBusRsp_stages_0_output_ready; + wire _zz_IBusCachedPlugin_iBusRsp_stages_0_output_ready_1; + reg _zz_IBusCachedPlugin_iBusRsp_stages_0_output_ready_2; + wire IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_valid; + wire IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_ready; + wire [31:0] IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_payload; + reg _zz_IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_valid; + reg [31:0] _zz_IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_payload; + reg IBusCachedPlugin_iBusRsp_readyForError; + wire IBusCachedPlugin_iBusRsp_output_valid; + wire IBusCachedPlugin_iBusRsp_output_ready; + wire [31:0] IBusCachedPlugin_iBusRsp_output_payload_pc; + wire IBusCachedPlugin_iBusRsp_output_payload_rsp_error; + wire [31:0] IBusCachedPlugin_iBusRsp_output_payload_rsp_inst; + wire IBusCachedPlugin_iBusRsp_output_payload_isRvc; + wire when_Fetcher_l240; + wire when_Fetcher_l320; + reg IBusCachedPlugin_injector_nextPcCalc_valids_0; + wire when_Fetcher_l329; + reg IBusCachedPlugin_injector_nextPcCalc_valids_1; + wire when_Fetcher_l329_1; + reg IBusCachedPlugin_injector_nextPcCalc_valids_2; + wire when_Fetcher_l329_2; + reg IBusCachedPlugin_injector_nextPcCalc_valids_3; + wire when_Fetcher_l329_3; + reg IBusCachedPlugin_injector_nextPcCalc_valids_4; + wire when_Fetcher_l329_4; + wire _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch; + reg [18:0] _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_1; + wire _zz_2; + reg [10:0] _zz_3; + wire _zz_4; + reg [18:0] _zz_5; + reg _zz_6; + wire _zz_IBusCachedPlugin_predictionJumpInterface_payload; + reg [10:0] _zz_IBusCachedPlugin_predictionJumpInterface_payload_1; + wire _zz_IBusCachedPlugin_predictionJumpInterface_payload_2; + reg [18:0] _zz_IBusCachedPlugin_predictionJumpInterface_payload_3; + wire iBus_cmd_valid; + wire iBus_cmd_ready; + reg [31:0] iBus_cmd_payload_address; + wire [2:0] iBus_cmd_payload_size; + wire iBus_rsp_valid; + wire [31:0] iBus_rsp_payload_data; + wire iBus_rsp_payload_error; + wire [31:0] _zz_IBusCachedPlugin_rspCounter; + reg [31:0] IBusCachedPlugin_rspCounter; + wire IBusCachedPlugin_s0_tightlyCoupledHit; + reg IBusCachedPlugin_s1_tightlyCoupledHit; + reg IBusCachedPlugin_s2_tightlyCoupledHit; + wire IBusCachedPlugin_rsp_iBusRspOutputHalt; + wire IBusCachedPlugin_rsp_issueDetected; + reg IBusCachedPlugin_rsp_redoFetch; + wire when_IBusCachedPlugin_l239; + wire when_IBusCachedPlugin_l244; + wire when_IBusCachedPlugin_l250; + wire when_IBusCachedPlugin_l256; + wire when_IBusCachedPlugin_l267; + wire dataCache_1_io_mem_cmd_s2mPipe_valid; + reg dataCache_1_io_mem_cmd_s2mPipe_ready; + wire dataCache_1_io_mem_cmd_s2mPipe_payload_wr; + wire dataCache_1_io_mem_cmd_s2mPipe_payload_uncached; + wire [31:0] dataCache_1_io_mem_cmd_s2mPipe_payload_address; + wire [31:0] dataCache_1_io_mem_cmd_s2mPipe_payload_data; + wire [3:0] dataCache_1_io_mem_cmd_s2mPipe_payload_mask; + wire [2:0] dataCache_1_io_mem_cmd_s2mPipe_payload_size; + wire dataCache_1_io_mem_cmd_s2mPipe_payload_last; + reg dataCache_1_io_mem_cmd_rValid; + reg dataCache_1_io_mem_cmd_rData_wr; + reg dataCache_1_io_mem_cmd_rData_uncached; + reg [31:0] dataCache_1_io_mem_cmd_rData_address; + reg [31:0] dataCache_1_io_mem_cmd_rData_data; + reg [3:0] dataCache_1_io_mem_cmd_rData_mask; + reg [2:0] dataCache_1_io_mem_cmd_rData_size; + reg dataCache_1_io_mem_cmd_rData_last; + wire dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_valid; + wire dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_ready; + wire dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_payload_wr; + wire dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_payload_uncached; + wire [31:0] dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_payload_address; + wire [31:0] dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_payload_data; + wire [3:0] dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_payload_mask; + wire [2:0] dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_payload_size; + wire dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_payload_last; + reg dataCache_1_io_mem_cmd_s2mPipe_rValid; + reg dataCache_1_io_mem_cmd_s2mPipe_rData_wr; + reg dataCache_1_io_mem_cmd_s2mPipe_rData_uncached; + reg [31:0] dataCache_1_io_mem_cmd_s2mPipe_rData_address; + reg [31:0] dataCache_1_io_mem_cmd_s2mPipe_rData_data; + reg [3:0] dataCache_1_io_mem_cmd_s2mPipe_rData_mask; + reg [2:0] dataCache_1_io_mem_cmd_s2mPipe_rData_size; + reg dataCache_1_io_mem_cmd_s2mPipe_rData_last; + wire when_Stream_l342; + wire [31:0] _zz_DBusCachedPlugin_rspCounter; + reg [31:0] DBusCachedPlugin_rspCounter; + wire when_DBusCachedPlugin_l303; + wire [1:0] execute_DBusCachedPlugin_size; + reg [31:0] _zz_execute_MEMORY_STORE_DATA_RF; + wire dataCache_1_io_cpu_flush_isStall; + wire when_DBusCachedPlugin_l343; + wire when_DBusCachedPlugin_l359; + wire when_DBusCachedPlugin_l386; + wire when_DBusCachedPlugin_l438; + wire when_DBusCachedPlugin_l458; + wire [7:0] writeBack_DBusCachedPlugin_rspSplits_0; + wire [7:0] writeBack_DBusCachedPlugin_rspSplits_1; + wire [7:0] writeBack_DBusCachedPlugin_rspSplits_2; + wire [7:0] writeBack_DBusCachedPlugin_rspSplits_3; + reg [31:0] writeBack_DBusCachedPlugin_rspShifted; + wire [31:0] writeBack_DBusCachedPlugin_rspRf; + wire [1:0] switch_Misc_l200; + wire _zz_writeBack_DBusCachedPlugin_rspFormated; + reg [31:0] _zz_writeBack_DBusCachedPlugin_rspFormated_1; + wire _zz_writeBack_DBusCachedPlugin_rspFormated_2; + reg [31:0] _zz_writeBack_DBusCachedPlugin_rspFormated_3; + reg [31:0] writeBack_DBusCachedPlugin_rspFormated; + wire when_DBusCachedPlugin_l484; + wire [33:0] _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2; + wire _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_3; + wire _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_4; + wire _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_5; + wire _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_6; + wire _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_7; + wire `Src1CtrlEnum_binary_sequential_type _zz_decode_SRC1_CTRL_2; + wire `AluCtrlEnum_binary_sequential_type _zz_decode_ALU_CTRL_2; + wire `Src2CtrlEnum_binary_sequential_type _zz_decode_SRC2_CTRL_2; + wire `AluBitwiseCtrlEnum_binary_sequential_type _zz_decode_ALU_BITWISE_CTRL_2; + wire `ShiftCtrlEnum_binary_sequential_type _zz_decode_SHIFT_CTRL_2; + wire `BranchCtrlEnum_binary_sequential_type _zz_decode_BRANCH_CTRL_2; + wire `EnvCtrlEnum_binary_sequential_type _zz_decode_ENV_CTRL_2; + wire `Input2Kind_binary_sequential_type _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_8; + wire when_RegFilePlugin_l63; + wire [4:0] decode_RegFilePlugin_regFileReadAddress1; + wire [4:0] decode_RegFilePlugin_regFileReadAddress2; + wire [31:0] decode_RegFilePlugin_rs1Data; + wire [31:0] decode_RegFilePlugin_rs2Data; + reg lastStageRegFileWrite_valid /* verilator public */ ; + reg [4:0] lastStageRegFileWrite_payload_address /* verilator public */ ; + reg [31:0] lastStageRegFileWrite_payload_data /* verilator public */ ; + reg _zz_7; + reg [31:0] execute_IntAluPlugin_bitwise; + reg [31:0] _zz_execute_REGFILE_WRITE_DATA; + reg [31:0] _zz_execute_SRC1; + wire _zz_execute_SRC2_1; + reg [19:0] _zz_execute_SRC2_2; + wire _zz_execute_SRC2_3; + reg [19:0] _zz_execute_SRC2_4; + reg [31:0] _zz_execute_SRC2_5; + reg [31:0] execute_SrcPlugin_addSub; + wire execute_SrcPlugin_less; + wire [4:0] execute_FullBarrelShifterPlugin_amplitude; + reg [31:0] _zz_execute_FullBarrelShifterPlugin_reversed; + wire [31:0] execute_FullBarrelShifterPlugin_reversed; + reg [31:0] _zz_decode_RS2_3; + reg HazardSimplePlugin_src0Hazard; + reg HazardSimplePlugin_src1Hazard; + wire HazardSimplePlugin_writeBackWrites_valid; + wire [4:0] HazardSimplePlugin_writeBackWrites_payload_address; + wire [31:0] HazardSimplePlugin_writeBackWrites_payload_data; + reg HazardSimplePlugin_writeBackBuffer_valid; + reg [4:0] HazardSimplePlugin_writeBackBuffer_payload_address; + reg [31:0] HazardSimplePlugin_writeBackBuffer_payload_data; + wire HazardSimplePlugin_addr0Match; + wire HazardSimplePlugin_addr1Match; + wire when_HazardSimplePlugin_l47; + wire when_HazardSimplePlugin_l48; + wire when_HazardSimplePlugin_l51; + wire when_HazardSimplePlugin_l45; + wire when_HazardSimplePlugin_l57; + wire when_HazardSimplePlugin_l58; + wire when_HazardSimplePlugin_l48_1; + wire when_HazardSimplePlugin_l51_1; + wire when_HazardSimplePlugin_l45_1; + wire when_HazardSimplePlugin_l57_1; + wire when_HazardSimplePlugin_l58_1; + wire when_HazardSimplePlugin_l48_2; + wire when_HazardSimplePlugin_l51_2; + wire when_HazardSimplePlugin_l45_2; + wire when_HazardSimplePlugin_l57_2; + wire when_HazardSimplePlugin_l58_2; + wire when_HazardSimplePlugin_l105; + wire when_HazardSimplePlugin_l108; + wire when_HazardSimplePlugin_l113; + wire execute_BranchPlugin_eq; + wire [2:0] switch_Misc_l200_1; + reg _zz_execute_BRANCH_COND_RESULT; + reg _zz_execute_BRANCH_COND_RESULT_1; + wire _zz_execute_BranchPlugin_missAlignedTarget; + reg [19:0] _zz_execute_BranchPlugin_missAlignedTarget_1; + wire _zz_execute_BranchPlugin_missAlignedTarget_2; + reg [10:0] _zz_execute_BranchPlugin_missAlignedTarget_3; + wire _zz_execute_BranchPlugin_missAlignedTarget_4; + reg [18:0] _zz_execute_BranchPlugin_missAlignedTarget_5; + reg _zz_execute_BranchPlugin_missAlignedTarget_6; + wire execute_BranchPlugin_missAlignedTarget; + reg [31:0] execute_BranchPlugin_branch_src1; + reg [31:0] execute_BranchPlugin_branch_src2; + wire _zz_execute_BranchPlugin_branch_src2; + reg [19:0] _zz_execute_BranchPlugin_branch_src2_1; + wire _zz_execute_BranchPlugin_branch_src2_2; + reg [10:0] _zz_execute_BranchPlugin_branch_src2_3; + wire _zz_execute_BranchPlugin_branch_src2_4; + reg [18:0] _zz_execute_BranchPlugin_branch_src2_5; + wire [31:0] execute_BranchPlugin_branchAdder; + wire when_BranchPlugin_l296; + reg [1:0] CsrPlugin_misa_base; + reg [25:0] CsrPlugin_misa_extensions; + reg [1:0] CsrPlugin_mtvec_mode; + reg [29:0] CsrPlugin_mtvec_base; + reg [31:0] CsrPlugin_mepc; + reg CsrPlugin_mstatus_MIE; + reg CsrPlugin_mstatus_MPIE; + reg [1:0] CsrPlugin_mstatus_MPP; + reg CsrPlugin_mip_MEIP; + reg CsrPlugin_mip_MTIP; + reg CsrPlugin_mip_MSIP; + reg CsrPlugin_mie_MEIE; + reg CsrPlugin_mie_MTIE; + reg CsrPlugin_mie_MSIE; + reg [31:0] CsrPlugin_mscratch; + reg CsrPlugin_mcause_interrupt; + reg [3:0] CsrPlugin_mcause_exceptionCode; + reg [31:0] CsrPlugin_mtval; + reg [63:0] CsrPlugin_mcycle = 64'b0000000000000000000000000000000000000000000000000000000000000000; + reg [63:0] CsrPlugin_minstret = 64'b0000000000000000000000000000000000000000000000000000000000000000; + wire _zz_when_CsrPlugin_l952; + wire _zz_when_CsrPlugin_l952_1; + wire _zz_when_CsrPlugin_l952_2; + reg CsrPlugin_exceptionPortCtrl_exceptionValids_decode; + reg CsrPlugin_exceptionPortCtrl_exceptionValids_execute; + reg CsrPlugin_exceptionPortCtrl_exceptionValids_memory; + reg CsrPlugin_exceptionPortCtrl_exceptionValids_writeBack; + reg CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_decode; + reg CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_execute; + reg CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_memory; + reg CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_writeBack; + reg [3:0] CsrPlugin_exceptionPortCtrl_exceptionContext_code; + reg [31:0] CsrPlugin_exceptionPortCtrl_exceptionContext_badAddr; + wire [1:0] CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilegeUncapped; + wire [1:0] CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilege; + wire [1:0] _zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code; + wire _zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_1; + wire [1:0] _zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_2; + wire _zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_3; + wire when_CsrPlugin_l909; + wire when_CsrPlugin_l909_1; + wire when_CsrPlugin_l909_2; + wire when_CsrPlugin_l909_3; + wire when_CsrPlugin_l922; + reg CsrPlugin_interrupt_valid; + reg [3:0] CsrPlugin_interrupt_code /* verilator public */ ; + reg [1:0] CsrPlugin_interrupt_targetPrivilege; + wire when_CsrPlugin_l946; + wire when_CsrPlugin_l952; + wire when_CsrPlugin_l952_1; + wire when_CsrPlugin_l952_2; + wire CsrPlugin_exception; + reg CsrPlugin_lastStageWasWfi; + reg CsrPlugin_pipelineLiberator_pcValids_0; + reg CsrPlugin_pipelineLiberator_pcValids_1; + reg CsrPlugin_pipelineLiberator_pcValids_2; + wire CsrPlugin_pipelineLiberator_active; + wire when_CsrPlugin_l980; + wire when_CsrPlugin_l980_1; + wire when_CsrPlugin_l980_2; + wire when_CsrPlugin_l985; + reg CsrPlugin_pipelineLiberator_done; + wire when_CsrPlugin_l991; + wire CsrPlugin_interruptJump /* verilator public */ ; + reg CsrPlugin_hadException /* verilator public */ ; + reg [1:0] CsrPlugin_targetPrivilege; + reg [3:0] CsrPlugin_trapCause; + reg [1:0] CsrPlugin_xtvec_mode; + reg [29:0] CsrPlugin_xtvec_base; + wire when_CsrPlugin_l1019; + wire when_CsrPlugin_l1064; + wire [1:0] switch_CsrPlugin_l1068; + reg execute_CsrPlugin_wfiWake; + wire when_CsrPlugin_l1108; + wire when_CsrPlugin_l1110; + wire when_CsrPlugin_l1116; + wire execute_CsrPlugin_blockedBySideEffects; + reg execute_CsrPlugin_illegalAccess; + reg execute_CsrPlugin_illegalInstruction; + wire when_CsrPlugin_l1129; + wire when_CsrPlugin_l1136; + wire when_CsrPlugin_l1137; + wire when_CsrPlugin_l1144; + reg execute_CsrPlugin_writeInstruction; + reg execute_CsrPlugin_readInstruction; + wire execute_CsrPlugin_writeEnable; + wire execute_CsrPlugin_readEnable; + wire [31:0] execute_CsrPlugin_readToWriteData; + wire switch_Misc_l200_2; + reg [31:0] _zz_CsrPlugin_csrMapping_writeDataSignal; + wire when_CsrPlugin_l1176; + wire when_CsrPlugin_l1180; + wire [11:0] execute_CsrPlugin_csrAddress; + reg execute_MulPlugin_aSigned; + reg execute_MulPlugin_bSigned; + wire [31:0] execute_MulPlugin_a; + wire [31:0] execute_MulPlugin_b; + wire [1:0] switch_MulPlugin_l87; + wire [15:0] execute_MulPlugin_aULow; + wire [15:0] execute_MulPlugin_bULow; + wire [16:0] execute_MulPlugin_aSLow; + wire [16:0] execute_MulPlugin_bSLow; + wire [16:0] execute_MulPlugin_aHigh; + wire [16:0] execute_MulPlugin_bHigh; + wire [65:0] writeBack_MulPlugin_result; + wire when_MulPlugin_l147; + wire [1:0] switch_MulPlugin_l148; + reg [32:0] memory_DivPlugin_rs1; + reg [31:0] memory_DivPlugin_rs2; + reg [64:0] memory_DivPlugin_accumulator; + wire memory_DivPlugin_frontendOk; + reg memory_DivPlugin_div_needRevert; + reg memory_DivPlugin_div_counter_willIncrement; + reg memory_DivPlugin_div_counter_willClear; + reg [5:0] memory_DivPlugin_div_counter_valueNext; + reg [5:0] memory_DivPlugin_div_counter_value; + wire memory_DivPlugin_div_counter_willOverflowIfInc; + wire memory_DivPlugin_div_counter_willOverflow; + reg memory_DivPlugin_div_done; + wire when_MulDivIterativePlugin_l126; + wire when_MulDivIterativePlugin_l126_1; + reg [31:0] memory_DivPlugin_div_result; + wire when_MulDivIterativePlugin_l128; + wire when_MulDivIterativePlugin_l129; + wire when_MulDivIterativePlugin_l132; + wire [31:0] _zz_memory_DivPlugin_div_stage_0_remainderShifted; + wire [32:0] memory_DivPlugin_div_stage_0_remainderShifted; + wire [32:0] memory_DivPlugin_div_stage_0_remainderMinusDenominator; + wire [31:0] memory_DivPlugin_div_stage_0_outRemainder; + wire [31:0] memory_DivPlugin_div_stage_0_outNumerator; + wire when_MulDivIterativePlugin_l151; + wire [31:0] _zz_memory_DivPlugin_div_result; + wire when_MulDivIterativePlugin_l162; + wire _zz_memory_DivPlugin_rs2; + wire _zz_memory_DivPlugin_rs1; + reg [32:0] _zz_memory_DivPlugin_rs1_1; + reg [31:0] externalInterruptArray_regNext; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit; + wire [31:0] _zz_CsrPlugin_csrMapping_readDataInit_1; + wire execute_CfuPlugin_schedule; + reg execute_CfuPlugin_hold; + reg execute_CfuPlugin_fired; + wire CfuPlugin_bus_cmd_fire; + wire when_CfuPlugin_l171; + wire when_CfuPlugin_l175; + wire [9:0] execute_CfuPlugin_functionsIds_0; + wire _zz_CfuPlugin_bus_cmd_payload_inputs_1; + reg [23:0] _zz_CfuPlugin_bus_cmd_payload_inputs_1_1; + reg [31:0] _zz_CfuPlugin_bus_cmd_payload_inputs_1_2; + wire CfuPlugin_bus_rsp_rsp_valid; + reg CfuPlugin_bus_rsp_rsp_ready; + wire [31:0] CfuPlugin_bus_rsp_rsp_payload_outputs_0; + reg CfuPlugin_bus_rsp_rValid; + reg [31:0] CfuPlugin_bus_rsp_rData_outputs_0; + wire when_CfuPlugin_l208; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_2; + reg [31:0] _zz_when_GenCoreDefault_l367; + wire when_GenCoreDefault_l367; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_3; + reg [31:0] _zz_when_GenCoreDefault_l367_1; + wire when_GenCoreDefault_l367_1; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_4; + reg [31:0] _zz_when_GenCoreDefault_l367_2; + wire when_GenCoreDefault_l367_2; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_5; + reg [31:0] _zz_when_GenCoreDefault_l367_3; + wire when_GenCoreDefault_l367_3; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_6; + reg [31:0] _zz_when_GenCoreDefault_l367_4; + wire when_GenCoreDefault_l367_4; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_7; + reg [31:0] _zz_when_GenCoreDefault_l367_5; + wire when_GenCoreDefault_l367_5; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_8; + reg [31:0] _zz_when_GenCoreDefault_l367_6; + wire when_GenCoreDefault_l367_6; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_9; + reg [31:0] _zz_when_GenCoreDefault_l367_7; + wire when_GenCoreDefault_l367_7; + wire when_Pipeline_l124; + reg [31:0] decode_to_execute_PC; + wire when_Pipeline_l124_1; + reg [31:0] execute_to_memory_PC; + wire when_Pipeline_l124_2; + reg [31:0] memory_to_writeBack_PC; + wire when_Pipeline_l124_3; + reg [31:0] decode_to_execute_INSTRUCTION; + wire when_Pipeline_l124_4; + reg [31:0] execute_to_memory_INSTRUCTION; + wire when_Pipeline_l124_5; + reg [31:0] memory_to_writeBack_INSTRUCTION; + wire when_Pipeline_l124_6; + reg [31:0] decode_to_execute_FORMAL_PC_NEXT; + wire when_Pipeline_l124_7; + reg [31:0] execute_to_memory_FORMAL_PC_NEXT; + wire when_Pipeline_l124_8; + reg [31:0] memory_to_writeBack_FORMAL_PC_NEXT; + wire when_Pipeline_l124_9; + reg decode_to_execute_MEMORY_FORCE_CONSTISTENCY; + wire when_Pipeline_l124_10; + reg `Src1CtrlEnum_binary_sequential_type decode_to_execute_SRC1_CTRL; + wire when_Pipeline_l124_11; + reg decode_to_execute_SRC_USE_SUB_LESS; + wire when_Pipeline_l124_12; + reg decode_to_execute_MEMORY_ENABLE; + wire when_Pipeline_l124_13; + reg execute_to_memory_MEMORY_ENABLE; + wire when_Pipeline_l124_14; + reg memory_to_writeBack_MEMORY_ENABLE; + wire when_Pipeline_l124_15; + reg `AluCtrlEnum_binary_sequential_type decode_to_execute_ALU_CTRL; + wire when_Pipeline_l124_16; + reg `Src2CtrlEnum_binary_sequential_type decode_to_execute_SRC2_CTRL; + wire when_Pipeline_l124_17; + reg decode_to_execute_REGFILE_WRITE_VALID; + wire when_Pipeline_l124_18; + reg execute_to_memory_REGFILE_WRITE_VALID; + wire when_Pipeline_l124_19; + reg memory_to_writeBack_REGFILE_WRITE_VALID; + wire when_Pipeline_l124_20; + reg decode_to_execute_BYPASSABLE_EXECUTE_STAGE; + wire when_Pipeline_l124_21; + reg decode_to_execute_BYPASSABLE_MEMORY_STAGE; + wire when_Pipeline_l124_22; + reg execute_to_memory_BYPASSABLE_MEMORY_STAGE; + wire when_Pipeline_l124_23; + reg decode_to_execute_MEMORY_WR; + wire when_Pipeline_l124_24; + reg execute_to_memory_MEMORY_WR; + wire when_Pipeline_l124_25; + reg memory_to_writeBack_MEMORY_WR; + wire when_Pipeline_l124_26; + reg decode_to_execute_MEMORY_MANAGMENT; + wire when_Pipeline_l124_27; + reg decode_to_execute_SRC_LESS_UNSIGNED; + wire when_Pipeline_l124_28; + reg `AluBitwiseCtrlEnum_binary_sequential_type decode_to_execute_ALU_BITWISE_CTRL; + wire when_Pipeline_l124_29; + reg `ShiftCtrlEnum_binary_sequential_type decode_to_execute_SHIFT_CTRL; + wire when_Pipeline_l124_30; + reg `ShiftCtrlEnum_binary_sequential_type execute_to_memory_SHIFT_CTRL; + wire when_Pipeline_l124_31; + reg `BranchCtrlEnum_binary_sequential_type decode_to_execute_BRANCH_CTRL; + wire when_Pipeline_l124_32; + reg decode_to_execute_IS_CSR; + wire when_Pipeline_l124_33; + reg `EnvCtrlEnum_binary_sequential_type decode_to_execute_ENV_CTRL; + wire when_Pipeline_l124_34; + reg `EnvCtrlEnum_binary_sequential_type execute_to_memory_ENV_CTRL; + wire when_Pipeline_l124_35; + reg `EnvCtrlEnum_binary_sequential_type memory_to_writeBack_ENV_CTRL; + wire when_Pipeline_l124_36; + reg decode_to_execute_IS_MUL; + wire when_Pipeline_l124_37; + reg execute_to_memory_IS_MUL; + wire when_Pipeline_l124_38; + reg memory_to_writeBack_IS_MUL; + wire when_Pipeline_l124_39; + reg decode_to_execute_IS_DIV; + wire when_Pipeline_l124_40; + reg execute_to_memory_IS_DIV; + wire when_Pipeline_l124_41; + reg decode_to_execute_IS_RS1_SIGNED; + wire when_Pipeline_l124_42; + reg decode_to_execute_IS_RS2_SIGNED; + wire when_Pipeline_l124_43; + reg decode_to_execute_CfuPlugin_CFU_ENABLE; + wire when_Pipeline_l124_44; + reg `Input2Kind_binary_sequential_type decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND; + wire when_Pipeline_l124_45; + reg [31:0] decode_to_execute_RS1; + wire when_Pipeline_l124_46; + reg [31:0] decode_to_execute_RS2; + wire when_Pipeline_l124_47; + reg decode_to_execute_SRC2_FORCE_ZERO; + wire when_Pipeline_l124_48; + reg decode_to_execute_PREDICTION_HAD_BRANCHED2; + wire when_Pipeline_l124_49; + reg decode_to_execute_CSR_WRITE_OPCODE; + wire when_Pipeline_l124_50; + reg decode_to_execute_CSR_READ_OPCODE; + wire when_Pipeline_l124_51; + reg [31:0] execute_to_memory_MEMORY_STORE_DATA_RF; + wire when_Pipeline_l124_52; + reg [31:0] memory_to_writeBack_MEMORY_STORE_DATA_RF; + wire when_Pipeline_l124_53; + reg [31:0] execute_to_memory_REGFILE_WRITE_DATA; + wire when_Pipeline_l124_54; + reg [31:0] memory_to_writeBack_REGFILE_WRITE_DATA; + wire when_Pipeline_l124_55; + reg [31:0] execute_to_memory_SHIFT_RIGHT; + wire when_Pipeline_l124_56; + reg [31:0] execute_to_memory_MUL_LL; + wire when_Pipeline_l124_57; + reg [33:0] execute_to_memory_MUL_LH; + wire when_Pipeline_l124_58; + reg [33:0] execute_to_memory_MUL_HL; + wire when_Pipeline_l124_59; + reg [33:0] execute_to_memory_MUL_HH; + wire when_Pipeline_l124_60; + reg [33:0] memory_to_writeBack_MUL_HH; + wire when_Pipeline_l124_61; + reg execute_to_memory_CfuPlugin_CFU_IN_FLIGHT; + wire when_Pipeline_l124_62; + reg memory_to_writeBack_CfuPlugin_CFU_IN_FLIGHT; + wire when_Pipeline_l124_63; + reg [51:0] memory_to_writeBack_MUL_LOW; + wire when_Pipeline_l151; + wire when_Pipeline_l154; + wire when_Pipeline_l151_1; + wire when_Pipeline_l154_1; + wire when_Pipeline_l151_2; + wire when_Pipeline_l154_2; + wire when_CsrPlugin_l1264; + reg execute_CsrPlugin_csr_3264; + wire when_CsrPlugin_l1264_1; + reg execute_CsrPlugin_csr_3857; + wire when_CsrPlugin_l1264_2; + reg execute_CsrPlugin_csr_3858; + wire when_CsrPlugin_l1264_3; + reg execute_CsrPlugin_csr_3859; + wire when_CsrPlugin_l1264_4; + reg execute_CsrPlugin_csr_3860; + wire when_CsrPlugin_l1264_5; + reg execute_CsrPlugin_csr_769; + wire when_CsrPlugin_l1264_6; + reg execute_CsrPlugin_csr_768; + wire when_CsrPlugin_l1264_7; + reg execute_CsrPlugin_csr_836; + wire when_CsrPlugin_l1264_8; + reg execute_CsrPlugin_csr_772; + wire when_CsrPlugin_l1264_9; + reg execute_CsrPlugin_csr_773; + wire when_CsrPlugin_l1264_10; + reg execute_CsrPlugin_csr_833; + wire when_CsrPlugin_l1264_11; + reg execute_CsrPlugin_csr_832; + wire when_CsrPlugin_l1264_12; + reg execute_CsrPlugin_csr_834; + wire when_CsrPlugin_l1264_13; + reg execute_CsrPlugin_csr_835; + wire when_CsrPlugin_l1264_14; + reg execute_CsrPlugin_csr_2816; + wire when_CsrPlugin_l1264_15; + reg execute_CsrPlugin_csr_2944; + wire when_CsrPlugin_l1264_16; + reg execute_CsrPlugin_csr_2818; + wire when_CsrPlugin_l1264_17; + reg execute_CsrPlugin_csr_2946; + wire when_CsrPlugin_l1264_18; + reg execute_CsrPlugin_csr_3072; + wire when_CsrPlugin_l1264_19; + reg execute_CsrPlugin_csr_3200; + wire when_CsrPlugin_l1264_20; + reg execute_CsrPlugin_csr_3074; + wire when_CsrPlugin_l1264_21; + reg execute_CsrPlugin_csr_3202; + wire when_CsrPlugin_l1264_22; + reg execute_CsrPlugin_csr_3008; + wire when_CsrPlugin_l1264_23; + reg execute_CsrPlugin_csr_4032; + wire when_CsrPlugin_l1264_24; + reg execute_CsrPlugin_csr_2820; + wire when_CsrPlugin_l1264_25; + reg execute_CsrPlugin_csr_2821; + wire when_CsrPlugin_l1264_26; + reg execute_CsrPlugin_csr_2822; + wire when_CsrPlugin_l1264_27; + reg execute_CsrPlugin_csr_2823; + wire when_CsrPlugin_l1264_28; + reg execute_CsrPlugin_csr_2824; + wire when_CsrPlugin_l1264_29; + reg execute_CsrPlugin_csr_2825; + wire when_CsrPlugin_l1264_30; + reg execute_CsrPlugin_csr_2826; + wire when_CsrPlugin_l1264_31; + reg execute_CsrPlugin_csr_2827; + wire when_CsrPlugin_l1264_32; + reg execute_CsrPlugin_csr_2828; + wire when_CsrPlugin_l1264_33; + reg execute_CsrPlugin_csr_2829; + wire when_CsrPlugin_l1264_34; + reg execute_CsrPlugin_csr_2830; + wire when_CsrPlugin_l1264_35; + reg execute_CsrPlugin_csr_2831; + wire when_CsrPlugin_l1264_36; + reg execute_CsrPlugin_csr_2832; + wire when_CsrPlugin_l1264_37; + reg execute_CsrPlugin_csr_2833; + wire when_CsrPlugin_l1264_38; + reg execute_CsrPlugin_csr_2834; + wire when_CsrPlugin_l1264_39; + reg execute_CsrPlugin_csr_2835; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_10; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_11; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_12; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_13; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_14; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_15; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_16; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_17; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_18; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_19; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_20; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_21; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_22; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_23; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_24; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_25; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_26; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_27; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_28; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_29; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_30; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_31; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_32; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_33; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_34; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_35; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_36; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_37; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_38; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_39; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_40; + wire when_CsrPlugin_l1297; + wire when_CsrPlugin_l1302; + reg [2:0] _zz_iBusWishbone_ADR; + wire when_InstructionCache_l239; + reg _zz_iBus_rsp_valid; + reg [31:0] iBusWishbone_DAT_MISO_regNext; + reg [2:0] _zz_dBus_cmd_ready; + wire _zz_dBus_cmd_ready_1; + wire _zz_dBus_cmd_ready_2; + wire _zz_dBus_cmd_ready_3; + wire _zz_dBus_cmd_ready_4; + wire _zz_dBus_cmd_ready_5; + reg _zz_dBus_rsp_valid; + reg [31:0] dBusWishbone_DAT_MISO_regNext; + `ifndef SYNTHESIS + reg [39:0] decode_CfuPlugin_CFU_INPUT_2_KIND_string; + reg [39:0] _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_string; + reg [39:0] _zz_decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND_string; + reg [39:0] _zz_decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND_1_string; + reg [39:0] _zz_memory_to_writeBack_ENV_CTRL_string; + reg [39:0] _zz_memory_to_writeBack_ENV_CTRL_1_string; + reg [39:0] _zz_execute_to_memory_ENV_CTRL_string; + reg [39:0] _zz_execute_to_memory_ENV_CTRL_1_string; + reg [39:0] decode_ENV_CTRL_string; + reg [39:0] _zz_decode_ENV_CTRL_string; + reg [39:0] _zz_decode_to_execute_ENV_CTRL_string; + reg [39:0] _zz_decode_to_execute_ENV_CTRL_1_string; + reg [31:0] _zz_decode_to_execute_BRANCH_CTRL_string; + reg [31:0] _zz_decode_to_execute_BRANCH_CTRL_1_string; + reg [71:0] _zz_execute_to_memory_SHIFT_CTRL_string; + reg [71:0] _zz_execute_to_memory_SHIFT_CTRL_1_string; + reg [71:0] decode_SHIFT_CTRL_string; + reg [71:0] _zz_decode_SHIFT_CTRL_string; + reg [71:0] _zz_decode_to_execute_SHIFT_CTRL_string; + reg [71:0] _zz_decode_to_execute_SHIFT_CTRL_1_string; + reg [39:0] decode_ALU_BITWISE_CTRL_string; + reg [39:0] _zz_decode_ALU_BITWISE_CTRL_string; + reg [39:0] _zz_decode_to_execute_ALU_BITWISE_CTRL_string; + reg [39:0] _zz_decode_to_execute_ALU_BITWISE_CTRL_1_string; + reg [23:0] decode_SRC2_CTRL_string; + reg [23:0] _zz_decode_SRC2_CTRL_string; + reg [23:0] _zz_decode_to_execute_SRC2_CTRL_string; + reg [23:0] _zz_decode_to_execute_SRC2_CTRL_1_string; + reg [63:0] decode_ALU_CTRL_string; + reg [63:0] _zz_decode_ALU_CTRL_string; + reg [63:0] _zz_decode_to_execute_ALU_CTRL_string; + reg [63:0] _zz_decode_to_execute_ALU_CTRL_1_string; + reg [95:0] decode_SRC1_CTRL_string; + reg [95:0] _zz_decode_SRC1_CTRL_string; + reg [95:0] _zz_decode_to_execute_SRC1_CTRL_string; + reg [95:0] _zz_decode_to_execute_SRC1_CTRL_1_string; + reg [39:0] execute_CfuPlugin_CFU_INPUT_2_KIND_string; + reg [39:0] _zz_execute_CfuPlugin_CFU_INPUT_2_KIND_string; + reg [39:0] memory_ENV_CTRL_string; + reg [39:0] _zz_memory_ENV_CTRL_string; + reg [39:0] execute_ENV_CTRL_string; + reg [39:0] _zz_execute_ENV_CTRL_string; + reg [39:0] writeBack_ENV_CTRL_string; + reg [39:0] _zz_writeBack_ENV_CTRL_string; + reg [31:0] execute_BRANCH_CTRL_string; + reg [31:0] _zz_execute_BRANCH_CTRL_string; + reg [71:0] memory_SHIFT_CTRL_string; + reg [71:0] _zz_memory_SHIFT_CTRL_string; + reg [71:0] execute_SHIFT_CTRL_string; + reg [71:0] _zz_execute_SHIFT_CTRL_string; + reg [23:0] execute_SRC2_CTRL_string; + reg [23:0] _zz_execute_SRC2_CTRL_string; + reg [95:0] execute_SRC1_CTRL_string; + reg [95:0] _zz_execute_SRC1_CTRL_string; + reg [63:0] execute_ALU_CTRL_string; + reg [63:0] _zz_execute_ALU_CTRL_string; + reg [39:0] execute_ALU_BITWISE_CTRL_string; + reg [39:0] _zz_execute_ALU_BITWISE_CTRL_string; + reg [39:0] _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_1_string; + reg [39:0] _zz_decode_ENV_CTRL_1_string; + reg [31:0] _zz_decode_BRANCH_CTRL_string; + reg [71:0] _zz_decode_SHIFT_CTRL_1_string; + reg [39:0] _zz_decode_ALU_BITWISE_CTRL_1_string; + reg [23:0] _zz_decode_SRC2_CTRL_1_string; + reg [63:0] _zz_decode_ALU_CTRL_1_string; + reg [95:0] _zz_decode_SRC1_CTRL_1_string; + reg [31:0] decode_BRANCH_CTRL_string; + reg [31:0] _zz_decode_BRANCH_CTRL_1_string; + reg [95:0] _zz_decode_SRC1_CTRL_2_string; + reg [63:0] _zz_decode_ALU_CTRL_2_string; + reg [23:0] _zz_decode_SRC2_CTRL_2_string; + reg [39:0] _zz_decode_ALU_BITWISE_CTRL_2_string; + reg [71:0] _zz_decode_SHIFT_CTRL_2_string; + reg [31:0] _zz_decode_BRANCH_CTRL_2_string; + reg [39:0] _zz_decode_ENV_CTRL_2_string; + reg [39:0] _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_8_string; + reg [95:0] decode_to_execute_SRC1_CTRL_string; + reg [63:0] decode_to_execute_ALU_CTRL_string; + reg [23:0] decode_to_execute_SRC2_CTRL_string; + reg [39:0] decode_to_execute_ALU_BITWISE_CTRL_string; + reg [71:0] decode_to_execute_SHIFT_CTRL_string; + reg [71:0] execute_to_memory_SHIFT_CTRL_string; + reg [31:0] decode_to_execute_BRANCH_CTRL_string; + reg [39:0] decode_to_execute_ENV_CTRL_string; + reg [39:0] execute_to_memory_ENV_CTRL_string; + reg [39:0] memory_to_writeBack_ENV_CTRL_string; + reg [39:0] decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND_string; + `endif + + (* ram_style = "block" *) reg [31:0] RegFilePlugin_regFile [0:31] /* verilator public */ ; + + assign _zz_when = ({decodeExceptionPort_valid,IBusCachedPlugin_decodeExceptionPort_valid} != 2'b00); + assign _zz_when_1 = ({CsrPlugin_selfException_valid,BranchPlugin_branchExceptionPort_valid} != 2'b00); + assign _zz_memory_MUL_LOW = ($signed(_zz_memory_MUL_LOW_1) + $signed(_zz_memory_MUL_LOW_5)); + assign _zz_memory_MUL_LOW_1 = ($signed(_zz_memory_MUL_LOW_2) + $signed(_zz_memory_MUL_LOW_3)); + assign _zz_memory_MUL_LOW_2 = 52'h0; + assign _zz_memory_MUL_LOW_4 = {1'b0,memory_MUL_LL}; + assign _zz_memory_MUL_LOW_3 = {{19{_zz_memory_MUL_LOW_4[32]}}, _zz_memory_MUL_LOW_4}; + assign _zz_memory_MUL_LOW_6 = ({16'd0,memory_MUL_LH} <<< 16); + assign _zz_memory_MUL_LOW_5 = {{2{_zz_memory_MUL_LOW_6[49]}}, _zz_memory_MUL_LOW_6}; + assign _zz_memory_MUL_LOW_8 = ({16'd0,memory_MUL_HL} <<< 16); + assign _zz_memory_MUL_LOW_7 = {{2{_zz_memory_MUL_LOW_8[49]}}, _zz_memory_MUL_LOW_8}; + assign _zz_execute_SHIFT_RIGHT_1 = ($signed(_zz_execute_SHIFT_RIGHT_2) >>> execute_FullBarrelShifterPlugin_amplitude); + assign _zz_execute_SHIFT_RIGHT = _zz_execute_SHIFT_RIGHT_1[31 : 0]; + assign _zz_execute_SHIFT_RIGHT_2 = {((execute_SHIFT_CTRL == `ShiftCtrlEnum_binary_sequential_SRA_1) && execute_FullBarrelShifterPlugin_reversed[31]),execute_FullBarrelShifterPlugin_reversed}; + assign _zz__zz_IBusCachedPlugin_jump_pcLoad_payload_1 = (_zz_IBusCachedPlugin_jump_pcLoad_payload - 4'b0001); + assign _zz_IBusCachedPlugin_fetchPc_pc_1 = {IBusCachedPlugin_fetchPc_inc,2'b00}; + assign _zz_IBusCachedPlugin_fetchPc_pc = {29'd0, _zz_IBusCachedPlugin_fetchPc_pc_1}; + assign _zz__zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch = {{{decode_INSTRUCTION[31],decode_INSTRUCTION[7]},decode_INSTRUCTION[30 : 25]},decode_INSTRUCTION[11 : 8]}; + assign _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_2 = {{_zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_1,{{{decode_INSTRUCTION[31],decode_INSTRUCTION[7]},decode_INSTRUCTION[30 : 25]},decode_INSTRUCTION[11 : 8]}},1'b0}; + assign _zz__zz_2 = {{{decode_INSTRUCTION[31],decode_INSTRUCTION[19 : 12]},decode_INSTRUCTION[20]},decode_INSTRUCTION[30 : 21]}; + assign _zz__zz_4 = {{{decode_INSTRUCTION[31],decode_INSTRUCTION[7]},decode_INSTRUCTION[30 : 25]},decode_INSTRUCTION[11 : 8]}; + assign _zz__zz_6 = {{_zz_3,{{{decode_INSTRUCTION[31],decode_INSTRUCTION[19 : 12]},decode_INSTRUCTION[20]},decode_INSTRUCTION[30 : 21]}},1'b0}; + assign _zz__zz_6_1 = {{_zz_5,{{{decode_INSTRUCTION[31],decode_INSTRUCTION[7]},decode_INSTRUCTION[30 : 25]},decode_INSTRUCTION[11 : 8]}},1'b0}; + assign _zz__zz_IBusCachedPlugin_predictionJumpInterface_payload = {{{decode_INSTRUCTION[31],decode_INSTRUCTION[19 : 12]},decode_INSTRUCTION[20]},decode_INSTRUCTION[30 : 21]}; + assign _zz__zz_IBusCachedPlugin_predictionJumpInterface_payload_2 = {{{decode_INSTRUCTION[31],decode_INSTRUCTION[7]},decode_INSTRUCTION[30 : 25]},decode_INSTRUCTION[11 : 8]}; + assign _zz_DBusCachedPlugin_exceptionBus_payload_code = (writeBack_MEMORY_WR ? 3'b111 : 3'b101); + assign _zz_DBusCachedPlugin_exceptionBus_payload_code_1 = (writeBack_MEMORY_WR ? 3'b110 : 3'b100); + assign _zz__zz_execute_REGFILE_WRITE_DATA = execute_SRC_LESS; + assign _zz__zz_execute_SRC1 = 3'b100; + assign _zz__zz_execute_SRC1_1 = execute_INSTRUCTION[19 : 15]; + assign _zz__zz_execute_SRC2_3 = {execute_INSTRUCTION[31 : 25],execute_INSTRUCTION[11 : 7]}; + assign _zz_execute_SrcPlugin_addSub = ($signed(_zz_execute_SrcPlugin_addSub_1) + $signed(_zz_execute_SrcPlugin_addSub_4)); + assign _zz_execute_SrcPlugin_addSub_1 = ($signed(_zz_execute_SrcPlugin_addSub_2) + $signed(_zz_execute_SrcPlugin_addSub_3)); + assign _zz_execute_SrcPlugin_addSub_2 = execute_SRC1; + assign _zz_execute_SrcPlugin_addSub_3 = (execute_SRC_USE_SUB_LESS ? (~ execute_SRC2) : execute_SRC2); + assign _zz_execute_SrcPlugin_addSub_4 = (execute_SRC_USE_SUB_LESS ? _zz_execute_SrcPlugin_addSub_5 : _zz_execute_SrcPlugin_addSub_6); + assign _zz_execute_SrcPlugin_addSub_5 = 32'h00000001; + assign _zz_execute_SrcPlugin_addSub_6 = 32'h0; + assign _zz__zz_execute_BranchPlugin_missAlignedTarget_2 = {{{execute_INSTRUCTION[31],execute_INSTRUCTION[19 : 12]},execute_INSTRUCTION[20]},execute_INSTRUCTION[30 : 21]}; + assign _zz__zz_execute_BranchPlugin_missAlignedTarget_4 = {{{execute_INSTRUCTION[31],execute_INSTRUCTION[7]},execute_INSTRUCTION[30 : 25]},execute_INSTRUCTION[11 : 8]}; + assign _zz__zz_execute_BranchPlugin_missAlignedTarget_6 = {_zz_execute_BranchPlugin_missAlignedTarget_1,execute_INSTRUCTION[31 : 20]}; + assign _zz__zz_execute_BranchPlugin_missAlignedTarget_6_1 = {{_zz_execute_BranchPlugin_missAlignedTarget_3,{{{execute_INSTRUCTION[31],execute_INSTRUCTION[19 : 12]},execute_INSTRUCTION[20]},execute_INSTRUCTION[30 : 21]}},1'b0}; + assign _zz__zz_execute_BranchPlugin_missAlignedTarget_6_2 = {{_zz_execute_BranchPlugin_missAlignedTarget_5,{{{execute_INSTRUCTION[31],execute_INSTRUCTION[7]},execute_INSTRUCTION[30 : 25]},execute_INSTRUCTION[11 : 8]}},1'b0}; + assign _zz__zz_execute_BranchPlugin_branch_src2_2 = {{{execute_INSTRUCTION[31],execute_INSTRUCTION[19 : 12]},execute_INSTRUCTION[20]},execute_INSTRUCTION[30 : 21]}; + assign _zz__zz_execute_BranchPlugin_branch_src2_4 = {{{execute_INSTRUCTION[31],execute_INSTRUCTION[7]},execute_INSTRUCTION[30 : 25]},execute_INSTRUCTION[11 : 8]}; + assign _zz_execute_BranchPlugin_branch_src2_9 = 3'b100; + assign _zz__zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_1 = (_zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code & (~ _zz__zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_1_1)); + assign _zz__zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_1_1 = (_zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code - 2'b01); + assign _zz__zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_3 = (_zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_2 & (~ _zz__zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_3_1)); + assign _zz__zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_3_1 = (_zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_2 - 2'b01); + assign _zz_writeBack_MulPlugin_result = {{14{writeBack_MUL_LOW[51]}}, writeBack_MUL_LOW}; + assign _zz_writeBack_MulPlugin_result_1 = ({32'd0,writeBack_MUL_HH} <<< 32); + assign _zz__zz_decode_RS2_2 = writeBack_MUL_LOW[31 : 0]; + assign _zz__zz_decode_RS2_2_1 = writeBack_MulPlugin_result[63 : 32]; + assign _zz_memory_DivPlugin_div_counter_valueNext_1 = memory_DivPlugin_div_counter_willIncrement; + assign _zz_memory_DivPlugin_div_counter_valueNext = {5'd0, _zz_memory_DivPlugin_div_counter_valueNext_1}; + assign _zz_memory_DivPlugin_div_stage_0_remainderMinusDenominator = {1'd0, memory_DivPlugin_rs2}; + assign _zz_memory_DivPlugin_div_stage_0_outRemainder = memory_DivPlugin_div_stage_0_remainderMinusDenominator[31:0]; + assign _zz_memory_DivPlugin_div_stage_0_outRemainder_1 = memory_DivPlugin_div_stage_0_remainderShifted[31:0]; + assign _zz_memory_DivPlugin_div_stage_0_outNumerator = {_zz_memory_DivPlugin_div_stage_0_remainderShifted,(! memory_DivPlugin_div_stage_0_remainderMinusDenominator[32])}; + assign _zz_memory_DivPlugin_div_result_1 = _zz_memory_DivPlugin_div_result_2; + assign _zz_memory_DivPlugin_div_result_2 = _zz_memory_DivPlugin_div_result_3; + assign _zz_memory_DivPlugin_div_result_3 = ({memory_DivPlugin_div_needRevert,(memory_DivPlugin_div_needRevert ? (~ _zz_memory_DivPlugin_div_result) : _zz_memory_DivPlugin_div_result)} + _zz_memory_DivPlugin_div_result_4); + assign _zz_memory_DivPlugin_div_result_5 = memory_DivPlugin_div_needRevert; + assign _zz_memory_DivPlugin_div_result_4 = {32'd0, _zz_memory_DivPlugin_div_result_5}; + assign _zz_memory_DivPlugin_rs1_3 = _zz_memory_DivPlugin_rs1; + assign _zz_memory_DivPlugin_rs1_2 = {32'd0, _zz_memory_DivPlugin_rs1_3}; + assign _zz_memory_DivPlugin_rs2_2 = _zz_memory_DivPlugin_rs2; + assign _zz_memory_DivPlugin_rs2_1 = {31'd0, _zz_memory_DivPlugin_rs2_2}; + assign _zz_execute_CfuPlugin_functionsIds_0 = {execute_INSTRUCTION[31 : 25],execute_INSTRUCTION[14 : 12]}; + assign _zz_iBusWishbone_ADR_1 = (iBus_cmd_payload_address >>> 5); + assign _zz_decode_RegFilePlugin_rs1Data = 1'b1; + assign _zz_decode_RegFilePlugin_rs2Data = 1'b1; + assign _zz_IBusCachedPlugin_jump_pcLoad_payload_6 = {_zz_IBusCachedPlugin_jump_pcLoad_payload_4,_zz_IBusCachedPlugin_jump_pcLoad_payload_3}; + assign _zz_writeBack_DBusCachedPlugin_rspShifted_1 = dataCache_1_io_cpu_writeBack_address[1 : 0]; + assign _zz_writeBack_DBusCachedPlugin_rspShifted_3 = dataCache_1_io_cpu_writeBack_address[1 : 1]; + assign _zz_decode_LEGAL_INSTRUCTION = 32'h0000106f; + assign _zz_decode_LEGAL_INSTRUCTION_1 = (decode_INSTRUCTION & 32'h0000107f); + assign _zz_decode_LEGAL_INSTRUCTION_2 = 32'h00001073; + assign _zz_decode_LEGAL_INSTRUCTION_3 = ((decode_INSTRUCTION & 32'h0000207f) == 32'h00002073); + assign _zz_decode_LEGAL_INSTRUCTION_4 = ((decode_INSTRUCTION & 32'h0000407f) == 32'h00004063); + assign _zz_decode_LEGAL_INSTRUCTION_5 = {((decode_INSTRUCTION & 32'h0000207f) == 32'h00002013),{((decode_INSTRUCTION & 32'h0000603f) == 32'h00000023),{((decode_INSTRUCTION & _zz_decode_LEGAL_INSTRUCTION_6) == 32'h00000003),{(_zz_decode_LEGAL_INSTRUCTION_7 == _zz_decode_LEGAL_INSTRUCTION_8),{_zz_decode_LEGAL_INSTRUCTION_9,{_zz_decode_LEGAL_INSTRUCTION_10,_zz_decode_LEGAL_INSTRUCTION_11}}}}}}; + assign _zz_decode_LEGAL_INSTRUCTION_6 = 32'h0000207f; + assign _zz_decode_LEGAL_INSTRUCTION_7 = (decode_INSTRUCTION & 32'h0000505f); + assign _zz_decode_LEGAL_INSTRUCTION_8 = 32'h00000003; + assign _zz_decode_LEGAL_INSTRUCTION_9 = ((decode_INSTRUCTION & 32'h0000707b) == 32'h00000063); + assign _zz_decode_LEGAL_INSTRUCTION_10 = ((decode_INSTRUCTION & 32'h0000607f) == 32'h0000000f); + assign _zz_decode_LEGAL_INSTRUCTION_11 = {((decode_INSTRUCTION & 32'hfc00007f) == 32'h00000033),{((decode_INSTRUCTION & 32'h01f0707f) == 32'h0000500f),{((decode_INSTRUCTION & _zz_decode_LEGAL_INSTRUCTION_12) == 32'h00005013),{(_zz_decode_LEGAL_INSTRUCTION_13 == _zz_decode_LEGAL_INSTRUCTION_14),{_zz_decode_LEGAL_INSTRUCTION_15,{_zz_decode_LEGAL_INSTRUCTION_16,_zz_decode_LEGAL_INSTRUCTION_17}}}}}}; + assign _zz_decode_LEGAL_INSTRUCTION_12 = 32'hbc00707f; + assign _zz_decode_LEGAL_INSTRUCTION_13 = (decode_INSTRUCTION & 32'hfc00307f); + assign _zz_decode_LEGAL_INSTRUCTION_14 = 32'h00001013; + assign _zz_decode_LEGAL_INSTRUCTION_15 = ((decode_INSTRUCTION & 32'hbe00707f) == 32'h00005033); + assign _zz_decode_LEGAL_INSTRUCTION_16 = ((decode_INSTRUCTION & 32'hbe00707f) == 32'h00000033); + assign _zz_decode_LEGAL_INSTRUCTION_17 = {((decode_INSTRUCTION & 32'hdfffffff) == 32'h10200073),{((decode_INSTRUCTION & 32'hffffffff) == 32'h10500073),((decode_INSTRUCTION & 32'hffffffff) == 32'h00000073)}}; + assign _zz_IBusCachedPlugin_predictionJumpInterface_payload_4 = decode_INSTRUCTION[31]; + assign _zz_IBusCachedPlugin_predictionJumpInterface_payload_5 = decode_INSTRUCTION[31]; + assign _zz_IBusCachedPlugin_predictionJumpInterface_payload_6 = decode_INSTRUCTION[7]; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2 = ((decode_INSTRUCTION & 32'h02004064) == 32'h02004020); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_1 = 1'b0; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_2 = (((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_3) == 32'h02000030) != 1'b0); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_4 = ((_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_5 == _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_6) != 1'b0); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_7 = {(_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_8 != 1'b0),{(_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_9 != _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_14),{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_15,{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_17,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_19}}}}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_3 = 32'h02004074; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_5 = (decode_INSTRUCTION & 32'h00203050); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_6 = 32'h00000050; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_8 = ((decode_INSTRUCTION & 32'h00403050) == 32'h00000050); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_9 = {(_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_10 == _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_11),(_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_12 == _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_13)}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_14 = 2'b00; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_15 = ({_zz_decode_CfuPlugin_CFU_INPUT_2_KIND_5,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_16} != 2'b00); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_17 = (_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_18 != 1'b0); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_19 = {(_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_20 != _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_25),{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_26,{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_32,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_34}}}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_10 = (decode_INSTRUCTION & 32'h00001050); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_11 = 32'h00001050; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_12 = (decode_INSTRUCTION & 32'h00002050); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_13 = 32'h00002050; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_16 = ((decode_INSTRUCTION & 32'h0000001c) == 32'h00000004); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_18 = ((decode_INSTRUCTION & 32'h00000058) == 32'h00000040); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_20 = {(_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_21 == _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_22),(_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_23 == _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_24)}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_25 = 2'b00; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_26 = ({_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_27,{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_28,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_30}} != 3'b000); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_32 = (_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_33 != 1'b0); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_34 = {(_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_35 != _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_37),{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_38,{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_41,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_46}}}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_21 = (decode_INSTRUCTION & 32'h00007034); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_22 = 32'h00005010; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_23 = (decode_INSTRUCTION & 32'h02007064); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_24 = 32'h00005020; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_27 = ((decode_INSTRUCTION & 32'h40003054) == 32'h40001010); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_28 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_29) == 32'h00001010); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_30 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_31) == 32'h00001010); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_33 = ((decode_INSTRUCTION & 32'h00000064) == 32'h00000024); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_35 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_36) == 32'h00001000); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_37 = 1'b0; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_38 = ((_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_39 == _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_40) != 1'b0); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_41 = ({_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_42,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_44} != 2'b00); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_46 = {(_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_47 != _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_49),{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_50,{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_55,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_69}}}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_29 = 32'h00007034; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_31 = 32'h02007054; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_36 = 32'h00001000; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_39 = (decode_INSTRUCTION & 32'h00003000); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_40 = 32'h00002000; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_42 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_43) == 32'h00002000); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_44 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_45) == 32'h00001000); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_47 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_48) == 32'h00004004); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_49 = 1'b0; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_50 = ({_zz_decode_CfuPlugin_CFU_INPUT_2_KIND_6,{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_51,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_53}} != 3'b000); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_55 = ({_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_56,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_58} != 5'h0); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_69 = {(_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_70 != _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_72),{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_73,{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_88,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_101}}}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_43 = 32'h00002010; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_45 = 32'h00005000; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_48 = 32'h00004054; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_51 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_52) == 32'h00000020); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_53 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_54) == 32'h00000020); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_56 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_57) == 32'h00002040); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_58 = {(_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_59 == _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_60),{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_61,{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_63,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_66}}}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_70 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_71) == 32'h00000020); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_72 = 1'b0; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_73 = ({_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_74,{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_76,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_79}} != 6'h0); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_88 = ({_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_89,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_90} != 5'h0); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_101 = {(_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_102 != _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_115),{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_116,{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_121,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_126}}}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_52 = 32'h00000034; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_54 = 32'h00000064; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_57 = 32'h00002040; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_59 = (decode_INSTRUCTION & 32'h00001040); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_60 = 32'h00001040; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_61 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_62) == 32'h00000040); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_63 = (_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_64 == _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_65); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_66 = (_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_67 == _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_68); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_71 = 32'h00000020; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_74 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_75) == 32'h00000008); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_76 = (_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_77 == _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_78); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_79 = {_zz_decode_CfuPlugin_CFU_INPUT_2_KIND_4,{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_80,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_83}}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_89 = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_4; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_90 = {_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_91,{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_93,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_96}}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_102 = {_zz_decode_CfuPlugin_CFU_INPUT_2_KIND_5,{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_103,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_106}}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_115 = 6'h0; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_116 = ({_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_117,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_118} != 2'b00); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_121 = (_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_122 != _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_125); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_126 = {_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_127,{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_130,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_135}}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_62 = 32'h00000050; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_64 = (decode_INSTRUCTION & 32'h00400040); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_65 = 32'h00000040; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_67 = (decode_INSTRUCTION & 32'h00000038); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_68 = 32'h0; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_75 = 32'h00000008; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_77 = (decode_INSTRUCTION & 32'h00000040); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_78 = 32'h00000040; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_80 = (_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_81 == _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_82); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_83 = {_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_84,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_86}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_91 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_92) == 32'h00002010); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_93 = (_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_94 == _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_95); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_96 = {_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_97,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_99}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_103 = (_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_104 == _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_105); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_106 = {_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_107,{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_109,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_112}}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_117 = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_4; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_118 = (_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_119 == _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_120); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_122 = {_zz_decode_CfuPlugin_CFU_INPUT_2_KIND_4,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_123}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_125 = 2'b00; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_127 = (_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_128 != 1'b0); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_130 = (_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_131 != _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_134); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_135 = {_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_136,{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_144,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_148}}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_81 = (decode_INSTRUCTION & 32'h00004020); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_82 = 32'h00004020; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_84 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_85) == 32'h00000010); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_86 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_87) == 32'h00000020); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_92 = 32'h00002030; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_94 = (decode_INSTRUCTION & 32'h00001030); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_95 = 32'h00000010; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_97 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_98) == 32'h00002020); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_99 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_100) == 32'h00000020); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_104 = (decode_INSTRUCTION & 32'h00001010); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_105 = 32'h00001010; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_107 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_108) == 32'h00002010); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_109 = (_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_110 == _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_111); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_112 = {_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_113,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_114}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_119 = (decode_INSTRUCTION & 32'h00000070); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_120 = 32'h00000020; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_123 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_124) == 32'h0); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_128 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_129) == 32'h00004010); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_131 = (_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_132 == _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_133); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_134 = 1'b0; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_136 = ({_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_137,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_139} != 4'b0000); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_144 = (_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_145 != _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_147); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_148 = {_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_149,{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_155,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_159}}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_85 = 32'h00000030; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_87 = 32'h02000020; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_98 = 32'h02002060; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_100 = 32'h02003020; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_108 = 32'h00002010; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_110 = (decode_INSTRUCTION & 32'h00000050); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_111 = 32'h00000010; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_113 = ((decode_INSTRUCTION & 32'h0000000c) == 32'h00000004); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_114 = ((decode_INSTRUCTION & 32'h00000024) == 32'h0); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_124 = 32'h00000020; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_129 = 32'h00004014; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_132 = (decode_INSTRUCTION & 32'h00006014); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_133 = 32'h00002010; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_137 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_138) == 32'h0); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_139 = {(_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_140 == _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_141),{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_142,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_143}}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_145 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_146) == 32'h0); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_147 = 1'b0; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_149 = ({_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_150,{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_151,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_153}} != 3'b000); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_155 = ({_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_156,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_158} != 2'b00); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_159 = {(_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_160 != _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_163),(_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_164 != _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_166)}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_138 = 32'h00000044; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_140 = (decode_INSTRUCTION & 32'h00000018); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_141 = 32'h0; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_142 = ((decode_INSTRUCTION & 32'h00006004) == 32'h00002000); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_143 = ((decode_INSTRUCTION & 32'h00005004) == 32'h00001000); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_146 = 32'h00000058; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_150 = ((decode_INSTRUCTION & 32'h00000044) == 32'h00000040); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_151 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_152) == 32'h00002010); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_153 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_154) == 32'h40000030); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_156 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_157) == 32'h00000004); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_158 = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_3; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_160 = {(_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_161 == _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_162),_zz_decode_CfuPlugin_CFU_INPUT_2_KIND_3}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_163 = 2'b00; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_164 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_165) == 32'h00001004); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_166 = 1'b0; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_152 = 32'h00002014; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_154 = 32'h40000034; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_157 = 32'h00000014; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_161 = (decode_INSTRUCTION & 32'h00000044); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_162 = 32'h00000004; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_165 = 32'h00005054; + assign _zz_execute_BranchPlugin_branch_src2_6 = execute_INSTRUCTION[31]; + assign _zz_execute_BranchPlugin_branch_src2_7 = execute_INSTRUCTION[31]; + assign _zz_execute_BranchPlugin_branch_src2_8 = execute_INSTRUCTION[7]; + assign _zz_CsrPlugin_csrMapping_readDataInit_41 = 32'h0; + always @(posedge clk) begin + if(_zz_decode_RegFilePlugin_rs1Data) begin + _zz_RegFilePlugin_regFile_port0 <= RegFilePlugin_regFile[decode_RegFilePlugin_regFileReadAddress1]; + end + end + + always @(posedge clk) begin + if(_zz_decode_RegFilePlugin_rs2Data) begin + _zz_RegFilePlugin_regFile_port1 <= RegFilePlugin_regFile[decode_RegFilePlugin_regFileReadAddress2]; + end + end + + always @(posedge clk) begin + if(_zz_1) begin + RegFilePlugin_regFile[lastStageRegFileWrite_payload_address] <= lastStageRegFileWrite_payload_data; + end + end + + InstructionCache IBusCachedPlugin_cache ( + .io_flush (IBusCachedPlugin_cache_io_flush ), //i + .io_cpu_prefetch_isValid (IBusCachedPlugin_cache_io_cpu_prefetch_isValid ), //i + .io_cpu_prefetch_haltIt (IBusCachedPlugin_cache_io_cpu_prefetch_haltIt ), //o + .io_cpu_prefetch_pc (IBusCachedPlugin_iBusRsp_stages_0_input_payload ), //i + .io_cpu_fetch_isValid (IBusCachedPlugin_cache_io_cpu_fetch_isValid ), //i + .io_cpu_fetch_isStuck (IBusCachedPlugin_cache_io_cpu_fetch_isStuck ), //i + .io_cpu_fetch_isRemoved (IBusCachedPlugin_cache_io_cpu_fetch_isRemoved ), //i + .io_cpu_fetch_pc (IBusCachedPlugin_iBusRsp_stages_1_input_payload ), //i + .io_cpu_fetch_data (IBusCachedPlugin_cache_io_cpu_fetch_data ), //o + .io_cpu_fetch_mmuRsp_physicalAddress (IBusCachedPlugin_mmuBus_rsp_physicalAddress ), //i + .io_cpu_fetch_mmuRsp_isIoAccess (IBusCachedPlugin_mmuBus_rsp_isIoAccess ), //i + .io_cpu_fetch_mmuRsp_isPaging (IBusCachedPlugin_mmuBus_rsp_isPaging ), //i + .io_cpu_fetch_mmuRsp_allowRead (IBusCachedPlugin_mmuBus_rsp_allowRead ), //i + .io_cpu_fetch_mmuRsp_allowWrite (IBusCachedPlugin_mmuBus_rsp_allowWrite ), //i + .io_cpu_fetch_mmuRsp_allowExecute (IBusCachedPlugin_mmuBus_rsp_allowExecute ), //i + .io_cpu_fetch_mmuRsp_exception (IBusCachedPlugin_mmuBus_rsp_exception ), //i + .io_cpu_fetch_mmuRsp_refilling (IBusCachedPlugin_mmuBus_rsp_refilling ), //i + .io_cpu_fetch_mmuRsp_bypassTranslation (IBusCachedPlugin_mmuBus_rsp_bypassTranslation ), //i + .io_cpu_fetch_physicalAddress (IBusCachedPlugin_cache_io_cpu_fetch_physicalAddress ), //o + .io_cpu_decode_isValid (IBusCachedPlugin_cache_io_cpu_decode_isValid ), //i + .io_cpu_decode_isStuck (IBusCachedPlugin_cache_io_cpu_decode_isStuck ), //i + .io_cpu_decode_pc (IBusCachedPlugin_iBusRsp_stages_2_input_payload ), //i + .io_cpu_decode_physicalAddress (IBusCachedPlugin_cache_io_cpu_decode_physicalAddress ), //o + .io_cpu_decode_data (IBusCachedPlugin_cache_io_cpu_decode_data ), //o + .io_cpu_decode_cacheMiss (IBusCachedPlugin_cache_io_cpu_decode_cacheMiss ), //o + .io_cpu_decode_error (IBusCachedPlugin_cache_io_cpu_decode_error ), //o + .io_cpu_decode_mmuRefilling (IBusCachedPlugin_cache_io_cpu_decode_mmuRefilling ), //o + .io_cpu_decode_mmuException (IBusCachedPlugin_cache_io_cpu_decode_mmuException ), //o + .io_cpu_decode_isUser (IBusCachedPlugin_cache_io_cpu_decode_isUser ), //i + .io_cpu_fill_valid (IBusCachedPlugin_cache_io_cpu_fill_valid ), //i + .io_cpu_fill_payload (IBusCachedPlugin_cache_io_cpu_decode_physicalAddress ), //i + .io_mem_cmd_valid (IBusCachedPlugin_cache_io_mem_cmd_valid ), //o + .io_mem_cmd_ready (iBus_cmd_ready ), //i + .io_mem_cmd_payload_address (IBusCachedPlugin_cache_io_mem_cmd_payload_address ), //o + .io_mem_cmd_payload_size (IBusCachedPlugin_cache_io_mem_cmd_payload_size ), //o + .io_mem_rsp_valid (iBus_rsp_valid ), //i + .io_mem_rsp_payload_data (iBus_rsp_payload_data ), //i + .io_mem_rsp_payload_error (iBus_rsp_payload_error ), //i + .clk (clk ), //i + .reset (reset ) //i + ); + DataCache dataCache_1 ( + .io_cpu_execute_isValid (dataCache_1_io_cpu_execute_isValid ), //i + .io_cpu_execute_address (dataCache_1_io_cpu_execute_address ), //i + .io_cpu_execute_haltIt (dataCache_1_io_cpu_execute_haltIt ), //o + .io_cpu_execute_args_wr (execute_MEMORY_WR ), //i + .io_cpu_execute_args_size (execute_DBusCachedPlugin_size ), //i + .io_cpu_execute_args_totalyConsistent (execute_MEMORY_FORCE_CONSTISTENCY ), //i + .io_cpu_execute_refilling (dataCache_1_io_cpu_execute_refilling ), //o + .io_cpu_memory_isValid (dataCache_1_io_cpu_memory_isValid ), //i + .io_cpu_memory_isStuck (memory_arbitration_isStuck ), //i + .io_cpu_memory_isWrite (dataCache_1_io_cpu_memory_isWrite ), //o + .io_cpu_memory_address (dataCache_1_io_cpu_memory_address ), //i + .io_cpu_memory_mmuRsp_physicalAddress (DBusCachedPlugin_mmuBus_rsp_physicalAddress ), //i + .io_cpu_memory_mmuRsp_isIoAccess (dataCache_1_io_cpu_memory_mmuRsp_isIoAccess ), //i + .io_cpu_memory_mmuRsp_isPaging (DBusCachedPlugin_mmuBus_rsp_isPaging ), //i + .io_cpu_memory_mmuRsp_allowRead (DBusCachedPlugin_mmuBus_rsp_allowRead ), //i + .io_cpu_memory_mmuRsp_allowWrite (DBusCachedPlugin_mmuBus_rsp_allowWrite ), //i + .io_cpu_memory_mmuRsp_allowExecute (DBusCachedPlugin_mmuBus_rsp_allowExecute ), //i + .io_cpu_memory_mmuRsp_exception (DBusCachedPlugin_mmuBus_rsp_exception ), //i + .io_cpu_memory_mmuRsp_refilling (DBusCachedPlugin_mmuBus_rsp_refilling ), //i + .io_cpu_memory_mmuRsp_bypassTranslation (DBusCachedPlugin_mmuBus_rsp_bypassTranslation ), //i + .io_cpu_writeBack_isValid (dataCache_1_io_cpu_writeBack_isValid ), //i + .io_cpu_writeBack_isStuck (writeBack_arbitration_isStuck ), //i + .io_cpu_writeBack_isUser (dataCache_1_io_cpu_writeBack_isUser ), //i + .io_cpu_writeBack_haltIt (dataCache_1_io_cpu_writeBack_haltIt ), //o + .io_cpu_writeBack_isWrite (dataCache_1_io_cpu_writeBack_isWrite ), //o + .io_cpu_writeBack_storeData (dataCache_1_io_cpu_writeBack_storeData ), //i + .io_cpu_writeBack_data (dataCache_1_io_cpu_writeBack_data ), //o + .io_cpu_writeBack_address (dataCache_1_io_cpu_writeBack_address ), //i + .io_cpu_writeBack_mmuException (dataCache_1_io_cpu_writeBack_mmuException ), //o + .io_cpu_writeBack_unalignedAccess (dataCache_1_io_cpu_writeBack_unalignedAccess ), //o + .io_cpu_writeBack_accessError (dataCache_1_io_cpu_writeBack_accessError ), //o + .io_cpu_writeBack_keepMemRspData (dataCache_1_io_cpu_writeBack_keepMemRspData ), //o + .io_cpu_writeBack_fence_SW (dataCache_1_io_cpu_writeBack_fence_SW ), //i + .io_cpu_writeBack_fence_SR (dataCache_1_io_cpu_writeBack_fence_SR ), //i + .io_cpu_writeBack_fence_SO (dataCache_1_io_cpu_writeBack_fence_SO ), //i + .io_cpu_writeBack_fence_SI (dataCache_1_io_cpu_writeBack_fence_SI ), //i + .io_cpu_writeBack_fence_PW (dataCache_1_io_cpu_writeBack_fence_PW ), //i + .io_cpu_writeBack_fence_PR (dataCache_1_io_cpu_writeBack_fence_PR ), //i + .io_cpu_writeBack_fence_PO (dataCache_1_io_cpu_writeBack_fence_PO ), //i + .io_cpu_writeBack_fence_PI (dataCache_1_io_cpu_writeBack_fence_PI ), //i + .io_cpu_writeBack_fence_FM (dataCache_1_io_cpu_writeBack_fence_FM ), //i + .io_cpu_writeBack_exclusiveOk (dataCache_1_io_cpu_writeBack_exclusiveOk ), //o + .io_cpu_redo (dataCache_1_io_cpu_redo ), //o + .io_cpu_flush_valid (dataCache_1_io_cpu_flush_valid ), //i + .io_cpu_flush_ready (dataCache_1_io_cpu_flush_ready ), //o + .io_mem_cmd_valid (dataCache_1_io_mem_cmd_valid ), //o + .io_mem_cmd_ready (dataCache_1_io_mem_cmd_ready ), //i + .io_mem_cmd_payload_wr (dataCache_1_io_mem_cmd_payload_wr ), //o + .io_mem_cmd_payload_uncached (dataCache_1_io_mem_cmd_payload_uncached ), //o + .io_mem_cmd_payload_address (dataCache_1_io_mem_cmd_payload_address ), //o + .io_mem_cmd_payload_data (dataCache_1_io_mem_cmd_payload_data ), //o + .io_mem_cmd_payload_mask (dataCache_1_io_mem_cmd_payload_mask ), //o + .io_mem_cmd_payload_size (dataCache_1_io_mem_cmd_payload_size ), //o + .io_mem_cmd_payload_last (dataCache_1_io_mem_cmd_payload_last ), //o + .io_mem_rsp_valid (dBus_rsp_valid ), //i + .io_mem_rsp_payload_last (dBus_rsp_payload_last ), //i + .io_mem_rsp_payload_data (dBus_rsp_payload_data ), //i + .io_mem_rsp_payload_error (dBus_rsp_payload_error ), //i + .clk (clk ), //i + .reset (reset ) //i + ); + always @(*) begin + case(_zz_IBusCachedPlugin_jump_pcLoad_payload_6) + 2'b00 : begin + _zz_IBusCachedPlugin_jump_pcLoad_payload_5 = DBusCachedPlugin_redoBranch_payload; + end + 2'b01 : begin + _zz_IBusCachedPlugin_jump_pcLoad_payload_5 = CsrPlugin_jumpInterface_payload; + end + 2'b10 : begin + _zz_IBusCachedPlugin_jump_pcLoad_payload_5 = BranchPlugin_jumpInterface_payload; + end + default : begin + _zz_IBusCachedPlugin_jump_pcLoad_payload_5 = IBusCachedPlugin_predictionJumpInterface_payload; + end + endcase + end + + always @(*) begin + case(_zz_writeBack_DBusCachedPlugin_rspShifted_1) + 2'b00 : begin + _zz_writeBack_DBusCachedPlugin_rspShifted = writeBack_DBusCachedPlugin_rspSplits_0; + end + 2'b01 : begin + _zz_writeBack_DBusCachedPlugin_rspShifted = writeBack_DBusCachedPlugin_rspSplits_1; + end + 2'b10 : begin + _zz_writeBack_DBusCachedPlugin_rspShifted = writeBack_DBusCachedPlugin_rspSplits_2; + end + default : begin + _zz_writeBack_DBusCachedPlugin_rspShifted = writeBack_DBusCachedPlugin_rspSplits_3; + end + endcase + end + + always @(*) begin + case(_zz_writeBack_DBusCachedPlugin_rspShifted_3) + 1'b0 : begin + _zz_writeBack_DBusCachedPlugin_rspShifted_2 = writeBack_DBusCachedPlugin_rspSplits_1; + end + default : begin + _zz_writeBack_DBusCachedPlugin_rspShifted_2 = writeBack_DBusCachedPlugin_rspSplits_3; + end + endcase + end + + `ifndef SYNTHESIS + always @(*) begin + case(decode_CfuPlugin_CFU_INPUT_2_KIND) + `Input2Kind_binary_sequential_RS : decode_CfuPlugin_CFU_INPUT_2_KIND_string = "RS "; + `Input2Kind_binary_sequential_IMM_I : decode_CfuPlugin_CFU_INPUT_2_KIND_string = "IMM_I"; + default : decode_CfuPlugin_CFU_INPUT_2_KIND_string = "?????"; + endcase + end + always @(*) begin + case(_zz_decode_CfuPlugin_CFU_INPUT_2_KIND) + `Input2Kind_binary_sequential_RS : _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_string = "RS "; + `Input2Kind_binary_sequential_IMM_I : _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_string = "IMM_I"; + default : _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_string = "?????"; + endcase + end + always @(*) begin + case(_zz_decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND) + `Input2Kind_binary_sequential_RS : _zz_decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND_string = "RS "; + `Input2Kind_binary_sequential_IMM_I : _zz_decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND_string = "IMM_I"; + default : _zz_decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND_string = "?????"; + endcase + end + always @(*) begin + case(_zz_decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND_1) + `Input2Kind_binary_sequential_RS : _zz_decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND_1_string = "RS "; + `Input2Kind_binary_sequential_IMM_I : _zz_decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND_1_string = "IMM_I"; + default : _zz_decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND_1_string = "?????"; + endcase + end + always @(*) begin + case(_zz_memory_to_writeBack_ENV_CTRL) + `EnvCtrlEnum_binary_sequential_NONE : _zz_memory_to_writeBack_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : _zz_memory_to_writeBack_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_binary_sequential_WFI : _zz_memory_to_writeBack_ENV_CTRL_string = "WFI "; + `EnvCtrlEnum_binary_sequential_ECALL : _zz_memory_to_writeBack_ENV_CTRL_string = "ECALL"; + default : _zz_memory_to_writeBack_ENV_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(_zz_memory_to_writeBack_ENV_CTRL_1) + `EnvCtrlEnum_binary_sequential_NONE : _zz_memory_to_writeBack_ENV_CTRL_1_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : _zz_memory_to_writeBack_ENV_CTRL_1_string = "XRET "; + `EnvCtrlEnum_binary_sequential_WFI : _zz_memory_to_writeBack_ENV_CTRL_1_string = "WFI "; + `EnvCtrlEnum_binary_sequential_ECALL : _zz_memory_to_writeBack_ENV_CTRL_1_string = "ECALL"; + default : _zz_memory_to_writeBack_ENV_CTRL_1_string = "?????"; + endcase + end + always @(*) begin + case(_zz_execute_to_memory_ENV_CTRL) + `EnvCtrlEnum_binary_sequential_NONE : _zz_execute_to_memory_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : _zz_execute_to_memory_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_binary_sequential_WFI : _zz_execute_to_memory_ENV_CTRL_string = "WFI "; + `EnvCtrlEnum_binary_sequential_ECALL : _zz_execute_to_memory_ENV_CTRL_string = "ECALL"; + default : _zz_execute_to_memory_ENV_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(_zz_execute_to_memory_ENV_CTRL_1) + `EnvCtrlEnum_binary_sequential_NONE : _zz_execute_to_memory_ENV_CTRL_1_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : _zz_execute_to_memory_ENV_CTRL_1_string = "XRET "; + `EnvCtrlEnum_binary_sequential_WFI : _zz_execute_to_memory_ENV_CTRL_1_string = "WFI "; + `EnvCtrlEnum_binary_sequential_ECALL : _zz_execute_to_memory_ENV_CTRL_1_string = "ECALL"; + default : _zz_execute_to_memory_ENV_CTRL_1_string = "?????"; + endcase + end + always @(*) begin + case(decode_ENV_CTRL) + `EnvCtrlEnum_binary_sequential_NONE : decode_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : decode_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_binary_sequential_WFI : decode_ENV_CTRL_string = "WFI "; + `EnvCtrlEnum_binary_sequential_ECALL : decode_ENV_CTRL_string = "ECALL"; + default : decode_ENV_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(_zz_decode_ENV_CTRL) + `EnvCtrlEnum_binary_sequential_NONE : _zz_decode_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : _zz_decode_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_binary_sequential_WFI : _zz_decode_ENV_CTRL_string = "WFI "; + `EnvCtrlEnum_binary_sequential_ECALL : _zz_decode_ENV_CTRL_string = "ECALL"; + default : _zz_decode_ENV_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(_zz_decode_to_execute_ENV_CTRL) + `EnvCtrlEnum_binary_sequential_NONE : _zz_decode_to_execute_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : _zz_decode_to_execute_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_binary_sequential_WFI : _zz_decode_to_execute_ENV_CTRL_string = "WFI "; + `EnvCtrlEnum_binary_sequential_ECALL : _zz_decode_to_execute_ENV_CTRL_string = "ECALL"; + default : _zz_decode_to_execute_ENV_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(_zz_decode_to_execute_ENV_CTRL_1) + `EnvCtrlEnum_binary_sequential_NONE : _zz_decode_to_execute_ENV_CTRL_1_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : _zz_decode_to_execute_ENV_CTRL_1_string = "XRET "; + `EnvCtrlEnum_binary_sequential_WFI : _zz_decode_to_execute_ENV_CTRL_1_string = "WFI "; + `EnvCtrlEnum_binary_sequential_ECALL : _zz_decode_to_execute_ENV_CTRL_1_string = "ECALL"; + default : _zz_decode_to_execute_ENV_CTRL_1_string = "?????"; + endcase + end + always @(*) begin + case(_zz_decode_to_execute_BRANCH_CTRL) + `BranchCtrlEnum_binary_sequential_INC : _zz_decode_to_execute_BRANCH_CTRL_string = "INC "; + `BranchCtrlEnum_binary_sequential_B : _zz_decode_to_execute_BRANCH_CTRL_string = "B "; + `BranchCtrlEnum_binary_sequential_JAL : _zz_decode_to_execute_BRANCH_CTRL_string = "JAL "; + `BranchCtrlEnum_binary_sequential_JALR : _zz_decode_to_execute_BRANCH_CTRL_string = "JALR"; + default : _zz_decode_to_execute_BRANCH_CTRL_string = "????"; + endcase + end + always @(*) begin + case(_zz_decode_to_execute_BRANCH_CTRL_1) + `BranchCtrlEnum_binary_sequential_INC : _zz_decode_to_execute_BRANCH_CTRL_1_string = "INC "; + `BranchCtrlEnum_binary_sequential_B : _zz_decode_to_execute_BRANCH_CTRL_1_string = "B "; + `BranchCtrlEnum_binary_sequential_JAL : _zz_decode_to_execute_BRANCH_CTRL_1_string = "JAL "; + `BranchCtrlEnum_binary_sequential_JALR : _zz_decode_to_execute_BRANCH_CTRL_1_string = "JALR"; + default : _zz_decode_to_execute_BRANCH_CTRL_1_string = "????"; + endcase + end + always @(*) begin + case(_zz_execute_to_memory_SHIFT_CTRL) + `ShiftCtrlEnum_binary_sequential_DISABLE_1 : _zz_execute_to_memory_SHIFT_CTRL_string = "DISABLE_1"; + `ShiftCtrlEnum_binary_sequential_SLL_1 : _zz_execute_to_memory_SHIFT_CTRL_string = "SLL_1 "; + `ShiftCtrlEnum_binary_sequential_SRL_1 : _zz_execute_to_memory_SHIFT_CTRL_string = "SRL_1 "; + `ShiftCtrlEnum_binary_sequential_SRA_1 : _zz_execute_to_memory_SHIFT_CTRL_string = "SRA_1 "; + default : _zz_execute_to_memory_SHIFT_CTRL_string = "?????????"; + endcase + end + always @(*) begin + case(_zz_execute_to_memory_SHIFT_CTRL_1) + `ShiftCtrlEnum_binary_sequential_DISABLE_1 : _zz_execute_to_memory_SHIFT_CTRL_1_string = "DISABLE_1"; + `ShiftCtrlEnum_binary_sequential_SLL_1 : _zz_execute_to_memory_SHIFT_CTRL_1_string = "SLL_1 "; + `ShiftCtrlEnum_binary_sequential_SRL_1 : _zz_execute_to_memory_SHIFT_CTRL_1_string = "SRL_1 "; + `ShiftCtrlEnum_binary_sequential_SRA_1 : _zz_execute_to_memory_SHIFT_CTRL_1_string = "SRA_1 "; + default : _zz_execute_to_memory_SHIFT_CTRL_1_string = "?????????"; + endcase + end + always @(*) begin + case(decode_SHIFT_CTRL) + `ShiftCtrlEnum_binary_sequential_DISABLE_1 : decode_SHIFT_CTRL_string = "DISABLE_1"; + `ShiftCtrlEnum_binary_sequential_SLL_1 : decode_SHIFT_CTRL_string = "SLL_1 "; + `ShiftCtrlEnum_binary_sequential_SRL_1 : decode_SHIFT_CTRL_string = "SRL_1 "; + `ShiftCtrlEnum_binary_sequential_SRA_1 : decode_SHIFT_CTRL_string = "SRA_1 "; + default : decode_SHIFT_CTRL_string = "?????????"; + endcase + end + always @(*) begin + case(_zz_decode_SHIFT_CTRL) + `ShiftCtrlEnum_binary_sequential_DISABLE_1 : _zz_decode_SHIFT_CTRL_string = "DISABLE_1"; + `ShiftCtrlEnum_binary_sequential_SLL_1 : _zz_decode_SHIFT_CTRL_string = "SLL_1 "; + `ShiftCtrlEnum_binary_sequential_SRL_1 : _zz_decode_SHIFT_CTRL_string = "SRL_1 "; + `ShiftCtrlEnum_binary_sequential_SRA_1 : _zz_decode_SHIFT_CTRL_string = "SRA_1 "; + default : _zz_decode_SHIFT_CTRL_string = "?????????"; + endcase + end + always @(*) begin + case(_zz_decode_to_execute_SHIFT_CTRL) + `ShiftCtrlEnum_binary_sequential_DISABLE_1 : _zz_decode_to_execute_SHIFT_CTRL_string = "DISABLE_1"; + `ShiftCtrlEnum_binary_sequential_SLL_1 : _zz_decode_to_execute_SHIFT_CTRL_string = "SLL_1 "; + `ShiftCtrlEnum_binary_sequential_SRL_1 : _zz_decode_to_execute_SHIFT_CTRL_string = "SRL_1 "; + `ShiftCtrlEnum_binary_sequential_SRA_1 : _zz_decode_to_execute_SHIFT_CTRL_string = "SRA_1 "; + default : _zz_decode_to_execute_SHIFT_CTRL_string = "?????????"; + endcase + end + always @(*) begin + case(_zz_decode_to_execute_SHIFT_CTRL_1) + `ShiftCtrlEnum_binary_sequential_DISABLE_1 : _zz_decode_to_execute_SHIFT_CTRL_1_string = "DISABLE_1"; + `ShiftCtrlEnum_binary_sequential_SLL_1 : _zz_decode_to_execute_SHIFT_CTRL_1_string = "SLL_1 "; + `ShiftCtrlEnum_binary_sequential_SRL_1 : _zz_decode_to_execute_SHIFT_CTRL_1_string = "SRL_1 "; + `ShiftCtrlEnum_binary_sequential_SRA_1 : _zz_decode_to_execute_SHIFT_CTRL_1_string = "SRA_1 "; + default : _zz_decode_to_execute_SHIFT_CTRL_1_string = "?????????"; + endcase + end + always @(*) begin + case(decode_ALU_BITWISE_CTRL) + `AluBitwiseCtrlEnum_binary_sequential_XOR_1 : decode_ALU_BITWISE_CTRL_string = "XOR_1"; + `AluBitwiseCtrlEnum_binary_sequential_OR_1 : decode_ALU_BITWISE_CTRL_string = "OR_1 "; + `AluBitwiseCtrlEnum_binary_sequential_AND_1 : decode_ALU_BITWISE_CTRL_string = "AND_1"; + default : decode_ALU_BITWISE_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(_zz_decode_ALU_BITWISE_CTRL) + `AluBitwiseCtrlEnum_binary_sequential_XOR_1 : _zz_decode_ALU_BITWISE_CTRL_string = "XOR_1"; + `AluBitwiseCtrlEnum_binary_sequential_OR_1 : _zz_decode_ALU_BITWISE_CTRL_string = "OR_1 "; + `AluBitwiseCtrlEnum_binary_sequential_AND_1 : _zz_decode_ALU_BITWISE_CTRL_string = "AND_1"; + default : _zz_decode_ALU_BITWISE_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(_zz_decode_to_execute_ALU_BITWISE_CTRL) + `AluBitwiseCtrlEnum_binary_sequential_XOR_1 : _zz_decode_to_execute_ALU_BITWISE_CTRL_string = "XOR_1"; + `AluBitwiseCtrlEnum_binary_sequential_OR_1 : _zz_decode_to_execute_ALU_BITWISE_CTRL_string = "OR_1 "; + `AluBitwiseCtrlEnum_binary_sequential_AND_1 : _zz_decode_to_execute_ALU_BITWISE_CTRL_string = "AND_1"; + default : _zz_decode_to_execute_ALU_BITWISE_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(_zz_decode_to_execute_ALU_BITWISE_CTRL_1) + `AluBitwiseCtrlEnum_binary_sequential_XOR_1 : _zz_decode_to_execute_ALU_BITWISE_CTRL_1_string = "XOR_1"; + `AluBitwiseCtrlEnum_binary_sequential_OR_1 : _zz_decode_to_execute_ALU_BITWISE_CTRL_1_string = "OR_1 "; + `AluBitwiseCtrlEnum_binary_sequential_AND_1 : _zz_decode_to_execute_ALU_BITWISE_CTRL_1_string = "AND_1"; + default : _zz_decode_to_execute_ALU_BITWISE_CTRL_1_string = "?????"; + endcase + end + always @(*) begin + case(decode_SRC2_CTRL) + `Src2CtrlEnum_binary_sequential_RS : decode_SRC2_CTRL_string = "RS "; + `Src2CtrlEnum_binary_sequential_IMI : decode_SRC2_CTRL_string = "IMI"; + `Src2CtrlEnum_binary_sequential_IMS : decode_SRC2_CTRL_string = "IMS"; + `Src2CtrlEnum_binary_sequential_PC : decode_SRC2_CTRL_string = "PC "; + default : decode_SRC2_CTRL_string = "???"; + endcase + end + always @(*) begin + case(_zz_decode_SRC2_CTRL) + `Src2CtrlEnum_binary_sequential_RS : _zz_decode_SRC2_CTRL_string = "RS "; + `Src2CtrlEnum_binary_sequential_IMI : _zz_decode_SRC2_CTRL_string = "IMI"; + `Src2CtrlEnum_binary_sequential_IMS : _zz_decode_SRC2_CTRL_string = "IMS"; + `Src2CtrlEnum_binary_sequential_PC : _zz_decode_SRC2_CTRL_string = "PC "; + default : _zz_decode_SRC2_CTRL_string = "???"; + endcase + end + always @(*) begin + case(_zz_decode_to_execute_SRC2_CTRL) + `Src2CtrlEnum_binary_sequential_RS : _zz_decode_to_execute_SRC2_CTRL_string = "RS "; + `Src2CtrlEnum_binary_sequential_IMI : _zz_decode_to_execute_SRC2_CTRL_string = "IMI"; + `Src2CtrlEnum_binary_sequential_IMS : _zz_decode_to_execute_SRC2_CTRL_string = "IMS"; + `Src2CtrlEnum_binary_sequential_PC : _zz_decode_to_execute_SRC2_CTRL_string = "PC "; + default : _zz_decode_to_execute_SRC2_CTRL_string = "???"; + endcase + end + always @(*) begin + case(_zz_decode_to_execute_SRC2_CTRL_1) + `Src2CtrlEnum_binary_sequential_RS : _zz_decode_to_execute_SRC2_CTRL_1_string = "RS "; + `Src2CtrlEnum_binary_sequential_IMI : _zz_decode_to_execute_SRC2_CTRL_1_string = "IMI"; + `Src2CtrlEnum_binary_sequential_IMS : _zz_decode_to_execute_SRC2_CTRL_1_string = "IMS"; + `Src2CtrlEnum_binary_sequential_PC : _zz_decode_to_execute_SRC2_CTRL_1_string = "PC "; + default : _zz_decode_to_execute_SRC2_CTRL_1_string = "???"; + endcase + end + always @(*) begin + case(decode_ALU_CTRL) + `AluCtrlEnum_binary_sequential_ADD_SUB : decode_ALU_CTRL_string = "ADD_SUB "; + `AluCtrlEnum_binary_sequential_SLT_SLTU : decode_ALU_CTRL_string = "SLT_SLTU"; + `AluCtrlEnum_binary_sequential_BITWISE : decode_ALU_CTRL_string = "BITWISE "; + default : decode_ALU_CTRL_string = "????????"; + endcase + end + always @(*) begin + case(_zz_decode_ALU_CTRL) + `AluCtrlEnum_binary_sequential_ADD_SUB : _zz_decode_ALU_CTRL_string = "ADD_SUB "; + `AluCtrlEnum_binary_sequential_SLT_SLTU : _zz_decode_ALU_CTRL_string = "SLT_SLTU"; + `AluCtrlEnum_binary_sequential_BITWISE : _zz_decode_ALU_CTRL_string = "BITWISE "; + default : _zz_decode_ALU_CTRL_string = "????????"; + endcase + end + always @(*) begin + case(_zz_decode_to_execute_ALU_CTRL) + `AluCtrlEnum_binary_sequential_ADD_SUB : _zz_decode_to_execute_ALU_CTRL_string = "ADD_SUB "; + `AluCtrlEnum_binary_sequential_SLT_SLTU : _zz_decode_to_execute_ALU_CTRL_string = "SLT_SLTU"; + `AluCtrlEnum_binary_sequential_BITWISE : _zz_decode_to_execute_ALU_CTRL_string = "BITWISE "; + default : _zz_decode_to_execute_ALU_CTRL_string = "????????"; + endcase + end + always @(*) begin + case(_zz_decode_to_execute_ALU_CTRL_1) + `AluCtrlEnum_binary_sequential_ADD_SUB : _zz_decode_to_execute_ALU_CTRL_1_string = "ADD_SUB "; + `AluCtrlEnum_binary_sequential_SLT_SLTU : _zz_decode_to_execute_ALU_CTRL_1_string = "SLT_SLTU"; + `AluCtrlEnum_binary_sequential_BITWISE : _zz_decode_to_execute_ALU_CTRL_1_string = "BITWISE "; + default : _zz_decode_to_execute_ALU_CTRL_1_string = "????????"; + endcase + end + always @(*) begin + case(decode_SRC1_CTRL) + `Src1CtrlEnum_binary_sequential_RS : decode_SRC1_CTRL_string = "RS "; + `Src1CtrlEnum_binary_sequential_IMU : decode_SRC1_CTRL_string = "IMU "; + `Src1CtrlEnum_binary_sequential_PC_INCREMENT : decode_SRC1_CTRL_string = "PC_INCREMENT"; + `Src1CtrlEnum_binary_sequential_URS1 : decode_SRC1_CTRL_string = "URS1 "; + default : decode_SRC1_CTRL_string = "????????????"; + endcase + end + always @(*) begin + case(_zz_decode_SRC1_CTRL) + `Src1CtrlEnum_binary_sequential_RS : _zz_decode_SRC1_CTRL_string = "RS "; + `Src1CtrlEnum_binary_sequential_IMU : _zz_decode_SRC1_CTRL_string = "IMU "; + `Src1CtrlEnum_binary_sequential_PC_INCREMENT : _zz_decode_SRC1_CTRL_string = "PC_INCREMENT"; + `Src1CtrlEnum_binary_sequential_URS1 : _zz_decode_SRC1_CTRL_string = "URS1 "; + default : _zz_decode_SRC1_CTRL_string = "????????????"; + endcase + end + always @(*) begin + case(_zz_decode_to_execute_SRC1_CTRL) + `Src1CtrlEnum_binary_sequential_RS : _zz_decode_to_execute_SRC1_CTRL_string = "RS "; + `Src1CtrlEnum_binary_sequential_IMU : _zz_decode_to_execute_SRC1_CTRL_string = "IMU "; + `Src1CtrlEnum_binary_sequential_PC_INCREMENT : _zz_decode_to_execute_SRC1_CTRL_string = "PC_INCREMENT"; + `Src1CtrlEnum_binary_sequential_URS1 : _zz_decode_to_execute_SRC1_CTRL_string = "URS1 "; + default : _zz_decode_to_execute_SRC1_CTRL_string = "????????????"; + endcase + end + always @(*) begin + case(_zz_decode_to_execute_SRC1_CTRL_1) + `Src1CtrlEnum_binary_sequential_RS : _zz_decode_to_execute_SRC1_CTRL_1_string = "RS "; + `Src1CtrlEnum_binary_sequential_IMU : _zz_decode_to_execute_SRC1_CTRL_1_string = "IMU "; + `Src1CtrlEnum_binary_sequential_PC_INCREMENT : _zz_decode_to_execute_SRC1_CTRL_1_string = "PC_INCREMENT"; + `Src1CtrlEnum_binary_sequential_URS1 : _zz_decode_to_execute_SRC1_CTRL_1_string = "URS1 "; + default : _zz_decode_to_execute_SRC1_CTRL_1_string = "????????????"; + endcase + end + always @(*) begin + case(execute_CfuPlugin_CFU_INPUT_2_KIND) + `Input2Kind_binary_sequential_RS : execute_CfuPlugin_CFU_INPUT_2_KIND_string = "RS "; + `Input2Kind_binary_sequential_IMM_I : execute_CfuPlugin_CFU_INPUT_2_KIND_string = "IMM_I"; + default : execute_CfuPlugin_CFU_INPUT_2_KIND_string = "?????"; + endcase + end + always @(*) begin + case(_zz_execute_CfuPlugin_CFU_INPUT_2_KIND) + `Input2Kind_binary_sequential_RS : _zz_execute_CfuPlugin_CFU_INPUT_2_KIND_string = "RS "; + `Input2Kind_binary_sequential_IMM_I : _zz_execute_CfuPlugin_CFU_INPUT_2_KIND_string = "IMM_I"; + default : _zz_execute_CfuPlugin_CFU_INPUT_2_KIND_string = "?????"; + endcase + end + always @(*) begin + case(memory_ENV_CTRL) + `EnvCtrlEnum_binary_sequential_NONE : memory_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : memory_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_binary_sequential_WFI : memory_ENV_CTRL_string = "WFI "; + `EnvCtrlEnum_binary_sequential_ECALL : memory_ENV_CTRL_string = "ECALL"; + default : memory_ENV_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(_zz_memory_ENV_CTRL) + `EnvCtrlEnum_binary_sequential_NONE : _zz_memory_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : _zz_memory_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_binary_sequential_WFI : _zz_memory_ENV_CTRL_string = "WFI "; + `EnvCtrlEnum_binary_sequential_ECALL : _zz_memory_ENV_CTRL_string = "ECALL"; + default : _zz_memory_ENV_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(execute_ENV_CTRL) + `EnvCtrlEnum_binary_sequential_NONE : execute_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : execute_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_binary_sequential_WFI : execute_ENV_CTRL_string = "WFI "; + `EnvCtrlEnum_binary_sequential_ECALL : execute_ENV_CTRL_string = "ECALL"; + default : execute_ENV_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(_zz_execute_ENV_CTRL) + `EnvCtrlEnum_binary_sequential_NONE : _zz_execute_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : _zz_execute_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_binary_sequential_WFI : _zz_execute_ENV_CTRL_string = "WFI "; + `EnvCtrlEnum_binary_sequential_ECALL : _zz_execute_ENV_CTRL_string = "ECALL"; + default : _zz_execute_ENV_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(writeBack_ENV_CTRL) + `EnvCtrlEnum_binary_sequential_NONE : writeBack_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : writeBack_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_binary_sequential_WFI : writeBack_ENV_CTRL_string = "WFI "; + `EnvCtrlEnum_binary_sequential_ECALL : writeBack_ENV_CTRL_string = "ECALL"; + default : writeBack_ENV_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(_zz_writeBack_ENV_CTRL) + `EnvCtrlEnum_binary_sequential_NONE : _zz_writeBack_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : _zz_writeBack_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_binary_sequential_WFI : _zz_writeBack_ENV_CTRL_string = "WFI "; + `EnvCtrlEnum_binary_sequential_ECALL : _zz_writeBack_ENV_CTRL_string = "ECALL"; + default : _zz_writeBack_ENV_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(execute_BRANCH_CTRL) + `BranchCtrlEnum_binary_sequential_INC : execute_BRANCH_CTRL_string = "INC "; + `BranchCtrlEnum_binary_sequential_B : execute_BRANCH_CTRL_string = "B "; + `BranchCtrlEnum_binary_sequential_JAL : execute_BRANCH_CTRL_string = "JAL "; + `BranchCtrlEnum_binary_sequential_JALR : execute_BRANCH_CTRL_string = "JALR"; + default : execute_BRANCH_CTRL_string = "????"; + endcase + end + always @(*) begin + case(_zz_execute_BRANCH_CTRL) + `BranchCtrlEnum_binary_sequential_INC : _zz_execute_BRANCH_CTRL_string = "INC "; + `BranchCtrlEnum_binary_sequential_B : _zz_execute_BRANCH_CTRL_string = "B "; + `BranchCtrlEnum_binary_sequential_JAL : _zz_execute_BRANCH_CTRL_string = "JAL "; + `BranchCtrlEnum_binary_sequential_JALR : _zz_execute_BRANCH_CTRL_string = "JALR"; + default : _zz_execute_BRANCH_CTRL_string = "????"; + endcase + end + always @(*) begin + case(memory_SHIFT_CTRL) + `ShiftCtrlEnum_binary_sequential_DISABLE_1 : memory_SHIFT_CTRL_string = "DISABLE_1"; + `ShiftCtrlEnum_binary_sequential_SLL_1 : memory_SHIFT_CTRL_string = "SLL_1 "; + `ShiftCtrlEnum_binary_sequential_SRL_1 : memory_SHIFT_CTRL_string = "SRL_1 "; + `ShiftCtrlEnum_binary_sequential_SRA_1 : memory_SHIFT_CTRL_string = "SRA_1 "; + default : memory_SHIFT_CTRL_string = "?????????"; + endcase + end + always @(*) begin + case(_zz_memory_SHIFT_CTRL) + `ShiftCtrlEnum_binary_sequential_DISABLE_1 : _zz_memory_SHIFT_CTRL_string = "DISABLE_1"; + `ShiftCtrlEnum_binary_sequential_SLL_1 : _zz_memory_SHIFT_CTRL_string = "SLL_1 "; + `ShiftCtrlEnum_binary_sequential_SRL_1 : _zz_memory_SHIFT_CTRL_string = "SRL_1 "; + `ShiftCtrlEnum_binary_sequential_SRA_1 : _zz_memory_SHIFT_CTRL_string = "SRA_1 "; + default : _zz_memory_SHIFT_CTRL_string = "?????????"; + endcase + end + always @(*) begin + case(execute_SHIFT_CTRL) + `ShiftCtrlEnum_binary_sequential_DISABLE_1 : execute_SHIFT_CTRL_string = "DISABLE_1"; + `ShiftCtrlEnum_binary_sequential_SLL_1 : execute_SHIFT_CTRL_string = "SLL_1 "; + `ShiftCtrlEnum_binary_sequential_SRL_1 : execute_SHIFT_CTRL_string = "SRL_1 "; + `ShiftCtrlEnum_binary_sequential_SRA_1 : execute_SHIFT_CTRL_string = "SRA_1 "; + default : execute_SHIFT_CTRL_string = "?????????"; + endcase + end + always @(*) begin + case(_zz_execute_SHIFT_CTRL) + `ShiftCtrlEnum_binary_sequential_DISABLE_1 : _zz_execute_SHIFT_CTRL_string = "DISABLE_1"; + `ShiftCtrlEnum_binary_sequential_SLL_1 : _zz_execute_SHIFT_CTRL_string = "SLL_1 "; + `ShiftCtrlEnum_binary_sequential_SRL_1 : _zz_execute_SHIFT_CTRL_string = "SRL_1 "; + `ShiftCtrlEnum_binary_sequential_SRA_1 : _zz_execute_SHIFT_CTRL_string = "SRA_1 "; + default : _zz_execute_SHIFT_CTRL_string = "?????????"; + endcase + end + always @(*) begin + case(execute_SRC2_CTRL) + `Src2CtrlEnum_binary_sequential_RS : execute_SRC2_CTRL_string = "RS "; + `Src2CtrlEnum_binary_sequential_IMI : execute_SRC2_CTRL_string = "IMI"; + `Src2CtrlEnum_binary_sequential_IMS : execute_SRC2_CTRL_string = "IMS"; + `Src2CtrlEnum_binary_sequential_PC : execute_SRC2_CTRL_string = "PC "; + default : execute_SRC2_CTRL_string = "???"; + endcase + end + always @(*) begin + case(_zz_execute_SRC2_CTRL) + `Src2CtrlEnum_binary_sequential_RS : _zz_execute_SRC2_CTRL_string = "RS "; + `Src2CtrlEnum_binary_sequential_IMI : _zz_execute_SRC2_CTRL_string = "IMI"; + `Src2CtrlEnum_binary_sequential_IMS : _zz_execute_SRC2_CTRL_string = "IMS"; + `Src2CtrlEnum_binary_sequential_PC : _zz_execute_SRC2_CTRL_string = "PC "; + default : _zz_execute_SRC2_CTRL_string = "???"; + endcase + end + always @(*) begin + case(execute_SRC1_CTRL) + `Src1CtrlEnum_binary_sequential_RS : execute_SRC1_CTRL_string = "RS "; + `Src1CtrlEnum_binary_sequential_IMU : execute_SRC1_CTRL_string = "IMU "; + `Src1CtrlEnum_binary_sequential_PC_INCREMENT : execute_SRC1_CTRL_string = "PC_INCREMENT"; + `Src1CtrlEnum_binary_sequential_URS1 : execute_SRC1_CTRL_string = "URS1 "; + default : execute_SRC1_CTRL_string = "????????????"; + endcase + end + always @(*) begin + case(_zz_execute_SRC1_CTRL) + `Src1CtrlEnum_binary_sequential_RS : _zz_execute_SRC1_CTRL_string = "RS "; + `Src1CtrlEnum_binary_sequential_IMU : _zz_execute_SRC1_CTRL_string = "IMU "; + `Src1CtrlEnum_binary_sequential_PC_INCREMENT : _zz_execute_SRC1_CTRL_string = "PC_INCREMENT"; + `Src1CtrlEnum_binary_sequential_URS1 : _zz_execute_SRC1_CTRL_string = "URS1 "; + default : _zz_execute_SRC1_CTRL_string = "????????????"; + endcase + end + always @(*) begin + case(execute_ALU_CTRL) + `AluCtrlEnum_binary_sequential_ADD_SUB : execute_ALU_CTRL_string = "ADD_SUB "; + `AluCtrlEnum_binary_sequential_SLT_SLTU : execute_ALU_CTRL_string = "SLT_SLTU"; + `AluCtrlEnum_binary_sequential_BITWISE : execute_ALU_CTRL_string = "BITWISE "; + default : execute_ALU_CTRL_string = "????????"; + endcase + end + always @(*) begin + case(_zz_execute_ALU_CTRL) + `AluCtrlEnum_binary_sequential_ADD_SUB : _zz_execute_ALU_CTRL_string = "ADD_SUB "; + `AluCtrlEnum_binary_sequential_SLT_SLTU : _zz_execute_ALU_CTRL_string = "SLT_SLTU"; + `AluCtrlEnum_binary_sequential_BITWISE : _zz_execute_ALU_CTRL_string = "BITWISE "; + default : _zz_execute_ALU_CTRL_string = "????????"; + endcase + end + always @(*) begin + case(execute_ALU_BITWISE_CTRL) + `AluBitwiseCtrlEnum_binary_sequential_XOR_1 : execute_ALU_BITWISE_CTRL_string = "XOR_1"; + `AluBitwiseCtrlEnum_binary_sequential_OR_1 : execute_ALU_BITWISE_CTRL_string = "OR_1 "; + `AluBitwiseCtrlEnum_binary_sequential_AND_1 : execute_ALU_BITWISE_CTRL_string = "AND_1"; + default : execute_ALU_BITWISE_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(_zz_execute_ALU_BITWISE_CTRL) + `AluBitwiseCtrlEnum_binary_sequential_XOR_1 : _zz_execute_ALU_BITWISE_CTRL_string = "XOR_1"; + `AluBitwiseCtrlEnum_binary_sequential_OR_1 : _zz_execute_ALU_BITWISE_CTRL_string = "OR_1 "; + `AluBitwiseCtrlEnum_binary_sequential_AND_1 : _zz_execute_ALU_BITWISE_CTRL_string = "AND_1"; + default : _zz_execute_ALU_BITWISE_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(_zz_decode_CfuPlugin_CFU_INPUT_2_KIND_1) + `Input2Kind_binary_sequential_RS : _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_1_string = "RS "; + `Input2Kind_binary_sequential_IMM_I : _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_1_string = "IMM_I"; + default : _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_1_string = "?????"; + endcase + end + always @(*) begin + case(_zz_decode_ENV_CTRL_1) + `EnvCtrlEnum_binary_sequential_NONE : _zz_decode_ENV_CTRL_1_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : _zz_decode_ENV_CTRL_1_string = "XRET "; + `EnvCtrlEnum_binary_sequential_WFI : _zz_decode_ENV_CTRL_1_string = "WFI "; + `EnvCtrlEnum_binary_sequential_ECALL : _zz_decode_ENV_CTRL_1_string = "ECALL"; + default : _zz_decode_ENV_CTRL_1_string = "?????"; + endcase + end + always @(*) begin + case(_zz_decode_BRANCH_CTRL) + `BranchCtrlEnum_binary_sequential_INC : _zz_decode_BRANCH_CTRL_string = "INC "; + `BranchCtrlEnum_binary_sequential_B : _zz_decode_BRANCH_CTRL_string = "B "; + `BranchCtrlEnum_binary_sequential_JAL : _zz_decode_BRANCH_CTRL_string = "JAL "; + `BranchCtrlEnum_binary_sequential_JALR : _zz_decode_BRANCH_CTRL_string = "JALR"; + default : _zz_decode_BRANCH_CTRL_string = "????"; + endcase + end + always @(*) begin + case(_zz_decode_SHIFT_CTRL_1) + `ShiftCtrlEnum_binary_sequential_DISABLE_1 : _zz_decode_SHIFT_CTRL_1_string = "DISABLE_1"; + `ShiftCtrlEnum_binary_sequential_SLL_1 : _zz_decode_SHIFT_CTRL_1_string = "SLL_1 "; + `ShiftCtrlEnum_binary_sequential_SRL_1 : _zz_decode_SHIFT_CTRL_1_string = "SRL_1 "; + `ShiftCtrlEnum_binary_sequential_SRA_1 : _zz_decode_SHIFT_CTRL_1_string = "SRA_1 "; + default : _zz_decode_SHIFT_CTRL_1_string = "?????????"; + endcase + end + always @(*) begin + case(_zz_decode_ALU_BITWISE_CTRL_1) + `AluBitwiseCtrlEnum_binary_sequential_XOR_1 : _zz_decode_ALU_BITWISE_CTRL_1_string = "XOR_1"; + `AluBitwiseCtrlEnum_binary_sequential_OR_1 : _zz_decode_ALU_BITWISE_CTRL_1_string = "OR_1 "; + `AluBitwiseCtrlEnum_binary_sequential_AND_1 : _zz_decode_ALU_BITWISE_CTRL_1_string = "AND_1"; + default : _zz_decode_ALU_BITWISE_CTRL_1_string = "?????"; + endcase + end + always @(*) begin + case(_zz_decode_SRC2_CTRL_1) + `Src2CtrlEnum_binary_sequential_RS : _zz_decode_SRC2_CTRL_1_string = "RS "; + `Src2CtrlEnum_binary_sequential_IMI : _zz_decode_SRC2_CTRL_1_string = "IMI"; + `Src2CtrlEnum_binary_sequential_IMS : _zz_decode_SRC2_CTRL_1_string = "IMS"; + `Src2CtrlEnum_binary_sequential_PC : _zz_decode_SRC2_CTRL_1_string = "PC "; + default : _zz_decode_SRC2_CTRL_1_string = "???"; + endcase + end + always @(*) begin + case(_zz_decode_ALU_CTRL_1) + `AluCtrlEnum_binary_sequential_ADD_SUB : _zz_decode_ALU_CTRL_1_string = "ADD_SUB "; + `AluCtrlEnum_binary_sequential_SLT_SLTU : _zz_decode_ALU_CTRL_1_string = "SLT_SLTU"; + `AluCtrlEnum_binary_sequential_BITWISE : _zz_decode_ALU_CTRL_1_string = "BITWISE "; + default : _zz_decode_ALU_CTRL_1_string = "????????"; + endcase + end + always @(*) begin + case(_zz_decode_SRC1_CTRL_1) + `Src1CtrlEnum_binary_sequential_RS : _zz_decode_SRC1_CTRL_1_string = "RS "; + `Src1CtrlEnum_binary_sequential_IMU : _zz_decode_SRC1_CTRL_1_string = "IMU "; + `Src1CtrlEnum_binary_sequential_PC_INCREMENT : _zz_decode_SRC1_CTRL_1_string = "PC_INCREMENT"; + `Src1CtrlEnum_binary_sequential_URS1 : _zz_decode_SRC1_CTRL_1_string = "URS1 "; + default : _zz_decode_SRC1_CTRL_1_string = "????????????"; + endcase + end + always @(*) begin + case(decode_BRANCH_CTRL) + `BranchCtrlEnum_binary_sequential_INC : decode_BRANCH_CTRL_string = "INC "; + `BranchCtrlEnum_binary_sequential_B : decode_BRANCH_CTRL_string = "B "; + `BranchCtrlEnum_binary_sequential_JAL : decode_BRANCH_CTRL_string = "JAL "; + `BranchCtrlEnum_binary_sequential_JALR : decode_BRANCH_CTRL_string = "JALR"; + default : decode_BRANCH_CTRL_string = "????"; + endcase + end + always @(*) begin + case(_zz_decode_BRANCH_CTRL_1) + `BranchCtrlEnum_binary_sequential_INC : _zz_decode_BRANCH_CTRL_1_string = "INC "; + `BranchCtrlEnum_binary_sequential_B : _zz_decode_BRANCH_CTRL_1_string = "B "; + `BranchCtrlEnum_binary_sequential_JAL : _zz_decode_BRANCH_CTRL_1_string = "JAL "; + `BranchCtrlEnum_binary_sequential_JALR : _zz_decode_BRANCH_CTRL_1_string = "JALR"; + default : _zz_decode_BRANCH_CTRL_1_string = "????"; + endcase + end + always @(*) begin + case(_zz_decode_SRC1_CTRL_2) + `Src1CtrlEnum_binary_sequential_RS : _zz_decode_SRC1_CTRL_2_string = "RS "; + `Src1CtrlEnum_binary_sequential_IMU : _zz_decode_SRC1_CTRL_2_string = "IMU "; + `Src1CtrlEnum_binary_sequential_PC_INCREMENT : _zz_decode_SRC1_CTRL_2_string = "PC_INCREMENT"; + `Src1CtrlEnum_binary_sequential_URS1 : _zz_decode_SRC1_CTRL_2_string = "URS1 "; + default : _zz_decode_SRC1_CTRL_2_string = "????????????"; + endcase + end + always @(*) begin + case(_zz_decode_ALU_CTRL_2) + `AluCtrlEnum_binary_sequential_ADD_SUB : _zz_decode_ALU_CTRL_2_string = "ADD_SUB "; + `AluCtrlEnum_binary_sequential_SLT_SLTU : _zz_decode_ALU_CTRL_2_string = "SLT_SLTU"; + `AluCtrlEnum_binary_sequential_BITWISE : _zz_decode_ALU_CTRL_2_string = "BITWISE "; + default : _zz_decode_ALU_CTRL_2_string = "????????"; + endcase + end + always @(*) begin + case(_zz_decode_SRC2_CTRL_2) + `Src2CtrlEnum_binary_sequential_RS : _zz_decode_SRC2_CTRL_2_string = "RS "; + `Src2CtrlEnum_binary_sequential_IMI : _zz_decode_SRC2_CTRL_2_string = "IMI"; + `Src2CtrlEnum_binary_sequential_IMS : _zz_decode_SRC2_CTRL_2_string = "IMS"; + `Src2CtrlEnum_binary_sequential_PC : _zz_decode_SRC2_CTRL_2_string = "PC "; + default : _zz_decode_SRC2_CTRL_2_string = "???"; + endcase + end + always @(*) begin + case(_zz_decode_ALU_BITWISE_CTRL_2) + `AluBitwiseCtrlEnum_binary_sequential_XOR_1 : _zz_decode_ALU_BITWISE_CTRL_2_string = "XOR_1"; + `AluBitwiseCtrlEnum_binary_sequential_OR_1 : _zz_decode_ALU_BITWISE_CTRL_2_string = "OR_1 "; + `AluBitwiseCtrlEnum_binary_sequential_AND_1 : _zz_decode_ALU_BITWISE_CTRL_2_string = "AND_1"; + default : _zz_decode_ALU_BITWISE_CTRL_2_string = "?????"; + endcase + end + always @(*) begin + case(_zz_decode_SHIFT_CTRL_2) + `ShiftCtrlEnum_binary_sequential_DISABLE_1 : _zz_decode_SHIFT_CTRL_2_string = "DISABLE_1"; + `ShiftCtrlEnum_binary_sequential_SLL_1 : _zz_decode_SHIFT_CTRL_2_string = "SLL_1 "; + `ShiftCtrlEnum_binary_sequential_SRL_1 : _zz_decode_SHIFT_CTRL_2_string = "SRL_1 "; + `ShiftCtrlEnum_binary_sequential_SRA_1 : _zz_decode_SHIFT_CTRL_2_string = "SRA_1 "; + default : _zz_decode_SHIFT_CTRL_2_string = "?????????"; + endcase + end + always @(*) begin + case(_zz_decode_BRANCH_CTRL_2) + `BranchCtrlEnum_binary_sequential_INC : _zz_decode_BRANCH_CTRL_2_string = "INC "; + `BranchCtrlEnum_binary_sequential_B : _zz_decode_BRANCH_CTRL_2_string = "B "; + `BranchCtrlEnum_binary_sequential_JAL : _zz_decode_BRANCH_CTRL_2_string = "JAL "; + `BranchCtrlEnum_binary_sequential_JALR : _zz_decode_BRANCH_CTRL_2_string = "JALR"; + default : _zz_decode_BRANCH_CTRL_2_string = "????"; + endcase + end + always @(*) begin + case(_zz_decode_ENV_CTRL_2) + `EnvCtrlEnum_binary_sequential_NONE : _zz_decode_ENV_CTRL_2_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : _zz_decode_ENV_CTRL_2_string = "XRET "; + `EnvCtrlEnum_binary_sequential_WFI : _zz_decode_ENV_CTRL_2_string = "WFI "; + `EnvCtrlEnum_binary_sequential_ECALL : _zz_decode_ENV_CTRL_2_string = "ECALL"; + default : _zz_decode_ENV_CTRL_2_string = "?????"; + endcase + end + always @(*) begin + case(_zz_decode_CfuPlugin_CFU_INPUT_2_KIND_8) + `Input2Kind_binary_sequential_RS : _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_8_string = "RS "; + `Input2Kind_binary_sequential_IMM_I : _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_8_string = "IMM_I"; + default : _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_8_string = "?????"; + endcase + end + always @(*) begin + case(decode_to_execute_SRC1_CTRL) + `Src1CtrlEnum_binary_sequential_RS : decode_to_execute_SRC1_CTRL_string = "RS "; + `Src1CtrlEnum_binary_sequential_IMU : decode_to_execute_SRC1_CTRL_string = "IMU "; + `Src1CtrlEnum_binary_sequential_PC_INCREMENT : decode_to_execute_SRC1_CTRL_string = "PC_INCREMENT"; + `Src1CtrlEnum_binary_sequential_URS1 : decode_to_execute_SRC1_CTRL_string = "URS1 "; + default : decode_to_execute_SRC1_CTRL_string = "????????????"; + endcase + end + always @(*) begin + case(decode_to_execute_ALU_CTRL) + `AluCtrlEnum_binary_sequential_ADD_SUB : decode_to_execute_ALU_CTRL_string = "ADD_SUB "; + `AluCtrlEnum_binary_sequential_SLT_SLTU : decode_to_execute_ALU_CTRL_string = "SLT_SLTU"; + `AluCtrlEnum_binary_sequential_BITWISE : decode_to_execute_ALU_CTRL_string = "BITWISE "; + default : decode_to_execute_ALU_CTRL_string = "????????"; + endcase + end + always @(*) begin + case(decode_to_execute_SRC2_CTRL) + `Src2CtrlEnum_binary_sequential_RS : decode_to_execute_SRC2_CTRL_string = "RS "; + `Src2CtrlEnum_binary_sequential_IMI : decode_to_execute_SRC2_CTRL_string = "IMI"; + `Src2CtrlEnum_binary_sequential_IMS : decode_to_execute_SRC2_CTRL_string = "IMS"; + `Src2CtrlEnum_binary_sequential_PC : decode_to_execute_SRC2_CTRL_string = "PC "; + default : decode_to_execute_SRC2_CTRL_string = "???"; + endcase + end + always @(*) begin + case(decode_to_execute_ALU_BITWISE_CTRL) + `AluBitwiseCtrlEnum_binary_sequential_XOR_1 : decode_to_execute_ALU_BITWISE_CTRL_string = "XOR_1"; + `AluBitwiseCtrlEnum_binary_sequential_OR_1 : decode_to_execute_ALU_BITWISE_CTRL_string = "OR_1 "; + `AluBitwiseCtrlEnum_binary_sequential_AND_1 : decode_to_execute_ALU_BITWISE_CTRL_string = "AND_1"; + default : decode_to_execute_ALU_BITWISE_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(decode_to_execute_SHIFT_CTRL) + `ShiftCtrlEnum_binary_sequential_DISABLE_1 : decode_to_execute_SHIFT_CTRL_string = "DISABLE_1"; + `ShiftCtrlEnum_binary_sequential_SLL_1 : decode_to_execute_SHIFT_CTRL_string = "SLL_1 "; + `ShiftCtrlEnum_binary_sequential_SRL_1 : decode_to_execute_SHIFT_CTRL_string = "SRL_1 "; + `ShiftCtrlEnum_binary_sequential_SRA_1 : decode_to_execute_SHIFT_CTRL_string = "SRA_1 "; + default : decode_to_execute_SHIFT_CTRL_string = "?????????"; + endcase + end + always @(*) begin + case(execute_to_memory_SHIFT_CTRL) + `ShiftCtrlEnum_binary_sequential_DISABLE_1 : execute_to_memory_SHIFT_CTRL_string = "DISABLE_1"; + `ShiftCtrlEnum_binary_sequential_SLL_1 : execute_to_memory_SHIFT_CTRL_string = "SLL_1 "; + `ShiftCtrlEnum_binary_sequential_SRL_1 : execute_to_memory_SHIFT_CTRL_string = "SRL_1 "; + `ShiftCtrlEnum_binary_sequential_SRA_1 : execute_to_memory_SHIFT_CTRL_string = "SRA_1 "; + default : execute_to_memory_SHIFT_CTRL_string = "?????????"; + endcase + end + always @(*) begin + case(decode_to_execute_BRANCH_CTRL) + `BranchCtrlEnum_binary_sequential_INC : decode_to_execute_BRANCH_CTRL_string = "INC "; + `BranchCtrlEnum_binary_sequential_B : decode_to_execute_BRANCH_CTRL_string = "B "; + `BranchCtrlEnum_binary_sequential_JAL : decode_to_execute_BRANCH_CTRL_string = "JAL "; + `BranchCtrlEnum_binary_sequential_JALR : decode_to_execute_BRANCH_CTRL_string = "JALR"; + default : decode_to_execute_BRANCH_CTRL_string = "????"; + endcase + end + always @(*) begin + case(decode_to_execute_ENV_CTRL) + `EnvCtrlEnum_binary_sequential_NONE : decode_to_execute_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : decode_to_execute_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_binary_sequential_WFI : decode_to_execute_ENV_CTRL_string = "WFI "; + `EnvCtrlEnum_binary_sequential_ECALL : decode_to_execute_ENV_CTRL_string = "ECALL"; + default : decode_to_execute_ENV_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(execute_to_memory_ENV_CTRL) + `EnvCtrlEnum_binary_sequential_NONE : execute_to_memory_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : execute_to_memory_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_binary_sequential_WFI : execute_to_memory_ENV_CTRL_string = "WFI "; + `EnvCtrlEnum_binary_sequential_ECALL : execute_to_memory_ENV_CTRL_string = "ECALL"; + default : execute_to_memory_ENV_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(memory_to_writeBack_ENV_CTRL) + `EnvCtrlEnum_binary_sequential_NONE : memory_to_writeBack_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : memory_to_writeBack_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_binary_sequential_WFI : memory_to_writeBack_ENV_CTRL_string = "WFI "; + `EnvCtrlEnum_binary_sequential_ECALL : memory_to_writeBack_ENV_CTRL_string = "ECALL"; + default : memory_to_writeBack_ENV_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND) + `Input2Kind_binary_sequential_RS : decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND_string = "RS "; + `Input2Kind_binary_sequential_IMM_I : decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND_string = "IMM_I"; + default : decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND_string = "?????"; + endcase + end + `endif + + assign memory_MUL_LOW = ($signed(_zz_memory_MUL_LOW) + $signed(_zz_memory_MUL_LOW_7)); + assign writeBack_CfuPlugin_CFU_IN_FLIGHT = memory_to_writeBack_CfuPlugin_CFU_IN_FLIGHT; + assign execute_CfuPlugin_CFU_IN_FLIGHT = ((execute_CfuPlugin_schedule || execute_CfuPlugin_hold) || execute_CfuPlugin_fired); + assign memory_MUL_HH = execute_to_memory_MUL_HH; + assign execute_MUL_HH = ($signed(execute_MulPlugin_aHigh) * $signed(execute_MulPlugin_bHigh)); + assign execute_MUL_HL = ($signed(execute_MulPlugin_aHigh) * $signed(execute_MulPlugin_bSLow)); + assign execute_MUL_LH = ($signed(execute_MulPlugin_aSLow) * $signed(execute_MulPlugin_bHigh)); + assign execute_MUL_LL = (execute_MulPlugin_aULow * execute_MulPlugin_bULow); + assign execute_SHIFT_RIGHT = _zz_execute_SHIFT_RIGHT; + assign execute_REGFILE_WRITE_DATA = _zz_execute_REGFILE_WRITE_DATA; + assign memory_MEMORY_STORE_DATA_RF = execute_to_memory_MEMORY_STORE_DATA_RF; + assign execute_MEMORY_STORE_DATA_RF = _zz_execute_MEMORY_STORE_DATA_RF; + assign decode_CSR_READ_OPCODE = (decode_INSTRUCTION[13 : 7] != 7'h20); + assign decode_CSR_WRITE_OPCODE = (! (((decode_INSTRUCTION[14 : 13] == 2'b01) && (decode_INSTRUCTION[19 : 15] == 5'h0)) || ((decode_INSTRUCTION[14 : 13] == 2'b11) && (decode_INSTRUCTION[19 : 15] == 5'h0)))); + assign decode_PREDICTION_HAD_BRANCHED2 = IBusCachedPlugin_decodePrediction_cmd_hadBranch; + assign decode_SRC2_FORCE_ZERO = (decode_SRC_ADD_ZERO && (! decode_SRC_USE_SUB_LESS)); + assign decode_CfuPlugin_CFU_INPUT_2_KIND = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND; + assign _zz_decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND = _zz_decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND_1; + assign decode_CfuPlugin_CFU_ENABLE = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[32]; + assign decode_IS_RS2_SIGNED = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[31]; + assign decode_IS_RS1_SIGNED = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[30]; + assign decode_IS_DIV = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[29]; + assign memory_IS_MUL = execute_to_memory_IS_MUL; + assign execute_IS_MUL = decode_to_execute_IS_MUL; + assign decode_IS_MUL = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[28]; + assign _zz_memory_to_writeBack_ENV_CTRL = _zz_memory_to_writeBack_ENV_CTRL_1; + assign _zz_execute_to_memory_ENV_CTRL = _zz_execute_to_memory_ENV_CTRL_1; + assign decode_ENV_CTRL = _zz_decode_ENV_CTRL; + assign _zz_decode_to_execute_ENV_CTRL = _zz_decode_to_execute_ENV_CTRL_1; + assign decode_IS_CSR = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[25]; + assign _zz_decode_to_execute_BRANCH_CTRL = _zz_decode_to_execute_BRANCH_CTRL_1; + assign _zz_execute_to_memory_SHIFT_CTRL = _zz_execute_to_memory_SHIFT_CTRL_1; + assign decode_SHIFT_CTRL = _zz_decode_SHIFT_CTRL; + assign _zz_decode_to_execute_SHIFT_CTRL = _zz_decode_to_execute_SHIFT_CTRL_1; + assign decode_ALU_BITWISE_CTRL = _zz_decode_ALU_BITWISE_CTRL; + assign _zz_decode_to_execute_ALU_BITWISE_CTRL = _zz_decode_to_execute_ALU_BITWISE_CTRL_1; + assign decode_SRC_LESS_UNSIGNED = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[17]; + assign decode_MEMORY_MANAGMENT = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[16]; + assign memory_MEMORY_WR = execute_to_memory_MEMORY_WR; + assign decode_MEMORY_WR = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[13]; + assign execute_BYPASSABLE_MEMORY_STAGE = decode_to_execute_BYPASSABLE_MEMORY_STAGE; + assign decode_BYPASSABLE_MEMORY_STAGE = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[12]; + assign decode_BYPASSABLE_EXECUTE_STAGE = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[11]; + assign decode_SRC2_CTRL = _zz_decode_SRC2_CTRL; + assign _zz_decode_to_execute_SRC2_CTRL = _zz_decode_to_execute_SRC2_CTRL_1; + assign decode_ALU_CTRL = _zz_decode_ALU_CTRL; + assign _zz_decode_to_execute_ALU_CTRL = _zz_decode_to_execute_ALU_CTRL_1; + assign decode_SRC1_CTRL = _zz_decode_SRC1_CTRL; + assign _zz_decode_to_execute_SRC1_CTRL = _zz_decode_to_execute_SRC1_CTRL_1; + assign decode_MEMORY_FORCE_CONSTISTENCY = 1'b0; + assign writeBack_FORMAL_PC_NEXT = memory_to_writeBack_FORMAL_PC_NEXT; + assign memory_FORMAL_PC_NEXT = execute_to_memory_FORMAL_PC_NEXT; + assign execute_FORMAL_PC_NEXT = decode_to_execute_FORMAL_PC_NEXT; + assign decode_FORMAL_PC_NEXT = (decode_PC + 32'h00000004); + assign memory_PC = execute_to_memory_PC; + always @(*) begin + _zz_memory_to_writeBack_CfuPlugin_CFU_IN_FLIGHT = memory_CfuPlugin_CFU_IN_FLIGHT; + if(memory_arbitration_isStuck) begin + _zz_memory_to_writeBack_CfuPlugin_CFU_IN_FLIGHT = 1'b0; + end + end + + always @(*) begin + _zz_execute_to_memory_CfuPlugin_CFU_IN_FLIGHT = execute_CfuPlugin_CFU_IN_FLIGHT; + if(execute_arbitration_isStuck) begin + _zz_execute_to_memory_CfuPlugin_CFU_IN_FLIGHT = 1'b0; + end + end + + assign memory_CfuPlugin_CFU_IN_FLIGHT = execute_to_memory_CfuPlugin_CFU_IN_FLIGHT; + assign execute_CfuPlugin_CFU_INPUT_2_KIND = _zz_execute_CfuPlugin_CFU_INPUT_2_KIND; + assign execute_CfuPlugin_CFU_ENABLE = decode_to_execute_CfuPlugin_CFU_ENABLE; + assign execute_IS_RS1_SIGNED = decode_to_execute_IS_RS1_SIGNED; + assign execute_IS_DIV = decode_to_execute_IS_DIV; + assign execute_IS_RS2_SIGNED = decode_to_execute_IS_RS2_SIGNED; + assign memory_IS_DIV = execute_to_memory_IS_DIV; + assign writeBack_IS_MUL = memory_to_writeBack_IS_MUL; + assign writeBack_MUL_HH = memory_to_writeBack_MUL_HH; + assign writeBack_MUL_LOW = memory_to_writeBack_MUL_LOW; + assign memory_MUL_HL = execute_to_memory_MUL_HL; + assign memory_MUL_LH = execute_to_memory_MUL_LH; + assign memory_MUL_LL = execute_to_memory_MUL_LL; + assign execute_CSR_READ_OPCODE = decode_to_execute_CSR_READ_OPCODE; + assign execute_CSR_WRITE_OPCODE = decode_to_execute_CSR_WRITE_OPCODE; + assign execute_IS_CSR = decode_to_execute_IS_CSR; + assign memory_ENV_CTRL = _zz_memory_ENV_CTRL; + assign execute_ENV_CTRL = _zz_execute_ENV_CTRL; + assign writeBack_ENV_CTRL = _zz_writeBack_ENV_CTRL; + assign execute_BRANCH_CALC = {execute_BranchPlugin_branchAdder[31 : 1],1'b0}; + assign execute_BRANCH_DO = ((execute_PREDICTION_HAD_BRANCHED2 != execute_BRANCH_COND_RESULT) || execute_BranchPlugin_missAlignedTarget); + assign execute_PC = decode_to_execute_PC; + assign execute_PREDICTION_HAD_BRANCHED2 = decode_to_execute_PREDICTION_HAD_BRANCHED2; + assign execute_RS1 = decode_to_execute_RS1; + assign execute_BRANCH_COND_RESULT = _zz_execute_BRANCH_COND_RESULT_1; + assign execute_BRANCH_CTRL = _zz_execute_BRANCH_CTRL; + assign decode_RS2_USE = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[15]; + assign decode_RS1_USE = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[5]; + always @(*) begin + _zz_decode_RS2 = execute_REGFILE_WRITE_DATA; + if(when_CsrPlugin_l1176) begin + _zz_decode_RS2 = CsrPlugin_csrMapping_readDataSignal; + end + end + + assign execute_REGFILE_WRITE_VALID = decode_to_execute_REGFILE_WRITE_VALID; + assign execute_BYPASSABLE_EXECUTE_STAGE = decode_to_execute_BYPASSABLE_EXECUTE_STAGE; + assign memory_REGFILE_WRITE_VALID = execute_to_memory_REGFILE_WRITE_VALID; + assign memory_INSTRUCTION = execute_to_memory_INSTRUCTION; + assign memory_BYPASSABLE_MEMORY_STAGE = execute_to_memory_BYPASSABLE_MEMORY_STAGE; + assign writeBack_REGFILE_WRITE_VALID = memory_to_writeBack_REGFILE_WRITE_VALID; + always @(*) begin + decode_RS2 = decode_RegFilePlugin_rs2Data; + if(HazardSimplePlugin_writeBackBuffer_valid) begin + if(HazardSimplePlugin_addr1Match) begin + decode_RS2 = HazardSimplePlugin_writeBackBuffer_payload_data; + end + end + if(when_HazardSimplePlugin_l45) begin + if(when_HazardSimplePlugin_l47) begin + if(when_HazardSimplePlugin_l51) begin + decode_RS2 = _zz_decode_RS2_2; + end + end + end + if(when_HazardSimplePlugin_l45_1) begin + if(memory_BYPASSABLE_MEMORY_STAGE) begin + if(when_HazardSimplePlugin_l51_1) begin + decode_RS2 = _zz_decode_RS2_1; + end + end + end + if(when_HazardSimplePlugin_l45_2) begin + if(execute_BYPASSABLE_EXECUTE_STAGE) begin + if(when_HazardSimplePlugin_l51_2) begin + decode_RS2 = _zz_decode_RS2; + end + end + end + end + + always @(*) begin + decode_RS1 = decode_RegFilePlugin_rs1Data; + if(HazardSimplePlugin_writeBackBuffer_valid) begin + if(HazardSimplePlugin_addr0Match) begin + decode_RS1 = HazardSimplePlugin_writeBackBuffer_payload_data; + end + end + if(when_HazardSimplePlugin_l45) begin + if(when_HazardSimplePlugin_l47) begin + if(when_HazardSimplePlugin_l48) begin + decode_RS1 = _zz_decode_RS2_2; + end + end + end + if(when_HazardSimplePlugin_l45_1) begin + if(memory_BYPASSABLE_MEMORY_STAGE) begin + if(when_HazardSimplePlugin_l48_1) begin + decode_RS1 = _zz_decode_RS2_1; + end + end + end + if(when_HazardSimplePlugin_l45_2) begin + if(execute_BYPASSABLE_EXECUTE_STAGE) begin + if(when_HazardSimplePlugin_l48_2) begin + decode_RS1 = _zz_decode_RS2; + end + end + end + end + + assign memory_SHIFT_RIGHT = execute_to_memory_SHIFT_RIGHT; + always @(*) begin + _zz_decode_RS2_1 = memory_REGFILE_WRITE_DATA; + if(memory_arbitration_isValid) begin + case(memory_SHIFT_CTRL) + `ShiftCtrlEnum_binary_sequential_SLL_1 : begin + _zz_decode_RS2_1 = _zz_decode_RS2_3; + end + `ShiftCtrlEnum_binary_sequential_SRL_1, `ShiftCtrlEnum_binary_sequential_SRA_1 : begin + _zz_decode_RS2_1 = memory_SHIFT_RIGHT; + end + default : begin + end + endcase + end + if(when_MulDivIterativePlugin_l128) begin + _zz_decode_RS2_1 = memory_DivPlugin_div_result; + end + if(memory_CfuPlugin_CFU_IN_FLIGHT) begin + _zz_decode_RS2_1 = CfuPlugin_bus_rsp_rsp_payload_outputs_0; + end + end + + assign memory_SHIFT_CTRL = _zz_memory_SHIFT_CTRL; + assign execute_SHIFT_CTRL = _zz_execute_SHIFT_CTRL; + assign execute_SRC_LESS_UNSIGNED = decode_to_execute_SRC_LESS_UNSIGNED; + assign execute_SRC2_FORCE_ZERO = decode_to_execute_SRC2_FORCE_ZERO; + assign execute_SRC_USE_SUB_LESS = decode_to_execute_SRC_USE_SUB_LESS; + assign _zz_execute_SRC2 = execute_PC; + assign execute_SRC2_CTRL = _zz_execute_SRC2_CTRL; + assign execute_SRC1_CTRL = _zz_execute_SRC1_CTRL; + assign decode_SRC_USE_SUB_LESS = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[3]; + assign decode_SRC_ADD_ZERO = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[20]; + assign execute_SRC_ADD_SUB = execute_SrcPlugin_addSub; + assign execute_SRC_LESS = execute_SrcPlugin_less; + assign execute_ALU_CTRL = _zz_execute_ALU_CTRL; + assign execute_SRC2 = _zz_execute_SRC2_5; + assign execute_SRC1 = _zz_execute_SRC1; + assign execute_ALU_BITWISE_CTRL = _zz_execute_ALU_BITWISE_CTRL; + assign _zz_lastStageRegFileWrite_payload_address = writeBack_INSTRUCTION; + assign _zz_lastStageRegFileWrite_valid = writeBack_REGFILE_WRITE_VALID; + always @(*) begin + _zz_1 = 1'b0; + if(lastStageRegFileWrite_valid) begin + _zz_1 = 1'b1; + end + end + + assign decode_INSTRUCTION_ANTICIPATED = (decode_arbitration_isStuck ? decode_INSTRUCTION : IBusCachedPlugin_cache_io_cpu_fetch_data); + always @(*) begin + decode_REGFILE_WRITE_VALID = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[10]; + if(when_RegFilePlugin_l63) begin + decode_REGFILE_WRITE_VALID = 1'b0; + end + end + + assign decode_LEGAL_INSTRUCTION = ({((decode_INSTRUCTION & 32'h0000005f) == 32'h00000017),{((decode_INSTRUCTION & 32'h0000007f) == 32'h0000006f),{((decode_INSTRUCTION & 32'h0000007f) == 32'h0000000b),{((decode_INSTRUCTION & _zz_decode_LEGAL_INSTRUCTION) == 32'h00000003),{(_zz_decode_LEGAL_INSTRUCTION_1 == _zz_decode_LEGAL_INSTRUCTION_2),{_zz_decode_LEGAL_INSTRUCTION_3,{_zz_decode_LEGAL_INSTRUCTION_4,_zz_decode_LEGAL_INSTRUCTION_5}}}}}}} != 22'h0); + always @(*) begin + _zz_decode_RS2_2 = writeBack_REGFILE_WRITE_DATA; + if(when_DBusCachedPlugin_l484) begin + _zz_decode_RS2_2 = writeBack_DBusCachedPlugin_rspFormated; + end + if(when_MulPlugin_l147) begin + case(switch_MulPlugin_l148) + 2'b00 : begin + _zz_decode_RS2_2 = _zz__zz_decode_RS2_2; + end + default : begin + _zz_decode_RS2_2 = _zz__zz_decode_RS2_2_1; + end + endcase + end + end + + assign writeBack_MEMORY_WR = memory_to_writeBack_MEMORY_WR; + assign writeBack_MEMORY_STORE_DATA_RF = memory_to_writeBack_MEMORY_STORE_DATA_RF; + assign writeBack_REGFILE_WRITE_DATA = memory_to_writeBack_REGFILE_WRITE_DATA; + assign writeBack_MEMORY_ENABLE = memory_to_writeBack_MEMORY_ENABLE; + assign memory_REGFILE_WRITE_DATA = execute_to_memory_REGFILE_WRITE_DATA; + assign memory_MEMORY_ENABLE = execute_to_memory_MEMORY_ENABLE; + assign execute_MEMORY_FORCE_CONSTISTENCY = decode_to_execute_MEMORY_FORCE_CONSTISTENCY; + assign execute_MEMORY_MANAGMENT = decode_to_execute_MEMORY_MANAGMENT; + assign execute_RS2 = decode_to_execute_RS2; + assign execute_MEMORY_WR = decode_to_execute_MEMORY_WR; + assign execute_SRC_ADD = execute_SrcPlugin_addSub; + assign execute_MEMORY_ENABLE = decode_to_execute_MEMORY_ENABLE; + assign execute_INSTRUCTION = decode_to_execute_INSTRUCTION; + assign decode_MEMORY_ENABLE = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[4]; + assign decode_FLUSH_ALL = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[0]; + always @(*) begin + IBusCachedPlugin_rsp_issueDetected_4 = IBusCachedPlugin_rsp_issueDetected_3; + if(when_IBusCachedPlugin_l256) begin + IBusCachedPlugin_rsp_issueDetected_4 = 1'b1; + end + end + + always @(*) begin + IBusCachedPlugin_rsp_issueDetected_3 = IBusCachedPlugin_rsp_issueDetected_2; + if(when_IBusCachedPlugin_l250) begin + IBusCachedPlugin_rsp_issueDetected_3 = 1'b1; + end + end + + always @(*) begin + IBusCachedPlugin_rsp_issueDetected_2 = IBusCachedPlugin_rsp_issueDetected_1; + if(when_IBusCachedPlugin_l244) begin + IBusCachedPlugin_rsp_issueDetected_2 = 1'b1; + end + end + + always @(*) begin + IBusCachedPlugin_rsp_issueDetected_1 = IBusCachedPlugin_rsp_issueDetected; + if(when_IBusCachedPlugin_l239) begin + IBusCachedPlugin_rsp_issueDetected_1 = 1'b1; + end + end + + assign decode_BRANCH_CTRL = _zz_decode_BRANCH_CTRL_1; + assign decode_INSTRUCTION = IBusCachedPlugin_iBusRsp_output_payload_rsp_inst; + always @(*) begin + _zz_execute_to_memory_FORMAL_PC_NEXT = execute_FORMAL_PC_NEXT; + if(BranchPlugin_jumpInterface_valid) begin + _zz_execute_to_memory_FORMAL_PC_NEXT = BranchPlugin_jumpInterface_payload; + end + end + + always @(*) begin + _zz_decode_to_execute_FORMAL_PC_NEXT = decode_FORMAL_PC_NEXT; + if(IBusCachedPlugin_predictionJumpInterface_valid) begin + _zz_decode_to_execute_FORMAL_PC_NEXT = IBusCachedPlugin_predictionJumpInterface_payload; + end + end + + assign decode_PC = IBusCachedPlugin_iBusRsp_output_payload_pc; + assign writeBack_PC = memory_to_writeBack_PC; + assign writeBack_INSTRUCTION = memory_to_writeBack_INSTRUCTION; + always @(*) begin + decode_arbitration_haltItself = 1'b0; + if(when_DBusCachedPlugin_l303) begin + decode_arbitration_haltItself = 1'b1; + end + end + + always @(*) begin + decode_arbitration_haltByOther = 1'b0; + if(when_HazardSimplePlugin_l113) begin + decode_arbitration_haltByOther = 1'b1; + end + if(CsrPlugin_pipelineLiberator_active) begin + decode_arbitration_haltByOther = 1'b1; + end + if(when_CsrPlugin_l1116) begin + decode_arbitration_haltByOther = 1'b1; + end + end + + always @(*) begin + decode_arbitration_removeIt = 1'b0; + if(_zz_when) begin + decode_arbitration_removeIt = 1'b1; + end + if(decode_arbitration_isFlushed) begin + decode_arbitration_removeIt = 1'b1; + end + end + + assign decode_arbitration_flushIt = 1'b0; + always @(*) begin + decode_arbitration_flushNext = 1'b0; + if(IBusCachedPlugin_predictionJumpInterface_valid) begin + decode_arbitration_flushNext = 1'b1; + end + if(_zz_when) begin + decode_arbitration_flushNext = 1'b1; + end + end + + always @(*) begin + execute_arbitration_haltItself = 1'b0; + if(when_DBusCachedPlugin_l343) begin + execute_arbitration_haltItself = 1'b1; + end + if(when_CsrPlugin_l1108) begin + if(when_CsrPlugin_l1110) begin + execute_arbitration_haltItself = 1'b1; + end + end + if(when_CsrPlugin_l1180) begin + if(execute_CsrPlugin_blockedBySideEffects) begin + execute_arbitration_haltItself = 1'b1; + end + end + if(when_CfuPlugin_l175) begin + execute_arbitration_haltItself = 1'b1; + end + end + + always @(*) begin + execute_arbitration_haltByOther = 1'b0; + if(when_DBusCachedPlugin_l359) begin + execute_arbitration_haltByOther = 1'b1; + end + end + + always @(*) begin + execute_arbitration_removeIt = 1'b0; + if(_zz_when_1) begin + execute_arbitration_removeIt = 1'b1; + end + if(execute_arbitration_isFlushed) begin + execute_arbitration_removeIt = 1'b1; + end + end + + assign execute_arbitration_flushIt = 1'b0; + always @(*) begin + execute_arbitration_flushNext = 1'b0; + if(BranchPlugin_jumpInterface_valid) begin + execute_arbitration_flushNext = 1'b1; + end + if(_zz_when_1) begin + execute_arbitration_flushNext = 1'b1; + end + end + + always @(*) begin + memory_arbitration_haltItself = 1'b0; + if(when_MulDivIterativePlugin_l128) begin + if(when_MulDivIterativePlugin_l129) begin + memory_arbitration_haltItself = 1'b1; + end + end + if(memory_CfuPlugin_CFU_IN_FLIGHT) begin + if(when_CfuPlugin_l208) begin + memory_arbitration_haltItself = 1'b1; + end + end + end + + assign memory_arbitration_haltByOther = 1'b0; + always @(*) begin + memory_arbitration_removeIt = 1'b0; + if(memory_arbitration_isFlushed) begin + memory_arbitration_removeIt = 1'b1; + end + end + + assign memory_arbitration_flushIt = 1'b0; + assign memory_arbitration_flushNext = 1'b0; + always @(*) begin + writeBack_arbitration_haltItself = 1'b0; + if(when_DBusCachedPlugin_l458) begin + writeBack_arbitration_haltItself = 1'b1; + end + end + + assign writeBack_arbitration_haltByOther = 1'b0; + always @(*) begin + writeBack_arbitration_removeIt = 1'b0; + if(DBusCachedPlugin_exceptionBus_valid) begin + writeBack_arbitration_removeIt = 1'b1; + end + if(writeBack_arbitration_isFlushed) begin + writeBack_arbitration_removeIt = 1'b1; + end + end + + always @(*) begin + writeBack_arbitration_flushIt = 1'b0; + if(DBusCachedPlugin_redoBranch_valid) begin + writeBack_arbitration_flushIt = 1'b1; + end + end + + always @(*) begin + writeBack_arbitration_flushNext = 1'b0; + if(DBusCachedPlugin_redoBranch_valid) begin + writeBack_arbitration_flushNext = 1'b1; + end + if(DBusCachedPlugin_exceptionBus_valid) begin + writeBack_arbitration_flushNext = 1'b1; + end + if(when_CsrPlugin_l1019) begin + writeBack_arbitration_flushNext = 1'b1; + end + if(when_CsrPlugin_l1064) begin + writeBack_arbitration_flushNext = 1'b1; + end + end + + assign lastStageInstruction = writeBack_INSTRUCTION; + assign lastStagePc = writeBack_PC; + assign lastStageIsValid = writeBack_arbitration_isValid; + assign lastStageIsFiring = writeBack_arbitration_isFiring; + always @(*) begin + IBusCachedPlugin_fetcherHalt = 1'b0; + if(when_CsrPlugin_l922) begin + IBusCachedPlugin_fetcherHalt = 1'b1; + end + if(when_CsrPlugin_l1019) begin + IBusCachedPlugin_fetcherHalt = 1'b1; + end + if(when_CsrPlugin_l1064) begin + IBusCachedPlugin_fetcherHalt = 1'b1; + end + end + + always @(*) begin + IBusCachedPlugin_incomingInstruction = 1'b0; + if(when_Fetcher_l240) begin + IBusCachedPlugin_incomingInstruction = 1'b1; + end + end + + assign CsrPlugin_csrMapping_allowCsrSignal = 1'b0; + assign CsrPlugin_csrMapping_readDataSignal = CsrPlugin_csrMapping_readDataInit; + always @(*) begin + CsrPlugin_inWfi = 1'b0; + if(when_CsrPlugin_l1108) begin + CsrPlugin_inWfi = 1'b1; + end + end + + assign CsrPlugin_thirdPartyWake = 1'b0; + always @(*) begin + CsrPlugin_jumpInterface_valid = 1'b0; + if(when_CsrPlugin_l1019) begin + CsrPlugin_jumpInterface_valid = 1'b1; + end + if(when_CsrPlugin_l1064) begin + CsrPlugin_jumpInterface_valid = 1'b1; + end + end + + always @(*) begin + CsrPlugin_jumpInterface_payload = 32'bxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx; + if(when_CsrPlugin_l1019) begin + CsrPlugin_jumpInterface_payload = {CsrPlugin_xtvec_base,2'b00}; + end + if(when_CsrPlugin_l1064) begin + case(switch_CsrPlugin_l1068) + 2'b11 : begin + CsrPlugin_jumpInterface_payload = CsrPlugin_mepc; + end + default : begin + end + endcase + end + end + + assign CsrPlugin_forceMachineWire = 1'b0; + assign CsrPlugin_allowInterrupts = 1'b1; + assign CsrPlugin_allowException = 1'b1; + assign CsrPlugin_allowEbreakException = 1'b1; + assign IBusCachedPlugin_externalFlush = ({writeBack_arbitration_flushNext,{memory_arbitration_flushNext,{execute_arbitration_flushNext,decode_arbitration_flushNext}}} != 4'b0000); + assign IBusCachedPlugin_jump_pcLoad_valid = ({CsrPlugin_jumpInterface_valid,{BranchPlugin_jumpInterface_valid,{DBusCachedPlugin_redoBranch_valid,IBusCachedPlugin_predictionJumpInterface_valid}}} != 4'b0000); + assign _zz_IBusCachedPlugin_jump_pcLoad_payload = {IBusCachedPlugin_predictionJumpInterface_valid,{BranchPlugin_jumpInterface_valid,{CsrPlugin_jumpInterface_valid,DBusCachedPlugin_redoBranch_valid}}}; + assign _zz_IBusCachedPlugin_jump_pcLoad_payload_1 = (_zz_IBusCachedPlugin_jump_pcLoad_payload & (~ _zz__zz_IBusCachedPlugin_jump_pcLoad_payload_1)); + assign _zz_IBusCachedPlugin_jump_pcLoad_payload_2 = _zz_IBusCachedPlugin_jump_pcLoad_payload_1[3]; + assign _zz_IBusCachedPlugin_jump_pcLoad_payload_3 = (_zz_IBusCachedPlugin_jump_pcLoad_payload_1[1] || _zz_IBusCachedPlugin_jump_pcLoad_payload_2); + assign _zz_IBusCachedPlugin_jump_pcLoad_payload_4 = (_zz_IBusCachedPlugin_jump_pcLoad_payload_1[2] || _zz_IBusCachedPlugin_jump_pcLoad_payload_2); + assign IBusCachedPlugin_jump_pcLoad_payload = _zz_IBusCachedPlugin_jump_pcLoad_payload_5; + always @(*) begin + IBusCachedPlugin_fetchPc_correction = 1'b0; + if(IBusCachedPlugin_fetchPc_redo_valid) begin + IBusCachedPlugin_fetchPc_correction = 1'b1; + end + if(IBusCachedPlugin_jump_pcLoad_valid) begin + IBusCachedPlugin_fetchPc_correction = 1'b1; + end + end + + assign IBusCachedPlugin_fetchPc_output_fire = (IBusCachedPlugin_fetchPc_output_valid && IBusCachedPlugin_fetchPc_output_ready); + assign IBusCachedPlugin_fetchPc_corrected = (IBusCachedPlugin_fetchPc_correction || IBusCachedPlugin_fetchPc_correctionReg); + always @(*) begin + IBusCachedPlugin_fetchPc_pcRegPropagate = 1'b0; + if(IBusCachedPlugin_iBusRsp_stages_1_input_ready) begin + IBusCachedPlugin_fetchPc_pcRegPropagate = 1'b1; + end + end + + assign when_Fetcher_l131 = (IBusCachedPlugin_fetchPc_correction || IBusCachedPlugin_fetchPc_pcRegPropagate); + assign IBusCachedPlugin_fetchPc_output_fire_1 = (IBusCachedPlugin_fetchPc_output_valid && IBusCachedPlugin_fetchPc_output_ready); + assign when_Fetcher_l131_1 = ((! IBusCachedPlugin_fetchPc_output_valid) && IBusCachedPlugin_fetchPc_output_ready); + always @(*) begin + IBusCachedPlugin_fetchPc_pc = (IBusCachedPlugin_fetchPc_pcReg + _zz_IBusCachedPlugin_fetchPc_pc); + if(IBusCachedPlugin_fetchPc_redo_valid) begin + IBusCachedPlugin_fetchPc_pc = IBusCachedPlugin_fetchPc_redo_payload; + end + if(IBusCachedPlugin_jump_pcLoad_valid) begin + IBusCachedPlugin_fetchPc_pc = IBusCachedPlugin_jump_pcLoad_payload; + end + IBusCachedPlugin_fetchPc_pc[0] = 1'b0; + IBusCachedPlugin_fetchPc_pc[1] = 1'b0; + end + + always @(*) begin + IBusCachedPlugin_fetchPc_flushed = 1'b0; + if(IBusCachedPlugin_fetchPc_redo_valid) begin + IBusCachedPlugin_fetchPc_flushed = 1'b1; + end + if(IBusCachedPlugin_jump_pcLoad_valid) begin + IBusCachedPlugin_fetchPc_flushed = 1'b1; + end + end + + assign when_Fetcher_l158 = (IBusCachedPlugin_fetchPc_booted && ((IBusCachedPlugin_fetchPc_output_ready || IBusCachedPlugin_fetchPc_correction) || IBusCachedPlugin_fetchPc_pcRegPropagate)); + assign IBusCachedPlugin_fetchPc_output_valid = ((! IBusCachedPlugin_fetcherHalt) && IBusCachedPlugin_fetchPc_booted); + assign IBusCachedPlugin_fetchPc_output_payload = IBusCachedPlugin_fetchPc_pc; + always @(*) begin + IBusCachedPlugin_iBusRsp_redoFetch = 1'b0; + if(IBusCachedPlugin_rsp_redoFetch) begin + IBusCachedPlugin_iBusRsp_redoFetch = 1'b1; + end + end + + assign IBusCachedPlugin_iBusRsp_stages_0_input_valid = IBusCachedPlugin_fetchPc_output_valid; + assign IBusCachedPlugin_fetchPc_output_ready = IBusCachedPlugin_iBusRsp_stages_0_input_ready; + assign IBusCachedPlugin_iBusRsp_stages_0_input_payload = IBusCachedPlugin_fetchPc_output_payload; + always @(*) begin + IBusCachedPlugin_iBusRsp_stages_0_halt = 1'b0; + if(IBusCachedPlugin_cache_io_cpu_prefetch_haltIt) begin + IBusCachedPlugin_iBusRsp_stages_0_halt = 1'b1; + end + end + + assign _zz_IBusCachedPlugin_iBusRsp_stages_0_input_ready = (! IBusCachedPlugin_iBusRsp_stages_0_halt); + assign IBusCachedPlugin_iBusRsp_stages_0_input_ready = (IBusCachedPlugin_iBusRsp_stages_0_output_ready && _zz_IBusCachedPlugin_iBusRsp_stages_0_input_ready); + assign IBusCachedPlugin_iBusRsp_stages_0_output_valid = (IBusCachedPlugin_iBusRsp_stages_0_input_valid && _zz_IBusCachedPlugin_iBusRsp_stages_0_input_ready); + assign IBusCachedPlugin_iBusRsp_stages_0_output_payload = IBusCachedPlugin_iBusRsp_stages_0_input_payload; + always @(*) begin + IBusCachedPlugin_iBusRsp_stages_1_halt = 1'b0; + if(IBusCachedPlugin_mmuBus_busy) begin + IBusCachedPlugin_iBusRsp_stages_1_halt = 1'b1; + end + end + + assign _zz_IBusCachedPlugin_iBusRsp_stages_1_input_ready = (! IBusCachedPlugin_iBusRsp_stages_1_halt); + assign IBusCachedPlugin_iBusRsp_stages_1_input_ready = (IBusCachedPlugin_iBusRsp_stages_1_output_ready && _zz_IBusCachedPlugin_iBusRsp_stages_1_input_ready); + assign IBusCachedPlugin_iBusRsp_stages_1_output_valid = (IBusCachedPlugin_iBusRsp_stages_1_input_valid && _zz_IBusCachedPlugin_iBusRsp_stages_1_input_ready); + assign IBusCachedPlugin_iBusRsp_stages_1_output_payload = IBusCachedPlugin_iBusRsp_stages_1_input_payload; + always @(*) begin + IBusCachedPlugin_iBusRsp_stages_2_halt = 1'b0; + if(when_IBusCachedPlugin_l267) begin + IBusCachedPlugin_iBusRsp_stages_2_halt = 1'b1; + end + end + + assign _zz_IBusCachedPlugin_iBusRsp_stages_2_input_ready = (! IBusCachedPlugin_iBusRsp_stages_2_halt); + assign IBusCachedPlugin_iBusRsp_stages_2_input_ready = (IBusCachedPlugin_iBusRsp_stages_2_output_ready && _zz_IBusCachedPlugin_iBusRsp_stages_2_input_ready); + assign IBusCachedPlugin_iBusRsp_stages_2_output_valid = (IBusCachedPlugin_iBusRsp_stages_2_input_valid && _zz_IBusCachedPlugin_iBusRsp_stages_2_input_ready); + assign IBusCachedPlugin_iBusRsp_stages_2_output_payload = IBusCachedPlugin_iBusRsp_stages_2_input_payload; + assign IBusCachedPlugin_fetchPc_redo_valid = IBusCachedPlugin_iBusRsp_redoFetch; + assign IBusCachedPlugin_fetchPc_redo_payload = IBusCachedPlugin_iBusRsp_stages_2_input_payload; + assign IBusCachedPlugin_iBusRsp_flush = ((decode_arbitration_removeIt || (decode_arbitration_flushNext && (! decode_arbitration_isStuck))) || IBusCachedPlugin_iBusRsp_redoFetch); + assign IBusCachedPlugin_iBusRsp_stages_0_output_ready = _zz_IBusCachedPlugin_iBusRsp_stages_0_output_ready; + assign _zz_IBusCachedPlugin_iBusRsp_stages_0_output_ready = ((1'b0 && (! _zz_IBusCachedPlugin_iBusRsp_stages_0_output_ready_1)) || IBusCachedPlugin_iBusRsp_stages_1_input_ready); + assign _zz_IBusCachedPlugin_iBusRsp_stages_0_output_ready_1 = _zz_IBusCachedPlugin_iBusRsp_stages_0_output_ready_2; + assign IBusCachedPlugin_iBusRsp_stages_1_input_valid = _zz_IBusCachedPlugin_iBusRsp_stages_0_output_ready_1; + assign IBusCachedPlugin_iBusRsp_stages_1_input_payload = IBusCachedPlugin_fetchPc_pcReg; + assign IBusCachedPlugin_iBusRsp_stages_1_output_ready = ((1'b0 && (! IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_valid)) || IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_ready); + assign IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_valid = _zz_IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_valid; + assign IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_payload = _zz_IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_payload; + assign IBusCachedPlugin_iBusRsp_stages_2_input_valid = IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_valid; + assign IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_ready = IBusCachedPlugin_iBusRsp_stages_2_input_ready; + assign IBusCachedPlugin_iBusRsp_stages_2_input_payload = IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_payload; + always @(*) begin + IBusCachedPlugin_iBusRsp_readyForError = 1'b1; + if(when_Fetcher_l320) begin + IBusCachedPlugin_iBusRsp_readyForError = 1'b0; + end + end + + assign when_Fetcher_l240 = (IBusCachedPlugin_iBusRsp_stages_1_input_valid || IBusCachedPlugin_iBusRsp_stages_2_input_valid); + assign when_Fetcher_l320 = (! IBusCachedPlugin_pcValids_0); + assign when_Fetcher_l329 = (! (! IBusCachedPlugin_iBusRsp_stages_1_input_ready)); + assign when_Fetcher_l329_1 = (! (! IBusCachedPlugin_iBusRsp_stages_2_input_ready)); + assign when_Fetcher_l329_2 = (! execute_arbitration_isStuck); + assign when_Fetcher_l329_3 = (! memory_arbitration_isStuck); + assign when_Fetcher_l329_4 = (! writeBack_arbitration_isStuck); + assign IBusCachedPlugin_pcValids_0 = IBusCachedPlugin_injector_nextPcCalc_valids_1; + assign IBusCachedPlugin_pcValids_1 = IBusCachedPlugin_injector_nextPcCalc_valids_2; + assign IBusCachedPlugin_pcValids_2 = IBusCachedPlugin_injector_nextPcCalc_valids_3; + assign IBusCachedPlugin_pcValids_3 = IBusCachedPlugin_injector_nextPcCalc_valids_4; + assign IBusCachedPlugin_iBusRsp_output_ready = (! decode_arbitration_isStuck); + assign decode_arbitration_isValid = IBusCachedPlugin_iBusRsp_output_valid; + assign _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch = _zz__zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch[11]; + always @(*) begin + _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_1[18] = _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch; + _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_1[17] = _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch; + _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_1[16] = _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch; + _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_1[15] = _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch; + _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_1[14] = _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch; + _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_1[13] = _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch; + _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_1[12] = _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch; + _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_1[11] = _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch; + _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_1[10] = _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch; + _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_1[9] = _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch; + _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_1[8] = _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch; + _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_1[7] = _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch; + _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_1[6] = _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch; + _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_1[5] = _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch; + _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_1[4] = _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch; + _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_1[3] = _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch; + _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_1[2] = _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch; + _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_1[1] = _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch; + _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_1[0] = _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch; + end + + always @(*) begin + IBusCachedPlugin_decodePrediction_cmd_hadBranch = ((decode_BRANCH_CTRL == `BranchCtrlEnum_binary_sequential_JAL) || ((decode_BRANCH_CTRL == `BranchCtrlEnum_binary_sequential_B) && _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_2[31])); + if(_zz_6) begin + IBusCachedPlugin_decodePrediction_cmd_hadBranch = 1'b0; + end + end + + assign _zz_2 = _zz__zz_2[19]; + always @(*) begin + _zz_3[10] = _zz_2; + _zz_3[9] = _zz_2; + _zz_3[8] = _zz_2; + _zz_3[7] = _zz_2; + _zz_3[6] = _zz_2; + _zz_3[5] = _zz_2; + _zz_3[4] = _zz_2; + _zz_3[3] = _zz_2; + _zz_3[2] = _zz_2; + _zz_3[1] = _zz_2; + _zz_3[0] = _zz_2; + end + + assign _zz_4 = _zz__zz_4[11]; + always @(*) begin + _zz_5[18] = _zz_4; + _zz_5[17] = _zz_4; + _zz_5[16] = _zz_4; + _zz_5[15] = _zz_4; + _zz_5[14] = _zz_4; + _zz_5[13] = _zz_4; + _zz_5[12] = _zz_4; + _zz_5[11] = _zz_4; + _zz_5[10] = _zz_4; + _zz_5[9] = _zz_4; + _zz_5[8] = _zz_4; + _zz_5[7] = _zz_4; + _zz_5[6] = _zz_4; + _zz_5[5] = _zz_4; + _zz_5[4] = _zz_4; + _zz_5[3] = _zz_4; + _zz_5[2] = _zz_4; + _zz_5[1] = _zz_4; + _zz_5[0] = _zz_4; + end + + always @(*) begin + case(decode_BRANCH_CTRL) + `BranchCtrlEnum_binary_sequential_JAL : begin + _zz_6 = _zz__zz_6[1]; + end + default : begin + _zz_6 = _zz__zz_6_1[1]; + end + endcase + end + + assign IBusCachedPlugin_predictionJumpInterface_valid = (decode_arbitration_isValid && IBusCachedPlugin_decodePrediction_cmd_hadBranch); + assign _zz_IBusCachedPlugin_predictionJumpInterface_payload = _zz__zz_IBusCachedPlugin_predictionJumpInterface_payload[19]; + always @(*) begin + _zz_IBusCachedPlugin_predictionJumpInterface_payload_1[10] = _zz_IBusCachedPlugin_predictionJumpInterface_payload; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_1[9] = _zz_IBusCachedPlugin_predictionJumpInterface_payload; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_1[8] = _zz_IBusCachedPlugin_predictionJumpInterface_payload; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_1[7] = _zz_IBusCachedPlugin_predictionJumpInterface_payload; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_1[6] = _zz_IBusCachedPlugin_predictionJumpInterface_payload; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_1[5] = _zz_IBusCachedPlugin_predictionJumpInterface_payload; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_1[4] = _zz_IBusCachedPlugin_predictionJumpInterface_payload; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_1[3] = _zz_IBusCachedPlugin_predictionJumpInterface_payload; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_1[2] = _zz_IBusCachedPlugin_predictionJumpInterface_payload; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_1[1] = _zz_IBusCachedPlugin_predictionJumpInterface_payload; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_1[0] = _zz_IBusCachedPlugin_predictionJumpInterface_payload; + end + + assign _zz_IBusCachedPlugin_predictionJumpInterface_payload_2 = _zz__zz_IBusCachedPlugin_predictionJumpInterface_payload_2[11]; + always @(*) begin + _zz_IBusCachedPlugin_predictionJumpInterface_payload_3[18] = _zz_IBusCachedPlugin_predictionJumpInterface_payload_2; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_3[17] = _zz_IBusCachedPlugin_predictionJumpInterface_payload_2; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_3[16] = _zz_IBusCachedPlugin_predictionJumpInterface_payload_2; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_3[15] = _zz_IBusCachedPlugin_predictionJumpInterface_payload_2; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_3[14] = _zz_IBusCachedPlugin_predictionJumpInterface_payload_2; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_3[13] = _zz_IBusCachedPlugin_predictionJumpInterface_payload_2; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_3[12] = _zz_IBusCachedPlugin_predictionJumpInterface_payload_2; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_3[11] = _zz_IBusCachedPlugin_predictionJumpInterface_payload_2; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_3[10] = _zz_IBusCachedPlugin_predictionJumpInterface_payload_2; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_3[9] = _zz_IBusCachedPlugin_predictionJumpInterface_payload_2; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_3[8] = _zz_IBusCachedPlugin_predictionJumpInterface_payload_2; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_3[7] = _zz_IBusCachedPlugin_predictionJumpInterface_payload_2; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_3[6] = _zz_IBusCachedPlugin_predictionJumpInterface_payload_2; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_3[5] = _zz_IBusCachedPlugin_predictionJumpInterface_payload_2; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_3[4] = _zz_IBusCachedPlugin_predictionJumpInterface_payload_2; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_3[3] = _zz_IBusCachedPlugin_predictionJumpInterface_payload_2; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_3[2] = _zz_IBusCachedPlugin_predictionJumpInterface_payload_2; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_3[1] = _zz_IBusCachedPlugin_predictionJumpInterface_payload_2; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_3[0] = _zz_IBusCachedPlugin_predictionJumpInterface_payload_2; + end + + assign IBusCachedPlugin_predictionJumpInterface_payload = (decode_PC + ((decode_BRANCH_CTRL == `BranchCtrlEnum_binary_sequential_JAL) ? {{_zz_IBusCachedPlugin_predictionJumpInterface_payload_1,{{{_zz_IBusCachedPlugin_predictionJumpInterface_payload_4,decode_INSTRUCTION[19 : 12]},decode_INSTRUCTION[20]},decode_INSTRUCTION[30 : 21]}},1'b0} : {{_zz_IBusCachedPlugin_predictionJumpInterface_payload_3,{{{_zz_IBusCachedPlugin_predictionJumpInterface_payload_5,_zz_IBusCachedPlugin_predictionJumpInterface_payload_6},decode_INSTRUCTION[30 : 25]},decode_INSTRUCTION[11 : 8]}},1'b0})); + assign iBus_cmd_valid = IBusCachedPlugin_cache_io_mem_cmd_valid; + always @(*) begin + iBus_cmd_payload_address = IBusCachedPlugin_cache_io_mem_cmd_payload_address; + iBus_cmd_payload_address = IBusCachedPlugin_cache_io_mem_cmd_payload_address; + end + + assign iBus_cmd_payload_size = IBusCachedPlugin_cache_io_mem_cmd_payload_size; + assign IBusCachedPlugin_s0_tightlyCoupledHit = 1'b0; + assign IBusCachedPlugin_cache_io_cpu_prefetch_isValid = (IBusCachedPlugin_iBusRsp_stages_0_input_valid && (! IBusCachedPlugin_s0_tightlyCoupledHit)); + assign IBusCachedPlugin_cache_io_cpu_fetch_isValid = (IBusCachedPlugin_iBusRsp_stages_1_input_valid && (! IBusCachedPlugin_s1_tightlyCoupledHit)); + assign IBusCachedPlugin_cache_io_cpu_fetch_isStuck = (! IBusCachedPlugin_iBusRsp_stages_1_input_ready); + assign IBusCachedPlugin_mmuBus_cmd_0_isValid = IBusCachedPlugin_cache_io_cpu_fetch_isValid; + assign IBusCachedPlugin_mmuBus_cmd_0_isStuck = (! IBusCachedPlugin_iBusRsp_stages_1_input_ready); + assign IBusCachedPlugin_mmuBus_cmd_0_virtualAddress = IBusCachedPlugin_iBusRsp_stages_1_input_payload; + assign IBusCachedPlugin_mmuBus_cmd_0_bypassTranslation = 1'b0; + assign IBusCachedPlugin_mmuBus_end = (IBusCachedPlugin_iBusRsp_stages_1_input_ready || IBusCachedPlugin_externalFlush); + assign IBusCachedPlugin_cache_io_cpu_decode_isValid = (IBusCachedPlugin_iBusRsp_stages_2_input_valid && (! IBusCachedPlugin_s2_tightlyCoupledHit)); + assign IBusCachedPlugin_cache_io_cpu_decode_isStuck = (! IBusCachedPlugin_iBusRsp_stages_2_input_ready); + assign IBusCachedPlugin_cache_io_cpu_decode_isUser = (CsrPlugin_privilege == 2'b00); + assign IBusCachedPlugin_rsp_iBusRspOutputHalt = 1'b0; + assign IBusCachedPlugin_rsp_issueDetected = 1'b0; + always @(*) begin + IBusCachedPlugin_rsp_redoFetch = 1'b0; + if(when_IBusCachedPlugin_l239) begin + IBusCachedPlugin_rsp_redoFetch = 1'b1; + end + if(when_IBusCachedPlugin_l250) begin + IBusCachedPlugin_rsp_redoFetch = 1'b1; + end + end + + always @(*) begin + IBusCachedPlugin_cache_io_cpu_fill_valid = (IBusCachedPlugin_rsp_redoFetch && (! IBusCachedPlugin_cache_io_cpu_decode_mmuRefilling)); + if(when_IBusCachedPlugin_l250) begin + IBusCachedPlugin_cache_io_cpu_fill_valid = 1'b1; + end + end + + always @(*) begin + IBusCachedPlugin_decodeExceptionPort_valid = 1'b0; + if(when_IBusCachedPlugin_l244) begin + IBusCachedPlugin_decodeExceptionPort_valid = IBusCachedPlugin_iBusRsp_readyForError; + end + if(when_IBusCachedPlugin_l256) begin + IBusCachedPlugin_decodeExceptionPort_valid = IBusCachedPlugin_iBusRsp_readyForError; + end + end + + always @(*) begin + IBusCachedPlugin_decodeExceptionPort_payload_code = 4'bxxxx; + if(when_IBusCachedPlugin_l244) begin + IBusCachedPlugin_decodeExceptionPort_payload_code = 4'b1100; + end + if(when_IBusCachedPlugin_l256) begin + IBusCachedPlugin_decodeExceptionPort_payload_code = 4'b0001; + end + end + + assign IBusCachedPlugin_decodeExceptionPort_payload_badAddr = {IBusCachedPlugin_iBusRsp_stages_2_input_payload[31 : 2],2'b00}; + assign when_IBusCachedPlugin_l239 = ((IBusCachedPlugin_cache_io_cpu_decode_isValid && IBusCachedPlugin_cache_io_cpu_decode_mmuRefilling) && (! IBusCachedPlugin_rsp_issueDetected)); + assign when_IBusCachedPlugin_l244 = ((IBusCachedPlugin_cache_io_cpu_decode_isValid && IBusCachedPlugin_cache_io_cpu_decode_mmuException) && (! IBusCachedPlugin_rsp_issueDetected_1)); + assign when_IBusCachedPlugin_l250 = ((IBusCachedPlugin_cache_io_cpu_decode_isValid && IBusCachedPlugin_cache_io_cpu_decode_cacheMiss) && (! IBusCachedPlugin_rsp_issueDetected_2)); + assign when_IBusCachedPlugin_l256 = ((IBusCachedPlugin_cache_io_cpu_decode_isValid && IBusCachedPlugin_cache_io_cpu_decode_error) && (! IBusCachedPlugin_rsp_issueDetected_3)); + assign when_IBusCachedPlugin_l267 = (IBusCachedPlugin_rsp_issueDetected_4 || IBusCachedPlugin_rsp_iBusRspOutputHalt); + assign IBusCachedPlugin_iBusRsp_output_valid = IBusCachedPlugin_iBusRsp_stages_2_output_valid; + assign IBusCachedPlugin_iBusRsp_stages_2_output_ready = IBusCachedPlugin_iBusRsp_output_ready; + assign IBusCachedPlugin_iBusRsp_output_payload_rsp_inst = IBusCachedPlugin_cache_io_cpu_decode_data; + assign IBusCachedPlugin_iBusRsp_output_payload_pc = IBusCachedPlugin_iBusRsp_stages_2_output_payload; + assign IBusCachedPlugin_cache_io_flush = (decode_arbitration_isValid && decode_FLUSH_ALL); + assign dataCache_1_io_mem_cmd_ready = (! dataCache_1_io_mem_cmd_rValid); + assign dataCache_1_io_mem_cmd_s2mPipe_valid = (dataCache_1_io_mem_cmd_valid || dataCache_1_io_mem_cmd_rValid); + assign dataCache_1_io_mem_cmd_s2mPipe_payload_wr = (dataCache_1_io_mem_cmd_rValid ? dataCache_1_io_mem_cmd_rData_wr : dataCache_1_io_mem_cmd_payload_wr); + assign dataCache_1_io_mem_cmd_s2mPipe_payload_uncached = (dataCache_1_io_mem_cmd_rValid ? dataCache_1_io_mem_cmd_rData_uncached : dataCache_1_io_mem_cmd_payload_uncached); + assign dataCache_1_io_mem_cmd_s2mPipe_payload_address = (dataCache_1_io_mem_cmd_rValid ? dataCache_1_io_mem_cmd_rData_address : dataCache_1_io_mem_cmd_payload_address); + assign dataCache_1_io_mem_cmd_s2mPipe_payload_data = (dataCache_1_io_mem_cmd_rValid ? dataCache_1_io_mem_cmd_rData_data : dataCache_1_io_mem_cmd_payload_data); + assign dataCache_1_io_mem_cmd_s2mPipe_payload_mask = (dataCache_1_io_mem_cmd_rValid ? dataCache_1_io_mem_cmd_rData_mask : dataCache_1_io_mem_cmd_payload_mask); + assign dataCache_1_io_mem_cmd_s2mPipe_payload_size = (dataCache_1_io_mem_cmd_rValid ? dataCache_1_io_mem_cmd_rData_size : dataCache_1_io_mem_cmd_payload_size); + assign dataCache_1_io_mem_cmd_s2mPipe_payload_last = (dataCache_1_io_mem_cmd_rValid ? dataCache_1_io_mem_cmd_rData_last : dataCache_1_io_mem_cmd_payload_last); + always @(*) begin + dataCache_1_io_mem_cmd_s2mPipe_ready = dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_ready; + if(when_Stream_l342) begin + dataCache_1_io_mem_cmd_s2mPipe_ready = 1'b1; + end + end + + assign when_Stream_l342 = (! dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_valid); + assign dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_valid = dataCache_1_io_mem_cmd_s2mPipe_rValid; + assign dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_payload_wr = dataCache_1_io_mem_cmd_s2mPipe_rData_wr; + assign dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_payload_uncached = dataCache_1_io_mem_cmd_s2mPipe_rData_uncached; + assign dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_payload_address = dataCache_1_io_mem_cmd_s2mPipe_rData_address; + assign dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_payload_data = dataCache_1_io_mem_cmd_s2mPipe_rData_data; + assign dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_payload_mask = dataCache_1_io_mem_cmd_s2mPipe_rData_mask; + assign dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_payload_size = dataCache_1_io_mem_cmd_s2mPipe_rData_size; + assign dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_payload_last = dataCache_1_io_mem_cmd_s2mPipe_rData_last; + assign dBus_cmd_valid = dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_valid; + assign dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_ready = dBus_cmd_ready; + assign dBus_cmd_payload_wr = dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_payload_wr; + assign dBus_cmd_payload_uncached = dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_payload_uncached; + assign dBus_cmd_payload_address = dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_payload_address; + assign dBus_cmd_payload_data = dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_payload_data; + assign dBus_cmd_payload_mask = dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_payload_mask; + assign dBus_cmd_payload_size = dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_payload_size; + assign dBus_cmd_payload_last = dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_payload_last; + assign when_DBusCachedPlugin_l303 = ((DBusCachedPlugin_mmuBus_busy && decode_arbitration_isValid) && decode_MEMORY_ENABLE); + assign execute_DBusCachedPlugin_size = execute_INSTRUCTION[13 : 12]; + assign dataCache_1_io_cpu_execute_isValid = (execute_arbitration_isValid && execute_MEMORY_ENABLE); + assign dataCache_1_io_cpu_execute_address = execute_SRC_ADD; + always @(*) begin + case(execute_DBusCachedPlugin_size) + 2'b00 : begin + _zz_execute_MEMORY_STORE_DATA_RF = {{{execute_RS2[7 : 0],execute_RS2[7 : 0]},execute_RS2[7 : 0]},execute_RS2[7 : 0]}; + end + 2'b01 : begin + _zz_execute_MEMORY_STORE_DATA_RF = {execute_RS2[15 : 0],execute_RS2[15 : 0]}; + end + default : begin + _zz_execute_MEMORY_STORE_DATA_RF = execute_RS2[31 : 0]; + end + endcase + end + + assign dataCache_1_io_cpu_flush_valid = (execute_arbitration_isValid && execute_MEMORY_MANAGMENT); + assign dataCache_1_io_cpu_flush_isStall = (dataCache_1_io_cpu_flush_valid && (! dataCache_1_io_cpu_flush_ready)); + assign when_DBusCachedPlugin_l343 = (dataCache_1_io_cpu_flush_isStall || dataCache_1_io_cpu_execute_haltIt); + assign when_DBusCachedPlugin_l359 = (dataCache_1_io_cpu_execute_refilling && execute_arbitration_isValid); + assign dataCache_1_io_cpu_memory_isValid = (memory_arbitration_isValid && memory_MEMORY_ENABLE); + assign dataCache_1_io_cpu_memory_address = memory_REGFILE_WRITE_DATA; + assign DBusCachedPlugin_mmuBus_cmd_0_isValid = dataCache_1_io_cpu_memory_isValid; + assign DBusCachedPlugin_mmuBus_cmd_0_isStuck = memory_arbitration_isStuck; + assign DBusCachedPlugin_mmuBus_cmd_0_virtualAddress = dataCache_1_io_cpu_memory_address; + assign DBusCachedPlugin_mmuBus_cmd_0_bypassTranslation = 1'b0; + assign DBusCachedPlugin_mmuBus_end = ((! memory_arbitration_isStuck) || memory_arbitration_removeIt); + always @(*) begin + dataCache_1_io_cpu_memory_mmuRsp_isIoAccess = DBusCachedPlugin_mmuBus_rsp_isIoAccess; + if(when_DBusCachedPlugin_l386) begin + dataCache_1_io_cpu_memory_mmuRsp_isIoAccess = 1'b1; + end + end + + assign when_DBusCachedPlugin_l386 = (1'b0 && (! dataCache_1_io_cpu_memory_isWrite)); + always @(*) begin + dataCache_1_io_cpu_writeBack_isValid = (writeBack_arbitration_isValid && writeBack_MEMORY_ENABLE); + if(writeBack_arbitration_haltByOther) begin + dataCache_1_io_cpu_writeBack_isValid = 1'b0; + end + end + + assign dataCache_1_io_cpu_writeBack_isUser = (CsrPlugin_privilege == 2'b00); + assign dataCache_1_io_cpu_writeBack_address = writeBack_REGFILE_WRITE_DATA; + assign dataCache_1_io_cpu_writeBack_storeData[31 : 0] = writeBack_MEMORY_STORE_DATA_RF; + always @(*) begin + DBusCachedPlugin_redoBranch_valid = 1'b0; + if(when_DBusCachedPlugin_l438) begin + if(dataCache_1_io_cpu_redo) begin + DBusCachedPlugin_redoBranch_valid = 1'b1; + end + end + end + + assign DBusCachedPlugin_redoBranch_payload = writeBack_PC; + always @(*) begin + DBusCachedPlugin_exceptionBus_valid = 1'b0; + if(when_DBusCachedPlugin_l438) begin + if(dataCache_1_io_cpu_writeBack_accessError) begin + DBusCachedPlugin_exceptionBus_valid = 1'b1; + end + if(dataCache_1_io_cpu_writeBack_mmuException) begin + DBusCachedPlugin_exceptionBus_valid = 1'b1; + end + if(dataCache_1_io_cpu_writeBack_unalignedAccess) begin + DBusCachedPlugin_exceptionBus_valid = 1'b1; + end + if(dataCache_1_io_cpu_redo) begin + DBusCachedPlugin_exceptionBus_valid = 1'b0; + end + end + end + + assign DBusCachedPlugin_exceptionBus_payload_badAddr = writeBack_REGFILE_WRITE_DATA; + always @(*) begin + DBusCachedPlugin_exceptionBus_payload_code = 4'bxxxx; + if(when_DBusCachedPlugin_l438) begin + if(dataCache_1_io_cpu_writeBack_accessError) begin + DBusCachedPlugin_exceptionBus_payload_code = {1'd0, _zz_DBusCachedPlugin_exceptionBus_payload_code}; + end + if(dataCache_1_io_cpu_writeBack_mmuException) begin + DBusCachedPlugin_exceptionBus_payload_code = (writeBack_MEMORY_WR ? 4'b1111 : 4'b1101); + end + if(dataCache_1_io_cpu_writeBack_unalignedAccess) begin + DBusCachedPlugin_exceptionBus_payload_code = {1'd0, _zz_DBusCachedPlugin_exceptionBus_payload_code_1}; + end + end + end + + assign when_DBusCachedPlugin_l438 = (writeBack_arbitration_isValid && writeBack_MEMORY_ENABLE); + assign when_DBusCachedPlugin_l458 = (dataCache_1_io_cpu_writeBack_isValid && dataCache_1_io_cpu_writeBack_haltIt); + assign writeBack_DBusCachedPlugin_rspSplits_0 = dataCache_1_io_cpu_writeBack_data[7 : 0]; + assign writeBack_DBusCachedPlugin_rspSplits_1 = dataCache_1_io_cpu_writeBack_data[15 : 8]; + assign writeBack_DBusCachedPlugin_rspSplits_2 = dataCache_1_io_cpu_writeBack_data[23 : 16]; + assign writeBack_DBusCachedPlugin_rspSplits_3 = dataCache_1_io_cpu_writeBack_data[31 : 24]; + always @(*) begin + writeBack_DBusCachedPlugin_rspShifted[7 : 0] = _zz_writeBack_DBusCachedPlugin_rspShifted; + writeBack_DBusCachedPlugin_rspShifted[15 : 8] = _zz_writeBack_DBusCachedPlugin_rspShifted_2; + writeBack_DBusCachedPlugin_rspShifted[23 : 16] = writeBack_DBusCachedPlugin_rspSplits_2; + writeBack_DBusCachedPlugin_rspShifted[31 : 24] = writeBack_DBusCachedPlugin_rspSplits_3; + end + + assign writeBack_DBusCachedPlugin_rspRf = writeBack_DBusCachedPlugin_rspShifted[31 : 0]; + assign switch_Misc_l200 = writeBack_INSTRUCTION[13 : 12]; + assign _zz_writeBack_DBusCachedPlugin_rspFormated = (writeBack_DBusCachedPlugin_rspRf[7] && (! writeBack_INSTRUCTION[14])); + always @(*) begin + _zz_writeBack_DBusCachedPlugin_rspFormated_1[31] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[30] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[29] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[28] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[27] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[26] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[25] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[24] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[23] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[22] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[21] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[20] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[19] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[18] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[17] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[16] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[15] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[14] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[13] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[12] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[11] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[10] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[9] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[8] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[7 : 0] = writeBack_DBusCachedPlugin_rspRf[7 : 0]; + end + + assign _zz_writeBack_DBusCachedPlugin_rspFormated_2 = (writeBack_DBusCachedPlugin_rspRf[15] && (! writeBack_INSTRUCTION[14])); + always @(*) begin + _zz_writeBack_DBusCachedPlugin_rspFormated_3[31] = _zz_writeBack_DBusCachedPlugin_rspFormated_2; + _zz_writeBack_DBusCachedPlugin_rspFormated_3[30] = _zz_writeBack_DBusCachedPlugin_rspFormated_2; + _zz_writeBack_DBusCachedPlugin_rspFormated_3[29] = _zz_writeBack_DBusCachedPlugin_rspFormated_2; + _zz_writeBack_DBusCachedPlugin_rspFormated_3[28] = _zz_writeBack_DBusCachedPlugin_rspFormated_2; + _zz_writeBack_DBusCachedPlugin_rspFormated_3[27] = _zz_writeBack_DBusCachedPlugin_rspFormated_2; + _zz_writeBack_DBusCachedPlugin_rspFormated_3[26] = _zz_writeBack_DBusCachedPlugin_rspFormated_2; + _zz_writeBack_DBusCachedPlugin_rspFormated_3[25] = _zz_writeBack_DBusCachedPlugin_rspFormated_2; + _zz_writeBack_DBusCachedPlugin_rspFormated_3[24] = _zz_writeBack_DBusCachedPlugin_rspFormated_2; + _zz_writeBack_DBusCachedPlugin_rspFormated_3[23] = _zz_writeBack_DBusCachedPlugin_rspFormated_2; + _zz_writeBack_DBusCachedPlugin_rspFormated_3[22] = _zz_writeBack_DBusCachedPlugin_rspFormated_2; + _zz_writeBack_DBusCachedPlugin_rspFormated_3[21] = _zz_writeBack_DBusCachedPlugin_rspFormated_2; + _zz_writeBack_DBusCachedPlugin_rspFormated_3[20] = _zz_writeBack_DBusCachedPlugin_rspFormated_2; + _zz_writeBack_DBusCachedPlugin_rspFormated_3[19] = _zz_writeBack_DBusCachedPlugin_rspFormated_2; + _zz_writeBack_DBusCachedPlugin_rspFormated_3[18] = _zz_writeBack_DBusCachedPlugin_rspFormated_2; + _zz_writeBack_DBusCachedPlugin_rspFormated_3[17] = _zz_writeBack_DBusCachedPlugin_rspFormated_2; + _zz_writeBack_DBusCachedPlugin_rspFormated_3[16] = _zz_writeBack_DBusCachedPlugin_rspFormated_2; + _zz_writeBack_DBusCachedPlugin_rspFormated_3[15 : 0] = writeBack_DBusCachedPlugin_rspRf[15 : 0]; + end + + always @(*) begin + case(switch_Misc_l200) + 2'b00 : begin + writeBack_DBusCachedPlugin_rspFormated = _zz_writeBack_DBusCachedPlugin_rspFormated_1; + end + 2'b01 : begin + writeBack_DBusCachedPlugin_rspFormated = _zz_writeBack_DBusCachedPlugin_rspFormated_3; + end + default : begin + writeBack_DBusCachedPlugin_rspFormated = writeBack_DBusCachedPlugin_rspRf; + end + endcase + end + + assign when_DBusCachedPlugin_l484 = (writeBack_arbitration_isValid && writeBack_MEMORY_ENABLE); + assign IBusCachedPlugin_mmuBus_rsp_physicalAddress = IBusCachedPlugin_mmuBus_cmd_0_virtualAddress; + assign IBusCachedPlugin_mmuBus_rsp_allowRead = 1'b1; + assign IBusCachedPlugin_mmuBus_rsp_allowWrite = 1'b1; + assign IBusCachedPlugin_mmuBus_rsp_allowExecute = 1'b1; + assign IBusCachedPlugin_mmuBus_rsp_isIoAccess = IBusCachedPlugin_mmuBus_rsp_physicalAddress[31]; + assign IBusCachedPlugin_mmuBus_rsp_isPaging = 1'b0; + assign IBusCachedPlugin_mmuBus_rsp_exception = 1'b0; + assign IBusCachedPlugin_mmuBus_rsp_refilling = 1'b0; + assign IBusCachedPlugin_mmuBus_busy = 1'b0; + assign DBusCachedPlugin_mmuBus_rsp_physicalAddress = DBusCachedPlugin_mmuBus_cmd_0_virtualAddress; + assign DBusCachedPlugin_mmuBus_rsp_allowRead = 1'b1; + assign DBusCachedPlugin_mmuBus_rsp_allowWrite = 1'b1; + assign DBusCachedPlugin_mmuBus_rsp_allowExecute = 1'b1; + assign DBusCachedPlugin_mmuBus_rsp_isIoAccess = DBusCachedPlugin_mmuBus_rsp_physicalAddress[31]; + assign DBusCachedPlugin_mmuBus_rsp_isPaging = 1'b0; + assign DBusCachedPlugin_mmuBus_rsp_exception = 1'b0; + assign DBusCachedPlugin_mmuBus_rsp_refilling = 1'b0; + assign DBusCachedPlugin_mmuBus_busy = 1'b0; + assign _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_3 = ((decode_INSTRUCTION & 32'h00004050) == 32'h00004050); + assign _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_4 = ((decode_INSTRUCTION & 32'h00000004) == 32'h00000004); + assign _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_5 = ((decode_INSTRUCTION & 32'h00000048) == 32'h00000048); + assign _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_6 = ((decode_INSTRUCTION & 32'h0000000c) == 32'h00000008); + assign _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_7 = ((decode_INSTRUCTION & 32'h00001000) == 32'h0); + assign _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2 = {1'b0,{(_zz_decode_CfuPlugin_CFU_INPUT_2_KIND_6 != 1'b0),{(_zz_decode_CfuPlugin_CFU_INPUT_2_KIND_7 != 1'b0),{(_zz_decode_CfuPlugin_CFU_INPUT_2_KIND_7 != 1'b0),{(_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2 != _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_1),{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_2,{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_4,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_7}}}}}}}; + assign _zz_decode_SRC1_CTRL_2 = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[2 : 1]; + assign _zz_decode_SRC1_CTRL_1 = _zz_decode_SRC1_CTRL_2; + assign _zz_decode_ALU_CTRL_2 = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[7 : 6]; + assign _zz_decode_ALU_CTRL_1 = _zz_decode_ALU_CTRL_2; + assign _zz_decode_SRC2_CTRL_2 = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[9 : 8]; + assign _zz_decode_SRC2_CTRL_1 = _zz_decode_SRC2_CTRL_2; + assign _zz_decode_ALU_BITWISE_CTRL_2 = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[19 : 18]; + assign _zz_decode_ALU_BITWISE_CTRL_1 = _zz_decode_ALU_BITWISE_CTRL_2; + assign _zz_decode_SHIFT_CTRL_2 = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[22 : 21]; + assign _zz_decode_SHIFT_CTRL_1 = _zz_decode_SHIFT_CTRL_2; + assign _zz_decode_BRANCH_CTRL_2 = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[24 : 23]; + assign _zz_decode_BRANCH_CTRL = _zz_decode_BRANCH_CTRL_2; + assign _zz_decode_ENV_CTRL_2 = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[27 : 26]; + assign _zz_decode_ENV_CTRL_1 = _zz_decode_ENV_CTRL_2; + assign _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_8 = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[33 : 33]; + assign _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_1 = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_8; + assign decodeExceptionPort_valid = (decode_arbitration_isValid && (! decode_LEGAL_INSTRUCTION)); + assign decodeExceptionPort_payload_code = 4'b0010; + assign decodeExceptionPort_payload_badAddr = decode_INSTRUCTION; + assign when_RegFilePlugin_l63 = (decode_INSTRUCTION[11 : 7] == 5'h0); + assign decode_RegFilePlugin_regFileReadAddress1 = decode_INSTRUCTION_ANTICIPATED[19 : 15]; + assign decode_RegFilePlugin_regFileReadAddress2 = decode_INSTRUCTION_ANTICIPATED[24 : 20]; + assign decode_RegFilePlugin_rs1Data = _zz_RegFilePlugin_regFile_port0; + assign decode_RegFilePlugin_rs2Data = _zz_RegFilePlugin_regFile_port1; + always @(*) begin + lastStageRegFileWrite_valid = (_zz_lastStageRegFileWrite_valid && writeBack_arbitration_isFiring); + if(_zz_7) begin + lastStageRegFileWrite_valid = 1'b1; + end + end + + always @(*) begin + lastStageRegFileWrite_payload_address = _zz_lastStageRegFileWrite_payload_address[11 : 7]; + if(_zz_7) begin + lastStageRegFileWrite_payload_address = 5'h0; + end + end + + always @(*) begin + lastStageRegFileWrite_payload_data = _zz_decode_RS2_2; + if(_zz_7) begin + lastStageRegFileWrite_payload_data = 32'h0; + end + end + + always @(*) begin + case(execute_ALU_BITWISE_CTRL) + `AluBitwiseCtrlEnum_binary_sequential_AND_1 : begin + execute_IntAluPlugin_bitwise = (execute_SRC1 & execute_SRC2); + end + `AluBitwiseCtrlEnum_binary_sequential_OR_1 : begin + execute_IntAluPlugin_bitwise = (execute_SRC1 | execute_SRC2); + end + default : begin + execute_IntAluPlugin_bitwise = (execute_SRC1 ^ execute_SRC2); + end + endcase + end + + always @(*) begin + case(execute_ALU_CTRL) + `AluCtrlEnum_binary_sequential_BITWISE : begin + _zz_execute_REGFILE_WRITE_DATA = execute_IntAluPlugin_bitwise; + end + `AluCtrlEnum_binary_sequential_SLT_SLTU : begin + _zz_execute_REGFILE_WRITE_DATA = {31'd0, _zz__zz_execute_REGFILE_WRITE_DATA}; + end + default : begin + _zz_execute_REGFILE_WRITE_DATA = execute_SRC_ADD_SUB; + end + endcase + end + + always @(*) begin + case(execute_SRC1_CTRL) + `Src1CtrlEnum_binary_sequential_RS : begin + _zz_execute_SRC1 = execute_RS1; + end + `Src1CtrlEnum_binary_sequential_PC_INCREMENT : begin + _zz_execute_SRC1 = {29'd0, _zz__zz_execute_SRC1}; + end + `Src1CtrlEnum_binary_sequential_IMU : begin + _zz_execute_SRC1 = {execute_INSTRUCTION[31 : 12],12'h0}; + end + default : begin + _zz_execute_SRC1 = {27'd0, _zz__zz_execute_SRC1_1}; + end + endcase + end + + assign _zz_execute_SRC2_1 = execute_INSTRUCTION[31]; + always @(*) begin + _zz_execute_SRC2_2[19] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[18] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[17] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[16] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[15] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[14] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[13] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[12] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[11] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[10] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[9] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[8] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[7] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[6] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[5] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[4] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[3] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[2] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[1] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[0] = _zz_execute_SRC2_1; + end + + assign _zz_execute_SRC2_3 = _zz__zz_execute_SRC2_3[11]; + always @(*) begin + _zz_execute_SRC2_4[19] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[18] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[17] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[16] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[15] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[14] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[13] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[12] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[11] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[10] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[9] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[8] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[7] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[6] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[5] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[4] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[3] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[2] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[1] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[0] = _zz_execute_SRC2_3; + end + + always @(*) begin + case(execute_SRC2_CTRL) + `Src2CtrlEnum_binary_sequential_RS : begin + _zz_execute_SRC2_5 = execute_RS2; + end + `Src2CtrlEnum_binary_sequential_IMI : begin + _zz_execute_SRC2_5 = {_zz_execute_SRC2_2,execute_INSTRUCTION[31 : 20]}; + end + `Src2CtrlEnum_binary_sequential_IMS : begin + _zz_execute_SRC2_5 = {_zz_execute_SRC2_4,{execute_INSTRUCTION[31 : 25],execute_INSTRUCTION[11 : 7]}}; + end + default : begin + _zz_execute_SRC2_5 = _zz_execute_SRC2; + end + endcase + end + + always @(*) begin + execute_SrcPlugin_addSub = _zz_execute_SrcPlugin_addSub; + if(execute_SRC2_FORCE_ZERO) begin + execute_SrcPlugin_addSub = execute_SRC1; + end + end + + assign execute_SrcPlugin_less = ((execute_SRC1[31] == execute_SRC2[31]) ? execute_SrcPlugin_addSub[31] : (execute_SRC_LESS_UNSIGNED ? execute_SRC2[31] : execute_SRC1[31])); + assign execute_FullBarrelShifterPlugin_amplitude = execute_SRC2[4 : 0]; + always @(*) begin + _zz_execute_FullBarrelShifterPlugin_reversed[0] = execute_SRC1[31]; + _zz_execute_FullBarrelShifterPlugin_reversed[1] = execute_SRC1[30]; + _zz_execute_FullBarrelShifterPlugin_reversed[2] = execute_SRC1[29]; + _zz_execute_FullBarrelShifterPlugin_reversed[3] = execute_SRC1[28]; + _zz_execute_FullBarrelShifterPlugin_reversed[4] = execute_SRC1[27]; + _zz_execute_FullBarrelShifterPlugin_reversed[5] = execute_SRC1[26]; + _zz_execute_FullBarrelShifterPlugin_reversed[6] = execute_SRC1[25]; + _zz_execute_FullBarrelShifterPlugin_reversed[7] = execute_SRC1[24]; + _zz_execute_FullBarrelShifterPlugin_reversed[8] = execute_SRC1[23]; + _zz_execute_FullBarrelShifterPlugin_reversed[9] = execute_SRC1[22]; + _zz_execute_FullBarrelShifterPlugin_reversed[10] = execute_SRC1[21]; + _zz_execute_FullBarrelShifterPlugin_reversed[11] = execute_SRC1[20]; + _zz_execute_FullBarrelShifterPlugin_reversed[12] = execute_SRC1[19]; + _zz_execute_FullBarrelShifterPlugin_reversed[13] = execute_SRC1[18]; + _zz_execute_FullBarrelShifterPlugin_reversed[14] = execute_SRC1[17]; + _zz_execute_FullBarrelShifterPlugin_reversed[15] = execute_SRC1[16]; + _zz_execute_FullBarrelShifterPlugin_reversed[16] = execute_SRC1[15]; + _zz_execute_FullBarrelShifterPlugin_reversed[17] = execute_SRC1[14]; + _zz_execute_FullBarrelShifterPlugin_reversed[18] = execute_SRC1[13]; + _zz_execute_FullBarrelShifterPlugin_reversed[19] = execute_SRC1[12]; + _zz_execute_FullBarrelShifterPlugin_reversed[20] = execute_SRC1[11]; + _zz_execute_FullBarrelShifterPlugin_reversed[21] = execute_SRC1[10]; + _zz_execute_FullBarrelShifterPlugin_reversed[22] = execute_SRC1[9]; + _zz_execute_FullBarrelShifterPlugin_reversed[23] = execute_SRC1[8]; + _zz_execute_FullBarrelShifterPlugin_reversed[24] = execute_SRC1[7]; + _zz_execute_FullBarrelShifterPlugin_reversed[25] = execute_SRC1[6]; + _zz_execute_FullBarrelShifterPlugin_reversed[26] = execute_SRC1[5]; + _zz_execute_FullBarrelShifterPlugin_reversed[27] = execute_SRC1[4]; + _zz_execute_FullBarrelShifterPlugin_reversed[28] = execute_SRC1[3]; + _zz_execute_FullBarrelShifterPlugin_reversed[29] = execute_SRC1[2]; + _zz_execute_FullBarrelShifterPlugin_reversed[30] = execute_SRC1[1]; + _zz_execute_FullBarrelShifterPlugin_reversed[31] = execute_SRC1[0]; + end + + assign execute_FullBarrelShifterPlugin_reversed = ((execute_SHIFT_CTRL == `ShiftCtrlEnum_binary_sequential_SLL_1) ? _zz_execute_FullBarrelShifterPlugin_reversed : execute_SRC1); + always @(*) begin + _zz_decode_RS2_3[0] = memory_SHIFT_RIGHT[31]; + _zz_decode_RS2_3[1] = memory_SHIFT_RIGHT[30]; + _zz_decode_RS2_3[2] = memory_SHIFT_RIGHT[29]; + _zz_decode_RS2_3[3] = memory_SHIFT_RIGHT[28]; + _zz_decode_RS2_3[4] = memory_SHIFT_RIGHT[27]; + _zz_decode_RS2_3[5] = memory_SHIFT_RIGHT[26]; + _zz_decode_RS2_3[6] = memory_SHIFT_RIGHT[25]; + _zz_decode_RS2_3[7] = memory_SHIFT_RIGHT[24]; + _zz_decode_RS2_3[8] = memory_SHIFT_RIGHT[23]; + _zz_decode_RS2_3[9] = memory_SHIFT_RIGHT[22]; + _zz_decode_RS2_3[10] = memory_SHIFT_RIGHT[21]; + _zz_decode_RS2_3[11] = memory_SHIFT_RIGHT[20]; + _zz_decode_RS2_3[12] = memory_SHIFT_RIGHT[19]; + _zz_decode_RS2_3[13] = memory_SHIFT_RIGHT[18]; + _zz_decode_RS2_3[14] = memory_SHIFT_RIGHT[17]; + _zz_decode_RS2_3[15] = memory_SHIFT_RIGHT[16]; + _zz_decode_RS2_3[16] = memory_SHIFT_RIGHT[15]; + _zz_decode_RS2_3[17] = memory_SHIFT_RIGHT[14]; + _zz_decode_RS2_3[18] = memory_SHIFT_RIGHT[13]; + _zz_decode_RS2_3[19] = memory_SHIFT_RIGHT[12]; + _zz_decode_RS2_3[20] = memory_SHIFT_RIGHT[11]; + _zz_decode_RS2_3[21] = memory_SHIFT_RIGHT[10]; + _zz_decode_RS2_3[22] = memory_SHIFT_RIGHT[9]; + _zz_decode_RS2_3[23] = memory_SHIFT_RIGHT[8]; + _zz_decode_RS2_3[24] = memory_SHIFT_RIGHT[7]; + _zz_decode_RS2_3[25] = memory_SHIFT_RIGHT[6]; + _zz_decode_RS2_3[26] = memory_SHIFT_RIGHT[5]; + _zz_decode_RS2_3[27] = memory_SHIFT_RIGHT[4]; + _zz_decode_RS2_3[28] = memory_SHIFT_RIGHT[3]; + _zz_decode_RS2_3[29] = memory_SHIFT_RIGHT[2]; + _zz_decode_RS2_3[30] = memory_SHIFT_RIGHT[1]; + _zz_decode_RS2_3[31] = memory_SHIFT_RIGHT[0]; + end + + always @(*) begin + HazardSimplePlugin_src0Hazard = 1'b0; + if(when_HazardSimplePlugin_l57) begin + if(when_HazardSimplePlugin_l58) begin + if(when_HazardSimplePlugin_l48) begin + HazardSimplePlugin_src0Hazard = 1'b1; + end + end + end + if(when_HazardSimplePlugin_l57_1) begin + if(when_HazardSimplePlugin_l58_1) begin + if(when_HazardSimplePlugin_l48_1) begin + HazardSimplePlugin_src0Hazard = 1'b1; + end + end + end + if(when_HazardSimplePlugin_l57_2) begin + if(when_HazardSimplePlugin_l58_2) begin + if(when_HazardSimplePlugin_l48_2) begin + HazardSimplePlugin_src0Hazard = 1'b1; + end + end + end + if(when_HazardSimplePlugin_l105) begin + HazardSimplePlugin_src0Hazard = 1'b0; + end + end + + always @(*) begin + HazardSimplePlugin_src1Hazard = 1'b0; + if(when_HazardSimplePlugin_l57) begin + if(when_HazardSimplePlugin_l58) begin + if(when_HazardSimplePlugin_l51) begin + HazardSimplePlugin_src1Hazard = 1'b1; + end + end + end + if(when_HazardSimplePlugin_l57_1) begin + if(when_HazardSimplePlugin_l58_1) begin + if(when_HazardSimplePlugin_l51_1) begin + HazardSimplePlugin_src1Hazard = 1'b1; + end + end + end + if(when_HazardSimplePlugin_l57_2) begin + if(when_HazardSimplePlugin_l58_2) begin + if(when_HazardSimplePlugin_l51_2) begin + HazardSimplePlugin_src1Hazard = 1'b1; + end + end + end + if(when_HazardSimplePlugin_l108) begin + HazardSimplePlugin_src1Hazard = 1'b0; + end + end + + assign HazardSimplePlugin_writeBackWrites_valid = (_zz_lastStageRegFileWrite_valid && writeBack_arbitration_isFiring); + assign HazardSimplePlugin_writeBackWrites_payload_address = _zz_lastStageRegFileWrite_payload_address[11 : 7]; + assign HazardSimplePlugin_writeBackWrites_payload_data = _zz_decode_RS2_2; + assign HazardSimplePlugin_addr0Match = (HazardSimplePlugin_writeBackBuffer_payload_address == decode_INSTRUCTION[19 : 15]); + assign HazardSimplePlugin_addr1Match = (HazardSimplePlugin_writeBackBuffer_payload_address == decode_INSTRUCTION[24 : 20]); + assign when_HazardSimplePlugin_l47 = 1'b1; + assign when_HazardSimplePlugin_l48 = (writeBack_INSTRUCTION[11 : 7] == decode_INSTRUCTION[19 : 15]); + assign when_HazardSimplePlugin_l51 = (writeBack_INSTRUCTION[11 : 7] == decode_INSTRUCTION[24 : 20]); + assign when_HazardSimplePlugin_l45 = (writeBack_arbitration_isValid && writeBack_REGFILE_WRITE_VALID); + assign when_HazardSimplePlugin_l57 = (writeBack_arbitration_isValid && writeBack_REGFILE_WRITE_VALID); + assign when_HazardSimplePlugin_l58 = (1'b0 || (! when_HazardSimplePlugin_l47)); + assign when_HazardSimplePlugin_l48_1 = (memory_INSTRUCTION[11 : 7] == decode_INSTRUCTION[19 : 15]); + assign when_HazardSimplePlugin_l51_1 = (memory_INSTRUCTION[11 : 7] == decode_INSTRUCTION[24 : 20]); + assign when_HazardSimplePlugin_l45_1 = (memory_arbitration_isValid && memory_REGFILE_WRITE_VALID); + assign when_HazardSimplePlugin_l57_1 = (memory_arbitration_isValid && memory_REGFILE_WRITE_VALID); + assign when_HazardSimplePlugin_l58_1 = (1'b0 || (! memory_BYPASSABLE_MEMORY_STAGE)); + assign when_HazardSimplePlugin_l48_2 = (execute_INSTRUCTION[11 : 7] == decode_INSTRUCTION[19 : 15]); + assign when_HazardSimplePlugin_l51_2 = (execute_INSTRUCTION[11 : 7] == decode_INSTRUCTION[24 : 20]); + assign when_HazardSimplePlugin_l45_2 = (execute_arbitration_isValid && execute_REGFILE_WRITE_VALID); + assign when_HazardSimplePlugin_l57_2 = (execute_arbitration_isValid && execute_REGFILE_WRITE_VALID); + assign when_HazardSimplePlugin_l58_2 = (1'b0 || (! execute_BYPASSABLE_EXECUTE_STAGE)); + assign when_HazardSimplePlugin_l105 = (! decode_RS1_USE); + assign when_HazardSimplePlugin_l108 = (! decode_RS2_USE); + assign when_HazardSimplePlugin_l113 = (decode_arbitration_isValid && (HazardSimplePlugin_src0Hazard || HazardSimplePlugin_src1Hazard)); + assign execute_BranchPlugin_eq = (execute_SRC1 == execute_SRC2); + assign switch_Misc_l200_1 = execute_INSTRUCTION[14 : 12]; + always @(*) begin + casez(switch_Misc_l200_1) + 3'b000 : begin + _zz_execute_BRANCH_COND_RESULT = execute_BranchPlugin_eq; + end + 3'b001 : begin + _zz_execute_BRANCH_COND_RESULT = (! execute_BranchPlugin_eq); + end + 3'b1?1 : begin + _zz_execute_BRANCH_COND_RESULT = (! execute_SRC_LESS); + end + default : begin + _zz_execute_BRANCH_COND_RESULT = execute_SRC_LESS; + end + endcase + end + + always @(*) begin + case(execute_BRANCH_CTRL) + `BranchCtrlEnum_binary_sequential_INC : begin + _zz_execute_BRANCH_COND_RESULT_1 = 1'b0; + end + `BranchCtrlEnum_binary_sequential_JAL : begin + _zz_execute_BRANCH_COND_RESULT_1 = 1'b1; + end + `BranchCtrlEnum_binary_sequential_JALR : begin + _zz_execute_BRANCH_COND_RESULT_1 = 1'b1; + end + default : begin + _zz_execute_BRANCH_COND_RESULT_1 = _zz_execute_BRANCH_COND_RESULT; + end + endcase + end + + assign _zz_execute_BranchPlugin_missAlignedTarget = execute_INSTRUCTION[31]; + always @(*) begin + _zz_execute_BranchPlugin_missAlignedTarget_1[19] = _zz_execute_BranchPlugin_missAlignedTarget; + _zz_execute_BranchPlugin_missAlignedTarget_1[18] = _zz_execute_BranchPlugin_missAlignedTarget; + _zz_execute_BranchPlugin_missAlignedTarget_1[17] = _zz_execute_BranchPlugin_missAlignedTarget; + _zz_execute_BranchPlugin_missAlignedTarget_1[16] = _zz_execute_BranchPlugin_missAlignedTarget; + _zz_execute_BranchPlugin_missAlignedTarget_1[15] = _zz_execute_BranchPlugin_missAlignedTarget; + _zz_execute_BranchPlugin_missAlignedTarget_1[14] = _zz_execute_BranchPlugin_missAlignedTarget; + _zz_execute_BranchPlugin_missAlignedTarget_1[13] = _zz_execute_BranchPlugin_missAlignedTarget; + _zz_execute_BranchPlugin_missAlignedTarget_1[12] = _zz_execute_BranchPlugin_missAlignedTarget; + _zz_execute_BranchPlugin_missAlignedTarget_1[11] = _zz_execute_BranchPlugin_missAlignedTarget; + _zz_execute_BranchPlugin_missAlignedTarget_1[10] = _zz_execute_BranchPlugin_missAlignedTarget; + _zz_execute_BranchPlugin_missAlignedTarget_1[9] = _zz_execute_BranchPlugin_missAlignedTarget; + _zz_execute_BranchPlugin_missAlignedTarget_1[8] = _zz_execute_BranchPlugin_missAlignedTarget; + _zz_execute_BranchPlugin_missAlignedTarget_1[7] = _zz_execute_BranchPlugin_missAlignedTarget; + _zz_execute_BranchPlugin_missAlignedTarget_1[6] = _zz_execute_BranchPlugin_missAlignedTarget; + _zz_execute_BranchPlugin_missAlignedTarget_1[5] = _zz_execute_BranchPlugin_missAlignedTarget; + _zz_execute_BranchPlugin_missAlignedTarget_1[4] = _zz_execute_BranchPlugin_missAlignedTarget; + _zz_execute_BranchPlugin_missAlignedTarget_1[3] = _zz_execute_BranchPlugin_missAlignedTarget; + _zz_execute_BranchPlugin_missAlignedTarget_1[2] = _zz_execute_BranchPlugin_missAlignedTarget; + _zz_execute_BranchPlugin_missAlignedTarget_1[1] = _zz_execute_BranchPlugin_missAlignedTarget; + _zz_execute_BranchPlugin_missAlignedTarget_1[0] = _zz_execute_BranchPlugin_missAlignedTarget; + end + + assign _zz_execute_BranchPlugin_missAlignedTarget_2 = _zz__zz_execute_BranchPlugin_missAlignedTarget_2[19]; + always @(*) begin + _zz_execute_BranchPlugin_missAlignedTarget_3[10] = _zz_execute_BranchPlugin_missAlignedTarget_2; + _zz_execute_BranchPlugin_missAlignedTarget_3[9] = _zz_execute_BranchPlugin_missAlignedTarget_2; + _zz_execute_BranchPlugin_missAlignedTarget_3[8] = _zz_execute_BranchPlugin_missAlignedTarget_2; + _zz_execute_BranchPlugin_missAlignedTarget_3[7] = _zz_execute_BranchPlugin_missAlignedTarget_2; + _zz_execute_BranchPlugin_missAlignedTarget_3[6] = _zz_execute_BranchPlugin_missAlignedTarget_2; + _zz_execute_BranchPlugin_missAlignedTarget_3[5] = _zz_execute_BranchPlugin_missAlignedTarget_2; + _zz_execute_BranchPlugin_missAlignedTarget_3[4] = _zz_execute_BranchPlugin_missAlignedTarget_2; + _zz_execute_BranchPlugin_missAlignedTarget_3[3] = _zz_execute_BranchPlugin_missAlignedTarget_2; + _zz_execute_BranchPlugin_missAlignedTarget_3[2] = _zz_execute_BranchPlugin_missAlignedTarget_2; + _zz_execute_BranchPlugin_missAlignedTarget_3[1] = _zz_execute_BranchPlugin_missAlignedTarget_2; + _zz_execute_BranchPlugin_missAlignedTarget_3[0] = _zz_execute_BranchPlugin_missAlignedTarget_2; + end + + assign _zz_execute_BranchPlugin_missAlignedTarget_4 = _zz__zz_execute_BranchPlugin_missAlignedTarget_4[11]; + always @(*) begin + _zz_execute_BranchPlugin_missAlignedTarget_5[18] = _zz_execute_BranchPlugin_missAlignedTarget_4; + _zz_execute_BranchPlugin_missAlignedTarget_5[17] = _zz_execute_BranchPlugin_missAlignedTarget_4; + _zz_execute_BranchPlugin_missAlignedTarget_5[16] = _zz_execute_BranchPlugin_missAlignedTarget_4; + _zz_execute_BranchPlugin_missAlignedTarget_5[15] = _zz_execute_BranchPlugin_missAlignedTarget_4; + _zz_execute_BranchPlugin_missAlignedTarget_5[14] = _zz_execute_BranchPlugin_missAlignedTarget_4; + _zz_execute_BranchPlugin_missAlignedTarget_5[13] = _zz_execute_BranchPlugin_missAlignedTarget_4; + _zz_execute_BranchPlugin_missAlignedTarget_5[12] = _zz_execute_BranchPlugin_missAlignedTarget_4; + _zz_execute_BranchPlugin_missAlignedTarget_5[11] = _zz_execute_BranchPlugin_missAlignedTarget_4; + _zz_execute_BranchPlugin_missAlignedTarget_5[10] = _zz_execute_BranchPlugin_missAlignedTarget_4; + _zz_execute_BranchPlugin_missAlignedTarget_5[9] = _zz_execute_BranchPlugin_missAlignedTarget_4; + _zz_execute_BranchPlugin_missAlignedTarget_5[8] = _zz_execute_BranchPlugin_missAlignedTarget_4; + _zz_execute_BranchPlugin_missAlignedTarget_5[7] = _zz_execute_BranchPlugin_missAlignedTarget_4; + _zz_execute_BranchPlugin_missAlignedTarget_5[6] = _zz_execute_BranchPlugin_missAlignedTarget_4; + _zz_execute_BranchPlugin_missAlignedTarget_5[5] = _zz_execute_BranchPlugin_missAlignedTarget_4; + _zz_execute_BranchPlugin_missAlignedTarget_5[4] = _zz_execute_BranchPlugin_missAlignedTarget_4; + _zz_execute_BranchPlugin_missAlignedTarget_5[3] = _zz_execute_BranchPlugin_missAlignedTarget_4; + _zz_execute_BranchPlugin_missAlignedTarget_5[2] = _zz_execute_BranchPlugin_missAlignedTarget_4; + _zz_execute_BranchPlugin_missAlignedTarget_5[1] = _zz_execute_BranchPlugin_missAlignedTarget_4; + _zz_execute_BranchPlugin_missAlignedTarget_5[0] = _zz_execute_BranchPlugin_missAlignedTarget_4; + end + + always @(*) begin + case(execute_BRANCH_CTRL) + `BranchCtrlEnum_binary_sequential_JALR : begin + _zz_execute_BranchPlugin_missAlignedTarget_6 = (_zz__zz_execute_BranchPlugin_missAlignedTarget_6[1] ^ execute_RS1[1]); + end + `BranchCtrlEnum_binary_sequential_JAL : begin + _zz_execute_BranchPlugin_missAlignedTarget_6 = _zz__zz_execute_BranchPlugin_missAlignedTarget_6_1[1]; + end + default : begin + _zz_execute_BranchPlugin_missAlignedTarget_6 = _zz__zz_execute_BranchPlugin_missAlignedTarget_6_2[1]; + end + endcase + end + + assign execute_BranchPlugin_missAlignedTarget = (execute_BRANCH_COND_RESULT && _zz_execute_BranchPlugin_missAlignedTarget_6); + always @(*) begin + case(execute_BRANCH_CTRL) + `BranchCtrlEnum_binary_sequential_JALR : begin + execute_BranchPlugin_branch_src1 = execute_RS1; + end + default : begin + execute_BranchPlugin_branch_src1 = execute_PC; + end + endcase + end + + assign _zz_execute_BranchPlugin_branch_src2 = execute_INSTRUCTION[31]; + always @(*) begin + _zz_execute_BranchPlugin_branch_src2_1[19] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[18] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[17] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[16] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[15] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[14] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[13] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[12] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[11] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[10] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[9] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[8] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[7] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[6] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[5] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[4] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[3] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[2] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[1] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[0] = _zz_execute_BranchPlugin_branch_src2; + end + + always @(*) begin + case(execute_BRANCH_CTRL) + `BranchCtrlEnum_binary_sequential_JALR : begin + execute_BranchPlugin_branch_src2 = {_zz_execute_BranchPlugin_branch_src2_1,execute_INSTRUCTION[31 : 20]}; + end + default : begin + execute_BranchPlugin_branch_src2 = ((execute_BRANCH_CTRL == `BranchCtrlEnum_binary_sequential_JAL) ? {{_zz_execute_BranchPlugin_branch_src2_3,{{{_zz_execute_BranchPlugin_branch_src2_6,execute_INSTRUCTION[19 : 12]},execute_INSTRUCTION[20]},execute_INSTRUCTION[30 : 21]}},1'b0} : {{_zz_execute_BranchPlugin_branch_src2_5,{{{_zz_execute_BranchPlugin_branch_src2_7,_zz_execute_BranchPlugin_branch_src2_8},execute_INSTRUCTION[30 : 25]},execute_INSTRUCTION[11 : 8]}},1'b0}); + if(execute_PREDICTION_HAD_BRANCHED2) begin + execute_BranchPlugin_branch_src2 = {29'd0, _zz_execute_BranchPlugin_branch_src2_9}; + end + end + endcase + end + + assign _zz_execute_BranchPlugin_branch_src2_2 = _zz__zz_execute_BranchPlugin_branch_src2_2[19]; + always @(*) begin + _zz_execute_BranchPlugin_branch_src2_3[10] = _zz_execute_BranchPlugin_branch_src2_2; + _zz_execute_BranchPlugin_branch_src2_3[9] = _zz_execute_BranchPlugin_branch_src2_2; + _zz_execute_BranchPlugin_branch_src2_3[8] = _zz_execute_BranchPlugin_branch_src2_2; + _zz_execute_BranchPlugin_branch_src2_3[7] = _zz_execute_BranchPlugin_branch_src2_2; + _zz_execute_BranchPlugin_branch_src2_3[6] = _zz_execute_BranchPlugin_branch_src2_2; + _zz_execute_BranchPlugin_branch_src2_3[5] = _zz_execute_BranchPlugin_branch_src2_2; + _zz_execute_BranchPlugin_branch_src2_3[4] = _zz_execute_BranchPlugin_branch_src2_2; + _zz_execute_BranchPlugin_branch_src2_3[3] = _zz_execute_BranchPlugin_branch_src2_2; + _zz_execute_BranchPlugin_branch_src2_3[2] = _zz_execute_BranchPlugin_branch_src2_2; + _zz_execute_BranchPlugin_branch_src2_3[1] = _zz_execute_BranchPlugin_branch_src2_2; + _zz_execute_BranchPlugin_branch_src2_3[0] = _zz_execute_BranchPlugin_branch_src2_2; + end + + assign _zz_execute_BranchPlugin_branch_src2_4 = _zz__zz_execute_BranchPlugin_branch_src2_4[11]; + always @(*) begin + _zz_execute_BranchPlugin_branch_src2_5[18] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[17] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[16] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[15] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[14] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[13] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[12] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[11] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[10] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[9] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[8] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[7] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[6] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[5] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[4] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[3] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[2] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[1] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[0] = _zz_execute_BranchPlugin_branch_src2_4; + end + + assign execute_BranchPlugin_branchAdder = (execute_BranchPlugin_branch_src1 + execute_BranchPlugin_branch_src2); + assign BranchPlugin_jumpInterface_valid = ((execute_arbitration_isValid && execute_BRANCH_DO) && (! 1'b0)); + assign BranchPlugin_jumpInterface_payload = execute_BRANCH_CALC; + always @(*) begin + BranchPlugin_branchExceptionPort_valid = (execute_arbitration_isValid && (execute_BRANCH_DO && execute_BRANCH_CALC[1])); + if(when_BranchPlugin_l296) begin + BranchPlugin_branchExceptionPort_valid = 1'b0; + end + end + + assign BranchPlugin_branchExceptionPort_payload_code = 4'b0000; + assign BranchPlugin_branchExceptionPort_payload_badAddr = execute_BRANCH_CALC; + assign when_BranchPlugin_l296 = 1'b0; + assign IBusCachedPlugin_decodePrediction_rsp_wasWrong = BranchPlugin_jumpInterface_valid; + always @(*) begin + CsrPlugin_privilege = 2'b11; + if(CsrPlugin_forceMachineWire) begin + CsrPlugin_privilege = 2'b11; + end + end + + assign _zz_when_CsrPlugin_l952 = (CsrPlugin_mip_MTIP && CsrPlugin_mie_MTIE); + assign _zz_when_CsrPlugin_l952_1 = (CsrPlugin_mip_MSIP && CsrPlugin_mie_MSIE); + assign _zz_when_CsrPlugin_l952_2 = (CsrPlugin_mip_MEIP && CsrPlugin_mie_MEIE); + assign CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilegeUncapped = 2'b11; + assign CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilege = ((CsrPlugin_privilege < CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilegeUncapped) ? CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilegeUncapped : CsrPlugin_privilege); + assign _zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code = {decodeExceptionPort_valid,IBusCachedPlugin_decodeExceptionPort_valid}; + assign _zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_1 = _zz__zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_1[0]; + assign _zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_2 = {CsrPlugin_selfException_valid,BranchPlugin_branchExceptionPort_valid}; + assign _zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_3 = _zz__zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_3[0]; + always @(*) begin + CsrPlugin_exceptionPortCtrl_exceptionValids_decode = CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_decode; + if(_zz_when) begin + CsrPlugin_exceptionPortCtrl_exceptionValids_decode = 1'b1; + end + if(decode_arbitration_isFlushed) begin + CsrPlugin_exceptionPortCtrl_exceptionValids_decode = 1'b0; + end + end + + always @(*) begin + CsrPlugin_exceptionPortCtrl_exceptionValids_execute = CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_execute; + if(_zz_when_1) begin + CsrPlugin_exceptionPortCtrl_exceptionValids_execute = 1'b1; + end + if(execute_arbitration_isFlushed) begin + CsrPlugin_exceptionPortCtrl_exceptionValids_execute = 1'b0; + end + end + + always @(*) begin + CsrPlugin_exceptionPortCtrl_exceptionValids_memory = CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_memory; + if(memory_arbitration_isFlushed) begin + CsrPlugin_exceptionPortCtrl_exceptionValids_memory = 1'b0; + end + end + + always @(*) begin + CsrPlugin_exceptionPortCtrl_exceptionValids_writeBack = CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_writeBack; + if(DBusCachedPlugin_exceptionBus_valid) begin + CsrPlugin_exceptionPortCtrl_exceptionValids_writeBack = 1'b1; + end + if(writeBack_arbitration_isFlushed) begin + CsrPlugin_exceptionPortCtrl_exceptionValids_writeBack = 1'b0; + end + end + + assign when_CsrPlugin_l909 = (! decode_arbitration_isStuck); + assign when_CsrPlugin_l909_1 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l909_2 = (! memory_arbitration_isStuck); + assign when_CsrPlugin_l909_3 = (! writeBack_arbitration_isStuck); + assign when_CsrPlugin_l922 = ({CsrPlugin_exceptionPortCtrl_exceptionValids_writeBack,{CsrPlugin_exceptionPortCtrl_exceptionValids_memory,{CsrPlugin_exceptionPortCtrl_exceptionValids_execute,CsrPlugin_exceptionPortCtrl_exceptionValids_decode}}} != 4'b0000); + assign CsrPlugin_exceptionPendings_0 = CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_decode; + assign CsrPlugin_exceptionPendings_1 = CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_execute; + assign CsrPlugin_exceptionPendings_2 = CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_memory; + assign CsrPlugin_exceptionPendings_3 = CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_writeBack; + assign when_CsrPlugin_l946 = (CsrPlugin_mstatus_MIE || (CsrPlugin_privilege < 2'b11)); + assign when_CsrPlugin_l952 = ((_zz_when_CsrPlugin_l952 && 1'b1) && (! 1'b0)); + assign when_CsrPlugin_l952_1 = ((_zz_when_CsrPlugin_l952_1 && 1'b1) && (! 1'b0)); + assign when_CsrPlugin_l952_2 = ((_zz_when_CsrPlugin_l952_2 && 1'b1) && (! 1'b0)); + assign CsrPlugin_exception = (CsrPlugin_exceptionPortCtrl_exceptionValids_writeBack && CsrPlugin_allowException); + assign CsrPlugin_pipelineLiberator_active = ((CsrPlugin_interrupt_valid && CsrPlugin_allowInterrupts) && decode_arbitration_isValid); + assign when_CsrPlugin_l980 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l980_1 = (! memory_arbitration_isStuck); + assign when_CsrPlugin_l980_2 = (! writeBack_arbitration_isStuck); + assign when_CsrPlugin_l985 = ((! CsrPlugin_pipelineLiberator_active) || decode_arbitration_removeIt); + always @(*) begin + CsrPlugin_pipelineLiberator_done = CsrPlugin_pipelineLiberator_pcValids_2; + if(when_CsrPlugin_l991) begin + CsrPlugin_pipelineLiberator_done = 1'b0; + end + if(CsrPlugin_hadException) begin + CsrPlugin_pipelineLiberator_done = 1'b0; + end + end + + assign when_CsrPlugin_l991 = ({CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_writeBack,{CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_memory,CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_execute}} != 3'b000); + assign CsrPlugin_interruptJump = ((CsrPlugin_interrupt_valid && CsrPlugin_pipelineLiberator_done) && CsrPlugin_allowInterrupts); + always @(*) begin + CsrPlugin_targetPrivilege = CsrPlugin_interrupt_targetPrivilege; + if(CsrPlugin_hadException) begin + CsrPlugin_targetPrivilege = CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilege; + end + end + + always @(*) begin + CsrPlugin_trapCause = CsrPlugin_interrupt_code; + if(CsrPlugin_hadException) begin + CsrPlugin_trapCause = CsrPlugin_exceptionPortCtrl_exceptionContext_code; + end + end + + always @(*) begin + CsrPlugin_xtvec_mode = 2'bxx; + case(CsrPlugin_targetPrivilege) + 2'b11 : begin + CsrPlugin_xtvec_mode = CsrPlugin_mtvec_mode; + end + default : begin + end + endcase + end + + always @(*) begin + CsrPlugin_xtvec_base = 30'bxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx; + case(CsrPlugin_targetPrivilege) + 2'b11 : begin + CsrPlugin_xtvec_base = CsrPlugin_mtvec_base; + end + default : begin + end + endcase + end + + assign when_CsrPlugin_l1019 = (CsrPlugin_hadException || CsrPlugin_interruptJump); + assign when_CsrPlugin_l1064 = (writeBack_arbitration_isValid && (writeBack_ENV_CTRL == `EnvCtrlEnum_binary_sequential_XRET)); + assign switch_CsrPlugin_l1068 = writeBack_INSTRUCTION[29 : 28]; + assign contextSwitching = CsrPlugin_jumpInterface_valid; + assign when_CsrPlugin_l1108 = (execute_arbitration_isValid && (execute_ENV_CTRL == `EnvCtrlEnum_binary_sequential_WFI)); + assign when_CsrPlugin_l1110 = (! execute_CsrPlugin_wfiWake); + assign when_CsrPlugin_l1116 = ({(writeBack_arbitration_isValid && (writeBack_ENV_CTRL == `EnvCtrlEnum_binary_sequential_XRET)),{(memory_arbitration_isValid && (memory_ENV_CTRL == `EnvCtrlEnum_binary_sequential_XRET)),(execute_arbitration_isValid && (execute_ENV_CTRL == `EnvCtrlEnum_binary_sequential_XRET))}} != 3'b000); + assign execute_CsrPlugin_blockedBySideEffects = (({writeBack_arbitration_isValid,memory_arbitration_isValid} != 2'b00) || 1'b0); + always @(*) begin + execute_CsrPlugin_illegalAccess = 1'b1; + if(execute_CsrPlugin_csr_3264) begin + if(execute_CSR_READ_OPCODE) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + end + if(execute_CsrPlugin_csr_3857) begin + if(execute_CSR_READ_OPCODE) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + end + if(execute_CsrPlugin_csr_3858) begin + if(execute_CSR_READ_OPCODE) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + end + if(execute_CsrPlugin_csr_3859) begin + if(execute_CSR_READ_OPCODE) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + end + if(execute_CsrPlugin_csr_3860) begin + if(execute_CSR_READ_OPCODE) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + end + if(execute_CsrPlugin_csr_769) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(execute_CsrPlugin_csr_768) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(execute_CsrPlugin_csr_836) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(execute_CsrPlugin_csr_772) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(execute_CsrPlugin_csr_773) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(execute_CsrPlugin_csr_833) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(execute_CsrPlugin_csr_832) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(execute_CsrPlugin_csr_834) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(execute_CsrPlugin_csr_835) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(execute_CsrPlugin_csr_2816) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(execute_CsrPlugin_csr_2944) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(execute_CsrPlugin_csr_2818) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(execute_CsrPlugin_csr_2946) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(execute_CsrPlugin_csr_3072) begin + if(execute_CSR_READ_OPCODE) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + end + if(execute_CsrPlugin_csr_3200) begin + if(execute_CSR_READ_OPCODE) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + end + if(execute_CsrPlugin_csr_3074) begin + if(execute_CSR_READ_OPCODE) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + end + if(execute_CsrPlugin_csr_3202) begin + if(execute_CSR_READ_OPCODE) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + end + if(execute_CsrPlugin_csr_3008) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(execute_CsrPlugin_csr_4032) begin + if(execute_CSR_READ_OPCODE) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + end + if(execute_CsrPlugin_csr_2820) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(execute_CsrPlugin_csr_2821) begin + if(execute_CSR_WRITE_OPCODE) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + end + if(execute_CsrPlugin_csr_2822) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(execute_CsrPlugin_csr_2823) begin + if(execute_CSR_WRITE_OPCODE) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + end + if(execute_CsrPlugin_csr_2824) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(execute_CsrPlugin_csr_2825) begin + if(execute_CSR_WRITE_OPCODE) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + end + if(execute_CsrPlugin_csr_2826) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(execute_CsrPlugin_csr_2827) begin + if(execute_CSR_WRITE_OPCODE) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + end + if(execute_CsrPlugin_csr_2828) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(execute_CsrPlugin_csr_2829) begin + if(execute_CSR_WRITE_OPCODE) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + end + if(execute_CsrPlugin_csr_2830) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(execute_CsrPlugin_csr_2831) begin + if(execute_CSR_WRITE_OPCODE) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + end + if(execute_CsrPlugin_csr_2832) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(execute_CsrPlugin_csr_2833) begin + if(execute_CSR_WRITE_OPCODE) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + end + if(execute_CsrPlugin_csr_2834) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(execute_CsrPlugin_csr_2835) begin + if(execute_CSR_WRITE_OPCODE) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + end + if(CsrPlugin_csrMapping_allowCsrSignal) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(when_CsrPlugin_l1297) begin + execute_CsrPlugin_illegalAccess = 1'b1; + end + if(when_CsrPlugin_l1302) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + end + + always @(*) begin + execute_CsrPlugin_illegalInstruction = 1'b0; + if(when_CsrPlugin_l1136) begin + if(when_CsrPlugin_l1137) begin + execute_CsrPlugin_illegalInstruction = 1'b1; + end + end + end + + always @(*) begin + CsrPlugin_selfException_valid = 1'b0; + if(when_CsrPlugin_l1129) begin + CsrPlugin_selfException_valid = 1'b1; + end + if(when_CsrPlugin_l1144) begin + CsrPlugin_selfException_valid = 1'b1; + end + end + + always @(*) begin + CsrPlugin_selfException_payload_code = 4'bxxxx; + if(when_CsrPlugin_l1129) begin + CsrPlugin_selfException_payload_code = 4'b0010; + end + if(when_CsrPlugin_l1144) begin + case(CsrPlugin_privilege) + 2'b00 : begin + CsrPlugin_selfException_payload_code = 4'b1000; + end + default : begin + CsrPlugin_selfException_payload_code = 4'b1011; + end + endcase + end + end + + assign CsrPlugin_selfException_payload_badAddr = execute_INSTRUCTION; + assign when_CsrPlugin_l1129 = (execute_CsrPlugin_illegalAccess || execute_CsrPlugin_illegalInstruction); + assign when_CsrPlugin_l1136 = (execute_arbitration_isValid && (execute_ENV_CTRL == `EnvCtrlEnum_binary_sequential_XRET)); + assign when_CsrPlugin_l1137 = (CsrPlugin_privilege < execute_INSTRUCTION[29 : 28]); + assign when_CsrPlugin_l1144 = (execute_arbitration_isValid && (execute_ENV_CTRL == `EnvCtrlEnum_binary_sequential_ECALL)); + always @(*) begin + execute_CsrPlugin_writeInstruction = ((execute_arbitration_isValid && execute_IS_CSR) && execute_CSR_WRITE_OPCODE); + if(when_CsrPlugin_l1297) begin + execute_CsrPlugin_writeInstruction = 1'b0; + end + end + + always @(*) begin + execute_CsrPlugin_readInstruction = ((execute_arbitration_isValid && execute_IS_CSR) && execute_CSR_READ_OPCODE); + if(when_CsrPlugin_l1297) begin + execute_CsrPlugin_readInstruction = 1'b0; + end + end + + assign execute_CsrPlugin_writeEnable = (execute_CsrPlugin_writeInstruction && (! execute_arbitration_isStuck)); + assign execute_CsrPlugin_readEnable = (execute_CsrPlugin_readInstruction && (! execute_arbitration_isStuck)); + assign CsrPlugin_csrMapping_hazardFree = (! execute_CsrPlugin_blockedBySideEffects); + assign execute_CsrPlugin_readToWriteData = CsrPlugin_csrMapping_readDataSignal; + assign switch_Misc_l200_2 = execute_INSTRUCTION[13]; + always @(*) begin + case(switch_Misc_l200_2) + 1'b0 : begin + _zz_CsrPlugin_csrMapping_writeDataSignal = execute_SRC1; + end + default : begin + _zz_CsrPlugin_csrMapping_writeDataSignal = (execute_INSTRUCTION[12] ? (execute_CsrPlugin_readToWriteData & (~ execute_SRC1)) : (execute_CsrPlugin_readToWriteData | execute_SRC1)); + end + endcase + end + + assign CsrPlugin_csrMapping_writeDataSignal = _zz_CsrPlugin_csrMapping_writeDataSignal; + assign when_CsrPlugin_l1176 = (execute_arbitration_isValid && execute_IS_CSR); + assign when_CsrPlugin_l1180 = (execute_arbitration_isValid && (execute_IS_CSR || 1'b0)); + assign execute_CsrPlugin_csrAddress = execute_INSTRUCTION[31 : 20]; + assign execute_MulPlugin_a = execute_RS1; + assign execute_MulPlugin_b = execute_RS2; + assign switch_MulPlugin_l87 = execute_INSTRUCTION[13 : 12]; + always @(*) begin + case(switch_MulPlugin_l87) + 2'b01 : begin + execute_MulPlugin_aSigned = 1'b1; + end + 2'b10 : begin + execute_MulPlugin_aSigned = 1'b1; + end + default : begin + execute_MulPlugin_aSigned = 1'b0; + end + endcase + end + + always @(*) begin + case(switch_MulPlugin_l87) + 2'b01 : begin + execute_MulPlugin_bSigned = 1'b1; + end + 2'b10 : begin + execute_MulPlugin_bSigned = 1'b0; + end + default : begin + execute_MulPlugin_bSigned = 1'b0; + end + endcase + end + + assign execute_MulPlugin_aULow = execute_MulPlugin_a[15 : 0]; + assign execute_MulPlugin_bULow = execute_MulPlugin_b[15 : 0]; + assign execute_MulPlugin_aSLow = {1'b0,execute_MulPlugin_a[15 : 0]}; + assign execute_MulPlugin_bSLow = {1'b0,execute_MulPlugin_b[15 : 0]}; + assign execute_MulPlugin_aHigh = {(execute_MulPlugin_aSigned && execute_MulPlugin_a[31]),execute_MulPlugin_a[31 : 16]}; + assign execute_MulPlugin_bHigh = {(execute_MulPlugin_bSigned && execute_MulPlugin_b[31]),execute_MulPlugin_b[31 : 16]}; + assign writeBack_MulPlugin_result = ($signed(_zz_writeBack_MulPlugin_result) + $signed(_zz_writeBack_MulPlugin_result_1)); + assign when_MulPlugin_l147 = (writeBack_arbitration_isValid && writeBack_IS_MUL); + assign switch_MulPlugin_l148 = writeBack_INSTRUCTION[13 : 12]; + assign memory_DivPlugin_frontendOk = 1'b1; + always @(*) begin + memory_DivPlugin_div_counter_willIncrement = 1'b0; + if(when_MulDivIterativePlugin_l128) begin + if(when_MulDivIterativePlugin_l132) begin + memory_DivPlugin_div_counter_willIncrement = 1'b1; + end + end + end + + always @(*) begin + memory_DivPlugin_div_counter_willClear = 1'b0; + if(when_MulDivIterativePlugin_l162) begin + memory_DivPlugin_div_counter_willClear = 1'b1; + end + end + + assign memory_DivPlugin_div_counter_willOverflowIfInc = (memory_DivPlugin_div_counter_value == 6'h21); + assign memory_DivPlugin_div_counter_willOverflow = (memory_DivPlugin_div_counter_willOverflowIfInc && memory_DivPlugin_div_counter_willIncrement); + always @(*) begin + if(memory_DivPlugin_div_counter_willOverflow) begin + memory_DivPlugin_div_counter_valueNext = 6'h0; + end else begin + memory_DivPlugin_div_counter_valueNext = (memory_DivPlugin_div_counter_value + _zz_memory_DivPlugin_div_counter_valueNext); + end + if(memory_DivPlugin_div_counter_willClear) begin + memory_DivPlugin_div_counter_valueNext = 6'h0; + end + end + + assign when_MulDivIterativePlugin_l126 = (memory_DivPlugin_div_counter_value == 6'h20); + assign when_MulDivIterativePlugin_l126_1 = (! memory_arbitration_isStuck); + assign when_MulDivIterativePlugin_l128 = (memory_arbitration_isValid && memory_IS_DIV); + assign when_MulDivIterativePlugin_l129 = ((! memory_DivPlugin_frontendOk) || (! memory_DivPlugin_div_done)); + assign when_MulDivIterativePlugin_l132 = (memory_DivPlugin_frontendOk && (! memory_DivPlugin_div_done)); + assign _zz_memory_DivPlugin_div_stage_0_remainderShifted = memory_DivPlugin_rs1[31 : 0]; + assign memory_DivPlugin_div_stage_0_remainderShifted = {memory_DivPlugin_accumulator[31 : 0],_zz_memory_DivPlugin_div_stage_0_remainderShifted[31]}; + assign memory_DivPlugin_div_stage_0_remainderMinusDenominator = (memory_DivPlugin_div_stage_0_remainderShifted - _zz_memory_DivPlugin_div_stage_0_remainderMinusDenominator); + assign memory_DivPlugin_div_stage_0_outRemainder = ((! memory_DivPlugin_div_stage_0_remainderMinusDenominator[32]) ? _zz_memory_DivPlugin_div_stage_0_outRemainder : _zz_memory_DivPlugin_div_stage_0_outRemainder_1); + assign memory_DivPlugin_div_stage_0_outNumerator = _zz_memory_DivPlugin_div_stage_0_outNumerator[31:0]; + assign when_MulDivIterativePlugin_l151 = (memory_DivPlugin_div_counter_value == 6'h20); + assign _zz_memory_DivPlugin_div_result = (memory_INSTRUCTION[13] ? memory_DivPlugin_accumulator[31 : 0] : memory_DivPlugin_rs1[31 : 0]); + assign when_MulDivIterativePlugin_l162 = (! memory_arbitration_isStuck); + assign _zz_memory_DivPlugin_rs2 = (execute_RS2[31] && execute_IS_RS2_SIGNED); + assign _zz_memory_DivPlugin_rs1 = (1'b0 || ((execute_IS_DIV && execute_RS1[31]) && execute_IS_RS1_SIGNED)); + always @(*) begin + _zz_memory_DivPlugin_rs1_1[32] = (execute_IS_RS1_SIGNED && execute_RS1[31]); + _zz_memory_DivPlugin_rs1_1[31 : 0] = execute_RS1; + end + + assign _zz_CsrPlugin_csrMapping_readDataInit_1 = (_zz_CsrPlugin_csrMapping_readDataInit & externalInterruptArray_regNext); + assign externalInterrupt = (_zz_CsrPlugin_csrMapping_readDataInit_1 != 32'h0); + assign execute_CfuPlugin_schedule = (execute_arbitration_isValid && execute_CfuPlugin_CFU_ENABLE); + assign CfuPlugin_bus_cmd_fire = (CfuPlugin_bus_cmd_valid && CfuPlugin_bus_cmd_ready); + assign when_CfuPlugin_l171 = (! execute_arbitration_isStuckByOthers); + assign CfuPlugin_bus_cmd_valid = ((execute_CfuPlugin_schedule || execute_CfuPlugin_hold) && (! execute_CfuPlugin_fired)); + assign when_CfuPlugin_l175 = (CfuPlugin_bus_cmd_valid && (! CfuPlugin_bus_cmd_ready)); + assign execute_CfuPlugin_functionsIds_0 = _zz_execute_CfuPlugin_functionsIds_0; + assign CfuPlugin_bus_cmd_payload_function_id = execute_CfuPlugin_functionsIds_0; + assign CfuPlugin_bus_cmd_payload_inputs_0 = execute_RS1; + assign _zz_CfuPlugin_bus_cmd_payload_inputs_1 = execute_INSTRUCTION[31]; + always @(*) begin + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[23] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[22] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[21] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[20] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[19] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[18] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[17] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[16] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[15] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[14] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[13] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[12] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[11] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[10] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[9] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[8] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[7] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[6] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[5] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[4] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[3] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[2] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[1] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[0] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + end + + always @(*) begin + case(execute_CfuPlugin_CFU_INPUT_2_KIND) + `Input2Kind_binary_sequential_RS : begin + _zz_CfuPlugin_bus_cmd_payload_inputs_1_2 = execute_RS2; + end + default : begin + _zz_CfuPlugin_bus_cmd_payload_inputs_1_2 = {_zz_CfuPlugin_bus_cmd_payload_inputs_1_1,execute_INSTRUCTION[31 : 24]}; + end + endcase + end + + assign CfuPlugin_bus_cmd_payload_inputs_1 = _zz_CfuPlugin_bus_cmd_payload_inputs_1_2; + assign CfuPlugin_bus_rsp_ready = (! CfuPlugin_bus_rsp_rValid); + assign CfuPlugin_bus_rsp_rsp_valid = (CfuPlugin_bus_rsp_valid || CfuPlugin_bus_rsp_rValid); + assign CfuPlugin_bus_rsp_rsp_payload_outputs_0 = (CfuPlugin_bus_rsp_rValid ? CfuPlugin_bus_rsp_rData_outputs_0 : CfuPlugin_bus_rsp_payload_outputs_0); + always @(*) begin + CfuPlugin_bus_rsp_rsp_ready = 1'b0; + if(memory_CfuPlugin_CFU_IN_FLIGHT) begin + CfuPlugin_bus_rsp_rsp_ready = (! memory_arbitration_isStuckByOthers); + end + end + + assign when_CfuPlugin_l208 = (! CfuPlugin_bus_rsp_rsp_valid); + assign when_GenCoreDefault_l367 = _zz_when_GenCoreDefault_l367[0]; + assign when_GenCoreDefault_l367_1 = _zz_when_GenCoreDefault_l367_1[0]; + assign when_GenCoreDefault_l367_2 = _zz_when_GenCoreDefault_l367_2[0]; + assign when_GenCoreDefault_l367_3 = _zz_when_GenCoreDefault_l367_3[0]; + assign when_GenCoreDefault_l367_4 = _zz_when_GenCoreDefault_l367_4[0]; + assign when_GenCoreDefault_l367_5 = _zz_when_GenCoreDefault_l367_5[0]; + assign when_GenCoreDefault_l367_6 = _zz_when_GenCoreDefault_l367_6[0]; + assign when_GenCoreDefault_l367_7 = _zz_when_GenCoreDefault_l367_7[0]; + assign when_Pipeline_l124 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_1 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_2 = ((! writeBack_arbitration_isStuck) && (! CsrPlugin_exceptionPortCtrl_exceptionValids_writeBack)); + assign when_Pipeline_l124_3 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_4 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_5 = (! writeBack_arbitration_isStuck); + assign when_Pipeline_l124_6 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_7 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_8 = (! writeBack_arbitration_isStuck); + assign when_Pipeline_l124_9 = (! execute_arbitration_isStuck); + assign _zz_decode_to_execute_SRC1_CTRL_1 = decode_SRC1_CTRL; + assign _zz_decode_SRC1_CTRL = _zz_decode_SRC1_CTRL_1; + assign when_Pipeline_l124_10 = (! execute_arbitration_isStuck); + assign _zz_execute_SRC1_CTRL = decode_to_execute_SRC1_CTRL; + assign when_Pipeline_l124_11 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_12 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_13 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_14 = (! writeBack_arbitration_isStuck); + assign _zz_decode_to_execute_ALU_CTRL_1 = decode_ALU_CTRL; + assign _zz_decode_ALU_CTRL = _zz_decode_ALU_CTRL_1; + assign when_Pipeline_l124_15 = (! execute_arbitration_isStuck); + assign _zz_execute_ALU_CTRL = decode_to_execute_ALU_CTRL; + assign _zz_decode_to_execute_SRC2_CTRL_1 = decode_SRC2_CTRL; + assign _zz_decode_SRC2_CTRL = _zz_decode_SRC2_CTRL_1; + assign when_Pipeline_l124_16 = (! execute_arbitration_isStuck); + assign _zz_execute_SRC2_CTRL = decode_to_execute_SRC2_CTRL; + assign when_Pipeline_l124_17 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_18 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_19 = (! writeBack_arbitration_isStuck); + assign when_Pipeline_l124_20 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_21 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_22 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_23 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_24 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_25 = (! writeBack_arbitration_isStuck); + assign when_Pipeline_l124_26 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_27 = (! execute_arbitration_isStuck); + assign _zz_decode_to_execute_ALU_BITWISE_CTRL_1 = decode_ALU_BITWISE_CTRL; + assign _zz_decode_ALU_BITWISE_CTRL = _zz_decode_ALU_BITWISE_CTRL_1; + assign when_Pipeline_l124_28 = (! execute_arbitration_isStuck); + assign _zz_execute_ALU_BITWISE_CTRL = decode_to_execute_ALU_BITWISE_CTRL; + assign _zz_decode_to_execute_SHIFT_CTRL_1 = decode_SHIFT_CTRL; + assign _zz_execute_to_memory_SHIFT_CTRL_1 = execute_SHIFT_CTRL; + assign _zz_decode_SHIFT_CTRL = _zz_decode_SHIFT_CTRL_1; + assign when_Pipeline_l124_29 = (! execute_arbitration_isStuck); + assign _zz_execute_SHIFT_CTRL = decode_to_execute_SHIFT_CTRL; + assign when_Pipeline_l124_30 = (! memory_arbitration_isStuck); + assign _zz_memory_SHIFT_CTRL = execute_to_memory_SHIFT_CTRL; + assign _zz_decode_to_execute_BRANCH_CTRL_1 = decode_BRANCH_CTRL; + assign _zz_decode_BRANCH_CTRL_1 = _zz_decode_BRANCH_CTRL; + assign when_Pipeline_l124_31 = (! execute_arbitration_isStuck); + assign _zz_execute_BRANCH_CTRL = decode_to_execute_BRANCH_CTRL; + assign when_Pipeline_l124_32 = (! execute_arbitration_isStuck); + assign _zz_decode_to_execute_ENV_CTRL_1 = decode_ENV_CTRL; + assign _zz_execute_to_memory_ENV_CTRL_1 = execute_ENV_CTRL; + assign _zz_memory_to_writeBack_ENV_CTRL_1 = memory_ENV_CTRL; + assign _zz_decode_ENV_CTRL = _zz_decode_ENV_CTRL_1; + assign when_Pipeline_l124_33 = (! execute_arbitration_isStuck); + assign _zz_execute_ENV_CTRL = decode_to_execute_ENV_CTRL; + assign when_Pipeline_l124_34 = (! memory_arbitration_isStuck); + assign _zz_memory_ENV_CTRL = execute_to_memory_ENV_CTRL; + assign when_Pipeline_l124_35 = (! writeBack_arbitration_isStuck); + assign _zz_writeBack_ENV_CTRL = memory_to_writeBack_ENV_CTRL; + assign when_Pipeline_l124_36 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_37 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_38 = (! writeBack_arbitration_isStuck); + assign when_Pipeline_l124_39 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_40 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_41 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_42 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_43 = (! execute_arbitration_isStuck); + assign _zz_decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND_1 = decode_CfuPlugin_CFU_INPUT_2_KIND; + assign _zz_decode_CfuPlugin_CFU_INPUT_2_KIND = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_1; + assign when_Pipeline_l124_44 = (! execute_arbitration_isStuck); + assign _zz_execute_CfuPlugin_CFU_INPUT_2_KIND = decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND; + assign when_Pipeline_l124_45 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_46 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_47 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_48 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_49 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_50 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_51 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_52 = (! writeBack_arbitration_isStuck); + assign when_Pipeline_l124_53 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_54 = (! writeBack_arbitration_isStuck); + assign when_Pipeline_l124_55 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_56 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_57 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_58 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_59 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_60 = (! writeBack_arbitration_isStuck); + assign when_Pipeline_l124_61 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_62 = (! writeBack_arbitration_isStuck); + assign when_Pipeline_l124_63 = (! writeBack_arbitration_isStuck); + assign decode_arbitration_isFlushed = (({writeBack_arbitration_flushNext,{memory_arbitration_flushNext,execute_arbitration_flushNext}} != 3'b000) || ({writeBack_arbitration_flushIt,{memory_arbitration_flushIt,{execute_arbitration_flushIt,decode_arbitration_flushIt}}} != 4'b0000)); + assign execute_arbitration_isFlushed = (({writeBack_arbitration_flushNext,memory_arbitration_flushNext} != 2'b00) || ({writeBack_arbitration_flushIt,{memory_arbitration_flushIt,execute_arbitration_flushIt}} != 3'b000)); + assign memory_arbitration_isFlushed = ((writeBack_arbitration_flushNext != 1'b0) || ({writeBack_arbitration_flushIt,memory_arbitration_flushIt} != 2'b00)); + assign writeBack_arbitration_isFlushed = (1'b0 || (writeBack_arbitration_flushIt != 1'b0)); + assign decode_arbitration_isStuckByOthers = (decode_arbitration_haltByOther || (((1'b0 || execute_arbitration_isStuck) || memory_arbitration_isStuck) || writeBack_arbitration_isStuck)); + assign decode_arbitration_isStuck = (decode_arbitration_haltItself || decode_arbitration_isStuckByOthers); + assign decode_arbitration_isMoving = ((! decode_arbitration_isStuck) && (! decode_arbitration_removeIt)); + assign decode_arbitration_isFiring = ((decode_arbitration_isValid && (! decode_arbitration_isStuck)) && (! decode_arbitration_removeIt)); + assign execute_arbitration_isStuckByOthers = (execute_arbitration_haltByOther || ((1'b0 || memory_arbitration_isStuck) || writeBack_arbitration_isStuck)); + assign execute_arbitration_isStuck = (execute_arbitration_haltItself || execute_arbitration_isStuckByOthers); + assign execute_arbitration_isMoving = ((! execute_arbitration_isStuck) && (! execute_arbitration_removeIt)); + assign execute_arbitration_isFiring = ((execute_arbitration_isValid && (! execute_arbitration_isStuck)) && (! execute_arbitration_removeIt)); + assign memory_arbitration_isStuckByOthers = (memory_arbitration_haltByOther || (1'b0 || writeBack_arbitration_isStuck)); + assign memory_arbitration_isStuck = (memory_arbitration_haltItself || memory_arbitration_isStuckByOthers); + assign memory_arbitration_isMoving = ((! memory_arbitration_isStuck) && (! memory_arbitration_removeIt)); + assign memory_arbitration_isFiring = ((memory_arbitration_isValid && (! memory_arbitration_isStuck)) && (! memory_arbitration_removeIt)); + assign writeBack_arbitration_isStuckByOthers = (writeBack_arbitration_haltByOther || 1'b0); + assign writeBack_arbitration_isStuck = (writeBack_arbitration_haltItself || writeBack_arbitration_isStuckByOthers); + assign writeBack_arbitration_isMoving = ((! writeBack_arbitration_isStuck) && (! writeBack_arbitration_removeIt)); + assign writeBack_arbitration_isFiring = ((writeBack_arbitration_isValid && (! writeBack_arbitration_isStuck)) && (! writeBack_arbitration_removeIt)); + assign when_Pipeline_l151 = ((! execute_arbitration_isStuck) || execute_arbitration_removeIt); + assign when_Pipeline_l154 = ((! decode_arbitration_isStuck) && (! decode_arbitration_removeIt)); + assign when_Pipeline_l151_1 = ((! memory_arbitration_isStuck) || memory_arbitration_removeIt); + assign when_Pipeline_l154_1 = ((! execute_arbitration_isStuck) && (! execute_arbitration_removeIt)); + assign when_Pipeline_l151_2 = ((! writeBack_arbitration_isStuck) || writeBack_arbitration_removeIt); + assign when_Pipeline_l154_2 = ((! memory_arbitration_isStuck) && (! memory_arbitration_removeIt)); + assign when_CsrPlugin_l1264 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_1 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_2 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_3 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_4 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_5 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_6 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_7 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_8 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_9 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_10 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_11 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_12 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_13 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_14 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_15 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_16 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_17 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_18 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_19 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_20 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_21 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_22 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_23 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_24 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_25 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_26 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_27 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_28 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_29 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_30 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_31 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_32 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_33 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_34 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_35 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_36 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_37 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_38 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_39 = (! execute_arbitration_isStuck); + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_10 = 32'h0; + if(execute_CsrPlugin_csr_3264) begin + _zz_CsrPlugin_csrMapping_readDataInit_10[13 : 0] = 14'h2000; + _zz_CsrPlugin_csrMapping_readDataInit_10[25 : 20] = 6'h20; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_11 = 32'h0; + if(execute_CsrPlugin_csr_3857) begin + _zz_CsrPlugin_csrMapping_readDataInit_11[3 : 0] = 4'b1011; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_12 = 32'h0; + if(execute_CsrPlugin_csr_3858) begin + _zz_CsrPlugin_csrMapping_readDataInit_12[4 : 0] = 5'h16; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_13 = 32'h0; + if(execute_CsrPlugin_csr_3859) begin + _zz_CsrPlugin_csrMapping_readDataInit_13[5 : 0] = 6'h21; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_14 = 32'h0; + if(execute_CsrPlugin_csr_769) begin + _zz_CsrPlugin_csrMapping_readDataInit_14[31 : 30] = CsrPlugin_misa_base; + _zz_CsrPlugin_csrMapping_readDataInit_14[25 : 0] = CsrPlugin_misa_extensions; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_15 = 32'h0; + if(execute_CsrPlugin_csr_768) begin + _zz_CsrPlugin_csrMapping_readDataInit_15[12 : 11] = CsrPlugin_mstatus_MPP; + _zz_CsrPlugin_csrMapping_readDataInit_15[7 : 7] = CsrPlugin_mstatus_MPIE; + _zz_CsrPlugin_csrMapping_readDataInit_15[3 : 3] = CsrPlugin_mstatus_MIE; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_16 = 32'h0; + if(execute_CsrPlugin_csr_836) begin + _zz_CsrPlugin_csrMapping_readDataInit_16[11 : 11] = CsrPlugin_mip_MEIP; + _zz_CsrPlugin_csrMapping_readDataInit_16[7 : 7] = CsrPlugin_mip_MTIP; + _zz_CsrPlugin_csrMapping_readDataInit_16[3 : 3] = CsrPlugin_mip_MSIP; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_17 = 32'h0; + if(execute_CsrPlugin_csr_772) begin + _zz_CsrPlugin_csrMapping_readDataInit_17[11 : 11] = CsrPlugin_mie_MEIE; + _zz_CsrPlugin_csrMapping_readDataInit_17[7 : 7] = CsrPlugin_mie_MTIE; + _zz_CsrPlugin_csrMapping_readDataInit_17[3 : 3] = CsrPlugin_mie_MSIE; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_18 = 32'h0; + if(execute_CsrPlugin_csr_773) begin + _zz_CsrPlugin_csrMapping_readDataInit_18[31 : 2] = CsrPlugin_mtvec_base; + _zz_CsrPlugin_csrMapping_readDataInit_18[1 : 0] = CsrPlugin_mtvec_mode; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_19 = 32'h0; + if(execute_CsrPlugin_csr_833) begin + _zz_CsrPlugin_csrMapping_readDataInit_19[31 : 0] = CsrPlugin_mepc; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_20 = 32'h0; + if(execute_CsrPlugin_csr_832) begin + _zz_CsrPlugin_csrMapping_readDataInit_20[31 : 0] = CsrPlugin_mscratch; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_21 = 32'h0; + if(execute_CsrPlugin_csr_834) begin + _zz_CsrPlugin_csrMapping_readDataInit_21[31 : 31] = CsrPlugin_mcause_interrupt; + _zz_CsrPlugin_csrMapping_readDataInit_21[3 : 0] = CsrPlugin_mcause_exceptionCode; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_22 = 32'h0; + if(execute_CsrPlugin_csr_835) begin + _zz_CsrPlugin_csrMapping_readDataInit_22[31 : 0] = CsrPlugin_mtval; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_23 = 32'h0; + if(execute_CsrPlugin_csr_2816) begin + _zz_CsrPlugin_csrMapping_readDataInit_23[31 : 0] = CsrPlugin_mcycle[31 : 0]; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_24 = 32'h0; + if(execute_CsrPlugin_csr_2944) begin + _zz_CsrPlugin_csrMapping_readDataInit_24[31 : 0] = CsrPlugin_mcycle[63 : 32]; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_25 = 32'h0; + if(execute_CsrPlugin_csr_2818) begin + _zz_CsrPlugin_csrMapping_readDataInit_25[31 : 0] = CsrPlugin_minstret[31 : 0]; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_26 = 32'h0; + if(execute_CsrPlugin_csr_2946) begin + _zz_CsrPlugin_csrMapping_readDataInit_26[31 : 0] = CsrPlugin_minstret[63 : 32]; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_27 = 32'h0; + if(execute_CsrPlugin_csr_3072) begin + _zz_CsrPlugin_csrMapping_readDataInit_27[31 : 0] = CsrPlugin_mcycle[31 : 0]; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_28 = 32'h0; + if(execute_CsrPlugin_csr_3200) begin + _zz_CsrPlugin_csrMapping_readDataInit_28[31 : 0] = CsrPlugin_mcycle[63 : 32]; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_29 = 32'h0; + if(execute_CsrPlugin_csr_3074) begin + _zz_CsrPlugin_csrMapping_readDataInit_29[31 : 0] = CsrPlugin_minstret[31 : 0]; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_30 = 32'h0; + if(execute_CsrPlugin_csr_3202) begin + _zz_CsrPlugin_csrMapping_readDataInit_30[31 : 0] = CsrPlugin_minstret[63 : 32]; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_31 = 32'h0; + if(execute_CsrPlugin_csr_3008) begin + _zz_CsrPlugin_csrMapping_readDataInit_31[31 : 0] = _zz_CsrPlugin_csrMapping_readDataInit; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_32 = 32'h0; + if(execute_CsrPlugin_csr_4032) begin + _zz_CsrPlugin_csrMapping_readDataInit_32[31 : 0] = _zz_CsrPlugin_csrMapping_readDataInit_1; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_33 = 32'h0; + if(execute_CsrPlugin_csr_2820) begin + _zz_CsrPlugin_csrMapping_readDataInit_33[31 : 0] = _zz_CsrPlugin_csrMapping_readDataInit_2; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_34 = 32'h0; + if(execute_CsrPlugin_csr_2822) begin + _zz_CsrPlugin_csrMapping_readDataInit_34[31 : 0] = _zz_CsrPlugin_csrMapping_readDataInit_3; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_35 = 32'h0; + if(execute_CsrPlugin_csr_2824) begin + _zz_CsrPlugin_csrMapping_readDataInit_35[31 : 0] = _zz_CsrPlugin_csrMapping_readDataInit_4; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_36 = 32'h0; + if(execute_CsrPlugin_csr_2826) begin + _zz_CsrPlugin_csrMapping_readDataInit_36[31 : 0] = _zz_CsrPlugin_csrMapping_readDataInit_5; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_37 = 32'h0; + if(execute_CsrPlugin_csr_2828) begin + _zz_CsrPlugin_csrMapping_readDataInit_37[31 : 0] = _zz_CsrPlugin_csrMapping_readDataInit_6; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_38 = 32'h0; + if(execute_CsrPlugin_csr_2830) begin + _zz_CsrPlugin_csrMapping_readDataInit_38[31 : 0] = _zz_CsrPlugin_csrMapping_readDataInit_7; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_39 = 32'h0; + if(execute_CsrPlugin_csr_2832) begin + _zz_CsrPlugin_csrMapping_readDataInit_39[31 : 0] = _zz_CsrPlugin_csrMapping_readDataInit_8; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_40 = 32'h0; + if(execute_CsrPlugin_csr_2834) begin + _zz_CsrPlugin_csrMapping_readDataInit_40[31 : 0] = _zz_CsrPlugin_csrMapping_readDataInit_9; + end + end + + assign CsrPlugin_csrMapping_readDataInit = (((((_zz_CsrPlugin_csrMapping_readDataInit_10 | _zz_CsrPlugin_csrMapping_readDataInit_11) | (_zz_CsrPlugin_csrMapping_readDataInit_12 | _zz_CsrPlugin_csrMapping_readDataInit_13)) | ((_zz_CsrPlugin_csrMapping_readDataInit_41 | _zz_CsrPlugin_csrMapping_readDataInit_14) | (_zz_CsrPlugin_csrMapping_readDataInit_15 | _zz_CsrPlugin_csrMapping_readDataInit_16))) | (((_zz_CsrPlugin_csrMapping_readDataInit_17 | _zz_CsrPlugin_csrMapping_readDataInit_18) | (_zz_CsrPlugin_csrMapping_readDataInit_19 | _zz_CsrPlugin_csrMapping_readDataInit_20)) | ((_zz_CsrPlugin_csrMapping_readDataInit_21 | _zz_CsrPlugin_csrMapping_readDataInit_22) | (_zz_CsrPlugin_csrMapping_readDataInit_23 | _zz_CsrPlugin_csrMapping_readDataInit_24)))) | ((((_zz_CsrPlugin_csrMapping_readDataInit_25 | _zz_CsrPlugin_csrMapping_readDataInit_26) | (_zz_CsrPlugin_csrMapping_readDataInit_27 | _zz_CsrPlugin_csrMapping_readDataInit_28)) | ((_zz_CsrPlugin_csrMapping_readDataInit_29 | _zz_CsrPlugin_csrMapping_readDataInit_30) | (_zz_CsrPlugin_csrMapping_readDataInit_31 | _zz_CsrPlugin_csrMapping_readDataInit_32))) | (((_zz_CsrPlugin_csrMapping_readDataInit_33 | _zz_CsrPlugin_csrMapping_readDataInit_34) | (_zz_CsrPlugin_csrMapping_readDataInit_35 | _zz_CsrPlugin_csrMapping_readDataInit_36)) | ((_zz_CsrPlugin_csrMapping_readDataInit_37 | _zz_CsrPlugin_csrMapping_readDataInit_38) | (_zz_CsrPlugin_csrMapping_readDataInit_39 | _zz_CsrPlugin_csrMapping_readDataInit_40))))); + assign when_CsrPlugin_l1297 = (CsrPlugin_privilege < execute_CsrPlugin_csrAddress[9 : 8]); + assign when_CsrPlugin_l1302 = ((! execute_arbitration_isValid) || (! execute_IS_CSR)); + assign iBusWishbone_ADR = {_zz_iBusWishbone_ADR_1,_zz_iBusWishbone_ADR}; + assign iBusWishbone_CTI = ((_zz_iBusWishbone_ADR == 3'b111) ? 3'b111 : 3'b010); + assign iBusWishbone_BTE = 2'b00; + assign iBusWishbone_SEL = 4'b1111; + assign iBusWishbone_WE = 1'b0; + assign iBusWishbone_DAT_MOSI = 32'bxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx; + always @(*) begin + iBusWishbone_CYC = 1'b0; + if(when_InstructionCache_l239) begin + iBusWishbone_CYC = 1'b1; + end + end + + always @(*) begin + iBusWishbone_STB = 1'b0; + if(when_InstructionCache_l239) begin + iBusWishbone_STB = 1'b1; + end + end + + assign when_InstructionCache_l239 = (iBus_cmd_valid || (_zz_iBusWishbone_ADR != 3'b000)); + assign iBus_cmd_ready = (iBus_cmd_valid && iBusWishbone_ACK); + assign iBus_rsp_valid = _zz_iBus_rsp_valid; + assign iBus_rsp_payload_data = iBusWishbone_DAT_MISO_regNext; + assign iBus_rsp_payload_error = 1'b0; + assign _zz_dBus_cmd_ready_5 = (dBus_cmd_payload_size == 3'b101); + assign _zz_dBus_cmd_ready_1 = dBus_cmd_valid; + assign _zz_dBus_cmd_ready_3 = dBus_cmd_payload_wr; + assign _zz_dBus_cmd_ready_4 = ((! _zz_dBus_cmd_ready_5) || (_zz_dBus_cmd_ready == 3'b111)); + assign dBus_cmd_ready = (_zz_dBus_cmd_ready_2 && (_zz_dBus_cmd_ready_3 || _zz_dBus_cmd_ready_4)); + assign dBusWishbone_ADR = ((_zz_dBus_cmd_ready_5 ? {{dBus_cmd_payload_address[31 : 5],_zz_dBus_cmd_ready},2'b00} : {dBus_cmd_payload_address[31 : 2],2'b00}) >>> 2); + assign dBusWishbone_CTI = (_zz_dBus_cmd_ready_5 ? (_zz_dBus_cmd_ready_4 ? 3'b111 : 3'b010) : 3'b000); + assign dBusWishbone_BTE = 2'b00; + assign dBusWishbone_SEL = (_zz_dBus_cmd_ready_3 ? dBus_cmd_payload_mask : 4'b1111); + assign dBusWishbone_WE = _zz_dBus_cmd_ready_3; + assign dBusWishbone_DAT_MOSI = dBus_cmd_payload_data; + assign _zz_dBus_cmd_ready_2 = (_zz_dBus_cmd_ready_1 && dBusWishbone_ACK); + assign dBusWishbone_CYC = _zz_dBus_cmd_ready_1; + assign dBusWishbone_STB = _zz_dBus_cmd_ready_1; + assign dBus_rsp_valid = _zz_dBus_rsp_valid; + assign dBus_rsp_payload_data = dBusWishbone_DAT_MISO_regNext; + assign dBus_rsp_payload_error = 1'b0; + always @(posedge clk) begin + if(reset) begin + IBusCachedPlugin_fetchPc_pcReg <= externalResetVector; + IBusCachedPlugin_fetchPc_correctionReg <= 1'b0; + IBusCachedPlugin_fetchPc_booted <= 1'b0; + IBusCachedPlugin_fetchPc_inc <= 1'b0; + _zz_IBusCachedPlugin_iBusRsp_stages_0_output_ready_2 <= 1'b0; + _zz_IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_valid <= 1'b0; + IBusCachedPlugin_injector_nextPcCalc_valids_0 <= 1'b0; + IBusCachedPlugin_injector_nextPcCalc_valids_1 <= 1'b0; + IBusCachedPlugin_injector_nextPcCalc_valids_2 <= 1'b0; + IBusCachedPlugin_injector_nextPcCalc_valids_3 <= 1'b0; + IBusCachedPlugin_injector_nextPcCalc_valids_4 <= 1'b0; + IBusCachedPlugin_rspCounter <= _zz_IBusCachedPlugin_rspCounter; + IBusCachedPlugin_rspCounter <= 32'h0; + dataCache_1_io_mem_cmd_rValid <= 1'b0; + dataCache_1_io_mem_cmd_s2mPipe_rValid <= 1'b0; + DBusCachedPlugin_rspCounter <= _zz_DBusCachedPlugin_rspCounter; + DBusCachedPlugin_rspCounter <= 32'h0; + _zz_7 <= 1'b1; + HazardSimplePlugin_writeBackBuffer_valid <= 1'b0; + CsrPlugin_misa_base <= 2'b01; + CsrPlugin_misa_extensions <= 26'h0000042; + CsrPlugin_mstatus_MIE <= 1'b0; + CsrPlugin_mstatus_MPIE <= 1'b0; + CsrPlugin_mstatus_MPP <= 2'b11; + CsrPlugin_mie_MEIE <= 1'b0; + CsrPlugin_mie_MTIE <= 1'b0; + CsrPlugin_mie_MSIE <= 1'b0; + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_decode <= 1'b0; + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_execute <= 1'b0; + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_memory <= 1'b0; + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_writeBack <= 1'b0; + CsrPlugin_interrupt_valid <= 1'b0; + CsrPlugin_lastStageWasWfi <= 1'b0; + CsrPlugin_pipelineLiberator_pcValids_0 <= 1'b0; + CsrPlugin_pipelineLiberator_pcValids_1 <= 1'b0; + CsrPlugin_pipelineLiberator_pcValids_2 <= 1'b0; + CsrPlugin_hadException <= 1'b0; + execute_CsrPlugin_wfiWake <= 1'b0; + memory_DivPlugin_div_counter_value <= 6'h0; + _zz_CsrPlugin_csrMapping_readDataInit <= 32'h0; + execute_CfuPlugin_hold <= 1'b0; + execute_CfuPlugin_fired <= 1'b0; + CfuPlugin_bus_rsp_rValid <= 1'b0; + execute_arbitration_isValid <= 1'b0; + memory_arbitration_isValid <= 1'b0; + writeBack_arbitration_isValid <= 1'b0; + execute_to_memory_CfuPlugin_CFU_IN_FLIGHT <= 1'b0; + _zz_iBusWishbone_ADR <= 3'b000; + _zz_iBus_rsp_valid <= 1'b0; + _zz_dBus_cmd_ready <= 3'b000; + _zz_dBus_rsp_valid <= 1'b0; + end else begin + if(IBusCachedPlugin_fetchPc_correction) begin + IBusCachedPlugin_fetchPc_correctionReg <= 1'b1; + end + if(IBusCachedPlugin_fetchPc_output_fire) begin + IBusCachedPlugin_fetchPc_correctionReg <= 1'b0; + end + IBusCachedPlugin_fetchPc_booted <= 1'b1; + if(when_Fetcher_l131) begin + IBusCachedPlugin_fetchPc_inc <= 1'b0; + end + if(IBusCachedPlugin_fetchPc_output_fire_1) begin + IBusCachedPlugin_fetchPc_inc <= 1'b1; + end + if(when_Fetcher_l131_1) begin + IBusCachedPlugin_fetchPc_inc <= 1'b0; + end + if(when_Fetcher_l158) begin + IBusCachedPlugin_fetchPc_pcReg <= IBusCachedPlugin_fetchPc_pc; + end + if(IBusCachedPlugin_iBusRsp_flush) begin + _zz_IBusCachedPlugin_iBusRsp_stages_0_output_ready_2 <= 1'b0; + end + if(_zz_IBusCachedPlugin_iBusRsp_stages_0_output_ready) begin + _zz_IBusCachedPlugin_iBusRsp_stages_0_output_ready_2 <= (IBusCachedPlugin_iBusRsp_stages_0_output_valid && (! 1'b0)); + end + if(IBusCachedPlugin_iBusRsp_flush) begin + _zz_IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_valid <= 1'b0; + end + if(IBusCachedPlugin_iBusRsp_stages_1_output_ready) begin + _zz_IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_valid <= (IBusCachedPlugin_iBusRsp_stages_1_output_valid && (! IBusCachedPlugin_iBusRsp_flush)); + end + if(IBusCachedPlugin_fetchPc_flushed) begin + IBusCachedPlugin_injector_nextPcCalc_valids_0 <= 1'b0; + end + if(when_Fetcher_l329) begin + IBusCachedPlugin_injector_nextPcCalc_valids_0 <= 1'b1; + end + if(IBusCachedPlugin_fetchPc_flushed) begin + IBusCachedPlugin_injector_nextPcCalc_valids_1 <= 1'b0; + end + if(when_Fetcher_l329_1) begin + IBusCachedPlugin_injector_nextPcCalc_valids_1 <= IBusCachedPlugin_injector_nextPcCalc_valids_0; + end + if(IBusCachedPlugin_fetchPc_flushed) begin + IBusCachedPlugin_injector_nextPcCalc_valids_1 <= 1'b0; + end + if(IBusCachedPlugin_fetchPc_flushed) begin + IBusCachedPlugin_injector_nextPcCalc_valids_2 <= 1'b0; + end + if(when_Fetcher_l329_2) begin + IBusCachedPlugin_injector_nextPcCalc_valids_2 <= IBusCachedPlugin_injector_nextPcCalc_valids_1; + end + if(IBusCachedPlugin_fetchPc_flushed) begin + IBusCachedPlugin_injector_nextPcCalc_valids_2 <= 1'b0; + end + if(IBusCachedPlugin_fetchPc_flushed) begin + IBusCachedPlugin_injector_nextPcCalc_valids_3 <= 1'b0; + end + if(when_Fetcher_l329_3) begin + IBusCachedPlugin_injector_nextPcCalc_valids_3 <= IBusCachedPlugin_injector_nextPcCalc_valids_2; + end + if(IBusCachedPlugin_fetchPc_flushed) begin + IBusCachedPlugin_injector_nextPcCalc_valids_3 <= 1'b0; + end + if(IBusCachedPlugin_fetchPc_flushed) begin + IBusCachedPlugin_injector_nextPcCalc_valids_4 <= 1'b0; + end + if(when_Fetcher_l329_4) begin + IBusCachedPlugin_injector_nextPcCalc_valids_4 <= IBusCachedPlugin_injector_nextPcCalc_valids_3; + end + if(IBusCachedPlugin_fetchPc_flushed) begin + IBusCachedPlugin_injector_nextPcCalc_valids_4 <= 1'b0; + end + if(iBus_rsp_valid) begin + IBusCachedPlugin_rspCounter <= (IBusCachedPlugin_rspCounter + 32'h00000001); + end + if(dataCache_1_io_mem_cmd_valid) begin + dataCache_1_io_mem_cmd_rValid <= 1'b1; + end + if(dataCache_1_io_mem_cmd_s2mPipe_ready) begin + dataCache_1_io_mem_cmd_rValid <= 1'b0; + end + if(dataCache_1_io_mem_cmd_s2mPipe_ready) begin + dataCache_1_io_mem_cmd_s2mPipe_rValid <= dataCache_1_io_mem_cmd_s2mPipe_valid; + end + if(dBus_rsp_valid) begin + DBusCachedPlugin_rspCounter <= (DBusCachedPlugin_rspCounter + 32'h00000001); + end + _zz_7 <= 1'b0; + HazardSimplePlugin_writeBackBuffer_valid <= HazardSimplePlugin_writeBackWrites_valid; + if(when_CsrPlugin_l909) begin + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_decode <= 1'b0; + end else begin + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_decode <= CsrPlugin_exceptionPortCtrl_exceptionValids_decode; + end + if(when_CsrPlugin_l909_1) begin + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_execute <= (CsrPlugin_exceptionPortCtrl_exceptionValids_decode && (! decode_arbitration_isStuck)); + end else begin + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_execute <= CsrPlugin_exceptionPortCtrl_exceptionValids_execute; + end + if(when_CsrPlugin_l909_2) begin + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_memory <= (CsrPlugin_exceptionPortCtrl_exceptionValids_execute && (! execute_arbitration_isStuck)); + end else begin + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_memory <= CsrPlugin_exceptionPortCtrl_exceptionValids_memory; + end + if(when_CsrPlugin_l909_3) begin + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_writeBack <= (CsrPlugin_exceptionPortCtrl_exceptionValids_memory && (! memory_arbitration_isStuck)); + end else begin + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_writeBack <= 1'b0; + end + CsrPlugin_interrupt_valid <= 1'b0; + if(when_CsrPlugin_l946) begin + if(when_CsrPlugin_l952) begin + CsrPlugin_interrupt_valid <= 1'b1; + end + if(when_CsrPlugin_l952_1) begin + CsrPlugin_interrupt_valid <= 1'b1; + end + if(when_CsrPlugin_l952_2) begin + CsrPlugin_interrupt_valid <= 1'b1; + end + end + CsrPlugin_lastStageWasWfi <= (writeBack_arbitration_isFiring && (writeBack_ENV_CTRL == `EnvCtrlEnum_binary_sequential_WFI)); + if(CsrPlugin_pipelineLiberator_active) begin + if(when_CsrPlugin_l980) begin + CsrPlugin_pipelineLiberator_pcValids_0 <= 1'b1; + end + if(when_CsrPlugin_l980_1) begin + CsrPlugin_pipelineLiberator_pcValids_1 <= CsrPlugin_pipelineLiberator_pcValids_0; + end + if(when_CsrPlugin_l980_2) begin + CsrPlugin_pipelineLiberator_pcValids_2 <= CsrPlugin_pipelineLiberator_pcValids_1; + end + end + if(when_CsrPlugin_l985) begin + CsrPlugin_pipelineLiberator_pcValids_0 <= 1'b0; + CsrPlugin_pipelineLiberator_pcValids_1 <= 1'b0; + CsrPlugin_pipelineLiberator_pcValids_2 <= 1'b0; + end + if(CsrPlugin_interruptJump) begin + CsrPlugin_interrupt_valid <= 1'b0; + end + CsrPlugin_hadException <= CsrPlugin_exception; + if(when_CsrPlugin_l1019) begin + case(CsrPlugin_targetPrivilege) + 2'b11 : begin + CsrPlugin_mstatus_MIE <= 1'b0; + CsrPlugin_mstatus_MPIE <= CsrPlugin_mstatus_MIE; + CsrPlugin_mstatus_MPP <= CsrPlugin_privilege; + end + default : begin + end + endcase + end + if(when_CsrPlugin_l1064) begin + case(switch_CsrPlugin_l1068) + 2'b11 : begin + CsrPlugin_mstatus_MPP <= 2'b00; + CsrPlugin_mstatus_MIE <= CsrPlugin_mstatus_MPIE; + CsrPlugin_mstatus_MPIE <= 1'b1; + end + default : begin + end + endcase + end + execute_CsrPlugin_wfiWake <= (({_zz_when_CsrPlugin_l952_2,{_zz_when_CsrPlugin_l952_1,_zz_when_CsrPlugin_l952}} != 3'b000) || CsrPlugin_thirdPartyWake); + memory_DivPlugin_div_counter_value <= memory_DivPlugin_div_counter_valueNext; + if(execute_CfuPlugin_schedule) begin + execute_CfuPlugin_hold <= 1'b1; + end + if(CfuPlugin_bus_cmd_ready) begin + execute_CfuPlugin_hold <= 1'b0; + end + if(CfuPlugin_bus_cmd_fire) begin + execute_CfuPlugin_fired <= 1'b1; + end + if(when_CfuPlugin_l171) begin + execute_CfuPlugin_fired <= 1'b0; + end + if(CfuPlugin_bus_rsp_valid) begin + CfuPlugin_bus_rsp_rValid <= 1'b1; + end + if(CfuPlugin_bus_rsp_rsp_ready) begin + CfuPlugin_bus_rsp_rValid <= 1'b0; + end + if(when_Pipeline_l124_61) begin + execute_to_memory_CfuPlugin_CFU_IN_FLIGHT <= _zz_execute_to_memory_CfuPlugin_CFU_IN_FLIGHT; + end + if(when_Pipeline_l151) begin + execute_arbitration_isValid <= 1'b0; + end + if(when_Pipeline_l154) begin + execute_arbitration_isValid <= decode_arbitration_isValid; + end + if(when_Pipeline_l151_1) begin + memory_arbitration_isValid <= 1'b0; + end + if(when_Pipeline_l154_1) begin + memory_arbitration_isValid <= execute_arbitration_isValid; + end + if(when_Pipeline_l151_2) begin + writeBack_arbitration_isValid <= 1'b0; + end + if(when_Pipeline_l154_2) begin + writeBack_arbitration_isValid <= memory_arbitration_isValid; + end + if(execute_CsrPlugin_csr_769) begin + if(execute_CsrPlugin_writeEnable) begin + CsrPlugin_misa_base <= CsrPlugin_csrMapping_writeDataSignal[31 : 30]; + CsrPlugin_misa_extensions <= CsrPlugin_csrMapping_writeDataSignal[25 : 0]; + end + end + if(execute_CsrPlugin_csr_768) begin + if(execute_CsrPlugin_writeEnable) begin + CsrPlugin_mstatus_MPP <= CsrPlugin_csrMapping_writeDataSignal[12 : 11]; + CsrPlugin_mstatus_MPIE <= CsrPlugin_csrMapping_writeDataSignal[7]; + CsrPlugin_mstatus_MIE <= CsrPlugin_csrMapping_writeDataSignal[3]; + end + end + if(execute_CsrPlugin_csr_772) begin + if(execute_CsrPlugin_writeEnable) begin + CsrPlugin_mie_MEIE <= CsrPlugin_csrMapping_writeDataSignal[11]; + CsrPlugin_mie_MTIE <= CsrPlugin_csrMapping_writeDataSignal[7]; + CsrPlugin_mie_MSIE <= CsrPlugin_csrMapping_writeDataSignal[3]; + end + end + if(execute_CsrPlugin_csr_3008) begin + if(execute_CsrPlugin_writeEnable) begin + _zz_CsrPlugin_csrMapping_readDataInit <= CsrPlugin_csrMapping_writeDataSignal[31 : 0]; + end + end + if(when_InstructionCache_l239) begin + if(iBusWishbone_ACK) begin + _zz_iBusWishbone_ADR <= (_zz_iBusWishbone_ADR + 3'b001); + end + end + _zz_iBus_rsp_valid <= (iBusWishbone_CYC && iBusWishbone_ACK); + if((_zz_dBus_cmd_ready_1 && _zz_dBus_cmd_ready_2)) begin + _zz_dBus_cmd_ready <= (_zz_dBus_cmd_ready + 3'b001); + if(_zz_dBus_cmd_ready_4) begin + _zz_dBus_cmd_ready <= 3'b000; + end + end + _zz_dBus_rsp_valid <= ((_zz_dBus_cmd_ready_1 && (! dBusWishbone_WE)) && dBusWishbone_ACK); + end + end + + always @(posedge clk) begin + if(IBusCachedPlugin_iBusRsp_stages_1_output_ready) begin + _zz_IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_payload <= IBusCachedPlugin_iBusRsp_stages_1_output_payload; + end + if(IBusCachedPlugin_iBusRsp_stages_1_input_ready) begin + IBusCachedPlugin_s1_tightlyCoupledHit <= IBusCachedPlugin_s0_tightlyCoupledHit; + end + if(IBusCachedPlugin_iBusRsp_stages_2_input_ready) begin + IBusCachedPlugin_s2_tightlyCoupledHit <= IBusCachedPlugin_s1_tightlyCoupledHit; + end + if(dataCache_1_io_mem_cmd_ready) begin + dataCache_1_io_mem_cmd_rData_wr <= dataCache_1_io_mem_cmd_payload_wr; + dataCache_1_io_mem_cmd_rData_uncached <= dataCache_1_io_mem_cmd_payload_uncached; + dataCache_1_io_mem_cmd_rData_address <= dataCache_1_io_mem_cmd_payload_address; + dataCache_1_io_mem_cmd_rData_data <= dataCache_1_io_mem_cmd_payload_data; + dataCache_1_io_mem_cmd_rData_mask <= dataCache_1_io_mem_cmd_payload_mask; + dataCache_1_io_mem_cmd_rData_size <= dataCache_1_io_mem_cmd_payload_size; + dataCache_1_io_mem_cmd_rData_last <= dataCache_1_io_mem_cmd_payload_last; + end + if(dataCache_1_io_mem_cmd_s2mPipe_ready) begin + dataCache_1_io_mem_cmd_s2mPipe_rData_wr <= dataCache_1_io_mem_cmd_s2mPipe_payload_wr; + dataCache_1_io_mem_cmd_s2mPipe_rData_uncached <= dataCache_1_io_mem_cmd_s2mPipe_payload_uncached; + dataCache_1_io_mem_cmd_s2mPipe_rData_address <= dataCache_1_io_mem_cmd_s2mPipe_payload_address; + dataCache_1_io_mem_cmd_s2mPipe_rData_data <= dataCache_1_io_mem_cmd_s2mPipe_payload_data; + dataCache_1_io_mem_cmd_s2mPipe_rData_mask <= dataCache_1_io_mem_cmd_s2mPipe_payload_mask; + dataCache_1_io_mem_cmd_s2mPipe_rData_size <= dataCache_1_io_mem_cmd_s2mPipe_payload_size; + dataCache_1_io_mem_cmd_s2mPipe_rData_last <= dataCache_1_io_mem_cmd_s2mPipe_payload_last; + end + HazardSimplePlugin_writeBackBuffer_payload_address <= HazardSimplePlugin_writeBackWrites_payload_address; + HazardSimplePlugin_writeBackBuffer_payload_data <= HazardSimplePlugin_writeBackWrites_payload_data; + CsrPlugin_mip_MEIP <= externalInterrupt; + CsrPlugin_mip_MTIP <= timerInterrupt; + CsrPlugin_mip_MSIP <= softwareInterrupt; + CsrPlugin_mcycle <= (CsrPlugin_mcycle + 64'h0000000000000001); + if(writeBack_arbitration_isFiring) begin + CsrPlugin_minstret <= (CsrPlugin_minstret + 64'h0000000000000001); + end + if(_zz_when) begin + CsrPlugin_exceptionPortCtrl_exceptionContext_code <= (_zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_1 ? IBusCachedPlugin_decodeExceptionPort_payload_code : decodeExceptionPort_payload_code); + CsrPlugin_exceptionPortCtrl_exceptionContext_badAddr <= (_zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_1 ? IBusCachedPlugin_decodeExceptionPort_payload_badAddr : decodeExceptionPort_payload_badAddr); + end + if(_zz_when_1) begin + CsrPlugin_exceptionPortCtrl_exceptionContext_code <= (_zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_3 ? BranchPlugin_branchExceptionPort_payload_code : CsrPlugin_selfException_payload_code); + CsrPlugin_exceptionPortCtrl_exceptionContext_badAddr <= (_zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_3 ? BranchPlugin_branchExceptionPort_payload_badAddr : CsrPlugin_selfException_payload_badAddr); + end + if(DBusCachedPlugin_exceptionBus_valid) begin + CsrPlugin_exceptionPortCtrl_exceptionContext_code <= DBusCachedPlugin_exceptionBus_payload_code; + CsrPlugin_exceptionPortCtrl_exceptionContext_badAddr <= DBusCachedPlugin_exceptionBus_payload_badAddr; + end + if(when_CsrPlugin_l946) begin + if(when_CsrPlugin_l952) begin + CsrPlugin_interrupt_code <= 4'b0111; + CsrPlugin_interrupt_targetPrivilege <= 2'b11; + end + if(when_CsrPlugin_l952_1) begin + CsrPlugin_interrupt_code <= 4'b0011; + CsrPlugin_interrupt_targetPrivilege <= 2'b11; + end + if(when_CsrPlugin_l952_2) begin + CsrPlugin_interrupt_code <= 4'b1011; + CsrPlugin_interrupt_targetPrivilege <= 2'b11; + end + end + if(when_CsrPlugin_l1019) begin + case(CsrPlugin_targetPrivilege) + 2'b11 : begin + CsrPlugin_mcause_interrupt <= (! CsrPlugin_hadException); + CsrPlugin_mcause_exceptionCode <= CsrPlugin_trapCause; + CsrPlugin_mepc <= writeBack_PC; + if(CsrPlugin_hadException) begin + CsrPlugin_mtval <= CsrPlugin_exceptionPortCtrl_exceptionContext_badAddr; + end + end + default : begin + end + endcase + end + if(when_MulDivIterativePlugin_l126) begin + memory_DivPlugin_div_done <= 1'b1; + end + if(when_MulDivIterativePlugin_l126_1) begin + memory_DivPlugin_div_done <= 1'b0; + end + if(when_MulDivIterativePlugin_l128) begin + if(when_MulDivIterativePlugin_l132) begin + memory_DivPlugin_rs1[31 : 0] <= memory_DivPlugin_div_stage_0_outNumerator; + memory_DivPlugin_accumulator[31 : 0] <= memory_DivPlugin_div_stage_0_outRemainder; + if(when_MulDivIterativePlugin_l151) begin + memory_DivPlugin_div_result <= _zz_memory_DivPlugin_div_result_1[31:0]; + end + end + end + if(when_MulDivIterativePlugin_l162) begin + memory_DivPlugin_accumulator <= 65'h0; + memory_DivPlugin_rs1 <= ((_zz_memory_DivPlugin_rs1 ? (~ _zz_memory_DivPlugin_rs1_1) : _zz_memory_DivPlugin_rs1_1) + _zz_memory_DivPlugin_rs1_2); + memory_DivPlugin_rs2 <= ((_zz_memory_DivPlugin_rs2 ? (~ execute_RS2) : execute_RS2) + _zz_memory_DivPlugin_rs2_1); + memory_DivPlugin_div_needRevert <= ((_zz_memory_DivPlugin_rs1 ^ (_zz_memory_DivPlugin_rs2 && (! execute_INSTRUCTION[13]))) && (! (((execute_RS2 == 32'h0) && execute_IS_RS2_SIGNED) && (! execute_INSTRUCTION[13])))); + end + externalInterruptArray_regNext <= externalInterruptArray; + if(CfuPlugin_bus_rsp_ready) begin + CfuPlugin_bus_rsp_rData_outputs_0 <= CfuPlugin_bus_rsp_payload_outputs_0; + end + if(when_GenCoreDefault_l367) begin + _zz_CsrPlugin_csrMapping_readDataInit_2 <= (_zz_CsrPlugin_csrMapping_readDataInit_2 + 32'h00000001); + end + if(when_GenCoreDefault_l367_1) begin + _zz_CsrPlugin_csrMapping_readDataInit_3 <= (_zz_CsrPlugin_csrMapping_readDataInit_3 + 32'h00000001); + end + if(when_GenCoreDefault_l367_2) begin + _zz_CsrPlugin_csrMapping_readDataInit_4 <= (_zz_CsrPlugin_csrMapping_readDataInit_4 + 32'h00000001); + end + if(when_GenCoreDefault_l367_3) begin + _zz_CsrPlugin_csrMapping_readDataInit_5 <= (_zz_CsrPlugin_csrMapping_readDataInit_5 + 32'h00000001); + end + if(when_GenCoreDefault_l367_4) begin + _zz_CsrPlugin_csrMapping_readDataInit_6 <= (_zz_CsrPlugin_csrMapping_readDataInit_6 + 32'h00000001); + end + if(when_GenCoreDefault_l367_5) begin + _zz_CsrPlugin_csrMapping_readDataInit_7 <= (_zz_CsrPlugin_csrMapping_readDataInit_7 + 32'h00000001); + end + if(when_GenCoreDefault_l367_6) begin + _zz_CsrPlugin_csrMapping_readDataInit_8 <= (_zz_CsrPlugin_csrMapping_readDataInit_8 + 32'h00000001); + end + if(when_GenCoreDefault_l367_7) begin + _zz_CsrPlugin_csrMapping_readDataInit_9 <= (_zz_CsrPlugin_csrMapping_readDataInit_9 + 32'h00000001); + end + if(when_Pipeline_l124) begin + decode_to_execute_PC <= decode_PC; + end + if(when_Pipeline_l124_1) begin + execute_to_memory_PC <= _zz_execute_SRC2; + end + if(when_Pipeline_l124_2) begin + memory_to_writeBack_PC <= memory_PC; + end + if(when_Pipeline_l124_3) begin + decode_to_execute_INSTRUCTION <= decode_INSTRUCTION; + end + if(when_Pipeline_l124_4) begin + execute_to_memory_INSTRUCTION <= execute_INSTRUCTION; + end + if(when_Pipeline_l124_5) begin + memory_to_writeBack_INSTRUCTION <= memory_INSTRUCTION; + end + if(when_Pipeline_l124_6) begin + decode_to_execute_FORMAL_PC_NEXT <= _zz_decode_to_execute_FORMAL_PC_NEXT; + end + if(when_Pipeline_l124_7) begin + execute_to_memory_FORMAL_PC_NEXT <= _zz_execute_to_memory_FORMAL_PC_NEXT; + end + if(when_Pipeline_l124_8) begin + memory_to_writeBack_FORMAL_PC_NEXT <= memory_FORMAL_PC_NEXT; + end + if(when_Pipeline_l124_9) begin + decode_to_execute_MEMORY_FORCE_CONSTISTENCY <= decode_MEMORY_FORCE_CONSTISTENCY; + end + if(when_Pipeline_l124_10) begin + decode_to_execute_SRC1_CTRL <= _zz_decode_to_execute_SRC1_CTRL; + end + if(when_Pipeline_l124_11) begin + decode_to_execute_SRC_USE_SUB_LESS <= decode_SRC_USE_SUB_LESS; + end + if(when_Pipeline_l124_12) begin + decode_to_execute_MEMORY_ENABLE <= decode_MEMORY_ENABLE; + end + if(when_Pipeline_l124_13) begin + execute_to_memory_MEMORY_ENABLE <= execute_MEMORY_ENABLE; + end + if(when_Pipeline_l124_14) begin + memory_to_writeBack_MEMORY_ENABLE <= memory_MEMORY_ENABLE; + end + if(when_Pipeline_l124_15) begin + decode_to_execute_ALU_CTRL <= _zz_decode_to_execute_ALU_CTRL; + end + if(when_Pipeline_l124_16) begin + decode_to_execute_SRC2_CTRL <= _zz_decode_to_execute_SRC2_CTRL; + end + if(when_Pipeline_l124_17) begin + decode_to_execute_REGFILE_WRITE_VALID <= decode_REGFILE_WRITE_VALID; + end + if(when_Pipeline_l124_18) begin + execute_to_memory_REGFILE_WRITE_VALID <= execute_REGFILE_WRITE_VALID; + end + if(when_Pipeline_l124_19) begin + memory_to_writeBack_REGFILE_WRITE_VALID <= memory_REGFILE_WRITE_VALID; + end + if(when_Pipeline_l124_20) begin + decode_to_execute_BYPASSABLE_EXECUTE_STAGE <= decode_BYPASSABLE_EXECUTE_STAGE; + end + if(when_Pipeline_l124_21) begin + decode_to_execute_BYPASSABLE_MEMORY_STAGE <= decode_BYPASSABLE_MEMORY_STAGE; + end + if(when_Pipeline_l124_22) begin + execute_to_memory_BYPASSABLE_MEMORY_STAGE <= execute_BYPASSABLE_MEMORY_STAGE; + end + if(when_Pipeline_l124_23) begin + decode_to_execute_MEMORY_WR <= decode_MEMORY_WR; + end + if(when_Pipeline_l124_24) begin + execute_to_memory_MEMORY_WR <= execute_MEMORY_WR; + end + if(when_Pipeline_l124_25) begin + memory_to_writeBack_MEMORY_WR <= memory_MEMORY_WR; + end + if(when_Pipeline_l124_26) begin + decode_to_execute_MEMORY_MANAGMENT <= decode_MEMORY_MANAGMENT; + end + if(when_Pipeline_l124_27) begin + decode_to_execute_SRC_LESS_UNSIGNED <= decode_SRC_LESS_UNSIGNED; + end + if(when_Pipeline_l124_28) begin + decode_to_execute_ALU_BITWISE_CTRL <= _zz_decode_to_execute_ALU_BITWISE_CTRL; + end + if(when_Pipeline_l124_29) begin + decode_to_execute_SHIFT_CTRL <= _zz_decode_to_execute_SHIFT_CTRL; + end + if(when_Pipeline_l124_30) begin + execute_to_memory_SHIFT_CTRL <= _zz_execute_to_memory_SHIFT_CTRL; + end + if(when_Pipeline_l124_31) begin + decode_to_execute_BRANCH_CTRL <= _zz_decode_to_execute_BRANCH_CTRL; + end + if(when_Pipeline_l124_32) begin + decode_to_execute_IS_CSR <= decode_IS_CSR; + end + if(when_Pipeline_l124_33) begin + decode_to_execute_ENV_CTRL <= _zz_decode_to_execute_ENV_CTRL; + end + if(when_Pipeline_l124_34) begin + execute_to_memory_ENV_CTRL <= _zz_execute_to_memory_ENV_CTRL; + end + if(when_Pipeline_l124_35) begin + memory_to_writeBack_ENV_CTRL <= _zz_memory_to_writeBack_ENV_CTRL; + end + if(when_Pipeline_l124_36) begin + decode_to_execute_IS_MUL <= decode_IS_MUL; + end + if(when_Pipeline_l124_37) begin + execute_to_memory_IS_MUL <= execute_IS_MUL; + end + if(when_Pipeline_l124_38) begin + memory_to_writeBack_IS_MUL <= memory_IS_MUL; + end + if(when_Pipeline_l124_39) begin + decode_to_execute_IS_DIV <= decode_IS_DIV; + end + if(when_Pipeline_l124_40) begin + execute_to_memory_IS_DIV <= execute_IS_DIV; + end + if(when_Pipeline_l124_41) begin + decode_to_execute_IS_RS1_SIGNED <= decode_IS_RS1_SIGNED; + end + if(when_Pipeline_l124_42) begin + decode_to_execute_IS_RS2_SIGNED <= decode_IS_RS2_SIGNED; + end + if(when_Pipeline_l124_43) begin + decode_to_execute_CfuPlugin_CFU_ENABLE <= decode_CfuPlugin_CFU_ENABLE; + end + if(when_Pipeline_l124_44) begin + decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND <= _zz_decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND; + end + if(when_Pipeline_l124_45) begin + decode_to_execute_RS1 <= decode_RS1; + end + if(when_Pipeline_l124_46) begin + decode_to_execute_RS2 <= decode_RS2; + end + if(when_Pipeline_l124_47) begin + decode_to_execute_SRC2_FORCE_ZERO <= decode_SRC2_FORCE_ZERO; + end + if(when_Pipeline_l124_48) begin + decode_to_execute_PREDICTION_HAD_BRANCHED2 <= decode_PREDICTION_HAD_BRANCHED2; + end + if(when_Pipeline_l124_49) begin + decode_to_execute_CSR_WRITE_OPCODE <= decode_CSR_WRITE_OPCODE; + end + if(when_Pipeline_l124_50) begin + decode_to_execute_CSR_READ_OPCODE <= decode_CSR_READ_OPCODE; + end + if(when_Pipeline_l124_51) begin + execute_to_memory_MEMORY_STORE_DATA_RF <= execute_MEMORY_STORE_DATA_RF; + end + if(when_Pipeline_l124_52) begin + memory_to_writeBack_MEMORY_STORE_DATA_RF <= memory_MEMORY_STORE_DATA_RF; + end + if(when_Pipeline_l124_53) begin + execute_to_memory_REGFILE_WRITE_DATA <= _zz_decode_RS2; + end + if(when_Pipeline_l124_54) begin + memory_to_writeBack_REGFILE_WRITE_DATA <= _zz_decode_RS2_1; + end + if(when_Pipeline_l124_55) begin + execute_to_memory_SHIFT_RIGHT <= execute_SHIFT_RIGHT; + end + if(when_Pipeline_l124_56) begin + execute_to_memory_MUL_LL <= execute_MUL_LL; + end + if(when_Pipeline_l124_57) begin + execute_to_memory_MUL_LH <= execute_MUL_LH; + end + if(when_Pipeline_l124_58) begin + execute_to_memory_MUL_HL <= execute_MUL_HL; + end + if(when_Pipeline_l124_59) begin + execute_to_memory_MUL_HH <= execute_MUL_HH; + end + if(when_Pipeline_l124_60) begin + memory_to_writeBack_MUL_HH <= memory_MUL_HH; + end + if(when_Pipeline_l124_62) begin + memory_to_writeBack_CfuPlugin_CFU_IN_FLIGHT <= _zz_memory_to_writeBack_CfuPlugin_CFU_IN_FLIGHT; + end + if(when_Pipeline_l124_63) begin + memory_to_writeBack_MUL_LOW <= memory_MUL_LOW; + end + if(when_CsrPlugin_l1264) begin + execute_CsrPlugin_csr_3264 <= (decode_INSTRUCTION[31 : 20] == 12'hcc0); + end + if(when_CsrPlugin_l1264_1) begin + execute_CsrPlugin_csr_3857 <= (decode_INSTRUCTION[31 : 20] == 12'hf11); + end + if(when_CsrPlugin_l1264_2) begin + execute_CsrPlugin_csr_3858 <= (decode_INSTRUCTION[31 : 20] == 12'hf12); + end + if(when_CsrPlugin_l1264_3) begin + execute_CsrPlugin_csr_3859 <= (decode_INSTRUCTION[31 : 20] == 12'hf13); + end + if(when_CsrPlugin_l1264_4) begin + execute_CsrPlugin_csr_3860 <= (decode_INSTRUCTION[31 : 20] == 12'hf14); + end + if(when_CsrPlugin_l1264_5) begin + execute_CsrPlugin_csr_769 <= (decode_INSTRUCTION[31 : 20] == 12'h301); + end + if(when_CsrPlugin_l1264_6) begin + execute_CsrPlugin_csr_768 <= (decode_INSTRUCTION[31 : 20] == 12'h300); + end + if(when_CsrPlugin_l1264_7) begin + execute_CsrPlugin_csr_836 <= (decode_INSTRUCTION[31 : 20] == 12'h344); + end + if(when_CsrPlugin_l1264_8) begin + execute_CsrPlugin_csr_772 <= (decode_INSTRUCTION[31 : 20] == 12'h304); + end + if(when_CsrPlugin_l1264_9) begin + execute_CsrPlugin_csr_773 <= (decode_INSTRUCTION[31 : 20] == 12'h305); + end + if(when_CsrPlugin_l1264_10) begin + execute_CsrPlugin_csr_833 <= (decode_INSTRUCTION[31 : 20] == 12'h341); + end + if(when_CsrPlugin_l1264_11) begin + execute_CsrPlugin_csr_832 <= (decode_INSTRUCTION[31 : 20] == 12'h340); + end + if(when_CsrPlugin_l1264_12) begin + execute_CsrPlugin_csr_834 <= (decode_INSTRUCTION[31 : 20] == 12'h342); + end + if(when_CsrPlugin_l1264_13) begin + execute_CsrPlugin_csr_835 <= (decode_INSTRUCTION[31 : 20] == 12'h343); + end + if(when_CsrPlugin_l1264_14) begin + execute_CsrPlugin_csr_2816 <= (decode_INSTRUCTION[31 : 20] == 12'hb00); + end + if(when_CsrPlugin_l1264_15) begin + execute_CsrPlugin_csr_2944 <= (decode_INSTRUCTION[31 : 20] == 12'hb80); + end + if(when_CsrPlugin_l1264_16) begin + execute_CsrPlugin_csr_2818 <= (decode_INSTRUCTION[31 : 20] == 12'hb02); + end + if(when_CsrPlugin_l1264_17) begin + execute_CsrPlugin_csr_2946 <= (decode_INSTRUCTION[31 : 20] == 12'hb82); + end + if(when_CsrPlugin_l1264_18) begin + execute_CsrPlugin_csr_3072 <= (decode_INSTRUCTION[31 : 20] == 12'hc00); + end + if(when_CsrPlugin_l1264_19) begin + execute_CsrPlugin_csr_3200 <= (decode_INSTRUCTION[31 : 20] == 12'hc80); + end + if(when_CsrPlugin_l1264_20) begin + execute_CsrPlugin_csr_3074 <= (decode_INSTRUCTION[31 : 20] == 12'hc02); + end + if(when_CsrPlugin_l1264_21) begin + execute_CsrPlugin_csr_3202 <= (decode_INSTRUCTION[31 : 20] == 12'hc82); + end + if(when_CsrPlugin_l1264_22) begin + execute_CsrPlugin_csr_3008 <= (decode_INSTRUCTION[31 : 20] == 12'hbc0); + end + if(when_CsrPlugin_l1264_23) begin + execute_CsrPlugin_csr_4032 <= (decode_INSTRUCTION[31 : 20] == 12'hfc0); + end + if(when_CsrPlugin_l1264_24) begin + execute_CsrPlugin_csr_2820 <= (decode_INSTRUCTION[31 : 20] == 12'hb04); + end + if(when_CsrPlugin_l1264_25) begin + execute_CsrPlugin_csr_2821 <= (decode_INSTRUCTION[31 : 20] == 12'hb05); + end + if(when_CsrPlugin_l1264_26) begin + execute_CsrPlugin_csr_2822 <= (decode_INSTRUCTION[31 : 20] == 12'hb06); + end + if(when_CsrPlugin_l1264_27) begin + execute_CsrPlugin_csr_2823 <= (decode_INSTRUCTION[31 : 20] == 12'hb07); + end + if(when_CsrPlugin_l1264_28) begin + execute_CsrPlugin_csr_2824 <= (decode_INSTRUCTION[31 : 20] == 12'hb08); + end + if(when_CsrPlugin_l1264_29) begin + execute_CsrPlugin_csr_2825 <= (decode_INSTRUCTION[31 : 20] == 12'hb09); + end + if(when_CsrPlugin_l1264_30) begin + execute_CsrPlugin_csr_2826 <= (decode_INSTRUCTION[31 : 20] == 12'hb0a); + end + if(when_CsrPlugin_l1264_31) begin + execute_CsrPlugin_csr_2827 <= (decode_INSTRUCTION[31 : 20] == 12'hb0b); + end + if(when_CsrPlugin_l1264_32) begin + execute_CsrPlugin_csr_2828 <= (decode_INSTRUCTION[31 : 20] == 12'hb0c); + end + if(when_CsrPlugin_l1264_33) begin + execute_CsrPlugin_csr_2829 <= (decode_INSTRUCTION[31 : 20] == 12'hb0d); + end + if(when_CsrPlugin_l1264_34) begin + execute_CsrPlugin_csr_2830 <= (decode_INSTRUCTION[31 : 20] == 12'hb0e); + end + if(when_CsrPlugin_l1264_35) begin + execute_CsrPlugin_csr_2831 <= (decode_INSTRUCTION[31 : 20] == 12'hb0f); + end + if(when_CsrPlugin_l1264_36) begin + execute_CsrPlugin_csr_2832 <= (decode_INSTRUCTION[31 : 20] == 12'hb10); + end + if(when_CsrPlugin_l1264_37) begin + execute_CsrPlugin_csr_2833 <= (decode_INSTRUCTION[31 : 20] == 12'hb11); + end + if(when_CsrPlugin_l1264_38) begin + execute_CsrPlugin_csr_2834 <= (decode_INSTRUCTION[31 : 20] == 12'hb12); + end + if(when_CsrPlugin_l1264_39) begin + execute_CsrPlugin_csr_2835 <= (decode_INSTRUCTION[31 : 20] == 12'hb13); + end + if(execute_CsrPlugin_csr_836) begin + if(execute_CsrPlugin_writeEnable) begin + CsrPlugin_mip_MSIP <= CsrPlugin_csrMapping_writeDataSignal[3]; + end + end + if(execute_CsrPlugin_csr_773) begin + if(execute_CsrPlugin_writeEnable) begin + CsrPlugin_mtvec_base <= CsrPlugin_csrMapping_writeDataSignal[31 : 2]; + CsrPlugin_mtvec_mode <= CsrPlugin_csrMapping_writeDataSignal[1 : 0]; + end + end + if(execute_CsrPlugin_csr_833) begin + if(execute_CsrPlugin_writeEnable) begin + CsrPlugin_mepc <= CsrPlugin_csrMapping_writeDataSignal[31 : 0]; + end + end + if(execute_CsrPlugin_csr_832) begin + if(execute_CsrPlugin_writeEnable) begin + CsrPlugin_mscratch <= CsrPlugin_csrMapping_writeDataSignal[31 : 0]; + end + end + if(execute_CsrPlugin_csr_834) begin + if(execute_CsrPlugin_writeEnable) begin + CsrPlugin_mcause_interrupt <= CsrPlugin_csrMapping_writeDataSignal[31]; + CsrPlugin_mcause_exceptionCode <= CsrPlugin_csrMapping_writeDataSignal[3 : 0]; + end + end + if(execute_CsrPlugin_csr_835) begin + if(execute_CsrPlugin_writeEnable) begin + CsrPlugin_mtval <= CsrPlugin_csrMapping_writeDataSignal[31 : 0]; + end + end + if(execute_CsrPlugin_csr_2816) begin + if(execute_CsrPlugin_writeEnable) begin + CsrPlugin_mcycle[31 : 0] <= CsrPlugin_csrMapping_writeDataSignal[31 : 0]; + end + end + if(execute_CsrPlugin_csr_2944) begin + if(execute_CsrPlugin_writeEnable) begin + CsrPlugin_mcycle[63 : 32] <= CsrPlugin_csrMapping_writeDataSignal[31 : 0]; + end + end + if(execute_CsrPlugin_csr_2818) begin + if(execute_CsrPlugin_writeEnable) begin + CsrPlugin_minstret[31 : 0] <= CsrPlugin_csrMapping_writeDataSignal[31 : 0]; + end + end + if(execute_CsrPlugin_csr_2946) begin + if(execute_CsrPlugin_writeEnable) begin + CsrPlugin_minstret[63 : 32] <= CsrPlugin_csrMapping_writeDataSignal[31 : 0]; + end + end + if(execute_CsrPlugin_csr_2820) begin + if(execute_CsrPlugin_writeEnable) begin + _zz_CsrPlugin_csrMapping_readDataInit_2 <= CsrPlugin_csrMapping_writeDataSignal[31 : 0]; + end + end + if(execute_CsrPlugin_csr_2821) begin + if(execute_CsrPlugin_writeEnable) begin + _zz_when_GenCoreDefault_l367 <= CsrPlugin_csrMapping_writeDataSignal[31 : 0]; + end + end + if(execute_CsrPlugin_csr_2822) begin + if(execute_CsrPlugin_writeEnable) begin + _zz_CsrPlugin_csrMapping_readDataInit_3 <= CsrPlugin_csrMapping_writeDataSignal[31 : 0]; + end + end + if(execute_CsrPlugin_csr_2823) begin + if(execute_CsrPlugin_writeEnable) begin + _zz_when_GenCoreDefault_l367_1 <= CsrPlugin_csrMapping_writeDataSignal[31 : 0]; + end + end + if(execute_CsrPlugin_csr_2824) begin + if(execute_CsrPlugin_writeEnable) begin + _zz_CsrPlugin_csrMapping_readDataInit_4 <= CsrPlugin_csrMapping_writeDataSignal[31 : 0]; + end + end + if(execute_CsrPlugin_csr_2825) begin + if(execute_CsrPlugin_writeEnable) begin + _zz_when_GenCoreDefault_l367_2 <= CsrPlugin_csrMapping_writeDataSignal[31 : 0]; + end + end + if(execute_CsrPlugin_csr_2826) begin + if(execute_CsrPlugin_writeEnable) begin + _zz_CsrPlugin_csrMapping_readDataInit_5 <= CsrPlugin_csrMapping_writeDataSignal[31 : 0]; + end + end + if(execute_CsrPlugin_csr_2827) begin + if(execute_CsrPlugin_writeEnable) begin + _zz_when_GenCoreDefault_l367_3 <= CsrPlugin_csrMapping_writeDataSignal[31 : 0]; + end + end + if(execute_CsrPlugin_csr_2828) begin + if(execute_CsrPlugin_writeEnable) begin + _zz_CsrPlugin_csrMapping_readDataInit_6 <= CsrPlugin_csrMapping_writeDataSignal[31 : 0]; + end + end + if(execute_CsrPlugin_csr_2829) begin + if(execute_CsrPlugin_writeEnable) begin + _zz_when_GenCoreDefault_l367_4 <= CsrPlugin_csrMapping_writeDataSignal[31 : 0]; + end + end + if(execute_CsrPlugin_csr_2830) begin + if(execute_CsrPlugin_writeEnable) begin + _zz_CsrPlugin_csrMapping_readDataInit_7 <= CsrPlugin_csrMapping_writeDataSignal[31 : 0]; + end + end + if(execute_CsrPlugin_csr_2831) begin + if(execute_CsrPlugin_writeEnable) begin + _zz_when_GenCoreDefault_l367_5 <= CsrPlugin_csrMapping_writeDataSignal[31 : 0]; + end + end + if(execute_CsrPlugin_csr_2832) begin + if(execute_CsrPlugin_writeEnable) begin + _zz_CsrPlugin_csrMapping_readDataInit_8 <= CsrPlugin_csrMapping_writeDataSignal[31 : 0]; + end + end + if(execute_CsrPlugin_csr_2833) begin + if(execute_CsrPlugin_writeEnable) begin + _zz_when_GenCoreDefault_l367_6 <= CsrPlugin_csrMapping_writeDataSignal[31 : 0]; + end + end + if(execute_CsrPlugin_csr_2834) begin + if(execute_CsrPlugin_writeEnable) begin + _zz_CsrPlugin_csrMapping_readDataInit_9 <= CsrPlugin_csrMapping_writeDataSignal[31 : 0]; + end + end + if(execute_CsrPlugin_csr_2835) begin + if(execute_CsrPlugin_writeEnable) begin + _zz_when_GenCoreDefault_l367_7 <= CsrPlugin_csrMapping_writeDataSignal[31 : 0]; + end + end + iBusWishbone_DAT_MISO_regNext <= iBusWishbone_DAT_MISO; + dBusWishbone_DAT_MISO_regNext <= dBusWishbone_DAT_MISO; + end + + +endmodule + +module DataCache ( + input io_cpu_execute_isValid, + input [31:0] io_cpu_execute_address, + output reg io_cpu_execute_haltIt, + input io_cpu_execute_args_wr, + input [1:0] io_cpu_execute_args_size, + input io_cpu_execute_args_totalyConsistent, + output io_cpu_execute_refilling, + input io_cpu_memory_isValid, + input io_cpu_memory_isStuck, + output io_cpu_memory_isWrite, + input [31:0] io_cpu_memory_address, + input [31:0] io_cpu_memory_mmuRsp_physicalAddress, + input io_cpu_memory_mmuRsp_isIoAccess, + input io_cpu_memory_mmuRsp_isPaging, + input io_cpu_memory_mmuRsp_allowRead, + input io_cpu_memory_mmuRsp_allowWrite, + input io_cpu_memory_mmuRsp_allowExecute, + input io_cpu_memory_mmuRsp_exception, + input io_cpu_memory_mmuRsp_refilling, + input io_cpu_memory_mmuRsp_bypassTranslation, + input io_cpu_writeBack_isValid, + input io_cpu_writeBack_isStuck, + input io_cpu_writeBack_isUser, + output reg io_cpu_writeBack_haltIt, + output io_cpu_writeBack_isWrite, + input [31:0] io_cpu_writeBack_storeData, + output reg [31:0] io_cpu_writeBack_data, + input [31:0] io_cpu_writeBack_address, + output io_cpu_writeBack_mmuException, + output io_cpu_writeBack_unalignedAccess, + output reg io_cpu_writeBack_accessError, + output io_cpu_writeBack_keepMemRspData, + input io_cpu_writeBack_fence_SW, + input io_cpu_writeBack_fence_SR, + input io_cpu_writeBack_fence_SO, + input io_cpu_writeBack_fence_SI, + input io_cpu_writeBack_fence_PW, + input io_cpu_writeBack_fence_PR, + input io_cpu_writeBack_fence_PO, + input io_cpu_writeBack_fence_PI, + input [3:0] io_cpu_writeBack_fence_FM, + output io_cpu_writeBack_exclusiveOk, + output reg io_cpu_redo, + input io_cpu_flush_valid, + output io_cpu_flush_ready, + output reg io_mem_cmd_valid, + input io_mem_cmd_ready, + output reg io_mem_cmd_payload_wr, + output io_mem_cmd_payload_uncached, + output reg [31:0] io_mem_cmd_payload_address, + output [31:0] io_mem_cmd_payload_data, + output [3:0] io_mem_cmd_payload_mask, + output reg [2:0] io_mem_cmd_payload_size, + output io_mem_cmd_payload_last, + input io_mem_rsp_valid, + input io_mem_rsp_payload_last, + input [31:0] io_mem_rsp_payload_data, + input io_mem_rsp_payload_error, + input clk, + input reset +); + reg [20:0] _zz_ways_0_tags_port0; + reg [31:0] _zz_ways_0_data_port0; + wire [20:0] _zz_ways_0_tags_port; + wire [10:0] _zz_stage0_dataColisions; + wire [10:0] _zz__zz_stageA_dataColisions; + wire [0:0] _zz_when; + wire [2:0] _zz_loader_counter_valueNext; + wire [0:0] _zz_loader_counter_valueNext_1; + wire [1:0] _zz_loader_waysAllocator; + reg _zz_1; + reg _zz_2; + wire haltCpu; + reg tagsReadCmd_valid; + reg [7:0] tagsReadCmd_payload; + reg tagsWriteCmd_valid; + reg [0:0] tagsWriteCmd_payload_way; + reg [7:0] tagsWriteCmd_payload_address; + reg tagsWriteCmd_payload_data_valid; + reg tagsWriteCmd_payload_data_error; + reg [18:0] tagsWriteCmd_payload_data_address; + reg tagsWriteLastCmd_valid; + reg [0:0] tagsWriteLastCmd_payload_way; + reg [7:0] tagsWriteLastCmd_payload_address; + reg tagsWriteLastCmd_payload_data_valid; + reg tagsWriteLastCmd_payload_data_error; + reg [18:0] tagsWriteLastCmd_payload_data_address; + reg dataReadCmd_valid; + reg [10:0] dataReadCmd_payload; + reg dataWriteCmd_valid; + reg [0:0] dataWriteCmd_payload_way; + reg [10:0] dataWriteCmd_payload_address; + reg [31:0] dataWriteCmd_payload_data; + reg [3:0] dataWriteCmd_payload_mask; + wire _zz_ways_0_tagsReadRsp_valid; + wire ways_0_tagsReadRsp_valid; + wire ways_0_tagsReadRsp_error; + wire [18:0] ways_0_tagsReadRsp_address; + wire [20:0] _zz_ways_0_tagsReadRsp_valid_1; + wire _zz_ways_0_dataReadRspMem; + wire [31:0] ways_0_dataReadRspMem; + wire [31:0] ways_0_dataReadRsp; + wire when_DataCache_l634; + wire when_DataCache_l637; + wire when_DataCache_l656; + wire rspSync; + wire rspLast; + reg memCmdSent; + wire io_mem_cmd_fire; + wire when_DataCache_l678; + reg [3:0] _zz_stage0_mask; + wire [3:0] stage0_mask; + wire [0:0] stage0_dataColisions; + wire [0:0] stage0_wayInvalidate; + wire stage0_isAmo; + wire when_DataCache_l763; + reg stageA_request_wr; + reg [1:0] stageA_request_size; + reg stageA_request_totalyConsistent; + wire when_DataCache_l763_1; + reg [3:0] stageA_mask; + wire stageA_isAmo; + wire stageA_isLrsc; + wire [0:0] stageA_wayHits; + wire when_DataCache_l763_2; + reg [0:0] stageA_wayInvalidate; + wire when_DataCache_l763_3; + reg [0:0] stage0_dataColisions_regNextWhen; + wire [0:0] _zz_stageA_dataColisions; + wire [0:0] stageA_dataColisions; + wire when_DataCache_l814; + reg stageB_request_wr; + reg [1:0] stageB_request_size; + reg stageB_request_totalyConsistent; + reg stageB_mmuRspFreeze; + wire when_DataCache_l816; + reg [31:0] stageB_mmuRsp_physicalAddress; + reg stageB_mmuRsp_isIoAccess; + reg stageB_mmuRsp_isPaging; + reg stageB_mmuRsp_allowRead; + reg stageB_mmuRsp_allowWrite; + reg stageB_mmuRsp_allowExecute; + reg stageB_mmuRsp_exception; + reg stageB_mmuRsp_refilling; + reg stageB_mmuRsp_bypassTranslation; + wire when_DataCache_l813; + reg stageB_tagsReadRsp_0_valid; + reg stageB_tagsReadRsp_0_error; + reg [18:0] stageB_tagsReadRsp_0_address; + wire when_DataCache_l813_1; + reg [31:0] stageB_dataReadRsp_0; + wire when_DataCache_l812; + reg [0:0] stageB_wayInvalidate; + wire stageB_consistancyHazard; + wire when_DataCache_l812_1; + reg [0:0] stageB_dataColisions; + wire when_DataCache_l812_2; + reg stageB_unaligned; + wire when_DataCache_l812_3; + reg [0:0] stageB_waysHitsBeforeInvalidate; + wire [0:0] stageB_waysHits; + wire stageB_waysHit; + wire [31:0] stageB_dataMux; + wire when_DataCache_l812_4; + reg [3:0] stageB_mask; + reg stageB_loaderValid; + wire [31:0] stageB_ioMemRspMuxed; + reg stageB_flusher_waitDone; + wire stageB_flusher_hold; + reg [8:0] stageB_flusher_counter; + wire when_DataCache_l842; + wire when_DataCache_l848; + reg stageB_flusher_start; + wire stageB_isAmo; + wire stageB_isAmoCached; + wire stageB_isExternalLsrc; + wire stageB_isExternalAmo; + wire [31:0] stageB_requestDataBypass; + reg stageB_cpuWriteToCache; + wire when_DataCache_l911; + wire stageB_badPermissions; + wire stageB_loadStoreFault; + wire stageB_bypassCache; + wire when_DataCache_l980; + wire when_DataCache_l989; + wire when_DataCache_l994; + wire when_DataCache_l1005; + wire when_DataCache_l1017; + wire when_DataCache_l976; + wire when_DataCache_l1051; + wire when_DataCache_l1060; + reg loader_valid; + reg loader_counter_willIncrement; + wire loader_counter_willClear; + reg [2:0] loader_counter_valueNext; + reg [2:0] loader_counter_value; + wire loader_counter_willOverflowIfInc; + wire loader_counter_willOverflow; + reg [0:0] loader_waysAllocator; + reg loader_error; + wire loader_kill; + reg loader_killReg; + wire when_DataCache_l1075; + wire loader_done; + wire when_DataCache_l1103; + reg loader_valid_regNext; + wire when_DataCache_l1107; + wire when_DataCache_l1110; + (* ram_style = "block" *) reg [20:0] ways_0_tags [0:255]; + (* ram_style = "block" *) reg [7:0] ways_0_data_symbol0 [0:2047]; + (* ram_style = "block" *) reg [7:0] ways_0_data_symbol1 [0:2047]; + (* ram_style = "block" *) reg [7:0] ways_0_data_symbol2 [0:2047]; + (* ram_style = "block" *) reg [7:0] ways_0_data_symbol3 [0:2047]; + reg [7:0] _zz_ways_0_datasymbol_read; + reg [7:0] _zz_ways_0_datasymbol_read_1; + reg [7:0] _zz_ways_0_datasymbol_read_2; + reg [7:0] _zz_ways_0_datasymbol_read_3; + + assign _zz_stage0_dataColisions = (io_cpu_execute_address[12 : 2] >>> 0); + assign _zz__zz_stageA_dataColisions = (io_cpu_memory_address[12 : 2] >>> 0); + assign _zz_when = 1'b1; + assign _zz_loader_counter_valueNext_1 = loader_counter_willIncrement; + assign _zz_loader_counter_valueNext = {2'd0, _zz_loader_counter_valueNext_1}; + assign _zz_loader_waysAllocator = {loader_waysAllocator,loader_waysAllocator[0]}; + assign _zz_ways_0_tags_port = {tagsWriteCmd_payload_data_address,{tagsWriteCmd_payload_data_error,tagsWriteCmd_payload_data_valid}}; + always @(posedge clk) begin + if(_zz_ways_0_tagsReadRsp_valid) begin + _zz_ways_0_tags_port0 <= ways_0_tags[tagsReadCmd_payload]; + end + end + + always @(posedge clk) begin + if(_zz_2) begin + ways_0_tags[tagsWriteCmd_payload_address] <= _zz_ways_0_tags_port; + end + end + + always @(*) begin + _zz_ways_0_data_port0 = {_zz_ways_0_datasymbol_read_3, _zz_ways_0_datasymbol_read_2, _zz_ways_0_datasymbol_read_1, _zz_ways_0_datasymbol_read}; + end + always @(posedge clk) begin + if(_zz_ways_0_dataReadRspMem) begin + _zz_ways_0_datasymbol_read <= ways_0_data_symbol0[dataReadCmd_payload]; + _zz_ways_0_datasymbol_read_1 <= ways_0_data_symbol1[dataReadCmd_payload]; + _zz_ways_0_datasymbol_read_2 <= ways_0_data_symbol2[dataReadCmd_payload]; + _zz_ways_0_datasymbol_read_3 <= ways_0_data_symbol3[dataReadCmd_payload]; + end + end + + always @(posedge clk) begin + if(dataWriteCmd_payload_mask[0] && _zz_1) begin + ways_0_data_symbol0[dataWriteCmd_payload_address] <= dataWriteCmd_payload_data[7 : 0]; + end + if(dataWriteCmd_payload_mask[1] && _zz_1) begin + ways_0_data_symbol1[dataWriteCmd_payload_address] <= dataWriteCmd_payload_data[15 : 8]; + end + if(dataWriteCmd_payload_mask[2] && _zz_1) begin + ways_0_data_symbol2[dataWriteCmd_payload_address] <= dataWriteCmd_payload_data[23 : 16]; + end + if(dataWriteCmd_payload_mask[3] && _zz_1) begin + ways_0_data_symbol3[dataWriteCmd_payload_address] <= dataWriteCmd_payload_data[31 : 24]; + end + end + + always @(*) begin + _zz_1 = 1'b0; + if(when_DataCache_l637) begin + _zz_1 = 1'b1; + end + end + + always @(*) begin + _zz_2 = 1'b0; + if(when_DataCache_l634) begin + _zz_2 = 1'b1; + end + end + + assign haltCpu = 1'b0; + assign _zz_ways_0_tagsReadRsp_valid = (tagsReadCmd_valid && (! io_cpu_memory_isStuck)); + assign _zz_ways_0_tagsReadRsp_valid_1 = _zz_ways_0_tags_port0; + assign ways_0_tagsReadRsp_valid = _zz_ways_0_tagsReadRsp_valid_1[0]; + assign ways_0_tagsReadRsp_error = _zz_ways_0_tagsReadRsp_valid_1[1]; + assign ways_0_tagsReadRsp_address = _zz_ways_0_tagsReadRsp_valid_1[20 : 2]; + assign _zz_ways_0_dataReadRspMem = (dataReadCmd_valid && (! io_cpu_memory_isStuck)); + assign ways_0_dataReadRspMem = _zz_ways_0_data_port0; + assign ways_0_dataReadRsp = ways_0_dataReadRspMem[31 : 0]; + assign when_DataCache_l634 = (tagsWriteCmd_valid && tagsWriteCmd_payload_way[0]); + assign when_DataCache_l637 = (dataWriteCmd_valid && dataWriteCmd_payload_way[0]); + always @(*) begin + tagsReadCmd_valid = 1'b0; + if(when_DataCache_l656) begin + tagsReadCmd_valid = 1'b1; + end + end + + always @(*) begin + tagsReadCmd_payload = 8'bxxxxxxxx; + if(when_DataCache_l656) begin + tagsReadCmd_payload = io_cpu_execute_address[12 : 5]; + end + end + + always @(*) begin + dataReadCmd_valid = 1'b0; + if(when_DataCache_l656) begin + dataReadCmd_valid = 1'b1; + end + end + + always @(*) begin + dataReadCmd_payload = 11'bxxxxxxxxxxx; + if(when_DataCache_l656) begin + dataReadCmd_payload = io_cpu_execute_address[12 : 2]; + end + end + + always @(*) begin + tagsWriteCmd_valid = 1'b0; + if(when_DataCache_l842) begin + tagsWriteCmd_valid = 1'b1; + end + if(when_DataCache_l1051) begin + tagsWriteCmd_valid = 1'b0; + end + if(loader_done) begin + tagsWriteCmd_valid = 1'b1; + end + end + + always @(*) begin + tagsWriteCmd_payload_way = 1'bx; + if(when_DataCache_l842) begin + tagsWriteCmd_payload_way = 1'b1; + end + if(loader_done) begin + tagsWriteCmd_payload_way = loader_waysAllocator; + end + end + + always @(*) begin + tagsWriteCmd_payload_address = 8'bxxxxxxxx; + if(when_DataCache_l842) begin + tagsWriteCmd_payload_address = stageB_flusher_counter[7:0]; + end + if(loader_done) begin + tagsWriteCmd_payload_address = stageB_mmuRsp_physicalAddress[12 : 5]; + end + end + + always @(*) begin + tagsWriteCmd_payload_data_valid = 1'bx; + if(when_DataCache_l842) begin + tagsWriteCmd_payload_data_valid = 1'b0; + end + if(loader_done) begin + tagsWriteCmd_payload_data_valid = (! (loader_kill || loader_killReg)); + end + end + + always @(*) begin + tagsWriteCmd_payload_data_error = 1'bx; + if(loader_done) begin + tagsWriteCmd_payload_data_error = (loader_error || (io_mem_rsp_valid && io_mem_rsp_payload_error)); + end + end + + always @(*) begin + tagsWriteCmd_payload_data_address = 19'bxxxxxxxxxxxxxxxxxxx; + if(loader_done) begin + tagsWriteCmd_payload_data_address = stageB_mmuRsp_physicalAddress[31 : 13]; + end + end + + always @(*) begin + dataWriteCmd_valid = 1'b0; + if(stageB_cpuWriteToCache) begin + if(when_DataCache_l911) begin + dataWriteCmd_valid = 1'b1; + end + end + if(when_DataCache_l1051) begin + dataWriteCmd_valid = 1'b0; + end + if(when_DataCache_l1075) begin + dataWriteCmd_valid = 1'b1; + end + end + + always @(*) begin + dataWriteCmd_payload_way = 1'bx; + if(stageB_cpuWriteToCache) begin + dataWriteCmd_payload_way = stageB_waysHits; + end + if(when_DataCache_l1075) begin + dataWriteCmd_payload_way = loader_waysAllocator; + end + end + + always @(*) begin + dataWriteCmd_payload_address = 11'bxxxxxxxxxxx; + if(stageB_cpuWriteToCache) begin + dataWriteCmd_payload_address = stageB_mmuRsp_physicalAddress[12 : 2]; + end + if(when_DataCache_l1075) begin + dataWriteCmd_payload_address = {stageB_mmuRsp_physicalAddress[12 : 5],loader_counter_value}; + end + end + + always @(*) begin + dataWriteCmd_payload_data = 32'bxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx; + if(stageB_cpuWriteToCache) begin + dataWriteCmd_payload_data[31 : 0] = stageB_requestDataBypass; + end + if(when_DataCache_l1075) begin + dataWriteCmd_payload_data = io_mem_rsp_payload_data; + end + end + + always @(*) begin + dataWriteCmd_payload_mask = 4'bxxxx; + if(stageB_cpuWriteToCache) begin + dataWriteCmd_payload_mask = 4'b0000; + if(_zz_when[0]) begin + dataWriteCmd_payload_mask[3 : 0] = stageB_mask; + end + end + if(when_DataCache_l1075) begin + dataWriteCmd_payload_mask = 4'b1111; + end + end + + assign when_DataCache_l656 = (io_cpu_execute_isValid && (! io_cpu_memory_isStuck)); + always @(*) begin + io_cpu_execute_haltIt = 1'b0; + if(when_DataCache_l842) begin + io_cpu_execute_haltIt = 1'b1; + end + end + + assign rspSync = 1'b1; + assign rspLast = 1'b1; + assign io_mem_cmd_fire = (io_mem_cmd_valid && io_mem_cmd_ready); + assign when_DataCache_l678 = (! io_cpu_writeBack_isStuck); + always @(*) begin + _zz_stage0_mask = 4'bxxxx; + case(io_cpu_execute_args_size) + 2'b00 : begin + _zz_stage0_mask = 4'b0001; + end + 2'b01 : begin + _zz_stage0_mask = 4'b0011; + end + 2'b10 : begin + _zz_stage0_mask = 4'b1111; + end + default : begin + end + endcase + end + + assign stage0_mask = (_zz_stage0_mask <<< io_cpu_execute_address[1 : 0]); + assign stage0_dataColisions[0] = (((dataWriteCmd_valid && dataWriteCmd_payload_way[0]) && (dataWriteCmd_payload_address == _zz_stage0_dataColisions)) && ((stage0_mask & dataWriteCmd_payload_mask[3 : 0]) != 4'b0000)); + assign stage0_wayInvalidate = 1'b0; + assign stage0_isAmo = 1'b0; + assign when_DataCache_l763 = (! io_cpu_memory_isStuck); + assign when_DataCache_l763_1 = (! io_cpu_memory_isStuck); + assign io_cpu_memory_isWrite = stageA_request_wr; + assign stageA_isAmo = 1'b0; + assign stageA_isLrsc = 1'b0; + assign stageA_wayHits = ((io_cpu_memory_mmuRsp_physicalAddress[31 : 13] == ways_0_tagsReadRsp_address) && ways_0_tagsReadRsp_valid); + assign when_DataCache_l763_2 = (! io_cpu_memory_isStuck); + assign when_DataCache_l763_3 = (! io_cpu_memory_isStuck); + assign _zz_stageA_dataColisions[0] = (((dataWriteCmd_valid && dataWriteCmd_payload_way[0]) && (dataWriteCmd_payload_address == _zz__zz_stageA_dataColisions)) && ((stageA_mask & dataWriteCmd_payload_mask[3 : 0]) != 4'b0000)); + assign stageA_dataColisions = (stage0_dataColisions_regNextWhen | _zz_stageA_dataColisions); + assign when_DataCache_l814 = (! io_cpu_writeBack_isStuck); + always @(*) begin + stageB_mmuRspFreeze = 1'b0; + if(when_DataCache_l1110) begin + stageB_mmuRspFreeze = 1'b1; + end + end + + assign when_DataCache_l816 = ((! io_cpu_writeBack_isStuck) && (! stageB_mmuRspFreeze)); + assign when_DataCache_l813 = (! io_cpu_writeBack_isStuck); + assign when_DataCache_l813_1 = (! io_cpu_writeBack_isStuck); + assign when_DataCache_l812 = (! io_cpu_writeBack_isStuck); + assign stageB_consistancyHazard = 1'b0; + assign when_DataCache_l812_1 = (! io_cpu_writeBack_isStuck); + assign when_DataCache_l812_2 = (! io_cpu_writeBack_isStuck); + assign when_DataCache_l812_3 = (! io_cpu_writeBack_isStuck); + assign stageB_waysHits = (stageB_waysHitsBeforeInvalidate & (~ stageB_wayInvalidate)); + assign stageB_waysHit = (stageB_waysHits != 1'b0); + assign stageB_dataMux = stageB_dataReadRsp_0; + assign when_DataCache_l812_4 = (! io_cpu_writeBack_isStuck); + always @(*) begin + stageB_loaderValid = 1'b0; + if(io_cpu_writeBack_isValid) begin + if(!stageB_isExternalAmo) begin + if(!when_DataCache_l976) begin + if(!when_DataCache_l989) begin + if(io_mem_cmd_ready) begin + stageB_loaderValid = 1'b1; + end + end + end + end + end + if(when_DataCache_l1051) begin + stageB_loaderValid = 1'b0; + end + end + + assign stageB_ioMemRspMuxed = io_mem_rsp_payload_data[31 : 0]; + always @(*) begin + io_cpu_writeBack_haltIt = 1'b1; + if(io_cpu_writeBack_isValid) begin + if(!stageB_isExternalAmo) begin + if(when_DataCache_l976) begin + if(when_DataCache_l980) begin + io_cpu_writeBack_haltIt = 1'b0; + end + end else begin + if(when_DataCache_l989) begin + if(when_DataCache_l994) begin + io_cpu_writeBack_haltIt = 1'b0; + end + end + end + end + end + if(when_DataCache_l1051) begin + io_cpu_writeBack_haltIt = 1'b0; + end + end + + assign stageB_flusher_hold = 1'b0; + assign when_DataCache_l842 = (! stageB_flusher_counter[8]); + assign when_DataCache_l848 = (! stageB_flusher_hold); + assign io_cpu_flush_ready = (stageB_flusher_waitDone && stageB_flusher_counter[8]); + assign stageB_isAmo = 1'b0; + assign stageB_isAmoCached = 1'b0; + assign stageB_isExternalLsrc = 1'b0; + assign stageB_isExternalAmo = 1'b0; + assign stageB_requestDataBypass = io_cpu_writeBack_storeData; + always @(*) begin + stageB_cpuWriteToCache = 1'b0; + if(io_cpu_writeBack_isValid) begin + if(!stageB_isExternalAmo) begin + if(!when_DataCache_l976) begin + if(when_DataCache_l989) begin + stageB_cpuWriteToCache = 1'b1; + end + end + end + end + end + + assign when_DataCache_l911 = (stageB_request_wr && stageB_waysHit); + assign stageB_badPermissions = (((! stageB_mmuRsp_allowWrite) && stageB_request_wr) || ((! stageB_mmuRsp_allowRead) && ((! stageB_request_wr) || stageB_isAmo))); + assign stageB_loadStoreFault = (io_cpu_writeBack_isValid && (stageB_mmuRsp_exception || stageB_badPermissions)); + always @(*) begin + io_cpu_redo = 1'b0; + if(io_cpu_writeBack_isValid) begin + if(!stageB_isExternalAmo) begin + if(!when_DataCache_l976) begin + if(when_DataCache_l989) begin + if(when_DataCache_l1005) begin + io_cpu_redo = 1'b1; + end + end + end + end + end + if(when_DataCache_l1060) begin + io_cpu_redo = 1'b1; + end + if(when_DataCache_l1107) begin + io_cpu_redo = 1'b1; + end + end + + always @(*) begin + io_cpu_writeBack_accessError = 1'b0; + if(stageB_bypassCache) begin + io_cpu_writeBack_accessError = ((((! stageB_request_wr) && 1'b1) && io_mem_rsp_valid) && io_mem_rsp_payload_error); + end else begin + io_cpu_writeBack_accessError = (((stageB_waysHits & stageB_tagsReadRsp_0_error) != 1'b0) || (stageB_loadStoreFault && (! stageB_mmuRsp_isPaging))); + end + end + + assign io_cpu_writeBack_mmuException = (stageB_loadStoreFault && stageB_mmuRsp_isPaging); + assign io_cpu_writeBack_unalignedAccess = (io_cpu_writeBack_isValid && stageB_unaligned); + assign io_cpu_writeBack_isWrite = stageB_request_wr; + always @(*) begin + io_mem_cmd_valid = 1'b0; + if(io_cpu_writeBack_isValid) begin + if(!stageB_isExternalAmo) begin + if(when_DataCache_l976) begin + io_mem_cmd_valid = (! memCmdSent); + end else begin + if(when_DataCache_l989) begin + if(stageB_request_wr) begin + io_mem_cmd_valid = 1'b1; + end + end else begin + if(when_DataCache_l1017) begin + io_mem_cmd_valid = 1'b1; + end + end + end + end + end + if(when_DataCache_l1051) begin + io_mem_cmd_valid = 1'b0; + end + end + + always @(*) begin + io_mem_cmd_payload_address = stageB_mmuRsp_physicalAddress; + if(io_cpu_writeBack_isValid) begin + if(!stageB_isExternalAmo) begin + if(!when_DataCache_l976) begin + if(!when_DataCache_l989) begin + io_mem_cmd_payload_address[4 : 0] = 5'h0; + end + end + end + end + end + + assign io_mem_cmd_payload_last = 1'b1; + always @(*) begin + io_mem_cmd_payload_wr = stageB_request_wr; + if(io_cpu_writeBack_isValid) begin + if(!stageB_isExternalAmo) begin + if(!when_DataCache_l976) begin + if(!when_DataCache_l989) begin + io_mem_cmd_payload_wr = 1'b0; + end + end + end + end + end + + assign io_mem_cmd_payload_mask = stageB_mask; + assign io_mem_cmd_payload_data = stageB_requestDataBypass; + assign io_mem_cmd_payload_uncached = stageB_mmuRsp_isIoAccess; + always @(*) begin + io_mem_cmd_payload_size = {1'd0, stageB_request_size}; + if(io_cpu_writeBack_isValid) begin + if(!stageB_isExternalAmo) begin + if(!when_DataCache_l976) begin + if(!when_DataCache_l989) begin + io_mem_cmd_payload_size = 3'b101; + end + end + end + end + end + + assign stageB_bypassCache = ((stageB_mmuRsp_isIoAccess || stageB_isExternalLsrc) || stageB_isExternalAmo); + assign io_cpu_writeBack_keepMemRspData = 1'b0; + assign when_DataCache_l980 = ((! stageB_request_wr) ? (io_mem_rsp_valid && rspSync) : io_mem_cmd_ready); + assign when_DataCache_l989 = (stageB_waysHit || (stageB_request_wr && (! stageB_isAmoCached))); + assign when_DataCache_l994 = ((! stageB_request_wr) || io_mem_cmd_ready); + assign when_DataCache_l1005 = (((! stageB_request_wr) || stageB_isAmoCached) && ((stageB_dataColisions & stageB_waysHits) != 1'b0)); + assign when_DataCache_l1017 = (! memCmdSent); + assign when_DataCache_l976 = (stageB_mmuRsp_isIoAccess || stageB_isExternalLsrc); + always @(*) begin + if(stageB_bypassCache) begin + io_cpu_writeBack_data = stageB_ioMemRspMuxed; + end else begin + io_cpu_writeBack_data = stageB_dataMux; + end + end + + assign when_DataCache_l1051 = ((((stageB_consistancyHazard || stageB_mmuRsp_refilling) || io_cpu_writeBack_accessError) || io_cpu_writeBack_mmuException) || io_cpu_writeBack_unalignedAccess); + assign when_DataCache_l1060 = (io_cpu_writeBack_isValid && (stageB_mmuRsp_refilling || stageB_consistancyHazard)); + always @(*) begin + loader_counter_willIncrement = 1'b0; + if(when_DataCache_l1075) begin + loader_counter_willIncrement = 1'b1; + end + end + + assign loader_counter_willClear = 1'b0; + assign loader_counter_willOverflowIfInc = (loader_counter_value == 3'b111); + assign loader_counter_willOverflow = (loader_counter_willOverflowIfInc && loader_counter_willIncrement); + always @(*) begin + loader_counter_valueNext = (loader_counter_value + _zz_loader_counter_valueNext); + if(loader_counter_willClear) begin + loader_counter_valueNext = 3'b000; + end + end + + assign loader_kill = 1'b0; + assign when_DataCache_l1075 = ((loader_valid && io_mem_rsp_valid) && rspLast); + assign loader_done = loader_counter_willOverflow; + assign when_DataCache_l1103 = (! loader_valid); + assign when_DataCache_l1107 = (loader_valid && (! loader_valid_regNext)); + assign io_cpu_execute_refilling = loader_valid; + assign when_DataCache_l1110 = (stageB_loaderValid || loader_valid); + always @(posedge clk) begin + tagsWriteLastCmd_valid <= tagsWriteCmd_valid; + tagsWriteLastCmd_payload_way <= tagsWriteCmd_payload_way; + tagsWriteLastCmd_payload_address <= tagsWriteCmd_payload_address; + tagsWriteLastCmd_payload_data_valid <= tagsWriteCmd_payload_data_valid; + tagsWriteLastCmd_payload_data_error <= tagsWriteCmd_payload_data_error; + tagsWriteLastCmd_payload_data_address <= tagsWriteCmd_payload_data_address; + if(when_DataCache_l763) begin + stageA_request_wr <= io_cpu_execute_args_wr; + stageA_request_size <= io_cpu_execute_args_size; + stageA_request_totalyConsistent <= io_cpu_execute_args_totalyConsistent; + end + if(when_DataCache_l763_1) begin + stageA_mask <= stage0_mask; + end + if(when_DataCache_l763_2) begin + stageA_wayInvalidate <= stage0_wayInvalidate; + end + if(when_DataCache_l763_3) begin + stage0_dataColisions_regNextWhen <= stage0_dataColisions; + end + if(when_DataCache_l814) begin + stageB_request_wr <= stageA_request_wr; + stageB_request_size <= stageA_request_size; + stageB_request_totalyConsistent <= stageA_request_totalyConsistent; + end + if(when_DataCache_l816) begin + stageB_mmuRsp_physicalAddress <= io_cpu_memory_mmuRsp_physicalAddress; + stageB_mmuRsp_isIoAccess <= io_cpu_memory_mmuRsp_isIoAccess; + stageB_mmuRsp_isPaging <= io_cpu_memory_mmuRsp_isPaging; + stageB_mmuRsp_allowRead <= io_cpu_memory_mmuRsp_allowRead; + stageB_mmuRsp_allowWrite <= io_cpu_memory_mmuRsp_allowWrite; + stageB_mmuRsp_allowExecute <= io_cpu_memory_mmuRsp_allowExecute; + stageB_mmuRsp_exception <= io_cpu_memory_mmuRsp_exception; + stageB_mmuRsp_refilling <= io_cpu_memory_mmuRsp_refilling; + stageB_mmuRsp_bypassTranslation <= io_cpu_memory_mmuRsp_bypassTranslation; + end + if(when_DataCache_l813) begin + stageB_tagsReadRsp_0_valid <= ways_0_tagsReadRsp_valid; + stageB_tagsReadRsp_0_error <= ways_0_tagsReadRsp_error; + stageB_tagsReadRsp_0_address <= ways_0_tagsReadRsp_address; + end + if(when_DataCache_l813_1) begin + stageB_dataReadRsp_0 <= ways_0_dataReadRsp; + end + if(when_DataCache_l812) begin + stageB_wayInvalidate <= stageA_wayInvalidate; + end + if(when_DataCache_l812_1) begin + stageB_dataColisions <= stageA_dataColisions; + end + if(when_DataCache_l812_2) begin + stageB_unaligned <= ({((stageA_request_size == 2'b10) && (io_cpu_memory_address[1 : 0] != 2'b00)),((stageA_request_size == 2'b01) && (io_cpu_memory_address[0 : 0] != 1'b0))} != 2'b00); + end + if(when_DataCache_l812_3) begin + stageB_waysHitsBeforeInvalidate <= stageA_wayHits; + end + if(when_DataCache_l812_4) begin + stageB_mask <= stageA_mask; + end + loader_valid_regNext <= loader_valid; + end + + always @(posedge clk) begin + if(reset) begin + memCmdSent <= 1'b0; + stageB_flusher_waitDone <= 1'b0; + stageB_flusher_counter <= 9'h0; + stageB_flusher_start <= 1'b1; + loader_valid <= 1'b0; + loader_counter_value <= 3'b000; + loader_waysAllocator <= 1'b1; + loader_error <= 1'b0; + loader_killReg <= 1'b0; + end else begin + if(io_mem_cmd_fire) begin + memCmdSent <= 1'b1; + end + if(when_DataCache_l678) begin + memCmdSent <= 1'b0; + end + if(io_cpu_flush_ready) begin + stageB_flusher_waitDone <= 1'b0; + end + if(when_DataCache_l842) begin + if(when_DataCache_l848) begin + stageB_flusher_counter <= (stageB_flusher_counter + 9'h001); + end + end + stageB_flusher_start <= (((((((! stageB_flusher_waitDone) && (! stageB_flusher_start)) && io_cpu_flush_valid) && (! io_cpu_execute_isValid)) && (! io_cpu_memory_isValid)) && (! io_cpu_writeBack_isValid)) && (! io_cpu_redo)); + if(stageB_flusher_start) begin + stageB_flusher_waitDone <= 1'b1; + stageB_flusher_counter <= 9'h0; + end + `ifndef SYNTHESIS + `ifdef FORMAL + assert((! ((io_cpu_writeBack_isValid && (! io_cpu_writeBack_haltIt)) && io_cpu_writeBack_isStuck))); + `else + if(!(! ((io_cpu_writeBack_isValid && (! io_cpu_writeBack_haltIt)) && io_cpu_writeBack_isStuck))) begin + $display("ERROR writeBack stuck by another plugin is not allowed"); + end + `endif + `endif + if(stageB_loaderValid) begin + loader_valid <= 1'b1; + end + loader_counter_value <= loader_counter_valueNext; + if(loader_kill) begin + loader_killReg <= 1'b1; + end + if(when_DataCache_l1075) begin + loader_error <= (loader_error || io_mem_rsp_payload_error); + end + if(loader_done) begin + loader_valid <= 1'b0; + loader_error <= 1'b0; + loader_killReg <= 1'b0; + end + if(when_DataCache_l1103) begin + loader_waysAllocator <= _zz_loader_waysAllocator[0:0]; + end + end + end + + +endmodule + +module InstructionCache ( + input io_flush, + input io_cpu_prefetch_isValid, + output reg io_cpu_prefetch_haltIt, + input [31:0] io_cpu_prefetch_pc, + input io_cpu_fetch_isValid, + input io_cpu_fetch_isStuck, + input io_cpu_fetch_isRemoved, + input [31:0] io_cpu_fetch_pc, + output [31:0] io_cpu_fetch_data, + input [31:0] io_cpu_fetch_mmuRsp_physicalAddress, + input io_cpu_fetch_mmuRsp_isIoAccess, + input io_cpu_fetch_mmuRsp_isPaging, + input io_cpu_fetch_mmuRsp_allowRead, + input io_cpu_fetch_mmuRsp_allowWrite, + input io_cpu_fetch_mmuRsp_allowExecute, + input io_cpu_fetch_mmuRsp_exception, + input io_cpu_fetch_mmuRsp_refilling, + input io_cpu_fetch_mmuRsp_bypassTranslation, + output [31:0] io_cpu_fetch_physicalAddress, + input io_cpu_decode_isValid, + input io_cpu_decode_isStuck, + input [31:0] io_cpu_decode_pc, + output [31:0] io_cpu_decode_physicalAddress, + output [31:0] io_cpu_decode_data, + output io_cpu_decode_cacheMiss, + output io_cpu_decode_error, + output io_cpu_decode_mmuRefilling, + output io_cpu_decode_mmuException, + input io_cpu_decode_isUser, + input io_cpu_fill_valid, + input [31:0] io_cpu_fill_payload, + output io_mem_cmd_valid, + input io_mem_cmd_ready, + output [31:0] io_mem_cmd_payload_address, + output [2:0] io_mem_cmd_payload_size, + input io_mem_rsp_valid, + input [31:0] io_mem_rsp_payload_data, + input io_mem_rsp_payload_error, + input clk, + input reset +); + reg [31:0] _zz_banks_0_port1; + reg [20:0] _zz_ways_0_tags_port1; + wire [20:0] _zz_ways_0_tags_port; + reg _zz_1; + reg _zz_2; + reg lineLoader_fire; + reg lineLoader_valid; + (* keep , syn_keep *) reg [31:0] lineLoader_address /* synthesis syn_keep = 1 */ ; + reg lineLoader_hadError; + reg lineLoader_flushPending; + reg [8:0] lineLoader_flushCounter; + wire when_InstructionCache_l338; + reg _zz_when_InstructionCache_l342; + wire when_InstructionCache_l342; + wire when_InstructionCache_l351; + reg lineLoader_cmdSent; + wire io_mem_cmd_fire; + wire when_Utils_l357; + reg lineLoader_wayToAllocate_willIncrement; + wire lineLoader_wayToAllocate_willClear; + wire lineLoader_wayToAllocate_willOverflowIfInc; + wire lineLoader_wayToAllocate_willOverflow; + (* keep , syn_keep *) reg [2:0] lineLoader_wordIndex /* synthesis syn_keep = 1 */ ; + wire lineLoader_write_tag_0_valid; + wire [7:0] lineLoader_write_tag_0_payload_address; + wire lineLoader_write_tag_0_payload_data_valid; + wire lineLoader_write_tag_0_payload_data_error; + wire [18:0] lineLoader_write_tag_0_payload_data_address; + wire lineLoader_write_data_0_valid; + wire [10:0] lineLoader_write_data_0_payload_address; + wire [31:0] lineLoader_write_data_0_payload_data; + wire when_InstructionCache_l401; + wire [10:0] _zz_fetchStage_read_banksValue_0_dataMem; + wire _zz_fetchStage_read_banksValue_0_dataMem_1; + wire [31:0] fetchStage_read_banksValue_0_dataMem; + wire [31:0] fetchStage_read_banksValue_0_data; + wire [7:0] _zz_fetchStage_read_waysValues_0_tag_valid; + wire _zz_fetchStage_read_waysValues_0_tag_valid_1; + wire fetchStage_read_waysValues_0_tag_valid; + wire fetchStage_read_waysValues_0_tag_error; + wire [18:0] fetchStage_read_waysValues_0_tag_address; + wire [20:0] _zz_fetchStage_read_waysValues_0_tag_valid_2; + wire fetchStage_hit_hits_0; + wire fetchStage_hit_valid; + wire fetchStage_hit_error; + wire [31:0] fetchStage_hit_data; + wire [31:0] fetchStage_hit_word; + wire when_InstructionCache_l435; + reg [31:0] io_cpu_fetch_data_regNextWhen; + wire when_InstructionCache_l459; + reg [31:0] decodeStage_mmuRsp_physicalAddress; + reg decodeStage_mmuRsp_isIoAccess; + reg decodeStage_mmuRsp_isPaging; + reg decodeStage_mmuRsp_allowRead; + reg decodeStage_mmuRsp_allowWrite; + reg decodeStage_mmuRsp_allowExecute; + reg decodeStage_mmuRsp_exception; + reg decodeStage_mmuRsp_refilling; + reg decodeStage_mmuRsp_bypassTranslation; + wire when_InstructionCache_l459_1; + reg decodeStage_hit_valid; + wire when_InstructionCache_l459_2; + reg decodeStage_hit_error; + (* ram_style = "block" *) reg [31:0] banks_0 [0:2047]; + (* ram_style = "block" *) reg [20:0] ways_0_tags [0:255]; + + assign _zz_ways_0_tags_port = {lineLoader_write_tag_0_payload_data_address,{lineLoader_write_tag_0_payload_data_error,lineLoader_write_tag_0_payload_data_valid}}; + always @(posedge clk) begin + if(_zz_1) begin + banks_0[lineLoader_write_data_0_payload_address] <= lineLoader_write_data_0_payload_data; + end + end + + always @(posedge clk) begin + if(_zz_fetchStage_read_banksValue_0_dataMem_1) begin + _zz_banks_0_port1 <= banks_0[_zz_fetchStage_read_banksValue_0_dataMem]; + end + end + + always @(posedge clk) begin + if(_zz_2) begin + ways_0_tags[lineLoader_write_tag_0_payload_address] <= _zz_ways_0_tags_port; + end + end + + always @(posedge clk) begin + if(_zz_fetchStage_read_waysValues_0_tag_valid_1) begin + _zz_ways_0_tags_port1 <= ways_0_tags[_zz_fetchStage_read_waysValues_0_tag_valid]; + end + end + + always @(*) begin + _zz_1 = 1'b0; + if(lineLoader_write_data_0_valid) begin + _zz_1 = 1'b1; + end + end + + always @(*) begin + _zz_2 = 1'b0; + if(lineLoader_write_tag_0_valid) begin + _zz_2 = 1'b1; + end + end + + always @(*) begin + lineLoader_fire = 1'b0; + if(io_mem_rsp_valid) begin + if(when_InstructionCache_l401) begin + lineLoader_fire = 1'b1; + end + end + end + + always @(*) begin + io_cpu_prefetch_haltIt = (lineLoader_valid || lineLoader_flushPending); + if(when_InstructionCache_l338) begin + io_cpu_prefetch_haltIt = 1'b1; + end + if(when_InstructionCache_l342) begin + io_cpu_prefetch_haltIt = 1'b1; + end + if(io_flush) begin + io_cpu_prefetch_haltIt = 1'b1; + end + end + + assign when_InstructionCache_l338 = (! lineLoader_flushCounter[8]); + assign when_InstructionCache_l342 = (! _zz_when_InstructionCache_l342); + assign when_InstructionCache_l351 = (lineLoader_flushPending && (! (lineLoader_valid || io_cpu_fetch_isValid))); + assign io_mem_cmd_fire = (io_mem_cmd_valid && io_mem_cmd_ready); + assign io_mem_cmd_valid = (lineLoader_valid && (! lineLoader_cmdSent)); + assign io_mem_cmd_payload_address = {lineLoader_address[31 : 5],5'h0}; + assign io_mem_cmd_payload_size = 3'b101; + assign when_Utils_l357 = (! lineLoader_valid); + always @(*) begin + lineLoader_wayToAllocate_willIncrement = 1'b0; + if(when_Utils_l357) begin + lineLoader_wayToAllocate_willIncrement = 1'b1; + end + end + + assign lineLoader_wayToAllocate_willClear = 1'b0; + assign lineLoader_wayToAllocate_willOverflowIfInc = 1'b1; + assign lineLoader_wayToAllocate_willOverflow = (lineLoader_wayToAllocate_willOverflowIfInc && lineLoader_wayToAllocate_willIncrement); + assign lineLoader_write_tag_0_valid = ((1'b1 && lineLoader_fire) || (! lineLoader_flushCounter[8])); + assign lineLoader_write_tag_0_payload_address = (lineLoader_flushCounter[8] ? lineLoader_address[12 : 5] : lineLoader_flushCounter[7 : 0]); + assign lineLoader_write_tag_0_payload_data_valid = lineLoader_flushCounter[8]; + assign lineLoader_write_tag_0_payload_data_error = (lineLoader_hadError || io_mem_rsp_payload_error); + assign lineLoader_write_tag_0_payload_data_address = lineLoader_address[31 : 13]; + assign lineLoader_write_data_0_valid = (io_mem_rsp_valid && 1'b1); + assign lineLoader_write_data_0_payload_address = {lineLoader_address[12 : 5],lineLoader_wordIndex}; + assign lineLoader_write_data_0_payload_data = io_mem_rsp_payload_data; + assign when_InstructionCache_l401 = (lineLoader_wordIndex == 3'b111); + assign _zz_fetchStage_read_banksValue_0_dataMem = io_cpu_prefetch_pc[12 : 2]; + assign _zz_fetchStage_read_banksValue_0_dataMem_1 = (! io_cpu_fetch_isStuck); + assign fetchStage_read_banksValue_0_dataMem = _zz_banks_0_port1; + assign fetchStage_read_banksValue_0_data = fetchStage_read_banksValue_0_dataMem[31 : 0]; + assign _zz_fetchStage_read_waysValues_0_tag_valid = io_cpu_prefetch_pc[12 : 5]; + assign _zz_fetchStage_read_waysValues_0_tag_valid_1 = (! io_cpu_fetch_isStuck); + assign _zz_fetchStage_read_waysValues_0_tag_valid_2 = _zz_ways_0_tags_port1; + assign fetchStage_read_waysValues_0_tag_valid = _zz_fetchStage_read_waysValues_0_tag_valid_2[0]; + assign fetchStage_read_waysValues_0_tag_error = _zz_fetchStage_read_waysValues_0_tag_valid_2[1]; + assign fetchStage_read_waysValues_0_tag_address = _zz_fetchStage_read_waysValues_0_tag_valid_2[20 : 2]; + assign fetchStage_hit_hits_0 = (fetchStage_read_waysValues_0_tag_valid && (fetchStage_read_waysValues_0_tag_address == io_cpu_fetch_mmuRsp_physicalAddress[31 : 13])); + assign fetchStage_hit_valid = (fetchStage_hit_hits_0 != 1'b0); + assign fetchStage_hit_error = fetchStage_read_waysValues_0_tag_error; + assign fetchStage_hit_data = fetchStage_read_banksValue_0_data; + assign fetchStage_hit_word = fetchStage_hit_data; + assign io_cpu_fetch_data = fetchStage_hit_word; + assign when_InstructionCache_l435 = (! io_cpu_decode_isStuck); + assign io_cpu_decode_data = io_cpu_fetch_data_regNextWhen; + assign io_cpu_fetch_physicalAddress = io_cpu_fetch_mmuRsp_physicalAddress; + assign when_InstructionCache_l459 = (! io_cpu_decode_isStuck); + assign when_InstructionCache_l459_1 = (! io_cpu_decode_isStuck); + assign when_InstructionCache_l459_2 = (! io_cpu_decode_isStuck); + assign io_cpu_decode_cacheMiss = (! decodeStage_hit_valid); + assign io_cpu_decode_error = (decodeStage_hit_error || ((! decodeStage_mmuRsp_isPaging) && (decodeStage_mmuRsp_exception || (! decodeStage_mmuRsp_allowExecute)))); + assign io_cpu_decode_mmuRefilling = decodeStage_mmuRsp_refilling; + assign io_cpu_decode_mmuException = (((! decodeStage_mmuRsp_refilling) && decodeStage_mmuRsp_isPaging) && (decodeStage_mmuRsp_exception || (! decodeStage_mmuRsp_allowExecute))); + assign io_cpu_decode_physicalAddress = decodeStage_mmuRsp_physicalAddress; + always @(posedge clk) begin + if(reset) begin + lineLoader_valid <= 1'b0; + lineLoader_hadError <= 1'b0; + lineLoader_flushPending <= 1'b1; + lineLoader_cmdSent <= 1'b0; + lineLoader_wordIndex <= 3'b000; + end else begin + if(lineLoader_fire) begin + lineLoader_valid <= 1'b0; + end + if(lineLoader_fire) begin + lineLoader_hadError <= 1'b0; + end + if(io_cpu_fill_valid) begin + lineLoader_valid <= 1'b1; + end + if(io_flush) begin + lineLoader_flushPending <= 1'b1; + end + if(when_InstructionCache_l351) begin + lineLoader_flushPending <= 1'b0; + end + if(io_mem_cmd_fire) begin + lineLoader_cmdSent <= 1'b1; + end + if(lineLoader_fire) begin + lineLoader_cmdSent <= 1'b0; + end + if(io_mem_rsp_valid) begin + lineLoader_wordIndex <= (lineLoader_wordIndex + 3'b001); + if(io_mem_rsp_payload_error) begin + lineLoader_hadError <= 1'b1; + end + end + end + end + + always @(posedge clk) begin + if(io_cpu_fill_valid) begin + lineLoader_address <= io_cpu_fill_payload; + end + if(when_InstructionCache_l338) begin + lineLoader_flushCounter <= (lineLoader_flushCounter + 9'h001); + end + _zz_when_InstructionCache_l342 <= lineLoader_flushCounter[8]; + if(when_InstructionCache_l351) begin + lineLoader_flushCounter <= 9'h0; + end + if(when_InstructionCache_l435) begin + io_cpu_fetch_data_regNextWhen <= io_cpu_fetch_data; + end + if(when_InstructionCache_l459) begin + decodeStage_mmuRsp_physicalAddress <= io_cpu_fetch_mmuRsp_physicalAddress; + decodeStage_mmuRsp_isIoAccess <= io_cpu_fetch_mmuRsp_isIoAccess; + decodeStage_mmuRsp_isPaging <= io_cpu_fetch_mmuRsp_isPaging; + decodeStage_mmuRsp_allowRead <= io_cpu_fetch_mmuRsp_allowRead; + decodeStage_mmuRsp_allowWrite <= io_cpu_fetch_mmuRsp_allowWrite; + decodeStage_mmuRsp_allowExecute <= io_cpu_fetch_mmuRsp_allowExecute; + decodeStage_mmuRsp_exception <= io_cpu_fetch_mmuRsp_exception; + decodeStage_mmuRsp_refilling <= io_cpu_fetch_mmuRsp_refilling; + decodeStage_mmuRsp_bypassTranslation <= io_cpu_fetch_mmuRsp_bypassTranslation; + end + if(when_InstructionCache_l459_1) begin + decodeStage_hit_valid <= fetchStage_hit_valid; + end + if(when_InstructionCache_l459_2) begin + decodeStage_hit_error <= fetchStage_hit_error; + end + end + + +endmodule diff --git a/pythondata_cpu_vexriscv/verilog/VexRiscv_PerfCfu.yaml b/pythondata_cpu_vexriscv/verilog/VexRiscv_PerfCfu.yaml new file mode 100644 index 0000000..1f28413 --- /dev/null +++ b/pythondata_cpu_vexriscv/verilog/VexRiscv_PerfCfu.yaml @@ -0,0 +1,4 @@ +iBus: !!vexriscv.BusReport + flushInstructions: [4111, 19, 19, 19] + info: !!vexriscv.CacheReport {bytePerLine: 32, size: 8192} + kind: cached diff --git a/pythondata_cpu_vexriscv/verilog/VexRiscv_PerfCfuDebug.v b/pythondata_cpu_vexriscv/verilog/VexRiscv_PerfCfuDebug.v new file mode 100644 index 0000000..5a78830 --- /dev/null +++ b/pythondata_cpu_vexriscv/verilog/VexRiscv_PerfCfuDebug.v @@ -0,0 +1,7617 @@ +// Generator : SpinalHDL v1.6.0 git head : 73c8d8e2b86b45646e9d0b2e729291f2b65e6be3 +// Component : VexRiscv +// Git hash : 593e180abf5ba39e7fa33d4f371646453f84496a + + +`define Input2Kind_binary_sequential_type [0:0] +`define Input2Kind_binary_sequential_RS 1'b0 +`define Input2Kind_binary_sequential_IMM_I 1'b1 + +`define EnvCtrlEnum_binary_sequential_type [1:0] +`define EnvCtrlEnum_binary_sequential_NONE 2'b00 +`define EnvCtrlEnum_binary_sequential_XRET 2'b01 +`define EnvCtrlEnum_binary_sequential_WFI 2'b10 +`define EnvCtrlEnum_binary_sequential_ECALL 2'b11 + +`define BranchCtrlEnum_binary_sequential_type [1:0] +`define BranchCtrlEnum_binary_sequential_INC 2'b00 +`define BranchCtrlEnum_binary_sequential_B 2'b01 +`define BranchCtrlEnum_binary_sequential_JAL 2'b10 +`define BranchCtrlEnum_binary_sequential_JALR 2'b11 + +`define ShiftCtrlEnum_binary_sequential_type [1:0] +`define ShiftCtrlEnum_binary_sequential_DISABLE_1 2'b00 +`define ShiftCtrlEnum_binary_sequential_SLL_1 2'b01 +`define ShiftCtrlEnum_binary_sequential_SRL_1 2'b10 +`define ShiftCtrlEnum_binary_sequential_SRA_1 2'b11 + +`define AluBitwiseCtrlEnum_binary_sequential_type [1:0] +`define AluBitwiseCtrlEnum_binary_sequential_XOR_1 2'b00 +`define AluBitwiseCtrlEnum_binary_sequential_OR_1 2'b01 +`define AluBitwiseCtrlEnum_binary_sequential_AND_1 2'b10 + +`define Src2CtrlEnum_binary_sequential_type [1:0] +`define Src2CtrlEnum_binary_sequential_RS 2'b00 +`define Src2CtrlEnum_binary_sequential_IMI 2'b01 +`define Src2CtrlEnum_binary_sequential_IMS 2'b10 +`define Src2CtrlEnum_binary_sequential_PC 2'b11 + +`define AluCtrlEnum_binary_sequential_type [1:0] +`define AluCtrlEnum_binary_sequential_ADD_SUB 2'b00 +`define AluCtrlEnum_binary_sequential_SLT_SLTU 2'b01 +`define AluCtrlEnum_binary_sequential_BITWISE 2'b10 + +`define Src1CtrlEnum_binary_sequential_type [1:0] +`define Src1CtrlEnum_binary_sequential_RS 2'b00 +`define Src1CtrlEnum_binary_sequential_IMU 2'b01 +`define Src1CtrlEnum_binary_sequential_PC_INCREMENT 2'b10 +`define Src1CtrlEnum_binary_sequential_URS1 2'b11 + + +module VexRiscv ( + input [31:0] externalResetVector, + input timerInterrupt, + input softwareInterrupt, + input [31:0] externalInterruptArray, + input debug_bus_cmd_valid, + output reg debug_bus_cmd_ready, + input debug_bus_cmd_payload_wr, + input [7:0] debug_bus_cmd_payload_address, + input [31:0] debug_bus_cmd_payload_data, + output reg [31:0] debug_bus_rsp_data, + output debug_resetOut, + output CfuPlugin_bus_cmd_valid, + input CfuPlugin_bus_cmd_ready, + output [9:0] CfuPlugin_bus_cmd_payload_function_id, + output [31:0] CfuPlugin_bus_cmd_payload_inputs_0, + output [31:0] CfuPlugin_bus_cmd_payload_inputs_1, + input CfuPlugin_bus_rsp_valid, + output CfuPlugin_bus_rsp_ready, + input [31:0] CfuPlugin_bus_rsp_payload_outputs_0, + output reg iBusWishbone_CYC, + output reg iBusWishbone_STB, + input iBusWishbone_ACK, + output iBusWishbone_WE, + output [29:0] iBusWishbone_ADR, + input [31:0] iBusWishbone_DAT_MISO, + output [31:0] iBusWishbone_DAT_MOSI, + output [3:0] iBusWishbone_SEL, + input iBusWishbone_ERR, + output [2:0] iBusWishbone_CTI, + output [1:0] iBusWishbone_BTE, + output dBusWishbone_CYC, + output dBusWishbone_STB, + input dBusWishbone_ACK, + output dBusWishbone_WE, + output [29:0] dBusWishbone_ADR, + input [31:0] dBusWishbone_DAT_MISO, + output [31:0] dBusWishbone_DAT_MOSI, + output [3:0] dBusWishbone_SEL, + input dBusWishbone_ERR, + output [2:0] dBusWishbone_CTI, + output [1:0] dBusWishbone_BTE, + input clk, + input reset, + input debugReset +); + wire IBusCachedPlugin_cache_io_flush; + wire IBusCachedPlugin_cache_io_cpu_prefetch_isValid; + wire IBusCachedPlugin_cache_io_cpu_fetch_isValid; + wire IBusCachedPlugin_cache_io_cpu_fetch_isStuck; + wire IBusCachedPlugin_cache_io_cpu_fetch_isRemoved; + wire IBusCachedPlugin_cache_io_cpu_decode_isValid; + wire IBusCachedPlugin_cache_io_cpu_decode_isStuck; + wire IBusCachedPlugin_cache_io_cpu_decode_isUser; + reg IBusCachedPlugin_cache_io_cpu_fill_valid; + wire dataCache_1_io_cpu_execute_isValid; + wire [31:0] dataCache_1_io_cpu_execute_address; + wire dataCache_1_io_cpu_memory_isValid; + wire [31:0] dataCache_1_io_cpu_memory_address; + reg dataCache_1_io_cpu_memory_mmuRsp_isIoAccess; + reg dataCache_1_io_cpu_writeBack_isValid; + wire dataCache_1_io_cpu_writeBack_isUser; + wire [31:0] dataCache_1_io_cpu_writeBack_storeData; + wire [31:0] dataCache_1_io_cpu_writeBack_address; + wire dataCache_1_io_cpu_writeBack_fence_SW; + wire dataCache_1_io_cpu_writeBack_fence_SR; + wire dataCache_1_io_cpu_writeBack_fence_SO; + wire dataCache_1_io_cpu_writeBack_fence_SI; + wire dataCache_1_io_cpu_writeBack_fence_PW; + wire dataCache_1_io_cpu_writeBack_fence_PR; + wire dataCache_1_io_cpu_writeBack_fence_PO; + wire dataCache_1_io_cpu_writeBack_fence_PI; + wire [3:0] dataCache_1_io_cpu_writeBack_fence_FM; + wire dataCache_1_io_cpu_flush_valid; + wire dataCache_1_io_mem_cmd_ready; + reg [31:0] _zz_RegFilePlugin_regFile_port0; + reg [31:0] _zz_RegFilePlugin_regFile_port1; + wire IBusCachedPlugin_cache_io_cpu_prefetch_haltIt; + wire [31:0] IBusCachedPlugin_cache_io_cpu_fetch_data; + wire [31:0] IBusCachedPlugin_cache_io_cpu_fetch_physicalAddress; + wire IBusCachedPlugin_cache_io_cpu_decode_error; + wire IBusCachedPlugin_cache_io_cpu_decode_mmuRefilling; + wire IBusCachedPlugin_cache_io_cpu_decode_mmuException; + wire [31:0] IBusCachedPlugin_cache_io_cpu_decode_data; + wire IBusCachedPlugin_cache_io_cpu_decode_cacheMiss; + wire [31:0] IBusCachedPlugin_cache_io_cpu_decode_physicalAddress; + wire IBusCachedPlugin_cache_io_mem_cmd_valid; + wire [31:0] IBusCachedPlugin_cache_io_mem_cmd_payload_address; + wire [2:0] IBusCachedPlugin_cache_io_mem_cmd_payload_size; + wire dataCache_1_io_cpu_execute_haltIt; + wire dataCache_1_io_cpu_execute_refilling; + wire dataCache_1_io_cpu_memory_isWrite; + wire dataCache_1_io_cpu_writeBack_haltIt; + wire [31:0] dataCache_1_io_cpu_writeBack_data; + wire dataCache_1_io_cpu_writeBack_mmuException; + wire dataCache_1_io_cpu_writeBack_unalignedAccess; + wire dataCache_1_io_cpu_writeBack_accessError; + wire dataCache_1_io_cpu_writeBack_isWrite; + wire dataCache_1_io_cpu_writeBack_keepMemRspData; + wire dataCache_1_io_cpu_writeBack_exclusiveOk; + wire dataCache_1_io_cpu_flush_ready; + wire dataCache_1_io_cpu_redo; + wire dataCache_1_io_mem_cmd_valid; + wire dataCache_1_io_mem_cmd_payload_wr; + wire dataCache_1_io_mem_cmd_payload_uncached; + wire [31:0] dataCache_1_io_mem_cmd_payload_address; + wire [31:0] dataCache_1_io_mem_cmd_payload_data; + wire [3:0] dataCache_1_io_mem_cmd_payload_mask; + wire [2:0] dataCache_1_io_mem_cmd_payload_size; + wire dataCache_1_io_mem_cmd_payload_last; + wire [51:0] _zz_memory_MUL_LOW; + wire [51:0] _zz_memory_MUL_LOW_1; + wire [51:0] _zz_memory_MUL_LOW_2; + wire [51:0] _zz_memory_MUL_LOW_3; + wire [32:0] _zz_memory_MUL_LOW_4; + wire [51:0] _zz_memory_MUL_LOW_5; + wire [49:0] _zz_memory_MUL_LOW_6; + wire [51:0] _zz_memory_MUL_LOW_7; + wire [49:0] _zz_memory_MUL_LOW_8; + wire [31:0] _zz_execute_SHIFT_RIGHT; + wire [32:0] _zz_execute_SHIFT_RIGHT_1; + wire [32:0] _zz_execute_SHIFT_RIGHT_2; + wire [31:0] _zz_decode_LEGAL_INSTRUCTION; + wire [31:0] _zz_decode_LEGAL_INSTRUCTION_1; + wire [31:0] _zz_decode_LEGAL_INSTRUCTION_2; + wire _zz_decode_LEGAL_INSTRUCTION_3; + wire [0:0] _zz_decode_LEGAL_INSTRUCTION_4; + wire [14:0] _zz_decode_LEGAL_INSTRUCTION_5; + wire [31:0] _zz_decode_LEGAL_INSTRUCTION_6; + wire [31:0] _zz_decode_LEGAL_INSTRUCTION_7; + wire [31:0] _zz_decode_LEGAL_INSTRUCTION_8; + wire _zz_decode_LEGAL_INSTRUCTION_9; + wire [0:0] _zz_decode_LEGAL_INSTRUCTION_10; + wire [8:0] _zz_decode_LEGAL_INSTRUCTION_11; + wire [31:0] _zz_decode_LEGAL_INSTRUCTION_12; + wire [31:0] _zz_decode_LEGAL_INSTRUCTION_13; + wire [31:0] _zz_decode_LEGAL_INSTRUCTION_14; + wire _zz_decode_LEGAL_INSTRUCTION_15; + wire [0:0] _zz_decode_LEGAL_INSTRUCTION_16; + wire [2:0] _zz_decode_LEGAL_INSTRUCTION_17; + wire [3:0] _zz__zz_IBusCachedPlugin_jump_pcLoad_payload_1; + reg [31:0] _zz_IBusCachedPlugin_jump_pcLoad_payload_5; + wire [1:0] _zz_IBusCachedPlugin_jump_pcLoad_payload_6; + wire [31:0] _zz_IBusCachedPlugin_fetchPc_pc; + wire [2:0] _zz_IBusCachedPlugin_fetchPc_pc_1; + wire [11:0] _zz__zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch; + wire [31:0] _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_2; + wire [19:0] _zz__zz_2; + wire [11:0] _zz__zz_4; + wire [31:0] _zz__zz_6; + wire [31:0] _zz__zz_6_1; + wire [19:0] _zz__zz_IBusCachedPlugin_predictionJumpInterface_payload; + wire [11:0] _zz__zz_IBusCachedPlugin_predictionJumpInterface_payload_2; + wire _zz_IBusCachedPlugin_predictionJumpInterface_payload_4; + wire _zz_IBusCachedPlugin_predictionJumpInterface_payload_5; + wire _zz_IBusCachedPlugin_predictionJumpInterface_payload_6; + wire [2:0] _zz_DBusCachedPlugin_exceptionBus_payload_code; + wire [2:0] _zz_DBusCachedPlugin_exceptionBus_payload_code_1; + reg [7:0] _zz_writeBack_DBusCachedPlugin_rspShifted; + wire [1:0] _zz_writeBack_DBusCachedPlugin_rspShifted_1; + reg [7:0] _zz_writeBack_DBusCachedPlugin_rspShifted_2; + wire [0:0] _zz_writeBack_DBusCachedPlugin_rspShifted_3; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_1; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_2; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_3; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_4; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_5; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_6; + wire [27:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_7; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_8; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_9; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_10; + wire [1:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_11; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_12; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_13; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_14; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_15; + wire [1:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_16; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_17; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_18; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_19; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_20; + wire [22:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_21; + wire [1:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_22; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_23; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_24; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_25; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_26; + wire [1:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_27; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_28; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_29; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_30; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_31; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_32; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_33; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_34; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_35; + wire [19:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_36; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_37; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_38; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_39; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_40; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_41; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_42; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_43; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_44; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_45; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_46; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_47; + wire [16:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_48; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_49; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_50; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_51; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_52; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_53; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_54; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_55; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_56; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_57; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_58; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_59; + wire [3:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_60; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_61; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_62; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_63; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_64; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_65; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_66; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_67; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_68; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_69; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_70; + wire [13:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_71; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_72; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_73; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_74; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_75; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_76; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_77; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_78; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_79; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_80; + wire [3:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_81; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_82; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_83; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_84; + wire [1:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_85; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_86; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_87; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_88; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_89; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_90; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_91; + wire [3:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_92; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_93; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_94; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_95; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_96; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_97; + wire [1:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_98; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_99; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_100; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_101; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_102; + wire [10:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_103; + wire [5:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_104; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_105; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_106; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_107; + wire [3:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_108; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_109; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_110; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_111; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_112; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_113; + wire [1:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_114; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_115; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_116; + wire [5:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_117; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_118; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_119; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_120; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_121; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_122; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_123; + wire [1:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_124; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_125; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_126; + wire [1:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_127; + wire [7:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_128; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_129; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_130; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_131; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_132; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_133; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_134; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_135; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_136; + wire [5:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_137; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_138; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_139; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_140; + wire [2:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_141; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_142; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_143; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_144; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_145; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_146; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_147; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_148; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_149; + wire [3:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_150; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_151; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_152; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_153; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_154; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_155; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_156; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_157; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_158; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_159; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_160; + wire [1:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_161; + wire [1:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_162; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_163; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_164; + wire [1:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_165; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_166; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_167; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_168; + wire _zz_RegFilePlugin_regFile_port; + wire _zz_decode_RegFilePlugin_rs1Data; + wire _zz_RegFilePlugin_regFile_port_1; + wire _zz_decode_RegFilePlugin_rs2Data; + wire [0:0] _zz__zz_execute_REGFILE_WRITE_DATA; + wire [2:0] _zz__zz_execute_SRC1; + wire [4:0] _zz__zz_execute_SRC1_1; + wire [11:0] _zz__zz_execute_SRC2_3; + wire [31:0] _zz_execute_SrcPlugin_addSub; + wire [31:0] _zz_execute_SrcPlugin_addSub_1; + wire [31:0] _zz_execute_SrcPlugin_addSub_2; + wire [31:0] _zz_execute_SrcPlugin_addSub_3; + wire [31:0] _zz_execute_SrcPlugin_addSub_4; + wire [31:0] _zz_execute_SrcPlugin_addSub_5; + wire [31:0] _zz_execute_SrcPlugin_addSub_6; + wire [19:0] _zz__zz_execute_BranchPlugin_missAlignedTarget_2; + wire [11:0] _zz__zz_execute_BranchPlugin_missAlignedTarget_4; + wire [31:0] _zz__zz_execute_BranchPlugin_missAlignedTarget_6; + wire [31:0] _zz__zz_execute_BranchPlugin_missAlignedTarget_6_1; + wire [31:0] _zz__zz_execute_BranchPlugin_missAlignedTarget_6_2; + wire [19:0] _zz__zz_execute_BranchPlugin_branch_src2_2; + wire [11:0] _zz__zz_execute_BranchPlugin_branch_src2_4; + wire _zz_execute_BranchPlugin_branch_src2_6; + wire _zz_execute_BranchPlugin_branch_src2_7; + wire _zz_execute_BranchPlugin_branch_src2_8; + wire [2:0] _zz_execute_BranchPlugin_branch_src2_9; + wire [1:0] _zz__zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_1; + wire [1:0] _zz__zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_1_1; + wire [1:0] _zz__zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_3; + wire [1:0] _zz__zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_3_1; + wire _zz_when; + wire _zz_when_1; + wire [65:0] _zz_writeBack_MulPlugin_result; + wire [65:0] _zz_writeBack_MulPlugin_result_1; + wire [31:0] _zz__zz_decode_RS2_2; + wire [31:0] _zz__zz_decode_RS2_2_1; + wire [5:0] _zz_memory_DivPlugin_div_counter_valueNext; + wire [0:0] _zz_memory_DivPlugin_div_counter_valueNext_1; + wire [32:0] _zz_memory_DivPlugin_div_stage_0_remainderMinusDenominator; + wire [31:0] _zz_memory_DivPlugin_div_stage_0_outRemainder; + wire [31:0] _zz_memory_DivPlugin_div_stage_0_outRemainder_1; + wire [32:0] _zz_memory_DivPlugin_div_stage_0_outNumerator; + wire [32:0] _zz_memory_DivPlugin_div_result_1; + wire [32:0] _zz_memory_DivPlugin_div_result_2; + wire [32:0] _zz_memory_DivPlugin_div_result_3; + wire [32:0] _zz_memory_DivPlugin_div_result_4; + wire [0:0] _zz_memory_DivPlugin_div_result_5; + wire [32:0] _zz_memory_DivPlugin_rs1_2; + wire [0:0] _zz_memory_DivPlugin_rs1_3; + wire [31:0] _zz_memory_DivPlugin_rs2_1; + wire [0:0] _zz_memory_DivPlugin_rs2_2; + wire [9:0] _zz_execute_CfuPlugin_functionsIds_0; + wire [31:0] _zz_CsrPlugin_csrMapping_readDataInit_41; + wire [26:0] _zz_iBusWishbone_ADR_1; + wire [51:0] memory_MUL_LOW; + wire writeBack_CfuPlugin_CFU_IN_FLIGHT; + wire execute_CfuPlugin_CFU_IN_FLIGHT; + wire [33:0] memory_MUL_HH; + wire [33:0] execute_MUL_HH; + wire [33:0] execute_MUL_HL; + wire [33:0] execute_MUL_LH; + wire [31:0] execute_MUL_LL; + wire [31:0] execute_SHIFT_RIGHT; + wire [31:0] execute_REGFILE_WRITE_DATA; + wire [31:0] memory_MEMORY_STORE_DATA_RF; + wire [31:0] execute_MEMORY_STORE_DATA_RF; + wire decode_DO_EBREAK; + wire decode_CSR_READ_OPCODE; + wire decode_CSR_WRITE_OPCODE; + wire decode_PREDICTION_HAD_BRANCHED2; + wire decode_SRC2_FORCE_ZERO; + wire `Input2Kind_binary_sequential_type decode_CfuPlugin_CFU_INPUT_2_KIND; + wire `Input2Kind_binary_sequential_type _zz_decode_CfuPlugin_CFU_INPUT_2_KIND; + wire `Input2Kind_binary_sequential_type _zz_decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND; + wire `Input2Kind_binary_sequential_type _zz_decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND_1; + wire decode_CfuPlugin_CFU_ENABLE; + wire decode_IS_RS2_SIGNED; + wire decode_IS_RS1_SIGNED; + wire decode_IS_DIV; + wire memory_IS_MUL; + wire execute_IS_MUL; + wire decode_IS_MUL; + wire `EnvCtrlEnum_binary_sequential_type _zz_memory_to_writeBack_ENV_CTRL; + wire `EnvCtrlEnum_binary_sequential_type _zz_memory_to_writeBack_ENV_CTRL_1; + wire `EnvCtrlEnum_binary_sequential_type _zz_execute_to_memory_ENV_CTRL; + wire `EnvCtrlEnum_binary_sequential_type _zz_execute_to_memory_ENV_CTRL_1; + wire `EnvCtrlEnum_binary_sequential_type decode_ENV_CTRL; + wire `EnvCtrlEnum_binary_sequential_type _zz_decode_ENV_CTRL; + wire `EnvCtrlEnum_binary_sequential_type _zz_decode_to_execute_ENV_CTRL; + wire `EnvCtrlEnum_binary_sequential_type _zz_decode_to_execute_ENV_CTRL_1; + wire decode_IS_CSR; + wire `BranchCtrlEnum_binary_sequential_type _zz_decode_to_execute_BRANCH_CTRL; + wire `BranchCtrlEnum_binary_sequential_type _zz_decode_to_execute_BRANCH_CTRL_1; + wire `ShiftCtrlEnum_binary_sequential_type _zz_execute_to_memory_SHIFT_CTRL; + wire `ShiftCtrlEnum_binary_sequential_type _zz_execute_to_memory_SHIFT_CTRL_1; + wire `ShiftCtrlEnum_binary_sequential_type decode_SHIFT_CTRL; + wire `ShiftCtrlEnum_binary_sequential_type _zz_decode_SHIFT_CTRL; + wire `ShiftCtrlEnum_binary_sequential_type _zz_decode_to_execute_SHIFT_CTRL; + wire `ShiftCtrlEnum_binary_sequential_type _zz_decode_to_execute_SHIFT_CTRL_1; + wire `AluBitwiseCtrlEnum_binary_sequential_type decode_ALU_BITWISE_CTRL; + wire `AluBitwiseCtrlEnum_binary_sequential_type _zz_decode_ALU_BITWISE_CTRL; + wire `AluBitwiseCtrlEnum_binary_sequential_type _zz_decode_to_execute_ALU_BITWISE_CTRL; + wire `AluBitwiseCtrlEnum_binary_sequential_type _zz_decode_to_execute_ALU_BITWISE_CTRL_1; + wire decode_SRC_LESS_UNSIGNED; + wire decode_MEMORY_MANAGMENT; + wire memory_MEMORY_WR; + wire decode_MEMORY_WR; + wire execute_BYPASSABLE_MEMORY_STAGE; + wire decode_BYPASSABLE_MEMORY_STAGE; + wire decode_BYPASSABLE_EXECUTE_STAGE; + wire `Src2CtrlEnum_binary_sequential_type decode_SRC2_CTRL; + wire `Src2CtrlEnum_binary_sequential_type _zz_decode_SRC2_CTRL; + wire `Src2CtrlEnum_binary_sequential_type _zz_decode_to_execute_SRC2_CTRL; + wire `Src2CtrlEnum_binary_sequential_type _zz_decode_to_execute_SRC2_CTRL_1; + wire `AluCtrlEnum_binary_sequential_type decode_ALU_CTRL; + wire `AluCtrlEnum_binary_sequential_type _zz_decode_ALU_CTRL; + wire `AluCtrlEnum_binary_sequential_type _zz_decode_to_execute_ALU_CTRL; + wire `AluCtrlEnum_binary_sequential_type _zz_decode_to_execute_ALU_CTRL_1; + wire `Src1CtrlEnum_binary_sequential_type decode_SRC1_CTRL; + wire `Src1CtrlEnum_binary_sequential_type _zz_decode_SRC1_CTRL; + wire `Src1CtrlEnum_binary_sequential_type _zz_decode_to_execute_SRC1_CTRL; + wire `Src1CtrlEnum_binary_sequential_type _zz_decode_to_execute_SRC1_CTRL_1; + wire decode_MEMORY_FORCE_CONSTISTENCY; + wire [31:0] writeBack_FORMAL_PC_NEXT; + wire [31:0] memory_FORMAL_PC_NEXT; + wire [31:0] execute_FORMAL_PC_NEXT; + wire [31:0] decode_FORMAL_PC_NEXT; + wire [31:0] memory_PC; + reg _zz_memory_to_writeBack_CfuPlugin_CFU_IN_FLIGHT; + reg _zz_execute_to_memory_CfuPlugin_CFU_IN_FLIGHT; + wire memory_CfuPlugin_CFU_IN_FLIGHT; + wire `Input2Kind_binary_sequential_type execute_CfuPlugin_CFU_INPUT_2_KIND; + wire `Input2Kind_binary_sequential_type _zz_execute_CfuPlugin_CFU_INPUT_2_KIND; + wire execute_CfuPlugin_CFU_ENABLE; + wire execute_DO_EBREAK; + wire decode_IS_EBREAK; + wire execute_IS_RS1_SIGNED; + wire execute_IS_DIV; + wire execute_IS_RS2_SIGNED; + wire memory_IS_DIV; + wire writeBack_IS_MUL; + wire [33:0] writeBack_MUL_HH; + wire [51:0] writeBack_MUL_LOW; + wire [33:0] memory_MUL_HL; + wire [33:0] memory_MUL_LH; + wire [31:0] memory_MUL_LL; + wire execute_CSR_READ_OPCODE; + wire execute_CSR_WRITE_OPCODE; + wire execute_IS_CSR; + wire `EnvCtrlEnum_binary_sequential_type memory_ENV_CTRL; + wire `EnvCtrlEnum_binary_sequential_type _zz_memory_ENV_CTRL; + wire `EnvCtrlEnum_binary_sequential_type execute_ENV_CTRL; + wire `EnvCtrlEnum_binary_sequential_type _zz_execute_ENV_CTRL; + wire `EnvCtrlEnum_binary_sequential_type writeBack_ENV_CTRL; + wire `EnvCtrlEnum_binary_sequential_type _zz_writeBack_ENV_CTRL; + wire [31:0] execute_BRANCH_CALC; + wire execute_BRANCH_DO; + wire [31:0] execute_PC; + wire execute_PREDICTION_HAD_BRANCHED2; + (* keep , syn_keep *) wire [31:0] execute_RS1 /* synthesis syn_keep = 1 */ ; + wire execute_BRANCH_COND_RESULT; + wire `BranchCtrlEnum_binary_sequential_type execute_BRANCH_CTRL; + wire `BranchCtrlEnum_binary_sequential_type _zz_execute_BRANCH_CTRL; + wire decode_RS2_USE; + wire decode_RS1_USE; + reg [31:0] _zz_decode_RS2; + wire execute_REGFILE_WRITE_VALID; + wire execute_BYPASSABLE_EXECUTE_STAGE; + wire memory_REGFILE_WRITE_VALID; + wire [31:0] memory_INSTRUCTION; + wire memory_BYPASSABLE_MEMORY_STAGE; + wire writeBack_REGFILE_WRITE_VALID; + reg [31:0] decode_RS2; + reg [31:0] decode_RS1; + wire [31:0] memory_SHIFT_RIGHT; + reg [31:0] _zz_decode_RS2_1; + wire `ShiftCtrlEnum_binary_sequential_type memory_SHIFT_CTRL; + wire `ShiftCtrlEnum_binary_sequential_type _zz_memory_SHIFT_CTRL; + wire `ShiftCtrlEnum_binary_sequential_type execute_SHIFT_CTRL; + wire `ShiftCtrlEnum_binary_sequential_type _zz_execute_SHIFT_CTRL; + wire execute_SRC_LESS_UNSIGNED; + wire execute_SRC2_FORCE_ZERO; + wire execute_SRC_USE_SUB_LESS; + wire [31:0] _zz_execute_SRC2; + wire `Src2CtrlEnum_binary_sequential_type execute_SRC2_CTRL; + wire `Src2CtrlEnum_binary_sequential_type _zz_execute_SRC2_CTRL; + wire `Src1CtrlEnum_binary_sequential_type execute_SRC1_CTRL; + wire `Src1CtrlEnum_binary_sequential_type _zz_execute_SRC1_CTRL; + wire decode_SRC_USE_SUB_LESS; + wire decode_SRC_ADD_ZERO; + wire [31:0] execute_SRC_ADD_SUB; + wire execute_SRC_LESS; + wire `AluCtrlEnum_binary_sequential_type execute_ALU_CTRL; + wire `AluCtrlEnum_binary_sequential_type _zz_execute_ALU_CTRL; + wire [31:0] execute_SRC2; + wire [31:0] execute_SRC1; + wire `AluBitwiseCtrlEnum_binary_sequential_type execute_ALU_BITWISE_CTRL; + wire `AluBitwiseCtrlEnum_binary_sequential_type _zz_execute_ALU_BITWISE_CTRL; + wire [31:0] _zz_lastStageRegFileWrite_payload_address; + wire _zz_lastStageRegFileWrite_valid; + reg _zz_1; + wire [31:0] decode_INSTRUCTION_ANTICIPATED; + reg decode_REGFILE_WRITE_VALID; + wire decode_LEGAL_INSTRUCTION; + wire `Input2Kind_binary_sequential_type _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_1; + wire `EnvCtrlEnum_binary_sequential_type _zz_decode_ENV_CTRL_1; + wire `BranchCtrlEnum_binary_sequential_type _zz_decode_BRANCH_CTRL; + wire `ShiftCtrlEnum_binary_sequential_type _zz_decode_SHIFT_CTRL_1; + wire `AluBitwiseCtrlEnum_binary_sequential_type _zz_decode_ALU_BITWISE_CTRL_1; + wire `Src2CtrlEnum_binary_sequential_type _zz_decode_SRC2_CTRL_1; + wire `AluCtrlEnum_binary_sequential_type _zz_decode_ALU_CTRL_1; + wire `Src1CtrlEnum_binary_sequential_type _zz_decode_SRC1_CTRL_1; + reg [31:0] _zz_decode_RS2_2; + wire writeBack_MEMORY_WR; + wire [31:0] writeBack_MEMORY_STORE_DATA_RF; + wire [31:0] writeBack_REGFILE_WRITE_DATA; + wire writeBack_MEMORY_ENABLE; + wire [31:0] memory_REGFILE_WRITE_DATA; + wire memory_MEMORY_ENABLE; + wire execute_MEMORY_FORCE_CONSTISTENCY; + wire execute_MEMORY_MANAGMENT; + (* keep , syn_keep *) wire [31:0] execute_RS2 /* synthesis syn_keep = 1 */ ; + wire execute_MEMORY_WR; + wire [31:0] execute_SRC_ADD; + wire execute_MEMORY_ENABLE; + wire [31:0] execute_INSTRUCTION; + wire decode_MEMORY_ENABLE; + wire decode_FLUSH_ALL; + reg IBusCachedPlugin_rsp_issueDetected_4; + reg IBusCachedPlugin_rsp_issueDetected_3; + reg IBusCachedPlugin_rsp_issueDetected_2; + reg IBusCachedPlugin_rsp_issueDetected_1; + wire `BranchCtrlEnum_binary_sequential_type decode_BRANCH_CTRL; + wire `BranchCtrlEnum_binary_sequential_type _zz_decode_BRANCH_CTRL_1; + wire [31:0] decode_INSTRUCTION; + reg [31:0] _zz_execute_to_memory_FORMAL_PC_NEXT; + reg [31:0] _zz_decode_to_execute_FORMAL_PC_NEXT; + wire [31:0] decode_PC; + wire [31:0] writeBack_PC; + wire [31:0] writeBack_INSTRUCTION; + reg decode_arbitration_haltItself; + reg decode_arbitration_haltByOther; + reg decode_arbitration_removeIt; + wire decode_arbitration_flushIt; + reg decode_arbitration_flushNext; + reg decode_arbitration_isValid; + wire decode_arbitration_isStuck; + wire decode_arbitration_isStuckByOthers; + wire decode_arbitration_isFlushed; + wire decode_arbitration_isMoving; + wire decode_arbitration_isFiring; + reg execute_arbitration_haltItself; + reg execute_arbitration_haltByOther; + reg execute_arbitration_removeIt; + reg execute_arbitration_flushIt; + reg execute_arbitration_flushNext; + reg execute_arbitration_isValid; + wire execute_arbitration_isStuck; + wire execute_arbitration_isStuckByOthers; + wire execute_arbitration_isFlushed; + wire execute_arbitration_isMoving; + wire execute_arbitration_isFiring; + reg memory_arbitration_haltItself; + wire memory_arbitration_haltByOther; + reg memory_arbitration_removeIt; + wire memory_arbitration_flushIt; + wire memory_arbitration_flushNext; + reg memory_arbitration_isValid; + wire memory_arbitration_isStuck; + wire memory_arbitration_isStuckByOthers; + wire memory_arbitration_isFlushed; + wire memory_arbitration_isMoving; + wire memory_arbitration_isFiring; + reg writeBack_arbitration_haltItself; + wire writeBack_arbitration_haltByOther; + reg writeBack_arbitration_removeIt; + reg writeBack_arbitration_flushIt; + reg writeBack_arbitration_flushNext; + reg writeBack_arbitration_isValid; + wire writeBack_arbitration_isStuck; + wire writeBack_arbitration_isStuckByOthers; + wire writeBack_arbitration_isFlushed; + wire writeBack_arbitration_isMoving; + wire writeBack_arbitration_isFiring; + wire [31:0] lastStageInstruction /* verilator public */ ; + wire [31:0] lastStagePc /* verilator public */ ; + wire lastStageIsValid /* verilator public */ ; + wire lastStageIsFiring /* verilator public */ ; + reg IBusCachedPlugin_fetcherHalt; + reg IBusCachedPlugin_incomingInstruction; + wire IBusCachedPlugin_predictionJumpInterface_valid; + (* keep , syn_keep *) wire [31:0] IBusCachedPlugin_predictionJumpInterface_payload /* synthesis syn_keep = 1 */ ; + reg IBusCachedPlugin_decodePrediction_cmd_hadBranch; + wire IBusCachedPlugin_decodePrediction_rsp_wasWrong; + wire IBusCachedPlugin_pcValids_0; + wire IBusCachedPlugin_pcValids_1; + wire IBusCachedPlugin_pcValids_2; + wire IBusCachedPlugin_pcValids_3; + reg IBusCachedPlugin_decodeExceptionPort_valid; + reg [3:0] IBusCachedPlugin_decodeExceptionPort_payload_code; + wire [31:0] IBusCachedPlugin_decodeExceptionPort_payload_badAddr; + wire IBusCachedPlugin_mmuBus_cmd_0_isValid; + wire IBusCachedPlugin_mmuBus_cmd_0_isStuck; + wire [31:0] IBusCachedPlugin_mmuBus_cmd_0_virtualAddress; + wire IBusCachedPlugin_mmuBus_cmd_0_bypassTranslation; + wire [31:0] IBusCachedPlugin_mmuBus_rsp_physicalAddress; + wire IBusCachedPlugin_mmuBus_rsp_isIoAccess; + wire IBusCachedPlugin_mmuBus_rsp_isPaging; + wire IBusCachedPlugin_mmuBus_rsp_allowRead; + wire IBusCachedPlugin_mmuBus_rsp_allowWrite; + wire IBusCachedPlugin_mmuBus_rsp_allowExecute; + wire IBusCachedPlugin_mmuBus_rsp_exception; + wire IBusCachedPlugin_mmuBus_rsp_refilling; + wire IBusCachedPlugin_mmuBus_rsp_bypassTranslation; + wire IBusCachedPlugin_mmuBus_end; + wire IBusCachedPlugin_mmuBus_busy; + wire dBus_cmd_valid; + wire dBus_cmd_ready; + wire dBus_cmd_payload_wr; + wire dBus_cmd_payload_uncached; + wire [31:0] dBus_cmd_payload_address; + wire [31:0] dBus_cmd_payload_data; + wire [3:0] dBus_cmd_payload_mask; + wire [2:0] dBus_cmd_payload_size; + wire dBus_cmd_payload_last; + wire dBus_rsp_valid; + wire dBus_rsp_payload_last; + wire [31:0] dBus_rsp_payload_data; + wire dBus_rsp_payload_error; + wire DBusCachedPlugin_mmuBus_cmd_0_isValid; + wire DBusCachedPlugin_mmuBus_cmd_0_isStuck; + wire [31:0] DBusCachedPlugin_mmuBus_cmd_0_virtualAddress; + wire DBusCachedPlugin_mmuBus_cmd_0_bypassTranslation; + wire [31:0] DBusCachedPlugin_mmuBus_rsp_physicalAddress; + wire DBusCachedPlugin_mmuBus_rsp_isIoAccess; + wire DBusCachedPlugin_mmuBus_rsp_isPaging; + wire DBusCachedPlugin_mmuBus_rsp_allowRead; + wire DBusCachedPlugin_mmuBus_rsp_allowWrite; + wire DBusCachedPlugin_mmuBus_rsp_allowExecute; + wire DBusCachedPlugin_mmuBus_rsp_exception; + wire DBusCachedPlugin_mmuBus_rsp_refilling; + wire DBusCachedPlugin_mmuBus_rsp_bypassTranslation; + wire DBusCachedPlugin_mmuBus_end; + wire DBusCachedPlugin_mmuBus_busy; + reg DBusCachedPlugin_redoBranch_valid; + wire [31:0] DBusCachedPlugin_redoBranch_payload; + reg DBusCachedPlugin_exceptionBus_valid; + reg [3:0] DBusCachedPlugin_exceptionBus_payload_code; + wire [31:0] DBusCachedPlugin_exceptionBus_payload_badAddr; + reg _zz_when_DBusCachedPlugin_l386; + wire decodeExceptionPort_valid; + wire [3:0] decodeExceptionPort_payload_code; + wire [31:0] decodeExceptionPort_payload_badAddr; + wire BranchPlugin_jumpInterface_valid; + wire [31:0] BranchPlugin_jumpInterface_payload; + reg BranchPlugin_branchExceptionPort_valid; + wire [3:0] BranchPlugin_branchExceptionPort_payload_code; + wire [31:0] BranchPlugin_branchExceptionPort_payload_badAddr; + wire [31:0] CsrPlugin_csrMapping_readDataSignal; + wire [31:0] CsrPlugin_csrMapping_readDataInit; + wire [31:0] CsrPlugin_csrMapping_writeDataSignal; + wire CsrPlugin_csrMapping_allowCsrSignal; + wire CsrPlugin_csrMapping_hazardFree; + reg CsrPlugin_inWfi /* verilator public */ ; + reg CsrPlugin_thirdPartyWake; + reg CsrPlugin_jumpInterface_valid; + reg [31:0] CsrPlugin_jumpInterface_payload; + wire CsrPlugin_exceptionPendings_0; + wire CsrPlugin_exceptionPendings_1; + wire CsrPlugin_exceptionPendings_2; + wire CsrPlugin_exceptionPendings_3; + wire externalInterrupt; + wire contextSwitching; + reg [1:0] CsrPlugin_privilege; + reg CsrPlugin_forceMachineWire; + reg CsrPlugin_selfException_valid; + reg [3:0] CsrPlugin_selfException_payload_code; + wire [31:0] CsrPlugin_selfException_payload_badAddr; + reg CsrPlugin_allowInterrupts; + reg CsrPlugin_allowException; + reg CsrPlugin_allowEbreakException; + reg IBusCachedPlugin_injectionPort_valid; + reg IBusCachedPlugin_injectionPort_ready; + wire [31:0] IBusCachedPlugin_injectionPort_payload; + wire IBusCachedPlugin_externalFlush; + wire IBusCachedPlugin_jump_pcLoad_valid; + wire [31:0] IBusCachedPlugin_jump_pcLoad_payload; + wire [3:0] _zz_IBusCachedPlugin_jump_pcLoad_payload; + wire [3:0] _zz_IBusCachedPlugin_jump_pcLoad_payload_1; + wire _zz_IBusCachedPlugin_jump_pcLoad_payload_2; + wire _zz_IBusCachedPlugin_jump_pcLoad_payload_3; + wire _zz_IBusCachedPlugin_jump_pcLoad_payload_4; + wire IBusCachedPlugin_fetchPc_output_valid; + wire IBusCachedPlugin_fetchPc_output_ready; + wire [31:0] IBusCachedPlugin_fetchPc_output_payload; + reg [31:0] IBusCachedPlugin_fetchPc_pcReg /* verilator public */ ; + reg IBusCachedPlugin_fetchPc_correction; + reg IBusCachedPlugin_fetchPc_correctionReg; + wire IBusCachedPlugin_fetchPc_output_fire; + wire IBusCachedPlugin_fetchPc_corrected; + reg IBusCachedPlugin_fetchPc_pcRegPropagate; + reg IBusCachedPlugin_fetchPc_booted; + reg IBusCachedPlugin_fetchPc_inc; + wire when_Fetcher_l131; + wire IBusCachedPlugin_fetchPc_output_fire_1; + wire when_Fetcher_l131_1; + reg [31:0] IBusCachedPlugin_fetchPc_pc; + wire IBusCachedPlugin_fetchPc_redo_valid; + wire [31:0] IBusCachedPlugin_fetchPc_redo_payload; + reg IBusCachedPlugin_fetchPc_flushed; + wire when_Fetcher_l158; + reg IBusCachedPlugin_iBusRsp_redoFetch; + wire IBusCachedPlugin_iBusRsp_stages_0_input_valid; + wire IBusCachedPlugin_iBusRsp_stages_0_input_ready; + wire [31:0] IBusCachedPlugin_iBusRsp_stages_0_input_payload; + wire IBusCachedPlugin_iBusRsp_stages_0_output_valid; + wire IBusCachedPlugin_iBusRsp_stages_0_output_ready; + wire [31:0] IBusCachedPlugin_iBusRsp_stages_0_output_payload; + reg IBusCachedPlugin_iBusRsp_stages_0_halt; + wire IBusCachedPlugin_iBusRsp_stages_1_input_valid; + wire IBusCachedPlugin_iBusRsp_stages_1_input_ready; + wire [31:0] IBusCachedPlugin_iBusRsp_stages_1_input_payload; + wire IBusCachedPlugin_iBusRsp_stages_1_output_valid; + wire IBusCachedPlugin_iBusRsp_stages_1_output_ready; + wire [31:0] IBusCachedPlugin_iBusRsp_stages_1_output_payload; + reg IBusCachedPlugin_iBusRsp_stages_1_halt; + wire IBusCachedPlugin_iBusRsp_stages_2_input_valid; + wire IBusCachedPlugin_iBusRsp_stages_2_input_ready; + wire [31:0] IBusCachedPlugin_iBusRsp_stages_2_input_payload; + wire IBusCachedPlugin_iBusRsp_stages_2_output_valid; + wire IBusCachedPlugin_iBusRsp_stages_2_output_ready; + wire [31:0] IBusCachedPlugin_iBusRsp_stages_2_output_payload; + reg IBusCachedPlugin_iBusRsp_stages_2_halt; + wire _zz_IBusCachedPlugin_iBusRsp_stages_0_input_ready; + wire _zz_IBusCachedPlugin_iBusRsp_stages_1_input_ready; + wire _zz_IBusCachedPlugin_iBusRsp_stages_2_input_ready; + wire IBusCachedPlugin_iBusRsp_flush; + wire _zz_IBusCachedPlugin_iBusRsp_stages_0_output_ready; + wire _zz_IBusCachedPlugin_iBusRsp_stages_0_output_ready_1; + reg _zz_IBusCachedPlugin_iBusRsp_stages_0_output_ready_2; + wire IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_valid; + wire IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_ready; + wire [31:0] IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_payload; + reg _zz_IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_valid; + reg [31:0] _zz_IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_payload; + reg IBusCachedPlugin_iBusRsp_readyForError; + wire IBusCachedPlugin_iBusRsp_output_valid; + wire IBusCachedPlugin_iBusRsp_output_ready; + wire [31:0] IBusCachedPlugin_iBusRsp_output_payload_pc; + wire IBusCachedPlugin_iBusRsp_output_payload_rsp_error; + wire [31:0] IBusCachedPlugin_iBusRsp_output_payload_rsp_inst; + wire IBusCachedPlugin_iBusRsp_output_payload_isRvc; + wire when_Fetcher_l240; + wire when_Fetcher_l320; + reg IBusCachedPlugin_injector_nextPcCalc_valids_0; + wire when_Fetcher_l329; + reg IBusCachedPlugin_injector_nextPcCalc_valids_1; + wire when_Fetcher_l329_1; + reg IBusCachedPlugin_injector_nextPcCalc_valids_2; + wire when_Fetcher_l329_2; + reg IBusCachedPlugin_injector_nextPcCalc_valids_3; + wire when_Fetcher_l329_3; + reg IBusCachedPlugin_injector_nextPcCalc_valids_4; + wire when_Fetcher_l329_4; + wire _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch; + reg [18:0] _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_1; + wire _zz_2; + reg [10:0] _zz_3; + wire _zz_4; + reg [18:0] _zz_5; + reg _zz_6; + wire _zz_IBusCachedPlugin_predictionJumpInterface_payload; + reg [10:0] _zz_IBusCachedPlugin_predictionJumpInterface_payload_1; + wire _zz_IBusCachedPlugin_predictionJumpInterface_payload_2; + reg [18:0] _zz_IBusCachedPlugin_predictionJumpInterface_payload_3; + wire iBus_cmd_valid; + wire iBus_cmd_ready; + reg [31:0] iBus_cmd_payload_address; + wire [2:0] iBus_cmd_payload_size; + wire iBus_rsp_valid; + wire [31:0] iBus_rsp_payload_data; + wire iBus_rsp_payload_error; + wire [31:0] _zz_IBusCachedPlugin_rspCounter; + reg [31:0] IBusCachedPlugin_rspCounter; + wire IBusCachedPlugin_s0_tightlyCoupledHit; + reg IBusCachedPlugin_s1_tightlyCoupledHit; + reg IBusCachedPlugin_s2_tightlyCoupledHit; + wire IBusCachedPlugin_rsp_iBusRspOutputHalt; + wire IBusCachedPlugin_rsp_issueDetected; + reg IBusCachedPlugin_rsp_redoFetch; + wire when_IBusCachedPlugin_l239; + wire when_IBusCachedPlugin_l244; + wire when_IBusCachedPlugin_l250; + wire when_IBusCachedPlugin_l256; + wire when_IBusCachedPlugin_l267; + wire dataCache_1_io_mem_cmd_s2mPipe_valid; + reg dataCache_1_io_mem_cmd_s2mPipe_ready; + wire dataCache_1_io_mem_cmd_s2mPipe_payload_wr; + wire dataCache_1_io_mem_cmd_s2mPipe_payload_uncached; + wire [31:0] dataCache_1_io_mem_cmd_s2mPipe_payload_address; + wire [31:0] dataCache_1_io_mem_cmd_s2mPipe_payload_data; + wire [3:0] dataCache_1_io_mem_cmd_s2mPipe_payload_mask; + wire [2:0] dataCache_1_io_mem_cmd_s2mPipe_payload_size; + wire dataCache_1_io_mem_cmd_s2mPipe_payload_last; + reg dataCache_1_io_mem_cmd_rValid; + reg dataCache_1_io_mem_cmd_rData_wr; + reg dataCache_1_io_mem_cmd_rData_uncached; + reg [31:0] dataCache_1_io_mem_cmd_rData_address; + reg [31:0] dataCache_1_io_mem_cmd_rData_data; + reg [3:0] dataCache_1_io_mem_cmd_rData_mask; + reg [2:0] dataCache_1_io_mem_cmd_rData_size; + reg dataCache_1_io_mem_cmd_rData_last; + wire dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_valid; + wire dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_ready; + wire dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_payload_wr; + wire dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_payload_uncached; + wire [31:0] dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_payload_address; + wire [31:0] dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_payload_data; + wire [3:0] dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_payload_mask; + wire [2:0] dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_payload_size; + wire dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_payload_last; + reg dataCache_1_io_mem_cmd_s2mPipe_rValid; + reg dataCache_1_io_mem_cmd_s2mPipe_rData_wr; + reg dataCache_1_io_mem_cmd_s2mPipe_rData_uncached; + reg [31:0] dataCache_1_io_mem_cmd_s2mPipe_rData_address; + reg [31:0] dataCache_1_io_mem_cmd_s2mPipe_rData_data; + reg [3:0] dataCache_1_io_mem_cmd_s2mPipe_rData_mask; + reg [2:0] dataCache_1_io_mem_cmd_s2mPipe_rData_size; + reg dataCache_1_io_mem_cmd_s2mPipe_rData_last; + wire when_Stream_l342; + wire [31:0] _zz_DBusCachedPlugin_rspCounter; + reg [31:0] DBusCachedPlugin_rspCounter; + wire when_DBusCachedPlugin_l303; + wire [1:0] execute_DBusCachedPlugin_size; + reg [31:0] _zz_execute_MEMORY_STORE_DATA_RF; + wire dataCache_1_io_cpu_flush_isStall; + wire when_DBusCachedPlugin_l343; + wire when_DBusCachedPlugin_l359; + wire when_DBusCachedPlugin_l386; + wire when_DBusCachedPlugin_l438; + wire when_DBusCachedPlugin_l458; + wire [7:0] writeBack_DBusCachedPlugin_rspSplits_0; + wire [7:0] writeBack_DBusCachedPlugin_rspSplits_1; + wire [7:0] writeBack_DBusCachedPlugin_rspSplits_2; + wire [7:0] writeBack_DBusCachedPlugin_rspSplits_3; + reg [31:0] writeBack_DBusCachedPlugin_rspShifted; + wire [31:0] writeBack_DBusCachedPlugin_rspRf; + wire [1:0] switch_Misc_l200; + wire _zz_writeBack_DBusCachedPlugin_rspFormated; + reg [31:0] _zz_writeBack_DBusCachedPlugin_rspFormated_1; + wire _zz_writeBack_DBusCachedPlugin_rspFormated_2; + reg [31:0] _zz_writeBack_DBusCachedPlugin_rspFormated_3; + reg [31:0] writeBack_DBusCachedPlugin_rspFormated; + wire when_DBusCachedPlugin_l484; + wire [34:0] _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2; + wire _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_3; + wire _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_4; + wire _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_5; + wire _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_6; + wire _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_7; + wire `Src1CtrlEnum_binary_sequential_type _zz_decode_SRC1_CTRL_2; + wire `AluCtrlEnum_binary_sequential_type _zz_decode_ALU_CTRL_2; + wire `Src2CtrlEnum_binary_sequential_type _zz_decode_SRC2_CTRL_2; + wire `AluBitwiseCtrlEnum_binary_sequential_type _zz_decode_ALU_BITWISE_CTRL_2; + wire `ShiftCtrlEnum_binary_sequential_type _zz_decode_SHIFT_CTRL_2; + wire `BranchCtrlEnum_binary_sequential_type _zz_decode_BRANCH_CTRL_2; + wire `EnvCtrlEnum_binary_sequential_type _zz_decode_ENV_CTRL_2; + wire `Input2Kind_binary_sequential_type _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_8; + wire when_RegFilePlugin_l63; + wire [4:0] decode_RegFilePlugin_regFileReadAddress1; + wire [4:0] decode_RegFilePlugin_regFileReadAddress2; + wire [31:0] decode_RegFilePlugin_rs1Data; + wire [31:0] decode_RegFilePlugin_rs2Data; + reg lastStageRegFileWrite_valid /* verilator public */ ; + reg [4:0] lastStageRegFileWrite_payload_address /* verilator public */ ; + reg [31:0] lastStageRegFileWrite_payload_data /* verilator public */ ; + reg _zz_7; + reg [31:0] execute_IntAluPlugin_bitwise; + reg [31:0] _zz_execute_REGFILE_WRITE_DATA; + reg [31:0] _zz_execute_SRC1; + wire _zz_execute_SRC2_1; + reg [19:0] _zz_execute_SRC2_2; + wire _zz_execute_SRC2_3; + reg [19:0] _zz_execute_SRC2_4; + reg [31:0] _zz_execute_SRC2_5; + reg [31:0] execute_SrcPlugin_addSub; + wire execute_SrcPlugin_less; + wire [4:0] execute_FullBarrelShifterPlugin_amplitude; + reg [31:0] _zz_execute_FullBarrelShifterPlugin_reversed; + wire [31:0] execute_FullBarrelShifterPlugin_reversed; + reg [31:0] _zz_decode_RS2_3; + reg HazardSimplePlugin_src0Hazard; + reg HazardSimplePlugin_src1Hazard; + wire HazardSimplePlugin_writeBackWrites_valid; + wire [4:0] HazardSimplePlugin_writeBackWrites_payload_address; + wire [31:0] HazardSimplePlugin_writeBackWrites_payload_data; + reg HazardSimplePlugin_writeBackBuffer_valid; + reg [4:0] HazardSimplePlugin_writeBackBuffer_payload_address; + reg [31:0] HazardSimplePlugin_writeBackBuffer_payload_data; + wire HazardSimplePlugin_addr0Match; + wire HazardSimplePlugin_addr1Match; + wire when_HazardSimplePlugin_l47; + wire when_HazardSimplePlugin_l48; + wire when_HazardSimplePlugin_l51; + wire when_HazardSimplePlugin_l45; + wire when_HazardSimplePlugin_l57; + wire when_HazardSimplePlugin_l58; + wire when_HazardSimplePlugin_l48_1; + wire when_HazardSimplePlugin_l51_1; + wire when_HazardSimplePlugin_l45_1; + wire when_HazardSimplePlugin_l57_1; + wire when_HazardSimplePlugin_l58_1; + wire when_HazardSimplePlugin_l48_2; + wire when_HazardSimplePlugin_l51_2; + wire when_HazardSimplePlugin_l45_2; + wire when_HazardSimplePlugin_l57_2; + wire when_HazardSimplePlugin_l58_2; + wire when_HazardSimplePlugin_l105; + wire when_HazardSimplePlugin_l108; + wire when_HazardSimplePlugin_l113; + wire execute_BranchPlugin_eq; + wire [2:0] switch_Misc_l200_1; + reg _zz_execute_BRANCH_COND_RESULT; + reg _zz_execute_BRANCH_COND_RESULT_1; + wire _zz_execute_BranchPlugin_missAlignedTarget; + reg [19:0] _zz_execute_BranchPlugin_missAlignedTarget_1; + wire _zz_execute_BranchPlugin_missAlignedTarget_2; + reg [10:0] _zz_execute_BranchPlugin_missAlignedTarget_3; + wire _zz_execute_BranchPlugin_missAlignedTarget_4; + reg [18:0] _zz_execute_BranchPlugin_missAlignedTarget_5; + reg _zz_execute_BranchPlugin_missAlignedTarget_6; + wire execute_BranchPlugin_missAlignedTarget; + reg [31:0] execute_BranchPlugin_branch_src1; + reg [31:0] execute_BranchPlugin_branch_src2; + wire _zz_execute_BranchPlugin_branch_src2; + reg [19:0] _zz_execute_BranchPlugin_branch_src2_1; + wire _zz_execute_BranchPlugin_branch_src2_2; + reg [10:0] _zz_execute_BranchPlugin_branch_src2_3; + wire _zz_execute_BranchPlugin_branch_src2_4; + reg [18:0] _zz_execute_BranchPlugin_branch_src2_5; + wire [31:0] execute_BranchPlugin_branchAdder; + wire when_BranchPlugin_l296; + reg [1:0] CsrPlugin_misa_base; + reg [25:0] CsrPlugin_misa_extensions; + reg [1:0] CsrPlugin_mtvec_mode; + reg [29:0] CsrPlugin_mtvec_base; + reg [31:0] CsrPlugin_mepc; + reg CsrPlugin_mstatus_MIE; + reg CsrPlugin_mstatus_MPIE; + reg [1:0] CsrPlugin_mstatus_MPP; + reg CsrPlugin_mip_MEIP; + reg CsrPlugin_mip_MTIP; + reg CsrPlugin_mip_MSIP; + reg CsrPlugin_mie_MEIE; + reg CsrPlugin_mie_MTIE; + reg CsrPlugin_mie_MSIE; + reg [31:0] CsrPlugin_mscratch; + reg CsrPlugin_mcause_interrupt; + reg [3:0] CsrPlugin_mcause_exceptionCode; + reg [31:0] CsrPlugin_mtval; + reg [63:0] CsrPlugin_mcycle = 64'b0000000000000000000000000000000000000000000000000000000000000000; + reg [63:0] CsrPlugin_minstret = 64'b0000000000000000000000000000000000000000000000000000000000000000; + wire _zz_when_CsrPlugin_l952; + wire _zz_when_CsrPlugin_l952_1; + wire _zz_when_CsrPlugin_l952_2; + reg CsrPlugin_exceptionPortCtrl_exceptionValids_decode; + reg CsrPlugin_exceptionPortCtrl_exceptionValids_execute; + reg CsrPlugin_exceptionPortCtrl_exceptionValids_memory; + reg CsrPlugin_exceptionPortCtrl_exceptionValids_writeBack; + reg CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_decode; + reg CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_execute; + reg CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_memory; + reg CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_writeBack; + reg [3:0] CsrPlugin_exceptionPortCtrl_exceptionContext_code; + reg [31:0] CsrPlugin_exceptionPortCtrl_exceptionContext_badAddr; + wire [1:0] CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilegeUncapped; + wire [1:0] CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilege; + wire [1:0] _zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code; + wire _zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_1; + wire [1:0] _zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_2; + wire _zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_3; + wire when_CsrPlugin_l909; + wire when_CsrPlugin_l909_1; + wire when_CsrPlugin_l909_2; + wire when_CsrPlugin_l909_3; + wire when_CsrPlugin_l922; + reg CsrPlugin_interrupt_valid; + reg [3:0] CsrPlugin_interrupt_code /* verilator public */ ; + reg [1:0] CsrPlugin_interrupt_targetPrivilege; + wire when_CsrPlugin_l946; + wire when_CsrPlugin_l952; + wire when_CsrPlugin_l952_1; + wire when_CsrPlugin_l952_2; + wire CsrPlugin_exception; + reg CsrPlugin_lastStageWasWfi; + reg CsrPlugin_pipelineLiberator_pcValids_0; + reg CsrPlugin_pipelineLiberator_pcValids_1; + reg CsrPlugin_pipelineLiberator_pcValids_2; + wire CsrPlugin_pipelineLiberator_active; + wire when_CsrPlugin_l980; + wire when_CsrPlugin_l980_1; + wire when_CsrPlugin_l980_2; + wire when_CsrPlugin_l985; + reg CsrPlugin_pipelineLiberator_done; + wire when_CsrPlugin_l991; + wire CsrPlugin_interruptJump /* verilator public */ ; + reg CsrPlugin_hadException /* verilator public */ ; + reg [1:0] CsrPlugin_targetPrivilege; + reg [3:0] CsrPlugin_trapCause; + reg [1:0] CsrPlugin_xtvec_mode; + reg [29:0] CsrPlugin_xtvec_base; + wire when_CsrPlugin_l1019; + wire when_CsrPlugin_l1064; + wire [1:0] switch_CsrPlugin_l1068; + reg execute_CsrPlugin_wfiWake; + wire when_CsrPlugin_l1108; + wire when_CsrPlugin_l1110; + wire when_CsrPlugin_l1116; + wire execute_CsrPlugin_blockedBySideEffects; + reg execute_CsrPlugin_illegalAccess; + reg execute_CsrPlugin_illegalInstruction; + wire when_CsrPlugin_l1129; + wire when_CsrPlugin_l1136; + wire when_CsrPlugin_l1137; + wire when_CsrPlugin_l1144; + reg execute_CsrPlugin_writeInstruction; + reg execute_CsrPlugin_readInstruction; + wire execute_CsrPlugin_writeEnable; + wire execute_CsrPlugin_readEnable; + wire [31:0] execute_CsrPlugin_readToWriteData; + wire switch_Misc_l200_2; + reg [31:0] _zz_CsrPlugin_csrMapping_writeDataSignal; + wire when_CsrPlugin_l1176; + wire when_CsrPlugin_l1180; + wire [11:0] execute_CsrPlugin_csrAddress; + reg execute_MulPlugin_aSigned; + reg execute_MulPlugin_bSigned; + wire [31:0] execute_MulPlugin_a; + wire [31:0] execute_MulPlugin_b; + wire [1:0] switch_MulPlugin_l87; + wire [15:0] execute_MulPlugin_aULow; + wire [15:0] execute_MulPlugin_bULow; + wire [16:0] execute_MulPlugin_aSLow; + wire [16:0] execute_MulPlugin_bSLow; + wire [16:0] execute_MulPlugin_aHigh; + wire [16:0] execute_MulPlugin_bHigh; + wire [65:0] writeBack_MulPlugin_result; + wire when_MulPlugin_l147; + wire [1:0] switch_MulPlugin_l148; + reg [32:0] memory_DivPlugin_rs1; + reg [31:0] memory_DivPlugin_rs2; + reg [64:0] memory_DivPlugin_accumulator; + wire memory_DivPlugin_frontendOk; + reg memory_DivPlugin_div_needRevert; + reg memory_DivPlugin_div_counter_willIncrement; + reg memory_DivPlugin_div_counter_willClear; + reg [5:0] memory_DivPlugin_div_counter_valueNext; + reg [5:0] memory_DivPlugin_div_counter_value; + wire memory_DivPlugin_div_counter_willOverflowIfInc; + wire memory_DivPlugin_div_counter_willOverflow; + reg memory_DivPlugin_div_done; + wire when_MulDivIterativePlugin_l126; + wire when_MulDivIterativePlugin_l126_1; + reg [31:0] memory_DivPlugin_div_result; + wire when_MulDivIterativePlugin_l128; + wire when_MulDivIterativePlugin_l129; + wire when_MulDivIterativePlugin_l132; + wire [31:0] _zz_memory_DivPlugin_div_stage_0_remainderShifted; + wire [32:0] memory_DivPlugin_div_stage_0_remainderShifted; + wire [32:0] memory_DivPlugin_div_stage_0_remainderMinusDenominator; + wire [31:0] memory_DivPlugin_div_stage_0_outRemainder; + wire [31:0] memory_DivPlugin_div_stage_0_outNumerator; + wire when_MulDivIterativePlugin_l151; + wire [31:0] _zz_memory_DivPlugin_div_result; + wire when_MulDivIterativePlugin_l162; + wire _zz_memory_DivPlugin_rs2; + wire _zz_memory_DivPlugin_rs1; + reg [32:0] _zz_memory_DivPlugin_rs1_1; + reg [31:0] externalInterruptArray_regNext; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit; + wire [31:0] _zz_CsrPlugin_csrMapping_readDataInit_1; + reg DebugPlugin_firstCycle; + reg DebugPlugin_secondCycle; + reg DebugPlugin_resetIt; + reg DebugPlugin_haltIt; + reg DebugPlugin_stepIt; + reg DebugPlugin_isPipBusy; + reg DebugPlugin_godmode; + wire when_DebugPlugin_l225; + reg DebugPlugin_haltedByBreak; + reg DebugPlugin_debugUsed /* verilator public */ ; + reg DebugPlugin_disableEbreak; + wire DebugPlugin_allowEBreak; + reg [31:0] DebugPlugin_busReadDataReg; + reg _zz_when_DebugPlugin_l244; + wire when_DebugPlugin_l244; + wire [5:0] switch_DebugPlugin_l256; + wire when_DebugPlugin_l260; + wire when_DebugPlugin_l260_1; + wire when_DebugPlugin_l261; + wire when_DebugPlugin_l261_1; + wire when_DebugPlugin_l262; + wire when_DebugPlugin_l263; + wire when_DebugPlugin_l264; + wire when_DebugPlugin_l264_1; + wire when_DebugPlugin_l284; + wire when_DebugPlugin_l287; + wire when_DebugPlugin_l300; + reg DebugPlugin_resetIt_regNext; + wire when_DebugPlugin_l316; + wire execute_CfuPlugin_schedule; + reg execute_CfuPlugin_hold; + reg execute_CfuPlugin_fired; + wire CfuPlugin_bus_cmd_fire; + wire when_CfuPlugin_l171; + wire when_CfuPlugin_l175; + wire [9:0] execute_CfuPlugin_functionsIds_0; + wire _zz_CfuPlugin_bus_cmd_payload_inputs_1; + reg [23:0] _zz_CfuPlugin_bus_cmd_payload_inputs_1_1; + reg [31:0] _zz_CfuPlugin_bus_cmd_payload_inputs_1_2; + wire CfuPlugin_bus_rsp_rsp_valid; + reg CfuPlugin_bus_rsp_rsp_ready; + wire [31:0] CfuPlugin_bus_rsp_rsp_payload_outputs_0; + reg CfuPlugin_bus_rsp_rValid; + reg [31:0] CfuPlugin_bus_rsp_rData_outputs_0; + wire when_CfuPlugin_l208; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_2; + reg [31:0] _zz_when_GenCoreDefault_l367; + wire when_GenCoreDefault_l367; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_3; + reg [31:0] _zz_when_GenCoreDefault_l367_1; + wire when_GenCoreDefault_l367_1; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_4; + reg [31:0] _zz_when_GenCoreDefault_l367_2; + wire when_GenCoreDefault_l367_2; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_5; + reg [31:0] _zz_when_GenCoreDefault_l367_3; + wire when_GenCoreDefault_l367_3; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_6; + reg [31:0] _zz_when_GenCoreDefault_l367_4; + wire when_GenCoreDefault_l367_4; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_7; + reg [31:0] _zz_when_GenCoreDefault_l367_5; + wire when_GenCoreDefault_l367_5; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_8; + reg [31:0] _zz_when_GenCoreDefault_l367_6; + wire when_GenCoreDefault_l367_6; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_9; + reg [31:0] _zz_when_GenCoreDefault_l367_7; + wire when_GenCoreDefault_l367_7; + wire when_Pipeline_l124; + reg [31:0] decode_to_execute_PC; + wire when_Pipeline_l124_1; + reg [31:0] execute_to_memory_PC; + wire when_Pipeline_l124_2; + reg [31:0] memory_to_writeBack_PC; + wire when_Pipeline_l124_3; + reg [31:0] decode_to_execute_INSTRUCTION; + wire when_Pipeline_l124_4; + reg [31:0] execute_to_memory_INSTRUCTION; + wire when_Pipeline_l124_5; + reg [31:0] memory_to_writeBack_INSTRUCTION; + wire when_Pipeline_l124_6; + reg [31:0] decode_to_execute_FORMAL_PC_NEXT; + wire when_Pipeline_l124_7; + reg [31:0] execute_to_memory_FORMAL_PC_NEXT; + wire when_Pipeline_l124_8; + reg [31:0] memory_to_writeBack_FORMAL_PC_NEXT; + wire when_Pipeline_l124_9; + reg decode_to_execute_MEMORY_FORCE_CONSTISTENCY; + wire when_Pipeline_l124_10; + reg `Src1CtrlEnum_binary_sequential_type decode_to_execute_SRC1_CTRL; + wire when_Pipeline_l124_11; + reg decode_to_execute_SRC_USE_SUB_LESS; + wire when_Pipeline_l124_12; + reg decode_to_execute_MEMORY_ENABLE; + wire when_Pipeline_l124_13; + reg execute_to_memory_MEMORY_ENABLE; + wire when_Pipeline_l124_14; + reg memory_to_writeBack_MEMORY_ENABLE; + wire when_Pipeline_l124_15; + reg `AluCtrlEnum_binary_sequential_type decode_to_execute_ALU_CTRL; + wire when_Pipeline_l124_16; + reg `Src2CtrlEnum_binary_sequential_type decode_to_execute_SRC2_CTRL; + wire when_Pipeline_l124_17; + reg decode_to_execute_REGFILE_WRITE_VALID; + wire when_Pipeline_l124_18; + reg execute_to_memory_REGFILE_WRITE_VALID; + wire when_Pipeline_l124_19; + reg memory_to_writeBack_REGFILE_WRITE_VALID; + wire when_Pipeline_l124_20; + reg decode_to_execute_BYPASSABLE_EXECUTE_STAGE; + wire when_Pipeline_l124_21; + reg decode_to_execute_BYPASSABLE_MEMORY_STAGE; + wire when_Pipeline_l124_22; + reg execute_to_memory_BYPASSABLE_MEMORY_STAGE; + wire when_Pipeline_l124_23; + reg decode_to_execute_MEMORY_WR; + wire when_Pipeline_l124_24; + reg execute_to_memory_MEMORY_WR; + wire when_Pipeline_l124_25; + reg memory_to_writeBack_MEMORY_WR; + wire when_Pipeline_l124_26; + reg decode_to_execute_MEMORY_MANAGMENT; + wire when_Pipeline_l124_27; + reg decode_to_execute_SRC_LESS_UNSIGNED; + wire when_Pipeline_l124_28; + reg `AluBitwiseCtrlEnum_binary_sequential_type decode_to_execute_ALU_BITWISE_CTRL; + wire when_Pipeline_l124_29; + reg `ShiftCtrlEnum_binary_sequential_type decode_to_execute_SHIFT_CTRL; + wire when_Pipeline_l124_30; + reg `ShiftCtrlEnum_binary_sequential_type execute_to_memory_SHIFT_CTRL; + wire when_Pipeline_l124_31; + reg `BranchCtrlEnum_binary_sequential_type decode_to_execute_BRANCH_CTRL; + wire when_Pipeline_l124_32; + reg decode_to_execute_IS_CSR; + wire when_Pipeline_l124_33; + reg `EnvCtrlEnum_binary_sequential_type decode_to_execute_ENV_CTRL; + wire when_Pipeline_l124_34; + reg `EnvCtrlEnum_binary_sequential_type execute_to_memory_ENV_CTRL; + wire when_Pipeline_l124_35; + reg `EnvCtrlEnum_binary_sequential_type memory_to_writeBack_ENV_CTRL; + wire when_Pipeline_l124_36; + reg decode_to_execute_IS_MUL; + wire when_Pipeline_l124_37; + reg execute_to_memory_IS_MUL; + wire when_Pipeline_l124_38; + reg memory_to_writeBack_IS_MUL; + wire when_Pipeline_l124_39; + reg decode_to_execute_IS_DIV; + wire when_Pipeline_l124_40; + reg execute_to_memory_IS_DIV; + wire when_Pipeline_l124_41; + reg decode_to_execute_IS_RS1_SIGNED; + wire when_Pipeline_l124_42; + reg decode_to_execute_IS_RS2_SIGNED; + wire when_Pipeline_l124_43; + reg decode_to_execute_CfuPlugin_CFU_ENABLE; + wire when_Pipeline_l124_44; + reg `Input2Kind_binary_sequential_type decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND; + wire when_Pipeline_l124_45; + reg [31:0] decode_to_execute_RS1; + wire when_Pipeline_l124_46; + reg [31:0] decode_to_execute_RS2; + wire when_Pipeline_l124_47; + reg decode_to_execute_SRC2_FORCE_ZERO; + wire when_Pipeline_l124_48; + reg decode_to_execute_PREDICTION_HAD_BRANCHED2; + wire when_Pipeline_l124_49; + reg decode_to_execute_CSR_WRITE_OPCODE; + wire when_Pipeline_l124_50; + reg decode_to_execute_CSR_READ_OPCODE; + wire when_Pipeline_l124_51; + reg decode_to_execute_DO_EBREAK; + wire when_Pipeline_l124_52; + reg [31:0] execute_to_memory_MEMORY_STORE_DATA_RF; + wire when_Pipeline_l124_53; + reg [31:0] memory_to_writeBack_MEMORY_STORE_DATA_RF; + wire when_Pipeline_l124_54; + reg [31:0] execute_to_memory_REGFILE_WRITE_DATA; + wire when_Pipeline_l124_55; + reg [31:0] memory_to_writeBack_REGFILE_WRITE_DATA; + wire when_Pipeline_l124_56; + reg [31:0] execute_to_memory_SHIFT_RIGHT; + wire when_Pipeline_l124_57; + reg [31:0] execute_to_memory_MUL_LL; + wire when_Pipeline_l124_58; + reg [33:0] execute_to_memory_MUL_LH; + wire when_Pipeline_l124_59; + reg [33:0] execute_to_memory_MUL_HL; + wire when_Pipeline_l124_60; + reg [33:0] execute_to_memory_MUL_HH; + wire when_Pipeline_l124_61; + reg [33:0] memory_to_writeBack_MUL_HH; + wire when_Pipeline_l124_62; + reg execute_to_memory_CfuPlugin_CFU_IN_FLIGHT; + wire when_Pipeline_l124_63; + reg memory_to_writeBack_CfuPlugin_CFU_IN_FLIGHT; + wire when_Pipeline_l124_64; + reg [51:0] memory_to_writeBack_MUL_LOW; + wire when_Pipeline_l151; + wire when_Pipeline_l154; + wire when_Pipeline_l151_1; + wire when_Pipeline_l154_1; + wire when_Pipeline_l151_2; + wire when_Pipeline_l154_2; + reg [2:0] switch_Fetcher_l362; + wire when_Fetcher_l378; + wire when_CsrPlugin_l1264; + reg execute_CsrPlugin_csr_3264; + wire when_CsrPlugin_l1264_1; + reg execute_CsrPlugin_csr_3857; + wire when_CsrPlugin_l1264_2; + reg execute_CsrPlugin_csr_3858; + wire when_CsrPlugin_l1264_3; + reg execute_CsrPlugin_csr_3859; + wire when_CsrPlugin_l1264_4; + reg execute_CsrPlugin_csr_3860; + wire when_CsrPlugin_l1264_5; + reg execute_CsrPlugin_csr_769; + wire when_CsrPlugin_l1264_6; + reg execute_CsrPlugin_csr_768; + wire when_CsrPlugin_l1264_7; + reg execute_CsrPlugin_csr_836; + wire when_CsrPlugin_l1264_8; + reg execute_CsrPlugin_csr_772; + wire when_CsrPlugin_l1264_9; + reg execute_CsrPlugin_csr_773; + wire when_CsrPlugin_l1264_10; + reg execute_CsrPlugin_csr_833; + wire when_CsrPlugin_l1264_11; + reg execute_CsrPlugin_csr_832; + wire when_CsrPlugin_l1264_12; + reg execute_CsrPlugin_csr_834; + wire when_CsrPlugin_l1264_13; + reg execute_CsrPlugin_csr_835; + wire when_CsrPlugin_l1264_14; + reg execute_CsrPlugin_csr_2816; + wire when_CsrPlugin_l1264_15; + reg execute_CsrPlugin_csr_2944; + wire when_CsrPlugin_l1264_16; + reg execute_CsrPlugin_csr_2818; + wire when_CsrPlugin_l1264_17; + reg execute_CsrPlugin_csr_2946; + wire when_CsrPlugin_l1264_18; + reg execute_CsrPlugin_csr_3072; + wire when_CsrPlugin_l1264_19; + reg execute_CsrPlugin_csr_3200; + wire when_CsrPlugin_l1264_20; + reg execute_CsrPlugin_csr_3074; + wire when_CsrPlugin_l1264_21; + reg execute_CsrPlugin_csr_3202; + wire when_CsrPlugin_l1264_22; + reg execute_CsrPlugin_csr_3008; + wire when_CsrPlugin_l1264_23; + reg execute_CsrPlugin_csr_4032; + wire when_CsrPlugin_l1264_24; + reg execute_CsrPlugin_csr_2820; + wire when_CsrPlugin_l1264_25; + reg execute_CsrPlugin_csr_2821; + wire when_CsrPlugin_l1264_26; + reg execute_CsrPlugin_csr_2822; + wire when_CsrPlugin_l1264_27; + reg execute_CsrPlugin_csr_2823; + wire when_CsrPlugin_l1264_28; + reg execute_CsrPlugin_csr_2824; + wire when_CsrPlugin_l1264_29; + reg execute_CsrPlugin_csr_2825; + wire when_CsrPlugin_l1264_30; + reg execute_CsrPlugin_csr_2826; + wire when_CsrPlugin_l1264_31; + reg execute_CsrPlugin_csr_2827; + wire when_CsrPlugin_l1264_32; + reg execute_CsrPlugin_csr_2828; + wire when_CsrPlugin_l1264_33; + reg execute_CsrPlugin_csr_2829; + wire when_CsrPlugin_l1264_34; + reg execute_CsrPlugin_csr_2830; + wire when_CsrPlugin_l1264_35; + reg execute_CsrPlugin_csr_2831; + wire when_CsrPlugin_l1264_36; + reg execute_CsrPlugin_csr_2832; + wire when_CsrPlugin_l1264_37; + reg execute_CsrPlugin_csr_2833; + wire when_CsrPlugin_l1264_38; + reg execute_CsrPlugin_csr_2834; + wire when_CsrPlugin_l1264_39; + reg execute_CsrPlugin_csr_2835; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_10; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_11; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_12; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_13; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_14; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_15; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_16; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_17; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_18; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_19; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_20; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_21; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_22; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_23; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_24; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_25; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_26; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_27; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_28; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_29; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_30; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_31; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_32; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_33; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_34; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_35; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_36; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_37; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_38; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_39; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_40; + wire when_CsrPlugin_l1297; + wire when_CsrPlugin_l1302; + reg [2:0] _zz_iBusWishbone_ADR; + wire when_InstructionCache_l239; + reg _zz_iBus_rsp_valid; + reg [31:0] iBusWishbone_DAT_MISO_regNext; + reg [2:0] _zz_dBus_cmd_ready; + wire _zz_dBus_cmd_ready_1; + wire _zz_dBus_cmd_ready_2; + wire _zz_dBus_cmd_ready_3; + wire _zz_dBus_cmd_ready_4; + wire _zz_dBus_cmd_ready_5; + reg _zz_dBus_rsp_valid; + reg [31:0] dBusWishbone_DAT_MISO_regNext; + `ifndef SYNTHESIS + reg [39:0] decode_CfuPlugin_CFU_INPUT_2_KIND_string; + reg [39:0] _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_string; + reg [39:0] _zz_decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND_string; + reg [39:0] _zz_decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND_1_string; + reg [39:0] _zz_memory_to_writeBack_ENV_CTRL_string; + reg [39:0] _zz_memory_to_writeBack_ENV_CTRL_1_string; + reg [39:0] _zz_execute_to_memory_ENV_CTRL_string; + reg [39:0] _zz_execute_to_memory_ENV_CTRL_1_string; + reg [39:0] decode_ENV_CTRL_string; + reg [39:0] _zz_decode_ENV_CTRL_string; + reg [39:0] _zz_decode_to_execute_ENV_CTRL_string; + reg [39:0] _zz_decode_to_execute_ENV_CTRL_1_string; + reg [31:0] _zz_decode_to_execute_BRANCH_CTRL_string; + reg [31:0] _zz_decode_to_execute_BRANCH_CTRL_1_string; + reg [71:0] _zz_execute_to_memory_SHIFT_CTRL_string; + reg [71:0] _zz_execute_to_memory_SHIFT_CTRL_1_string; + reg [71:0] decode_SHIFT_CTRL_string; + reg [71:0] _zz_decode_SHIFT_CTRL_string; + reg [71:0] _zz_decode_to_execute_SHIFT_CTRL_string; + reg [71:0] _zz_decode_to_execute_SHIFT_CTRL_1_string; + reg [39:0] decode_ALU_BITWISE_CTRL_string; + reg [39:0] _zz_decode_ALU_BITWISE_CTRL_string; + reg [39:0] _zz_decode_to_execute_ALU_BITWISE_CTRL_string; + reg [39:0] _zz_decode_to_execute_ALU_BITWISE_CTRL_1_string; + reg [23:0] decode_SRC2_CTRL_string; + reg [23:0] _zz_decode_SRC2_CTRL_string; + reg [23:0] _zz_decode_to_execute_SRC2_CTRL_string; + reg [23:0] _zz_decode_to_execute_SRC2_CTRL_1_string; + reg [63:0] decode_ALU_CTRL_string; + reg [63:0] _zz_decode_ALU_CTRL_string; + reg [63:0] _zz_decode_to_execute_ALU_CTRL_string; + reg [63:0] _zz_decode_to_execute_ALU_CTRL_1_string; + reg [95:0] decode_SRC1_CTRL_string; + reg [95:0] _zz_decode_SRC1_CTRL_string; + reg [95:0] _zz_decode_to_execute_SRC1_CTRL_string; + reg [95:0] _zz_decode_to_execute_SRC1_CTRL_1_string; + reg [39:0] execute_CfuPlugin_CFU_INPUT_2_KIND_string; + reg [39:0] _zz_execute_CfuPlugin_CFU_INPUT_2_KIND_string; + reg [39:0] memory_ENV_CTRL_string; + reg [39:0] _zz_memory_ENV_CTRL_string; + reg [39:0] execute_ENV_CTRL_string; + reg [39:0] _zz_execute_ENV_CTRL_string; + reg [39:0] writeBack_ENV_CTRL_string; + reg [39:0] _zz_writeBack_ENV_CTRL_string; + reg [31:0] execute_BRANCH_CTRL_string; + reg [31:0] _zz_execute_BRANCH_CTRL_string; + reg [71:0] memory_SHIFT_CTRL_string; + reg [71:0] _zz_memory_SHIFT_CTRL_string; + reg [71:0] execute_SHIFT_CTRL_string; + reg [71:0] _zz_execute_SHIFT_CTRL_string; + reg [23:0] execute_SRC2_CTRL_string; + reg [23:0] _zz_execute_SRC2_CTRL_string; + reg [95:0] execute_SRC1_CTRL_string; + reg [95:0] _zz_execute_SRC1_CTRL_string; + reg [63:0] execute_ALU_CTRL_string; + reg [63:0] _zz_execute_ALU_CTRL_string; + reg [39:0] execute_ALU_BITWISE_CTRL_string; + reg [39:0] _zz_execute_ALU_BITWISE_CTRL_string; + reg [39:0] _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_1_string; + reg [39:0] _zz_decode_ENV_CTRL_1_string; + reg [31:0] _zz_decode_BRANCH_CTRL_string; + reg [71:0] _zz_decode_SHIFT_CTRL_1_string; + reg [39:0] _zz_decode_ALU_BITWISE_CTRL_1_string; + reg [23:0] _zz_decode_SRC2_CTRL_1_string; + reg [63:0] _zz_decode_ALU_CTRL_1_string; + reg [95:0] _zz_decode_SRC1_CTRL_1_string; + reg [31:0] decode_BRANCH_CTRL_string; + reg [31:0] _zz_decode_BRANCH_CTRL_1_string; + reg [95:0] _zz_decode_SRC1_CTRL_2_string; + reg [63:0] _zz_decode_ALU_CTRL_2_string; + reg [23:0] _zz_decode_SRC2_CTRL_2_string; + reg [39:0] _zz_decode_ALU_BITWISE_CTRL_2_string; + reg [71:0] _zz_decode_SHIFT_CTRL_2_string; + reg [31:0] _zz_decode_BRANCH_CTRL_2_string; + reg [39:0] _zz_decode_ENV_CTRL_2_string; + reg [39:0] _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_8_string; + reg [95:0] decode_to_execute_SRC1_CTRL_string; + reg [63:0] decode_to_execute_ALU_CTRL_string; + reg [23:0] decode_to_execute_SRC2_CTRL_string; + reg [39:0] decode_to_execute_ALU_BITWISE_CTRL_string; + reg [71:0] decode_to_execute_SHIFT_CTRL_string; + reg [71:0] execute_to_memory_SHIFT_CTRL_string; + reg [31:0] decode_to_execute_BRANCH_CTRL_string; + reg [39:0] decode_to_execute_ENV_CTRL_string; + reg [39:0] execute_to_memory_ENV_CTRL_string; + reg [39:0] memory_to_writeBack_ENV_CTRL_string; + reg [39:0] decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND_string; + `endif + + (* ram_style = "block" *) reg [31:0] RegFilePlugin_regFile [0:31] /* verilator public */ ; + + assign _zz_when = ({decodeExceptionPort_valid,IBusCachedPlugin_decodeExceptionPort_valid} != 2'b00); + assign _zz_when_1 = ({CsrPlugin_selfException_valid,BranchPlugin_branchExceptionPort_valid} != 2'b00); + assign _zz_memory_MUL_LOW = ($signed(_zz_memory_MUL_LOW_1) + $signed(_zz_memory_MUL_LOW_5)); + assign _zz_memory_MUL_LOW_1 = ($signed(_zz_memory_MUL_LOW_2) + $signed(_zz_memory_MUL_LOW_3)); + assign _zz_memory_MUL_LOW_2 = 52'h0; + assign _zz_memory_MUL_LOW_4 = {1'b0,memory_MUL_LL}; + assign _zz_memory_MUL_LOW_3 = {{19{_zz_memory_MUL_LOW_4[32]}}, _zz_memory_MUL_LOW_4}; + assign _zz_memory_MUL_LOW_6 = ({16'd0,memory_MUL_LH} <<< 16); + assign _zz_memory_MUL_LOW_5 = {{2{_zz_memory_MUL_LOW_6[49]}}, _zz_memory_MUL_LOW_6}; + assign _zz_memory_MUL_LOW_8 = ({16'd0,memory_MUL_HL} <<< 16); + assign _zz_memory_MUL_LOW_7 = {{2{_zz_memory_MUL_LOW_8[49]}}, _zz_memory_MUL_LOW_8}; + assign _zz_execute_SHIFT_RIGHT_1 = ($signed(_zz_execute_SHIFT_RIGHT_2) >>> execute_FullBarrelShifterPlugin_amplitude); + assign _zz_execute_SHIFT_RIGHT = _zz_execute_SHIFT_RIGHT_1[31 : 0]; + assign _zz_execute_SHIFT_RIGHT_2 = {((execute_SHIFT_CTRL == `ShiftCtrlEnum_binary_sequential_SRA_1) && execute_FullBarrelShifterPlugin_reversed[31]),execute_FullBarrelShifterPlugin_reversed}; + assign _zz__zz_IBusCachedPlugin_jump_pcLoad_payload_1 = (_zz_IBusCachedPlugin_jump_pcLoad_payload - 4'b0001); + assign _zz_IBusCachedPlugin_fetchPc_pc_1 = {IBusCachedPlugin_fetchPc_inc,2'b00}; + assign _zz_IBusCachedPlugin_fetchPc_pc = {29'd0, _zz_IBusCachedPlugin_fetchPc_pc_1}; + assign _zz__zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch = {{{decode_INSTRUCTION[31],decode_INSTRUCTION[7]},decode_INSTRUCTION[30 : 25]},decode_INSTRUCTION[11 : 8]}; + assign _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_2 = {{_zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_1,{{{decode_INSTRUCTION[31],decode_INSTRUCTION[7]},decode_INSTRUCTION[30 : 25]},decode_INSTRUCTION[11 : 8]}},1'b0}; + assign _zz__zz_2 = {{{decode_INSTRUCTION[31],decode_INSTRUCTION[19 : 12]},decode_INSTRUCTION[20]},decode_INSTRUCTION[30 : 21]}; + assign _zz__zz_4 = {{{decode_INSTRUCTION[31],decode_INSTRUCTION[7]},decode_INSTRUCTION[30 : 25]},decode_INSTRUCTION[11 : 8]}; + assign _zz__zz_6 = {{_zz_3,{{{decode_INSTRUCTION[31],decode_INSTRUCTION[19 : 12]},decode_INSTRUCTION[20]},decode_INSTRUCTION[30 : 21]}},1'b0}; + assign _zz__zz_6_1 = {{_zz_5,{{{decode_INSTRUCTION[31],decode_INSTRUCTION[7]},decode_INSTRUCTION[30 : 25]},decode_INSTRUCTION[11 : 8]}},1'b0}; + assign _zz__zz_IBusCachedPlugin_predictionJumpInterface_payload = {{{decode_INSTRUCTION[31],decode_INSTRUCTION[19 : 12]},decode_INSTRUCTION[20]},decode_INSTRUCTION[30 : 21]}; + assign _zz__zz_IBusCachedPlugin_predictionJumpInterface_payload_2 = {{{decode_INSTRUCTION[31],decode_INSTRUCTION[7]},decode_INSTRUCTION[30 : 25]},decode_INSTRUCTION[11 : 8]}; + assign _zz_DBusCachedPlugin_exceptionBus_payload_code = (writeBack_MEMORY_WR ? 3'b111 : 3'b101); + assign _zz_DBusCachedPlugin_exceptionBus_payload_code_1 = (writeBack_MEMORY_WR ? 3'b110 : 3'b100); + assign _zz__zz_execute_REGFILE_WRITE_DATA = execute_SRC_LESS; + assign _zz__zz_execute_SRC1 = 3'b100; + assign _zz__zz_execute_SRC1_1 = execute_INSTRUCTION[19 : 15]; + assign _zz__zz_execute_SRC2_3 = {execute_INSTRUCTION[31 : 25],execute_INSTRUCTION[11 : 7]}; + assign _zz_execute_SrcPlugin_addSub = ($signed(_zz_execute_SrcPlugin_addSub_1) + $signed(_zz_execute_SrcPlugin_addSub_4)); + assign _zz_execute_SrcPlugin_addSub_1 = ($signed(_zz_execute_SrcPlugin_addSub_2) + $signed(_zz_execute_SrcPlugin_addSub_3)); + assign _zz_execute_SrcPlugin_addSub_2 = execute_SRC1; + assign _zz_execute_SrcPlugin_addSub_3 = (execute_SRC_USE_SUB_LESS ? (~ execute_SRC2) : execute_SRC2); + assign _zz_execute_SrcPlugin_addSub_4 = (execute_SRC_USE_SUB_LESS ? _zz_execute_SrcPlugin_addSub_5 : _zz_execute_SrcPlugin_addSub_6); + assign _zz_execute_SrcPlugin_addSub_5 = 32'h00000001; + assign _zz_execute_SrcPlugin_addSub_6 = 32'h0; + assign _zz__zz_execute_BranchPlugin_missAlignedTarget_2 = {{{execute_INSTRUCTION[31],execute_INSTRUCTION[19 : 12]},execute_INSTRUCTION[20]},execute_INSTRUCTION[30 : 21]}; + assign _zz__zz_execute_BranchPlugin_missAlignedTarget_4 = {{{execute_INSTRUCTION[31],execute_INSTRUCTION[7]},execute_INSTRUCTION[30 : 25]},execute_INSTRUCTION[11 : 8]}; + assign _zz__zz_execute_BranchPlugin_missAlignedTarget_6 = {_zz_execute_BranchPlugin_missAlignedTarget_1,execute_INSTRUCTION[31 : 20]}; + assign _zz__zz_execute_BranchPlugin_missAlignedTarget_6_1 = {{_zz_execute_BranchPlugin_missAlignedTarget_3,{{{execute_INSTRUCTION[31],execute_INSTRUCTION[19 : 12]},execute_INSTRUCTION[20]},execute_INSTRUCTION[30 : 21]}},1'b0}; + assign _zz__zz_execute_BranchPlugin_missAlignedTarget_6_2 = {{_zz_execute_BranchPlugin_missAlignedTarget_5,{{{execute_INSTRUCTION[31],execute_INSTRUCTION[7]},execute_INSTRUCTION[30 : 25]},execute_INSTRUCTION[11 : 8]}},1'b0}; + assign _zz__zz_execute_BranchPlugin_branch_src2_2 = {{{execute_INSTRUCTION[31],execute_INSTRUCTION[19 : 12]},execute_INSTRUCTION[20]},execute_INSTRUCTION[30 : 21]}; + assign _zz__zz_execute_BranchPlugin_branch_src2_4 = {{{execute_INSTRUCTION[31],execute_INSTRUCTION[7]},execute_INSTRUCTION[30 : 25]},execute_INSTRUCTION[11 : 8]}; + assign _zz_execute_BranchPlugin_branch_src2_9 = 3'b100; + assign _zz__zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_1 = (_zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code & (~ _zz__zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_1_1)); + assign _zz__zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_1_1 = (_zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code - 2'b01); + assign _zz__zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_3 = (_zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_2 & (~ _zz__zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_3_1)); + assign _zz__zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_3_1 = (_zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_2 - 2'b01); + assign _zz_writeBack_MulPlugin_result = {{14{writeBack_MUL_LOW[51]}}, writeBack_MUL_LOW}; + assign _zz_writeBack_MulPlugin_result_1 = ({32'd0,writeBack_MUL_HH} <<< 32); + assign _zz__zz_decode_RS2_2 = writeBack_MUL_LOW[31 : 0]; + assign _zz__zz_decode_RS2_2_1 = writeBack_MulPlugin_result[63 : 32]; + assign _zz_memory_DivPlugin_div_counter_valueNext_1 = memory_DivPlugin_div_counter_willIncrement; + assign _zz_memory_DivPlugin_div_counter_valueNext = {5'd0, _zz_memory_DivPlugin_div_counter_valueNext_1}; + assign _zz_memory_DivPlugin_div_stage_0_remainderMinusDenominator = {1'd0, memory_DivPlugin_rs2}; + assign _zz_memory_DivPlugin_div_stage_0_outRemainder = memory_DivPlugin_div_stage_0_remainderMinusDenominator[31:0]; + assign _zz_memory_DivPlugin_div_stage_0_outRemainder_1 = memory_DivPlugin_div_stage_0_remainderShifted[31:0]; + assign _zz_memory_DivPlugin_div_stage_0_outNumerator = {_zz_memory_DivPlugin_div_stage_0_remainderShifted,(! memory_DivPlugin_div_stage_0_remainderMinusDenominator[32])}; + assign _zz_memory_DivPlugin_div_result_1 = _zz_memory_DivPlugin_div_result_2; + assign _zz_memory_DivPlugin_div_result_2 = _zz_memory_DivPlugin_div_result_3; + assign _zz_memory_DivPlugin_div_result_3 = ({memory_DivPlugin_div_needRevert,(memory_DivPlugin_div_needRevert ? (~ _zz_memory_DivPlugin_div_result) : _zz_memory_DivPlugin_div_result)} + _zz_memory_DivPlugin_div_result_4); + assign _zz_memory_DivPlugin_div_result_5 = memory_DivPlugin_div_needRevert; + assign _zz_memory_DivPlugin_div_result_4 = {32'd0, _zz_memory_DivPlugin_div_result_5}; + assign _zz_memory_DivPlugin_rs1_3 = _zz_memory_DivPlugin_rs1; + assign _zz_memory_DivPlugin_rs1_2 = {32'd0, _zz_memory_DivPlugin_rs1_3}; + assign _zz_memory_DivPlugin_rs2_2 = _zz_memory_DivPlugin_rs2; + assign _zz_memory_DivPlugin_rs2_1 = {31'd0, _zz_memory_DivPlugin_rs2_2}; + assign _zz_execute_CfuPlugin_functionsIds_0 = {execute_INSTRUCTION[31 : 25],execute_INSTRUCTION[14 : 12]}; + assign _zz_iBusWishbone_ADR_1 = (iBus_cmd_payload_address >>> 5); + assign _zz_decode_RegFilePlugin_rs1Data = 1'b1; + assign _zz_decode_RegFilePlugin_rs2Data = 1'b1; + assign _zz_IBusCachedPlugin_jump_pcLoad_payload_6 = {_zz_IBusCachedPlugin_jump_pcLoad_payload_4,_zz_IBusCachedPlugin_jump_pcLoad_payload_3}; + assign _zz_writeBack_DBusCachedPlugin_rspShifted_1 = dataCache_1_io_cpu_writeBack_address[1 : 0]; + assign _zz_writeBack_DBusCachedPlugin_rspShifted_3 = dataCache_1_io_cpu_writeBack_address[1 : 1]; + assign _zz_decode_LEGAL_INSTRUCTION = 32'h0000106f; + assign _zz_decode_LEGAL_INSTRUCTION_1 = (decode_INSTRUCTION & 32'h0000107f); + assign _zz_decode_LEGAL_INSTRUCTION_2 = 32'h00001073; + assign _zz_decode_LEGAL_INSTRUCTION_3 = ((decode_INSTRUCTION & 32'h0000207f) == 32'h00002073); + assign _zz_decode_LEGAL_INSTRUCTION_4 = ((decode_INSTRUCTION & 32'h0000407f) == 32'h00004063); + assign _zz_decode_LEGAL_INSTRUCTION_5 = {((decode_INSTRUCTION & 32'h0000207f) == 32'h00002013),{((decode_INSTRUCTION & 32'h0000603f) == 32'h00000023),{((decode_INSTRUCTION & _zz_decode_LEGAL_INSTRUCTION_6) == 32'h00000003),{(_zz_decode_LEGAL_INSTRUCTION_7 == _zz_decode_LEGAL_INSTRUCTION_8),{_zz_decode_LEGAL_INSTRUCTION_9,{_zz_decode_LEGAL_INSTRUCTION_10,_zz_decode_LEGAL_INSTRUCTION_11}}}}}}; + assign _zz_decode_LEGAL_INSTRUCTION_6 = 32'h0000207f; + assign _zz_decode_LEGAL_INSTRUCTION_7 = (decode_INSTRUCTION & 32'h0000505f); + assign _zz_decode_LEGAL_INSTRUCTION_8 = 32'h00000003; + assign _zz_decode_LEGAL_INSTRUCTION_9 = ((decode_INSTRUCTION & 32'h0000707b) == 32'h00000063); + assign _zz_decode_LEGAL_INSTRUCTION_10 = ((decode_INSTRUCTION & 32'h0000607f) == 32'h0000000f); + assign _zz_decode_LEGAL_INSTRUCTION_11 = {((decode_INSTRUCTION & 32'hfc00007f) == 32'h00000033),{((decode_INSTRUCTION & 32'h01f0707f) == 32'h0000500f),{((decode_INSTRUCTION & _zz_decode_LEGAL_INSTRUCTION_12) == 32'h00005013),{(_zz_decode_LEGAL_INSTRUCTION_13 == _zz_decode_LEGAL_INSTRUCTION_14),{_zz_decode_LEGAL_INSTRUCTION_15,{_zz_decode_LEGAL_INSTRUCTION_16,_zz_decode_LEGAL_INSTRUCTION_17}}}}}}; + assign _zz_decode_LEGAL_INSTRUCTION_12 = 32'hbc00707f; + assign _zz_decode_LEGAL_INSTRUCTION_13 = (decode_INSTRUCTION & 32'hfc00307f); + assign _zz_decode_LEGAL_INSTRUCTION_14 = 32'h00001013; + assign _zz_decode_LEGAL_INSTRUCTION_15 = ((decode_INSTRUCTION & 32'hbe00707f) == 32'h00005033); + assign _zz_decode_LEGAL_INSTRUCTION_16 = ((decode_INSTRUCTION & 32'hbe00707f) == 32'h00000033); + assign _zz_decode_LEGAL_INSTRUCTION_17 = {((decode_INSTRUCTION & 32'hdfffffff) == 32'h10200073),{((decode_INSTRUCTION & 32'hffefffff) == 32'h00000073),((decode_INSTRUCTION & 32'hffffffff) == 32'h10500073)}}; + assign _zz_IBusCachedPlugin_predictionJumpInterface_payload_4 = decode_INSTRUCTION[31]; + assign _zz_IBusCachedPlugin_predictionJumpInterface_payload_5 = decode_INSTRUCTION[31]; + assign _zz_IBusCachedPlugin_predictionJumpInterface_payload_6 = decode_INSTRUCTION[7]; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2 = (decode_INSTRUCTION & 32'h10103050); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_1 = 32'h00100050; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_2 = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_7; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_3 = 1'b0; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_4 = (((decode_INSTRUCTION & 32'h02004064) == 32'h02004020) != 1'b0); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_5 = (((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_6) == 32'h02000030) != 1'b0); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_7 = {({_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_8,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_9} != 2'b00),{(_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_10 != 1'b0),{(_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_11 != _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_16),{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_17,{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_19,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_21}}}}}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_6 = 32'h02004074; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_8 = ((decode_INSTRUCTION & 32'h10203050) == 32'h10000050); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_9 = ((decode_INSTRUCTION & 32'h10103050) == 32'h00000050); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_10 = ((decode_INSTRUCTION & 32'h00103050) == 32'h00000050); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_11 = {(_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_12 == _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_13),(_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_14 == _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_15)}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_16 = 2'b00; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_17 = ({_zz_decode_CfuPlugin_CFU_INPUT_2_KIND_5,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_18} != 2'b00); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_19 = (_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_20 != 1'b0); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_21 = {(_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_22 != _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_27),{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_28,{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_34,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_36}}}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_12 = (decode_INSTRUCTION & 32'h00001050); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_13 = 32'h00001050; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_14 = (decode_INSTRUCTION & 32'h00002050); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_15 = 32'h00002050; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_18 = ((decode_INSTRUCTION & 32'h0000001c) == 32'h00000004); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_20 = ((decode_INSTRUCTION & 32'h00000058) == 32'h00000040); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_22 = {(_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_23 == _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_24),(_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_25 == _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_26)}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_27 = 2'b00; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_28 = ({_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_29,{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_30,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_32}} != 3'b000); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_34 = (_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_35 != 1'b0); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_36 = {(_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_37 != _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_39),{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_40,{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_43,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_48}}}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_23 = (decode_INSTRUCTION & 32'h00007034); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_24 = 32'h00005010; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_25 = (decode_INSTRUCTION & 32'h02007064); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_26 = 32'h00005020; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_29 = ((decode_INSTRUCTION & 32'h40003054) == 32'h40001010); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_30 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_31) == 32'h00001010); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_32 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_33) == 32'h00001010); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_35 = ((decode_INSTRUCTION & 32'h00000064) == 32'h00000024); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_37 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_38) == 32'h00001000); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_39 = 1'b0; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_40 = ((_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_41 == _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_42) != 1'b0); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_43 = ({_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_44,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_46} != 2'b00); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_48 = {(_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_49 != _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_51),{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_52,{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_57,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_71}}}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_31 = 32'h00007034; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_33 = 32'h02007054; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_38 = 32'h00001000; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_41 = (decode_INSTRUCTION & 32'h00003000); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_42 = 32'h00002000; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_44 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_45) == 32'h00002000); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_46 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_47) == 32'h00001000); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_49 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_50) == 32'h00004004); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_51 = 1'b0; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_52 = ({_zz_decode_CfuPlugin_CFU_INPUT_2_KIND_6,{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_53,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_55}} != 3'b000); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_57 = ({_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_58,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_60} != 5'h0); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_71 = {(_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_72 != _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_74),{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_75,{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_90,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_103}}}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_45 = 32'h00002010; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_47 = 32'h00005000; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_50 = 32'h00004054; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_53 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_54) == 32'h00000020); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_55 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_56) == 32'h00000020); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_58 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_59) == 32'h00002040); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_60 = {(_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_61 == _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_62),{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_63,{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_65,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_68}}}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_72 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_73) == 32'h00000020); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_74 = 1'b0; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_75 = ({_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_76,{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_78,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_81}} != 6'h0); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_90 = ({_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_91,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_92} != 5'h0); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_103 = {(_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_104 != _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_117),{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_118,{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_123,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_128}}}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_54 = 32'h00000034; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_56 = 32'h00000064; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_59 = 32'h00002040; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_61 = (decode_INSTRUCTION & 32'h00001040); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_62 = 32'h00001040; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_63 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_64) == 32'h00000040); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_65 = (_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_66 == _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_67); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_68 = (_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_69 == _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_70); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_73 = 32'h00000020; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_76 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_77) == 32'h00000008); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_78 = (_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_79 == _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_80); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_81 = {_zz_decode_CfuPlugin_CFU_INPUT_2_KIND_4,{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_82,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_85}}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_91 = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_4; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_92 = {_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_93,{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_95,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_98}}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_104 = {_zz_decode_CfuPlugin_CFU_INPUT_2_KIND_5,{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_105,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_108}}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_117 = 6'h0; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_118 = ({_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_119,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_120} != 2'b00); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_123 = (_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_124 != _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_127); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_128 = {_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_129,{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_132,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_137}}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_64 = 32'h00100040; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_66 = (decode_INSTRUCTION & 32'h00000050); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_67 = 32'h00000040; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_69 = (decode_INSTRUCTION & 32'h00000038); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_70 = 32'h0; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_77 = 32'h00000008; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_79 = (decode_INSTRUCTION & 32'h00000040); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_80 = 32'h00000040; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_82 = (_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_83 == _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_84); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_85 = {_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_86,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_88}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_93 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_94) == 32'h00002010); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_95 = (_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_96 == _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_97); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_98 = {_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_99,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_101}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_105 = (_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_106 == _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_107); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_108 = {_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_109,{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_111,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_114}}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_119 = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_4; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_120 = (_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_121 == _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_122); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_124 = {_zz_decode_CfuPlugin_CFU_INPUT_2_KIND_4,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_125}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_127 = 2'b00; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_129 = (_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_130 != 1'b0); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_132 = (_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_133 != _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_136); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_137 = {_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_138,{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_146,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_150}}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_83 = (decode_INSTRUCTION & 32'h00004020); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_84 = 32'h00004020; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_86 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_87) == 32'h00000010); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_88 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_89) == 32'h00000020); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_94 = 32'h00002030; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_96 = (decode_INSTRUCTION & 32'h00001030); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_97 = 32'h00000010; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_99 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_100) == 32'h00002020); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_101 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_102) == 32'h00000020); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_106 = (decode_INSTRUCTION & 32'h00001010); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_107 = 32'h00001010; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_109 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_110) == 32'h00002010); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_111 = (_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_112 == _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_113); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_114 = {_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_115,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_116}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_121 = (decode_INSTRUCTION & 32'h00000070); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_122 = 32'h00000020; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_125 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_126) == 32'h0); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_130 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_131) == 32'h00004010); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_133 = (_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_134 == _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_135); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_136 = 1'b0; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_138 = ({_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_139,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_141} != 4'b0000); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_146 = (_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_147 != _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_149); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_150 = {_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_151,{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_157,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_161}}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_87 = 32'h00000030; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_89 = 32'h02000020; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_100 = 32'h02002060; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_102 = 32'h02003020; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_110 = 32'h00002010; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_112 = (decode_INSTRUCTION & 32'h00000050); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_113 = 32'h00000010; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_115 = ((decode_INSTRUCTION & 32'h0000000c) == 32'h00000004); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_116 = ((decode_INSTRUCTION & 32'h00000024) == 32'h0); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_126 = 32'h00000020; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_131 = 32'h00004014; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_134 = (decode_INSTRUCTION & 32'h00006014); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_135 = 32'h00002010; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_139 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_140) == 32'h0); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_141 = {(_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_142 == _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_143),{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_144,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_145}}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_147 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_148) == 32'h0); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_149 = 1'b0; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_151 = ({_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_152,{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_153,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_155}} != 3'b000); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_157 = ({_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_158,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_160} != 2'b00); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_161 = {(_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_162 != _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_165),(_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_166 != _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_168)}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_140 = 32'h00000044; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_142 = (decode_INSTRUCTION & 32'h00000018); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_143 = 32'h0; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_144 = ((decode_INSTRUCTION & 32'h00006004) == 32'h00002000); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_145 = ((decode_INSTRUCTION & 32'h00005004) == 32'h00001000); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_148 = 32'h00000058; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_152 = ((decode_INSTRUCTION & 32'h00000044) == 32'h00000040); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_153 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_154) == 32'h00002010); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_155 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_156) == 32'h40000030); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_158 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_159) == 32'h00000004); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_160 = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_3; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_162 = {(_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_163 == _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_164),_zz_decode_CfuPlugin_CFU_INPUT_2_KIND_3}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_165 = 2'b00; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_166 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_167) == 32'h00001004); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_168 = 1'b0; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_154 = 32'h00002014; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_156 = 32'h40000034; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_159 = 32'h00000014; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_163 = (decode_INSTRUCTION & 32'h00000044); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_164 = 32'h00000004; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_167 = 32'h00005054; + assign _zz_execute_BranchPlugin_branch_src2_6 = execute_INSTRUCTION[31]; + assign _zz_execute_BranchPlugin_branch_src2_7 = execute_INSTRUCTION[31]; + assign _zz_execute_BranchPlugin_branch_src2_8 = execute_INSTRUCTION[7]; + assign _zz_CsrPlugin_csrMapping_readDataInit_41 = 32'h0; + always @(posedge clk) begin + if(_zz_decode_RegFilePlugin_rs1Data) begin + _zz_RegFilePlugin_regFile_port0 <= RegFilePlugin_regFile[decode_RegFilePlugin_regFileReadAddress1]; + end + end + + always @(posedge clk) begin + if(_zz_decode_RegFilePlugin_rs2Data) begin + _zz_RegFilePlugin_regFile_port1 <= RegFilePlugin_regFile[decode_RegFilePlugin_regFileReadAddress2]; + end + end + + always @(posedge clk) begin + if(_zz_1) begin + RegFilePlugin_regFile[lastStageRegFileWrite_payload_address] <= lastStageRegFileWrite_payload_data; + end + end + + InstructionCache IBusCachedPlugin_cache ( + .io_flush (IBusCachedPlugin_cache_io_flush ), //i + .io_cpu_prefetch_isValid (IBusCachedPlugin_cache_io_cpu_prefetch_isValid ), //i + .io_cpu_prefetch_haltIt (IBusCachedPlugin_cache_io_cpu_prefetch_haltIt ), //o + .io_cpu_prefetch_pc (IBusCachedPlugin_iBusRsp_stages_0_input_payload ), //i + .io_cpu_fetch_isValid (IBusCachedPlugin_cache_io_cpu_fetch_isValid ), //i + .io_cpu_fetch_isStuck (IBusCachedPlugin_cache_io_cpu_fetch_isStuck ), //i + .io_cpu_fetch_isRemoved (IBusCachedPlugin_cache_io_cpu_fetch_isRemoved ), //i + .io_cpu_fetch_pc (IBusCachedPlugin_iBusRsp_stages_1_input_payload ), //i + .io_cpu_fetch_data (IBusCachedPlugin_cache_io_cpu_fetch_data ), //o + .io_cpu_fetch_mmuRsp_physicalAddress (IBusCachedPlugin_mmuBus_rsp_physicalAddress ), //i + .io_cpu_fetch_mmuRsp_isIoAccess (IBusCachedPlugin_mmuBus_rsp_isIoAccess ), //i + .io_cpu_fetch_mmuRsp_isPaging (IBusCachedPlugin_mmuBus_rsp_isPaging ), //i + .io_cpu_fetch_mmuRsp_allowRead (IBusCachedPlugin_mmuBus_rsp_allowRead ), //i + .io_cpu_fetch_mmuRsp_allowWrite (IBusCachedPlugin_mmuBus_rsp_allowWrite ), //i + .io_cpu_fetch_mmuRsp_allowExecute (IBusCachedPlugin_mmuBus_rsp_allowExecute ), //i + .io_cpu_fetch_mmuRsp_exception (IBusCachedPlugin_mmuBus_rsp_exception ), //i + .io_cpu_fetch_mmuRsp_refilling (IBusCachedPlugin_mmuBus_rsp_refilling ), //i + .io_cpu_fetch_mmuRsp_bypassTranslation (IBusCachedPlugin_mmuBus_rsp_bypassTranslation ), //i + .io_cpu_fetch_physicalAddress (IBusCachedPlugin_cache_io_cpu_fetch_physicalAddress ), //o + .io_cpu_decode_isValid (IBusCachedPlugin_cache_io_cpu_decode_isValid ), //i + .io_cpu_decode_isStuck (IBusCachedPlugin_cache_io_cpu_decode_isStuck ), //i + .io_cpu_decode_pc (IBusCachedPlugin_iBusRsp_stages_2_input_payload ), //i + .io_cpu_decode_physicalAddress (IBusCachedPlugin_cache_io_cpu_decode_physicalAddress ), //o + .io_cpu_decode_data (IBusCachedPlugin_cache_io_cpu_decode_data ), //o + .io_cpu_decode_cacheMiss (IBusCachedPlugin_cache_io_cpu_decode_cacheMiss ), //o + .io_cpu_decode_error (IBusCachedPlugin_cache_io_cpu_decode_error ), //o + .io_cpu_decode_mmuRefilling (IBusCachedPlugin_cache_io_cpu_decode_mmuRefilling ), //o + .io_cpu_decode_mmuException (IBusCachedPlugin_cache_io_cpu_decode_mmuException ), //o + .io_cpu_decode_isUser (IBusCachedPlugin_cache_io_cpu_decode_isUser ), //i + .io_cpu_fill_valid (IBusCachedPlugin_cache_io_cpu_fill_valid ), //i + .io_cpu_fill_payload (IBusCachedPlugin_cache_io_cpu_decode_physicalAddress ), //i + .io_mem_cmd_valid (IBusCachedPlugin_cache_io_mem_cmd_valid ), //o + .io_mem_cmd_ready (iBus_cmd_ready ), //i + .io_mem_cmd_payload_address (IBusCachedPlugin_cache_io_mem_cmd_payload_address ), //o + .io_mem_cmd_payload_size (IBusCachedPlugin_cache_io_mem_cmd_payload_size ), //o + .io_mem_rsp_valid (iBus_rsp_valid ), //i + .io_mem_rsp_payload_data (iBus_rsp_payload_data ), //i + .io_mem_rsp_payload_error (iBus_rsp_payload_error ), //i + ._zz_when_Fetcher_l398 (switch_Fetcher_l362 ), //i + ._zz_io_cpu_fetch_data_regNextWhen (IBusCachedPlugin_injectionPort_payload ), //i + .clk (clk ), //i + .reset (reset ) //i + ); + DataCache dataCache_1 ( + .io_cpu_execute_isValid (dataCache_1_io_cpu_execute_isValid ), //i + .io_cpu_execute_address (dataCache_1_io_cpu_execute_address ), //i + .io_cpu_execute_haltIt (dataCache_1_io_cpu_execute_haltIt ), //o + .io_cpu_execute_args_wr (execute_MEMORY_WR ), //i + .io_cpu_execute_args_size (execute_DBusCachedPlugin_size ), //i + .io_cpu_execute_args_totalyConsistent (execute_MEMORY_FORCE_CONSTISTENCY ), //i + .io_cpu_execute_refilling (dataCache_1_io_cpu_execute_refilling ), //o + .io_cpu_memory_isValid (dataCache_1_io_cpu_memory_isValid ), //i + .io_cpu_memory_isStuck (memory_arbitration_isStuck ), //i + .io_cpu_memory_isWrite (dataCache_1_io_cpu_memory_isWrite ), //o + .io_cpu_memory_address (dataCache_1_io_cpu_memory_address ), //i + .io_cpu_memory_mmuRsp_physicalAddress (DBusCachedPlugin_mmuBus_rsp_physicalAddress ), //i + .io_cpu_memory_mmuRsp_isIoAccess (dataCache_1_io_cpu_memory_mmuRsp_isIoAccess ), //i + .io_cpu_memory_mmuRsp_isPaging (DBusCachedPlugin_mmuBus_rsp_isPaging ), //i + .io_cpu_memory_mmuRsp_allowRead (DBusCachedPlugin_mmuBus_rsp_allowRead ), //i + .io_cpu_memory_mmuRsp_allowWrite (DBusCachedPlugin_mmuBus_rsp_allowWrite ), //i + .io_cpu_memory_mmuRsp_allowExecute (DBusCachedPlugin_mmuBus_rsp_allowExecute ), //i + .io_cpu_memory_mmuRsp_exception (DBusCachedPlugin_mmuBus_rsp_exception ), //i + .io_cpu_memory_mmuRsp_refilling (DBusCachedPlugin_mmuBus_rsp_refilling ), //i + .io_cpu_memory_mmuRsp_bypassTranslation (DBusCachedPlugin_mmuBus_rsp_bypassTranslation ), //i + .io_cpu_writeBack_isValid (dataCache_1_io_cpu_writeBack_isValid ), //i + .io_cpu_writeBack_isStuck (writeBack_arbitration_isStuck ), //i + .io_cpu_writeBack_isUser (dataCache_1_io_cpu_writeBack_isUser ), //i + .io_cpu_writeBack_haltIt (dataCache_1_io_cpu_writeBack_haltIt ), //o + .io_cpu_writeBack_isWrite (dataCache_1_io_cpu_writeBack_isWrite ), //o + .io_cpu_writeBack_storeData (dataCache_1_io_cpu_writeBack_storeData ), //i + .io_cpu_writeBack_data (dataCache_1_io_cpu_writeBack_data ), //o + .io_cpu_writeBack_address (dataCache_1_io_cpu_writeBack_address ), //i + .io_cpu_writeBack_mmuException (dataCache_1_io_cpu_writeBack_mmuException ), //o + .io_cpu_writeBack_unalignedAccess (dataCache_1_io_cpu_writeBack_unalignedAccess ), //o + .io_cpu_writeBack_accessError (dataCache_1_io_cpu_writeBack_accessError ), //o + .io_cpu_writeBack_keepMemRspData (dataCache_1_io_cpu_writeBack_keepMemRspData ), //o + .io_cpu_writeBack_fence_SW (dataCache_1_io_cpu_writeBack_fence_SW ), //i + .io_cpu_writeBack_fence_SR (dataCache_1_io_cpu_writeBack_fence_SR ), //i + .io_cpu_writeBack_fence_SO (dataCache_1_io_cpu_writeBack_fence_SO ), //i + .io_cpu_writeBack_fence_SI (dataCache_1_io_cpu_writeBack_fence_SI ), //i + .io_cpu_writeBack_fence_PW (dataCache_1_io_cpu_writeBack_fence_PW ), //i + .io_cpu_writeBack_fence_PR (dataCache_1_io_cpu_writeBack_fence_PR ), //i + .io_cpu_writeBack_fence_PO (dataCache_1_io_cpu_writeBack_fence_PO ), //i + .io_cpu_writeBack_fence_PI (dataCache_1_io_cpu_writeBack_fence_PI ), //i + .io_cpu_writeBack_fence_FM (dataCache_1_io_cpu_writeBack_fence_FM ), //i + .io_cpu_writeBack_exclusiveOk (dataCache_1_io_cpu_writeBack_exclusiveOk ), //o + .io_cpu_redo (dataCache_1_io_cpu_redo ), //o + .io_cpu_flush_valid (dataCache_1_io_cpu_flush_valid ), //i + .io_cpu_flush_ready (dataCache_1_io_cpu_flush_ready ), //o + .io_mem_cmd_valid (dataCache_1_io_mem_cmd_valid ), //o + .io_mem_cmd_ready (dataCache_1_io_mem_cmd_ready ), //i + .io_mem_cmd_payload_wr (dataCache_1_io_mem_cmd_payload_wr ), //o + .io_mem_cmd_payload_uncached (dataCache_1_io_mem_cmd_payload_uncached ), //o + .io_mem_cmd_payload_address (dataCache_1_io_mem_cmd_payload_address ), //o + .io_mem_cmd_payload_data (dataCache_1_io_mem_cmd_payload_data ), //o + .io_mem_cmd_payload_mask (dataCache_1_io_mem_cmd_payload_mask ), //o + .io_mem_cmd_payload_size (dataCache_1_io_mem_cmd_payload_size ), //o + .io_mem_cmd_payload_last (dataCache_1_io_mem_cmd_payload_last ), //o + .io_mem_rsp_valid (dBus_rsp_valid ), //i + .io_mem_rsp_payload_last (dBus_rsp_payload_last ), //i + .io_mem_rsp_payload_data (dBus_rsp_payload_data ), //i + .io_mem_rsp_payload_error (dBus_rsp_payload_error ), //i + .clk (clk ), //i + .reset (reset ) //i + ); + always @(*) begin + case(_zz_IBusCachedPlugin_jump_pcLoad_payload_6) + 2'b00 : begin + _zz_IBusCachedPlugin_jump_pcLoad_payload_5 = DBusCachedPlugin_redoBranch_payload; + end + 2'b01 : begin + _zz_IBusCachedPlugin_jump_pcLoad_payload_5 = CsrPlugin_jumpInterface_payload; + end + 2'b10 : begin + _zz_IBusCachedPlugin_jump_pcLoad_payload_5 = BranchPlugin_jumpInterface_payload; + end + default : begin + _zz_IBusCachedPlugin_jump_pcLoad_payload_5 = IBusCachedPlugin_predictionJumpInterface_payload; + end + endcase + end + + always @(*) begin + case(_zz_writeBack_DBusCachedPlugin_rspShifted_1) + 2'b00 : begin + _zz_writeBack_DBusCachedPlugin_rspShifted = writeBack_DBusCachedPlugin_rspSplits_0; + end + 2'b01 : begin + _zz_writeBack_DBusCachedPlugin_rspShifted = writeBack_DBusCachedPlugin_rspSplits_1; + end + 2'b10 : begin + _zz_writeBack_DBusCachedPlugin_rspShifted = writeBack_DBusCachedPlugin_rspSplits_2; + end + default : begin + _zz_writeBack_DBusCachedPlugin_rspShifted = writeBack_DBusCachedPlugin_rspSplits_3; + end + endcase + end + + always @(*) begin + case(_zz_writeBack_DBusCachedPlugin_rspShifted_3) + 1'b0 : begin + _zz_writeBack_DBusCachedPlugin_rspShifted_2 = writeBack_DBusCachedPlugin_rspSplits_1; + end + default : begin + _zz_writeBack_DBusCachedPlugin_rspShifted_2 = writeBack_DBusCachedPlugin_rspSplits_3; + end + endcase + end + + `ifndef SYNTHESIS + always @(*) begin + case(decode_CfuPlugin_CFU_INPUT_2_KIND) + `Input2Kind_binary_sequential_RS : decode_CfuPlugin_CFU_INPUT_2_KIND_string = "RS "; + `Input2Kind_binary_sequential_IMM_I : decode_CfuPlugin_CFU_INPUT_2_KIND_string = "IMM_I"; + default : decode_CfuPlugin_CFU_INPUT_2_KIND_string = "?????"; + endcase + end + always @(*) begin + case(_zz_decode_CfuPlugin_CFU_INPUT_2_KIND) + `Input2Kind_binary_sequential_RS : _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_string = "RS "; + `Input2Kind_binary_sequential_IMM_I : _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_string = "IMM_I"; + default : _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_string = "?????"; + endcase + end + always @(*) begin + case(_zz_decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND) + `Input2Kind_binary_sequential_RS : _zz_decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND_string = "RS "; + `Input2Kind_binary_sequential_IMM_I : _zz_decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND_string = "IMM_I"; + default : _zz_decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND_string = "?????"; + endcase + end + always @(*) begin + case(_zz_decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND_1) + `Input2Kind_binary_sequential_RS : _zz_decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND_1_string = "RS "; + `Input2Kind_binary_sequential_IMM_I : _zz_decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND_1_string = "IMM_I"; + default : _zz_decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND_1_string = "?????"; + endcase + end + always @(*) begin + case(_zz_memory_to_writeBack_ENV_CTRL) + `EnvCtrlEnum_binary_sequential_NONE : _zz_memory_to_writeBack_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : _zz_memory_to_writeBack_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_binary_sequential_WFI : _zz_memory_to_writeBack_ENV_CTRL_string = "WFI "; + `EnvCtrlEnum_binary_sequential_ECALL : _zz_memory_to_writeBack_ENV_CTRL_string = "ECALL"; + default : _zz_memory_to_writeBack_ENV_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(_zz_memory_to_writeBack_ENV_CTRL_1) + `EnvCtrlEnum_binary_sequential_NONE : _zz_memory_to_writeBack_ENV_CTRL_1_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : _zz_memory_to_writeBack_ENV_CTRL_1_string = "XRET "; + `EnvCtrlEnum_binary_sequential_WFI : _zz_memory_to_writeBack_ENV_CTRL_1_string = "WFI "; + `EnvCtrlEnum_binary_sequential_ECALL : _zz_memory_to_writeBack_ENV_CTRL_1_string = "ECALL"; + default : _zz_memory_to_writeBack_ENV_CTRL_1_string = "?????"; + endcase + end + always @(*) begin + case(_zz_execute_to_memory_ENV_CTRL) + `EnvCtrlEnum_binary_sequential_NONE : _zz_execute_to_memory_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : _zz_execute_to_memory_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_binary_sequential_WFI : _zz_execute_to_memory_ENV_CTRL_string = "WFI "; + `EnvCtrlEnum_binary_sequential_ECALL : _zz_execute_to_memory_ENV_CTRL_string = "ECALL"; + default : _zz_execute_to_memory_ENV_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(_zz_execute_to_memory_ENV_CTRL_1) + `EnvCtrlEnum_binary_sequential_NONE : _zz_execute_to_memory_ENV_CTRL_1_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : _zz_execute_to_memory_ENV_CTRL_1_string = "XRET "; + `EnvCtrlEnum_binary_sequential_WFI : _zz_execute_to_memory_ENV_CTRL_1_string = "WFI "; + `EnvCtrlEnum_binary_sequential_ECALL : _zz_execute_to_memory_ENV_CTRL_1_string = "ECALL"; + default : _zz_execute_to_memory_ENV_CTRL_1_string = "?????"; + endcase + end + always @(*) begin + case(decode_ENV_CTRL) + `EnvCtrlEnum_binary_sequential_NONE : decode_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : decode_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_binary_sequential_WFI : decode_ENV_CTRL_string = "WFI "; + `EnvCtrlEnum_binary_sequential_ECALL : decode_ENV_CTRL_string = "ECALL"; + default : decode_ENV_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(_zz_decode_ENV_CTRL) + `EnvCtrlEnum_binary_sequential_NONE : _zz_decode_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : _zz_decode_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_binary_sequential_WFI : _zz_decode_ENV_CTRL_string = "WFI "; + `EnvCtrlEnum_binary_sequential_ECALL : _zz_decode_ENV_CTRL_string = "ECALL"; + default : _zz_decode_ENV_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(_zz_decode_to_execute_ENV_CTRL) + `EnvCtrlEnum_binary_sequential_NONE : _zz_decode_to_execute_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : _zz_decode_to_execute_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_binary_sequential_WFI : _zz_decode_to_execute_ENV_CTRL_string = "WFI "; + `EnvCtrlEnum_binary_sequential_ECALL : _zz_decode_to_execute_ENV_CTRL_string = "ECALL"; + default : _zz_decode_to_execute_ENV_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(_zz_decode_to_execute_ENV_CTRL_1) + `EnvCtrlEnum_binary_sequential_NONE : _zz_decode_to_execute_ENV_CTRL_1_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : _zz_decode_to_execute_ENV_CTRL_1_string = "XRET "; + `EnvCtrlEnum_binary_sequential_WFI : _zz_decode_to_execute_ENV_CTRL_1_string = "WFI "; + `EnvCtrlEnum_binary_sequential_ECALL : _zz_decode_to_execute_ENV_CTRL_1_string = "ECALL"; + default : _zz_decode_to_execute_ENV_CTRL_1_string = "?????"; + endcase + end + always @(*) begin + case(_zz_decode_to_execute_BRANCH_CTRL) + `BranchCtrlEnum_binary_sequential_INC : _zz_decode_to_execute_BRANCH_CTRL_string = "INC "; + `BranchCtrlEnum_binary_sequential_B : _zz_decode_to_execute_BRANCH_CTRL_string = "B "; + `BranchCtrlEnum_binary_sequential_JAL : _zz_decode_to_execute_BRANCH_CTRL_string = "JAL "; + `BranchCtrlEnum_binary_sequential_JALR : _zz_decode_to_execute_BRANCH_CTRL_string = "JALR"; + default : _zz_decode_to_execute_BRANCH_CTRL_string = "????"; + endcase + end + always @(*) begin + case(_zz_decode_to_execute_BRANCH_CTRL_1) + `BranchCtrlEnum_binary_sequential_INC : _zz_decode_to_execute_BRANCH_CTRL_1_string = "INC "; + `BranchCtrlEnum_binary_sequential_B : _zz_decode_to_execute_BRANCH_CTRL_1_string = "B "; + `BranchCtrlEnum_binary_sequential_JAL : _zz_decode_to_execute_BRANCH_CTRL_1_string = "JAL "; + `BranchCtrlEnum_binary_sequential_JALR : _zz_decode_to_execute_BRANCH_CTRL_1_string = "JALR"; + default : _zz_decode_to_execute_BRANCH_CTRL_1_string = "????"; + endcase + end + always @(*) begin + case(_zz_execute_to_memory_SHIFT_CTRL) + `ShiftCtrlEnum_binary_sequential_DISABLE_1 : _zz_execute_to_memory_SHIFT_CTRL_string = "DISABLE_1"; + `ShiftCtrlEnum_binary_sequential_SLL_1 : _zz_execute_to_memory_SHIFT_CTRL_string = "SLL_1 "; + `ShiftCtrlEnum_binary_sequential_SRL_1 : _zz_execute_to_memory_SHIFT_CTRL_string = "SRL_1 "; + `ShiftCtrlEnum_binary_sequential_SRA_1 : _zz_execute_to_memory_SHIFT_CTRL_string = "SRA_1 "; + default : _zz_execute_to_memory_SHIFT_CTRL_string = "?????????"; + endcase + end + always @(*) begin + case(_zz_execute_to_memory_SHIFT_CTRL_1) + `ShiftCtrlEnum_binary_sequential_DISABLE_1 : _zz_execute_to_memory_SHIFT_CTRL_1_string = "DISABLE_1"; + `ShiftCtrlEnum_binary_sequential_SLL_1 : _zz_execute_to_memory_SHIFT_CTRL_1_string = "SLL_1 "; + `ShiftCtrlEnum_binary_sequential_SRL_1 : _zz_execute_to_memory_SHIFT_CTRL_1_string = "SRL_1 "; + `ShiftCtrlEnum_binary_sequential_SRA_1 : _zz_execute_to_memory_SHIFT_CTRL_1_string = "SRA_1 "; + default : _zz_execute_to_memory_SHIFT_CTRL_1_string = "?????????"; + endcase + end + always @(*) begin + case(decode_SHIFT_CTRL) + `ShiftCtrlEnum_binary_sequential_DISABLE_1 : decode_SHIFT_CTRL_string = "DISABLE_1"; + `ShiftCtrlEnum_binary_sequential_SLL_1 : decode_SHIFT_CTRL_string = "SLL_1 "; + `ShiftCtrlEnum_binary_sequential_SRL_1 : decode_SHIFT_CTRL_string = "SRL_1 "; + `ShiftCtrlEnum_binary_sequential_SRA_1 : decode_SHIFT_CTRL_string = "SRA_1 "; + default : decode_SHIFT_CTRL_string = "?????????"; + endcase + end + always @(*) begin + case(_zz_decode_SHIFT_CTRL) + `ShiftCtrlEnum_binary_sequential_DISABLE_1 : _zz_decode_SHIFT_CTRL_string = "DISABLE_1"; + `ShiftCtrlEnum_binary_sequential_SLL_1 : _zz_decode_SHIFT_CTRL_string = "SLL_1 "; + `ShiftCtrlEnum_binary_sequential_SRL_1 : _zz_decode_SHIFT_CTRL_string = "SRL_1 "; + `ShiftCtrlEnum_binary_sequential_SRA_1 : _zz_decode_SHIFT_CTRL_string = "SRA_1 "; + default : _zz_decode_SHIFT_CTRL_string = "?????????"; + endcase + end + always @(*) begin + case(_zz_decode_to_execute_SHIFT_CTRL) + `ShiftCtrlEnum_binary_sequential_DISABLE_1 : _zz_decode_to_execute_SHIFT_CTRL_string = "DISABLE_1"; + `ShiftCtrlEnum_binary_sequential_SLL_1 : _zz_decode_to_execute_SHIFT_CTRL_string = "SLL_1 "; + `ShiftCtrlEnum_binary_sequential_SRL_1 : _zz_decode_to_execute_SHIFT_CTRL_string = "SRL_1 "; + `ShiftCtrlEnum_binary_sequential_SRA_1 : _zz_decode_to_execute_SHIFT_CTRL_string = "SRA_1 "; + default : _zz_decode_to_execute_SHIFT_CTRL_string = "?????????"; + endcase + end + always @(*) begin + case(_zz_decode_to_execute_SHIFT_CTRL_1) + `ShiftCtrlEnum_binary_sequential_DISABLE_1 : _zz_decode_to_execute_SHIFT_CTRL_1_string = "DISABLE_1"; + `ShiftCtrlEnum_binary_sequential_SLL_1 : _zz_decode_to_execute_SHIFT_CTRL_1_string = "SLL_1 "; + `ShiftCtrlEnum_binary_sequential_SRL_1 : _zz_decode_to_execute_SHIFT_CTRL_1_string = "SRL_1 "; + `ShiftCtrlEnum_binary_sequential_SRA_1 : _zz_decode_to_execute_SHIFT_CTRL_1_string = "SRA_1 "; + default : _zz_decode_to_execute_SHIFT_CTRL_1_string = "?????????"; + endcase + end + always @(*) begin + case(decode_ALU_BITWISE_CTRL) + `AluBitwiseCtrlEnum_binary_sequential_XOR_1 : decode_ALU_BITWISE_CTRL_string = "XOR_1"; + `AluBitwiseCtrlEnum_binary_sequential_OR_1 : decode_ALU_BITWISE_CTRL_string = "OR_1 "; + `AluBitwiseCtrlEnum_binary_sequential_AND_1 : decode_ALU_BITWISE_CTRL_string = "AND_1"; + default : decode_ALU_BITWISE_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(_zz_decode_ALU_BITWISE_CTRL) + `AluBitwiseCtrlEnum_binary_sequential_XOR_1 : _zz_decode_ALU_BITWISE_CTRL_string = "XOR_1"; + `AluBitwiseCtrlEnum_binary_sequential_OR_1 : _zz_decode_ALU_BITWISE_CTRL_string = "OR_1 "; + `AluBitwiseCtrlEnum_binary_sequential_AND_1 : _zz_decode_ALU_BITWISE_CTRL_string = "AND_1"; + default : _zz_decode_ALU_BITWISE_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(_zz_decode_to_execute_ALU_BITWISE_CTRL) + `AluBitwiseCtrlEnum_binary_sequential_XOR_1 : _zz_decode_to_execute_ALU_BITWISE_CTRL_string = "XOR_1"; + `AluBitwiseCtrlEnum_binary_sequential_OR_1 : _zz_decode_to_execute_ALU_BITWISE_CTRL_string = "OR_1 "; + `AluBitwiseCtrlEnum_binary_sequential_AND_1 : _zz_decode_to_execute_ALU_BITWISE_CTRL_string = "AND_1"; + default : _zz_decode_to_execute_ALU_BITWISE_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(_zz_decode_to_execute_ALU_BITWISE_CTRL_1) + `AluBitwiseCtrlEnum_binary_sequential_XOR_1 : _zz_decode_to_execute_ALU_BITWISE_CTRL_1_string = "XOR_1"; + `AluBitwiseCtrlEnum_binary_sequential_OR_1 : _zz_decode_to_execute_ALU_BITWISE_CTRL_1_string = "OR_1 "; + `AluBitwiseCtrlEnum_binary_sequential_AND_1 : _zz_decode_to_execute_ALU_BITWISE_CTRL_1_string = "AND_1"; + default : _zz_decode_to_execute_ALU_BITWISE_CTRL_1_string = "?????"; + endcase + end + always @(*) begin + case(decode_SRC2_CTRL) + `Src2CtrlEnum_binary_sequential_RS : decode_SRC2_CTRL_string = "RS "; + `Src2CtrlEnum_binary_sequential_IMI : decode_SRC2_CTRL_string = "IMI"; + `Src2CtrlEnum_binary_sequential_IMS : decode_SRC2_CTRL_string = "IMS"; + `Src2CtrlEnum_binary_sequential_PC : decode_SRC2_CTRL_string = "PC "; + default : decode_SRC2_CTRL_string = "???"; + endcase + end + always @(*) begin + case(_zz_decode_SRC2_CTRL) + `Src2CtrlEnum_binary_sequential_RS : _zz_decode_SRC2_CTRL_string = "RS "; + `Src2CtrlEnum_binary_sequential_IMI : _zz_decode_SRC2_CTRL_string = "IMI"; + `Src2CtrlEnum_binary_sequential_IMS : _zz_decode_SRC2_CTRL_string = "IMS"; + `Src2CtrlEnum_binary_sequential_PC : _zz_decode_SRC2_CTRL_string = "PC "; + default : _zz_decode_SRC2_CTRL_string = "???"; + endcase + end + always @(*) begin + case(_zz_decode_to_execute_SRC2_CTRL) + `Src2CtrlEnum_binary_sequential_RS : _zz_decode_to_execute_SRC2_CTRL_string = "RS "; + `Src2CtrlEnum_binary_sequential_IMI : _zz_decode_to_execute_SRC2_CTRL_string = "IMI"; + `Src2CtrlEnum_binary_sequential_IMS : _zz_decode_to_execute_SRC2_CTRL_string = "IMS"; + `Src2CtrlEnum_binary_sequential_PC : _zz_decode_to_execute_SRC2_CTRL_string = "PC "; + default : _zz_decode_to_execute_SRC2_CTRL_string = "???"; + endcase + end + always @(*) begin + case(_zz_decode_to_execute_SRC2_CTRL_1) + `Src2CtrlEnum_binary_sequential_RS : _zz_decode_to_execute_SRC2_CTRL_1_string = "RS "; + `Src2CtrlEnum_binary_sequential_IMI : _zz_decode_to_execute_SRC2_CTRL_1_string = "IMI"; + `Src2CtrlEnum_binary_sequential_IMS : _zz_decode_to_execute_SRC2_CTRL_1_string = "IMS"; + `Src2CtrlEnum_binary_sequential_PC : _zz_decode_to_execute_SRC2_CTRL_1_string = "PC "; + default : _zz_decode_to_execute_SRC2_CTRL_1_string = "???"; + endcase + end + always @(*) begin + case(decode_ALU_CTRL) + `AluCtrlEnum_binary_sequential_ADD_SUB : decode_ALU_CTRL_string = "ADD_SUB "; + `AluCtrlEnum_binary_sequential_SLT_SLTU : decode_ALU_CTRL_string = "SLT_SLTU"; + `AluCtrlEnum_binary_sequential_BITWISE : decode_ALU_CTRL_string = "BITWISE "; + default : decode_ALU_CTRL_string = "????????"; + endcase + end + always @(*) begin + case(_zz_decode_ALU_CTRL) + `AluCtrlEnum_binary_sequential_ADD_SUB : _zz_decode_ALU_CTRL_string = "ADD_SUB "; + `AluCtrlEnum_binary_sequential_SLT_SLTU : _zz_decode_ALU_CTRL_string = "SLT_SLTU"; + `AluCtrlEnum_binary_sequential_BITWISE : _zz_decode_ALU_CTRL_string = "BITWISE "; + default : _zz_decode_ALU_CTRL_string = "????????"; + endcase + end + always @(*) begin + case(_zz_decode_to_execute_ALU_CTRL) + `AluCtrlEnum_binary_sequential_ADD_SUB : _zz_decode_to_execute_ALU_CTRL_string = "ADD_SUB "; + `AluCtrlEnum_binary_sequential_SLT_SLTU : _zz_decode_to_execute_ALU_CTRL_string = "SLT_SLTU"; + `AluCtrlEnum_binary_sequential_BITWISE : _zz_decode_to_execute_ALU_CTRL_string = "BITWISE "; + default : _zz_decode_to_execute_ALU_CTRL_string = "????????"; + endcase + end + always @(*) begin + case(_zz_decode_to_execute_ALU_CTRL_1) + `AluCtrlEnum_binary_sequential_ADD_SUB : _zz_decode_to_execute_ALU_CTRL_1_string = "ADD_SUB "; + `AluCtrlEnum_binary_sequential_SLT_SLTU : _zz_decode_to_execute_ALU_CTRL_1_string = "SLT_SLTU"; + `AluCtrlEnum_binary_sequential_BITWISE : _zz_decode_to_execute_ALU_CTRL_1_string = "BITWISE "; + default : _zz_decode_to_execute_ALU_CTRL_1_string = "????????"; + endcase + end + always @(*) begin + case(decode_SRC1_CTRL) + `Src1CtrlEnum_binary_sequential_RS : decode_SRC1_CTRL_string = "RS "; + `Src1CtrlEnum_binary_sequential_IMU : decode_SRC1_CTRL_string = "IMU "; + `Src1CtrlEnum_binary_sequential_PC_INCREMENT : decode_SRC1_CTRL_string = "PC_INCREMENT"; + `Src1CtrlEnum_binary_sequential_URS1 : decode_SRC1_CTRL_string = "URS1 "; + default : decode_SRC1_CTRL_string = "????????????"; + endcase + end + always @(*) begin + case(_zz_decode_SRC1_CTRL) + `Src1CtrlEnum_binary_sequential_RS : _zz_decode_SRC1_CTRL_string = "RS "; + `Src1CtrlEnum_binary_sequential_IMU : _zz_decode_SRC1_CTRL_string = "IMU "; + `Src1CtrlEnum_binary_sequential_PC_INCREMENT : _zz_decode_SRC1_CTRL_string = "PC_INCREMENT"; + `Src1CtrlEnum_binary_sequential_URS1 : _zz_decode_SRC1_CTRL_string = "URS1 "; + default : _zz_decode_SRC1_CTRL_string = "????????????"; + endcase + end + always @(*) begin + case(_zz_decode_to_execute_SRC1_CTRL) + `Src1CtrlEnum_binary_sequential_RS : _zz_decode_to_execute_SRC1_CTRL_string = "RS "; + `Src1CtrlEnum_binary_sequential_IMU : _zz_decode_to_execute_SRC1_CTRL_string = "IMU "; + `Src1CtrlEnum_binary_sequential_PC_INCREMENT : _zz_decode_to_execute_SRC1_CTRL_string = "PC_INCREMENT"; + `Src1CtrlEnum_binary_sequential_URS1 : _zz_decode_to_execute_SRC1_CTRL_string = "URS1 "; + default : _zz_decode_to_execute_SRC1_CTRL_string = "????????????"; + endcase + end + always @(*) begin + case(_zz_decode_to_execute_SRC1_CTRL_1) + `Src1CtrlEnum_binary_sequential_RS : _zz_decode_to_execute_SRC1_CTRL_1_string = "RS "; + `Src1CtrlEnum_binary_sequential_IMU : _zz_decode_to_execute_SRC1_CTRL_1_string = "IMU "; + `Src1CtrlEnum_binary_sequential_PC_INCREMENT : _zz_decode_to_execute_SRC1_CTRL_1_string = "PC_INCREMENT"; + `Src1CtrlEnum_binary_sequential_URS1 : _zz_decode_to_execute_SRC1_CTRL_1_string = "URS1 "; + default : _zz_decode_to_execute_SRC1_CTRL_1_string = "????????????"; + endcase + end + always @(*) begin + case(execute_CfuPlugin_CFU_INPUT_2_KIND) + `Input2Kind_binary_sequential_RS : execute_CfuPlugin_CFU_INPUT_2_KIND_string = "RS "; + `Input2Kind_binary_sequential_IMM_I : execute_CfuPlugin_CFU_INPUT_2_KIND_string = "IMM_I"; + default : execute_CfuPlugin_CFU_INPUT_2_KIND_string = "?????"; + endcase + end + always @(*) begin + case(_zz_execute_CfuPlugin_CFU_INPUT_2_KIND) + `Input2Kind_binary_sequential_RS : _zz_execute_CfuPlugin_CFU_INPUT_2_KIND_string = "RS "; + `Input2Kind_binary_sequential_IMM_I : _zz_execute_CfuPlugin_CFU_INPUT_2_KIND_string = "IMM_I"; + default : _zz_execute_CfuPlugin_CFU_INPUT_2_KIND_string = "?????"; + endcase + end + always @(*) begin + case(memory_ENV_CTRL) + `EnvCtrlEnum_binary_sequential_NONE : memory_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : memory_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_binary_sequential_WFI : memory_ENV_CTRL_string = "WFI "; + `EnvCtrlEnum_binary_sequential_ECALL : memory_ENV_CTRL_string = "ECALL"; + default : memory_ENV_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(_zz_memory_ENV_CTRL) + `EnvCtrlEnum_binary_sequential_NONE : _zz_memory_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : _zz_memory_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_binary_sequential_WFI : _zz_memory_ENV_CTRL_string = "WFI "; + `EnvCtrlEnum_binary_sequential_ECALL : _zz_memory_ENV_CTRL_string = "ECALL"; + default : _zz_memory_ENV_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(execute_ENV_CTRL) + `EnvCtrlEnum_binary_sequential_NONE : execute_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : execute_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_binary_sequential_WFI : execute_ENV_CTRL_string = "WFI "; + `EnvCtrlEnum_binary_sequential_ECALL : execute_ENV_CTRL_string = "ECALL"; + default : execute_ENV_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(_zz_execute_ENV_CTRL) + `EnvCtrlEnum_binary_sequential_NONE : _zz_execute_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : _zz_execute_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_binary_sequential_WFI : _zz_execute_ENV_CTRL_string = "WFI "; + `EnvCtrlEnum_binary_sequential_ECALL : _zz_execute_ENV_CTRL_string = "ECALL"; + default : _zz_execute_ENV_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(writeBack_ENV_CTRL) + `EnvCtrlEnum_binary_sequential_NONE : writeBack_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : writeBack_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_binary_sequential_WFI : writeBack_ENV_CTRL_string = "WFI "; + `EnvCtrlEnum_binary_sequential_ECALL : writeBack_ENV_CTRL_string = "ECALL"; + default : writeBack_ENV_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(_zz_writeBack_ENV_CTRL) + `EnvCtrlEnum_binary_sequential_NONE : _zz_writeBack_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : _zz_writeBack_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_binary_sequential_WFI : _zz_writeBack_ENV_CTRL_string = "WFI "; + `EnvCtrlEnum_binary_sequential_ECALL : _zz_writeBack_ENV_CTRL_string = "ECALL"; + default : _zz_writeBack_ENV_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(execute_BRANCH_CTRL) + `BranchCtrlEnum_binary_sequential_INC : execute_BRANCH_CTRL_string = "INC "; + `BranchCtrlEnum_binary_sequential_B : execute_BRANCH_CTRL_string = "B "; + `BranchCtrlEnum_binary_sequential_JAL : execute_BRANCH_CTRL_string = "JAL "; + `BranchCtrlEnum_binary_sequential_JALR : execute_BRANCH_CTRL_string = "JALR"; + default : execute_BRANCH_CTRL_string = "????"; + endcase + end + always @(*) begin + case(_zz_execute_BRANCH_CTRL) + `BranchCtrlEnum_binary_sequential_INC : _zz_execute_BRANCH_CTRL_string = "INC "; + `BranchCtrlEnum_binary_sequential_B : _zz_execute_BRANCH_CTRL_string = "B "; + `BranchCtrlEnum_binary_sequential_JAL : _zz_execute_BRANCH_CTRL_string = "JAL "; + `BranchCtrlEnum_binary_sequential_JALR : _zz_execute_BRANCH_CTRL_string = "JALR"; + default : _zz_execute_BRANCH_CTRL_string = "????"; + endcase + end + always @(*) begin + case(memory_SHIFT_CTRL) + `ShiftCtrlEnum_binary_sequential_DISABLE_1 : memory_SHIFT_CTRL_string = "DISABLE_1"; + `ShiftCtrlEnum_binary_sequential_SLL_1 : memory_SHIFT_CTRL_string = "SLL_1 "; + `ShiftCtrlEnum_binary_sequential_SRL_1 : memory_SHIFT_CTRL_string = "SRL_1 "; + `ShiftCtrlEnum_binary_sequential_SRA_1 : memory_SHIFT_CTRL_string = "SRA_1 "; + default : memory_SHIFT_CTRL_string = "?????????"; + endcase + end + always @(*) begin + case(_zz_memory_SHIFT_CTRL) + `ShiftCtrlEnum_binary_sequential_DISABLE_1 : _zz_memory_SHIFT_CTRL_string = "DISABLE_1"; + `ShiftCtrlEnum_binary_sequential_SLL_1 : _zz_memory_SHIFT_CTRL_string = "SLL_1 "; + `ShiftCtrlEnum_binary_sequential_SRL_1 : _zz_memory_SHIFT_CTRL_string = "SRL_1 "; + `ShiftCtrlEnum_binary_sequential_SRA_1 : _zz_memory_SHIFT_CTRL_string = "SRA_1 "; + default : _zz_memory_SHIFT_CTRL_string = "?????????"; + endcase + end + always @(*) begin + case(execute_SHIFT_CTRL) + `ShiftCtrlEnum_binary_sequential_DISABLE_1 : execute_SHIFT_CTRL_string = "DISABLE_1"; + `ShiftCtrlEnum_binary_sequential_SLL_1 : execute_SHIFT_CTRL_string = "SLL_1 "; + `ShiftCtrlEnum_binary_sequential_SRL_1 : execute_SHIFT_CTRL_string = "SRL_1 "; + `ShiftCtrlEnum_binary_sequential_SRA_1 : execute_SHIFT_CTRL_string = "SRA_1 "; + default : execute_SHIFT_CTRL_string = "?????????"; + endcase + end + always @(*) begin + case(_zz_execute_SHIFT_CTRL) + `ShiftCtrlEnum_binary_sequential_DISABLE_1 : _zz_execute_SHIFT_CTRL_string = "DISABLE_1"; + `ShiftCtrlEnum_binary_sequential_SLL_1 : _zz_execute_SHIFT_CTRL_string = "SLL_1 "; + `ShiftCtrlEnum_binary_sequential_SRL_1 : _zz_execute_SHIFT_CTRL_string = "SRL_1 "; + `ShiftCtrlEnum_binary_sequential_SRA_1 : _zz_execute_SHIFT_CTRL_string = "SRA_1 "; + default : _zz_execute_SHIFT_CTRL_string = "?????????"; + endcase + end + always @(*) begin + case(execute_SRC2_CTRL) + `Src2CtrlEnum_binary_sequential_RS : execute_SRC2_CTRL_string = "RS "; + `Src2CtrlEnum_binary_sequential_IMI : execute_SRC2_CTRL_string = "IMI"; + `Src2CtrlEnum_binary_sequential_IMS : execute_SRC2_CTRL_string = "IMS"; + `Src2CtrlEnum_binary_sequential_PC : execute_SRC2_CTRL_string = "PC "; + default : execute_SRC2_CTRL_string = "???"; + endcase + end + always @(*) begin + case(_zz_execute_SRC2_CTRL) + `Src2CtrlEnum_binary_sequential_RS : _zz_execute_SRC2_CTRL_string = "RS "; + `Src2CtrlEnum_binary_sequential_IMI : _zz_execute_SRC2_CTRL_string = "IMI"; + `Src2CtrlEnum_binary_sequential_IMS : _zz_execute_SRC2_CTRL_string = "IMS"; + `Src2CtrlEnum_binary_sequential_PC : _zz_execute_SRC2_CTRL_string = "PC "; + default : _zz_execute_SRC2_CTRL_string = "???"; + endcase + end + always @(*) begin + case(execute_SRC1_CTRL) + `Src1CtrlEnum_binary_sequential_RS : execute_SRC1_CTRL_string = "RS "; + `Src1CtrlEnum_binary_sequential_IMU : execute_SRC1_CTRL_string = "IMU "; + `Src1CtrlEnum_binary_sequential_PC_INCREMENT : execute_SRC1_CTRL_string = "PC_INCREMENT"; + `Src1CtrlEnum_binary_sequential_URS1 : execute_SRC1_CTRL_string = "URS1 "; + default : execute_SRC1_CTRL_string = "????????????"; + endcase + end + always @(*) begin + case(_zz_execute_SRC1_CTRL) + `Src1CtrlEnum_binary_sequential_RS : _zz_execute_SRC1_CTRL_string = "RS "; + `Src1CtrlEnum_binary_sequential_IMU : _zz_execute_SRC1_CTRL_string = "IMU "; + `Src1CtrlEnum_binary_sequential_PC_INCREMENT : _zz_execute_SRC1_CTRL_string = "PC_INCREMENT"; + `Src1CtrlEnum_binary_sequential_URS1 : _zz_execute_SRC1_CTRL_string = "URS1 "; + default : _zz_execute_SRC1_CTRL_string = "????????????"; + endcase + end + always @(*) begin + case(execute_ALU_CTRL) + `AluCtrlEnum_binary_sequential_ADD_SUB : execute_ALU_CTRL_string = "ADD_SUB "; + `AluCtrlEnum_binary_sequential_SLT_SLTU : execute_ALU_CTRL_string = "SLT_SLTU"; + `AluCtrlEnum_binary_sequential_BITWISE : execute_ALU_CTRL_string = "BITWISE "; + default : execute_ALU_CTRL_string = "????????"; + endcase + end + always @(*) begin + case(_zz_execute_ALU_CTRL) + `AluCtrlEnum_binary_sequential_ADD_SUB : _zz_execute_ALU_CTRL_string = "ADD_SUB "; + `AluCtrlEnum_binary_sequential_SLT_SLTU : _zz_execute_ALU_CTRL_string = "SLT_SLTU"; + `AluCtrlEnum_binary_sequential_BITWISE : _zz_execute_ALU_CTRL_string = "BITWISE "; + default : _zz_execute_ALU_CTRL_string = "????????"; + endcase + end + always @(*) begin + case(execute_ALU_BITWISE_CTRL) + `AluBitwiseCtrlEnum_binary_sequential_XOR_1 : execute_ALU_BITWISE_CTRL_string = "XOR_1"; + `AluBitwiseCtrlEnum_binary_sequential_OR_1 : execute_ALU_BITWISE_CTRL_string = "OR_1 "; + `AluBitwiseCtrlEnum_binary_sequential_AND_1 : execute_ALU_BITWISE_CTRL_string = "AND_1"; + default : execute_ALU_BITWISE_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(_zz_execute_ALU_BITWISE_CTRL) + `AluBitwiseCtrlEnum_binary_sequential_XOR_1 : _zz_execute_ALU_BITWISE_CTRL_string = "XOR_1"; + `AluBitwiseCtrlEnum_binary_sequential_OR_1 : _zz_execute_ALU_BITWISE_CTRL_string = "OR_1 "; + `AluBitwiseCtrlEnum_binary_sequential_AND_1 : _zz_execute_ALU_BITWISE_CTRL_string = "AND_1"; + default : _zz_execute_ALU_BITWISE_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(_zz_decode_CfuPlugin_CFU_INPUT_2_KIND_1) + `Input2Kind_binary_sequential_RS : _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_1_string = "RS "; + `Input2Kind_binary_sequential_IMM_I : _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_1_string = "IMM_I"; + default : _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_1_string = "?????"; + endcase + end + always @(*) begin + case(_zz_decode_ENV_CTRL_1) + `EnvCtrlEnum_binary_sequential_NONE : _zz_decode_ENV_CTRL_1_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : _zz_decode_ENV_CTRL_1_string = "XRET "; + `EnvCtrlEnum_binary_sequential_WFI : _zz_decode_ENV_CTRL_1_string = "WFI "; + `EnvCtrlEnum_binary_sequential_ECALL : _zz_decode_ENV_CTRL_1_string = "ECALL"; + default : _zz_decode_ENV_CTRL_1_string = "?????"; + endcase + end + always @(*) begin + case(_zz_decode_BRANCH_CTRL) + `BranchCtrlEnum_binary_sequential_INC : _zz_decode_BRANCH_CTRL_string = "INC "; + `BranchCtrlEnum_binary_sequential_B : _zz_decode_BRANCH_CTRL_string = "B "; + `BranchCtrlEnum_binary_sequential_JAL : _zz_decode_BRANCH_CTRL_string = "JAL "; + `BranchCtrlEnum_binary_sequential_JALR : _zz_decode_BRANCH_CTRL_string = "JALR"; + default : _zz_decode_BRANCH_CTRL_string = "????"; + endcase + end + always @(*) begin + case(_zz_decode_SHIFT_CTRL_1) + `ShiftCtrlEnum_binary_sequential_DISABLE_1 : _zz_decode_SHIFT_CTRL_1_string = "DISABLE_1"; + `ShiftCtrlEnum_binary_sequential_SLL_1 : _zz_decode_SHIFT_CTRL_1_string = "SLL_1 "; + `ShiftCtrlEnum_binary_sequential_SRL_1 : _zz_decode_SHIFT_CTRL_1_string = "SRL_1 "; + `ShiftCtrlEnum_binary_sequential_SRA_1 : _zz_decode_SHIFT_CTRL_1_string = "SRA_1 "; + default : _zz_decode_SHIFT_CTRL_1_string = "?????????"; + endcase + end + always @(*) begin + case(_zz_decode_ALU_BITWISE_CTRL_1) + `AluBitwiseCtrlEnum_binary_sequential_XOR_1 : _zz_decode_ALU_BITWISE_CTRL_1_string = "XOR_1"; + `AluBitwiseCtrlEnum_binary_sequential_OR_1 : _zz_decode_ALU_BITWISE_CTRL_1_string = "OR_1 "; + `AluBitwiseCtrlEnum_binary_sequential_AND_1 : _zz_decode_ALU_BITWISE_CTRL_1_string = "AND_1"; + default : _zz_decode_ALU_BITWISE_CTRL_1_string = "?????"; + endcase + end + always @(*) begin + case(_zz_decode_SRC2_CTRL_1) + `Src2CtrlEnum_binary_sequential_RS : _zz_decode_SRC2_CTRL_1_string = "RS "; + `Src2CtrlEnum_binary_sequential_IMI : _zz_decode_SRC2_CTRL_1_string = "IMI"; + `Src2CtrlEnum_binary_sequential_IMS : _zz_decode_SRC2_CTRL_1_string = "IMS"; + `Src2CtrlEnum_binary_sequential_PC : _zz_decode_SRC2_CTRL_1_string = "PC "; + default : _zz_decode_SRC2_CTRL_1_string = "???"; + endcase + end + always @(*) begin + case(_zz_decode_ALU_CTRL_1) + `AluCtrlEnum_binary_sequential_ADD_SUB : _zz_decode_ALU_CTRL_1_string = "ADD_SUB "; + `AluCtrlEnum_binary_sequential_SLT_SLTU : _zz_decode_ALU_CTRL_1_string = "SLT_SLTU"; + `AluCtrlEnum_binary_sequential_BITWISE : _zz_decode_ALU_CTRL_1_string = "BITWISE "; + default : _zz_decode_ALU_CTRL_1_string = "????????"; + endcase + end + always @(*) begin + case(_zz_decode_SRC1_CTRL_1) + `Src1CtrlEnum_binary_sequential_RS : _zz_decode_SRC1_CTRL_1_string = "RS "; + `Src1CtrlEnum_binary_sequential_IMU : _zz_decode_SRC1_CTRL_1_string = "IMU "; + `Src1CtrlEnum_binary_sequential_PC_INCREMENT : _zz_decode_SRC1_CTRL_1_string = "PC_INCREMENT"; + `Src1CtrlEnum_binary_sequential_URS1 : _zz_decode_SRC1_CTRL_1_string = "URS1 "; + default : _zz_decode_SRC1_CTRL_1_string = "????????????"; + endcase + end + always @(*) begin + case(decode_BRANCH_CTRL) + `BranchCtrlEnum_binary_sequential_INC : decode_BRANCH_CTRL_string = "INC "; + `BranchCtrlEnum_binary_sequential_B : decode_BRANCH_CTRL_string = "B "; + `BranchCtrlEnum_binary_sequential_JAL : decode_BRANCH_CTRL_string = "JAL "; + `BranchCtrlEnum_binary_sequential_JALR : decode_BRANCH_CTRL_string = "JALR"; + default : decode_BRANCH_CTRL_string = "????"; + endcase + end + always @(*) begin + case(_zz_decode_BRANCH_CTRL_1) + `BranchCtrlEnum_binary_sequential_INC : _zz_decode_BRANCH_CTRL_1_string = "INC "; + `BranchCtrlEnum_binary_sequential_B : _zz_decode_BRANCH_CTRL_1_string = "B "; + `BranchCtrlEnum_binary_sequential_JAL : _zz_decode_BRANCH_CTRL_1_string = "JAL "; + `BranchCtrlEnum_binary_sequential_JALR : _zz_decode_BRANCH_CTRL_1_string = "JALR"; + default : _zz_decode_BRANCH_CTRL_1_string = "????"; + endcase + end + always @(*) begin + case(_zz_decode_SRC1_CTRL_2) + `Src1CtrlEnum_binary_sequential_RS : _zz_decode_SRC1_CTRL_2_string = "RS "; + `Src1CtrlEnum_binary_sequential_IMU : _zz_decode_SRC1_CTRL_2_string = "IMU "; + `Src1CtrlEnum_binary_sequential_PC_INCREMENT : _zz_decode_SRC1_CTRL_2_string = "PC_INCREMENT"; + `Src1CtrlEnum_binary_sequential_URS1 : _zz_decode_SRC1_CTRL_2_string = "URS1 "; + default : _zz_decode_SRC1_CTRL_2_string = "????????????"; + endcase + end + always @(*) begin + case(_zz_decode_ALU_CTRL_2) + `AluCtrlEnum_binary_sequential_ADD_SUB : _zz_decode_ALU_CTRL_2_string = "ADD_SUB "; + `AluCtrlEnum_binary_sequential_SLT_SLTU : _zz_decode_ALU_CTRL_2_string = "SLT_SLTU"; + `AluCtrlEnum_binary_sequential_BITWISE : _zz_decode_ALU_CTRL_2_string = "BITWISE "; + default : _zz_decode_ALU_CTRL_2_string = "????????"; + endcase + end + always @(*) begin + case(_zz_decode_SRC2_CTRL_2) + `Src2CtrlEnum_binary_sequential_RS : _zz_decode_SRC2_CTRL_2_string = "RS "; + `Src2CtrlEnum_binary_sequential_IMI : _zz_decode_SRC2_CTRL_2_string = "IMI"; + `Src2CtrlEnum_binary_sequential_IMS : _zz_decode_SRC2_CTRL_2_string = "IMS"; + `Src2CtrlEnum_binary_sequential_PC : _zz_decode_SRC2_CTRL_2_string = "PC "; + default : _zz_decode_SRC2_CTRL_2_string = "???"; + endcase + end + always @(*) begin + case(_zz_decode_ALU_BITWISE_CTRL_2) + `AluBitwiseCtrlEnum_binary_sequential_XOR_1 : _zz_decode_ALU_BITWISE_CTRL_2_string = "XOR_1"; + `AluBitwiseCtrlEnum_binary_sequential_OR_1 : _zz_decode_ALU_BITWISE_CTRL_2_string = "OR_1 "; + `AluBitwiseCtrlEnum_binary_sequential_AND_1 : _zz_decode_ALU_BITWISE_CTRL_2_string = "AND_1"; + default : _zz_decode_ALU_BITWISE_CTRL_2_string = "?????"; + endcase + end + always @(*) begin + case(_zz_decode_SHIFT_CTRL_2) + `ShiftCtrlEnum_binary_sequential_DISABLE_1 : _zz_decode_SHIFT_CTRL_2_string = "DISABLE_1"; + `ShiftCtrlEnum_binary_sequential_SLL_1 : _zz_decode_SHIFT_CTRL_2_string = "SLL_1 "; + `ShiftCtrlEnum_binary_sequential_SRL_1 : _zz_decode_SHIFT_CTRL_2_string = "SRL_1 "; + `ShiftCtrlEnum_binary_sequential_SRA_1 : _zz_decode_SHIFT_CTRL_2_string = "SRA_1 "; + default : _zz_decode_SHIFT_CTRL_2_string = "?????????"; + endcase + end + always @(*) begin + case(_zz_decode_BRANCH_CTRL_2) + `BranchCtrlEnum_binary_sequential_INC : _zz_decode_BRANCH_CTRL_2_string = "INC "; + `BranchCtrlEnum_binary_sequential_B : _zz_decode_BRANCH_CTRL_2_string = "B "; + `BranchCtrlEnum_binary_sequential_JAL : _zz_decode_BRANCH_CTRL_2_string = "JAL "; + `BranchCtrlEnum_binary_sequential_JALR : _zz_decode_BRANCH_CTRL_2_string = "JALR"; + default : _zz_decode_BRANCH_CTRL_2_string = "????"; + endcase + end + always @(*) begin + case(_zz_decode_ENV_CTRL_2) + `EnvCtrlEnum_binary_sequential_NONE : _zz_decode_ENV_CTRL_2_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : _zz_decode_ENV_CTRL_2_string = "XRET "; + `EnvCtrlEnum_binary_sequential_WFI : _zz_decode_ENV_CTRL_2_string = "WFI "; + `EnvCtrlEnum_binary_sequential_ECALL : _zz_decode_ENV_CTRL_2_string = "ECALL"; + default : _zz_decode_ENV_CTRL_2_string = "?????"; + endcase + end + always @(*) begin + case(_zz_decode_CfuPlugin_CFU_INPUT_2_KIND_8) + `Input2Kind_binary_sequential_RS : _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_8_string = "RS "; + `Input2Kind_binary_sequential_IMM_I : _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_8_string = "IMM_I"; + default : _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_8_string = "?????"; + endcase + end + always @(*) begin + case(decode_to_execute_SRC1_CTRL) + `Src1CtrlEnum_binary_sequential_RS : decode_to_execute_SRC1_CTRL_string = "RS "; + `Src1CtrlEnum_binary_sequential_IMU : decode_to_execute_SRC1_CTRL_string = "IMU "; + `Src1CtrlEnum_binary_sequential_PC_INCREMENT : decode_to_execute_SRC1_CTRL_string = "PC_INCREMENT"; + `Src1CtrlEnum_binary_sequential_URS1 : decode_to_execute_SRC1_CTRL_string = "URS1 "; + default : decode_to_execute_SRC1_CTRL_string = "????????????"; + endcase + end + always @(*) begin + case(decode_to_execute_ALU_CTRL) + `AluCtrlEnum_binary_sequential_ADD_SUB : decode_to_execute_ALU_CTRL_string = "ADD_SUB "; + `AluCtrlEnum_binary_sequential_SLT_SLTU : decode_to_execute_ALU_CTRL_string = "SLT_SLTU"; + `AluCtrlEnum_binary_sequential_BITWISE : decode_to_execute_ALU_CTRL_string = "BITWISE "; + default : decode_to_execute_ALU_CTRL_string = "????????"; + endcase + end + always @(*) begin + case(decode_to_execute_SRC2_CTRL) + `Src2CtrlEnum_binary_sequential_RS : decode_to_execute_SRC2_CTRL_string = "RS "; + `Src2CtrlEnum_binary_sequential_IMI : decode_to_execute_SRC2_CTRL_string = "IMI"; + `Src2CtrlEnum_binary_sequential_IMS : decode_to_execute_SRC2_CTRL_string = "IMS"; + `Src2CtrlEnum_binary_sequential_PC : decode_to_execute_SRC2_CTRL_string = "PC "; + default : decode_to_execute_SRC2_CTRL_string = "???"; + endcase + end + always @(*) begin + case(decode_to_execute_ALU_BITWISE_CTRL) + `AluBitwiseCtrlEnum_binary_sequential_XOR_1 : decode_to_execute_ALU_BITWISE_CTRL_string = "XOR_1"; + `AluBitwiseCtrlEnum_binary_sequential_OR_1 : decode_to_execute_ALU_BITWISE_CTRL_string = "OR_1 "; + `AluBitwiseCtrlEnum_binary_sequential_AND_1 : decode_to_execute_ALU_BITWISE_CTRL_string = "AND_1"; + default : decode_to_execute_ALU_BITWISE_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(decode_to_execute_SHIFT_CTRL) + `ShiftCtrlEnum_binary_sequential_DISABLE_1 : decode_to_execute_SHIFT_CTRL_string = "DISABLE_1"; + `ShiftCtrlEnum_binary_sequential_SLL_1 : decode_to_execute_SHIFT_CTRL_string = "SLL_1 "; + `ShiftCtrlEnum_binary_sequential_SRL_1 : decode_to_execute_SHIFT_CTRL_string = "SRL_1 "; + `ShiftCtrlEnum_binary_sequential_SRA_1 : decode_to_execute_SHIFT_CTRL_string = "SRA_1 "; + default : decode_to_execute_SHIFT_CTRL_string = "?????????"; + endcase + end + always @(*) begin + case(execute_to_memory_SHIFT_CTRL) + `ShiftCtrlEnum_binary_sequential_DISABLE_1 : execute_to_memory_SHIFT_CTRL_string = "DISABLE_1"; + `ShiftCtrlEnum_binary_sequential_SLL_1 : execute_to_memory_SHIFT_CTRL_string = "SLL_1 "; + `ShiftCtrlEnum_binary_sequential_SRL_1 : execute_to_memory_SHIFT_CTRL_string = "SRL_1 "; + `ShiftCtrlEnum_binary_sequential_SRA_1 : execute_to_memory_SHIFT_CTRL_string = "SRA_1 "; + default : execute_to_memory_SHIFT_CTRL_string = "?????????"; + endcase + end + always @(*) begin + case(decode_to_execute_BRANCH_CTRL) + `BranchCtrlEnum_binary_sequential_INC : decode_to_execute_BRANCH_CTRL_string = "INC "; + `BranchCtrlEnum_binary_sequential_B : decode_to_execute_BRANCH_CTRL_string = "B "; + `BranchCtrlEnum_binary_sequential_JAL : decode_to_execute_BRANCH_CTRL_string = "JAL "; + `BranchCtrlEnum_binary_sequential_JALR : decode_to_execute_BRANCH_CTRL_string = "JALR"; + default : decode_to_execute_BRANCH_CTRL_string = "????"; + endcase + end + always @(*) begin + case(decode_to_execute_ENV_CTRL) + `EnvCtrlEnum_binary_sequential_NONE : decode_to_execute_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : decode_to_execute_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_binary_sequential_WFI : decode_to_execute_ENV_CTRL_string = "WFI "; + `EnvCtrlEnum_binary_sequential_ECALL : decode_to_execute_ENV_CTRL_string = "ECALL"; + default : decode_to_execute_ENV_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(execute_to_memory_ENV_CTRL) + `EnvCtrlEnum_binary_sequential_NONE : execute_to_memory_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : execute_to_memory_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_binary_sequential_WFI : execute_to_memory_ENV_CTRL_string = "WFI "; + `EnvCtrlEnum_binary_sequential_ECALL : execute_to_memory_ENV_CTRL_string = "ECALL"; + default : execute_to_memory_ENV_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(memory_to_writeBack_ENV_CTRL) + `EnvCtrlEnum_binary_sequential_NONE : memory_to_writeBack_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : memory_to_writeBack_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_binary_sequential_WFI : memory_to_writeBack_ENV_CTRL_string = "WFI "; + `EnvCtrlEnum_binary_sequential_ECALL : memory_to_writeBack_ENV_CTRL_string = "ECALL"; + default : memory_to_writeBack_ENV_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND) + `Input2Kind_binary_sequential_RS : decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND_string = "RS "; + `Input2Kind_binary_sequential_IMM_I : decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND_string = "IMM_I"; + default : decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND_string = "?????"; + endcase + end + `endif + + assign memory_MUL_LOW = ($signed(_zz_memory_MUL_LOW) + $signed(_zz_memory_MUL_LOW_7)); + assign writeBack_CfuPlugin_CFU_IN_FLIGHT = memory_to_writeBack_CfuPlugin_CFU_IN_FLIGHT; + assign execute_CfuPlugin_CFU_IN_FLIGHT = ((execute_CfuPlugin_schedule || execute_CfuPlugin_hold) || execute_CfuPlugin_fired); + assign memory_MUL_HH = execute_to_memory_MUL_HH; + assign execute_MUL_HH = ($signed(execute_MulPlugin_aHigh) * $signed(execute_MulPlugin_bHigh)); + assign execute_MUL_HL = ($signed(execute_MulPlugin_aHigh) * $signed(execute_MulPlugin_bSLow)); + assign execute_MUL_LH = ($signed(execute_MulPlugin_aSLow) * $signed(execute_MulPlugin_bHigh)); + assign execute_MUL_LL = (execute_MulPlugin_aULow * execute_MulPlugin_bULow); + assign execute_SHIFT_RIGHT = _zz_execute_SHIFT_RIGHT; + assign execute_REGFILE_WRITE_DATA = _zz_execute_REGFILE_WRITE_DATA; + assign memory_MEMORY_STORE_DATA_RF = execute_to_memory_MEMORY_STORE_DATA_RF; + assign execute_MEMORY_STORE_DATA_RF = _zz_execute_MEMORY_STORE_DATA_RF; + assign decode_DO_EBREAK = (((! DebugPlugin_haltIt) && (decode_IS_EBREAK || 1'b0)) && DebugPlugin_allowEBreak); + assign decode_CSR_READ_OPCODE = (decode_INSTRUCTION[13 : 7] != 7'h20); + assign decode_CSR_WRITE_OPCODE = (! (((decode_INSTRUCTION[14 : 13] == 2'b01) && (decode_INSTRUCTION[19 : 15] == 5'h0)) || ((decode_INSTRUCTION[14 : 13] == 2'b11) && (decode_INSTRUCTION[19 : 15] == 5'h0)))); + assign decode_PREDICTION_HAD_BRANCHED2 = IBusCachedPlugin_decodePrediction_cmd_hadBranch; + assign decode_SRC2_FORCE_ZERO = (decode_SRC_ADD_ZERO && (! decode_SRC_USE_SUB_LESS)); + assign decode_CfuPlugin_CFU_INPUT_2_KIND = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND; + assign _zz_decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND = _zz_decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND_1; + assign decode_CfuPlugin_CFU_ENABLE = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[33]; + assign decode_IS_RS2_SIGNED = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[31]; + assign decode_IS_RS1_SIGNED = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[30]; + assign decode_IS_DIV = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[29]; + assign memory_IS_MUL = execute_to_memory_IS_MUL; + assign execute_IS_MUL = decode_to_execute_IS_MUL; + assign decode_IS_MUL = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[28]; + assign _zz_memory_to_writeBack_ENV_CTRL = _zz_memory_to_writeBack_ENV_CTRL_1; + assign _zz_execute_to_memory_ENV_CTRL = _zz_execute_to_memory_ENV_CTRL_1; + assign decode_ENV_CTRL = _zz_decode_ENV_CTRL; + assign _zz_decode_to_execute_ENV_CTRL = _zz_decode_to_execute_ENV_CTRL_1; + assign decode_IS_CSR = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[25]; + assign _zz_decode_to_execute_BRANCH_CTRL = _zz_decode_to_execute_BRANCH_CTRL_1; + assign _zz_execute_to_memory_SHIFT_CTRL = _zz_execute_to_memory_SHIFT_CTRL_1; + assign decode_SHIFT_CTRL = _zz_decode_SHIFT_CTRL; + assign _zz_decode_to_execute_SHIFT_CTRL = _zz_decode_to_execute_SHIFT_CTRL_1; + assign decode_ALU_BITWISE_CTRL = _zz_decode_ALU_BITWISE_CTRL; + assign _zz_decode_to_execute_ALU_BITWISE_CTRL = _zz_decode_to_execute_ALU_BITWISE_CTRL_1; + assign decode_SRC_LESS_UNSIGNED = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[17]; + assign decode_MEMORY_MANAGMENT = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[16]; + assign memory_MEMORY_WR = execute_to_memory_MEMORY_WR; + assign decode_MEMORY_WR = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[13]; + assign execute_BYPASSABLE_MEMORY_STAGE = decode_to_execute_BYPASSABLE_MEMORY_STAGE; + assign decode_BYPASSABLE_MEMORY_STAGE = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[12]; + assign decode_BYPASSABLE_EXECUTE_STAGE = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[11]; + assign decode_SRC2_CTRL = _zz_decode_SRC2_CTRL; + assign _zz_decode_to_execute_SRC2_CTRL = _zz_decode_to_execute_SRC2_CTRL_1; + assign decode_ALU_CTRL = _zz_decode_ALU_CTRL; + assign _zz_decode_to_execute_ALU_CTRL = _zz_decode_to_execute_ALU_CTRL_1; + assign decode_SRC1_CTRL = _zz_decode_SRC1_CTRL; + assign _zz_decode_to_execute_SRC1_CTRL = _zz_decode_to_execute_SRC1_CTRL_1; + assign decode_MEMORY_FORCE_CONSTISTENCY = 1'b0; + assign writeBack_FORMAL_PC_NEXT = memory_to_writeBack_FORMAL_PC_NEXT; + assign memory_FORMAL_PC_NEXT = execute_to_memory_FORMAL_PC_NEXT; + assign execute_FORMAL_PC_NEXT = decode_to_execute_FORMAL_PC_NEXT; + assign decode_FORMAL_PC_NEXT = (decode_PC + 32'h00000004); + assign memory_PC = execute_to_memory_PC; + always @(*) begin + _zz_memory_to_writeBack_CfuPlugin_CFU_IN_FLIGHT = memory_CfuPlugin_CFU_IN_FLIGHT; + if(memory_arbitration_isStuck) begin + _zz_memory_to_writeBack_CfuPlugin_CFU_IN_FLIGHT = 1'b0; + end + end + + always @(*) begin + _zz_execute_to_memory_CfuPlugin_CFU_IN_FLIGHT = execute_CfuPlugin_CFU_IN_FLIGHT; + if(execute_arbitration_isStuck) begin + _zz_execute_to_memory_CfuPlugin_CFU_IN_FLIGHT = 1'b0; + end + end + + assign memory_CfuPlugin_CFU_IN_FLIGHT = execute_to_memory_CfuPlugin_CFU_IN_FLIGHT; + assign execute_CfuPlugin_CFU_INPUT_2_KIND = _zz_execute_CfuPlugin_CFU_INPUT_2_KIND; + assign execute_CfuPlugin_CFU_ENABLE = decode_to_execute_CfuPlugin_CFU_ENABLE; + assign execute_DO_EBREAK = decode_to_execute_DO_EBREAK; + assign decode_IS_EBREAK = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[32]; + assign execute_IS_RS1_SIGNED = decode_to_execute_IS_RS1_SIGNED; + assign execute_IS_DIV = decode_to_execute_IS_DIV; + assign execute_IS_RS2_SIGNED = decode_to_execute_IS_RS2_SIGNED; + assign memory_IS_DIV = execute_to_memory_IS_DIV; + assign writeBack_IS_MUL = memory_to_writeBack_IS_MUL; + assign writeBack_MUL_HH = memory_to_writeBack_MUL_HH; + assign writeBack_MUL_LOW = memory_to_writeBack_MUL_LOW; + assign memory_MUL_HL = execute_to_memory_MUL_HL; + assign memory_MUL_LH = execute_to_memory_MUL_LH; + assign memory_MUL_LL = execute_to_memory_MUL_LL; + assign execute_CSR_READ_OPCODE = decode_to_execute_CSR_READ_OPCODE; + assign execute_CSR_WRITE_OPCODE = decode_to_execute_CSR_WRITE_OPCODE; + assign execute_IS_CSR = decode_to_execute_IS_CSR; + assign memory_ENV_CTRL = _zz_memory_ENV_CTRL; + assign execute_ENV_CTRL = _zz_execute_ENV_CTRL; + assign writeBack_ENV_CTRL = _zz_writeBack_ENV_CTRL; + assign execute_BRANCH_CALC = {execute_BranchPlugin_branchAdder[31 : 1],1'b0}; + assign execute_BRANCH_DO = ((execute_PREDICTION_HAD_BRANCHED2 != execute_BRANCH_COND_RESULT) || execute_BranchPlugin_missAlignedTarget); + assign execute_PC = decode_to_execute_PC; + assign execute_PREDICTION_HAD_BRANCHED2 = decode_to_execute_PREDICTION_HAD_BRANCHED2; + assign execute_RS1 = decode_to_execute_RS1; + assign execute_BRANCH_COND_RESULT = _zz_execute_BRANCH_COND_RESULT_1; + assign execute_BRANCH_CTRL = _zz_execute_BRANCH_CTRL; + assign decode_RS2_USE = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[15]; + assign decode_RS1_USE = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[5]; + always @(*) begin + _zz_decode_RS2 = execute_REGFILE_WRITE_DATA; + if(when_CsrPlugin_l1176) begin + _zz_decode_RS2 = CsrPlugin_csrMapping_readDataSignal; + end + end + + assign execute_REGFILE_WRITE_VALID = decode_to_execute_REGFILE_WRITE_VALID; + assign execute_BYPASSABLE_EXECUTE_STAGE = decode_to_execute_BYPASSABLE_EXECUTE_STAGE; + assign memory_REGFILE_WRITE_VALID = execute_to_memory_REGFILE_WRITE_VALID; + assign memory_INSTRUCTION = execute_to_memory_INSTRUCTION; + assign memory_BYPASSABLE_MEMORY_STAGE = execute_to_memory_BYPASSABLE_MEMORY_STAGE; + assign writeBack_REGFILE_WRITE_VALID = memory_to_writeBack_REGFILE_WRITE_VALID; + always @(*) begin + decode_RS2 = decode_RegFilePlugin_rs2Data; + if(HazardSimplePlugin_writeBackBuffer_valid) begin + if(HazardSimplePlugin_addr1Match) begin + decode_RS2 = HazardSimplePlugin_writeBackBuffer_payload_data; + end + end + if(when_HazardSimplePlugin_l45) begin + if(when_HazardSimplePlugin_l47) begin + if(when_HazardSimplePlugin_l51) begin + decode_RS2 = _zz_decode_RS2_2; + end + end + end + if(when_HazardSimplePlugin_l45_1) begin + if(memory_BYPASSABLE_MEMORY_STAGE) begin + if(when_HazardSimplePlugin_l51_1) begin + decode_RS2 = _zz_decode_RS2_1; + end + end + end + if(when_HazardSimplePlugin_l45_2) begin + if(execute_BYPASSABLE_EXECUTE_STAGE) begin + if(when_HazardSimplePlugin_l51_2) begin + decode_RS2 = _zz_decode_RS2; + end + end + end + end + + always @(*) begin + decode_RS1 = decode_RegFilePlugin_rs1Data; + if(HazardSimplePlugin_writeBackBuffer_valid) begin + if(HazardSimplePlugin_addr0Match) begin + decode_RS1 = HazardSimplePlugin_writeBackBuffer_payload_data; + end + end + if(when_HazardSimplePlugin_l45) begin + if(when_HazardSimplePlugin_l47) begin + if(when_HazardSimplePlugin_l48) begin + decode_RS1 = _zz_decode_RS2_2; + end + end + end + if(when_HazardSimplePlugin_l45_1) begin + if(memory_BYPASSABLE_MEMORY_STAGE) begin + if(when_HazardSimplePlugin_l48_1) begin + decode_RS1 = _zz_decode_RS2_1; + end + end + end + if(when_HazardSimplePlugin_l45_2) begin + if(execute_BYPASSABLE_EXECUTE_STAGE) begin + if(when_HazardSimplePlugin_l48_2) begin + decode_RS1 = _zz_decode_RS2; + end + end + end + end + + assign memory_SHIFT_RIGHT = execute_to_memory_SHIFT_RIGHT; + always @(*) begin + _zz_decode_RS2_1 = memory_REGFILE_WRITE_DATA; + if(memory_arbitration_isValid) begin + case(memory_SHIFT_CTRL) + `ShiftCtrlEnum_binary_sequential_SLL_1 : begin + _zz_decode_RS2_1 = _zz_decode_RS2_3; + end + `ShiftCtrlEnum_binary_sequential_SRL_1, `ShiftCtrlEnum_binary_sequential_SRA_1 : begin + _zz_decode_RS2_1 = memory_SHIFT_RIGHT; + end + default : begin + end + endcase + end + if(when_MulDivIterativePlugin_l128) begin + _zz_decode_RS2_1 = memory_DivPlugin_div_result; + end + if(memory_CfuPlugin_CFU_IN_FLIGHT) begin + _zz_decode_RS2_1 = CfuPlugin_bus_rsp_rsp_payload_outputs_0; + end + end + + assign memory_SHIFT_CTRL = _zz_memory_SHIFT_CTRL; + assign execute_SHIFT_CTRL = _zz_execute_SHIFT_CTRL; + assign execute_SRC_LESS_UNSIGNED = decode_to_execute_SRC_LESS_UNSIGNED; + assign execute_SRC2_FORCE_ZERO = decode_to_execute_SRC2_FORCE_ZERO; + assign execute_SRC_USE_SUB_LESS = decode_to_execute_SRC_USE_SUB_LESS; + assign _zz_execute_SRC2 = execute_PC; + assign execute_SRC2_CTRL = _zz_execute_SRC2_CTRL; + assign execute_SRC1_CTRL = _zz_execute_SRC1_CTRL; + assign decode_SRC_USE_SUB_LESS = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[3]; + assign decode_SRC_ADD_ZERO = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[20]; + assign execute_SRC_ADD_SUB = execute_SrcPlugin_addSub; + assign execute_SRC_LESS = execute_SrcPlugin_less; + assign execute_ALU_CTRL = _zz_execute_ALU_CTRL; + assign execute_SRC2 = _zz_execute_SRC2_5; + assign execute_SRC1 = _zz_execute_SRC1; + assign execute_ALU_BITWISE_CTRL = _zz_execute_ALU_BITWISE_CTRL; + assign _zz_lastStageRegFileWrite_payload_address = writeBack_INSTRUCTION; + assign _zz_lastStageRegFileWrite_valid = writeBack_REGFILE_WRITE_VALID; + always @(*) begin + _zz_1 = 1'b0; + if(lastStageRegFileWrite_valid) begin + _zz_1 = 1'b1; + end + end + + assign decode_INSTRUCTION_ANTICIPATED = (decode_arbitration_isStuck ? decode_INSTRUCTION : IBusCachedPlugin_cache_io_cpu_fetch_data); + always @(*) begin + decode_REGFILE_WRITE_VALID = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[10]; + if(when_RegFilePlugin_l63) begin + decode_REGFILE_WRITE_VALID = 1'b0; + end + end + + assign decode_LEGAL_INSTRUCTION = ({((decode_INSTRUCTION & 32'h0000005f) == 32'h00000017),{((decode_INSTRUCTION & 32'h0000007f) == 32'h0000006f),{((decode_INSTRUCTION & 32'h0000007f) == 32'h0000000b),{((decode_INSTRUCTION & _zz_decode_LEGAL_INSTRUCTION) == 32'h00000003),{(_zz_decode_LEGAL_INSTRUCTION_1 == _zz_decode_LEGAL_INSTRUCTION_2),{_zz_decode_LEGAL_INSTRUCTION_3,{_zz_decode_LEGAL_INSTRUCTION_4,_zz_decode_LEGAL_INSTRUCTION_5}}}}}}} != 22'h0); + always @(*) begin + _zz_decode_RS2_2 = writeBack_REGFILE_WRITE_DATA; + if(when_DBusCachedPlugin_l484) begin + _zz_decode_RS2_2 = writeBack_DBusCachedPlugin_rspFormated; + end + if(when_MulPlugin_l147) begin + case(switch_MulPlugin_l148) + 2'b00 : begin + _zz_decode_RS2_2 = _zz__zz_decode_RS2_2; + end + default : begin + _zz_decode_RS2_2 = _zz__zz_decode_RS2_2_1; + end + endcase + end + end + + assign writeBack_MEMORY_WR = memory_to_writeBack_MEMORY_WR; + assign writeBack_MEMORY_STORE_DATA_RF = memory_to_writeBack_MEMORY_STORE_DATA_RF; + assign writeBack_REGFILE_WRITE_DATA = memory_to_writeBack_REGFILE_WRITE_DATA; + assign writeBack_MEMORY_ENABLE = memory_to_writeBack_MEMORY_ENABLE; + assign memory_REGFILE_WRITE_DATA = execute_to_memory_REGFILE_WRITE_DATA; + assign memory_MEMORY_ENABLE = execute_to_memory_MEMORY_ENABLE; + assign execute_MEMORY_FORCE_CONSTISTENCY = decode_to_execute_MEMORY_FORCE_CONSTISTENCY; + assign execute_MEMORY_MANAGMENT = decode_to_execute_MEMORY_MANAGMENT; + assign execute_RS2 = decode_to_execute_RS2; + assign execute_MEMORY_WR = decode_to_execute_MEMORY_WR; + assign execute_SRC_ADD = execute_SrcPlugin_addSub; + assign execute_MEMORY_ENABLE = decode_to_execute_MEMORY_ENABLE; + assign execute_INSTRUCTION = decode_to_execute_INSTRUCTION; + assign decode_MEMORY_ENABLE = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[4]; + assign decode_FLUSH_ALL = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[0]; + always @(*) begin + IBusCachedPlugin_rsp_issueDetected_4 = IBusCachedPlugin_rsp_issueDetected_3; + if(when_IBusCachedPlugin_l256) begin + IBusCachedPlugin_rsp_issueDetected_4 = 1'b1; + end + end + + always @(*) begin + IBusCachedPlugin_rsp_issueDetected_3 = IBusCachedPlugin_rsp_issueDetected_2; + if(when_IBusCachedPlugin_l250) begin + IBusCachedPlugin_rsp_issueDetected_3 = 1'b1; + end + end + + always @(*) begin + IBusCachedPlugin_rsp_issueDetected_2 = IBusCachedPlugin_rsp_issueDetected_1; + if(when_IBusCachedPlugin_l244) begin + IBusCachedPlugin_rsp_issueDetected_2 = 1'b1; + end + end + + always @(*) begin + IBusCachedPlugin_rsp_issueDetected_1 = IBusCachedPlugin_rsp_issueDetected; + if(when_IBusCachedPlugin_l239) begin + IBusCachedPlugin_rsp_issueDetected_1 = 1'b1; + end + end + + assign decode_BRANCH_CTRL = _zz_decode_BRANCH_CTRL_1; + assign decode_INSTRUCTION = IBusCachedPlugin_iBusRsp_output_payload_rsp_inst; + always @(*) begin + _zz_execute_to_memory_FORMAL_PC_NEXT = execute_FORMAL_PC_NEXT; + if(BranchPlugin_jumpInterface_valid) begin + _zz_execute_to_memory_FORMAL_PC_NEXT = BranchPlugin_jumpInterface_payload; + end + end + + always @(*) begin + _zz_decode_to_execute_FORMAL_PC_NEXT = decode_FORMAL_PC_NEXT; + if(IBusCachedPlugin_predictionJumpInterface_valid) begin + _zz_decode_to_execute_FORMAL_PC_NEXT = IBusCachedPlugin_predictionJumpInterface_payload; + end + end + + assign decode_PC = IBusCachedPlugin_iBusRsp_output_payload_pc; + assign writeBack_PC = memory_to_writeBack_PC; + assign writeBack_INSTRUCTION = memory_to_writeBack_INSTRUCTION; + always @(*) begin + decode_arbitration_haltItself = 1'b0; + if(when_DBusCachedPlugin_l303) begin + decode_arbitration_haltItself = 1'b1; + end + case(switch_Fetcher_l362) + 3'b010 : begin + decode_arbitration_haltItself = 1'b1; + end + default : begin + end + endcase + end + + always @(*) begin + decode_arbitration_haltByOther = 1'b0; + if(when_HazardSimplePlugin_l113) begin + decode_arbitration_haltByOther = 1'b1; + end + if(CsrPlugin_pipelineLiberator_active) begin + decode_arbitration_haltByOther = 1'b1; + end + if(when_CsrPlugin_l1116) begin + decode_arbitration_haltByOther = 1'b1; + end + end + + always @(*) begin + decode_arbitration_removeIt = 1'b0; + if(_zz_when) begin + decode_arbitration_removeIt = 1'b1; + end + if(decode_arbitration_isFlushed) begin + decode_arbitration_removeIt = 1'b1; + end + end + + assign decode_arbitration_flushIt = 1'b0; + always @(*) begin + decode_arbitration_flushNext = 1'b0; + if(IBusCachedPlugin_predictionJumpInterface_valid) begin + decode_arbitration_flushNext = 1'b1; + end + if(_zz_when) begin + decode_arbitration_flushNext = 1'b1; + end + end + + always @(*) begin + execute_arbitration_haltItself = 1'b0; + if(when_DBusCachedPlugin_l343) begin + execute_arbitration_haltItself = 1'b1; + end + if(when_CsrPlugin_l1108) begin + if(when_CsrPlugin_l1110) begin + execute_arbitration_haltItself = 1'b1; + end + end + if(when_CsrPlugin_l1180) begin + if(execute_CsrPlugin_blockedBySideEffects) begin + execute_arbitration_haltItself = 1'b1; + end + end + if(when_CfuPlugin_l175) begin + execute_arbitration_haltItself = 1'b1; + end + end + + always @(*) begin + execute_arbitration_haltByOther = 1'b0; + if(when_DBusCachedPlugin_l359) begin + execute_arbitration_haltByOther = 1'b1; + end + if(when_DebugPlugin_l284) begin + execute_arbitration_haltByOther = 1'b1; + end + end + + always @(*) begin + execute_arbitration_removeIt = 1'b0; + if(_zz_when_1) begin + execute_arbitration_removeIt = 1'b1; + end + if(execute_arbitration_isFlushed) begin + execute_arbitration_removeIt = 1'b1; + end + end + + always @(*) begin + execute_arbitration_flushIt = 1'b0; + if(when_DebugPlugin_l284) begin + if(when_DebugPlugin_l287) begin + execute_arbitration_flushIt = 1'b1; + end + end + end + + always @(*) begin + execute_arbitration_flushNext = 1'b0; + if(BranchPlugin_jumpInterface_valid) begin + execute_arbitration_flushNext = 1'b1; + end + if(_zz_when_1) begin + execute_arbitration_flushNext = 1'b1; + end + if(when_DebugPlugin_l284) begin + if(when_DebugPlugin_l287) begin + execute_arbitration_flushNext = 1'b1; + end + end + end + + always @(*) begin + memory_arbitration_haltItself = 1'b0; + if(when_MulDivIterativePlugin_l128) begin + if(when_MulDivIterativePlugin_l129) begin + memory_arbitration_haltItself = 1'b1; + end + end + if(memory_CfuPlugin_CFU_IN_FLIGHT) begin + if(when_CfuPlugin_l208) begin + memory_arbitration_haltItself = 1'b1; + end + end + end + + assign memory_arbitration_haltByOther = 1'b0; + always @(*) begin + memory_arbitration_removeIt = 1'b0; + if(memory_arbitration_isFlushed) begin + memory_arbitration_removeIt = 1'b1; + end + end + + assign memory_arbitration_flushIt = 1'b0; + assign memory_arbitration_flushNext = 1'b0; + always @(*) begin + writeBack_arbitration_haltItself = 1'b0; + if(when_DBusCachedPlugin_l458) begin + writeBack_arbitration_haltItself = 1'b1; + end + end + + assign writeBack_arbitration_haltByOther = 1'b0; + always @(*) begin + writeBack_arbitration_removeIt = 1'b0; + if(DBusCachedPlugin_exceptionBus_valid) begin + writeBack_arbitration_removeIt = 1'b1; + end + if(writeBack_arbitration_isFlushed) begin + writeBack_arbitration_removeIt = 1'b1; + end + end + + always @(*) begin + writeBack_arbitration_flushIt = 1'b0; + if(DBusCachedPlugin_redoBranch_valid) begin + writeBack_arbitration_flushIt = 1'b1; + end + end + + always @(*) begin + writeBack_arbitration_flushNext = 1'b0; + if(DBusCachedPlugin_redoBranch_valid) begin + writeBack_arbitration_flushNext = 1'b1; + end + if(DBusCachedPlugin_exceptionBus_valid) begin + writeBack_arbitration_flushNext = 1'b1; + end + if(when_CsrPlugin_l1019) begin + writeBack_arbitration_flushNext = 1'b1; + end + if(when_CsrPlugin_l1064) begin + writeBack_arbitration_flushNext = 1'b1; + end + end + + assign lastStageInstruction = writeBack_INSTRUCTION; + assign lastStagePc = writeBack_PC; + assign lastStageIsValid = writeBack_arbitration_isValid; + assign lastStageIsFiring = writeBack_arbitration_isFiring; + always @(*) begin + IBusCachedPlugin_fetcherHalt = 1'b0; + if(when_CsrPlugin_l922) begin + IBusCachedPlugin_fetcherHalt = 1'b1; + end + if(when_CsrPlugin_l1019) begin + IBusCachedPlugin_fetcherHalt = 1'b1; + end + if(when_CsrPlugin_l1064) begin + IBusCachedPlugin_fetcherHalt = 1'b1; + end + if(when_DebugPlugin_l284) begin + if(when_DebugPlugin_l287) begin + IBusCachedPlugin_fetcherHalt = 1'b1; + end + end + if(DebugPlugin_haltIt) begin + IBusCachedPlugin_fetcherHalt = 1'b1; + end + if(when_DebugPlugin_l300) begin + IBusCachedPlugin_fetcherHalt = 1'b1; + end + end + + always @(*) begin + IBusCachedPlugin_incomingInstruction = 1'b0; + if(when_Fetcher_l240) begin + IBusCachedPlugin_incomingInstruction = 1'b1; + end + end + + always @(*) begin + _zz_when_DBusCachedPlugin_l386 = 1'b0; + if(DebugPlugin_godmode) begin + _zz_when_DBusCachedPlugin_l386 = 1'b1; + end + end + + assign CsrPlugin_csrMapping_allowCsrSignal = 1'b0; + assign CsrPlugin_csrMapping_readDataSignal = CsrPlugin_csrMapping_readDataInit; + always @(*) begin + CsrPlugin_inWfi = 1'b0; + if(when_CsrPlugin_l1108) begin + CsrPlugin_inWfi = 1'b1; + end + end + + always @(*) begin + CsrPlugin_thirdPartyWake = 1'b0; + if(DebugPlugin_haltIt) begin + CsrPlugin_thirdPartyWake = 1'b1; + end + end + + always @(*) begin + CsrPlugin_jumpInterface_valid = 1'b0; + if(when_CsrPlugin_l1019) begin + CsrPlugin_jumpInterface_valid = 1'b1; + end + if(when_CsrPlugin_l1064) begin + CsrPlugin_jumpInterface_valid = 1'b1; + end + end + + always @(*) begin + CsrPlugin_jumpInterface_payload = 32'bxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx; + if(when_CsrPlugin_l1019) begin + CsrPlugin_jumpInterface_payload = {CsrPlugin_xtvec_base,2'b00}; + end + if(when_CsrPlugin_l1064) begin + case(switch_CsrPlugin_l1068) + 2'b11 : begin + CsrPlugin_jumpInterface_payload = CsrPlugin_mepc; + end + default : begin + end + endcase + end + end + + always @(*) begin + CsrPlugin_forceMachineWire = 1'b0; + if(DebugPlugin_godmode) begin + CsrPlugin_forceMachineWire = 1'b1; + end + end + + always @(*) begin + CsrPlugin_allowInterrupts = 1'b1; + if(when_DebugPlugin_l316) begin + CsrPlugin_allowInterrupts = 1'b0; + end + end + + always @(*) begin + CsrPlugin_allowException = 1'b1; + if(DebugPlugin_godmode) begin + CsrPlugin_allowException = 1'b0; + end + end + + always @(*) begin + CsrPlugin_allowEbreakException = 1'b1; + if(DebugPlugin_allowEBreak) begin + CsrPlugin_allowEbreakException = 1'b0; + end + end + + assign IBusCachedPlugin_externalFlush = ({writeBack_arbitration_flushNext,{memory_arbitration_flushNext,{execute_arbitration_flushNext,decode_arbitration_flushNext}}} != 4'b0000); + assign IBusCachedPlugin_jump_pcLoad_valid = ({CsrPlugin_jumpInterface_valid,{BranchPlugin_jumpInterface_valid,{DBusCachedPlugin_redoBranch_valid,IBusCachedPlugin_predictionJumpInterface_valid}}} != 4'b0000); + assign _zz_IBusCachedPlugin_jump_pcLoad_payload = {IBusCachedPlugin_predictionJumpInterface_valid,{BranchPlugin_jumpInterface_valid,{CsrPlugin_jumpInterface_valid,DBusCachedPlugin_redoBranch_valid}}}; + assign _zz_IBusCachedPlugin_jump_pcLoad_payload_1 = (_zz_IBusCachedPlugin_jump_pcLoad_payload & (~ _zz__zz_IBusCachedPlugin_jump_pcLoad_payload_1)); + assign _zz_IBusCachedPlugin_jump_pcLoad_payload_2 = _zz_IBusCachedPlugin_jump_pcLoad_payload_1[3]; + assign _zz_IBusCachedPlugin_jump_pcLoad_payload_3 = (_zz_IBusCachedPlugin_jump_pcLoad_payload_1[1] || _zz_IBusCachedPlugin_jump_pcLoad_payload_2); + assign _zz_IBusCachedPlugin_jump_pcLoad_payload_4 = (_zz_IBusCachedPlugin_jump_pcLoad_payload_1[2] || _zz_IBusCachedPlugin_jump_pcLoad_payload_2); + assign IBusCachedPlugin_jump_pcLoad_payload = _zz_IBusCachedPlugin_jump_pcLoad_payload_5; + always @(*) begin + IBusCachedPlugin_fetchPc_correction = 1'b0; + if(IBusCachedPlugin_fetchPc_redo_valid) begin + IBusCachedPlugin_fetchPc_correction = 1'b1; + end + if(IBusCachedPlugin_jump_pcLoad_valid) begin + IBusCachedPlugin_fetchPc_correction = 1'b1; + end + end + + assign IBusCachedPlugin_fetchPc_output_fire = (IBusCachedPlugin_fetchPc_output_valid && IBusCachedPlugin_fetchPc_output_ready); + assign IBusCachedPlugin_fetchPc_corrected = (IBusCachedPlugin_fetchPc_correction || IBusCachedPlugin_fetchPc_correctionReg); + always @(*) begin + IBusCachedPlugin_fetchPc_pcRegPropagate = 1'b0; + if(IBusCachedPlugin_iBusRsp_stages_1_input_ready) begin + IBusCachedPlugin_fetchPc_pcRegPropagate = 1'b1; + end + end + + assign when_Fetcher_l131 = (IBusCachedPlugin_fetchPc_correction || IBusCachedPlugin_fetchPc_pcRegPropagate); + assign IBusCachedPlugin_fetchPc_output_fire_1 = (IBusCachedPlugin_fetchPc_output_valid && IBusCachedPlugin_fetchPc_output_ready); + assign when_Fetcher_l131_1 = ((! IBusCachedPlugin_fetchPc_output_valid) && IBusCachedPlugin_fetchPc_output_ready); + always @(*) begin + IBusCachedPlugin_fetchPc_pc = (IBusCachedPlugin_fetchPc_pcReg + _zz_IBusCachedPlugin_fetchPc_pc); + if(IBusCachedPlugin_fetchPc_redo_valid) begin + IBusCachedPlugin_fetchPc_pc = IBusCachedPlugin_fetchPc_redo_payload; + end + if(IBusCachedPlugin_jump_pcLoad_valid) begin + IBusCachedPlugin_fetchPc_pc = IBusCachedPlugin_jump_pcLoad_payload; + end + IBusCachedPlugin_fetchPc_pc[0] = 1'b0; + IBusCachedPlugin_fetchPc_pc[1] = 1'b0; + end + + always @(*) begin + IBusCachedPlugin_fetchPc_flushed = 1'b0; + if(IBusCachedPlugin_fetchPc_redo_valid) begin + IBusCachedPlugin_fetchPc_flushed = 1'b1; + end + if(IBusCachedPlugin_jump_pcLoad_valid) begin + IBusCachedPlugin_fetchPc_flushed = 1'b1; + end + end + + assign when_Fetcher_l158 = (IBusCachedPlugin_fetchPc_booted && ((IBusCachedPlugin_fetchPc_output_ready || IBusCachedPlugin_fetchPc_correction) || IBusCachedPlugin_fetchPc_pcRegPropagate)); + assign IBusCachedPlugin_fetchPc_output_valid = ((! IBusCachedPlugin_fetcherHalt) && IBusCachedPlugin_fetchPc_booted); + assign IBusCachedPlugin_fetchPc_output_payload = IBusCachedPlugin_fetchPc_pc; + always @(*) begin + IBusCachedPlugin_iBusRsp_redoFetch = 1'b0; + if(IBusCachedPlugin_rsp_redoFetch) begin + IBusCachedPlugin_iBusRsp_redoFetch = 1'b1; + end + end + + assign IBusCachedPlugin_iBusRsp_stages_0_input_valid = IBusCachedPlugin_fetchPc_output_valid; + assign IBusCachedPlugin_fetchPc_output_ready = IBusCachedPlugin_iBusRsp_stages_0_input_ready; + assign IBusCachedPlugin_iBusRsp_stages_0_input_payload = IBusCachedPlugin_fetchPc_output_payload; + always @(*) begin + IBusCachedPlugin_iBusRsp_stages_0_halt = 1'b0; + if(IBusCachedPlugin_cache_io_cpu_prefetch_haltIt) begin + IBusCachedPlugin_iBusRsp_stages_0_halt = 1'b1; + end + end + + assign _zz_IBusCachedPlugin_iBusRsp_stages_0_input_ready = (! IBusCachedPlugin_iBusRsp_stages_0_halt); + assign IBusCachedPlugin_iBusRsp_stages_0_input_ready = (IBusCachedPlugin_iBusRsp_stages_0_output_ready && _zz_IBusCachedPlugin_iBusRsp_stages_0_input_ready); + assign IBusCachedPlugin_iBusRsp_stages_0_output_valid = (IBusCachedPlugin_iBusRsp_stages_0_input_valid && _zz_IBusCachedPlugin_iBusRsp_stages_0_input_ready); + assign IBusCachedPlugin_iBusRsp_stages_0_output_payload = IBusCachedPlugin_iBusRsp_stages_0_input_payload; + always @(*) begin + IBusCachedPlugin_iBusRsp_stages_1_halt = 1'b0; + if(IBusCachedPlugin_mmuBus_busy) begin + IBusCachedPlugin_iBusRsp_stages_1_halt = 1'b1; + end + end + + assign _zz_IBusCachedPlugin_iBusRsp_stages_1_input_ready = (! IBusCachedPlugin_iBusRsp_stages_1_halt); + assign IBusCachedPlugin_iBusRsp_stages_1_input_ready = (IBusCachedPlugin_iBusRsp_stages_1_output_ready && _zz_IBusCachedPlugin_iBusRsp_stages_1_input_ready); + assign IBusCachedPlugin_iBusRsp_stages_1_output_valid = (IBusCachedPlugin_iBusRsp_stages_1_input_valid && _zz_IBusCachedPlugin_iBusRsp_stages_1_input_ready); + assign IBusCachedPlugin_iBusRsp_stages_1_output_payload = IBusCachedPlugin_iBusRsp_stages_1_input_payload; + always @(*) begin + IBusCachedPlugin_iBusRsp_stages_2_halt = 1'b0; + if(when_IBusCachedPlugin_l267) begin + IBusCachedPlugin_iBusRsp_stages_2_halt = 1'b1; + end + end + + assign _zz_IBusCachedPlugin_iBusRsp_stages_2_input_ready = (! IBusCachedPlugin_iBusRsp_stages_2_halt); + assign IBusCachedPlugin_iBusRsp_stages_2_input_ready = (IBusCachedPlugin_iBusRsp_stages_2_output_ready && _zz_IBusCachedPlugin_iBusRsp_stages_2_input_ready); + assign IBusCachedPlugin_iBusRsp_stages_2_output_valid = (IBusCachedPlugin_iBusRsp_stages_2_input_valid && _zz_IBusCachedPlugin_iBusRsp_stages_2_input_ready); + assign IBusCachedPlugin_iBusRsp_stages_2_output_payload = IBusCachedPlugin_iBusRsp_stages_2_input_payload; + assign IBusCachedPlugin_fetchPc_redo_valid = IBusCachedPlugin_iBusRsp_redoFetch; + assign IBusCachedPlugin_fetchPc_redo_payload = IBusCachedPlugin_iBusRsp_stages_2_input_payload; + assign IBusCachedPlugin_iBusRsp_flush = ((decode_arbitration_removeIt || (decode_arbitration_flushNext && (! decode_arbitration_isStuck))) || IBusCachedPlugin_iBusRsp_redoFetch); + assign IBusCachedPlugin_iBusRsp_stages_0_output_ready = _zz_IBusCachedPlugin_iBusRsp_stages_0_output_ready; + assign _zz_IBusCachedPlugin_iBusRsp_stages_0_output_ready = ((1'b0 && (! _zz_IBusCachedPlugin_iBusRsp_stages_0_output_ready_1)) || IBusCachedPlugin_iBusRsp_stages_1_input_ready); + assign _zz_IBusCachedPlugin_iBusRsp_stages_0_output_ready_1 = _zz_IBusCachedPlugin_iBusRsp_stages_0_output_ready_2; + assign IBusCachedPlugin_iBusRsp_stages_1_input_valid = _zz_IBusCachedPlugin_iBusRsp_stages_0_output_ready_1; + assign IBusCachedPlugin_iBusRsp_stages_1_input_payload = IBusCachedPlugin_fetchPc_pcReg; + assign IBusCachedPlugin_iBusRsp_stages_1_output_ready = ((1'b0 && (! IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_valid)) || IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_ready); + assign IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_valid = _zz_IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_valid; + assign IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_payload = _zz_IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_payload; + assign IBusCachedPlugin_iBusRsp_stages_2_input_valid = IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_valid; + assign IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_ready = IBusCachedPlugin_iBusRsp_stages_2_input_ready; + assign IBusCachedPlugin_iBusRsp_stages_2_input_payload = IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_payload; + always @(*) begin + IBusCachedPlugin_iBusRsp_readyForError = 1'b1; + if(when_Fetcher_l320) begin + IBusCachedPlugin_iBusRsp_readyForError = 1'b0; + end + end + + assign when_Fetcher_l240 = (IBusCachedPlugin_iBusRsp_stages_1_input_valid || IBusCachedPlugin_iBusRsp_stages_2_input_valid); + assign when_Fetcher_l320 = (! IBusCachedPlugin_pcValids_0); + assign when_Fetcher_l329 = (! (! IBusCachedPlugin_iBusRsp_stages_1_input_ready)); + assign when_Fetcher_l329_1 = (! (! IBusCachedPlugin_iBusRsp_stages_2_input_ready)); + assign when_Fetcher_l329_2 = (! execute_arbitration_isStuck); + assign when_Fetcher_l329_3 = (! memory_arbitration_isStuck); + assign when_Fetcher_l329_4 = (! writeBack_arbitration_isStuck); + assign IBusCachedPlugin_pcValids_0 = IBusCachedPlugin_injector_nextPcCalc_valids_1; + assign IBusCachedPlugin_pcValids_1 = IBusCachedPlugin_injector_nextPcCalc_valids_2; + assign IBusCachedPlugin_pcValids_2 = IBusCachedPlugin_injector_nextPcCalc_valids_3; + assign IBusCachedPlugin_pcValids_3 = IBusCachedPlugin_injector_nextPcCalc_valids_4; + assign IBusCachedPlugin_iBusRsp_output_ready = (! decode_arbitration_isStuck); + always @(*) begin + decode_arbitration_isValid = IBusCachedPlugin_iBusRsp_output_valid; + case(switch_Fetcher_l362) + 3'b010 : begin + decode_arbitration_isValid = 1'b1; + end + 3'b011 : begin + decode_arbitration_isValid = 1'b1; + end + default : begin + end + endcase + end + + assign _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch = _zz__zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch[11]; + always @(*) begin + _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_1[18] = _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch; + _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_1[17] = _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch; + _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_1[16] = _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch; + _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_1[15] = _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch; + _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_1[14] = _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch; + _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_1[13] = _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch; + _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_1[12] = _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch; + _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_1[11] = _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch; + _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_1[10] = _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch; + _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_1[9] = _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch; + _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_1[8] = _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch; + _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_1[7] = _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch; + _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_1[6] = _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch; + _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_1[5] = _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch; + _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_1[4] = _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch; + _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_1[3] = _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch; + _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_1[2] = _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch; + _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_1[1] = _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch; + _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_1[0] = _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch; + end + + always @(*) begin + IBusCachedPlugin_decodePrediction_cmd_hadBranch = ((decode_BRANCH_CTRL == `BranchCtrlEnum_binary_sequential_JAL) || ((decode_BRANCH_CTRL == `BranchCtrlEnum_binary_sequential_B) && _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_2[31])); + if(_zz_6) begin + IBusCachedPlugin_decodePrediction_cmd_hadBranch = 1'b0; + end + end + + assign _zz_2 = _zz__zz_2[19]; + always @(*) begin + _zz_3[10] = _zz_2; + _zz_3[9] = _zz_2; + _zz_3[8] = _zz_2; + _zz_3[7] = _zz_2; + _zz_3[6] = _zz_2; + _zz_3[5] = _zz_2; + _zz_3[4] = _zz_2; + _zz_3[3] = _zz_2; + _zz_3[2] = _zz_2; + _zz_3[1] = _zz_2; + _zz_3[0] = _zz_2; + end + + assign _zz_4 = _zz__zz_4[11]; + always @(*) begin + _zz_5[18] = _zz_4; + _zz_5[17] = _zz_4; + _zz_5[16] = _zz_4; + _zz_5[15] = _zz_4; + _zz_5[14] = _zz_4; + _zz_5[13] = _zz_4; + _zz_5[12] = _zz_4; + _zz_5[11] = _zz_4; + _zz_5[10] = _zz_4; + _zz_5[9] = _zz_4; + _zz_5[8] = _zz_4; + _zz_5[7] = _zz_4; + _zz_5[6] = _zz_4; + _zz_5[5] = _zz_4; + _zz_5[4] = _zz_4; + _zz_5[3] = _zz_4; + _zz_5[2] = _zz_4; + _zz_5[1] = _zz_4; + _zz_5[0] = _zz_4; + end + + always @(*) begin + case(decode_BRANCH_CTRL) + `BranchCtrlEnum_binary_sequential_JAL : begin + _zz_6 = _zz__zz_6[1]; + end + default : begin + _zz_6 = _zz__zz_6_1[1]; + end + endcase + end + + assign IBusCachedPlugin_predictionJumpInterface_valid = (decode_arbitration_isValid && IBusCachedPlugin_decodePrediction_cmd_hadBranch); + assign _zz_IBusCachedPlugin_predictionJumpInterface_payload = _zz__zz_IBusCachedPlugin_predictionJumpInterface_payload[19]; + always @(*) begin + _zz_IBusCachedPlugin_predictionJumpInterface_payload_1[10] = _zz_IBusCachedPlugin_predictionJumpInterface_payload; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_1[9] = _zz_IBusCachedPlugin_predictionJumpInterface_payload; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_1[8] = _zz_IBusCachedPlugin_predictionJumpInterface_payload; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_1[7] = _zz_IBusCachedPlugin_predictionJumpInterface_payload; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_1[6] = _zz_IBusCachedPlugin_predictionJumpInterface_payload; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_1[5] = _zz_IBusCachedPlugin_predictionJumpInterface_payload; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_1[4] = _zz_IBusCachedPlugin_predictionJumpInterface_payload; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_1[3] = _zz_IBusCachedPlugin_predictionJumpInterface_payload; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_1[2] = _zz_IBusCachedPlugin_predictionJumpInterface_payload; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_1[1] = _zz_IBusCachedPlugin_predictionJumpInterface_payload; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_1[0] = _zz_IBusCachedPlugin_predictionJumpInterface_payload; + end + + assign _zz_IBusCachedPlugin_predictionJumpInterface_payload_2 = _zz__zz_IBusCachedPlugin_predictionJumpInterface_payload_2[11]; + always @(*) begin + _zz_IBusCachedPlugin_predictionJumpInterface_payload_3[18] = _zz_IBusCachedPlugin_predictionJumpInterface_payload_2; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_3[17] = _zz_IBusCachedPlugin_predictionJumpInterface_payload_2; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_3[16] = _zz_IBusCachedPlugin_predictionJumpInterface_payload_2; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_3[15] = _zz_IBusCachedPlugin_predictionJumpInterface_payload_2; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_3[14] = _zz_IBusCachedPlugin_predictionJumpInterface_payload_2; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_3[13] = _zz_IBusCachedPlugin_predictionJumpInterface_payload_2; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_3[12] = _zz_IBusCachedPlugin_predictionJumpInterface_payload_2; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_3[11] = _zz_IBusCachedPlugin_predictionJumpInterface_payload_2; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_3[10] = _zz_IBusCachedPlugin_predictionJumpInterface_payload_2; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_3[9] = _zz_IBusCachedPlugin_predictionJumpInterface_payload_2; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_3[8] = _zz_IBusCachedPlugin_predictionJumpInterface_payload_2; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_3[7] = _zz_IBusCachedPlugin_predictionJumpInterface_payload_2; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_3[6] = _zz_IBusCachedPlugin_predictionJumpInterface_payload_2; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_3[5] = _zz_IBusCachedPlugin_predictionJumpInterface_payload_2; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_3[4] = _zz_IBusCachedPlugin_predictionJumpInterface_payload_2; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_3[3] = _zz_IBusCachedPlugin_predictionJumpInterface_payload_2; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_3[2] = _zz_IBusCachedPlugin_predictionJumpInterface_payload_2; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_3[1] = _zz_IBusCachedPlugin_predictionJumpInterface_payload_2; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_3[0] = _zz_IBusCachedPlugin_predictionJumpInterface_payload_2; + end + + assign IBusCachedPlugin_predictionJumpInterface_payload = (decode_PC + ((decode_BRANCH_CTRL == `BranchCtrlEnum_binary_sequential_JAL) ? {{_zz_IBusCachedPlugin_predictionJumpInterface_payload_1,{{{_zz_IBusCachedPlugin_predictionJumpInterface_payload_4,decode_INSTRUCTION[19 : 12]},decode_INSTRUCTION[20]},decode_INSTRUCTION[30 : 21]}},1'b0} : {{_zz_IBusCachedPlugin_predictionJumpInterface_payload_3,{{{_zz_IBusCachedPlugin_predictionJumpInterface_payload_5,_zz_IBusCachedPlugin_predictionJumpInterface_payload_6},decode_INSTRUCTION[30 : 25]},decode_INSTRUCTION[11 : 8]}},1'b0})); + assign iBus_cmd_valid = IBusCachedPlugin_cache_io_mem_cmd_valid; + always @(*) begin + iBus_cmd_payload_address = IBusCachedPlugin_cache_io_mem_cmd_payload_address; + iBus_cmd_payload_address = IBusCachedPlugin_cache_io_mem_cmd_payload_address; + end + + assign iBus_cmd_payload_size = IBusCachedPlugin_cache_io_mem_cmd_payload_size; + assign IBusCachedPlugin_s0_tightlyCoupledHit = 1'b0; + assign IBusCachedPlugin_cache_io_cpu_prefetch_isValid = (IBusCachedPlugin_iBusRsp_stages_0_input_valid && (! IBusCachedPlugin_s0_tightlyCoupledHit)); + assign IBusCachedPlugin_cache_io_cpu_fetch_isValid = (IBusCachedPlugin_iBusRsp_stages_1_input_valid && (! IBusCachedPlugin_s1_tightlyCoupledHit)); + assign IBusCachedPlugin_cache_io_cpu_fetch_isStuck = (! IBusCachedPlugin_iBusRsp_stages_1_input_ready); + assign IBusCachedPlugin_mmuBus_cmd_0_isValid = IBusCachedPlugin_cache_io_cpu_fetch_isValid; + assign IBusCachedPlugin_mmuBus_cmd_0_isStuck = (! IBusCachedPlugin_iBusRsp_stages_1_input_ready); + assign IBusCachedPlugin_mmuBus_cmd_0_virtualAddress = IBusCachedPlugin_iBusRsp_stages_1_input_payload; + assign IBusCachedPlugin_mmuBus_cmd_0_bypassTranslation = 1'b0; + assign IBusCachedPlugin_mmuBus_end = (IBusCachedPlugin_iBusRsp_stages_1_input_ready || IBusCachedPlugin_externalFlush); + assign IBusCachedPlugin_cache_io_cpu_decode_isValid = (IBusCachedPlugin_iBusRsp_stages_2_input_valid && (! IBusCachedPlugin_s2_tightlyCoupledHit)); + assign IBusCachedPlugin_cache_io_cpu_decode_isStuck = (! IBusCachedPlugin_iBusRsp_stages_2_input_ready); + assign IBusCachedPlugin_cache_io_cpu_decode_isUser = (CsrPlugin_privilege == 2'b00); + assign IBusCachedPlugin_rsp_iBusRspOutputHalt = 1'b0; + assign IBusCachedPlugin_rsp_issueDetected = 1'b0; + always @(*) begin + IBusCachedPlugin_rsp_redoFetch = 1'b0; + if(when_IBusCachedPlugin_l239) begin + IBusCachedPlugin_rsp_redoFetch = 1'b1; + end + if(when_IBusCachedPlugin_l250) begin + IBusCachedPlugin_rsp_redoFetch = 1'b1; + end + end + + always @(*) begin + IBusCachedPlugin_cache_io_cpu_fill_valid = (IBusCachedPlugin_rsp_redoFetch && (! IBusCachedPlugin_cache_io_cpu_decode_mmuRefilling)); + if(when_IBusCachedPlugin_l250) begin + IBusCachedPlugin_cache_io_cpu_fill_valid = 1'b1; + end + end + + always @(*) begin + IBusCachedPlugin_decodeExceptionPort_valid = 1'b0; + if(when_IBusCachedPlugin_l244) begin + IBusCachedPlugin_decodeExceptionPort_valid = IBusCachedPlugin_iBusRsp_readyForError; + end + if(when_IBusCachedPlugin_l256) begin + IBusCachedPlugin_decodeExceptionPort_valid = IBusCachedPlugin_iBusRsp_readyForError; + end + end + + always @(*) begin + IBusCachedPlugin_decodeExceptionPort_payload_code = 4'bxxxx; + if(when_IBusCachedPlugin_l244) begin + IBusCachedPlugin_decodeExceptionPort_payload_code = 4'b1100; + end + if(when_IBusCachedPlugin_l256) begin + IBusCachedPlugin_decodeExceptionPort_payload_code = 4'b0001; + end + end + + assign IBusCachedPlugin_decodeExceptionPort_payload_badAddr = {IBusCachedPlugin_iBusRsp_stages_2_input_payload[31 : 2],2'b00}; + assign when_IBusCachedPlugin_l239 = ((IBusCachedPlugin_cache_io_cpu_decode_isValid && IBusCachedPlugin_cache_io_cpu_decode_mmuRefilling) && (! IBusCachedPlugin_rsp_issueDetected)); + assign when_IBusCachedPlugin_l244 = ((IBusCachedPlugin_cache_io_cpu_decode_isValid && IBusCachedPlugin_cache_io_cpu_decode_mmuException) && (! IBusCachedPlugin_rsp_issueDetected_1)); + assign when_IBusCachedPlugin_l250 = ((IBusCachedPlugin_cache_io_cpu_decode_isValid && IBusCachedPlugin_cache_io_cpu_decode_cacheMiss) && (! IBusCachedPlugin_rsp_issueDetected_2)); + assign when_IBusCachedPlugin_l256 = ((IBusCachedPlugin_cache_io_cpu_decode_isValid && IBusCachedPlugin_cache_io_cpu_decode_error) && (! IBusCachedPlugin_rsp_issueDetected_3)); + assign when_IBusCachedPlugin_l267 = (IBusCachedPlugin_rsp_issueDetected_4 || IBusCachedPlugin_rsp_iBusRspOutputHalt); + assign IBusCachedPlugin_iBusRsp_output_valid = IBusCachedPlugin_iBusRsp_stages_2_output_valid; + assign IBusCachedPlugin_iBusRsp_stages_2_output_ready = IBusCachedPlugin_iBusRsp_output_ready; + assign IBusCachedPlugin_iBusRsp_output_payload_rsp_inst = IBusCachedPlugin_cache_io_cpu_decode_data; + assign IBusCachedPlugin_iBusRsp_output_payload_pc = IBusCachedPlugin_iBusRsp_stages_2_output_payload; + assign IBusCachedPlugin_cache_io_flush = (decode_arbitration_isValid && decode_FLUSH_ALL); + assign dataCache_1_io_mem_cmd_ready = (! dataCache_1_io_mem_cmd_rValid); + assign dataCache_1_io_mem_cmd_s2mPipe_valid = (dataCache_1_io_mem_cmd_valid || dataCache_1_io_mem_cmd_rValid); + assign dataCache_1_io_mem_cmd_s2mPipe_payload_wr = (dataCache_1_io_mem_cmd_rValid ? dataCache_1_io_mem_cmd_rData_wr : dataCache_1_io_mem_cmd_payload_wr); + assign dataCache_1_io_mem_cmd_s2mPipe_payload_uncached = (dataCache_1_io_mem_cmd_rValid ? dataCache_1_io_mem_cmd_rData_uncached : dataCache_1_io_mem_cmd_payload_uncached); + assign dataCache_1_io_mem_cmd_s2mPipe_payload_address = (dataCache_1_io_mem_cmd_rValid ? dataCache_1_io_mem_cmd_rData_address : dataCache_1_io_mem_cmd_payload_address); + assign dataCache_1_io_mem_cmd_s2mPipe_payload_data = (dataCache_1_io_mem_cmd_rValid ? dataCache_1_io_mem_cmd_rData_data : dataCache_1_io_mem_cmd_payload_data); + assign dataCache_1_io_mem_cmd_s2mPipe_payload_mask = (dataCache_1_io_mem_cmd_rValid ? dataCache_1_io_mem_cmd_rData_mask : dataCache_1_io_mem_cmd_payload_mask); + assign dataCache_1_io_mem_cmd_s2mPipe_payload_size = (dataCache_1_io_mem_cmd_rValid ? dataCache_1_io_mem_cmd_rData_size : dataCache_1_io_mem_cmd_payload_size); + assign dataCache_1_io_mem_cmd_s2mPipe_payload_last = (dataCache_1_io_mem_cmd_rValid ? dataCache_1_io_mem_cmd_rData_last : dataCache_1_io_mem_cmd_payload_last); + always @(*) begin + dataCache_1_io_mem_cmd_s2mPipe_ready = dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_ready; + if(when_Stream_l342) begin + dataCache_1_io_mem_cmd_s2mPipe_ready = 1'b1; + end + end + + assign when_Stream_l342 = (! dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_valid); + assign dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_valid = dataCache_1_io_mem_cmd_s2mPipe_rValid; + assign dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_payload_wr = dataCache_1_io_mem_cmd_s2mPipe_rData_wr; + assign dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_payload_uncached = dataCache_1_io_mem_cmd_s2mPipe_rData_uncached; + assign dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_payload_address = dataCache_1_io_mem_cmd_s2mPipe_rData_address; + assign dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_payload_data = dataCache_1_io_mem_cmd_s2mPipe_rData_data; + assign dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_payload_mask = dataCache_1_io_mem_cmd_s2mPipe_rData_mask; + assign dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_payload_size = dataCache_1_io_mem_cmd_s2mPipe_rData_size; + assign dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_payload_last = dataCache_1_io_mem_cmd_s2mPipe_rData_last; + assign dBus_cmd_valid = dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_valid; + assign dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_ready = dBus_cmd_ready; + assign dBus_cmd_payload_wr = dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_payload_wr; + assign dBus_cmd_payload_uncached = dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_payload_uncached; + assign dBus_cmd_payload_address = dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_payload_address; + assign dBus_cmd_payload_data = dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_payload_data; + assign dBus_cmd_payload_mask = dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_payload_mask; + assign dBus_cmd_payload_size = dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_payload_size; + assign dBus_cmd_payload_last = dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_payload_last; + assign when_DBusCachedPlugin_l303 = ((DBusCachedPlugin_mmuBus_busy && decode_arbitration_isValid) && decode_MEMORY_ENABLE); + assign execute_DBusCachedPlugin_size = execute_INSTRUCTION[13 : 12]; + assign dataCache_1_io_cpu_execute_isValid = (execute_arbitration_isValid && execute_MEMORY_ENABLE); + assign dataCache_1_io_cpu_execute_address = execute_SRC_ADD; + always @(*) begin + case(execute_DBusCachedPlugin_size) + 2'b00 : begin + _zz_execute_MEMORY_STORE_DATA_RF = {{{execute_RS2[7 : 0],execute_RS2[7 : 0]},execute_RS2[7 : 0]},execute_RS2[7 : 0]}; + end + 2'b01 : begin + _zz_execute_MEMORY_STORE_DATA_RF = {execute_RS2[15 : 0],execute_RS2[15 : 0]}; + end + default : begin + _zz_execute_MEMORY_STORE_DATA_RF = execute_RS2[31 : 0]; + end + endcase + end + + assign dataCache_1_io_cpu_flush_valid = (execute_arbitration_isValid && execute_MEMORY_MANAGMENT); + assign dataCache_1_io_cpu_flush_isStall = (dataCache_1_io_cpu_flush_valid && (! dataCache_1_io_cpu_flush_ready)); + assign when_DBusCachedPlugin_l343 = (dataCache_1_io_cpu_flush_isStall || dataCache_1_io_cpu_execute_haltIt); + assign when_DBusCachedPlugin_l359 = (dataCache_1_io_cpu_execute_refilling && execute_arbitration_isValid); + assign dataCache_1_io_cpu_memory_isValid = (memory_arbitration_isValid && memory_MEMORY_ENABLE); + assign dataCache_1_io_cpu_memory_address = memory_REGFILE_WRITE_DATA; + assign DBusCachedPlugin_mmuBus_cmd_0_isValid = dataCache_1_io_cpu_memory_isValid; + assign DBusCachedPlugin_mmuBus_cmd_0_isStuck = memory_arbitration_isStuck; + assign DBusCachedPlugin_mmuBus_cmd_0_virtualAddress = dataCache_1_io_cpu_memory_address; + assign DBusCachedPlugin_mmuBus_cmd_0_bypassTranslation = 1'b0; + assign DBusCachedPlugin_mmuBus_end = ((! memory_arbitration_isStuck) || memory_arbitration_removeIt); + always @(*) begin + dataCache_1_io_cpu_memory_mmuRsp_isIoAccess = DBusCachedPlugin_mmuBus_rsp_isIoAccess; + if(when_DBusCachedPlugin_l386) begin + dataCache_1_io_cpu_memory_mmuRsp_isIoAccess = 1'b1; + end + end + + assign when_DBusCachedPlugin_l386 = (_zz_when_DBusCachedPlugin_l386 && (! dataCache_1_io_cpu_memory_isWrite)); + always @(*) begin + dataCache_1_io_cpu_writeBack_isValid = (writeBack_arbitration_isValid && writeBack_MEMORY_ENABLE); + if(writeBack_arbitration_haltByOther) begin + dataCache_1_io_cpu_writeBack_isValid = 1'b0; + end + end + + assign dataCache_1_io_cpu_writeBack_isUser = (CsrPlugin_privilege == 2'b00); + assign dataCache_1_io_cpu_writeBack_address = writeBack_REGFILE_WRITE_DATA; + assign dataCache_1_io_cpu_writeBack_storeData[31 : 0] = writeBack_MEMORY_STORE_DATA_RF; + always @(*) begin + DBusCachedPlugin_redoBranch_valid = 1'b0; + if(when_DBusCachedPlugin_l438) begin + if(dataCache_1_io_cpu_redo) begin + DBusCachedPlugin_redoBranch_valid = 1'b1; + end + end + end + + assign DBusCachedPlugin_redoBranch_payload = writeBack_PC; + always @(*) begin + DBusCachedPlugin_exceptionBus_valid = 1'b0; + if(when_DBusCachedPlugin_l438) begin + if(dataCache_1_io_cpu_writeBack_accessError) begin + DBusCachedPlugin_exceptionBus_valid = 1'b1; + end + if(dataCache_1_io_cpu_writeBack_mmuException) begin + DBusCachedPlugin_exceptionBus_valid = 1'b1; + end + if(dataCache_1_io_cpu_writeBack_unalignedAccess) begin + DBusCachedPlugin_exceptionBus_valid = 1'b1; + end + if(dataCache_1_io_cpu_redo) begin + DBusCachedPlugin_exceptionBus_valid = 1'b0; + end + end + end + + assign DBusCachedPlugin_exceptionBus_payload_badAddr = writeBack_REGFILE_WRITE_DATA; + always @(*) begin + DBusCachedPlugin_exceptionBus_payload_code = 4'bxxxx; + if(when_DBusCachedPlugin_l438) begin + if(dataCache_1_io_cpu_writeBack_accessError) begin + DBusCachedPlugin_exceptionBus_payload_code = {1'd0, _zz_DBusCachedPlugin_exceptionBus_payload_code}; + end + if(dataCache_1_io_cpu_writeBack_mmuException) begin + DBusCachedPlugin_exceptionBus_payload_code = (writeBack_MEMORY_WR ? 4'b1111 : 4'b1101); + end + if(dataCache_1_io_cpu_writeBack_unalignedAccess) begin + DBusCachedPlugin_exceptionBus_payload_code = {1'd0, _zz_DBusCachedPlugin_exceptionBus_payload_code_1}; + end + end + end + + assign when_DBusCachedPlugin_l438 = (writeBack_arbitration_isValid && writeBack_MEMORY_ENABLE); + assign when_DBusCachedPlugin_l458 = (dataCache_1_io_cpu_writeBack_isValid && dataCache_1_io_cpu_writeBack_haltIt); + assign writeBack_DBusCachedPlugin_rspSplits_0 = dataCache_1_io_cpu_writeBack_data[7 : 0]; + assign writeBack_DBusCachedPlugin_rspSplits_1 = dataCache_1_io_cpu_writeBack_data[15 : 8]; + assign writeBack_DBusCachedPlugin_rspSplits_2 = dataCache_1_io_cpu_writeBack_data[23 : 16]; + assign writeBack_DBusCachedPlugin_rspSplits_3 = dataCache_1_io_cpu_writeBack_data[31 : 24]; + always @(*) begin + writeBack_DBusCachedPlugin_rspShifted[7 : 0] = _zz_writeBack_DBusCachedPlugin_rspShifted; + writeBack_DBusCachedPlugin_rspShifted[15 : 8] = _zz_writeBack_DBusCachedPlugin_rspShifted_2; + writeBack_DBusCachedPlugin_rspShifted[23 : 16] = writeBack_DBusCachedPlugin_rspSplits_2; + writeBack_DBusCachedPlugin_rspShifted[31 : 24] = writeBack_DBusCachedPlugin_rspSplits_3; + end + + assign writeBack_DBusCachedPlugin_rspRf = writeBack_DBusCachedPlugin_rspShifted[31 : 0]; + assign switch_Misc_l200 = writeBack_INSTRUCTION[13 : 12]; + assign _zz_writeBack_DBusCachedPlugin_rspFormated = (writeBack_DBusCachedPlugin_rspRf[7] && (! writeBack_INSTRUCTION[14])); + always @(*) begin + _zz_writeBack_DBusCachedPlugin_rspFormated_1[31] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[30] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[29] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[28] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[27] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[26] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[25] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[24] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[23] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[22] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[21] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[20] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[19] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[18] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[17] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[16] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[15] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[14] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[13] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[12] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[11] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[10] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[9] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[8] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[7 : 0] = writeBack_DBusCachedPlugin_rspRf[7 : 0]; + end + + assign _zz_writeBack_DBusCachedPlugin_rspFormated_2 = (writeBack_DBusCachedPlugin_rspRf[15] && (! writeBack_INSTRUCTION[14])); + always @(*) begin + _zz_writeBack_DBusCachedPlugin_rspFormated_3[31] = _zz_writeBack_DBusCachedPlugin_rspFormated_2; + _zz_writeBack_DBusCachedPlugin_rspFormated_3[30] = _zz_writeBack_DBusCachedPlugin_rspFormated_2; + _zz_writeBack_DBusCachedPlugin_rspFormated_3[29] = _zz_writeBack_DBusCachedPlugin_rspFormated_2; + _zz_writeBack_DBusCachedPlugin_rspFormated_3[28] = _zz_writeBack_DBusCachedPlugin_rspFormated_2; + _zz_writeBack_DBusCachedPlugin_rspFormated_3[27] = _zz_writeBack_DBusCachedPlugin_rspFormated_2; + _zz_writeBack_DBusCachedPlugin_rspFormated_3[26] = _zz_writeBack_DBusCachedPlugin_rspFormated_2; + _zz_writeBack_DBusCachedPlugin_rspFormated_3[25] = _zz_writeBack_DBusCachedPlugin_rspFormated_2; + _zz_writeBack_DBusCachedPlugin_rspFormated_3[24] = _zz_writeBack_DBusCachedPlugin_rspFormated_2; + _zz_writeBack_DBusCachedPlugin_rspFormated_3[23] = _zz_writeBack_DBusCachedPlugin_rspFormated_2; + _zz_writeBack_DBusCachedPlugin_rspFormated_3[22] = _zz_writeBack_DBusCachedPlugin_rspFormated_2; + _zz_writeBack_DBusCachedPlugin_rspFormated_3[21] = _zz_writeBack_DBusCachedPlugin_rspFormated_2; + _zz_writeBack_DBusCachedPlugin_rspFormated_3[20] = _zz_writeBack_DBusCachedPlugin_rspFormated_2; + _zz_writeBack_DBusCachedPlugin_rspFormated_3[19] = _zz_writeBack_DBusCachedPlugin_rspFormated_2; + _zz_writeBack_DBusCachedPlugin_rspFormated_3[18] = _zz_writeBack_DBusCachedPlugin_rspFormated_2; + _zz_writeBack_DBusCachedPlugin_rspFormated_3[17] = _zz_writeBack_DBusCachedPlugin_rspFormated_2; + _zz_writeBack_DBusCachedPlugin_rspFormated_3[16] = _zz_writeBack_DBusCachedPlugin_rspFormated_2; + _zz_writeBack_DBusCachedPlugin_rspFormated_3[15 : 0] = writeBack_DBusCachedPlugin_rspRf[15 : 0]; + end + + always @(*) begin + case(switch_Misc_l200) + 2'b00 : begin + writeBack_DBusCachedPlugin_rspFormated = _zz_writeBack_DBusCachedPlugin_rspFormated_1; + end + 2'b01 : begin + writeBack_DBusCachedPlugin_rspFormated = _zz_writeBack_DBusCachedPlugin_rspFormated_3; + end + default : begin + writeBack_DBusCachedPlugin_rspFormated = writeBack_DBusCachedPlugin_rspRf; + end + endcase + end + + assign when_DBusCachedPlugin_l484 = (writeBack_arbitration_isValid && writeBack_MEMORY_ENABLE); + assign IBusCachedPlugin_mmuBus_rsp_physicalAddress = IBusCachedPlugin_mmuBus_cmd_0_virtualAddress; + assign IBusCachedPlugin_mmuBus_rsp_allowRead = 1'b1; + assign IBusCachedPlugin_mmuBus_rsp_allowWrite = 1'b1; + assign IBusCachedPlugin_mmuBus_rsp_allowExecute = 1'b1; + assign IBusCachedPlugin_mmuBus_rsp_isIoAccess = IBusCachedPlugin_mmuBus_rsp_physicalAddress[31]; + assign IBusCachedPlugin_mmuBus_rsp_isPaging = 1'b0; + assign IBusCachedPlugin_mmuBus_rsp_exception = 1'b0; + assign IBusCachedPlugin_mmuBus_rsp_refilling = 1'b0; + assign IBusCachedPlugin_mmuBus_busy = 1'b0; + assign DBusCachedPlugin_mmuBus_rsp_physicalAddress = DBusCachedPlugin_mmuBus_cmd_0_virtualAddress; + assign DBusCachedPlugin_mmuBus_rsp_allowRead = 1'b1; + assign DBusCachedPlugin_mmuBus_rsp_allowWrite = 1'b1; + assign DBusCachedPlugin_mmuBus_rsp_allowExecute = 1'b1; + assign DBusCachedPlugin_mmuBus_rsp_isIoAccess = DBusCachedPlugin_mmuBus_rsp_physicalAddress[31]; + assign DBusCachedPlugin_mmuBus_rsp_isPaging = 1'b0; + assign DBusCachedPlugin_mmuBus_rsp_exception = 1'b0; + assign DBusCachedPlugin_mmuBus_rsp_refilling = 1'b0; + assign DBusCachedPlugin_mmuBus_busy = 1'b0; + assign _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_3 = ((decode_INSTRUCTION & 32'h00004050) == 32'h00004050); + assign _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_4 = ((decode_INSTRUCTION & 32'h00000004) == 32'h00000004); + assign _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_5 = ((decode_INSTRUCTION & 32'h00000048) == 32'h00000048); + assign _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_6 = ((decode_INSTRUCTION & 32'h0000000c) == 32'h00000008); + assign _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_7 = ((decode_INSTRUCTION & 32'h00001000) == 32'h0); + assign _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2 = {1'b0,{(_zz_decode_CfuPlugin_CFU_INPUT_2_KIND_6 != 1'b0),{((_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2 == _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_1) != 1'b0),{(_zz_decode_CfuPlugin_CFU_INPUT_2_KIND_7 != 1'b0),{(_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_2 != _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_3),{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_4,{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_5,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_7}}}}}}}; + assign _zz_decode_SRC1_CTRL_2 = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[2 : 1]; + assign _zz_decode_SRC1_CTRL_1 = _zz_decode_SRC1_CTRL_2; + assign _zz_decode_ALU_CTRL_2 = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[7 : 6]; + assign _zz_decode_ALU_CTRL_1 = _zz_decode_ALU_CTRL_2; + assign _zz_decode_SRC2_CTRL_2 = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[9 : 8]; + assign _zz_decode_SRC2_CTRL_1 = _zz_decode_SRC2_CTRL_2; + assign _zz_decode_ALU_BITWISE_CTRL_2 = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[19 : 18]; + assign _zz_decode_ALU_BITWISE_CTRL_1 = _zz_decode_ALU_BITWISE_CTRL_2; + assign _zz_decode_SHIFT_CTRL_2 = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[22 : 21]; + assign _zz_decode_SHIFT_CTRL_1 = _zz_decode_SHIFT_CTRL_2; + assign _zz_decode_BRANCH_CTRL_2 = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[24 : 23]; + assign _zz_decode_BRANCH_CTRL = _zz_decode_BRANCH_CTRL_2; + assign _zz_decode_ENV_CTRL_2 = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[27 : 26]; + assign _zz_decode_ENV_CTRL_1 = _zz_decode_ENV_CTRL_2; + assign _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_8 = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[34 : 34]; + assign _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_1 = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_8; + assign decodeExceptionPort_valid = (decode_arbitration_isValid && (! decode_LEGAL_INSTRUCTION)); + assign decodeExceptionPort_payload_code = 4'b0010; + assign decodeExceptionPort_payload_badAddr = decode_INSTRUCTION; + assign when_RegFilePlugin_l63 = (decode_INSTRUCTION[11 : 7] == 5'h0); + assign decode_RegFilePlugin_regFileReadAddress1 = decode_INSTRUCTION_ANTICIPATED[19 : 15]; + assign decode_RegFilePlugin_regFileReadAddress2 = decode_INSTRUCTION_ANTICIPATED[24 : 20]; + assign decode_RegFilePlugin_rs1Data = _zz_RegFilePlugin_regFile_port0; + assign decode_RegFilePlugin_rs2Data = _zz_RegFilePlugin_regFile_port1; + always @(*) begin + lastStageRegFileWrite_valid = (_zz_lastStageRegFileWrite_valid && writeBack_arbitration_isFiring); + if(_zz_7) begin + lastStageRegFileWrite_valid = 1'b1; + end + end + + always @(*) begin + lastStageRegFileWrite_payload_address = _zz_lastStageRegFileWrite_payload_address[11 : 7]; + if(_zz_7) begin + lastStageRegFileWrite_payload_address = 5'h0; + end + end + + always @(*) begin + lastStageRegFileWrite_payload_data = _zz_decode_RS2_2; + if(_zz_7) begin + lastStageRegFileWrite_payload_data = 32'h0; + end + end + + always @(*) begin + case(execute_ALU_BITWISE_CTRL) + `AluBitwiseCtrlEnum_binary_sequential_AND_1 : begin + execute_IntAluPlugin_bitwise = (execute_SRC1 & execute_SRC2); + end + `AluBitwiseCtrlEnum_binary_sequential_OR_1 : begin + execute_IntAluPlugin_bitwise = (execute_SRC1 | execute_SRC2); + end + default : begin + execute_IntAluPlugin_bitwise = (execute_SRC1 ^ execute_SRC2); + end + endcase + end + + always @(*) begin + case(execute_ALU_CTRL) + `AluCtrlEnum_binary_sequential_BITWISE : begin + _zz_execute_REGFILE_WRITE_DATA = execute_IntAluPlugin_bitwise; + end + `AluCtrlEnum_binary_sequential_SLT_SLTU : begin + _zz_execute_REGFILE_WRITE_DATA = {31'd0, _zz__zz_execute_REGFILE_WRITE_DATA}; + end + default : begin + _zz_execute_REGFILE_WRITE_DATA = execute_SRC_ADD_SUB; + end + endcase + end + + always @(*) begin + case(execute_SRC1_CTRL) + `Src1CtrlEnum_binary_sequential_RS : begin + _zz_execute_SRC1 = execute_RS1; + end + `Src1CtrlEnum_binary_sequential_PC_INCREMENT : begin + _zz_execute_SRC1 = {29'd0, _zz__zz_execute_SRC1}; + end + `Src1CtrlEnum_binary_sequential_IMU : begin + _zz_execute_SRC1 = {execute_INSTRUCTION[31 : 12],12'h0}; + end + default : begin + _zz_execute_SRC1 = {27'd0, _zz__zz_execute_SRC1_1}; + end + endcase + end + + assign _zz_execute_SRC2_1 = execute_INSTRUCTION[31]; + always @(*) begin + _zz_execute_SRC2_2[19] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[18] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[17] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[16] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[15] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[14] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[13] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[12] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[11] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[10] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[9] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[8] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[7] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[6] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[5] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[4] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[3] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[2] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[1] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[0] = _zz_execute_SRC2_1; + end + + assign _zz_execute_SRC2_3 = _zz__zz_execute_SRC2_3[11]; + always @(*) begin + _zz_execute_SRC2_4[19] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[18] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[17] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[16] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[15] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[14] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[13] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[12] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[11] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[10] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[9] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[8] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[7] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[6] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[5] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[4] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[3] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[2] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[1] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[0] = _zz_execute_SRC2_3; + end + + always @(*) begin + case(execute_SRC2_CTRL) + `Src2CtrlEnum_binary_sequential_RS : begin + _zz_execute_SRC2_5 = execute_RS2; + end + `Src2CtrlEnum_binary_sequential_IMI : begin + _zz_execute_SRC2_5 = {_zz_execute_SRC2_2,execute_INSTRUCTION[31 : 20]}; + end + `Src2CtrlEnum_binary_sequential_IMS : begin + _zz_execute_SRC2_5 = {_zz_execute_SRC2_4,{execute_INSTRUCTION[31 : 25],execute_INSTRUCTION[11 : 7]}}; + end + default : begin + _zz_execute_SRC2_5 = _zz_execute_SRC2; + end + endcase + end + + always @(*) begin + execute_SrcPlugin_addSub = _zz_execute_SrcPlugin_addSub; + if(execute_SRC2_FORCE_ZERO) begin + execute_SrcPlugin_addSub = execute_SRC1; + end + end + + assign execute_SrcPlugin_less = ((execute_SRC1[31] == execute_SRC2[31]) ? execute_SrcPlugin_addSub[31] : (execute_SRC_LESS_UNSIGNED ? execute_SRC2[31] : execute_SRC1[31])); + assign execute_FullBarrelShifterPlugin_amplitude = execute_SRC2[4 : 0]; + always @(*) begin + _zz_execute_FullBarrelShifterPlugin_reversed[0] = execute_SRC1[31]; + _zz_execute_FullBarrelShifterPlugin_reversed[1] = execute_SRC1[30]; + _zz_execute_FullBarrelShifterPlugin_reversed[2] = execute_SRC1[29]; + _zz_execute_FullBarrelShifterPlugin_reversed[3] = execute_SRC1[28]; + _zz_execute_FullBarrelShifterPlugin_reversed[4] = execute_SRC1[27]; + _zz_execute_FullBarrelShifterPlugin_reversed[5] = execute_SRC1[26]; + _zz_execute_FullBarrelShifterPlugin_reversed[6] = execute_SRC1[25]; + _zz_execute_FullBarrelShifterPlugin_reversed[7] = execute_SRC1[24]; + _zz_execute_FullBarrelShifterPlugin_reversed[8] = execute_SRC1[23]; + _zz_execute_FullBarrelShifterPlugin_reversed[9] = execute_SRC1[22]; + _zz_execute_FullBarrelShifterPlugin_reversed[10] = execute_SRC1[21]; + _zz_execute_FullBarrelShifterPlugin_reversed[11] = execute_SRC1[20]; + _zz_execute_FullBarrelShifterPlugin_reversed[12] = execute_SRC1[19]; + _zz_execute_FullBarrelShifterPlugin_reversed[13] = execute_SRC1[18]; + _zz_execute_FullBarrelShifterPlugin_reversed[14] = execute_SRC1[17]; + _zz_execute_FullBarrelShifterPlugin_reversed[15] = execute_SRC1[16]; + _zz_execute_FullBarrelShifterPlugin_reversed[16] = execute_SRC1[15]; + _zz_execute_FullBarrelShifterPlugin_reversed[17] = execute_SRC1[14]; + _zz_execute_FullBarrelShifterPlugin_reversed[18] = execute_SRC1[13]; + _zz_execute_FullBarrelShifterPlugin_reversed[19] = execute_SRC1[12]; + _zz_execute_FullBarrelShifterPlugin_reversed[20] = execute_SRC1[11]; + _zz_execute_FullBarrelShifterPlugin_reversed[21] = execute_SRC1[10]; + _zz_execute_FullBarrelShifterPlugin_reversed[22] = execute_SRC1[9]; + _zz_execute_FullBarrelShifterPlugin_reversed[23] = execute_SRC1[8]; + _zz_execute_FullBarrelShifterPlugin_reversed[24] = execute_SRC1[7]; + _zz_execute_FullBarrelShifterPlugin_reversed[25] = execute_SRC1[6]; + _zz_execute_FullBarrelShifterPlugin_reversed[26] = execute_SRC1[5]; + _zz_execute_FullBarrelShifterPlugin_reversed[27] = execute_SRC1[4]; + _zz_execute_FullBarrelShifterPlugin_reversed[28] = execute_SRC1[3]; + _zz_execute_FullBarrelShifterPlugin_reversed[29] = execute_SRC1[2]; + _zz_execute_FullBarrelShifterPlugin_reversed[30] = execute_SRC1[1]; + _zz_execute_FullBarrelShifterPlugin_reversed[31] = execute_SRC1[0]; + end + + assign execute_FullBarrelShifterPlugin_reversed = ((execute_SHIFT_CTRL == `ShiftCtrlEnum_binary_sequential_SLL_1) ? _zz_execute_FullBarrelShifterPlugin_reversed : execute_SRC1); + always @(*) begin + _zz_decode_RS2_3[0] = memory_SHIFT_RIGHT[31]; + _zz_decode_RS2_3[1] = memory_SHIFT_RIGHT[30]; + _zz_decode_RS2_3[2] = memory_SHIFT_RIGHT[29]; + _zz_decode_RS2_3[3] = memory_SHIFT_RIGHT[28]; + _zz_decode_RS2_3[4] = memory_SHIFT_RIGHT[27]; + _zz_decode_RS2_3[5] = memory_SHIFT_RIGHT[26]; + _zz_decode_RS2_3[6] = memory_SHIFT_RIGHT[25]; + _zz_decode_RS2_3[7] = memory_SHIFT_RIGHT[24]; + _zz_decode_RS2_3[8] = memory_SHIFT_RIGHT[23]; + _zz_decode_RS2_3[9] = memory_SHIFT_RIGHT[22]; + _zz_decode_RS2_3[10] = memory_SHIFT_RIGHT[21]; + _zz_decode_RS2_3[11] = memory_SHIFT_RIGHT[20]; + _zz_decode_RS2_3[12] = memory_SHIFT_RIGHT[19]; + _zz_decode_RS2_3[13] = memory_SHIFT_RIGHT[18]; + _zz_decode_RS2_3[14] = memory_SHIFT_RIGHT[17]; + _zz_decode_RS2_3[15] = memory_SHIFT_RIGHT[16]; + _zz_decode_RS2_3[16] = memory_SHIFT_RIGHT[15]; + _zz_decode_RS2_3[17] = memory_SHIFT_RIGHT[14]; + _zz_decode_RS2_3[18] = memory_SHIFT_RIGHT[13]; + _zz_decode_RS2_3[19] = memory_SHIFT_RIGHT[12]; + _zz_decode_RS2_3[20] = memory_SHIFT_RIGHT[11]; + _zz_decode_RS2_3[21] = memory_SHIFT_RIGHT[10]; + _zz_decode_RS2_3[22] = memory_SHIFT_RIGHT[9]; + _zz_decode_RS2_3[23] = memory_SHIFT_RIGHT[8]; + _zz_decode_RS2_3[24] = memory_SHIFT_RIGHT[7]; + _zz_decode_RS2_3[25] = memory_SHIFT_RIGHT[6]; + _zz_decode_RS2_3[26] = memory_SHIFT_RIGHT[5]; + _zz_decode_RS2_3[27] = memory_SHIFT_RIGHT[4]; + _zz_decode_RS2_3[28] = memory_SHIFT_RIGHT[3]; + _zz_decode_RS2_3[29] = memory_SHIFT_RIGHT[2]; + _zz_decode_RS2_3[30] = memory_SHIFT_RIGHT[1]; + _zz_decode_RS2_3[31] = memory_SHIFT_RIGHT[0]; + end + + always @(*) begin + HazardSimplePlugin_src0Hazard = 1'b0; + if(when_HazardSimplePlugin_l57) begin + if(when_HazardSimplePlugin_l58) begin + if(when_HazardSimplePlugin_l48) begin + HazardSimplePlugin_src0Hazard = 1'b1; + end + end + end + if(when_HazardSimplePlugin_l57_1) begin + if(when_HazardSimplePlugin_l58_1) begin + if(when_HazardSimplePlugin_l48_1) begin + HazardSimplePlugin_src0Hazard = 1'b1; + end + end + end + if(when_HazardSimplePlugin_l57_2) begin + if(when_HazardSimplePlugin_l58_2) begin + if(when_HazardSimplePlugin_l48_2) begin + HazardSimplePlugin_src0Hazard = 1'b1; + end + end + end + if(when_HazardSimplePlugin_l105) begin + HazardSimplePlugin_src0Hazard = 1'b0; + end + end + + always @(*) begin + HazardSimplePlugin_src1Hazard = 1'b0; + if(when_HazardSimplePlugin_l57) begin + if(when_HazardSimplePlugin_l58) begin + if(when_HazardSimplePlugin_l51) begin + HazardSimplePlugin_src1Hazard = 1'b1; + end + end + end + if(when_HazardSimplePlugin_l57_1) begin + if(when_HazardSimplePlugin_l58_1) begin + if(when_HazardSimplePlugin_l51_1) begin + HazardSimplePlugin_src1Hazard = 1'b1; + end + end + end + if(when_HazardSimplePlugin_l57_2) begin + if(when_HazardSimplePlugin_l58_2) begin + if(when_HazardSimplePlugin_l51_2) begin + HazardSimplePlugin_src1Hazard = 1'b1; + end + end + end + if(when_HazardSimplePlugin_l108) begin + HazardSimplePlugin_src1Hazard = 1'b0; + end + end + + assign HazardSimplePlugin_writeBackWrites_valid = (_zz_lastStageRegFileWrite_valid && writeBack_arbitration_isFiring); + assign HazardSimplePlugin_writeBackWrites_payload_address = _zz_lastStageRegFileWrite_payload_address[11 : 7]; + assign HazardSimplePlugin_writeBackWrites_payload_data = _zz_decode_RS2_2; + assign HazardSimplePlugin_addr0Match = (HazardSimplePlugin_writeBackBuffer_payload_address == decode_INSTRUCTION[19 : 15]); + assign HazardSimplePlugin_addr1Match = (HazardSimplePlugin_writeBackBuffer_payload_address == decode_INSTRUCTION[24 : 20]); + assign when_HazardSimplePlugin_l47 = 1'b1; + assign when_HazardSimplePlugin_l48 = (writeBack_INSTRUCTION[11 : 7] == decode_INSTRUCTION[19 : 15]); + assign when_HazardSimplePlugin_l51 = (writeBack_INSTRUCTION[11 : 7] == decode_INSTRUCTION[24 : 20]); + assign when_HazardSimplePlugin_l45 = (writeBack_arbitration_isValid && writeBack_REGFILE_WRITE_VALID); + assign when_HazardSimplePlugin_l57 = (writeBack_arbitration_isValid && writeBack_REGFILE_WRITE_VALID); + assign when_HazardSimplePlugin_l58 = (1'b0 || (! when_HazardSimplePlugin_l47)); + assign when_HazardSimplePlugin_l48_1 = (memory_INSTRUCTION[11 : 7] == decode_INSTRUCTION[19 : 15]); + assign when_HazardSimplePlugin_l51_1 = (memory_INSTRUCTION[11 : 7] == decode_INSTRUCTION[24 : 20]); + assign when_HazardSimplePlugin_l45_1 = (memory_arbitration_isValid && memory_REGFILE_WRITE_VALID); + assign when_HazardSimplePlugin_l57_1 = (memory_arbitration_isValid && memory_REGFILE_WRITE_VALID); + assign when_HazardSimplePlugin_l58_1 = (1'b0 || (! memory_BYPASSABLE_MEMORY_STAGE)); + assign when_HazardSimplePlugin_l48_2 = (execute_INSTRUCTION[11 : 7] == decode_INSTRUCTION[19 : 15]); + assign when_HazardSimplePlugin_l51_2 = (execute_INSTRUCTION[11 : 7] == decode_INSTRUCTION[24 : 20]); + assign when_HazardSimplePlugin_l45_2 = (execute_arbitration_isValid && execute_REGFILE_WRITE_VALID); + assign when_HazardSimplePlugin_l57_2 = (execute_arbitration_isValid && execute_REGFILE_WRITE_VALID); + assign when_HazardSimplePlugin_l58_2 = (1'b0 || (! execute_BYPASSABLE_EXECUTE_STAGE)); + assign when_HazardSimplePlugin_l105 = (! decode_RS1_USE); + assign when_HazardSimplePlugin_l108 = (! decode_RS2_USE); + assign when_HazardSimplePlugin_l113 = (decode_arbitration_isValid && (HazardSimplePlugin_src0Hazard || HazardSimplePlugin_src1Hazard)); + assign execute_BranchPlugin_eq = (execute_SRC1 == execute_SRC2); + assign switch_Misc_l200_1 = execute_INSTRUCTION[14 : 12]; + always @(*) begin + casez(switch_Misc_l200_1) + 3'b000 : begin + _zz_execute_BRANCH_COND_RESULT = execute_BranchPlugin_eq; + end + 3'b001 : begin + _zz_execute_BRANCH_COND_RESULT = (! execute_BranchPlugin_eq); + end + 3'b1?1 : begin + _zz_execute_BRANCH_COND_RESULT = (! execute_SRC_LESS); + end + default : begin + _zz_execute_BRANCH_COND_RESULT = execute_SRC_LESS; + end + endcase + end + + always @(*) begin + case(execute_BRANCH_CTRL) + `BranchCtrlEnum_binary_sequential_INC : begin + _zz_execute_BRANCH_COND_RESULT_1 = 1'b0; + end + `BranchCtrlEnum_binary_sequential_JAL : begin + _zz_execute_BRANCH_COND_RESULT_1 = 1'b1; + end + `BranchCtrlEnum_binary_sequential_JALR : begin + _zz_execute_BRANCH_COND_RESULT_1 = 1'b1; + end + default : begin + _zz_execute_BRANCH_COND_RESULT_1 = _zz_execute_BRANCH_COND_RESULT; + end + endcase + end + + assign _zz_execute_BranchPlugin_missAlignedTarget = execute_INSTRUCTION[31]; + always @(*) begin + _zz_execute_BranchPlugin_missAlignedTarget_1[19] = _zz_execute_BranchPlugin_missAlignedTarget; + _zz_execute_BranchPlugin_missAlignedTarget_1[18] = _zz_execute_BranchPlugin_missAlignedTarget; + _zz_execute_BranchPlugin_missAlignedTarget_1[17] = _zz_execute_BranchPlugin_missAlignedTarget; + _zz_execute_BranchPlugin_missAlignedTarget_1[16] = _zz_execute_BranchPlugin_missAlignedTarget; + _zz_execute_BranchPlugin_missAlignedTarget_1[15] = _zz_execute_BranchPlugin_missAlignedTarget; + _zz_execute_BranchPlugin_missAlignedTarget_1[14] = _zz_execute_BranchPlugin_missAlignedTarget; + _zz_execute_BranchPlugin_missAlignedTarget_1[13] = _zz_execute_BranchPlugin_missAlignedTarget; + _zz_execute_BranchPlugin_missAlignedTarget_1[12] = _zz_execute_BranchPlugin_missAlignedTarget; + _zz_execute_BranchPlugin_missAlignedTarget_1[11] = _zz_execute_BranchPlugin_missAlignedTarget; + _zz_execute_BranchPlugin_missAlignedTarget_1[10] = _zz_execute_BranchPlugin_missAlignedTarget; + _zz_execute_BranchPlugin_missAlignedTarget_1[9] = _zz_execute_BranchPlugin_missAlignedTarget; + _zz_execute_BranchPlugin_missAlignedTarget_1[8] = _zz_execute_BranchPlugin_missAlignedTarget; + _zz_execute_BranchPlugin_missAlignedTarget_1[7] = _zz_execute_BranchPlugin_missAlignedTarget; + _zz_execute_BranchPlugin_missAlignedTarget_1[6] = _zz_execute_BranchPlugin_missAlignedTarget; + _zz_execute_BranchPlugin_missAlignedTarget_1[5] = _zz_execute_BranchPlugin_missAlignedTarget; + _zz_execute_BranchPlugin_missAlignedTarget_1[4] = _zz_execute_BranchPlugin_missAlignedTarget; + _zz_execute_BranchPlugin_missAlignedTarget_1[3] = _zz_execute_BranchPlugin_missAlignedTarget; + _zz_execute_BranchPlugin_missAlignedTarget_1[2] = _zz_execute_BranchPlugin_missAlignedTarget; + _zz_execute_BranchPlugin_missAlignedTarget_1[1] = _zz_execute_BranchPlugin_missAlignedTarget; + _zz_execute_BranchPlugin_missAlignedTarget_1[0] = _zz_execute_BranchPlugin_missAlignedTarget; + end + + assign _zz_execute_BranchPlugin_missAlignedTarget_2 = _zz__zz_execute_BranchPlugin_missAlignedTarget_2[19]; + always @(*) begin + _zz_execute_BranchPlugin_missAlignedTarget_3[10] = _zz_execute_BranchPlugin_missAlignedTarget_2; + _zz_execute_BranchPlugin_missAlignedTarget_3[9] = _zz_execute_BranchPlugin_missAlignedTarget_2; + _zz_execute_BranchPlugin_missAlignedTarget_3[8] = _zz_execute_BranchPlugin_missAlignedTarget_2; + _zz_execute_BranchPlugin_missAlignedTarget_3[7] = _zz_execute_BranchPlugin_missAlignedTarget_2; + _zz_execute_BranchPlugin_missAlignedTarget_3[6] = _zz_execute_BranchPlugin_missAlignedTarget_2; + _zz_execute_BranchPlugin_missAlignedTarget_3[5] = _zz_execute_BranchPlugin_missAlignedTarget_2; + _zz_execute_BranchPlugin_missAlignedTarget_3[4] = _zz_execute_BranchPlugin_missAlignedTarget_2; + _zz_execute_BranchPlugin_missAlignedTarget_3[3] = _zz_execute_BranchPlugin_missAlignedTarget_2; + _zz_execute_BranchPlugin_missAlignedTarget_3[2] = _zz_execute_BranchPlugin_missAlignedTarget_2; + _zz_execute_BranchPlugin_missAlignedTarget_3[1] = _zz_execute_BranchPlugin_missAlignedTarget_2; + _zz_execute_BranchPlugin_missAlignedTarget_3[0] = _zz_execute_BranchPlugin_missAlignedTarget_2; + end + + assign _zz_execute_BranchPlugin_missAlignedTarget_4 = _zz__zz_execute_BranchPlugin_missAlignedTarget_4[11]; + always @(*) begin + _zz_execute_BranchPlugin_missAlignedTarget_5[18] = _zz_execute_BranchPlugin_missAlignedTarget_4; + _zz_execute_BranchPlugin_missAlignedTarget_5[17] = _zz_execute_BranchPlugin_missAlignedTarget_4; + _zz_execute_BranchPlugin_missAlignedTarget_5[16] = _zz_execute_BranchPlugin_missAlignedTarget_4; + _zz_execute_BranchPlugin_missAlignedTarget_5[15] = _zz_execute_BranchPlugin_missAlignedTarget_4; + _zz_execute_BranchPlugin_missAlignedTarget_5[14] = _zz_execute_BranchPlugin_missAlignedTarget_4; + _zz_execute_BranchPlugin_missAlignedTarget_5[13] = _zz_execute_BranchPlugin_missAlignedTarget_4; + _zz_execute_BranchPlugin_missAlignedTarget_5[12] = _zz_execute_BranchPlugin_missAlignedTarget_4; + _zz_execute_BranchPlugin_missAlignedTarget_5[11] = _zz_execute_BranchPlugin_missAlignedTarget_4; + _zz_execute_BranchPlugin_missAlignedTarget_5[10] = _zz_execute_BranchPlugin_missAlignedTarget_4; + _zz_execute_BranchPlugin_missAlignedTarget_5[9] = _zz_execute_BranchPlugin_missAlignedTarget_4; + _zz_execute_BranchPlugin_missAlignedTarget_5[8] = _zz_execute_BranchPlugin_missAlignedTarget_4; + _zz_execute_BranchPlugin_missAlignedTarget_5[7] = _zz_execute_BranchPlugin_missAlignedTarget_4; + _zz_execute_BranchPlugin_missAlignedTarget_5[6] = _zz_execute_BranchPlugin_missAlignedTarget_4; + _zz_execute_BranchPlugin_missAlignedTarget_5[5] = _zz_execute_BranchPlugin_missAlignedTarget_4; + _zz_execute_BranchPlugin_missAlignedTarget_5[4] = _zz_execute_BranchPlugin_missAlignedTarget_4; + _zz_execute_BranchPlugin_missAlignedTarget_5[3] = _zz_execute_BranchPlugin_missAlignedTarget_4; + _zz_execute_BranchPlugin_missAlignedTarget_5[2] = _zz_execute_BranchPlugin_missAlignedTarget_4; + _zz_execute_BranchPlugin_missAlignedTarget_5[1] = _zz_execute_BranchPlugin_missAlignedTarget_4; + _zz_execute_BranchPlugin_missAlignedTarget_5[0] = _zz_execute_BranchPlugin_missAlignedTarget_4; + end + + always @(*) begin + case(execute_BRANCH_CTRL) + `BranchCtrlEnum_binary_sequential_JALR : begin + _zz_execute_BranchPlugin_missAlignedTarget_6 = (_zz__zz_execute_BranchPlugin_missAlignedTarget_6[1] ^ execute_RS1[1]); + end + `BranchCtrlEnum_binary_sequential_JAL : begin + _zz_execute_BranchPlugin_missAlignedTarget_6 = _zz__zz_execute_BranchPlugin_missAlignedTarget_6_1[1]; + end + default : begin + _zz_execute_BranchPlugin_missAlignedTarget_6 = _zz__zz_execute_BranchPlugin_missAlignedTarget_6_2[1]; + end + endcase + end + + assign execute_BranchPlugin_missAlignedTarget = (execute_BRANCH_COND_RESULT && _zz_execute_BranchPlugin_missAlignedTarget_6); + always @(*) begin + case(execute_BRANCH_CTRL) + `BranchCtrlEnum_binary_sequential_JALR : begin + execute_BranchPlugin_branch_src1 = execute_RS1; + end + default : begin + execute_BranchPlugin_branch_src1 = execute_PC; + end + endcase + end + + assign _zz_execute_BranchPlugin_branch_src2 = execute_INSTRUCTION[31]; + always @(*) begin + _zz_execute_BranchPlugin_branch_src2_1[19] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[18] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[17] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[16] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[15] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[14] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[13] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[12] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[11] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[10] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[9] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[8] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[7] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[6] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[5] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[4] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[3] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[2] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[1] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[0] = _zz_execute_BranchPlugin_branch_src2; + end + + always @(*) begin + case(execute_BRANCH_CTRL) + `BranchCtrlEnum_binary_sequential_JALR : begin + execute_BranchPlugin_branch_src2 = {_zz_execute_BranchPlugin_branch_src2_1,execute_INSTRUCTION[31 : 20]}; + end + default : begin + execute_BranchPlugin_branch_src2 = ((execute_BRANCH_CTRL == `BranchCtrlEnum_binary_sequential_JAL) ? {{_zz_execute_BranchPlugin_branch_src2_3,{{{_zz_execute_BranchPlugin_branch_src2_6,execute_INSTRUCTION[19 : 12]},execute_INSTRUCTION[20]},execute_INSTRUCTION[30 : 21]}},1'b0} : {{_zz_execute_BranchPlugin_branch_src2_5,{{{_zz_execute_BranchPlugin_branch_src2_7,_zz_execute_BranchPlugin_branch_src2_8},execute_INSTRUCTION[30 : 25]},execute_INSTRUCTION[11 : 8]}},1'b0}); + if(execute_PREDICTION_HAD_BRANCHED2) begin + execute_BranchPlugin_branch_src2 = {29'd0, _zz_execute_BranchPlugin_branch_src2_9}; + end + end + endcase + end + + assign _zz_execute_BranchPlugin_branch_src2_2 = _zz__zz_execute_BranchPlugin_branch_src2_2[19]; + always @(*) begin + _zz_execute_BranchPlugin_branch_src2_3[10] = _zz_execute_BranchPlugin_branch_src2_2; + _zz_execute_BranchPlugin_branch_src2_3[9] = _zz_execute_BranchPlugin_branch_src2_2; + _zz_execute_BranchPlugin_branch_src2_3[8] = _zz_execute_BranchPlugin_branch_src2_2; + _zz_execute_BranchPlugin_branch_src2_3[7] = _zz_execute_BranchPlugin_branch_src2_2; + _zz_execute_BranchPlugin_branch_src2_3[6] = _zz_execute_BranchPlugin_branch_src2_2; + _zz_execute_BranchPlugin_branch_src2_3[5] = _zz_execute_BranchPlugin_branch_src2_2; + _zz_execute_BranchPlugin_branch_src2_3[4] = _zz_execute_BranchPlugin_branch_src2_2; + _zz_execute_BranchPlugin_branch_src2_3[3] = _zz_execute_BranchPlugin_branch_src2_2; + _zz_execute_BranchPlugin_branch_src2_3[2] = _zz_execute_BranchPlugin_branch_src2_2; + _zz_execute_BranchPlugin_branch_src2_3[1] = _zz_execute_BranchPlugin_branch_src2_2; + _zz_execute_BranchPlugin_branch_src2_3[0] = _zz_execute_BranchPlugin_branch_src2_2; + end + + assign _zz_execute_BranchPlugin_branch_src2_4 = _zz__zz_execute_BranchPlugin_branch_src2_4[11]; + always @(*) begin + _zz_execute_BranchPlugin_branch_src2_5[18] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[17] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[16] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[15] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[14] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[13] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[12] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[11] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[10] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[9] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[8] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[7] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[6] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[5] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[4] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[3] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[2] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[1] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[0] = _zz_execute_BranchPlugin_branch_src2_4; + end + + assign execute_BranchPlugin_branchAdder = (execute_BranchPlugin_branch_src1 + execute_BranchPlugin_branch_src2); + assign BranchPlugin_jumpInterface_valid = ((execute_arbitration_isValid && execute_BRANCH_DO) && (! 1'b0)); + assign BranchPlugin_jumpInterface_payload = execute_BRANCH_CALC; + always @(*) begin + BranchPlugin_branchExceptionPort_valid = (execute_arbitration_isValid && (execute_BRANCH_DO && execute_BRANCH_CALC[1])); + if(when_BranchPlugin_l296) begin + BranchPlugin_branchExceptionPort_valid = 1'b0; + end + end + + assign BranchPlugin_branchExceptionPort_payload_code = 4'b0000; + assign BranchPlugin_branchExceptionPort_payload_badAddr = execute_BRANCH_CALC; + assign when_BranchPlugin_l296 = 1'b0; + assign IBusCachedPlugin_decodePrediction_rsp_wasWrong = BranchPlugin_jumpInterface_valid; + always @(*) begin + CsrPlugin_privilege = 2'b11; + if(CsrPlugin_forceMachineWire) begin + CsrPlugin_privilege = 2'b11; + end + end + + assign _zz_when_CsrPlugin_l952 = (CsrPlugin_mip_MTIP && CsrPlugin_mie_MTIE); + assign _zz_when_CsrPlugin_l952_1 = (CsrPlugin_mip_MSIP && CsrPlugin_mie_MSIE); + assign _zz_when_CsrPlugin_l952_2 = (CsrPlugin_mip_MEIP && CsrPlugin_mie_MEIE); + assign CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilegeUncapped = 2'b11; + assign CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilege = ((CsrPlugin_privilege < CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilegeUncapped) ? CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilegeUncapped : CsrPlugin_privilege); + assign _zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code = {decodeExceptionPort_valid,IBusCachedPlugin_decodeExceptionPort_valid}; + assign _zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_1 = _zz__zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_1[0]; + assign _zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_2 = {CsrPlugin_selfException_valid,BranchPlugin_branchExceptionPort_valid}; + assign _zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_3 = _zz__zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_3[0]; + always @(*) begin + CsrPlugin_exceptionPortCtrl_exceptionValids_decode = CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_decode; + if(_zz_when) begin + CsrPlugin_exceptionPortCtrl_exceptionValids_decode = 1'b1; + end + if(decode_arbitration_isFlushed) begin + CsrPlugin_exceptionPortCtrl_exceptionValids_decode = 1'b0; + end + end + + always @(*) begin + CsrPlugin_exceptionPortCtrl_exceptionValids_execute = CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_execute; + if(_zz_when_1) begin + CsrPlugin_exceptionPortCtrl_exceptionValids_execute = 1'b1; + end + if(execute_arbitration_isFlushed) begin + CsrPlugin_exceptionPortCtrl_exceptionValids_execute = 1'b0; + end + end + + always @(*) begin + CsrPlugin_exceptionPortCtrl_exceptionValids_memory = CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_memory; + if(memory_arbitration_isFlushed) begin + CsrPlugin_exceptionPortCtrl_exceptionValids_memory = 1'b0; + end + end + + always @(*) begin + CsrPlugin_exceptionPortCtrl_exceptionValids_writeBack = CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_writeBack; + if(DBusCachedPlugin_exceptionBus_valid) begin + CsrPlugin_exceptionPortCtrl_exceptionValids_writeBack = 1'b1; + end + if(writeBack_arbitration_isFlushed) begin + CsrPlugin_exceptionPortCtrl_exceptionValids_writeBack = 1'b0; + end + end + + assign when_CsrPlugin_l909 = (! decode_arbitration_isStuck); + assign when_CsrPlugin_l909_1 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l909_2 = (! memory_arbitration_isStuck); + assign when_CsrPlugin_l909_3 = (! writeBack_arbitration_isStuck); + assign when_CsrPlugin_l922 = ({CsrPlugin_exceptionPortCtrl_exceptionValids_writeBack,{CsrPlugin_exceptionPortCtrl_exceptionValids_memory,{CsrPlugin_exceptionPortCtrl_exceptionValids_execute,CsrPlugin_exceptionPortCtrl_exceptionValids_decode}}} != 4'b0000); + assign CsrPlugin_exceptionPendings_0 = CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_decode; + assign CsrPlugin_exceptionPendings_1 = CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_execute; + assign CsrPlugin_exceptionPendings_2 = CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_memory; + assign CsrPlugin_exceptionPendings_3 = CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_writeBack; + assign when_CsrPlugin_l946 = (CsrPlugin_mstatus_MIE || (CsrPlugin_privilege < 2'b11)); + assign when_CsrPlugin_l952 = ((_zz_when_CsrPlugin_l952 && 1'b1) && (! 1'b0)); + assign when_CsrPlugin_l952_1 = ((_zz_when_CsrPlugin_l952_1 && 1'b1) && (! 1'b0)); + assign when_CsrPlugin_l952_2 = ((_zz_when_CsrPlugin_l952_2 && 1'b1) && (! 1'b0)); + assign CsrPlugin_exception = (CsrPlugin_exceptionPortCtrl_exceptionValids_writeBack && CsrPlugin_allowException); + assign CsrPlugin_pipelineLiberator_active = ((CsrPlugin_interrupt_valid && CsrPlugin_allowInterrupts) && decode_arbitration_isValid); + assign when_CsrPlugin_l980 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l980_1 = (! memory_arbitration_isStuck); + assign when_CsrPlugin_l980_2 = (! writeBack_arbitration_isStuck); + assign when_CsrPlugin_l985 = ((! CsrPlugin_pipelineLiberator_active) || decode_arbitration_removeIt); + always @(*) begin + CsrPlugin_pipelineLiberator_done = CsrPlugin_pipelineLiberator_pcValids_2; + if(when_CsrPlugin_l991) begin + CsrPlugin_pipelineLiberator_done = 1'b0; + end + if(CsrPlugin_hadException) begin + CsrPlugin_pipelineLiberator_done = 1'b0; + end + end + + assign when_CsrPlugin_l991 = ({CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_writeBack,{CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_memory,CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_execute}} != 3'b000); + assign CsrPlugin_interruptJump = ((CsrPlugin_interrupt_valid && CsrPlugin_pipelineLiberator_done) && CsrPlugin_allowInterrupts); + always @(*) begin + CsrPlugin_targetPrivilege = CsrPlugin_interrupt_targetPrivilege; + if(CsrPlugin_hadException) begin + CsrPlugin_targetPrivilege = CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilege; + end + end + + always @(*) begin + CsrPlugin_trapCause = CsrPlugin_interrupt_code; + if(CsrPlugin_hadException) begin + CsrPlugin_trapCause = CsrPlugin_exceptionPortCtrl_exceptionContext_code; + end + end + + always @(*) begin + CsrPlugin_xtvec_mode = 2'bxx; + case(CsrPlugin_targetPrivilege) + 2'b11 : begin + CsrPlugin_xtvec_mode = CsrPlugin_mtvec_mode; + end + default : begin + end + endcase + end + + always @(*) begin + CsrPlugin_xtvec_base = 30'bxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx; + case(CsrPlugin_targetPrivilege) + 2'b11 : begin + CsrPlugin_xtvec_base = CsrPlugin_mtvec_base; + end + default : begin + end + endcase + end + + assign when_CsrPlugin_l1019 = (CsrPlugin_hadException || CsrPlugin_interruptJump); + assign when_CsrPlugin_l1064 = (writeBack_arbitration_isValid && (writeBack_ENV_CTRL == `EnvCtrlEnum_binary_sequential_XRET)); + assign switch_CsrPlugin_l1068 = writeBack_INSTRUCTION[29 : 28]; + assign contextSwitching = CsrPlugin_jumpInterface_valid; + assign when_CsrPlugin_l1108 = (execute_arbitration_isValid && (execute_ENV_CTRL == `EnvCtrlEnum_binary_sequential_WFI)); + assign when_CsrPlugin_l1110 = (! execute_CsrPlugin_wfiWake); + assign when_CsrPlugin_l1116 = ({(writeBack_arbitration_isValid && (writeBack_ENV_CTRL == `EnvCtrlEnum_binary_sequential_XRET)),{(memory_arbitration_isValid && (memory_ENV_CTRL == `EnvCtrlEnum_binary_sequential_XRET)),(execute_arbitration_isValid && (execute_ENV_CTRL == `EnvCtrlEnum_binary_sequential_XRET))}} != 3'b000); + assign execute_CsrPlugin_blockedBySideEffects = (({writeBack_arbitration_isValid,memory_arbitration_isValid} != 2'b00) || 1'b0); + always @(*) begin + execute_CsrPlugin_illegalAccess = 1'b1; + if(execute_CsrPlugin_csr_3264) begin + if(execute_CSR_READ_OPCODE) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + end + if(execute_CsrPlugin_csr_3857) begin + if(execute_CSR_READ_OPCODE) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + end + if(execute_CsrPlugin_csr_3858) begin + if(execute_CSR_READ_OPCODE) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + end + if(execute_CsrPlugin_csr_3859) begin + if(execute_CSR_READ_OPCODE) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + end + if(execute_CsrPlugin_csr_3860) begin + if(execute_CSR_READ_OPCODE) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + end + if(execute_CsrPlugin_csr_769) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(execute_CsrPlugin_csr_768) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(execute_CsrPlugin_csr_836) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(execute_CsrPlugin_csr_772) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(execute_CsrPlugin_csr_773) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(execute_CsrPlugin_csr_833) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(execute_CsrPlugin_csr_832) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(execute_CsrPlugin_csr_834) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(execute_CsrPlugin_csr_835) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(execute_CsrPlugin_csr_2816) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(execute_CsrPlugin_csr_2944) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(execute_CsrPlugin_csr_2818) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(execute_CsrPlugin_csr_2946) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(execute_CsrPlugin_csr_3072) begin + if(execute_CSR_READ_OPCODE) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + end + if(execute_CsrPlugin_csr_3200) begin + if(execute_CSR_READ_OPCODE) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + end + if(execute_CsrPlugin_csr_3074) begin + if(execute_CSR_READ_OPCODE) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + end + if(execute_CsrPlugin_csr_3202) begin + if(execute_CSR_READ_OPCODE) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + end + if(execute_CsrPlugin_csr_3008) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(execute_CsrPlugin_csr_4032) begin + if(execute_CSR_READ_OPCODE) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + end + if(execute_CsrPlugin_csr_2820) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(execute_CsrPlugin_csr_2821) begin + if(execute_CSR_WRITE_OPCODE) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + end + if(execute_CsrPlugin_csr_2822) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(execute_CsrPlugin_csr_2823) begin + if(execute_CSR_WRITE_OPCODE) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + end + if(execute_CsrPlugin_csr_2824) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(execute_CsrPlugin_csr_2825) begin + if(execute_CSR_WRITE_OPCODE) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + end + if(execute_CsrPlugin_csr_2826) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(execute_CsrPlugin_csr_2827) begin + if(execute_CSR_WRITE_OPCODE) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + end + if(execute_CsrPlugin_csr_2828) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(execute_CsrPlugin_csr_2829) begin + if(execute_CSR_WRITE_OPCODE) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + end + if(execute_CsrPlugin_csr_2830) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(execute_CsrPlugin_csr_2831) begin + if(execute_CSR_WRITE_OPCODE) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + end + if(execute_CsrPlugin_csr_2832) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(execute_CsrPlugin_csr_2833) begin + if(execute_CSR_WRITE_OPCODE) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + end + if(execute_CsrPlugin_csr_2834) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(execute_CsrPlugin_csr_2835) begin + if(execute_CSR_WRITE_OPCODE) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + end + if(CsrPlugin_csrMapping_allowCsrSignal) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(when_CsrPlugin_l1297) begin + execute_CsrPlugin_illegalAccess = 1'b1; + end + if(when_CsrPlugin_l1302) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + end + + always @(*) begin + execute_CsrPlugin_illegalInstruction = 1'b0; + if(when_CsrPlugin_l1136) begin + if(when_CsrPlugin_l1137) begin + execute_CsrPlugin_illegalInstruction = 1'b1; + end + end + end + + always @(*) begin + CsrPlugin_selfException_valid = 1'b0; + if(when_CsrPlugin_l1129) begin + CsrPlugin_selfException_valid = 1'b1; + end + if(when_CsrPlugin_l1144) begin + CsrPlugin_selfException_valid = 1'b1; + end + end + + always @(*) begin + CsrPlugin_selfException_payload_code = 4'bxxxx; + if(when_CsrPlugin_l1129) begin + CsrPlugin_selfException_payload_code = 4'b0010; + end + if(when_CsrPlugin_l1144) begin + case(CsrPlugin_privilege) + 2'b00 : begin + CsrPlugin_selfException_payload_code = 4'b1000; + end + default : begin + CsrPlugin_selfException_payload_code = 4'b1011; + end + endcase + end + end + + assign CsrPlugin_selfException_payload_badAddr = execute_INSTRUCTION; + assign when_CsrPlugin_l1129 = (execute_CsrPlugin_illegalAccess || execute_CsrPlugin_illegalInstruction); + assign when_CsrPlugin_l1136 = (execute_arbitration_isValid && (execute_ENV_CTRL == `EnvCtrlEnum_binary_sequential_XRET)); + assign when_CsrPlugin_l1137 = (CsrPlugin_privilege < execute_INSTRUCTION[29 : 28]); + assign when_CsrPlugin_l1144 = (execute_arbitration_isValid && (execute_ENV_CTRL == `EnvCtrlEnum_binary_sequential_ECALL)); + always @(*) begin + execute_CsrPlugin_writeInstruction = ((execute_arbitration_isValid && execute_IS_CSR) && execute_CSR_WRITE_OPCODE); + if(when_CsrPlugin_l1297) begin + execute_CsrPlugin_writeInstruction = 1'b0; + end + end + + always @(*) begin + execute_CsrPlugin_readInstruction = ((execute_arbitration_isValid && execute_IS_CSR) && execute_CSR_READ_OPCODE); + if(when_CsrPlugin_l1297) begin + execute_CsrPlugin_readInstruction = 1'b0; + end + end + + assign execute_CsrPlugin_writeEnable = (execute_CsrPlugin_writeInstruction && (! execute_arbitration_isStuck)); + assign execute_CsrPlugin_readEnable = (execute_CsrPlugin_readInstruction && (! execute_arbitration_isStuck)); + assign CsrPlugin_csrMapping_hazardFree = (! execute_CsrPlugin_blockedBySideEffects); + assign execute_CsrPlugin_readToWriteData = CsrPlugin_csrMapping_readDataSignal; + assign switch_Misc_l200_2 = execute_INSTRUCTION[13]; + always @(*) begin + case(switch_Misc_l200_2) + 1'b0 : begin + _zz_CsrPlugin_csrMapping_writeDataSignal = execute_SRC1; + end + default : begin + _zz_CsrPlugin_csrMapping_writeDataSignal = (execute_INSTRUCTION[12] ? (execute_CsrPlugin_readToWriteData & (~ execute_SRC1)) : (execute_CsrPlugin_readToWriteData | execute_SRC1)); + end + endcase + end + + assign CsrPlugin_csrMapping_writeDataSignal = _zz_CsrPlugin_csrMapping_writeDataSignal; + assign when_CsrPlugin_l1176 = (execute_arbitration_isValid && execute_IS_CSR); + assign when_CsrPlugin_l1180 = (execute_arbitration_isValid && (execute_IS_CSR || 1'b0)); + assign execute_CsrPlugin_csrAddress = execute_INSTRUCTION[31 : 20]; + assign execute_MulPlugin_a = execute_RS1; + assign execute_MulPlugin_b = execute_RS2; + assign switch_MulPlugin_l87 = execute_INSTRUCTION[13 : 12]; + always @(*) begin + case(switch_MulPlugin_l87) + 2'b01 : begin + execute_MulPlugin_aSigned = 1'b1; + end + 2'b10 : begin + execute_MulPlugin_aSigned = 1'b1; + end + default : begin + execute_MulPlugin_aSigned = 1'b0; + end + endcase + end + + always @(*) begin + case(switch_MulPlugin_l87) + 2'b01 : begin + execute_MulPlugin_bSigned = 1'b1; + end + 2'b10 : begin + execute_MulPlugin_bSigned = 1'b0; + end + default : begin + execute_MulPlugin_bSigned = 1'b0; + end + endcase + end + + assign execute_MulPlugin_aULow = execute_MulPlugin_a[15 : 0]; + assign execute_MulPlugin_bULow = execute_MulPlugin_b[15 : 0]; + assign execute_MulPlugin_aSLow = {1'b0,execute_MulPlugin_a[15 : 0]}; + assign execute_MulPlugin_bSLow = {1'b0,execute_MulPlugin_b[15 : 0]}; + assign execute_MulPlugin_aHigh = {(execute_MulPlugin_aSigned && execute_MulPlugin_a[31]),execute_MulPlugin_a[31 : 16]}; + assign execute_MulPlugin_bHigh = {(execute_MulPlugin_bSigned && execute_MulPlugin_b[31]),execute_MulPlugin_b[31 : 16]}; + assign writeBack_MulPlugin_result = ($signed(_zz_writeBack_MulPlugin_result) + $signed(_zz_writeBack_MulPlugin_result_1)); + assign when_MulPlugin_l147 = (writeBack_arbitration_isValid && writeBack_IS_MUL); + assign switch_MulPlugin_l148 = writeBack_INSTRUCTION[13 : 12]; + assign memory_DivPlugin_frontendOk = 1'b1; + always @(*) begin + memory_DivPlugin_div_counter_willIncrement = 1'b0; + if(when_MulDivIterativePlugin_l128) begin + if(when_MulDivIterativePlugin_l132) begin + memory_DivPlugin_div_counter_willIncrement = 1'b1; + end + end + end + + always @(*) begin + memory_DivPlugin_div_counter_willClear = 1'b0; + if(when_MulDivIterativePlugin_l162) begin + memory_DivPlugin_div_counter_willClear = 1'b1; + end + end + + assign memory_DivPlugin_div_counter_willOverflowIfInc = (memory_DivPlugin_div_counter_value == 6'h21); + assign memory_DivPlugin_div_counter_willOverflow = (memory_DivPlugin_div_counter_willOverflowIfInc && memory_DivPlugin_div_counter_willIncrement); + always @(*) begin + if(memory_DivPlugin_div_counter_willOverflow) begin + memory_DivPlugin_div_counter_valueNext = 6'h0; + end else begin + memory_DivPlugin_div_counter_valueNext = (memory_DivPlugin_div_counter_value + _zz_memory_DivPlugin_div_counter_valueNext); + end + if(memory_DivPlugin_div_counter_willClear) begin + memory_DivPlugin_div_counter_valueNext = 6'h0; + end + end + + assign when_MulDivIterativePlugin_l126 = (memory_DivPlugin_div_counter_value == 6'h20); + assign when_MulDivIterativePlugin_l126_1 = (! memory_arbitration_isStuck); + assign when_MulDivIterativePlugin_l128 = (memory_arbitration_isValid && memory_IS_DIV); + assign when_MulDivIterativePlugin_l129 = ((! memory_DivPlugin_frontendOk) || (! memory_DivPlugin_div_done)); + assign when_MulDivIterativePlugin_l132 = (memory_DivPlugin_frontendOk && (! memory_DivPlugin_div_done)); + assign _zz_memory_DivPlugin_div_stage_0_remainderShifted = memory_DivPlugin_rs1[31 : 0]; + assign memory_DivPlugin_div_stage_0_remainderShifted = {memory_DivPlugin_accumulator[31 : 0],_zz_memory_DivPlugin_div_stage_0_remainderShifted[31]}; + assign memory_DivPlugin_div_stage_0_remainderMinusDenominator = (memory_DivPlugin_div_stage_0_remainderShifted - _zz_memory_DivPlugin_div_stage_0_remainderMinusDenominator); + assign memory_DivPlugin_div_stage_0_outRemainder = ((! memory_DivPlugin_div_stage_0_remainderMinusDenominator[32]) ? _zz_memory_DivPlugin_div_stage_0_outRemainder : _zz_memory_DivPlugin_div_stage_0_outRemainder_1); + assign memory_DivPlugin_div_stage_0_outNumerator = _zz_memory_DivPlugin_div_stage_0_outNumerator[31:0]; + assign when_MulDivIterativePlugin_l151 = (memory_DivPlugin_div_counter_value == 6'h20); + assign _zz_memory_DivPlugin_div_result = (memory_INSTRUCTION[13] ? memory_DivPlugin_accumulator[31 : 0] : memory_DivPlugin_rs1[31 : 0]); + assign when_MulDivIterativePlugin_l162 = (! memory_arbitration_isStuck); + assign _zz_memory_DivPlugin_rs2 = (execute_RS2[31] && execute_IS_RS2_SIGNED); + assign _zz_memory_DivPlugin_rs1 = (1'b0 || ((execute_IS_DIV && execute_RS1[31]) && execute_IS_RS1_SIGNED)); + always @(*) begin + _zz_memory_DivPlugin_rs1_1[32] = (execute_IS_RS1_SIGNED && execute_RS1[31]); + _zz_memory_DivPlugin_rs1_1[31 : 0] = execute_RS1; + end + + assign _zz_CsrPlugin_csrMapping_readDataInit_1 = (_zz_CsrPlugin_csrMapping_readDataInit & externalInterruptArray_regNext); + assign externalInterrupt = (_zz_CsrPlugin_csrMapping_readDataInit_1 != 32'h0); + assign when_DebugPlugin_l225 = (DebugPlugin_haltIt && (! DebugPlugin_isPipBusy)); + assign DebugPlugin_allowEBreak = (DebugPlugin_debugUsed && (! DebugPlugin_disableEbreak)); + always @(*) begin + debug_bus_cmd_ready = 1'b1; + if(debug_bus_cmd_valid) begin + case(switch_DebugPlugin_l256) + 6'h01 : begin + if(debug_bus_cmd_payload_wr) begin + debug_bus_cmd_ready = IBusCachedPlugin_injectionPort_ready; + end + end + default : begin + end + endcase + end + end + + always @(*) begin + debug_bus_rsp_data = DebugPlugin_busReadDataReg; + if(when_DebugPlugin_l244) begin + debug_bus_rsp_data[0] = DebugPlugin_resetIt; + debug_bus_rsp_data[1] = DebugPlugin_haltIt; + debug_bus_rsp_data[2] = DebugPlugin_isPipBusy; + debug_bus_rsp_data[3] = DebugPlugin_haltedByBreak; + debug_bus_rsp_data[4] = DebugPlugin_stepIt; + end + end + + assign when_DebugPlugin_l244 = (! _zz_when_DebugPlugin_l244); + always @(*) begin + IBusCachedPlugin_injectionPort_valid = 1'b0; + if(debug_bus_cmd_valid) begin + case(switch_DebugPlugin_l256) + 6'h01 : begin + if(debug_bus_cmd_payload_wr) begin + IBusCachedPlugin_injectionPort_valid = 1'b1; + end + end + default : begin + end + endcase + end + end + + assign IBusCachedPlugin_injectionPort_payload = debug_bus_cmd_payload_data; + assign switch_DebugPlugin_l256 = debug_bus_cmd_payload_address[7 : 2]; + assign when_DebugPlugin_l260 = debug_bus_cmd_payload_data[16]; + assign when_DebugPlugin_l260_1 = debug_bus_cmd_payload_data[24]; + assign when_DebugPlugin_l261 = debug_bus_cmd_payload_data[17]; + assign when_DebugPlugin_l261_1 = debug_bus_cmd_payload_data[25]; + assign when_DebugPlugin_l262 = debug_bus_cmd_payload_data[25]; + assign when_DebugPlugin_l263 = debug_bus_cmd_payload_data[25]; + assign when_DebugPlugin_l264 = debug_bus_cmd_payload_data[18]; + assign when_DebugPlugin_l264_1 = debug_bus_cmd_payload_data[26]; + assign when_DebugPlugin_l284 = (execute_arbitration_isValid && execute_DO_EBREAK); + assign when_DebugPlugin_l287 = (({writeBack_arbitration_isValid,memory_arbitration_isValid} != 2'b00) == 1'b0); + assign when_DebugPlugin_l300 = (DebugPlugin_stepIt && IBusCachedPlugin_incomingInstruction); + assign debug_resetOut = DebugPlugin_resetIt_regNext; + assign when_DebugPlugin_l316 = (DebugPlugin_haltIt || DebugPlugin_stepIt); + assign execute_CfuPlugin_schedule = (execute_arbitration_isValid && execute_CfuPlugin_CFU_ENABLE); + assign CfuPlugin_bus_cmd_fire = (CfuPlugin_bus_cmd_valid && CfuPlugin_bus_cmd_ready); + assign when_CfuPlugin_l171 = (! execute_arbitration_isStuckByOthers); + assign CfuPlugin_bus_cmd_valid = ((execute_CfuPlugin_schedule || execute_CfuPlugin_hold) && (! execute_CfuPlugin_fired)); + assign when_CfuPlugin_l175 = (CfuPlugin_bus_cmd_valid && (! CfuPlugin_bus_cmd_ready)); + assign execute_CfuPlugin_functionsIds_0 = _zz_execute_CfuPlugin_functionsIds_0; + assign CfuPlugin_bus_cmd_payload_function_id = execute_CfuPlugin_functionsIds_0; + assign CfuPlugin_bus_cmd_payload_inputs_0 = execute_RS1; + assign _zz_CfuPlugin_bus_cmd_payload_inputs_1 = execute_INSTRUCTION[31]; + always @(*) begin + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[23] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[22] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[21] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[20] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[19] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[18] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[17] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[16] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[15] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[14] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[13] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[12] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[11] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[10] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[9] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[8] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[7] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[6] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[5] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[4] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[3] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[2] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[1] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[0] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + end + + always @(*) begin + case(execute_CfuPlugin_CFU_INPUT_2_KIND) + `Input2Kind_binary_sequential_RS : begin + _zz_CfuPlugin_bus_cmd_payload_inputs_1_2 = execute_RS2; + end + default : begin + _zz_CfuPlugin_bus_cmd_payload_inputs_1_2 = {_zz_CfuPlugin_bus_cmd_payload_inputs_1_1,execute_INSTRUCTION[31 : 24]}; + end + endcase + end + + assign CfuPlugin_bus_cmd_payload_inputs_1 = _zz_CfuPlugin_bus_cmd_payload_inputs_1_2; + assign CfuPlugin_bus_rsp_ready = (! CfuPlugin_bus_rsp_rValid); + assign CfuPlugin_bus_rsp_rsp_valid = (CfuPlugin_bus_rsp_valid || CfuPlugin_bus_rsp_rValid); + assign CfuPlugin_bus_rsp_rsp_payload_outputs_0 = (CfuPlugin_bus_rsp_rValid ? CfuPlugin_bus_rsp_rData_outputs_0 : CfuPlugin_bus_rsp_payload_outputs_0); + always @(*) begin + CfuPlugin_bus_rsp_rsp_ready = 1'b0; + if(memory_CfuPlugin_CFU_IN_FLIGHT) begin + CfuPlugin_bus_rsp_rsp_ready = (! memory_arbitration_isStuckByOthers); + end + end + + assign when_CfuPlugin_l208 = (! CfuPlugin_bus_rsp_rsp_valid); + assign when_GenCoreDefault_l367 = _zz_when_GenCoreDefault_l367[0]; + assign when_GenCoreDefault_l367_1 = _zz_when_GenCoreDefault_l367_1[0]; + assign when_GenCoreDefault_l367_2 = _zz_when_GenCoreDefault_l367_2[0]; + assign when_GenCoreDefault_l367_3 = _zz_when_GenCoreDefault_l367_3[0]; + assign when_GenCoreDefault_l367_4 = _zz_when_GenCoreDefault_l367_4[0]; + assign when_GenCoreDefault_l367_5 = _zz_when_GenCoreDefault_l367_5[0]; + assign when_GenCoreDefault_l367_6 = _zz_when_GenCoreDefault_l367_6[0]; + assign when_GenCoreDefault_l367_7 = _zz_when_GenCoreDefault_l367_7[0]; + assign when_Pipeline_l124 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_1 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_2 = ((! writeBack_arbitration_isStuck) && (! CsrPlugin_exceptionPortCtrl_exceptionValids_writeBack)); + assign when_Pipeline_l124_3 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_4 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_5 = (! writeBack_arbitration_isStuck); + assign when_Pipeline_l124_6 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_7 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_8 = (! writeBack_arbitration_isStuck); + assign when_Pipeline_l124_9 = (! execute_arbitration_isStuck); + assign _zz_decode_to_execute_SRC1_CTRL_1 = decode_SRC1_CTRL; + assign _zz_decode_SRC1_CTRL = _zz_decode_SRC1_CTRL_1; + assign when_Pipeline_l124_10 = (! execute_arbitration_isStuck); + assign _zz_execute_SRC1_CTRL = decode_to_execute_SRC1_CTRL; + assign when_Pipeline_l124_11 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_12 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_13 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_14 = (! writeBack_arbitration_isStuck); + assign _zz_decode_to_execute_ALU_CTRL_1 = decode_ALU_CTRL; + assign _zz_decode_ALU_CTRL = _zz_decode_ALU_CTRL_1; + assign when_Pipeline_l124_15 = (! execute_arbitration_isStuck); + assign _zz_execute_ALU_CTRL = decode_to_execute_ALU_CTRL; + assign _zz_decode_to_execute_SRC2_CTRL_1 = decode_SRC2_CTRL; + assign _zz_decode_SRC2_CTRL = _zz_decode_SRC2_CTRL_1; + assign when_Pipeline_l124_16 = (! execute_arbitration_isStuck); + assign _zz_execute_SRC2_CTRL = decode_to_execute_SRC2_CTRL; + assign when_Pipeline_l124_17 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_18 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_19 = (! writeBack_arbitration_isStuck); + assign when_Pipeline_l124_20 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_21 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_22 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_23 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_24 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_25 = (! writeBack_arbitration_isStuck); + assign when_Pipeline_l124_26 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_27 = (! execute_arbitration_isStuck); + assign _zz_decode_to_execute_ALU_BITWISE_CTRL_1 = decode_ALU_BITWISE_CTRL; + assign _zz_decode_ALU_BITWISE_CTRL = _zz_decode_ALU_BITWISE_CTRL_1; + assign when_Pipeline_l124_28 = (! execute_arbitration_isStuck); + assign _zz_execute_ALU_BITWISE_CTRL = decode_to_execute_ALU_BITWISE_CTRL; + assign _zz_decode_to_execute_SHIFT_CTRL_1 = decode_SHIFT_CTRL; + assign _zz_execute_to_memory_SHIFT_CTRL_1 = execute_SHIFT_CTRL; + assign _zz_decode_SHIFT_CTRL = _zz_decode_SHIFT_CTRL_1; + assign when_Pipeline_l124_29 = (! execute_arbitration_isStuck); + assign _zz_execute_SHIFT_CTRL = decode_to_execute_SHIFT_CTRL; + assign when_Pipeline_l124_30 = (! memory_arbitration_isStuck); + assign _zz_memory_SHIFT_CTRL = execute_to_memory_SHIFT_CTRL; + assign _zz_decode_to_execute_BRANCH_CTRL_1 = decode_BRANCH_CTRL; + assign _zz_decode_BRANCH_CTRL_1 = _zz_decode_BRANCH_CTRL; + assign when_Pipeline_l124_31 = (! execute_arbitration_isStuck); + assign _zz_execute_BRANCH_CTRL = decode_to_execute_BRANCH_CTRL; + assign when_Pipeline_l124_32 = (! execute_arbitration_isStuck); + assign _zz_decode_to_execute_ENV_CTRL_1 = decode_ENV_CTRL; + assign _zz_execute_to_memory_ENV_CTRL_1 = execute_ENV_CTRL; + assign _zz_memory_to_writeBack_ENV_CTRL_1 = memory_ENV_CTRL; + assign _zz_decode_ENV_CTRL = _zz_decode_ENV_CTRL_1; + assign when_Pipeline_l124_33 = (! execute_arbitration_isStuck); + assign _zz_execute_ENV_CTRL = decode_to_execute_ENV_CTRL; + assign when_Pipeline_l124_34 = (! memory_arbitration_isStuck); + assign _zz_memory_ENV_CTRL = execute_to_memory_ENV_CTRL; + assign when_Pipeline_l124_35 = (! writeBack_arbitration_isStuck); + assign _zz_writeBack_ENV_CTRL = memory_to_writeBack_ENV_CTRL; + assign when_Pipeline_l124_36 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_37 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_38 = (! writeBack_arbitration_isStuck); + assign when_Pipeline_l124_39 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_40 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_41 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_42 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_43 = (! execute_arbitration_isStuck); + assign _zz_decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND_1 = decode_CfuPlugin_CFU_INPUT_2_KIND; + assign _zz_decode_CfuPlugin_CFU_INPUT_2_KIND = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_1; + assign when_Pipeline_l124_44 = (! execute_arbitration_isStuck); + assign _zz_execute_CfuPlugin_CFU_INPUT_2_KIND = decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND; + assign when_Pipeline_l124_45 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_46 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_47 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_48 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_49 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_50 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_51 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_52 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_53 = (! writeBack_arbitration_isStuck); + assign when_Pipeline_l124_54 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_55 = (! writeBack_arbitration_isStuck); + assign when_Pipeline_l124_56 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_57 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_58 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_59 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_60 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_61 = (! writeBack_arbitration_isStuck); + assign when_Pipeline_l124_62 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_63 = (! writeBack_arbitration_isStuck); + assign when_Pipeline_l124_64 = (! writeBack_arbitration_isStuck); + assign decode_arbitration_isFlushed = (({writeBack_arbitration_flushNext,{memory_arbitration_flushNext,execute_arbitration_flushNext}} != 3'b000) || ({writeBack_arbitration_flushIt,{memory_arbitration_flushIt,{execute_arbitration_flushIt,decode_arbitration_flushIt}}} != 4'b0000)); + assign execute_arbitration_isFlushed = (({writeBack_arbitration_flushNext,memory_arbitration_flushNext} != 2'b00) || ({writeBack_arbitration_flushIt,{memory_arbitration_flushIt,execute_arbitration_flushIt}} != 3'b000)); + assign memory_arbitration_isFlushed = ((writeBack_arbitration_flushNext != 1'b0) || ({writeBack_arbitration_flushIt,memory_arbitration_flushIt} != 2'b00)); + assign writeBack_arbitration_isFlushed = (1'b0 || (writeBack_arbitration_flushIt != 1'b0)); + assign decode_arbitration_isStuckByOthers = (decode_arbitration_haltByOther || (((1'b0 || execute_arbitration_isStuck) || memory_arbitration_isStuck) || writeBack_arbitration_isStuck)); + assign decode_arbitration_isStuck = (decode_arbitration_haltItself || decode_arbitration_isStuckByOthers); + assign decode_arbitration_isMoving = ((! decode_arbitration_isStuck) && (! decode_arbitration_removeIt)); + assign decode_arbitration_isFiring = ((decode_arbitration_isValid && (! decode_arbitration_isStuck)) && (! decode_arbitration_removeIt)); + assign execute_arbitration_isStuckByOthers = (execute_arbitration_haltByOther || ((1'b0 || memory_arbitration_isStuck) || writeBack_arbitration_isStuck)); + assign execute_arbitration_isStuck = (execute_arbitration_haltItself || execute_arbitration_isStuckByOthers); + assign execute_arbitration_isMoving = ((! execute_arbitration_isStuck) && (! execute_arbitration_removeIt)); + assign execute_arbitration_isFiring = ((execute_arbitration_isValid && (! execute_arbitration_isStuck)) && (! execute_arbitration_removeIt)); + assign memory_arbitration_isStuckByOthers = (memory_arbitration_haltByOther || (1'b0 || writeBack_arbitration_isStuck)); + assign memory_arbitration_isStuck = (memory_arbitration_haltItself || memory_arbitration_isStuckByOthers); + assign memory_arbitration_isMoving = ((! memory_arbitration_isStuck) && (! memory_arbitration_removeIt)); + assign memory_arbitration_isFiring = ((memory_arbitration_isValid && (! memory_arbitration_isStuck)) && (! memory_arbitration_removeIt)); + assign writeBack_arbitration_isStuckByOthers = (writeBack_arbitration_haltByOther || 1'b0); + assign writeBack_arbitration_isStuck = (writeBack_arbitration_haltItself || writeBack_arbitration_isStuckByOthers); + assign writeBack_arbitration_isMoving = ((! writeBack_arbitration_isStuck) && (! writeBack_arbitration_removeIt)); + assign writeBack_arbitration_isFiring = ((writeBack_arbitration_isValid && (! writeBack_arbitration_isStuck)) && (! writeBack_arbitration_removeIt)); + assign when_Pipeline_l151 = ((! execute_arbitration_isStuck) || execute_arbitration_removeIt); + assign when_Pipeline_l154 = ((! decode_arbitration_isStuck) && (! decode_arbitration_removeIt)); + assign when_Pipeline_l151_1 = ((! memory_arbitration_isStuck) || memory_arbitration_removeIt); + assign when_Pipeline_l154_1 = ((! execute_arbitration_isStuck) && (! execute_arbitration_removeIt)); + assign when_Pipeline_l151_2 = ((! writeBack_arbitration_isStuck) || writeBack_arbitration_removeIt); + assign when_Pipeline_l154_2 = ((! memory_arbitration_isStuck) && (! memory_arbitration_removeIt)); + always @(*) begin + IBusCachedPlugin_injectionPort_ready = 1'b0; + case(switch_Fetcher_l362) + 3'b100 : begin + IBusCachedPlugin_injectionPort_ready = 1'b1; + end + default : begin + end + endcase + end + + assign when_Fetcher_l378 = (! decode_arbitration_isStuck); + assign when_CsrPlugin_l1264 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_1 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_2 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_3 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_4 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_5 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_6 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_7 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_8 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_9 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_10 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_11 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_12 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_13 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_14 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_15 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_16 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_17 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_18 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_19 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_20 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_21 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_22 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_23 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_24 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_25 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_26 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_27 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_28 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_29 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_30 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_31 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_32 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_33 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_34 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_35 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_36 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_37 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_38 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_39 = (! execute_arbitration_isStuck); + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_10 = 32'h0; + if(execute_CsrPlugin_csr_3264) begin + _zz_CsrPlugin_csrMapping_readDataInit_10[13 : 0] = 14'h2000; + _zz_CsrPlugin_csrMapping_readDataInit_10[25 : 20] = 6'h20; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_11 = 32'h0; + if(execute_CsrPlugin_csr_3857) begin + _zz_CsrPlugin_csrMapping_readDataInit_11[3 : 0] = 4'b1011; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_12 = 32'h0; + if(execute_CsrPlugin_csr_3858) begin + _zz_CsrPlugin_csrMapping_readDataInit_12[4 : 0] = 5'h16; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_13 = 32'h0; + if(execute_CsrPlugin_csr_3859) begin + _zz_CsrPlugin_csrMapping_readDataInit_13[5 : 0] = 6'h21; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_14 = 32'h0; + if(execute_CsrPlugin_csr_769) begin + _zz_CsrPlugin_csrMapping_readDataInit_14[31 : 30] = CsrPlugin_misa_base; + _zz_CsrPlugin_csrMapping_readDataInit_14[25 : 0] = CsrPlugin_misa_extensions; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_15 = 32'h0; + if(execute_CsrPlugin_csr_768) begin + _zz_CsrPlugin_csrMapping_readDataInit_15[12 : 11] = CsrPlugin_mstatus_MPP; + _zz_CsrPlugin_csrMapping_readDataInit_15[7 : 7] = CsrPlugin_mstatus_MPIE; + _zz_CsrPlugin_csrMapping_readDataInit_15[3 : 3] = CsrPlugin_mstatus_MIE; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_16 = 32'h0; + if(execute_CsrPlugin_csr_836) begin + _zz_CsrPlugin_csrMapping_readDataInit_16[11 : 11] = CsrPlugin_mip_MEIP; + _zz_CsrPlugin_csrMapping_readDataInit_16[7 : 7] = CsrPlugin_mip_MTIP; + _zz_CsrPlugin_csrMapping_readDataInit_16[3 : 3] = CsrPlugin_mip_MSIP; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_17 = 32'h0; + if(execute_CsrPlugin_csr_772) begin + _zz_CsrPlugin_csrMapping_readDataInit_17[11 : 11] = CsrPlugin_mie_MEIE; + _zz_CsrPlugin_csrMapping_readDataInit_17[7 : 7] = CsrPlugin_mie_MTIE; + _zz_CsrPlugin_csrMapping_readDataInit_17[3 : 3] = CsrPlugin_mie_MSIE; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_18 = 32'h0; + if(execute_CsrPlugin_csr_773) begin + _zz_CsrPlugin_csrMapping_readDataInit_18[31 : 2] = CsrPlugin_mtvec_base; + _zz_CsrPlugin_csrMapping_readDataInit_18[1 : 0] = CsrPlugin_mtvec_mode; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_19 = 32'h0; + if(execute_CsrPlugin_csr_833) begin + _zz_CsrPlugin_csrMapping_readDataInit_19[31 : 0] = CsrPlugin_mepc; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_20 = 32'h0; + if(execute_CsrPlugin_csr_832) begin + _zz_CsrPlugin_csrMapping_readDataInit_20[31 : 0] = CsrPlugin_mscratch; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_21 = 32'h0; + if(execute_CsrPlugin_csr_834) begin + _zz_CsrPlugin_csrMapping_readDataInit_21[31 : 31] = CsrPlugin_mcause_interrupt; + _zz_CsrPlugin_csrMapping_readDataInit_21[3 : 0] = CsrPlugin_mcause_exceptionCode; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_22 = 32'h0; + if(execute_CsrPlugin_csr_835) begin + _zz_CsrPlugin_csrMapping_readDataInit_22[31 : 0] = CsrPlugin_mtval; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_23 = 32'h0; + if(execute_CsrPlugin_csr_2816) begin + _zz_CsrPlugin_csrMapping_readDataInit_23[31 : 0] = CsrPlugin_mcycle[31 : 0]; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_24 = 32'h0; + if(execute_CsrPlugin_csr_2944) begin + _zz_CsrPlugin_csrMapping_readDataInit_24[31 : 0] = CsrPlugin_mcycle[63 : 32]; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_25 = 32'h0; + if(execute_CsrPlugin_csr_2818) begin + _zz_CsrPlugin_csrMapping_readDataInit_25[31 : 0] = CsrPlugin_minstret[31 : 0]; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_26 = 32'h0; + if(execute_CsrPlugin_csr_2946) begin + _zz_CsrPlugin_csrMapping_readDataInit_26[31 : 0] = CsrPlugin_minstret[63 : 32]; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_27 = 32'h0; + if(execute_CsrPlugin_csr_3072) begin + _zz_CsrPlugin_csrMapping_readDataInit_27[31 : 0] = CsrPlugin_mcycle[31 : 0]; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_28 = 32'h0; + if(execute_CsrPlugin_csr_3200) begin + _zz_CsrPlugin_csrMapping_readDataInit_28[31 : 0] = CsrPlugin_mcycle[63 : 32]; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_29 = 32'h0; + if(execute_CsrPlugin_csr_3074) begin + _zz_CsrPlugin_csrMapping_readDataInit_29[31 : 0] = CsrPlugin_minstret[31 : 0]; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_30 = 32'h0; + if(execute_CsrPlugin_csr_3202) begin + _zz_CsrPlugin_csrMapping_readDataInit_30[31 : 0] = CsrPlugin_minstret[63 : 32]; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_31 = 32'h0; + if(execute_CsrPlugin_csr_3008) begin + _zz_CsrPlugin_csrMapping_readDataInit_31[31 : 0] = _zz_CsrPlugin_csrMapping_readDataInit; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_32 = 32'h0; + if(execute_CsrPlugin_csr_4032) begin + _zz_CsrPlugin_csrMapping_readDataInit_32[31 : 0] = _zz_CsrPlugin_csrMapping_readDataInit_1; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_33 = 32'h0; + if(execute_CsrPlugin_csr_2820) begin + _zz_CsrPlugin_csrMapping_readDataInit_33[31 : 0] = _zz_CsrPlugin_csrMapping_readDataInit_2; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_34 = 32'h0; + if(execute_CsrPlugin_csr_2822) begin + _zz_CsrPlugin_csrMapping_readDataInit_34[31 : 0] = _zz_CsrPlugin_csrMapping_readDataInit_3; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_35 = 32'h0; + if(execute_CsrPlugin_csr_2824) begin + _zz_CsrPlugin_csrMapping_readDataInit_35[31 : 0] = _zz_CsrPlugin_csrMapping_readDataInit_4; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_36 = 32'h0; + if(execute_CsrPlugin_csr_2826) begin + _zz_CsrPlugin_csrMapping_readDataInit_36[31 : 0] = _zz_CsrPlugin_csrMapping_readDataInit_5; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_37 = 32'h0; + if(execute_CsrPlugin_csr_2828) begin + _zz_CsrPlugin_csrMapping_readDataInit_37[31 : 0] = _zz_CsrPlugin_csrMapping_readDataInit_6; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_38 = 32'h0; + if(execute_CsrPlugin_csr_2830) begin + _zz_CsrPlugin_csrMapping_readDataInit_38[31 : 0] = _zz_CsrPlugin_csrMapping_readDataInit_7; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_39 = 32'h0; + if(execute_CsrPlugin_csr_2832) begin + _zz_CsrPlugin_csrMapping_readDataInit_39[31 : 0] = _zz_CsrPlugin_csrMapping_readDataInit_8; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_40 = 32'h0; + if(execute_CsrPlugin_csr_2834) begin + _zz_CsrPlugin_csrMapping_readDataInit_40[31 : 0] = _zz_CsrPlugin_csrMapping_readDataInit_9; + end + end + + assign CsrPlugin_csrMapping_readDataInit = (((((_zz_CsrPlugin_csrMapping_readDataInit_10 | _zz_CsrPlugin_csrMapping_readDataInit_11) | (_zz_CsrPlugin_csrMapping_readDataInit_12 | _zz_CsrPlugin_csrMapping_readDataInit_13)) | ((_zz_CsrPlugin_csrMapping_readDataInit_41 | _zz_CsrPlugin_csrMapping_readDataInit_14) | (_zz_CsrPlugin_csrMapping_readDataInit_15 | _zz_CsrPlugin_csrMapping_readDataInit_16))) | (((_zz_CsrPlugin_csrMapping_readDataInit_17 | _zz_CsrPlugin_csrMapping_readDataInit_18) | (_zz_CsrPlugin_csrMapping_readDataInit_19 | _zz_CsrPlugin_csrMapping_readDataInit_20)) | ((_zz_CsrPlugin_csrMapping_readDataInit_21 | _zz_CsrPlugin_csrMapping_readDataInit_22) | (_zz_CsrPlugin_csrMapping_readDataInit_23 | _zz_CsrPlugin_csrMapping_readDataInit_24)))) | ((((_zz_CsrPlugin_csrMapping_readDataInit_25 | _zz_CsrPlugin_csrMapping_readDataInit_26) | (_zz_CsrPlugin_csrMapping_readDataInit_27 | _zz_CsrPlugin_csrMapping_readDataInit_28)) | ((_zz_CsrPlugin_csrMapping_readDataInit_29 | _zz_CsrPlugin_csrMapping_readDataInit_30) | (_zz_CsrPlugin_csrMapping_readDataInit_31 | _zz_CsrPlugin_csrMapping_readDataInit_32))) | (((_zz_CsrPlugin_csrMapping_readDataInit_33 | _zz_CsrPlugin_csrMapping_readDataInit_34) | (_zz_CsrPlugin_csrMapping_readDataInit_35 | _zz_CsrPlugin_csrMapping_readDataInit_36)) | ((_zz_CsrPlugin_csrMapping_readDataInit_37 | _zz_CsrPlugin_csrMapping_readDataInit_38) | (_zz_CsrPlugin_csrMapping_readDataInit_39 | _zz_CsrPlugin_csrMapping_readDataInit_40))))); + assign when_CsrPlugin_l1297 = (CsrPlugin_privilege < execute_CsrPlugin_csrAddress[9 : 8]); + assign when_CsrPlugin_l1302 = ((! execute_arbitration_isValid) || (! execute_IS_CSR)); + assign iBusWishbone_ADR = {_zz_iBusWishbone_ADR_1,_zz_iBusWishbone_ADR}; + assign iBusWishbone_CTI = ((_zz_iBusWishbone_ADR == 3'b111) ? 3'b111 : 3'b010); + assign iBusWishbone_BTE = 2'b00; + assign iBusWishbone_SEL = 4'b1111; + assign iBusWishbone_WE = 1'b0; + assign iBusWishbone_DAT_MOSI = 32'bxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx; + always @(*) begin + iBusWishbone_CYC = 1'b0; + if(when_InstructionCache_l239) begin + iBusWishbone_CYC = 1'b1; + end + end + + always @(*) begin + iBusWishbone_STB = 1'b0; + if(when_InstructionCache_l239) begin + iBusWishbone_STB = 1'b1; + end + end + + assign when_InstructionCache_l239 = (iBus_cmd_valid || (_zz_iBusWishbone_ADR != 3'b000)); + assign iBus_cmd_ready = (iBus_cmd_valid && iBusWishbone_ACK); + assign iBus_rsp_valid = _zz_iBus_rsp_valid; + assign iBus_rsp_payload_data = iBusWishbone_DAT_MISO_regNext; + assign iBus_rsp_payload_error = 1'b0; + assign _zz_dBus_cmd_ready_5 = (dBus_cmd_payload_size == 3'b101); + assign _zz_dBus_cmd_ready_1 = dBus_cmd_valid; + assign _zz_dBus_cmd_ready_3 = dBus_cmd_payload_wr; + assign _zz_dBus_cmd_ready_4 = ((! _zz_dBus_cmd_ready_5) || (_zz_dBus_cmd_ready == 3'b111)); + assign dBus_cmd_ready = (_zz_dBus_cmd_ready_2 && (_zz_dBus_cmd_ready_3 || _zz_dBus_cmd_ready_4)); + assign dBusWishbone_ADR = ((_zz_dBus_cmd_ready_5 ? {{dBus_cmd_payload_address[31 : 5],_zz_dBus_cmd_ready},2'b00} : {dBus_cmd_payload_address[31 : 2],2'b00}) >>> 2); + assign dBusWishbone_CTI = (_zz_dBus_cmd_ready_5 ? (_zz_dBus_cmd_ready_4 ? 3'b111 : 3'b010) : 3'b000); + assign dBusWishbone_BTE = 2'b00; + assign dBusWishbone_SEL = (_zz_dBus_cmd_ready_3 ? dBus_cmd_payload_mask : 4'b1111); + assign dBusWishbone_WE = _zz_dBus_cmd_ready_3; + assign dBusWishbone_DAT_MOSI = dBus_cmd_payload_data; + assign _zz_dBus_cmd_ready_2 = (_zz_dBus_cmd_ready_1 && dBusWishbone_ACK); + assign dBusWishbone_CYC = _zz_dBus_cmd_ready_1; + assign dBusWishbone_STB = _zz_dBus_cmd_ready_1; + assign dBus_rsp_valid = _zz_dBus_rsp_valid; + assign dBus_rsp_payload_data = dBusWishbone_DAT_MISO_regNext; + assign dBus_rsp_payload_error = 1'b0; + always @(posedge clk) begin + if(reset) begin + IBusCachedPlugin_fetchPc_pcReg <= externalResetVector; + IBusCachedPlugin_fetchPc_correctionReg <= 1'b0; + IBusCachedPlugin_fetchPc_booted <= 1'b0; + IBusCachedPlugin_fetchPc_inc <= 1'b0; + _zz_IBusCachedPlugin_iBusRsp_stages_0_output_ready_2 <= 1'b0; + _zz_IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_valid <= 1'b0; + IBusCachedPlugin_injector_nextPcCalc_valids_0 <= 1'b0; + IBusCachedPlugin_injector_nextPcCalc_valids_1 <= 1'b0; + IBusCachedPlugin_injector_nextPcCalc_valids_2 <= 1'b0; + IBusCachedPlugin_injector_nextPcCalc_valids_3 <= 1'b0; + IBusCachedPlugin_injector_nextPcCalc_valids_4 <= 1'b0; + IBusCachedPlugin_rspCounter <= _zz_IBusCachedPlugin_rspCounter; + IBusCachedPlugin_rspCounter <= 32'h0; + dataCache_1_io_mem_cmd_rValid <= 1'b0; + dataCache_1_io_mem_cmd_s2mPipe_rValid <= 1'b0; + DBusCachedPlugin_rspCounter <= _zz_DBusCachedPlugin_rspCounter; + DBusCachedPlugin_rspCounter <= 32'h0; + _zz_7 <= 1'b1; + HazardSimplePlugin_writeBackBuffer_valid <= 1'b0; + CsrPlugin_misa_base <= 2'b01; + CsrPlugin_misa_extensions <= 26'h0000042; + CsrPlugin_mstatus_MIE <= 1'b0; + CsrPlugin_mstatus_MPIE <= 1'b0; + CsrPlugin_mstatus_MPP <= 2'b11; + CsrPlugin_mie_MEIE <= 1'b0; + CsrPlugin_mie_MTIE <= 1'b0; + CsrPlugin_mie_MSIE <= 1'b0; + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_decode <= 1'b0; + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_execute <= 1'b0; + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_memory <= 1'b0; + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_writeBack <= 1'b0; + CsrPlugin_interrupt_valid <= 1'b0; + CsrPlugin_lastStageWasWfi <= 1'b0; + CsrPlugin_pipelineLiberator_pcValids_0 <= 1'b0; + CsrPlugin_pipelineLiberator_pcValids_1 <= 1'b0; + CsrPlugin_pipelineLiberator_pcValids_2 <= 1'b0; + CsrPlugin_hadException <= 1'b0; + execute_CsrPlugin_wfiWake <= 1'b0; + memory_DivPlugin_div_counter_value <= 6'h0; + _zz_CsrPlugin_csrMapping_readDataInit <= 32'h0; + execute_CfuPlugin_hold <= 1'b0; + execute_CfuPlugin_fired <= 1'b0; + CfuPlugin_bus_rsp_rValid <= 1'b0; + execute_arbitration_isValid <= 1'b0; + memory_arbitration_isValid <= 1'b0; + writeBack_arbitration_isValid <= 1'b0; + switch_Fetcher_l362 <= 3'b000; + execute_to_memory_CfuPlugin_CFU_IN_FLIGHT <= 1'b0; + _zz_iBusWishbone_ADR <= 3'b000; + _zz_iBus_rsp_valid <= 1'b0; + _zz_dBus_cmd_ready <= 3'b000; + _zz_dBus_rsp_valid <= 1'b0; + end else begin + if(IBusCachedPlugin_fetchPc_correction) begin + IBusCachedPlugin_fetchPc_correctionReg <= 1'b1; + end + if(IBusCachedPlugin_fetchPc_output_fire) begin + IBusCachedPlugin_fetchPc_correctionReg <= 1'b0; + end + IBusCachedPlugin_fetchPc_booted <= 1'b1; + if(when_Fetcher_l131) begin + IBusCachedPlugin_fetchPc_inc <= 1'b0; + end + if(IBusCachedPlugin_fetchPc_output_fire_1) begin + IBusCachedPlugin_fetchPc_inc <= 1'b1; + end + if(when_Fetcher_l131_1) begin + IBusCachedPlugin_fetchPc_inc <= 1'b0; + end + if(when_Fetcher_l158) begin + IBusCachedPlugin_fetchPc_pcReg <= IBusCachedPlugin_fetchPc_pc; + end + if(IBusCachedPlugin_iBusRsp_flush) begin + _zz_IBusCachedPlugin_iBusRsp_stages_0_output_ready_2 <= 1'b0; + end + if(_zz_IBusCachedPlugin_iBusRsp_stages_0_output_ready) begin + _zz_IBusCachedPlugin_iBusRsp_stages_0_output_ready_2 <= (IBusCachedPlugin_iBusRsp_stages_0_output_valid && (! 1'b0)); + end + if(IBusCachedPlugin_iBusRsp_flush) begin + _zz_IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_valid <= 1'b0; + end + if(IBusCachedPlugin_iBusRsp_stages_1_output_ready) begin + _zz_IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_valid <= (IBusCachedPlugin_iBusRsp_stages_1_output_valid && (! IBusCachedPlugin_iBusRsp_flush)); + end + if(IBusCachedPlugin_fetchPc_flushed) begin + IBusCachedPlugin_injector_nextPcCalc_valids_0 <= 1'b0; + end + if(when_Fetcher_l329) begin + IBusCachedPlugin_injector_nextPcCalc_valids_0 <= 1'b1; + end + if(IBusCachedPlugin_fetchPc_flushed) begin + IBusCachedPlugin_injector_nextPcCalc_valids_1 <= 1'b0; + end + if(when_Fetcher_l329_1) begin + IBusCachedPlugin_injector_nextPcCalc_valids_1 <= IBusCachedPlugin_injector_nextPcCalc_valids_0; + end + if(IBusCachedPlugin_fetchPc_flushed) begin + IBusCachedPlugin_injector_nextPcCalc_valids_1 <= 1'b0; + end + if(IBusCachedPlugin_fetchPc_flushed) begin + IBusCachedPlugin_injector_nextPcCalc_valids_2 <= 1'b0; + end + if(when_Fetcher_l329_2) begin + IBusCachedPlugin_injector_nextPcCalc_valids_2 <= IBusCachedPlugin_injector_nextPcCalc_valids_1; + end + if(IBusCachedPlugin_fetchPc_flushed) begin + IBusCachedPlugin_injector_nextPcCalc_valids_2 <= 1'b0; + end + if(IBusCachedPlugin_fetchPc_flushed) begin + IBusCachedPlugin_injector_nextPcCalc_valids_3 <= 1'b0; + end + if(when_Fetcher_l329_3) begin + IBusCachedPlugin_injector_nextPcCalc_valids_3 <= IBusCachedPlugin_injector_nextPcCalc_valids_2; + end + if(IBusCachedPlugin_fetchPc_flushed) begin + IBusCachedPlugin_injector_nextPcCalc_valids_3 <= 1'b0; + end + if(IBusCachedPlugin_fetchPc_flushed) begin + IBusCachedPlugin_injector_nextPcCalc_valids_4 <= 1'b0; + end + if(when_Fetcher_l329_4) begin + IBusCachedPlugin_injector_nextPcCalc_valids_4 <= IBusCachedPlugin_injector_nextPcCalc_valids_3; + end + if(IBusCachedPlugin_fetchPc_flushed) begin + IBusCachedPlugin_injector_nextPcCalc_valids_4 <= 1'b0; + end + if(iBus_rsp_valid) begin + IBusCachedPlugin_rspCounter <= (IBusCachedPlugin_rspCounter + 32'h00000001); + end + if(dataCache_1_io_mem_cmd_valid) begin + dataCache_1_io_mem_cmd_rValid <= 1'b1; + end + if(dataCache_1_io_mem_cmd_s2mPipe_ready) begin + dataCache_1_io_mem_cmd_rValid <= 1'b0; + end + if(dataCache_1_io_mem_cmd_s2mPipe_ready) begin + dataCache_1_io_mem_cmd_s2mPipe_rValid <= dataCache_1_io_mem_cmd_s2mPipe_valid; + end + if(dBus_rsp_valid) begin + DBusCachedPlugin_rspCounter <= (DBusCachedPlugin_rspCounter + 32'h00000001); + end + _zz_7 <= 1'b0; + HazardSimplePlugin_writeBackBuffer_valid <= HazardSimplePlugin_writeBackWrites_valid; + if(when_CsrPlugin_l909) begin + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_decode <= 1'b0; + end else begin + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_decode <= CsrPlugin_exceptionPortCtrl_exceptionValids_decode; + end + if(when_CsrPlugin_l909_1) begin + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_execute <= (CsrPlugin_exceptionPortCtrl_exceptionValids_decode && (! decode_arbitration_isStuck)); + end else begin + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_execute <= CsrPlugin_exceptionPortCtrl_exceptionValids_execute; + end + if(when_CsrPlugin_l909_2) begin + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_memory <= (CsrPlugin_exceptionPortCtrl_exceptionValids_execute && (! execute_arbitration_isStuck)); + end else begin + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_memory <= CsrPlugin_exceptionPortCtrl_exceptionValids_memory; + end + if(when_CsrPlugin_l909_3) begin + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_writeBack <= (CsrPlugin_exceptionPortCtrl_exceptionValids_memory && (! memory_arbitration_isStuck)); + end else begin + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_writeBack <= 1'b0; + end + CsrPlugin_interrupt_valid <= 1'b0; + if(when_CsrPlugin_l946) begin + if(when_CsrPlugin_l952) begin + CsrPlugin_interrupt_valid <= 1'b1; + end + if(when_CsrPlugin_l952_1) begin + CsrPlugin_interrupt_valid <= 1'b1; + end + if(when_CsrPlugin_l952_2) begin + CsrPlugin_interrupt_valid <= 1'b1; + end + end + CsrPlugin_lastStageWasWfi <= (writeBack_arbitration_isFiring && (writeBack_ENV_CTRL == `EnvCtrlEnum_binary_sequential_WFI)); + if(CsrPlugin_pipelineLiberator_active) begin + if(when_CsrPlugin_l980) begin + CsrPlugin_pipelineLiberator_pcValids_0 <= 1'b1; + end + if(when_CsrPlugin_l980_1) begin + CsrPlugin_pipelineLiberator_pcValids_1 <= CsrPlugin_pipelineLiberator_pcValids_0; + end + if(when_CsrPlugin_l980_2) begin + CsrPlugin_pipelineLiberator_pcValids_2 <= CsrPlugin_pipelineLiberator_pcValids_1; + end + end + if(when_CsrPlugin_l985) begin + CsrPlugin_pipelineLiberator_pcValids_0 <= 1'b0; + CsrPlugin_pipelineLiberator_pcValids_1 <= 1'b0; + CsrPlugin_pipelineLiberator_pcValids_2 <= 1'b0; + end + if(CsrPlugin_interruptJump) begin + CsrPlugin_interrupt_valid <= 1'b0; + end + CsrPlugin_hadException <= CsrPlugin_exception; + if(when_CsrPlugin_l1019) begin + case(CsrPlugin_targetPrivilege) + 2'b11 : begin + CsrPlugin_mstatus_MIE <= 1'b0; + CsrPlugin_mstatus_MPIE <= CsrPlugin_mstatus_MIE; + CsrPlugin_mstatus_MPP <= CsrPlugin_privilege; + end + default : begin + end + endcase + end + if(when_CsrPlugin_l1064) begin + case(switch_CsrPlugin_l1068) + 2'b11 : begin + CsrPlugin_mstatus_MPP <= 2'b00; + CsrPlugin_mstatus_MIE <= CsrPlugin_mstatus_MPIE; + CsrPlugin_mstatus_MPIE <= 1'b1; + end + default : begin + end + endcase + end + execute_CsrPlugin_wfiWake <= (({_zz_when_CsrPlugin_l952_2,{_zz_when_CsrPlugin_l952_1,_zz_when_CsrPlugin_l952}} != 3'b000) || CsrPlugin_thirdPartyWake); + memory_DivPlugin_div_counter_value <= memory_DivPlugin_div_counter_valueNext; + if(execute_CfuPlugin_schedule) begin + execute_CfuPlugin_hold <= 1'b1; + end + if(CfuPlugin_bus_cmd_ready) begin + execute_CfuPlugin_hold <= 1'b0; + end + if(CfuPlugin_bus_cmd_fire) begin + execute_CfuPlugin_fired <= 1'b1; + end + if(when_CfuPlugin_l171) begin + execute_CfuPlugin_fired <= 1'b0; + end + if(CfuPlugin_bus_rsp_valid) begin + CfuPlugin_bus_rsp_rValid <= 1'b1; + end + if(CfuPlugin_bus_rsp_rsp_ready) begin + CfuPlugin_bus_rsp_rValid <= 1'b0; + end + if(when_Pipeline_l124_62) begin + execute_to_memory_CfuPlugin_CFU_IN_FLIGHT <= _zz_execute_to_memory_CfuPlugin_CFU_IN_FLIGHT; + end + if(when_Pipeline_l151) begin + execute_arbitration_isValid <= 1'b0; + end + if(when_Pipeline_l154) begin + execute_arbitration_isValid <= decode_arbitration_isValid; + end + if(when_Pipeline_l151_1) begin + memory_arbitration_isValid <= 1'b0; + end + if(when_Pipeline_l154_1) begin + memory_arbitration_isValid <= execute_arbitration_isValid; + end + if(when_Pipeline_l151_2) begin + writeBack_arbitration_isValid <= 1'b0; + end + if(when_Pipeline_l154_2) begin + writeBack_arbitration_isValid <= memory_arbitration_isValid; + end + case(switch_Fetcher_l362) + 3'b000 : begin + if(IBusCachedPlugin_injectionPort_valid) begin + switch_Fetcher_l362 <= 3'b001; + end + end + 3'b001 : begin + switch_Fetcher_l362 <= 3'b010; + end + 3'b010 : begin + switch_Fetcher_l362 <= 3'b011; + end + 3'b011 : begin + if(when_Fetcher_l378) begin + switch_Fetcher_l362 <= 3'b100; + end + end + 3'b100 : begin + switch_Fetcher_l362 <= 3'b000; + end + default : begin + end + endcase + if(execute_CsrPlugin_csr_769) begin + if(execute_CsrPlugin_writeEnable) begin + CsrPlugin_misa_base <= CsrPlugin_csrMapping_writeDataSignal[31 : 30]; + CsrPlugin_misa_extensions <= CsrPlugin_csrMapping_writeDataSignal[25 : 0]; + end + end + if(execute_CsrPlugin_csr_768) begin + if(execute_CsrPlugin_writeEnable) begin + CsrPlugin_mstatus_MPP <= CsrPlugin_csrMapping_writeDataSignal[12 : 11]; + CsrPlugin_mstatus_MPIE <= CsrPlugin_csrMapping_writeDataSignal[7]; + CsrPlugin_mstatus_MIE <= CsrPlugin_csrMapping_writeDataSignal[3]; + end + end + if(execute_CsrPlugin_csr_772) begin + if(execute_CsrPlugin_writeEnable) begin + CsrPlugin_mie_MEIE <= CsrPlugin_csrMapping_writeDataSignal[11]; + CsrPlugin_mie_MTIE <= CsrPlugin_csrMapping_writeDataSignal[7]; + CsrPlugin_mie_MSIE <= CsrPlugin_csrMapping_writeDataSignal[3]; + end + end + if(execute_CsrPlugin_csr_3008) begin + if(execute_CsrPlugin_writeEnable) begin + _zz_CsrPlugin_csrMapping_readDataInit <= CsrPlugin_csrMapping_writeDataSignal[31 : 0]; + end + end + if(when_InstructionCache_l239) begin + if(iBusWishbone_ACK) begin + _zz_iBusWishbone_ADR <= (_zz_iBusWishbone_ADR + 3'b001); + end + end + _zz_iBus_rsp_valid <= (iBusWishbone_CYC && iBusWishbone_ACK); + if((_zz_dBus_cmd_ready_1 && _zz_dBus_cmd_ready_2)) begin + _zz_dBus_cmd_ready <= (_zz_dBus_cmd_ready + 3'b001); + if(_zz_dBus_cmd_ready_4) begin + _zz_dBus_cmd_ready <= 3'b000; + end + end + _zz_dBus_rsp_valid <= ((_zz_dBus_cmd_ready_1 && (! dBusWishbone_WE)) && dBusWishbone_ACK); + end + end + + always @(posedge clk) begin + if(IBusCachedPlugin_iBusRsp_stages_1_output_ready) begin + _zz_IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_payload <= IBusCachedPlugin_iBusRsp_stages_1_output_payload; + end + if(IBusCachedPlugin_iBusRsp_stages_1_input_ready) begin + IBusCachedPlugin_s1_tightlyCoupledHit <= IBusCachedPlugin_s0_tightlyCoupledHit; + end + if(IBusCachedPlugin_iBusRsp_stages_2_input_ready) begin + IBusCachedPlugin_s2_tightlyCoupledHit <= IBusCachedPlugin_s1_tightlyCoupledHit; + end + if(dataCache_1_io_mem_cmd_ready) begin + dataCache_1_io_mem_cmd_rData_wr <= dataCache_1_io_mem_cmd_payload_wr; + dataCache_1_io_mem_cmd_rData_uncached <= dataCache_1_io_mem_cmd_payload_uncached; + dataCache_1_io_mem_cmd_rData_address <= dataCache_1_io_mem_cmd_payload_address; + dataCache_1_io_mem_cmd_rData_data <= dataCache_1_io_mem_cmd_payload_data; + dataCache_1_io_mem_cmd_rData_mask <= dataCache_1_io_mem_cmd_payload_mask; + dataCache_1_io_mem_cmd_rData_size <= dataCache_1_io_mem_cmd_payload_size; + dataCache_1_io_mem_cmd_rData_last <= dataCache_1_io_mem_cmd_payload_last; + end + if(dataCache_1_io_mem_cmd_s2mPipe_ready) begin + dataCache_1_io_mem_cmd_s2mPipe_rData_wr <= dataCache_1_io_mem_cmd_s2mPipe_payload_wr; + dataCache_1_io_mem_cmd_s2mPipe_rData_uncached <= dataCache_1_io_mem_cmd_s2mPipe_payload_uncached; + dataCache_1_io_mem_cmd_s2mPipe_rData_address <= dataCache_1_io_mem_cmd_s2mPipe_payload_address; + dataCache_1_io_mem_cmd_s2mPipe_rData_data <= dataCache_1_io_mem_cmd_s2mPipe_payload_data; + dataCache_1_io_mem_cmd_s2mPipe_rData_mask <= dataCache_1_io_mem_cmd_s2mPipe_payload_mask; + dataCache_1_io_mem_cmd_s2mPipe_rData_size <= dataCache_1_io_mem_cmd_s2mPipe_payload_size; + dataCache_1_io_mem_cmd_s2mPipe_rData_last <= dataCache_1_io_mem_cmd_s2mPipe_payload_last; + end + HazardSimplePlugin_writeBackBuffer_payload_address <= HazardSimplePlugin_writeBackWrites_payload_address; + HazardSimplePlugin_writeBackBuffer_payload_data <= HazardSimplePlugin_writeBackWrites_payload_data; + CsrPlugin_mip_MEIP <= externalInterrupt; + CsrPlugin_mip_MTIP <= timerInterrupt; + CsrPlugin_mip_MSIP <= softwareInterrupt; + CsrPlugin_mcycle <= (CsrPlugin_mcycle + 64'h0000000000000001); + if(writeBack_arbitration_isFiring) begin + CsrPlugin_minstret <= (CsrPlugin_minstret + 64'h0000000000000001); + end + if(_zz_when) begin + CsrPlugin_exceptionPortCtrl_exceptionContext_code <= (_zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_1 ? IBusCachedPlugin_decodeExceptionPort_payload_code : decodeExceptionPort_payload_code); + CsrPlugin_exceptionPortCtrl_exceptionContext_badAddr <= (_zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_1 ? IBusCachedPlugin_decodeExceptionPort_payload_badAddr : decodeExceptionPort_payload_badAddr); + end + if(_zz_when_1) begin + CsrPlugin_exceptionPortCtrl_exceptionContext_code <= (_zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_3 ? BranchPlugin_branchExceptionPort_payload_code : CsrPlugin_selfException_payload_code); + CsrPlugin_exceptionPortCtrl_exceptionContext_badAddr <= (_zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_3 ? BranchPlugin_branchExceptionPort_payload_badAddr : CsrPlugin_selfException_payload_badAddr); + end + if(DBusCachedPlugin_exceptionBus_valid) begin + CsrPlugin_exceptionPortCtrl_exceptionContext_code <= DBusCachedPlugin_exceptionBus_payload_code; + CsrPlugin_exceptionPortCtrl_exceptionContext_badAddr <= DBusCachedPlugin_exceptionBus_payload_badAddr; + end + if(when_CsrPlugin_l946) begin + if(when_CsrPlugin_l952) begin + CsrPlugin_interrupt_code <= 4'b0111; + CsrPlugin_interrupt_targetPrivilege <= 2'b11; + end + if(when_CsrPlugin_l952_1) begin + CsrPlugin_interrupt_code <= 4'b0011; + CsrPlugin_interrupt_targetPrivilege <= 2'b11; + end + if(when_CsrPlugin_l952_2) begin + CsrPlugin_interrupt_code <= 4'b1011; + CsrPlugin_interrupt_targetPrivilege <= 2'b11; + end + end + if(when_CsrPlugin_l1019) begin + case(CsrPlugin_targetPrivilege) + 2'b11 : begin + CsrPlugin_mcause_interrupt <= (! CsrPlugin_hadException); + CsrPlugin_mcause_exceptionCode <= CsrPlugin_trapCause; + CsrPlugin_mepc <= writeBack_PC; + if(CsrPlugin_hadException) begin + CsrPlugin_mtval <= CsrPlugin_exceptionPortCtrl_exceptionContext_badAddr; + end + end + default : begin + end + endcase + end + if(when_MulDivIterativePlugin_l126) begin + memory_DivPlugin_div_done <= 1'b1; + end + if(when_MulDivIterativePlugin_l126_1) begin + memory_DivPlugin_div_done <= 1'b0; + end + if(when_MulDivIterativePlugin_l128) begin + if(when_MulDivIterativePlugin_l132) begin + memory_DivPlugin_rs1[31 : 0] <= memory_DivPlugin_div_stage_0_outNumerator; + memory_DivPlugin_accumulator[31 : 0] <= memory_DivPlugin_div_stage_0_outRemainder; + if(when_MulDivIterativePlugin_l151) begin + memory_DivPlugin_div_result <= _zz_memory_DivPlugin_div_result_1[31:0]; + end + end + end + if(when_MulDivIterativePlugin_l162) begin + memory_DivPlugin_accumulator <= 65'h0; + memory_DivPlugin_rs1 <= ((_zz_memory_DivPlugin_rs1 ? (~ _zz_memory_DivPlugin_rs1_1) : _zz_memory_DivPlugin_rs1_1) + _zz_memory_DivPlugin_rs1_2); + memory_DivPlugin_rs2 <= ((_zz_memory_DivPlugin_rs2 ? (~ execute_RS2) : execute_RS2) + _zz_memory_DivPlugin_rs2_1); + memory_DivPlugin_div_needRevert <= ((_zz_memory_DivPlugin_rs1 ^ (_zz_memory_DivPlugin_rs2 && (! execute_INSTRUCTION[13]))) && (! (((execute_RS2 == 32'h0) && execute_IS_RS2_SIGNED) && (! execute_INSTRUCTION[13])))); + end + externalInterruptArray_regNext <= externalInterruptArray; + if(CfuPlugin_bus_rsp_ready) begin + CfuPlugin_bus_rsp_rData_outputs_0 <= CfuPlugin_bus_rsp_payload_outputs_0; + end + if(when_GenCoreDefault_l367) begin + _zz_CsrPlugin_csrMapping_readDataInit_2 <= (_zz_CsrPlugin_csrMapping_readDataInit_2 + 32'h00000001); + end + if(when_GenCoreDefault_l367_1) begin + _zz_CsrPlugin_csrMapping_readDataInit_3 <= (_zz_CsrPlugin_csrMapping_readDataInit_3 + 32'h00000001); + end + if(when_GenCoreDefault_l367_2) begin + _zz_CsrPlugin_csrMapping_readDataInit_4 <= (_zz_CsrPlugin_csrMapping_readDataInit_4 + 32'h00000001); + end + if(when_GenCoreDefault_l367_3) begin + _zz_CsrPlugin_csrMapping_readDataInit_5 <= (_zz_CsrPlugin_csrMapping_readDataInit_5 + 32'h00000001); + end + if(when_GenCoreDefault_l367_4) begin + _zz_CsrPlugin_csrMapping_readDataInit_6 <= (_zz_CsrPlugin_csrMapping_readDataInit_6 + 32'h00000001); + end + if(when_GenCoreDefault_l367_5) begin + _zz_CsrPlugin_csrMapping_readDataInit_7 <= (_zz_CsrPlugin_csrMapping_readDataInit_7 + 32'h00000001); + end + if(when_GenCoreDefault_l367_6) begin + _zz_CsrPlugin_csrMapping_readDataInit_8 <= (_zz_CsrPlugin_csrMapping_readDataInit_8 + 32'h00000001); + end + if(when_GenCoreDefault_l367_7) begin + _zz_CsrPlugin_csrMapping_readDataInit_9 <= (_zz_CsrPlugin_csrMapping_readDataInit_9 + 32'h00000001); + end + if(when_Pipeline_l124) begin + decode_to_execute_PC <= decode_PC; + end + if(when_Pipeline_l124_1) begin + execute_to_memory_PC <= _zz_execute_SRC2; + end + if(when_Pipeline_l124_2) begin + memory_to_writeBack_PC <= memory_PC; + end + if(when_Pipeline_l124_3) begin + decode_to_execute_INSTRUCTION <= decode_INSTRUCTION; + end + if(when_Pipeline_l124_4) begin + execute_to_memory_INSTRUCTION <= execute_INSTRUCTION; + end + if(when_Pipeline_l124_5) begin + memory_to_writeBack_INSTRUCTION <= memory_INSTRUCTION; + end + if(when_Pipeline_l124_6) begin + decode_to_execute_FORMAL_PC_NEXT <= _zz_decode_to_execute_FORMAL_PC_NEXT; + end + if(when_Pipeline_l124_7) begin + execute_to_memory_FORMAL_PC_NEXT <= _zz_execute_to_memory_FORMAL_PC_NEXT; + end + if(when_Pipeline_l124_8) begin + memory_to_writeBack_FORMAL_PC_NEXT <= memory_FORMAL_PC_NEXT; + end + if(when_Pipeline_l124_9) begin + decode_to_execute_MEMORY_FORCE_CONSTISTENCY <= decode_MEMORY_FORCE_CONSTISTENCY; + end + if(when_Pipeline_l124_10) begin + decode_to_execute_SRC1_CTRL <= _zz_decode_to_execute_SRC1_CTRL; + end + if(when_Pipeline_l124_11) begin + decode_to_execute_SRC_USE_SUB_LESS <= decode_SRC_USE_SUB_LESS; + end + if(when_Pipeline_l124_12) begin + decode_to_execute_MEMORY_ENABLE <= decode_MEMORY_ENABLE; + end + if(when_Pipeline_l124_13) begin + execute_to_memory_MEMORY_ENABLE <= execute_MEMORY_ENABLE; + end + if(when_Pipeline_l124_14) begin + memory_to_writeBack_MEMORY_ENABLE <= memory_MEMORY_ENABLE; + end + if(when_Pipeline_l124_15) begin + decode_to_execute_ALU_CTRL <= _zz_decode_to_execute_ALU_CTRL; + end + if(when_Pipeline_l124_16) begin + decode_to_execute_SRC2_CTRL <= _zz_decode_to_execute_SRC2_CTRL; + end + if(when_Pipeline_l124_17) begin + decode_to_execute_REGFILE_WRITE_VALID <= decode_REGFILE_WRITE_VALID; + end + if(when_Pipeline_l124_18) begin + execute_to_memory_REGFILE_WRITE_VALID <= execute_REGFILE_WRITE_VALID; + end + if(when_Pipeline_l124_19) begin + memory_to_writeBack_REGFILE_WRITE_VALID <= memory_REGFILE_WRITE_VALID; + end + if(when_Pipeline_l124_20) begin + decode_to_execute_BYPASSABLE_EXECUTE_STAGE <= decode_BYPASSABLE_EXECUTE_STAGE; + end + if(when_Pipeline_l124_21) begin + decode_to_execute_BYPASSABLE_MEMORY_STAGE <= decode_BYPASSABLE_MEMORY_STAGE; + end + if(when_Pipeline_l124_22) begin + execute_to_memory_BYPASSABLE_MEMORY_STAGE <= execute_BYPASSABLE_MEMORY_STAGE; + end + if(when_Pipeline_l124_23) begin + decode_to_execute_MEMORY_WR <= decode_MEMORY_WR; + end + if(when_Pipeline_l124_24) begin + execute_to_memory_MEMORY_WR <= execute_MEMORY_WR; + end + if(when_Pipeline_l124_25) begin + memory_to_writeBack_MEMORY_WR <= memory_MEMORY_WR; + end + if(when_Pipeline_l124_26) begin + decode_to_execute_MEMORY_MANAGMENT <= decode_MEMORY_MANAGMENT; + end + if(when_Pipeline_l124_27) begin + decode_to_execute_SRC_LESS_UNSIGNED <= decode_SRC_LESS_UNSIGNED; + end + if(when_Pipeline_l124_28) begin + decode_to_execute_ALU_BITWISE_CTRL <= _zz_decode_to_execute_ALU_BITWISE_CTRL; + end + if(when_Pipeline_l124_29) begin + decode_to_execute_SHIFT_CTRL <= _zz_decode_to_execute_SHIFT_CTRL; + end + if(when_Pipeline_l124_30) begin + execute_to_memory_SHIFT_CTRL <= _zz_execute_to_memory_SHIFT_CTRL; + end + if(when_Pipeline_l124_31) begin + decode_to_execute_BRANCH_CTRL <= _zz_decode_to_execute_BRANCH_CTRL; + end + if(when_Pipeline_l124_32) begin + decode_to_execute_IS_CSR <= decode_IS_CSR; + end + if(when_Pipeline_l124_33) begin + decode_to_execute_ENV_CTRL <= _zz_decode_to_execute_ENV_CTRL; + end + if(when_Pipeline_l124_34) begin + execute_to_memory_ENV_CTRL <= _zz_execute_to_memory_ENV_CTRL; + end + if(when_Pipeline_l124_35) begin + memory_to_writeBack_ENV_CTRL <= _zz_memory_to_writeBack_ENV_CTRL; + end + if(when_Pipeline_l124_36) begin + decode_to_execute_IS_MUL <= decode_IS_MUL; + end + if(when_Pipeline_l124_37) begin + execute_to_memory_IS_MUL <= execute_IS_MUL; + end + if(when_Pipeline_l124_38) begin + memory_to_writeBack_IS_MUL <= memory_IS_MUL; + end + if(when_Pipeline_l124_39) begin + decode_to_execute_IS_DIV <= decode_IS_DIV; + end + if(when_Pipeline_l124_40) begin + execute_to_memory_IS_DIV <= execute_IS_DIV; + end + if(when_Pipeline_l124_41) begin + decode_to_execute_IS_RS1_SIGNED <= decode_IS_RS1_SIGNED; + end + if(when_Pipeline_l124_42) begin + decode_to_execute_IS_RS2_SIGNED <= decode_IS_RS2_SIGNED; + end + if(when_Pipeline_l124_43) begin + decode_to_execute_CfuPlugin_CFU_ENABLE <= decode_CfuPlugin_CFU_ENABLE; + end + if(when_Pipeline_l124_44) begin + decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND <= _zz_decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND; + end + if(when_Pipeline_l124_45) begin + decode_to_execute_RS1 <= decode_RS1; + end + if(when_Pipeline_l124_46) begin + decode_to_execute_RS2 <= decode_RS2; + end + if(when_Pipeline_l124_47) begin + decode_to_execute_SRC2_FORCE_ZERO <= decode_SRC2_FORCE_ZERO; + end + if(when_Pipeline_l124_48) begin + decode_to_execute_PREDICTION_HAD_BRANCHED2 <= decode_PREDICTION_HAD_BRANCHED2; + end + if(when_Pipeline_l124_49) begin + decode_to_execute_CSR_WRITE_OPCODE <= decode_CSR_WRITE_OPCODE; + end + if(when_Pipeline_l124_50) begin + decode_to_execute_CSR_READ_OPCODE <= decode_CSR_READ_OPCODE; + end + if(when_Pipeline_l124_51) begin + decode_to_execute_DO_EBREAK <= decode_DO_EBREAK; + end + if(when_Pipeline_l124_52) begin + execute_to_memory_MEMORY_STORE_DATA_RF <= execute_MEMORY_STORE_DATA_RF; + end + if(when_Pipeline_l124_53) begin + memory_to_writeBack_MEMORY_STORE_DATA_RF <= memory_MEMORY_STORE_DATA_RF; + end + if(when_Pipeline_l124_54) begin + execute_to_memory_REGFILE_WRITE_DATA <= _zz_decode_RS2; + end + if(when_Pipeline_l124_55) begin + memory_to_writeBack_REGFILE_WRITE_DATA <= _zz_decode_RS2_1; + end + if(when_Pipeline_l124_56) begin + execute_to_memory_SHIFT_RIGHT <= execute_SHIFT_RIGHT; + end + if(when_Pipeline_l124_57) begin + execute_to_memory_MUL_LL <= execute_MUL_LL; + end + if(when_Pipeline_l124_58) begin + execute_to_memory_MUL_LH <= execute_MUL_LH; + end + if(when_Pipeline_l124_59) begin + execute_to_memory_MUL_HL <= execute_MUL_HL; + end + if(when_Pipeline_l124_60) begin + execute_to_memory_MUL_HH <= execute_MUL_HH; + end + if(when_Pipeline_l124_61) begin + memory_to_writeBack_MUL_HH <= memory_MUL_HH; + end + if(when_Pipeline_l124_63) begin + memory_to_writeBack_CfuPlugin_CFU_IN_FLIGHT <= _zz_memory_to_writeBack_CfuPlugin_CFU_IN_FLIGHT; + end + if(when_Pipeline_l124_64) begin + memory_to_writeBack_MUL_LOW <= memory_MUL_LOW; + end + if(when_CsrPlugin_l1264) begin + execute_CsrPlugin_csr_3264 <= (decode_INSTRUCTION[31 : 20] == 12'hcc0); + end + if(when_CsrPlugin_l1264_1) begin + execute_CsrPlugin_csr_3857 <= (decode_INSTRUCTION[31 : 20] == 12'hf11); + end + if(when_CsrPlugin_l1264_2) begin + execute_CsrPlugin_csr_3858 <= (decode_INSTRUCTION[31 : 20] == 12'hf12); + end + if(when_CsrPlugin_l1264_3) begin + execute_CsrPlugin_csr_3859 <= (decode_INSTRUCTION[31 : 20] == 12'hf13); + end + if(when_CsrPlugin_l1264_4) begin + execute_CsrPlugin_csr_3860 <= (decode_INSTRUCTION[31 : 20] == 12'hf14); + end + if(when_CsrPlugin_l1264_5) begin + execute_CsrPlugin_csr_769 <= (decode_INSTRUCTION[31 : 20] == 12'h301); + end + if(when_CsrPlugin_l1264_6) begin + execute_CsrPlugin_csr_768 <= (decode_INSTRUCTION[31 : 20] == 12'h300); + end + if(when_CsrPlugin_l1264_7) begin + execute_CsrPlugin_csr_836 <= (decode_INSTRUCTION[31 : 20] == 12'h344); + end + if(when_CsrPlugin_l1264_8) begin + execute_CsrPlugin_csr_772 <= (decode_INSTRUCTION[31 : 20] == 12'h304); + end + if(when_CsrPlugin_l1264_9) begin + execute_CsrPlugin_csr_773 <= (decode_INSTRUCTION[31 : 20] == 12'h305); + end + if(when_CsrPlugin_l1264_10) begin + execute_CsrPlugin_csr_833 <= (decode_INSTRUCTION[31 : 20] == 12'h341); + end + if(when_CsrPlugin_l1264_11) begin + execute_CsrPlugin_csr_832 <= (decode_INSTRUCTION[31 : 20] == 12'h340); + end + if(when_CsrPlugin_l1264_12) begin + execute_CsrPlugin_csr_834 <= (decode_INSTRUCTION[31 : 20] == 12'h342); + end + if(when_CsrPlugin_l1264_13) begin + execute_CsrPlugin_csr_835 <= (decode_INSTRUCTION[31 : 20] == 12'h343); + end + if(when_CsrPlugin_l1264_14) begin + execute_CsrPlugin_csr_2816 <= (decode_INSTRUCTION[31 : 20] == 12'hb00); + end + if(when_CsrPlugin_l1264_15) begin + execute_CsrPlugin_csr_2944 <= (decode_INSTRUCTION[31 : 20] == 12'hb80); + end + if(when_CsrPlugin_l1264_16) begin + execute_CsrPlugin_csr_2818 <= (decode_INSTRUCTION[31 : 20] == 12'hb02); + end + if(when_CsrPlugin_l1264_17) begin + execute_CsrPlugin_csr_2946 <= (decode_INSTRUCTION[31 : 20] == 12'hb82); + end + if(when_CsrPlugin_l1264_18) begin + execute_CsrPlugin_csr_3072 <= (decode_INSTRUCTION[31 : 20] == 12'hc00); + end + if(when_CsrPlugin_l1264_19) begin + execute_CsrPlugin_csr_3200 <= (decode_INSTRUCTION[31 : 20] == 12'hc80); + end + if(when_CsrPlugin_l1264_20) begin + execute_CsrPlugin_csr_3074 <= (decode_INSTRUCTION[31 : 20] == 12'hc02); + end + if(when_CsrPlugin_l1264_21) begin + execute_CsrPlugin_csr_3202 <= (decode_INSTRUCTION[31 : 20] == 12'hc82); + end + if(when_CsrPlugin_l1264_22) begin + execute_CsrPlugin_csr_3008 <= (decode_INSTRUCTION[31 : 20] == 12'hbc0); + end + if(when_CsrPlugin_l1264_23) begin + execute_CsrPlugin_csr_4032 <= (decode_INSTRUCTION[31 : 20] == 12'hfc0); + end + if(when_CsrPlugin_l1264_24) begin + execute_CsrPlugin_csr_2820 <= (decode_INSTRUCTION[31 : 20] == 12'hb04); + end + if(when_CsrPlugin_l1264_25) begin + execute_CsrPlugin_csr_2821 <= (decode_INSTRUCTION[31 : 20] == 12'hb05); + end + if(when_CsrPlugin_l1264_26) begin + execute_CsrPlugin_csr_2822 <= (decode_INSTRUCTION[31 : 20] == 12'hb06); + end + if(when_CsrPlugin_l1264_27) begin + execute_CsrPlugin_csr_2823 <= (decode_INSTRUCTION[31 : 20] == 12'hb07); + end + if(when_CsrPlugin_l1264_28) begin + execute_CsrPlugin_csr_2824 <= (decode_INSTRUCTION[31 : 20] == 12'hb08); + end + if(when_CsrPlugin_l1264_29) begin + execute_CsrPlugin_csr_2825 <= (decode_INSTRUCTION[31 : 20] == 12'hb09); + end + if(when_CsrPlugin_l1264_30) begin + execute_CsrPlugin_csr_2826 <= (decode_INSTRUCTION[31 : 20] == 12'hb0a); + end + if(when_CsrPlugin_l1264_31) begin + execute_CsrPlugin_csr_2827 <= (decode_INSTRUCTION[31 : 20] == 12'hb0b); + end + if(when_CsrPlugin_l1264_32) begin + execute_CsrPlugin_csr_2828 <= (decode_INSTRUCTION[31 : 20] == 12'hb0c); + end + if(when_CsrPlugin_l1264_33) begin + execute_CsrPlugin_csr_2829 <= (decode_INSTRUCTION[31 : 20] == 12'hb0d); + end + if(when_CsrPlugin_l1264_34) begin + execute_CsrPlugin_csr_2830 <= (decode_INSTRUCTION[31 : 20] == 12'hb0e); + end + if(when_CsrPlugin_l1264_35) begin + execute_CsrPlugin_csr_2831 <= (decode_INSTRUCTION[31 : 20] == 12'hb0f); + end + if(when_CsrPlugin_l1264_36) begin + execute_CsrPlugin_csr_2832 <= (decode_INSTRUCTION[31 : 20] == 12'hb10); + end + if(when_CsrPlugin_l1264_37) begin + execute_CsrPlugin_csr_2833 <= (decode_INSTRUCTION[31 : 20] == 12'hb11); + end + if(when_CsrPlugin_l1264_38) begin + execute_CsrPlugin_csr_2834 <= (decode_INSTRUCTION[31 : 20] == 12'hb12); + end + if(when_CsrPlugin_l1264_39) begin + execute_CsrPlugin_csr_2835 <= (decode_INSTRUCTION[31 : 20] == 12'hb13); + end + if(execute_CsrPlugin_csr_836) begin + if(execute_CsrPlugin_writeEnable) begin + CsrPlugin_mip_MSIP <= CsrPlugin_csrMapping_writeDataSignal[3]; + end + end + if(execute_CsrPlugin_csr_773) begin + if(execute_CsrPlugin_writeEnable) begin + CsrPlugin_mtvec_base <= CsrPlugin_csrMapping_writeDataSignal[31 : 2]; + CsrPlugin_mtvec_mode <= CsrPlugin_csrMapping_writeDataSignal[1 : 0]; + end + end + if(execute_CsrPlugin_csr_833) begin + if(execute_CsrPlugin_writeEnable) begin + CsrPlugin_mepc <= CsrPlugin_csrMapping_writeDataSignal[31 : 0]; + end + end + if(execute_CsrPlugin_csr_832) begin + if(execute_CsrPlugin_writeEnable) begin + CsrPlugin_mscratch <= CsrPlugin_csrMapping_writeDataSignal[31 : 0]; + end + end + if(execute_CsrPlugin_csr_834) begin + if(execute_CsrPlugin_writeEnable) begin + CsrPlugin_mcause_interrupt <= CsrPlugin_csrMapping_writeDataSignal[31]; + CsrPlugin_mcause_exceptionCode <= CsrPlugin_csrMapping_writeDataSignal[3 : 0]; + end + end + if(execute_CsrPlugin_csr_835) begin + if(execute_CsrPlugin_writeEnable) begin + CsrPlugin_mtval <= CsrPlugin_csrMapping_writeDataSignal[31 : 0]; + end + end + if(execute_CsrPlugin_csr_2816) begin + if(execute_CsrPlugin_writeEnable) begin + CsrPlugin_mcycle[31 : 0] <= CsrPlugin_csrMapping_writeDataSignal[31 : 0]; + end + end + if(execute_CsrPlugin_csr_2944) begin + if(execute_CsrPlugin_writeEnable) begin + CsrPlugin_mcycle[63 : 32] <= CsrPlugin_csrMapping_writeDataSignal[31 : 0]; + end + end + if(execute_CsrPlugin_csr_2818) begin + if(execute_CsrPlugin_writeEnable) begin + CsrPlugin_minstret[31 : 0] <= CsrPlugin_csrMapping_writeDataSignal[31 : 0]; + end + end + if(execute_CsrPlugin_csr_2946) begin + if(execute_CsrPlugin_writeEnable) begin + CsrPlugin_minstret[63 : 32] <= CsrPlugin_csrMapping_writeDataSignal[31 : 0]; + end + end + if(execute_CsrPlugin_csr_2820) begin + if(execute_CsrPlugin_writeEnable) begin + _zz_CsrPlugin_csrMapping_readDataInit_2 <= CsrPlugin_csrMapping_writeDataSignal[31 : 0]; + end + end + if(execute_CsrPlugin_csr_2821) begin + if(execute_CsrPlugin_writeEnable) begin + _zz_when_GenCoreDefault_l367 <= CsrPlugin_csrMapping_writeDataSignal[31 : 0]; + end + end + if(execute_CsrPlugin_csr_2822) begin + if(execute_CsrPlugin_writeEnable) begin + _zz_CsrPlugin_csrMapping_readDataInit_3 <= CsrPlugin_csrMapping_writeDataSignal[31 : 0]; + end + end + if(execute_CsrPlugin_csr_2823) begin + if(execute_CsrPlugin_writeEnable) begin + _zz_when_GenCoreDefault_l367_1 <= CsrPlugin_csrMapping_writeDataSignal[31 : 0]; + end + end + if(execute_CsrPlugin_csr_2824) begin + if(execute_CsrPlugin_writeEnable) begin + _zz_CsrPlugin_csrMapping_readDataInit_4 <= CsrPlugin_csrMapping_writeDataSignal[31 : 0]; + end + end + if(execute_CsrPlugin_csr_2825) begin + if(execute_CsrPlugin_writeEnable) begin + _zz_when_GenCoreDefault_l367_2 <= CsrPlugin_csrMapping_writeDataSignal[31 : 0]; + end + end + if(execute_CsrPlugin_csr_2826) begin + if(execute_CsrPlugin_writeEnable) begin + _zz_CsrPlugin_csrMapping_readDataInit_5 <= CsrPlugin_csrMapping_writeDataSignal[31 : 0]; + end + end + if(execute_CsrPlugin_csr_2827) begin + if(execute_CsrPlugin_writeEnable) begin + _zz_when_GenCoreDefault_l367_3 <= CsrPlugin_csrMapping_writeDataSignal[31 : 0]; + end + end + if(execute_CsrPlugin_csr_2828) begin + if(execute_CsrPlugin_writeEnable) begin + _zz_CsrPlugin_csrMapping_readDataInit_6 <= CsrPlugin_csrMapping_writeDataSignal[31 : 0]; + end + end + if(execute_CsrPlugin_csr_2829) begin + if(execute_CsrPlugin_writeEnable) begin + _zz_when_GenCoreDefault_l367_4 <= CsrPlugin_csrMapping_writeDataSignal[31 : 0]; + end + end + if(execute_CsrPlugin_csr_2830) begin + if(execute_CsrPlugin_writeEnable) begin + _zz_CsrPlugin_csrMapping_readDataInit_7 <= CsrPlugin_csrMapping_writeDataSignal[31 : 0]; + end + end + if(execute_CsrPlugin_csr_2831) begin + if(execute_CsrPlugin_writeEnable) begin + _zz_when_GenCoreDefault_l367_5 <= CsrPlugin_csrMapping_writeDataSignal[31 : 0]; + end + end + if(execute_CsrPlugin_csr_2832) begin + if(execute_CsrPlugin_writeEnable) begin + _zz_CsrPlugin_csrMapping_readDataInit_8 <= CsrPlugin_csrMapping_writeDataSignal[31 : 0]; + end + end + if(execute_CsrPlugin_csr_2833) begin + if(execute_CsrPlugin_writeEnable) begin + _zz_when_GenCoreDefault_l367_6 <= CsrPlugin_csrMapping_writeDataSignal[31 : 0]; + end + end + if(execute_CsrPlugin_csr_2834) begin + if(execute_CsrPlugin_writeEnable) begin + _zz_CsrPlugin_csrMapping_readDataInit_9 <= CsrPlugin_csrMapping_writeDataSignal[31 : 0]; + end + end + if(execute_CsrPlugin_csr_2835) begin + if(execute_CsrPlugin_writeEnable) begin + _zz_when_GenCoreDefault_l367_7 <= CsrPlugin_csrMapping_writeDataSignal[31 : 0]; + end + end + iBusWishbone_DAT_MISO_regNext <= iBusWishbone_DAT_MISO; + dBusWishbone_DAT_MISO_regNext <= dBusWishbone_DAT_MISO; + end + + always @(posedge clk) begin + DebugPlugin_firstCycle <= 1'b0; + if(debug_bus_cmd_ready) begin + DebugPlugin_firstCycle <= 1'b1; + end + DebugPlugin_secondCycle <= DebugPlugin_firstCycle; + DebugPlugin_isPipBusy <= (({writeBack_arbitration_isValid,{memory_arbitration_isValid,{execute_arbitration_isValid,decode_arbitration_isValid}}} != 4'b0000) || IBusCachedPlugin_incomingInstruction); + if(writeBack_arbitration_isValid) begin + DebugPlugin_busReadDataReg <= _zz_decode_RS2_2; + end + _zz_when_DebugPlugin_l244 <= debug_bus_cmd_payload_address[2]; + if(when_DebugPlugin_l284) begin + DebugPlugin_busReadDataReg <= execute_PC; + end + DebugPlugin_resetIt_regNext <= DebugPlugin_resetIt; + end + + always @(posedge clk) begin + if(debugReset) begin + DebugPlugin_resetIt <= 1'b0; + DebugPlugin_haltIt <= 1'b0; + DebugPlugin_stepIt <= 1'b0; + DebugPlugin_godmode <= 1'b0; + DebugPlugin_haltedByBreak <= 1'b0; + DebugPlugin_debugUsed <= 1'b0; + DebugPlugin_disableEbreak <= 1'b0; + end else begin + if(when_DebugPlugin_l225) begin + DebugPlugin_godmode <= 1'b1; + end + if(debug_bus_cmd_valid) begin + DebugPlugin_debugUsed <= 1'b1; + end + if(debug_bus_cmd_valid) begin + case(switch_DebugPlugin_l256) + 6'h0 : begin + if(debug_bus_cmd_payload_wr) begin + DebugPlugin_stepIt <= debug_bus_cmd_payload_data[4]; + if(when_DebugPlugin_l260) begin + DebugPlugin_resetIt <= 1'b1; + end + if(when_DebugPlugin_l260_1) begin + DebugPlugin_resetIt <= 1'b0; + end + if(when_DebugPlugin_l261) begin + DebugPlugin_haltIt <= 1'b1; + end + if(when_DebugPlugin_l261_1) begin + DebugPlugin_haltIt <= 1'b0; + end + if(when_DebugPlugin_l262) begin + DebugPlugin_haltedByBreak <= 1'b0; + end + if(when_DebugPlugin_l263) begin + DebugPlugin_godmode <= 1'b0; + end + if(when_DebugPlugin_l264) begin + DebugPlugin_disableEbreak <= 1'b1; + end + if(when_DebugPlugin_l264_1) begin + DebugPlugin_disableEbreak <= 1'b0; + end + end + end + default : begin + end + endcase + end + if(when_DebugPlugin_l284) begin + if(when_DebugPlugin_l287) begin + DebugPlugin_haltIt <= 1'b1; + DebugPlugin_haltedByBreak <= 1'b1; + end + end + if(when_DebugPlugin_l300) begin + if(decode_arbitration_isValid) begin + DebugPlugin_haltIt <= 1'b1; + end + end + end + end + + +endmodule + +module DataCache ( + input io_cpu_execute_isValid, + input [31:0] io_cpu_execute_address, + output reg io_cpu_execute_haltIt, + input io_cpu_execute_args_wr, + input [1:0] io_cpu_execute_args_size, + input io_cpu_execute_args_totalyConsistent, + output io_cpu_execute_refilling, + input io_cpu_memory_isValid, + input io_cpu_memory_isStuck, + output io_cpu_memory_isWrite, + input [31:0] io_cpu_memory_address, + input [31:0] io_cpu_memory_mmuRsp_physicalAddress, + input io_cpu_memory_mmuRsp_isIoAccess, + input io_cpu_memory_mmuRsp_isPaging, + input io_cpu_memory_mmuRsp_allowRead, + input io_cpu_memory_mmuRsp_allowWrite, + input io_cpu_memory_mmuRsp_allowExecute, + input io_cpu_memory_mmuRsp_exception, + input io_cpu_memory_mmuRsp_refilling, + input io_cpu_memory_mmuRsp_bypassTranslation, + input io_cpu_writeBack_isValid, + input io_cpu_writeBack_isStuck, + input io_cpu_writeBack_isUser, + output reg io_cpu_writeBack_haltIt, + output io_cpu_writeBack_isWrite, + input [31:0] io_cpu_writeBack_storeData, + output reg [31:0] io_cpu_writeBack_data, + input [31:0] io_cpu_writeBack_address, + output io_cpu_writeBack_mmuException, + output io_cpu_writeBack_unalignedAccess, + output reg io_cpu_writeBack_accessError, + output io_cpu_writeBack_keepMemRspData, + input io_cpu_writeBack_fence_SW, + input io_cpu_writeBack_fence_SR, + input io_cpu_writeBack_fence_SO, + input io_cpu_writeBack_fence_SI, + input io_cpu_writeBack_fence_PW, + input io_cpu_writeBack_fence_PR, + input io_cpu_writeBack_fence_PO, + input io_cpu_writeBack_fence_PI, + input [3:0] io_cpu_writeBack_fence_FM, + output io_cpu_writeBack_exclusiveOk, + output reg io_cpu_redo, + input io_cpu_flush_valid, + output io_cpu_flush_ready, + output reg io_mem_cmd_valid, + input io_mem_cmd_ready, + output reg io_mem_cmd_payload_wr, + output io_mem_cmd_payload_uncached, + output reg [31:0] io_mem_cmd_payload_address, + output [31:0] io_mem_cmd_payload_data, + output [3:0] io_mem_cmd_payload_mask, + output reg [2:0] io_mem_cmd_payload_size, + output io_mem_cmd_payload_last, + input io_mem_rsp_valid, + input io_mem_rsp_payload_last, + input [31:0] io_mem_rsp_payload_data, + input io_mem_rsp_payload_error, + input clk, + input reset +); + reg [20:0] _zz_ways_0_tags_port0; + reg [31:0] _zz_ways_0_data_port0; + wire [20:0] _zz_ways_0_tags_port; + wire [10:0] _zz_stage0_dataColisions; + wire [10:0] _zz__zz_stageA_dataColisions; + wire [0:0] _zz_when; + wire [2:0] _zz_loader_counter_valueNext; + wire [0:0] _zz_loader_counter_valueNext_1; + wire [1:0] _zz_loader_waysAllocator; + reg _zz_1; + reg _zz_2; + wire haltCpu; + reg tagsReadCmd_valid; + reg [7:0] tagsReadCmd_payload; + reg tagsWriteCmd_valid; + reg [0:0] tagsWriteCmd_payload_way; + reg [7:0] tagsWriteCmd_payload_address; + reg tagsWriteCmd_payload_data_valid; + reg tagsWriteCmd_payload_data_error; + reg [18:0] tagsWriteCmd_payload_data_address; + reg tagsWriteLastCmd_valid; + reg [0:0] tagsWriteLastCmd_payload_way; + reg [7:0] tagsWriteLastCmd_payload_address; + reg tagsWriteLastCmd_payload_data_valid; + reg tagsWriteLastCmd_payload_data_error; + reg [18:0] tagsWriteLastCmd_payload_data_address; + reg dataReadCmd_valid; + reg [10:0] dataReadCmd_payload; + reg dataWriteCmd_valid; + reg [0:0] dataWriteCmd_payload_way; + reg [10:0] dataWriteCmd_payload_address; + reg [31:0] dataWriteCmd_payload_data; + reg [3:0] dataWriteCmd_payload_mask; + wire _zz_ways_0_tagsReadRsp_valid; + wire ways_0_tagsReadRsp_valid; + wire ways_0_tagsReadRsp_error; + wire [18:0] ways_0_tagsReadRsp_address; + wire [20:0] _zz_ways_0_tagsReadRsp_valid_1; + wire _zz_ways_0_dataReadRspMem; + wire [31:0] ways_0_dataReadRspMem; + wire [31:0] ways_0_dataReadRsp; + wire when_DataCache_l634; + wire when_DataCache_l637; + wire when_DataCache_l656; + wire rspSync; + wire rspLast; + reg memCmdSent; + wire io_mem_cmd_fire; + wire when_DataCache_l678; + reg [3:0] _zz_stage0_mask; + wire [3:0] stage0_mask; + wire [0:0] stage0_dataColisions; + wire [0:0] stage0_wayInvalidate; + wire stage0_isAmo; + wire when_DataCache_l763; + reg stageA_request_wr; + reg [1:0] stageA_request_size; + reg stageA_request_totalyConsistent; + wire when_DataCache_l763_1; + reg [3:0] stageA_mask; + wire stageA_isAmo; + wire stageA_isLrsc; + wire [0:0] stageA_wayHits; + wire when_DataCache_l763_2; + reg [0:0] stageA_wayInvalidate; + wire when_DataCache_l763_3; + reg [0:0] stage0_dataColisions_regNextWhen; + wire [0:0] _zz_stageA_dataColisions; + wire [0:0] stageA_dataColisions; + wire when_DataCache_l814; + reg stageB_request_wr; + reg [1:0] stageB_request_size; + reg stageB_request_totalyConsistent; + reg stageB_mmuRspFreeze; + wire when_DataCache_l816; + reg [31:0] stageB_mmuRsp_physicalAddress; + reg stageB_mmuRsp_isIoAccess; + reg stageB_mmuRsp_isPaging; + reg stageB_mmuRsp_allowRead; + reg stageB_mmuRsp_allowWrite; + reg stageB_mmuRsp_allowExecute; + reg stageB_mmuRsp_exception; + reg stageB_mmuRsp_refilling; + reg stageB_mmuRsp_bypassTranslation; + wire when_DataCache_l813; + reg stageB_tagsReadRsp_0_valid; + reg stageB_tagsReadRsp_0_error; + reg [18:0] stageB_tagsReadRsp_0_address; + wire when_DataCache_l813_1; + reg [31:0] stageB_dataReadRsp_0; + wire when_DataCache_l812; + reg [0:0] stageB_wayInvalidate; + wire stageB_consistancyHazard; + wire when_DataCache_l812_1; + reg [0:0] stageB_dataColisions; + wire when_DataCache_l812_2; + reg stageB_unaligned; + wire when_DataCache_l812_3; + reg [0:0] stageB_waysHitsBeforeInvalidate; + wire [0:0] stageB_waysHits; + wire stageB_waysHit; + wire [31:0] stageB_dataMux; + wire when_DataCache_l812_4; + reg [3:0] stageB_mask; + reg stageB_loaderValid; + wire [31:0] stageB_ioMemRspMuxed; + reg stageB_flusher_waitDone; + wire stageB_flusher_hold; + reg [8:0] stageB_flusher_counter; + wire when_DataCache_l842; + wire when_DataCache_l848; + reg stageB_flusher_start; + wire stageB_isAmo; + wire stageB_isAmoCached; + wire stageB_isExternalLsrc; + wire stageB_isExternalAmo; + wire [31:0] stageB_requestDataBypass; + reg stageB_cpuWriteToCache; + wire when_DataCache_l911; + wire stageB_badPermissions; + wire stageB_loadStoreFault; + wire stageB_bypassCache; + wire when_DataCache_l980; + wire when_DataCache_l989; + wire when_DataCache_l994; + wire when_DataCache_l1005; + wire when_DataCache_l1017; + wire when_DataCache_l976; + wire when_DataCache_l1051; + wire when_DataCache_l1060; + reg loader_valid; + reg loader_counter_willIncrement; + wire loader_counter_willClear; + reg [2:0] loader_counter_valueNext; + reg [2:0] loader_counter_value; + wire loader_counter_willOverflowIfInc; + wire loader_counter_willOverflow; + reg [0:0] loader_waysAllocator; + reg loader_error; + wire loader_kill; + reg loader_killReg; + wire when_DataCache_l1075; + wire loader_done; + wire when_DataCache_l1103; + reg loader_valid_regNext; + wire when_DataCache_l1107; + wire when_DataCache_l1110; + (* ram_style = "block" *) reg [20:0] ways_0_tags [0:255]; + (* ram_style = "block" *) reg [7:0] ways_0_data_symbol0 [0:2047]; + (* ram_style = "block" *) reg [7:0] ways_0_data_symbol1 [0:2047]; + (* ram_style = "block" *) reg [7:0] ways_0_data_symbol2 [0:2047]; + (* ram_style = "block" *) reg [7:0] ways_0_data_symbol3 [0:2047]; + reg [7:0] _zz_ways_0_datasymbol_read; + reg [7:0] _zz_ways_0_datasymbol_read_1; + reg [7:0] _zz_ways_0_datasymbol_read_2; + reg [7:0] _zz_ways_0_datasymbol_read_3; + + assign _zz_stage0_dataColisions = (io_cpu_execute_address[12 : 2] >>> 0); + assign _zz__zz_stageA_dataColisions = (io_cpu_memory_address[12 : 2] >>> 0); + assign _zz_when = 1'b1; + assign _zz_loader_counter_valueNext_1 = loader_counter_willIncrement; + assign _zz_loader_counter_valueNext = {2'd0, _zz_loader_counter_valueNext_1}; + assign _zz_loader_waysAllocator = {loader_waysAllocator,loader_waysAllocator[0]}; + assign _zz_ways_0_tags_port = {tagsWriteCmd_payload_data_address,{tagsWriteCmd_payload_data_error,tagsWriteCmd_payload_data_valid}}; + always @(posedge clk) begin + if(_zz_ways_0_tagsReadRsp_valid) begin + _zz_ways_0_tags_port0 <= ways_0_tags[tagsReadCmd_payload]; + end + end + + always @(posedge clk) begin + if(_zz_2) begin + ways_0_tags[tagsWriteCmd_payload_address] <= _zz_ways_0_tags_port; + end + end + + always @(*) begin + _zz_ways_0_data_port0 = {_zz_ways_0_datasymbol_read_3, _zz_ways_0_datasymbol_read_2, _zz_ways_0_datasymbol_read_1, _zz_ways_0_datasymbol_read}; + end + always @(posedge clk) begin + if(_zz_ways_0_dataReadRspMem) begin + _zz_ways_0_datasymbol_read <= ways_0_data_symbol0[dataReadCmd_payload]; + _zz_ways_0_datasymbol_read_1 <= ways_0_data_symbol1[dataReadCmd_payload]; + _zz_ways_0_datasymbol_read_2 <= ways_0_data_symbol2[dataReadCmd_payload]; + _zz_ways_0_datasymbol_read_3 <= ways_0_data_symbol3[dataReadCmd_payload]; + end + end + + always @(posedge clk) begin + if(dataWriteCmd_payload_mask[0] && _zz_1) begin + ways_0_data_symbol0[dataWriteCmd_payload_address] <= dataWriteCmd_payload_data[7 : 0]; + end + if(dataWriteCmd_payload_mask[1] && _zz_1) begin + ways_0_data_symbol1[dataWriteCmd_payload_address] <= dataWriteCmd_payload_data[15 : 8]; + end + if(dataWriteCmd_payload_mask[2] && _zz_1) begin + ways_0_data_symbol2[dataWriteCmd_payload_address] <= dataWriteCmd_payload_data[23 : 16]; + end + if(dataWriteCmd_payload_mask[3] && _zz_1) begin + ways_0_data_symbol3[dataWriteCmd_payload_address] <= dataWriteCmd_payload_data[31 : 24]; + end + end + + always @(*) begin + _zz_1 = 1'b0; + if(when_DataCache_l637) begin + _zz_1 = 1'b1; + end + end + + always @(*) begin + _zz_2 = 1'b0; + if(when_DataCache_l634) begin + _zz_2 = 1'b1; + end + end + + assign haltCpu = 1'b0; + assign _zz_ways_0_tagsReadRsp_valid = (tagsReadCmd_valid && (! io_cpu_memory_isStuck)); + assign _zz_ways_0_tagsReadRsp_valid_1 = _zz_ways_0_tags_port0; + assign ways_0_tagsReadRsp_valid = _zz_ways_0_tagsReadRsp_valid_1[0]; + assign ways_0_tagsReadRsp_error = _zz_ways_0_tagsReadRsp_valid_1[1]; + assign ways_0_tagsReadRsp_address = _zz_ways_0_tagsReadRsp_valid_1[20 : 2]; + assign _zz_ways_0_dataReadRspMem = (dataReadCmd_valid && (! io_cpu_memory_isStuck)); + assign ways_0_dataReadRspMem = _zz_ways_0_data_port0; + assign ways_0_dataReadRsp = ways_0_dataReadRspMem[31 : 0]; + assign when_DataCache_l634 = (tagsWriteCmd_valid && tagsWriteCmd_payload_way[0]); + assign when_DataCache_l637 = (dataWriteCmd_valid && dataWriteCmd_payload_way[0]); + always @(*) begin + tagsReadCmd_valid = 1'b0; + if(when_DataCache_l656) begin + tagsReadCmd_valid = 1'b1; + end + end + + always @(*) begin + tagsReadCmd_payload = 8'bxxxxxxxx; + if(when_DataCache_l656) begin + tagsReadCmd_payload = io_cpu_execute_address[12 : 5]; + end + end + + always @(*) begin + dataReadCmd_valid = 1'b0; + if(when_DataCache_l656) begin + dataReadCmd_valid = 1'b1; + end + end + + always @(*) begin + dataReadCmd_payload = 11'bxxxxxxxxxxx; + if(when_DataCache_l656) begin + dataReadCmd_payload = io_cpu_execute_address[12 : 2]; + end + end + + always @(*) begin + tagsWriteCmd_valid = 1'b0; + if(when_DataCache_l842) begin + tagsWriteCmd_valid = 1'b1; + end + if(when_DataCache_l1051) begin + tagsWriteCmd_valid = 1'b0; + end + if(loader_done) begin + tagsWriteCmd_valid = 1'b1; + end + end + + always @(*) begin + tagsWriteCmd_payload_way = 1'bx; + if(when_DataCache_l842) begin + tagsWriteCmd_payload_way = 1'b1; + end + if(loader_done) begin + tagsWriteCmd_payload_way = loader_waysAllocator; + end + end + + always @(*) begin + tagsWriteCmd_payload_address = 8'bxxxxxxxx; + if(when_DataCache_l842) begin + tagsWriteCmd_payload_address = stageB_flusher_counter[7:0]; + end + if(loader_done) begin + tagsWriteCmd_payload_address = stageB_mmuRsp_physicalAddress[12 : 5]; + end + end + + always @(*) begin + tagsWriteCmd_payload_data_valid = 1'bx; + if(when_DataCache_l842) begin + tagsWriteCmd_payload_data_valid = 1'b0; + end + if(loader_done) begin + tagsWriteCmd_payload_data_valid = (! (loader_kill || loader_killReg)); + end + end + + always @(*) begin + tagsWriteCmd_payload_data_error = 1'bx; + if(loader_done) begin + tagsWriteCmd_payload_data_error = (loader_error || (io_mem_rsp_valid && io_mem_rsp_payload_error)); + end + end + + always @(*) begin + tagsWriteCmd_payload_data_address = 19'bxxxxxxxxxxxxxxxxxxx; + if(loader_done) begin + tagsWriteCmd_payload_data_address = stageB_mmuRsp_physicalAddress[31 : 13]; + end + end + + always @(*) begin + dataWriteCmd_valid = 1'b0; + if(stageB_cpuWriteToCache) begin + if(when_DataCache_l911) begin + dataWriteCmd_valid = 1'b1; + end + end + if(when_DataCache_l1051) begin + dataWriteCmd_valid = 1'b0; + end + if(when_DataCache_l1075) begin + dataWriteCmd_valid = 1'b1; + end + end + + always @(*) begin + dataWriteCmd_payload_way = 1'bx; + if(stageB_cpuWriteToCache) begin + dataWriteCmd_payload_way = stageB_waysHits; + end + if(when_DataCache_l1075) begin + dataWriteCmd_payload_way = loader_waysAllocator; + end + end + + always @(*) begin + dataWriteCmd_payload_address = 11'bxxxxxxxxxxx; + if(stageB_cpuWriteToCache) begin + dataWriteCmd_payload_address = stageB_mmuRsp_physicalAddress[12 : 2]; + end + if(when_DataCache_l1075) begin + dataWriteCmd_payload_address = {stageB_mmuRsp_physicalAddress[12 : 5],loader_counter_value}; + end + end + + always @(*) begin + dataWriteCmd_payload_data = 32'bxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx; + if(stageB_cpuWriteToCache) begin + dataWriteCmd_payload_data[31 : 0] = stageB_requestDataBypass; + end + if(when_DataCache_l1075) begin + dataWriteCmd_payload_data = io_mem_rsp_payload_data; + end + end + + always @(*) begin + dataWriteCmd_payload_mask = 4'bxxxx; + if(stageB_cpuWriteToCache) begin + dataWriteCmd_payload_mask = 4'b0000; + if(_zz_when[0]) begin + dataWriteCmd_payload_mask[3 : 0] = stageB_mask; + end + end + if(when_DataCache_l1075) begin + dataWriteCmd_payload_mask = 4'b1111; + end + end + + assign when_DataCache_l656 = (io_cpu_execute_isValid && (! io_cpu_memory_isStuck)); + always @(*) begin + io_cpu_execute_haltIt = 1'b0; + if(when_DataCache_l842) begin + io_cpu_execute_haltIt = 1'b1; + end + end + + assign rspSync = 1'b1; + assign rspLast = 1'b1; + assign io_mem_cmd_fire = (io_mem_cmd_valid && io_mem_cmd_ready); + assign when_DataCache_l678 = (! io_cpu_writeBack_isStuck); + always @(*) begin + _zz_stage0_mask = 4'bxxxx; + case(io_cpu_execute_args_size) + 2'b00 : begin + _zz_stage0_mask = 4'b0001; + end + 2'b01 : begin + _zz_stage0_mask = 4'b0011; + end + 2'b10 : begin + _zz_stage0_mask = 4'b1111; + end + default : begin + end + endcase + end + + assign stage0_mask = (_zz_stage0_mask <<< io_cpu_execute_address[1 : 0]); + assign stage0_dataColisions[0] = (((dataWriteCmd_valid && dataWriteCmd_payload_way[0]) && (dataWriteCmd_payload_address == _zz_stage0_dataColisions)) && ((stage0_mask & dataWriteCmd_payload_mask[3 : 0]) != 4'b0000)); + assign stage0_wayInvalidate = 1'b0; + assign stage0_isAmo = 1'b0; + assign when_DataCache_l763 = (! io_cpu_memory_isStuck); + assign when_DataCache_l763_1 = (! io_cpu_memory_isStuck); + assign io_cpu_memory_isWrite = stageA_request_wr; + assign stageA_isAmo = 1'b0; + assign stageA_isLrsc = 1'b0; + assign stageA_wayHits = ((io_cpu_memory_mmuRsp_physicalAddress[31 : 13] == ways_0_tagsReadRsp_address) && ways_0_tagsReadRsp_valid); + assign when_DataCache_l763_2 = (! io_cpu_memory_isStuck); + assign when_DataCache_l763_3 = (! io_cpu_memory_isStuck); + assign _zz_stageA_dataColisions[0] = (((dataWriteCmd_valid && dataWriteCmd_payload_way[0]) && (dataWriteCmd_payload_address == _zz__zz_stageA_dataColisions)) && ((stageA_mask & dataWriteCmd_payload_mask[3 : 0]) != 4'b0000)); + assign stageA_dataColisions = (stage0_dataColisions_regNextWhen | _zz_stageA_dataColisions); + assign when_DataCache_l814 = (! io_cpu_writeBack_isStuck); + always @(*) begin + stageB_mmuRspFreeze = 1'b0; + if(when_DataCache_l1110) begin + stageB_mmuRspFreeze = 1'b1; + end + end + + assign when_DataCache_l816 = ((! io_cpu_writeBack_isStuck) && (! stageB_mmuRspFreeze)); + assign when_DataCache_l813 = (! io_cpu_writeBack_isStuck); + assign when_DataCache_l813_1 = (! io_cpu_writeBack_isStuck); + assign when_DataCache_l812 = (! io_cpu_writeBack_isStuck); + assign stageB_consistancyHazard = 1'b0; + assign when_DataCache_l812_1 = (! io_cpu_writeBack_isStuck); + assign when_DataCache_l812_2 = (! io_cpu_writeBack_isStuck); + assign when_DataCache_l812_3 = (! io_cpu_writeBack_isStuck); + assign stageB_waysHits = (stageB_waysHitsBeforeInvalidate & (~ stageB_wayInvalidate)); + assign stageB_waysHit = (stageB_waysHits != 1'b0); + assign stageB_dataMux = stageB_dataReadRsp_0; + assign when_DataCache_l812_4 = (! io_cpu_writeBack_isStuck); + always @(*) begin + stageB_loaderValid = 1'b0; + if(io_cpu_writeBack_isValid) begin + if(!stageB_isExternalAmo) begin + if(!when_DataCache_l976) begin + if(!when_DataCache_l989) begin + if(io_mem_cmd_ready) begin + stageB_loaderValid = 1'b1; + end + end + end + end + end + if(when_DataCache_l1051) begin + stageB_loaderValid = 1'b0; + end + end + + assign stageB_ioMemRspMuxed = io_mem_rsp_payload_data[31 : 0]; + always @(*) begin + io_cpu_writeBack_haltIt = 1'b1; + if(io_cpu_writeBack_isValid) begin + if(!stageB_isExternalAmo) begin + if(when_DataCache_l976) begin + if(when_DataCache_l980) begin + io_cpu_writeBack_haltIt = 1'b0; + end + end else begin + if(when_DataCache_l989) begin + if(when_DataCache_l994) begin + io_cpu_writeBack_haltIt = 1'b0; + end + end + end + end + end + if(when_DataCache_l1051) begin + io_cpu_writeBack_haltIt = 1'b0; + end + end + + assign stageB_flusher_hold = 1'b0; + assign when_DataCache_l842 = (! stageB_flusher_counter[8]); + assign when_DataCache_l848 = (! stageB_flusher_hold); + assign io_cpu_flush_ready = (stageB_flusher_waitDone && stageB_flusher_counter[8]); + assign stageB_isAmo = 1'b0; + assign stageB_isAmoCached = 1'b0; + assign stageB_isExternalLsrc = 1'b0; + assign stageB_isExternalAmo = 1'b0; + assign stageB_requestDataBypass = io_cpu_writeBack_storeData; + always @(*) begin + stageB_cpuWriteToCache = 1'b0; + if(io_cpu_writeBack_isValid) begin + if(!stageB_isExternalAmo) begin + if(!when_DataCache_l976) begin + if(when_DataCache_l989) begin + stageB_cpuWriteToCache = 1'b1; + end + end + end + end + end + + assign when_DataCache_l911 = (stageB_request_wr && stageB_waysHit); + assign stageB_badPermissions = (((! stageB_mmuRsp_allowWrite) && stageB_request_wr) || ((! stageB_mmuRsp_allowRead) && ((! stageB_request_wr) || stageB_isAmo))); + assign stageB_loadStoreFault = (io_cpu_writeBack_isValid && (stageB_mmuRsp_exception || stageB_badPermissions)); + always @(*) begin + io_cpu_redo = 1'b0; + if(io_cpu_writeBack_isValid) begin + if(!stageB_isExternalAmo) begin + if(!when_DataCache_l976) begin + if(when_DataCache_l989) begin + if(when_DataCache_l1005) begin + io_cpu_redo = 1'b1; + end + end + end + end + end + if(when_DataCache_l1060) begin + io_cpu_redo = 1'b1; + end + if(when_DataCache_l1107) begin + io_cpu_redo = 1'b1; + end + end + + always @(*) begin + io_cpu_writeBack_accessError = 1'b0; + if(stageB_bypassCache) begin + io_cpu_writeBack_accessError = ((((! stageB_request_wr) && 1'b1) && io_mem_rsp_valid) && io_mem_rsp_payload_error); + end else begin + io_cpu_writeBack_accessError = (((stageB_waysHits & stageB_tagsReadRsp_0_error) != 1'b0) || (stageB_loadStoreFault && (! stageB_mmuRsp_isPaging))); + end + end + + assign io_cpu_writeBack_mmuException = (stageB_loadStoreFault && stageB_mmuRsp_isPaging); + assign io_cpu_writeBack_unalignedAccess = (io_cpu_writeBack_isValid && stageB_unaligned); + assign io_cpu_writeBack_isWrite = stageB_request_wr; + always @(*) begin + io_mem_cmd_valid = 1'b0; + if(io_cpu_writeBack_isValid) begin + if(!stageB_isExternalAmo) begin + if(when_DataCache_l976) begin + io_mem_cmd_valid = (! memCmdSent); + end else begin + if(when_DataCache_l989) begin + if(stageB_request_wr) begin + io_mem_cmd_valid = 1'b1; + end + end else begin + if(when_DataCache_l1017) begin + io_mem_cmd_valid = 1'b1; + end + end + end + end + end + if(when_DataCache_l1051) begin + io_mem_cmd_valid = 1'b0; + end + end + + always @(*) begin + io_mem_cmd_payload_address = stageB_mmuRsp_physicalAddress; + if(io_cpu_writeBack_isValid) begin + if(!stageB_isExternalAmo) begin + if(!when_DataCache_l976) begin + if(!when_DataCache_l989) begin + io_mem_cmd_payload_address[4 : 0] = 5'h0; + end + end + end + end + end + + assign io_mem_cmd_payload_last = 1'b1; + always @(*) begin + io_mem_cmd_payload_wr = stageB_request_wr; + if(io_cpu_writeBack_isValid) begin + if(!stageB_isExternalAmo) begin + if(!when_DataCache_l976) begin + if(!when_DataCache_l989) begin + io_mem_cmd_payload_wr = 1'b0; + end + end + end + end + end + + assign io_mem_cmd_payload_mask = stageB_mask; + assign io_mem_cmd_payload_data = stageB_requestDataBypass; + assign io_mem_cmd_payload_uncached = stageB_mmuRsp_isIoAccess; + always @(*) begin + io_mem_cmd_payload_size = {1'd0, stageB_request_size}; + if(io_cpu_writeBack_isValid) begin + if(!stageB_isExternalAmo) begin + if(!when_DataCache_l976) begin + if(!when_DataCache_l989) begin + io_mem_cmd_payload_size = 3'b101; + end + end + end + end + end + + assign stageB_bypassCache = ((stageB_mmuRsp_isIoAccess || stageB_isExternalLsrc) || stageB_isExternalAmo); + assign io_cpu_writeBack_keepMemRspData = 1'b0; + assign when_DataCache_l980 = ((! stageB_request_wr) ? (io_mem_rsp_valid && rspSync) : io_mem_cmd_ready); + assign when_DataCache_l989 = (stageB_waysHit || (stageB_request_wr && (! stageB_isAmoCached))); + assign when_DataCache_l994 = ((! stageB_request_wr) || io_mem_cmd_ready); + assign when_DataCache_l1005 = (((! stageB_request_wr) || stageB_isAmoCached) && ((stageB_dataColisions & stageB_waysHits) != 1'b0)); + assign when_DataCache_l1017 = (! memCmdSent); + assign when_DataCache_l976 = (stageB_mmuRsp_isIoAccess || stageB_isExternalLsrc); + always @(*) begin + if(stageB_bypassCache) begin + io_cpu_writeBack_data = stageB_ioMemRspMuxed; + end else begin + io_cpu_writeBack_data = stageB_dataMux; + end + end + + assign when_DataCache_l1051 = ((((stageB_consistancyHazard || stageB_mmuRsp_refilling) || io_cpu_writeBack_accessError) || io_cpu_writeBack_mmuException) || io_cpu_writeBack_unalignedAccess); + assign when_DataCache_l1060 = (io_cpu_writeBack_isValid && (stageB_mmuRsp_refilling || stageB_consistancyHazard)); + always @(*) begin + loader_counter_willIncrement = 1'b0; + if(when_DataCache_l1075) begin + loader_counter_willIncrement = 1'b1; + end + end + + assign loader_counter_willClear = 1'b0; + assign loader_counter_willOverflowIfInc = (loader_counter_value == 3'b111); + assign loader_counter_willOverflow = (loader_counter_willOverflowIfInc && loader_counter_willIncrement); + always @(*) begin + loader_counter_valueNext = (loader_counter_value + _zz_loader_counter_valueNext); + if(loader_counter_willClear) begin + loader_counter_valueNext = 3'b000; + end + end + + assign loader_kill = 1'b0; + assign when_DataCache_l1075 = ((loader_valid && io_mem_rsp_valid) && rspLast); + assign loader_done = loader_counter_willOverflow; + assign when_DataCache_l1103 = (! loader_valid); + assign when_DataCache_l1107 = (loader_valid && (! loader_valid_regNext)); + assign io_cpu_execute_refilling = loader_valid; + assign when_DataCache_l1110 = (stageB_loaderValid || loader_valid); + always @(posedge clk) begin + tagsWriteLastCmd_valid <= tagsWriteCmd_valid; + tagsWriteLastCmd_payload_way <= tagsWriteCmd_payload_way; + tagsWriteLastCmd_payload_address <= tagsWriteCmd_payload_address; + tagsWriteLastCmd_payload_data_valid <= tagsWriteCmd_payload_data_valid; + tagsWriteLastCmd_payload_data_error <= tagsWriteCmd_payload_data_error; + tagsWriteLastCmd_payload_data_address <= tagsWriteCmd_payload_data_address; + if(when_DataCache_l763) begin + stageA_request_wr <= io_cpu_execute_args_wr; + stageA_request_size <= io_cpu_execute_args_size; + stageA_request_totalyConsistent <= io_cpu_execute_args_totalyConsistent; + end + if(when_DataCache_l763_1) begin + stageA_mask <= stage0_mask; + end + if(when_DataCache_l763_2) begin + stageA_wayInvalidate <= stage0_wayInvalidate; + end + if(when_DataCache_l763_3) begin + stage0_dataColisions_regNextWhen <= stage0_dataColisions; + end + if(when_DataCache_l814) begin + stageB_request_wr <= stageA_request_wr; + stageB_request_size <= stageA_request_size; + stageB_request_totalyConsistent <= stageA_request_totalyConsistent; + end + if(when_DataCache_l816) begin + stageB_mmuRsp_physicalAddress <= io_cpu_memory_mmuRsp_physicalAddress; + stageB_mmuRsp_isIoAccess <= io_cpu_memory_mmuRsp_isIoAccess; + stageB_mmuRsp_isPaging <= io_cpu_memory_mmuRsp_isPaging; + stageB_mmuRsp_allowRead <= io_cpu_memory_mmuRsp_allowRead; + stageB_mmuRsp_allowWrite <= io_cpu_memory_mmuRsp_allowWrite; + stageB_mmuRsp_allowExecute <= io_cpu_memory_mmuRsp_allowExecute; + stageB_mmuRsp_exception <= io_cpu_memory_mmuRsp_exception; + stageB_mmuRsp_refilling <= io_cpu_memory_mmuRsp_refilling; + stageB_mmuRsp_bypassTranslation <= io_cpu_memory_mmuRsp_bypassTranslation; + end + if(when_DataCache_l813) begin + stageB_tagsReadRsp_0_valid <= ways_0_tagsReadRsp_valid; + stageB_tagsReadRsp_0_error <= ways_0_tagsReadRsp_error; + stageB_tagsReadRsp_0_address <= ways_0_tagsReadRsp_address; + end + if(when_DataCache_l813_1) begin + stageB_dataReadRsp_0 <= ways_0_dataReadRsp; + end + if(when_DataCache_l812) begin + stageB_wayInvalidate <= stageA_wayInvalidate; + end + if(when_DataCache_l812_1) begin + stageB_dataColisions <= stageA_dataColisions; + end + if(when_DataCache_l812_2) begin + stageB_unaligned <= ({((stageA_request_size == 2'b10) && (io_cpu_memory_address[1 : 0] != 2'b00)),((stageA_request_size == 2'b01) && (io_cpu_memory_address[0 : 0] != 1'b0))} != 2'b00); + end + if(when_DataCache_l812_3) begin + stageB_waysHitsBeforeInvalidate <= stageA_wayHits; + end + if(when_DataCache_l812_4) begin + stageB_mask <= stageA_mask; + end + loader_valid_regNext <= loader_valid; + end + + always @(posedge clk) begin + if(reset) begin + memCmdSent <= 1'b0; + stageB_flusher_waitDone <= 1'b0; + stageB_flusher_counter <= 9'h0; + stageB_flusher_start <= 1'b1; + loader_valid <= 1'b0; + loader_counter_value <= 3'b000; + loader_waysAllocator <= 1'b1; + loader_error <= 1'b0; + loader_killReg <= 1'b0; + end else begin + if(io_mem_cmd_fire) begin + memCmdSent <= 1'b1; + end + if(when_DataCache_l678) begin + memCmdSent <= 1'b0; + end + if(io_cpu_flush_ready) begin + stageB_flusher_waitDone <= 1'b0; + end + if(when_DataCache_l842) begin + if(when_DataCache_l848) begin + stageB_flusher_counter <= (stageB_flusher_counter + 9'h001); + end + end + stageB_flusher_start <= (((((((! stageB_flusher_waitDone) && (! stageB_flusher_start)) && io_cpu_flush_valid) && (! io_cpu_execute_isValid)) && (! io_cpu_memory_isValid)) && (! io_cpu_writeBack_isValid)) && (! io_cpu_redo)); + if(stageB_flusher_start) begin + stageB_flusher_waitDone <= 1'b1; + stageB_flusher_counter <= 9'h0; + end + `ifndef SYNTHESIS + `ifdef FORMAL + assert((! ((io_cpu_writeBack_isValid && (! io_cpu_writeBack_haltIt)) && io_cpu_writeBack_isStuck))); + `else + if(!(! ((io_cpu_writeBack_isValid && (! io_cpu_writeBack_haltIt)) && io_cpu_writeBack_isStuck))) begin + $display("ERROR writeBack stuck by another plugin is not allowed"); + end + `endif + `endif + if(stageB_loaderValid) begin + loader_valid <= 1'b1; + end + loader_counter_value <= loader_counter_valueNext; + if(loader_kill) begin + loader_killReg <= 1'b1; + end + if(when_DataCache_l1075) begin + loader_error <= (loader_error || io_mem_rsp_payload_error); + end + if(loader_done) begin + loader_valid <= 1'b0; + loader_error <= 1'b0; + loader_killReg <= 1'b0; + end + if(when_DataCache_l1103) begin + loader_waysAllocator <= _zz_loader_waysAllocator[0:0]; + end + end + end + + +endmodule + +module InstructionCache ( + input io_flush, + input io_cpu_prefetch_isValid, + output reg io_cpu_prefetch_haltIt, + input [31:0] io_cpu_prefetch_pc, + input io_cpu_fetch_isValid, + input io_cpu_fetch_isStuck, + input io_cpu_fetch_isRemoved, + input [31:0] io_cpu_fetch_pc, + output [31:0] io_cpu_fetch_data, + input [31:0] io_cpu_fetch_mmuRsp_physicalAddress, + input io_cpu_fetch_mmuRsp_isIoAccess, + input io_cpu_fetch_mmuRsp_isPaging, + input io_cpu_fetch_mmuRsp_allowRead, + input io_cpu_fetch_mmuRsp_allowWrite, + input io_cpu_fetch_mmuRsp_allowExecute, + input io_cpu_fetch_mmuRsp_exception, + input io_cpu_fetch_mmuRsp_refilling, + input io_cpu_fetch_mmuRsp_bypassTranslation, + output [31:0] io_cpu_fetch_physicalAddress, + input io_cpu_decode_isValid, + input io_cpu_decode_isStuck, + input [31:0] io_cpu_decode_pc, + output [31:0] io_cpu_decode_physicalAddress, + output [31:0] io_cpu_decode_data, + output io_cpu_decode_cacheMiss, + output io_cpu_decode_error, + output io_cpu_decode_mmuRefilling, + output io_cpu_decode_mmuException, + input io_cpu_decode_isUser, + input io_cpu_fill_valid, + input [31:0] io_cpu_fill_payload, + output io_mem_cmd_valid, + input io_mem_cmd_ready, + output [31:0] io_mem_cmd_payload_address, + output [2:0] io_mem_cmd_payload_size, + input io_mem_rsp_valid, + input [31:0] io_mem_rsp_payload_data, + input io_mem_rsp_payload_error, + input [2:0] _zz_when_Fetcher_l398, + input [31:0] _zz_io_cpu_fetch_data_regNextWhen, + input clk, + input reset +); + reg [31:0] _zz_banks_0_port1; + reg [20:0] _zz_ways_0_tags_port1; + wire [20:0] _zz_ways_0_tags_port; + reg _zz_1; + reg _zz_2; + reg lineLoader_fire; + reg lineLoader_valid; + (* keep , syn_keep *) reg [31:0] lineLoader_address /* synthesis syn_keep = 1 */ ; + reg lineLoader_hadError; + reg lineLoader_flushPending; + reg [8:0] lineLoader_flushCounter; + wire when_InstructionCache_l338; + reg _zz_when_InstructionCache_l342; + wire when_InstructionCache_l342; + wire when_InstructionCache_l351; + reg lineLoader_cmdSent; + wire io_mem_cmd_fire; + wire when_Utils_l357; + reg lineLoader_wayToAllocate_willIncrement; + wire lineLoader_wayToAllocate_willClear; + wire lineLoader_wayToAllocate_willOverflowIfInc; + wire lineLoader_wayToAllocate_willOverflow; + (* keep , syn_keep *) reg [2:0] lineLoader_wordIndex /* synthesis syn_keep = 1 */ ; + wire lineLoader_write_tag_0_valid; + wire [7:0] lineLoader_write_tag_0_payload_address; + wire lineLoader_write_tag_0_payload_data_valid; + wire lineLoader_write_tag_0_payload_data_error; + wire [18:0] lineLoader_write_tag_0_payload_data_address; + wire lineLoader_write_data_0_valid; + wire [10:0] lineLoader_write_data_0_payload_address; + wire [31:0] lineLoader_write_data_0_payload_data; + wire when_InstructionCache_l401; + wire [10:0] _zz_fetchStage_read_banksValue_0_dataMem; + wire _zz_fetchStage_read_banksValue_0_dataMem_1; + wire [31:0] fetchStage_read_banksValue_0_dataMem; + wire [31:0] fetchStage_read_banksValue_0_data; + wire [7:0] _zz_fetchStage_read_waysValues_0_tag_valid; + wire _zz_fetchStage_read_waysValues_0_tag_valid_1; + wire fetchStage_read_waysValues_0_tag_valid; + wire fetchStage_read_waysValues_0_tag_error; + wire [18:0] fetchStage_read_waysValues_0_tag_address; + wire [20:0] _zz_fetchStage_read_waysValues_0_tag_valid_2; + wire fetchStage_hit_hits_0; + wire fetchStage_hit_valid; + wire fetchStage_hit_error; + wire [31:0] fetchStage_hit_data; + wire [31:0] fetchStage_hit_word; + wire when_InstructionCache_l435; + reg [31:0] io_cpu_fetch_data_regNextWhen; + wire when_InstructionCache_l459; + reg [31:0] decodeStage_mmuRsp_physicalAddress; + reg decodeStage_mmuRsp_isIoAccess; + reg decodeStage_mmuRsp_isPaging; + reg decodeStage_mmuRsp_allowRead; + reg decodeStage_mmuRsp_allowWrite; + reg decodeStage_mmuRsp_allowExecute; + reg decodeStage_mmuRsp_exception; + reg decodeStage_mmuRsp_refilling; + reg decodeStage_mmuRsp_bypassTranslation; + wire when_InstructionCache_l459_1; + reg decodeStage_hit_valid; + wire when_InstructionCache_l459_2; + reg decodeStage_hit_error; + wire when_Fetcher_l398; + (* ram_style = "block" *) reg [31:0] banks_0 [0:2047]; + (* ram_style = "block" *) reg [20:0] ways_0_tags [0:255]; + + assign _zz_ways_0_tags_port = {lineLoader_write_tag_0_payload_data_address,{lineLoader_write_tag_0_payload_data_error,lineLoader_write_tag_0_payload_data_valid}}; + always @(posedge clk) begin + if(_zz_1) begin + banks_0[lineLoader_write_data_0_payload_address] <= lineLoader_write_data_0_payload_data; + end + end + + always @(posedge clk) begin + if(_zz_fetchStage_read_banksValue_0_dataMem_1) begin + _zz_banks_0_port1 <= banks_0[_zz_fetchStage_read_banksValue_0_dataMem]; + end + end + + always @(posedge clk) begin + if(_zz_2) begin + ways_0_tags[lineLoader_write_tag_0_payload_address] <= _zz_ways_0_tags_port; + end + end + + always @(posedge clk) begin + if(_zz_fetchStage_read_waysValues_0_tag_valid_1) begin + _zz_ways_0_tags_port1 <= ways_0_tags[_zz_fetchStage_read_waysValues_0_tag_valid]; + end + end + + always @(*) begin + _zz_1 = 1'b0; + if(lineLoader_write_data_0_valid) begin + _zz_1 = 1'b1; + end + end + + always @(*) begin + _zz_2 = 1'b0; + if(lineLoader_write_tag_0_valid) begin + _zz_2 = 1'b1; + end + end + + always @(*) begin + lineLoader_fire = 1'b0; + if(io_mem_rsp_valid) begin + if(when_InstructionCache_l401) begin + lineLoader_fire = 1'b1; + end + end + end + + always @(*) begin + io_cpu_prefetch_haltIt = (lineLoader_valid || lineLoader_flushPending); + if(when_InstructionCache_l338) begin + io_cpu_prefetch_haltIt = 1'b1; + end + if(when_InstructionCache_l342) begin + io_cpu_prefetch_haltIt = 1'b1; + end + if(io_flush) begin + io_cpu_prefetch_haltIt = 1'b1; + end + end + + assign when_InstructionCache_l338 = (! lineLoader_flushCounter[8]); + assign when_InstructionCache_l342 = (! _zz_when_InstructionCache_l342); + assign when_InstructionCache_l351 = (lineLoader_flushPending && (! (lineLoader_valid || io_cpu_fetch_isValid))); + assign io_mem_cmd_fire = (io_mem_cmd_valid && io_mem_cmd_ready); + assign io_mem_cmd_valid = (lineLoader_valid && (! lineLoader_cmdSent)); + assign io_mem_cmd_payload_address = {lineLoader_address[31 : 5],5'h0}; + assign io_mem_cmd_payload_size = 3'b101; + assign when_Utils_l357 = (! lineLoader_valid); + always @(*) begin + lineLoader_wayToAllocate_willIncrement = 1'b0; + if(when_Utils_l357) begin + lineLoader_wayToAllocate_willIncrement = 1'b1; + end + end + + assign lineLoader_wayToAllocate_willClear = 1'b0; + assign lineLoader_wayToAllocate_willOverflowIfInc = 1'b1; + assign lineLoader_wayToAllocate_willOverflow = (lineLoader_wayToAllocate_willOverflowIfInc && lineLoader_wayToAllocate_willIncrement); + assign lineLoader_write_tag_0_valid = ((1'b1 && lineLoader_fire) || (! lineLoader_flushCounter[8])); + assign lineLoader_write_tag_0_payload_address = (lineLoader_flushCounter[8] ? lineLoader_address[12 : 5] : lineLoader_flushCounter[7 : 0]); + assign lineLoader_write_tag_0_payload_data_valid = lineLoader_flushCounter[8]; + assign lineLoader_write_tag_0_payload_data_error = (lineLoader_hadError || io_mem_rsp_payload_error); + assign lineLoader_write_tag_0_payload_data_address = lineLoader_address[31 : 13]; + assign lineLoader_write_data_0_valid = (io_mem_rsp_valid && 1'b1); + assign lineLoader_write_data_0_payload_address = {lineLoader_address[12 : 5],lineLoader_wordIndex}; + assign lineLoader_write_data_0_payload_data = io_mem_rsp_payload_data; + assign when_InstructionCache_l401 = (lineLoader_wordIndex == 3'b111); + assign _zz_fetchStage_read_banksValue_0_dataMem = io_cpu_prefetch_pc[12 : 2]; + assign _zz_fetchStage_read_banksValue_0_dataMem_1 = (! io_cpu_fetch_isStuck); + assign fetchStage_read_banksValue_0_dataMem = _zz_banks_0_port1; + assign fetchStage_read_banksValue_0_data = fetchStage_read_banksValue_0_dataMem[31 : 0]; + assign _zz_fetchStage_read_waysValues_0_tag_valid = io_cpu_prefetch_pc[12 : 5]; + assign _zz_fetchStage_read_waysValues_0_tag_valid_1 = (! io_cpu_fetch_isStuck); + assign _zz_fetchStage_read_waysValues_0_tag_valid_2 = _zz_ways_0_tags_port1; + assign fetchStage_read_waysValues_0_tag_valid = _zz_fetchStage_read_waysValues_0_tag_valid_2[0]; + assign fetchStage_read_waysValues_0_tag_error = _zz_fetchStage_read_waysValues_0_tag_valid_2[1]; + assign fetchStage_read_waysValues_0_tag_address = _zz_fetchStage_read_waysValues_0_tag_valid_2[20 : 2]; + assign fetchStage_hit_hits_0 = (fetchStage_read_waysValues_0_tag_valid && (fetchStage_read_waysValues_0_tag_address == io_cpu_fetch_mmuRsp_physicalAddress[31 : 13])); + assign fetchStage_hit_valid = (fetchStage_hit_hits_0 != 1'b0); + assign fetchStage_hit_error = fetchStage_read_waysValues_0_tag_error; + assign fetchStage_hit_data = fetchStage_read_banksValue_0_data; + assign fetchStage_hit_word = fetchStage_hit_data; + assign io_cpu_fetch_data = fetchStage_hit_word; + assign when_InstructionCache_l435 = (! io_cpu_decode_isStuck); + assign io_cpu_decode_data = io_cpu_fetch_data_regNextWhen; + assign io_cpu_fetch_physicalAddress = io_cpu_fetch_mmuRsp_physicalAddress; + assign when_InstructionCache_l459 = (! io_cpu_decode_isStuck); + assign when_InstructionCache_l459_1 = (! io_cpu_decode_isStuck); + assign when_InstructionCache_l459_2 = (! io_cpu_decode_isStuck); + assign io_cpu_decode_cacheMiss = (! decodeStage_hit_valid); + assign io_cpu_decode_error = (decodeStage_hit_error || ((! decodeStage_mmuRsp_isPaging) && (decodeStage_mmuRsp_exception || (! decodeStage_mmuRsp_allowExecute)))); + assign io_cpu_decode_mmuRefilling = decodeStage_mmuRsp_refilling; + assign io_cpu_decode_mmuException = (((! decodeStage_mmuRsp_refilling) && decodeStage_mmuRsp_isPaging) && (decodeStage_mmuRsp_exception || (! decodeStage_mmuRsp_allowExecute))); + assign io_cpu_decode_physicalAddress = decodeStage_mmuRsp_physicalAddress; + assign when_Fetcher_l398 = (_zz_when_Fetcher_l398 != 3'b000); + always @(posedge clk) begin + if(reset) begin + lineLoader_valid <= 1'b0; + lineLoader_hadError <= 1'b0; + lineLoader_flushPending <= 1'b1; + lineLoader_cmdSent <= 1'b0; + lineLoader_wordIndex <= 3'b000; + end else begin + if(lineLoader_fire) begin + lineLoader_valid <= 1'b0; + end + if(lineLoader_fire) begin + lineLoader_hadError <= 1'b0; + end + if(io_cpu_fill_valid) begin + lineLoader_valid <= 1'b1; + end + if(io_flush) begin + lineLoader_flushPending <= 1'b1; + end + if(when_InstructionCache_l351) begin + lineLoader_flushPending <= 1'b0; + end + if(io_mem_cmd_fire) begin + lineLoader_cmdSent <= 1'b1; + end + if(lineLoader_fire) begin + lineLoader_cmdSent <= 1'b0; + end + if(io_mem_rsp_valid) begin + lineLoader_wordIndex <= (lineLoader_wordIndex + 3'b001); + if(io_mem_rsp_payload_error) begin + lineLoader_hadError <= 1'b1; + end + end + end + end + + always @(posedge clk) begin + if(io_cpu_fill_valid) begin + lineLoader_address <= io_cpu_fill_payload; + end + if(when_InstructionCache_l338) begin + lineLoader_flushCounter <= (lineLoader_flushCounter + 9'h001); + end + _zz_when_InstructionCache_l342 <= lineLoader_flushCounter[8]; + if(when_InstructionCache_l351) begin + lineLoader_flushCounter <= 9'h0; + end + if(when_InstructionCache_l435) begin + io_cpu_fetch_data_regNextWhen <= io_cpu_fetch_data; + end + if(when_InstructionCache_l459) begin + decodeStage_mmuRsp_physicalAddress <= io_cpu_fetch_mmuRsp_physicalAddress; + decodeStage_mmuRsp_isIoAccess <= io_cpu_fetch_mmuRsp_isIoAccess; + decodeStage_mmuRsp_isPaging <= io_cpu_fetch_mmuRsp_isPaging; + decodeStage_mmuRsp_allowRead <= io_cpu_fetch_mmuRsp_allowRead; + decodeStage_mmuRsp_allowWrite <= io_cpu_fetch_mmuRsp_allowWrite; + decodeStage_mmuRsp_allowExecute <= io_cpu_fetch_mmuRsp_allowExecute; + decodeStage_mmuRsp_exception <= io_cpu_fetch_mmuRsp_exception; + decodeStage_mmuRsp_refilling <= io_cpu_fetch_mmuRsp_refilling; + decodeStage_mmuRsp_bypassTranslation <= io_cpu_fetch_mmuRsp_bypassTranslation; + end + if(when_InstructionCache_l459_1) begin + decodeStage_hit_valid <= fetchStage_hit_valid; + end + if(when_InstructionCache_l459_2) begin + decodeStage_hit_error <= fetchStage_hit_error; + end + if(when_Fetcher_l398) begin + io_cpu_fetch_data_regNextWhen <= _zz_io_cpu_fetch_data_regNextWhen; + end + end + + +endmodule diff --git a/pythondata_cpu_vexriscv/verilog/VexRiscv_PerfCfuDebug.yaml b/pythondata_cpu_vexriscv/verilog/VexRiscv_PerfCfuDebug.yaml new file mode 100644 index 0000000..c869dbe --- /dev/null +++ b/pythondata_cpu_vexriscv/verilog/VexRiscv_PerfCfuDebug.yaml @@ -0,0 +1,5 @@ +debug: !!vexriscv.DebugReport {hardwareBreakpointCount: 0} +iBus: !!vexriscv.BusReport + flushInstructions: [4111, 19, 19, 19] + info: !!vexriscv.CacheReport {bytePerLine: 32, size: 8192} + kind: cached diff --git a/pythondata_cpu_vexriscv/verilog/VexRiscv_Secure.v b/pythondata_cpu_vexriscv/verilog/VexRiscv_Secure.v index 5ea51b3..d829aa8 100644 --- a/pythondata_cpu_vexriscv/verilog/VexRiscv_Secure.v +++ b/pythondata_cpu_vexriscv/verilog/VexRiscv_Secure.v @@ -1,6 +1,6 @@ // Generator : SpinalHDL v1.6.0 git head : 73c8d8e2b86b45646e9d0b2e729291f2b65e6be3 // Component : VexRiscv -// Git hash : 6276bf628be9d0a58c0284dca83137b71ef29098 +// Git hash : 593e180abf5ba39e7fa33d4f371646453f84496a `define EnvCtrlEnum_binary_sequential_type [1:0] diff --git a/pythondata_cpu_vexriscv/verilog/VexRiscv_SecureDebug.v b/pythondata_cpu_vexriscv/verilog/VexRiscv_SecureDebug.v index 8325088..9c1d990 100644 --- a/pythondata_cpu_vexriscv/verilog/VexRiscv_SecureDebug.v +++ b/pythondata_cpu_vexriscv/verilog/VexRiscv_SecureDebug.v @@ -1,6 +1,6 @@ // Generator : SpinalHDL v1.6.0 git head : 73c8d8e2b86b45646e9d0b2e729291f2b65e6be3 // Component : VexRiscv -// Git hash : 6276bf628be9d0a58c0284dca83137b71ef29098 +// Git hash : 593e180abf5ba39e7fa33d4f371646453f84496a `define EnvCtrlEnum_binary_sequential_type [1:0] diff --git a/pythondata_cpu_vexriscv/verilog/VexRiscv_Slim.v b/pythondata_cpu_vexriscv/verilog/VexRiscv_Slim.v new file mode 100644 index 0000000..69e997f --- /dev/null +++ b/pythondata_cpu_vexriscv/verilog/VexRiscv_Slim.v @@ -0,0 +1,6671 @@ +// Generator : SpinalHDL v1.6.0 git head : 73c8d8e2b86b45646e9d0b2e729291f2b65e6be3 +// Component : VexRiscv +// Git hash : 6f2afa7a1e6bd4ca7cdea67d2e078179c183b833 + + +`define EnvCtrlEnum_binary_sequential_type [1:0] +`define EnvCtrlEnum_binary_sequential_NONE 2'b00 +`define EnvCtrlEnum_binary_sequential_XRET 2'b01 +`define EnvCtrlEnum_binary_sequential_WFI 2'b10 +`define EnvCtrlEnum_binary_sequential_ECALL 2'b11 + +`define BranchCtrlEnum_binary_sequential_type [1:0] +`define BranchCtrlEnum_binary_sequential_INC 2'b00 +`define BranchCtrlEnum_binary_sequential_B 2'b01 +`define BranchCtrlEnum_binary_sequential_JAL 2'b10 +`define BranchCtrlEnum_binary_sequential_JALR 2'b11 + +`define ShiftCtrlEnum_binary_sequential_type [1:0] +`define ShiftCtrlEnum_binary_sequential_DISABLE_1 2'b00 +`define ShiftCtrlEnum_binary_sequential_SLL_1 2'b01 +`define ShiftCtrlEnum_binary_sequential_SRL_1 2'b10 +`define ShiftCtrlEnum_binary_sequential_SRA_1 2'b11 + +`define AluBitwiseCtrlEnum_binary_sequential_type [1:0] +`define AluBitwiseCtrlEnum_binary_sequential_XOR_1 2'b00 +`define AluBitwiseCtrlEnum_binary_sequential_OR_1 2'b01 +`define AluBitwiseCtrlEnum_binary_sequential_AND_1 2'b10 + +`define Src2CtrlEnum_binary_sequential_type [1:0] +`define Src2CtrlEnum_binary_sequential_RS 2'b00 +`define Src2CtrlEnum_binary_sequential_IMI 2'b01 +`define Src2CtrlEnum_binary_sequential_IMS 2'b10 +`define Src2CtrlEnum_binary_sequential_PC 2'b11 + +`define AluCtrlEnum_binary_sequential_type [1:0] +`define AluCtrlEnum_binary_sequential_ADD_SUB 2'b00 +`define AluCtrlEnum_binary_sequential_SLT_SLTU 2'b01 +`define AluCtrlEnum_binary_sequential_BITWISE 2'b10 + +`define Src1CtrlEnum_binary_sequential_type [1:0] +`define Src1CtrlEnum_binary_sequential_RS 2'b00 +`define Src1CtrlEnum_binary_sequential_IMU 2'b01 +`define Src1CtrlEnum_binary_sequential_PC_INCREMENT 2'b10 +`define Src1CtrlEnum_binary_sequential_URS1 2'b11 + + +module VexRiscv ( + input [31:0] externalResetVector, + input timerInterrupt, + input softwareInterrupt, + input [31:0] externalInterruptArray, + output reg iBusWishbone_CYC, + output reg iBusWishbone_STB, + input iBusWishbone_ACK, + output iBusWishbone_WE, + output [29:0] iBusWishbone_ADR, + input [31:0] iBusWishbone_DAT_MISO, + output [31:0] iBusWishbone_DAT_MOSI, + output [3:0] iBusWishbone_SEL, + input iBusWishbone_ERR, + output [2:0] iBusWishbone_CTI, + output [1:0] iBusWishbone_BTE, + output dBusWishbone_CYC, + output dBusWishbone_STB, + input dBusWishbone_ACK, + output dBusWishbone_WE, + output [29:0] dBusWishbone_ADR, + input [31:0] dBusWishbone_DAT_MISO, + output [31:0] dBusWishbone_DAT_MOSI, + output [3:0] dBusWishbone_SEL, + input dBusWishbone_ERR, + output [2:0] dBusWishbone_CTI, + output [1:0] dBusWishbone_BTE, + input clk, + input reset +); + wire IBusCachedPlugin_cache_io_flush; + wire IBusCachedPlugin_cache_io_cpu_prefetch_isValid; + wire IBusCachedPlugin_cache_io_cpu_fetch_isValid; + wire IBusCachedPlugin_cache_io_cpu_fetch_isStuck; + wire IBusCachedPlugin_cache_io_cpu_fetch_isRemoved; + wire IBusCachedPlugin_cache_io_cpu_decode_isValid; + wire IBusCachedPlugin_cache_io_cpu_decode_isStuck; + wire IBusCachedPlugin_cache_io_cpu_decode_isUser; + reg IBusCachedPlugin_cache_io_cpu_fill_valid; + wire dataCache_1_io_cpu_execute_isValid; + wire [31:0] dataCache_1_io_cpu_execute_address; + wire dataCache_1_io_cpu_memory_isValid; + wire [31:0] dataCache_1_io_cpu_memory_address; + reg dataCache_1_io_cpu_memory_mmuRsp_isIoAccess; + reg dataCache_1_io_cpu_writeBack_isValid; + wire dataCache_1_io_cpu_writeBack_isUser; + wire [31:0] dataCache_1_io_cpu_writeBack_storeData; + wire [31:0] dataCache_1_io_cpu_writeBack_address; + wire dataCache_1_io_cpu_writeBack_fence_SW; + wire dataCache_1_io_cpu_writeBack_fence_SR; + wire dataCache_1_io_cpu_writeBack_fence_SO; + wire dataCache_1_io_cpu_writeBack_fence_SI; + wire dataCache_1_io_cpu_writeBack_fence_PW; + wire dataCache_1_io_cpu_writeBack_fence_PR; + wire dataCache_1_io_cpu_writeBack_fence_PO; + wire dataCache_1_io_cpu_writeBack_fence_PI; + wire [3:0] dataCache_1_io_cpu_writeBack_fence_FM; + wire dataCache_1_io_cpu_flush_valid; + wire dataCache_1_io_mem_cmd_ready; + reg [31:0] _zz_RegFilePlugin_regFile_port0; + reg [31:0] _zz_RegFilePlugin_regFile_port1; + wire IBusCachedPlugin_cache_io_cpu_prefetch_haltIt; + wire [31:0] IBusCachedPlugin_cache_io_cpu_fetch_data; + wire [31:0] IBusCachedPlugin_cache_io_cpu_fetch_physicalAddress; + wire IBusCachedPlugin_cache_io_cpu_decode_error; + wire IBusCachedPlugin_cache_io_cpu_decode_mmuRefilling; + wire IBusCachedPlugin_cache_io_cpu_decode_mmuException; + wire [31:0] IBusCachedPlugin_cache_io_cpu_decode_data; + wire IBusCachedPlugin_cache_io_cpu_decode_cacheMiss; + wire [31:0] IBusCachedPlugin_cache_io_cpu_decode_physicalAddress; + wire IBusCachedPlugin_cache_io_mem_cmd_valid; + wire [31:0] IBusCachedPlugin_cache_io_mem_cmd_payload_address; + wire [2:0] IBusCachedPlugin_cache_io_mem_cmd_payload_size; + wire dataCache_1_io_cpu_execute_haltIt; + wire dataCache_1_io_cpu_execute_refilling; + wire dataCache_1_io_cpu_memory_isWrite; + wire dataCache_1_io_cpu_writeBack_haltIt; + wire [31:0] dataCache_1_io_cpu_writeBack_data; + wire dataCache_1_io_cpu_writeBack_mmuException; + wire dataCache_1_io_cpu_writeBack_unalignedAccess; + wire dataCache_1_io_cpu_writeBack_accessError; + wire dataCache_1_io_cpu_writeBack_isWrite; + wire dataCache_1_io_cpu_writeBack_keepMemRspData; + wire dataCache_1_io_cpu_writeBack_exclusiveOk; + wire dataCache_1_io_cpu_flush_ready; + wire dataCache_1_io_cpu_redo; + wire dataCache_1_io_mem_cmd_valid; + wire dataCache_1_io_mem_cmd_payload_wr; + wire dataCache_1_io_mem_cmd_payload_uncached; + wire [31:0] dataCache_1_io_mem_cmd_payload_address; + wire [31:0] dataCache_1_io_mem_cmd_payload_data; + wire [3:0] dataCache_1_io_mem_cmd_payload_mask; + wire [2:0] dataCache_1_io_mem_cmd_payload_size; + wire dataCache_1_io_mem_cmd_payload_last; + wire [51:0] _zz_memory_MUL_LOW; + wire [51:0] _zz_memory_MUL_LOW_1; + wire [51:0] _zz_memory_MUL_LOW_2; + wire [51:0] _zz_memory_MUL_LOW_3; + wire [32:0] _zz_memory_MUL_LOW_4; + wire [51:0] _zz_memory_MUL_LOW_5; + wire [49:0] _zz_memory_MUL_LOW_6; + wire [51:0] _zz_memory_MUL_LOW_7; + wire [49:0] _zz_memory_MUL_LOW_8; + wire [31:0] _zz_execute_SHIFT_RIGHT; + wire [32:0] _zz_execute_SHIFT_RIGHT_1; + wire [32:0] _zz_execute_SHIFT_RIGHT_2; + wire [31:0] _zz_decode_LEGAL_INSTRUCTION; + wire [31:0] _zz_decode_LEGAL_INSTRUCTION_1; + wire [31:0] _zz_decode_LEGAL_INSTRUCTION_2; + wire _zz_decode_LEGAL_INSTRUCTION_3; + wire [0:0] _zz_decode_LEGAL_INSTRUCTION_4; + wire [13:0] _zz_decode_LEGAL_INSTRUCTION_5; + wire [31:0] _zz_decode_LEGAL_INSTRUCTION_6; + wire [31:0] _zz_decode_LEGAL_INSTRUCTION_7; + wire [31:0] _zz_decode_LEGAL_INSTRUCTION_8; + wire _zz_decode_LEGAL_INSTRUCTION_9; + wire [0:0] _zz_decode_LEGAL_INSTRUCTION_10; + wire [7:0] _zz_decode_LEGAL_INSTRUCTION_11; + wire [31:0] _zz_decode_LEGAL_INSTRUCTION_12; + wire [31:0] _zz_decode_LEGAL_INSTRUCTION_13; + wire [31:0] _zz_decode_LEGAL_INSTRUCTION_14; + wire _zz_decode_LEGAL_INSTRUCTION_15; + wire [0:0] _zz_decode_LEGAL_INSTRUCTION_16; + wire [1:0] _zz_decode_LEGAL_INSTRUCTION_17; + wire [3:0] _zz__zz_IBusCachedPlugin_jump_pcLoad_payload_1; + reg [31:0] _zz_IBusCachedPlugin_jump_pcLoad_payload_5; + wire [1:0] _zz_IBusCachedPlugin_jump_pcLoad_payload_6; + wire [31:0] _zz_IBusCachedPlugin_fetchPc_pc; + wire [2:0] _zz_IBusCachedPlugin_fetchPc_pc_1; + wire [11:0] _zz__zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch; + wire [31:0] _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_2; + wire [19:0] _zz__zz_2; + wire [11:0] _zz__zz_4; + wire [31:0] _zz__zz_6; + wire [31:0] _zz__zz_6_1; + wire [19:0] _zz__zz_IBusCachedPlugin_predictionJumpInterface_payload; + wire [11:0] _zz__zz_IBusCachedPlugin_predictionJumpInterface_payload_2; + wire _zz_IBusCachedPlugin_predictionJumpInterface_payload_4; + wire _zz_IBusCachedPlugin_predictionJumpInterface_payload_5; + wire _zz_IBusCachedPlugin_predictionJumpInterface_payload_6; + wire [2:0] _zz_DBusCachedPlugin_exceptionBus_payload_code; + wire [2:0] _zz_DBusCachedPlugin_exceptionBus_payload_code_1; + reg [7:0] _zz_writeBack_DBusCachedPlugin_rspShifted; + wire [1:0] _zz_writeBack_DBusCachedPlugin_rspShifted_1; + reg [7:0] _zz_writeBack_DBusCachedPlugin_rspShifted_2; + wire [0:0] _zz_writeBack_DBusCachedPlugin_rspShifted_3; + wire [31:0] _zz__zz_decode_IS_RS2_SIGNED; + wire [31:0] _zz__zz_decode_IS_RS2_SIGNED_1; + wire _zz__zz_decode_IS_RS2_SIGNED_2; + wire [0:0] _zz__zz_decode_IS_RS2_SIGNED_3; + wire [0:0] _zz__zz_decode_IS_RS2_SIGNED_4; + wire _zz__zz_decode_IS_RS2_SIGNED_5; + wire [31:0] _zz__zz_decode_IS_RS2_SIGNED_6; + wire [0:0] _zz__zz_decode_IS_RS2_SIGNED_7; + wire _zz__zz_decode_IS_RS2_SIGNED_8; + wire _zz__zz_decode_IS_RS2_SIGNED_9; + wire [24:0] _zz__zz_decode_IS_RS2_SIGNED_10; + wire [0:0] _zz__zz_decode_IS_RS2_SIGNED_11; + wire [0:0] _zz__zz_decode_IS_RS2_SIGNED_12; + wire [31:0] _zz__zz_decode_IS_RS2_SIGNED_13; + wire [0:0] _zz__zz_decode_IS_RS2_SIGNED_14; + wire [31:0] _zz__zz_decode_IS_RS2_SIGNED_15; + wire [0:0] _zz__zz_decode_IS_RS2_SIGNED_16; + wire _zz__zz_decode_IS_RS2_SIGNED_17; + wire _zz__zz_decode_IS_RS2_SIGNED_18; + wire _zz__zz_decode_IS_RS2_SIGNED_19; + wire [0:0] _zz__zz_decode_IS_RS2_SIGNED_20; + wire [0:0] _zz__zz_decode_IS_RS2_SIGNED_21; + wire [31:0] _zz__zz_decode_IS_RS2_SIGNED_22; + wire [1:0] _zz__zz_decode_IS_RS2_SIGNED_23; + wire [31:0] _zz__zz_decode_IS_RS2_SIGNED_24; + wire [31:0] _zz__zz_decode_IS_RS2_SIGNED_25; + wire [31:0] _zz__zz_decode_IS_RS2_SIGNED_26; + wire [31:0] _zz__zz_decode_IS_RS2_SIGNED_27; + wire [20:0] _zz__zz_decode_IS_RS2_SIGNED_28; + wire [0:0] _zz__zz_decode_IS_RS2_SIGNED_29; + wire [31:0] _zz__zz_decode_IS_RS2_SIGNED_30; + wire [0:0] _zz__zz_decode_IS_RS2_SIGNED_31; + wire _zz__zz_decode_IS_RS2_SIGNED_32; + wire [31:0] _zz__zz_decode_IS_RS2_SIGNED_33; + wire [31:0] _zz__zz_decode_IS_RS2_SIGNED_34; + wire [0:0] _zz__zz_decode_IS_RS2_SIGNED_35; + wire _zz__zz_decode_IS_RS2_SIGNED_36; + wire [17:0] _zz__zz_decode_IS_RS2_SIGNED_37; + wire [1:0] _zz__zz_decode_IS_RS2_SIGNED_38; + wire [31:0] _zz__zz_decode_IS_RS2_SIGNED_39; + wire [31:0] _zz__zz_decode_IS_RS2_SIGNED_40; + wire [31:0] _zz__zz_decode_IS_RS2_SIGNED_41; + wire [31:0] _zz__zz_decode_IS_RS2_SIGNED_42; + wire [1:0] _zz__zz_decode_IS_RS2_SIGNED_43; + wire _zz__zz_decode_IS_RS2_SIGNED_44; + wire [31:0] _zz__zz_decode_IS_RS2_SIGNED_45; + wire [31:0] _zz__zz_decode_IS_RS2_SIGNED_46; + wire [0:0] _zz__zz_decode_IS_RS2_SIGNED_47; + wire [0:0] _zz__zz_decode_IS_RS2_SIGNED_48; + wire [31:0] _zz__zz_decode_IS_RS2_SIGNED_49; + wire [0:0] _zz__zz_decode_IS_RS2_SIGNED_50; + wire [31:0] _zz__zz_decode_IS_RS2_SIGNED_51; + wire [14:0] _zz__zz_decode_IS_RS2_SIGNED_52; + wire [4:0] _zz__zz_decode_IS_RS2_SIGNED_53; + wire [31:0] _zz__zz_decode_IS_RS2_SIGNED_54; + wire [31:0] _zz__zz_decode_IS_RS2_SIGNED_55; + wire _zz__zz_decode_IS_RS2_SIGNED_56; + wire [31:0] _zz__zz_decode_IS_RS2_SIGNED_57; + wire [0:0] _zz__zz_decode_IS_RS2_SIGNED_58; + wire [31:0] _zz__zz_decode_IS_RS2_SIGNED_59; + wire [31:0] _zz__zz_decode_IS_RS2_SIGNED_60; + wire [1:0] _zz__zz_decode_IS_RS2_SIGNED_61; + wire _zz__zz_decode_IS_RS2_SIGNED_62; + wire [31:0] _zz__zz_decode_IS_RS2_SIGNED_63; + wire _zz__zz_decode_IS_RS2_SIGNED_64; + wire [31:0] _zz__zz_decode_IS_RS2_SIGNED_65; + wire [4:0] _zz__zz_decode_IS_RS2_SIGNED_66; + wire _zz__zz_decode_IS_RS2_SIGNED_67; + wire [31:0] _zz__zz_decode_IS_RS2_SIGNED_68; + wire [31:0] _zz__zz_decode_IS_RS2_SIGNED_69; + wire [0:0] _zz__zz_decode_IS_RS2_SIGNED_70; + wire [0:0] _zz__zz_decode_IS_RS2_SIGNED_71; + wire [31:0] _zz__zz_decode_IS_RS2_SIGNED_72; + wire [31:0] _zz__zz_decode_IS_RS2_SIGNED_73; + wire [3:0] _zz__zz_decode_IS_RS2_SIGNED_74; + wire [0:0] _zz__zz_decode_IS_RS2_SIGNED_75; + wire [31:0] _zz__zz_decode_IS_RS2_SIGNED_76; + wire [31:0] _zz__zz_decode_IS_RS2_SIGNED_77; + wire [1:0] _zz__zz_decode_IS_RS2_SIGNED_78; + wire _zz__zz_decode_IS_RS2_SIGNED_79; + wire [31:0] _zz__zz_decode_IS_RS2_SIGNED_80; + wire _zz__zz_decode_IS_RS2_SIGNED_81; + wire [31:0] _zz__zz_decode_IS_RS2_SIGNED_82; + wire [11:0] _zz__zz_decode_IS_RS2_SIGNED_83; + wire [4:0] _zz__zz_decode_IS_RS2_SIGNED_84; + wire [0:0] _zz__zz_decode_IS_RS2_SIGNED_85; + wire [31:0] _zz__zz_decode_IS_RS2_SIGNED_86; + wire [31:0] _zz__zz_decode_IS_RS2_SIGNED_87; + wire [2:0] _zz__zz_decode_IS_RS2_SIGNED_88; + wire _zz__zz_decode_IS_RS2_SIGNED_89; + wire [31:0] _zz__zz_decode_IS_RS2_SIGNED_90; + wire [0:0] _zz__zz_decode_IS_RS2_SIGNED_91; + wire [31:0] _zz__zz_decode_IS_RS2_SIGNED_92; + wire [31:0] _zz__zz_decode_IS_RS2_SIGNED_93; + wire [0:0] _zz__zz_decode_IS_RS2_SIGNED_94; + wire [31:0] _zz__zz_decode_IS_RS2_SIGNED_95; + wire [31:0] _zz__zz_decode_IS_RS2_SIGNED_96; + wire [4:0] _zz__zz_decode_IS_RS2_SIGNED_97; + wire _zz__zz_decode_IS_RS2_SIGNED_98; + wire [0:0] _zz__zz_decode_IS_RS2_SIGNED_99; + wire [4:0] _zz__zz_decode_IS_RS2_SIGNED_100; + wire _zz__zz_decode_IS_RS2_SIGNED_101; + wire [31:0] _zz__zz_decode_IS_RS2_SIGNED_102; + wire [0:0] _zz__zz_decode_IS_RS2_SIGNED_103; + wire [31:0] _zz__zz_decode_IS_RS2_SIGNED_104; + wire [31:0] _zz__zz_decode_IS_RS2_SIGNED_105; + wire [2:0] _zz__zz_decode_IS_RS2_SIGNED_106; + wire _zz__zz_decode_IS_RS2_SIGNED_107; + wire [31:0] _zz__zz_decode_IS_RS2_SIGNED_108; + wire [0:0] _zz__zz_decode_IS_RS2_SIGNED_109; + wire [31:0] _zz__zz_decode_IS_RS2_SIGNED_110; + wire [31:0] _zz__zz_decode_IS_RS2_SIGNED_111; + wire [0:0] _zz__zz_decode_IS_RS2_SIGNED_112; + wire [31:0] _zz__zz_decode_IS_RS2_SIGNED_113; + wire [31:0] _zz__zz_decode_IS_RS2_SIGNED_114; + wire [0:0] _zz__zz_decode_IS_RS2_SIGNED_115; + wire [1:0] _zz__zz_decode_IS_RS2_SIGNED_116; + wire _zz__zz_decode_IS_RS2_SIGNED_117; + wire [31:0] _zz__zz_decode_IS_RS2_SIGNED_118; + wire [1:0] _zz__zz_decode_IS_RS2_SIGNED_119; + wire [8:0] _zz__zz_decode_IS_RS2_SIGNED_120; + wire _zz__zz_decode_IS_RS2_SIGNED_121; + wire [0:0] _zz__zz_decode_IS_RS2_SIGNED_122; + wire [0:0] _zz__zz_decode_IS_RS2_SIGNED_123; + wire [31:0] _zz__zz_decode_IS_RS2_SIGNED_124; + wire [31:0] _zz__zz_decode_IS_RS2_SIGNED_125; + wire [0:0] _zz__zz_decode_IS_RS2_SIGNED_126; + wire [0:0] _zz__zz_decode_IS_RS2_SIGNED_127; + wire [31:0] _zz__zz_decode_IS_RS2_SIGNED_128; + wire [31:0] _zz__zz_decode_IS_RS2_SIGNED_129; + wire [0:0] _zz__zz_decode_IS_RS2_SIGNED_130; + wire [6:0] _zz__zz_decode_IS_RS2_SIGNED_131; + wire _zz__zz_decode_IS_RS2_SIGNED_132; + wire _zz__zz_decode_IS_RS2_SIGNED_133; + wire [31:0] _zz__zz_decode_IS_RS2_SIGNED_134; + wire [0:0] _zz__zz_decode_IS_RS2_SIGNED_135; + wire [3:0] _zz__zz_decode_IS_RS2_SIGNED_136; + wire _zz__zz_decode_IS_RS2_SIGNED_137; + wire [0:0] _zz__zz_decode_IS_RS2_SIGNED_138; + wire [31:0] _zz__zz_decode_IS_RS2_SIGNED_139; + wire [1:0] _zz__zz_decode_IS_RS2_SIGNED_140; + wire [31:0] _zz__zz_decode_IS_RS2_SIGNED_141; + wire [31:0] _zz__zz_decode_IS_RS2_SIGNED_142; + wire [31:0] _zz__zz_decode_IS_RS2_SIGNED_143; + wire [31:0] _zz__zz_decode_IS_RS2_SIGNED_144; + wire [3:0] _zz__zz_decode_IS_RS2_SIGNED_145; + wire [4:0] _zz__zz_decode_IS_RS2_SIGNED_146; + wire _zz__zz_decode_IS_RS2_SIGNED_147; + wire _zz__zz_decode_IS_RS2_SIGNED_148; + wire [0:0] _zz__zz_decode_IS_RS2_SIGNED_149; + wire [2:0] _zz__zz_decode_IS_RS2_SIGNED_150; + wire [31:0] _zz__zz_decode_IS_RS2_SIGNED_151; + wire [31:0] _zz__zz_decode_IS_RS2_SIGNED_152; + wire _zz__zz_decode_IS_RS2_SIGNED_153; + wire _zz__zz_decode_IS_RS2_SIGNED_154; + wire [2:0] _zz__zz_decode_IS_RS2_SIGNED_155; + wire [2:0] _zz__zz_decode_IS_RS2_SIGNED_156; + wire _zz__zz_decode_IS_RS2_SIGNED_157; + wire _zz__zz_decode_IS_RS2_SIGNED_158; + wire [0:0] _zz__zz_decode_IS_RS2_SIGNED_159; + wire [0:0] _zz__zz_decode_IS_RS2_SIGNED_160; + wire [0:0] _zz__zz_decode_IS_RS2_SIGNED_161; + wire [0:0] _zz__zz_decode_IS_RS2_SIGNED_162; + wire _zz__zz_decode_IS_RS2_SIGNED_163; + wire _zz_RegFilePlugin_regFile_port; + wire _zz_decode_RegFilePlugin_rs1Data; + wire _zz_RegFilePlugin_regFile_port_1; + wire _zz_decode_RegFilePlugin_rs2Data; + wire [0:0] _zz__zz_execute_REGFILE_WRITE_DATA; + wire [2:0] _zz__zz_execute_SRC1; + wire [4:0] _zz__zz_execute_SRC1_1; + wire [11:0] _zz__zz_execute_SRC2_3; + wire [31:0] _zz_execute_SrcPlugin_addSub; + wire [31:0] _zz_execute_SrcPlugin_addSub_1; + wire [31:0] _zz_execute_SrcPlugin_addSub_2; + wire [31:0] _zz_execute_SrcPlugin_addSub_3; + wire [31:0] _zz_execute_SrcPlugin_addSub_4; + wire [31:0] _zz_execute_SrcPlugin_addSub_5; + wire [31:0] _zz_execute_SrcPlugin_addSub_6; + wire [19:0] _zz__zz_execute_BranchPlugin_missAlignedTarget_2; + wire [11:0] _zz__zz_execute_BranchPlugin_missAlignedTarget_4; + wire [31:0] _zz__zz_execute_BranchPlugin_missAlignedTarget_6; + wire [31:0] _zz__zz_execute_BranchPlugin_missAlignedTarget_6_1; + wire [31:0] _zz__zz_execute_BranchPlugin_missAlignedTarget_6_2; + wire [19:0] _zz__zz_execute_BranchPlugin_branch_src2_2; + wire [11:0] _zz__zz_execute_BranchPlugin_branch_src2_4; + wire _zz_execute_BranchPlugin_branch_src2_6; + wire _zz_execute_BranchPlugin_branch_src2_7; + wire _zz_execute_BranchPlugin_branch_src2_8; + wire [2:0] _zz_execute_BranchPlugin_branch_src2_9; + wire [1:0] _zz__zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_1; + wire [1:0] _zz__zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_1_1; + wire _zz_when; + wire [65:0] _zz_writeBack_MulPlugin_result; + wire [65:0] _zz_writeBack_MulPlugin_result_1; + wire [31:0] _zz__zz_decode_RS2_2; + wire [31:0] _zz__zz_decode_RS2_2_1; + wire [5:0] _zz_memory_DivPlugin_div_counter_valueNext; + wire [0:0] _zz_memory_DivPlugin_div_counter_valueNext_1; + wire [32:0] _zz_memory_DivPlugin_div_stage_0_remainderMinusDenominator; + wire [31:0] _zz_memory_DivPlugin_div_stage_0_outRemainder; + wire [31:0] _zz_memory_DivPlugin_div_stage_0_outRemainder_1; + wire [32:0] _zz_memory_DivPlugin_div_stage_0_outNumerator; + wire [32:0] _zz_memory_DivPlugin_div_result_1; + wire [32:0] _zz_memory_DivPlugin_div_result_2; + wire [32:0] _zz_memory_DivPlugin_div_result_3; + wire [32:0] _zz_memory_DivPlugin_div_result_4; + wire [0:0] _zz_memory_DivPlugin_div_result_5; + wire [32:0] _zz_memory_DivPlugin_rs1_2; + wire [0:0] _zz_memory_DivPlugin_rs1_3; + wire [31:0] _zz_memory_DivPlugin_rs2_1; + wire [0:0] _zz_memory_DivPlugin_rs2_2; + wire [31:0] _zz_CsrPlugin_csrMapping_readDataInit_25; + wire [26:0] _zz_iBusWishbone_ADR_1; + wire [51:0] memory_MUL_LOW; + wire [33:0] memory_MUL_HH; + wire [33:0] execute_MUL_HH; + wire [33:0] execute_MUL_HL; + wire [33:0] execute_MUL_LH; + wire [31:0] execute_MUL_LL; + wire [31:0] execute_BRANCH_CALC; + wire execute_BRANCH_DO; + wire [31:0] execute_SHIFT_RIGHT; + wire [31:0] execute_REGFILE_WRITE_DATA; + wire [31:0] memory_MEMORY_STORE_DATA_RF; + wire [31:0] execute_MEMORY_STORE_DATA_RF; + wire decode_CSR_READ_OPCODE; + wire decode_CSR_WRITE_OPCODE; + wire decode_PREDICTION_HAD_BRANCHED2; + wire decode_SRC2_FORCE_ZERO; + wire decode_IS_RS2_SIGNED; + wire decode_IS_RS1_SIGNED; + wire decode_IS_DIV; + wire memory_IS_MUL; + wire execute_IS_MUL; + wire decode_IS_MUL; + wire `EnvCtrlEnum_binary_sequential_type _zz_memory_to_writeBack_ENV_CTRL; + wire `EnvCtrlEnum_binary_sequential_type _zz_memory_to_writeBack_ENV_CTRL_1; + wire `EnvCtrlEnum_binary_sequential_type _zz_execute_to_memory_ENV_CTRL; + wire `EnvCtrlEnum_binary_sequential_type _zz_execute_to_memory_ENV_CTRL_1; + wire `EnvCtrlEnum_binary_sequential_type decode_ENV_CTRL; + wire `EnvCtrlEnum_binary_sequential_type _zz_decode_ENV_CTRL; + wire `EnvCtrlEnum_binary_sequential_type _zz_decode_to_execute_ENV_CTRL; + wire `EnvCtrlEnum_binary_sequential_type _zz_decode_to_execute_ENV_CTRL_1; + wire decode_IS_CSR; + wire `BranchCtrlEnum_binary_sequential_type _zz_decode_to_execute_BRANCH_CTRL; + wire `BranchCtrlEnum_binary_sequential_type _zz_decode_to_execute_BRANCH_CTRL_1; + wire `ShiftCtrlEnum_binary_sequential_type _zz_execute_to_memory_SHIFT_CTRL; + wire `ShiftCtrlEnum_binary_sequential_type _zz_execute_to_memory_SHIFT_CTRL_1; + wire `ShiftCtrlEnum_binary_sequential_type decode_SHIFT_CTRL; + wire `ShiftCtrlEnum_binary_sequential_type _zz_decode_SHIFT_CTRL; + wire `ShiftCtrlEnum_binary_sequential_type _zz_decode_to_execute_SHIFT_CTRL; + wire `ShiftCtrlEnum_binary_sequential_type _zz_decode_to_execute_SHIFT_CTRL_1; + wire `AluBitwiseCtrlEnum_binary_sequential_type decode_ALU_BITWISE_CTRL; + wire `AluBitwiseCtrlEnum_binary_sequential_type _zz_decode_ALU_BITWISE_CTRL; + wire `AluBitwiseCtrlEnum_binary_sequential_type _zz_decode_to_execute_ALU_BITWISE_CTRL; + wire `AluBitwiseCtrlEnum_binary_sequential_type _zz_decode_to_execute_ALU_BITWISE_CTRL_1; + wire decode_SRC_LESS_UNSIGNED; + wire decode_MEMORY_MANAGMENT; + wire memory_MEMORY_WR; + wire decode_MEMORY_WR; + wire execute_BYPASSABLE_MEMORY_STAGE; + wire decode_BYPASSABLE_MEMORY_STAGE; + wire decode_BYPASSABLE_EXECUTE_STAGE; + wire `Src2CtrlEnum_binary_sequential_type decode_SRC2_CTRL; + wire `Src2CtrlEnum_binary_sequential_type _zz_decode_SRC2_CTRL; + wire `Src2CtrlEnum_binary_sequential_type _zz_decode_to_execute_SRC2_CTRL; + wire `Src2CtrlEnum_binary_sequential_type _zz_decode_to_execute_SRC2_CTRL_1; + wire `AluCtrlEnum_binary_sequential_type decode_ALU_CTRL; + wire `AluCtrlEnum_binary_sequential_type _zz_decode_ALU_CTRL; + wire `AluCtrlEnum_binary_sequential_type _zz_decode_to_execute_ALU_CTRL; + wire `AluCtrlEnum_binary_sequential_type _zz_decode_to_execute_ALU_CTRL_1; + wire `Src1CtrlEnum_binary_sequential_type decode_SRC1_CTRL; + wire `Src1CtrlEnum_binary_sequential_type _zz_decode_SRC1_CTRL; + wire `Src1CtrlEnum_binary_sequential_type _zz_decode_to_execute_SRC1_CTRL; + wire `Src1CtrlEnum_binary_sequential_type _zz_decode_to_execute_SRC1_CTRL_1; + wire decode_MEMORY_FORCE_CONSTISTENCY; + wire [31:0] writeBack_FORMAL_PC_NEXT; + wire [31:0] memory_FORMAL_PC_NEXT; + wire [31:0] execute_FORMAL_PC_NEXT; + wire [31:0] decode_FORMAL_PC_NEXT; + wire [31:0] memory_PC; + wire execute_IS_RS1_SIGNED; + wire execute_IS_DIV; + wire execute_IS_RS2_SIGNED; + wire memory_IS_DIV; + wire writeBack_IS_MUL; + wire [33:0] writeBack_MUL_HH; + wire [51:0] writeBack_MUL_LOW; + wire [33:0] memory_MUL_HL; + wire [33:0] memory_MUL_LH; + wire [31:0] memory_MUL_LL; + wire execute_CSR_READ_OPCODE; + wire execute_CSR_WRITE_OPCODE; + wire execute_IS_CSR; + wire `EnvCtrlEnum_binary_sequential_type memory_ENV_CTRL; + wire `EnvCtrlEnum_binary_sequential_type _zz_memory_ENV_CTRL; + wire `EnvCtrlEnum_binary_sequential_type execute_ENV_CTRL; + wire `EnvCtrlEnum_binary_sequential_type _zz_execute_ENV_CTRL; + wire `EnvCtrlEnum_binary_sequential_type writeBack_ENV_CTRL; + wire `EnvCtrlEnum_binary_sequential_type _zz_writeBack_ENV_CTRL; + wire [31:0] memory_BRANCH_CALC; + wire memory_BRANCH_DO; + wire [31:0] execute_PC; + wire execute_PREDICTION_HAD_BRANCHED2; + (* keep , syn_keep *) wire [31:0] execute_RS1 /* synthesis syn_keep = 1 */ ; + wire execute_BRANCH_COND_RESULT; + wire `BranchCtrlEnum_binary_sequential_type execute_BRANCH_CTRL; + wire `BranchCtrlEnum_binary_sequential_type _zz_execute_BRANCH_CTRL; + wire decode_RS2_USE; + wire decode_RS1_USE; + reg [31:0] _zz_decode_RS2; + wire execute_REGFILE_WRITE_VALID; + wire execute_BYPASSABLE_EXECUTE_STAGE; + wire memory_REGFILE_WRITE_VALID; + wire [31:0] memory_INSTRUCTION; + wire memory_BYPASSABLE_MEMORY_STAGE; + wire writeBack_REGFILE_WRITE_VALID; + reg [31:0] decode_RS2; + reg [31:0] decode_RS1; + wire [31:0] memory_SHIFT_RIGHT; + reg [31:0] _zz_decode_RS2_1; + wire `ShiftCtrlEnum_binary_sequential_type memory_SHIFT_CTRL; + wire `ShiftCtrlEnum_binary_sequential_type _zz_memory_SHIFT_CTRL; + wire `ShiftCtrlEnum_binary_sequential_type execute_SHIFT_CTRL; + wire `ShiftCtrlEnum_binary_sequential_type _zz_execute_SHIFT_CTRL; + wire execute_SRC_LESS_UNSIGNED; + wire execute_SRC2_FORCE_ZERO; + wire execute_SRC_USE_SUB_LESS; + wire [31:0] _zz_execute_SRC2; + wire `Src2CtrlEnum_binary_sequential_type execute_SRC2_CTRL; + wire `Src2CtrlEnum_binary_sequential_type _zz_execute_SRC2_CTRL; + wire `Src1CtrlEnum_binary_sequential_type execute_SRC1_CTRL; + wire `Src1CtrlEnum_binary_sequential_type _zz_execute_SRC1_CTRL; + wire decode_SRC_USE_SUB_LESS; + wire decode_SRC_ADD_ZERO; + wire [31:0] execute_SRC_ADD_SUB; + wire execute_SRC_LESS; + wire `AluCtrlEnum_binary_sequential_type execute_ALU_CTRL; + wire `AluCtrlEnum_binary_sequential_type _zz_execute_ALU_CTRL; + wire [31:0] execute_SRC2; + wire [31:0] execute_SRC1; + wire `AluBitwiseCtrlEnum_binary_sequential_type execute_ALU_BITWISE_CTRL; + wire `AluBitwiseCtrlEnum_binary_sequential_type _zz_execute_ALU_BITWISE_CTRL; + wire [31:0] _zz_lastStageRegFileWrite_payload_address; + wire _zz_lastStageRegFileWrite_valid; + reg _zz_1; + wire [31:0] decode_INSTRUCTION_ANTICIPATED; + reg decode_REGFILE_WRITE_VALID; + wire decode_LEGAL_INSTRUCTION; + wire `EnvCtrlEnum_binary_sequential_type _zz_decode_ENV_CTRL_1; + wire `BranchCtrlEnum_binary_sequential_type _zz_decode_BRANCH_CTRL; + wire `ShiftCtrlEnum_binary_sequential_type _zz_decode_SHIFT_CTRL_1; + wire `AluBitwiseCtrlEnum_binary_sequential_type _zz_decode_ALU_BITWISE_CTRL_1; + wire `Src2CtrlEnum_binary_sequential_type _zz_decode_SRC2_CTRL_1; + wire `AluCtrlEnum_binary_sequential_type _zz_decode_ALU_CTRL_1; + wire `Src1CtrlEnum_binary_sequential_type _zz_decode_SRC1_CTRL_1; + reg [31:0] _zz_decode_RS2_2; + wire writeBack_MEMORY_WR; + wire [31:0] writeBack_MEMORY_STORE_DATA_RF; + wire [31:0] writeBack_REGFILE_WRITE_DATA; + wire writeBack_MEMORY_ENABLE; + wire [31:0] memory_REGFILE_WRITE_DATA; + wire memory_MEMORY_ENABLE; + wire execute_MEMORY_FORCE_CONSTISTENCY; + wire execute_MEMORY_MANAGMENT; + (* keep , syn_keep *) wire [31:0] execute_RS2 /* synthesis syn_keep = 1 */ ; + wire execute_MEMORY_WR; + wire [31:0] execute_SRC_ADD; + wire execute_MEMORY_ENABLE; + wire [31:0] execute_INSTRUCTION; + wire decode_MEMORY_ENABLE; + wire decode_FLUSH_ALL; + reg IBusCachedPlugin_rsp_issueDetected_4; + reg IBusCachedPlugin_rsp_issueDetected_3; + reg IBusCachedPlugin_rsp_issueDetected_2; + reg IBusCachedPlugin_rsp_issueDetected_1; + wire `BranchCtrlEnum_binary_sequential_type decode_BRANCH_CTRL; + wire `BranchCtrlEnum_binary_sequential_type _zz_decode_BRANCH_CTRL_1; + wire [31:0] decode_INSTRUCTION; + reg [31:0] _zz_memory_to_writeBack_FORMAL_PC_NEXT; + reg [31:0] _zz_decode_to_execute_FORMAL_PC_NEXT; + wire [31:0] decode_PC; + wire [31:0] writeBack_PC; + wire [31:0] writeBack_INSTRUCTION; + reg decode_arbitration_haltItself; + reg decode_arbitration_haltByOther; + reg decode_arbitration_removeIt; + wire decode_arbitration_flushIt; + reg decode_arbitration_flushNext; + wire decode_arbitration_isValid; + wire decode_arbitration_isStuck; + wire decode_arbitration_isStuckByOthers; + wire decode_arbitration_isFlushed; + wire decode_arbitration_isMoving; + wire decode_arbitration_isFiring; + reg execute_arbitration_haltItself; + reg execute_arbitration_haltByOther; + reg execute_arbitration_removeIt; + wire execute_arbitration_flushIt; + reg execute_arbitration_flushNext; + reg execute_arbitration_isValid; + wire execute_arbitration_isStuck; + wire execute_arbitration_isStuckByOthers; + wire execute_arbitration_isFlushed; + wire execute_arbitration_isMoving; + wire execute_arbitration_isFiring; + reg memory_arbitration_haltItself; + wire memory_arbitration_haltByOther; + reg memory_arbitration_removeIt; + wire memory_arbitration_flushIt; + reg memory_arbitration_flushNext; + reg memory_arbitration_isValid; + wire memory_arbitration_isStuck; + wire memory_arbitration_isStuckByOthers; + wire memory_arbitration_isFlushed; + wire memory_arbitration_isMoving; + wire memory_arbitration_isFiring; + reg writeBack_arbitration_haltItself; + wire writeBack_arbitration_haltByOther; + reg writeBack_arbitration_removeIt; + reg writeBack_arbitration_flushIt; + reg writeBack_arbitration_flushNext; + reg writeBack_arbitration_isValid; + wire writeBack_arbitration_isStuck; + wire writeBack_arbitration_isStuckByOthers; + wire writeBack_arbitration_isFlushed; + wire writeBack_arbitration_isMoving; + wire writeBack_arbitration_isFiring; + wire [31:0] lastStageInstruction /* verilator public */ ; + wire [31:0] lastStagePc /* verilator public */ ; + wire lastStageIsValid /* verilator public */ ; + wire lastStageIsFiring /* verilator public */ ; + reg IBusCachedPlugin_fetcherHalt; + reg IBusCachedPlugin_incomingInstruction; + wire IBusCachedPlugin_predictionJumpInterface_valid; + (* keep , syn_keep *) wire [31:0] IBusCachedPlugin_predictionJumpInterface_payload /* synthesis syn_keep = 1 */ ; + reg IBusCachedPlugin_decodePrediction_cmd_hadBranch; + wire IBusCachedPlugin_decodePrediction_rsp_wasWrong; + wire IBusCachedPlugin_pcValids_0; + wire IBusCachedPlugin_pcValids_1; + wire IBusCachedPlugin_pcValids_2; + wire IBusCachedPlugin_pcValids_3; + reg IBusCachedPlugin_decodeExceptionPort_valid; + reg [3:0] IBusCachedPlugin_decodeExceptionPort_payload_code; + wire [31:0] IBusCachedPlugin_decodeExceptionPort_payload_badAddr; + wire IBusCachedPlugin_mmuBus_cmd_0_isValid; + wire IBusCachedPlugin_mmuBus_cmd_0_isStuck; + wire [31:0] IBusCachedPlugin_mmuBus_cmd_0_virtualAddress; + wire IBusCachedPlugin_mmuBus_cmd_0_bypassTranslation; + wire [31:0] IBusCachedPlugin_mmuBus_rsp_physicalAddress; + wire IBusCachedPlugin_mmuBus_rsp_isIoAccess; + wire IBusCachedPlugin_mmuBus_rsp_isPaging; + wire IBusCachedPlugin_mmuBus_rsp_allowRead; + wire IBusCachedPlugin_mmuBus_rsp_allowWrite; + wire IBusCachedPlugin_mmuBus_rsp_allowExecute; + wire IBusCachedPlugin_mmuBus_rsp_exception; + wire IBusCachedPlugin_mmuBus_rsp_refilling; + wire IBusCachedPlugin_mmuBus_rsp_bypassTranslation; + wire IBusCachedPlugin_mmuBus_end; + wire IBusCachedPlugin_mmuBus_busy; + wire dBus_cmd_valid; + wire dBus_cmd_ready; + wire dBus_cmd_payload_wr; + wire dBus_cmd_payload_uncached; + wire [31:0] dBus_cmd_payload_address; + wire [31:0] dBus_cmd_payload_data; + wire [3:0] dBus_cmd_payload_mask; + wire [2:0] dBus_cmd_payload_size; + wire dBus_cmd_payload_last; + wire dBus_rsp_valid; + wire dBus_rsp_payload_last; + wire [31:0] dBus_rsp_payload_data; + wire dBus_rsp_payload_error; + wire DBusCachedPlugin_mmuBus_cmd_0_isValid; + wire DBusCachedPlugin_mmuBus_cmd_0_isStuck; + wire [31:0] DBusCachedPlugin_mmuBus_cmd_0_virtualAddress; + wire DBusCachedPlugin_mmuBus_cmd_0_bypassTranslation; + wire [31:0] DBusCachedPlugin_mmuBus_rsp_physicalAddress; + wire DBusCachedPlugin_mmuBus_rsp_isIoAccess; + wire DBusCachedPlugin_mmuBus_rsp_isPaging; + wire DBusCachedPlugin_mmuBus_rsp_allowRead; + wire DBusCachedPlugin_mmuBus_rsp_allowWrite; + wire DBusCachedPlugin_mmuBus_rsp_allowExecute; + wire DBusCachedPlugin_mmuBus_rsp_exception; + wire DBusCachedPlugin_mmuBus_rsp_refilling; + wire DBusCachedPlugin_mmuBus_rsp_bypassTranslation; + wire DBusCachedPlugin_mmuBus_end; + wire DBusCachedPlugin_mmuBus_busy; + reg DBusCachedPlugin_redoBranch_valid; + wire [31:0] DBusCachedPlugin_redoBranch_payload; + reg DBusCachedPlugin_exceptionBus_valid; + reg [3:0] DBusCachedPlugin_exceptionBus_payload_code; + wire [31:0] DBusCachedPlugin_exceptionBus_payload_badAddr; + wire decodeExceptionPort_valid; + wire [3:0] decodeExceptionPort_payload_code; + wire [31:0] decodeExceptionPort_payload_badAddr; + wire BranchPlugin_jumpInterface_valid; + wire [31:0] BranchPlugin_jumpInterface_payload; + wire BranchPlugin_branchExceptionPort_valid; + wire [3:0] BranchPlugin_branchExceptionPort_payload_code; + wire [31:0] BranchPlugin_branchExceptionPort_payload_badAddr; + wire [31:0] CsrPlugin_csrMapping_readDataSignal; + wire [31:0] CsrPlugin_csrMapping_readDataInit; + wire [31:0] CsrPlugin_csrMapping_writeDataSignal; + wire CsrPlugin_csrMapping_allowCsrSignal; + wire CsrPlugin_csrMapping_hazardFree; + reg CsrPlugin_inWfi /* verilator public */ ; + wire CsrPlugin_thirdPartyWake; + reg CsrPlugin_jumpInterface_valid; + reg [31:0] CsrPlugin_jumpInterface_payload; + wire CsrPlugin_exceptionPendings_0; + wire CsrPlugin_exceptionPendings_1; + wire CsrPlugin_exceptionPendings_2; + wire CsrPlugin_exceptionPendings_3; + wire externalInterrupt; + wire contextSwitching; + reg [1:0] CsrPlugin_privilege; + wire CsrPlugin_forceMachineWire; + reg CsrPlugin_selfException_valid; + reg [3:0] CsrPlugin_selfException_payload_code; + wire [31:0] CsrPlugin_selfException_payload_badAddr; + wire CsrPlugin_allowInterrupts; + wire CsrPlugin_allowException; + wire CsrPlugin_allowEbreakException; + wire IBusCachedPlugin_externalFlush; + wire IBusCachedPlugin_jump_pcLoad_valid; + wire [31:0] IBusCachedPlugin_jump_pcLoad_payload; + wire [3:0] _zz_IBusCachedPlugin_jump_pcLoad_payload; + wire [3:0] _zz_IBusCachedPlugin_jump_pcLoad_payload_1; + wire _zz_IBusCachedPlugin_jump_pcLoad_payload_2; + wire _zz_IBusCachedPlugin_jump_pcLoad_payload_3; + wire _zz_IBusCachedPlugin_jump_pcLoad_payload_4; + wire IBusCachedPlugin_fetchPc_output_valid; + wire IBusCachedPlugin_fetchPc_output_ready; + wire [31:0] IBusCachedPlugin_fetchPc_output_payload; + reg [31:0] IBusCachedPlugin_fetchPc_pcReg /* verilator public */ ; + reg IBusCachedPlugin_fetchPc_correction; + reg IBusCachedPlugin_fetchPc_correctionReg; + wire IBusCachedPlugin_fetchPc_output_fire; + wire IBusCachedPlugin_fetchPc_corrected; + reg IBusCachedPlugin_fetchPc_pcRegPropagate; + reg IBusCachedPlugin_fetchPc_booted; + reg IBusCachedPlugin_fetchPc_inc; + wire when_Fetcher_l131; + wire IBusCachedPlugin_fetchPc_output_fire_1; + wire when_Fetcher_l131_1; + reg [31:0] IBusCachedPlugin_fetchPc_pc; + wire IBusCachedPlugin_fetchPc_redo_valid; + wire [31:0] IBusCachedPlugin_fetchPc_redo_payload; + reg IBusCachedPlugin_fetchPc_flushed; + wire when_Fetcher_l158; + reg IBusCachedPlugin_iBusRsp_redoFetch; + wire IBusCachedPlugin_iBusRsp_stages_0_input_valid; + wire IBusCachedPlugin_iBusRsp_stages_0_input_ready; + wire [31:0] IBusCachedPlugin_iBusRsp_stages_0_input_payload; + wire IBusCachedPlugin_iBusRsp_stages_0_output_valid; + wire IBusCachedPlugin_iBusRsp_stages_0_output_ready; + wire [31:0] IBusCachedPlugin_iBusRsp_stages_0_output_payload; + reg IBusCachedPlugin_iBusRsp_stages_0_halt; + wire IBusCachedPlugin_iBusRsp_stages_1_input_valid; + wire IBusCachedPlugin_iBusRsp_stages_1_input_ready; + wire [31:0] IBusCachedPlugin_iBusRsp_stages_1_input_payload; + wire IBusCachedPlugin_iBusRsp_stages_1_output_valid; + wire IBusCachedPlugin_iBusRsp_stages_1_output_ready; + wire [31:0] IBusCachedPlugin_iBusRsp_stages_1_output_payload; + reg IBusCachedPlugin_iBusRsp_stages_1_halt; + wire IBusCachedPlugin_iBusRsp_stages_2_input_valid; + wire IBusCachedPlugin_iBusRsp_stages_2_input_ready; + wire [31:0] IBusCachedPlugin_iBusRsp_stages_2_input_payload; + wire IBusCachedPlugin_iBusRsp_stages_2_output_valid; + wire IBusCachedPlugin_iBusRsp_stages_2_output_ready; + wire [31:0] IBusCachedPlugin_iBusRsp_stages_2_output_payload; + reg IBusCachedPlugin_iBusRsp_stages_2_halt; + wire _zz_IBusCachedPlugin_iBusRsp_stages_0_input_ready; + wire _zz_IBusCachedPlugin_iBusRsp_stages_1_input_ready; + wire _zz_IBusCachedPlugin_iBusRsp_stages_2_input_ready; + wire IBusCachedPlugin_iBusRsp_flush; + wire _zz_IBusCachedPlugin_iBusRsp_stages_0_output_ready; + wire _zz_IBusCachedPlugin_iBusRsp_stages_0_output_ready_1; + reg _zz_IBusCachedPlugin_iBusRsp_stages_0_output_ready_2; + wire IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_valid; + wire IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_ready; + wire [31:0] IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_payload; + reg _zz_IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_valid; + reg [31:0] _zz_IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_payload; + reg IBusCachedPlugin_iBusRsp_readyForError; + wire IBusCachedPlugin_iBusRsp_output_valid; + wire IBusCachedPlugin_iBusRsp_output_ready; + wire [31:0] IBusCachedPlugin_iBusRsp_output_payload_pc; + wire IBusCachedPlugin_iBusRsp_output_payload_rsp_error; + wire [31:0] IBusCachedPlugin_iBusRsp_output_payload_rsp_inst; + wire IBusCachedPlugin_iBusRsp_output_payload_isRvc; + wire when_Fetcher_l240; + wire when_Fetcher_l320; + reg IBusCachedPlugin_injector_nextPcCalc_valids_0; + wire when_Fetcher_l329; + reg IBusCachedPlugin_injector_nextPcCalc_valids_1; + wire when_Fetcher_l329_1; + reg IBusCachedPlugin_injector_nextPcCalc_valids_2; + wire when_Fetcher_l329_2; + reg IBusCachedPlugin_injector_nextPcCalc_valids_3; + wire when_Fetcher_l329_3; + reg IBusCachedPlugin_injector_nextPcCalc_valids_4; + wire when_Fetcher_l329_4; + wire _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch; + reg [18:0] _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_1; + wire _zz_2; + reg [10:0] _zz_3; + wire _zz_4; + reg [18:0] _zz_5; + reg _zz_6; + wire _zz_IBusCachedPlugin_predictionJumpInterface_payload; + reg [10:0] _zz_IBusCachedPlugin_predictionJumpInterface_payload_1; + wire _zz_IBusCachedPlugin_predictionJumpInterface_payload_2; + reg [18:0] _zz_IBusCachedPlugin_predictionJumpInterface_payload_3; + wire iBus_cmd_valid; + wire iBus_cmd_ready; + reg [31:0] iBus_cmd_payload_address; + wire [2:0] iBus_cmd_payload_size; + wire iBus_rsp_valid; + wire [31:0] iBus_rsp_payload_data; + wire iBus_rsp_payload_error; + wire [31:0] _zz_IBusCachedPlugin_rspCounter; + reg [31:0] IBusCachedPlugin_rspCounter; + wire IBusCachedPlugin_s0_tightlyCoupledHit; + reg IBusCachedPlugin_s1_tightlyCoupledHit; + reg IBusCachedPlugin_s2_tightlyCoupledHit; + wire IBusCachedPlugin_rsp_iBusRspOutputHalt; + wire IBusCachedPlugin_rsp_issueDetected; + reg IBusCachedPlugin_rsp_redoFetch; + wire when_IBusCachedPlugin_l239; + wire when_IBusCachedPlugin_l244; + wire when_IBusCachedPlugin_l250; + wire when_IBusCachedPlugin_l256; + wire when_IBusCachedPlugin_l267; + wire dataCache_1_io_mem_cmd_s2mPipe_valid; + reg dataCache_1_io_mem_cmd_s2mPipe_ready; + wire dataCache_1_io_mem_cmd_s2mPipe_payload_wr; + wire dataCache_1_io_mem_cmd_s2mPipe_payload_uncached; + wire [31:0] dataCache_1_io_mem_cmd_s2mPipe_payload_address; + wire [31:0] dataCache_1_io_mem_cmd_s2mPipe_payload_data; + wire [3:0] dataCache_1_io_mem_cmd_s2mPipe_payload_mask; + wire [2:0] dataCache_1_io_mem_cmd_s2mPipe_payload_size; + wire dataCache_1_io_mem_cmd_s2mPipe_payload_last; + reg dataCache_1_io_mem_cmd_rValid; + reg dataCache_1_io_mem_cmd_rData_wr; + reg dataCache_1_io_mem_cmd_rData_uncached; + reg [31:0] dataCache_1_io_mem_cmd_rData_address; + reg [31:0] dataCache_1_io_mem_cmd_rData_data; + reg [3:0] dataCache_1_io_mem_cmd_rData_mask; + reg [2:0] dataCache_1_io_mem_cmd_rData_size; + reg dataCache_1_io_mem_cmd_rData_last; + wire dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_valid; + wire dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_ready; + wire dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_payload_wr; + wire dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_payload_uncached; + wire [31:0] dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_payload_address; + wire [31:0] dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_payload_data; + wire [3:0] dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_payload_mask; + wire [2:0] dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_payload_size; + wire dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_payload_last; + reg dataCache_1_io_mem_cmd_s2mPipe_rValid; + reg dataCache_1_io_mem_cmd_s2mPipe_rData_wr; + reg dataCache_1_io_mem_cmd_s2mPipe_rData_uncached; + reg [31:0] dataCache_1_io_mem_cmd_s2mPipe_rData_address; + reg [31:0] dataCache_1_io_mem_cmd_s2mPipe_rData_data; + reg [3:0] dataCache_1_io_mem_cmd_s2mPipe_rData_mask; + reg [2:0] dataCache_1_io_mem_cmd_s2mPipe_rData_size; + reg dataCache_1_io_mem_cmd_s2mPipe_rData_last; + wire when_Stream_l342; + wire [31:0] _zz_DBusCachedPlugin_rspCounter; + reg [31:0] DBusCachedPlugin_rspCounter; + wire when_DBusCachedPlugin_l303; + wire [1:0] execute_DBusCachedPlugin_size; + reg [31:0] _zz_execute_MEMORY_STORE_DATA_RF; + wire dataCache_1_io_cpu_flush_isStall; + wire when_DBusCachedPlugin_l343; + wire when_DBusCachedPlugin_l359; + wire when_DBusCachedPlugin_l386; + wire when_DBusCachedPlugin_l438; + wire when_DBusCachedPlugin_l458; + wire [7:0] writeBack_DBusCachedPlugin_rspSplits_0; + wire [7:0] writeBack_DBusCachedPlugin_rspSplits_1; + wire [7:0] writeBack_DBusCachedPlugin_rspSplits_2; + wire [7:0] writeBack_DBusCachedPlugin_rspSplits_3; + reg [31:0] writeBack_DBusCachedPlugin_rspShifted; + wire [31:0] writeBack_DBusCachedPlugin_rspRf; + wire [1:0] switch_Misc_l200; + wire _zz_writeBack_DBusCachedPlugin_rspFormated; + reg [31:0] _zz_writeBack_DBusCachedPlugin_rspFormated_1; + wire _zz_writeBack_DBusCachedPlugin_rspFormated_2; + reg [31:0] _zz_writeBack_DBusCachedPlugin_rspFormated_3; + reg [31:0] writeBack_DBusCachedPlugin_rspFormated; + wire when_DBusCachedPlugin_l484; + wire [31:0] _zz_decode_IS_RS2_SIGNED; + wire _zz_decode_IS_RS2_SIGNED_1; + wire _zz_decode_IS_RS2_SIGNED_2; + wire _zz_decode_IS_RS2_SIGNED_3; + wire _zz_decode_IS_RS2_SIGNED_4; + wire `Src1CtrlEnum_binary_sequential_type _zz_decode_SRC1_CTRL_2; + wire `AluCtrlEnum_binary_sequential_type _zz_decode_ALU_CTRL_2; + wire `Src2CtrlEnum_binary_sequential_type _zz_decode_SRC2_CTRL_2; + wire `AluBitwiseCtrlEnum_binary_sequential_type _zz_decode_ALU_BITWISE_CTRL_2; + wire `ShiftCtrlEnum_binary_sequential_type _zz_decode_SHIFT_CTRL_2; + wire `BranchCtrlEnum_binary_sequential_type _zz_decode_BRANCH_CTRL_2; + wire `EnvCtrlEnum_binary_sequential_type _zz_decode_ENV_CTRL_2; + wire when_RegFilePlugin_l63; + wire [4:0] decode_RegFilePlugin_regFileReadAddress1; + wire [4:0] decode_RegFilePlugin_regFileReadAddress2; + wire [31:0] decode_RegFilePlugin_rs1Data; + wire [31:0] decode_RegFilePlugin_rs2Data; + reg lastStageRegFileWrite_valid /* verilator public */ ; + reg [4:0] lastStageRegFileWrite_payload_address /* verilator public */ ; + reg [31:0] lastStageRegFileWrite_payload_data /* verilator public */ ; + reg _zz_7; + reg [31:0] execute_IntAluPlugin_bitwise; + reg [31:0] _zz_execute_REGFILE_WRITE_DATA; + reg [31:0] _zz_execute_SRC1; + wire _zz_execute_SRC2_1; + reg [19:0] _zz_execute_SRC2_2; + wire _zz_execute_SRC2_3; + reg [19:0] _zz_execute_SRC2_4; + reg [31:0] _zz_execute_SRC2_5; + reg [31:0] execute_SrcPlugin_addSub; + wire execute_SrcPlugin_less; + wire [4:0] execute_FullBarrelShifterPlugin_amplitude; + reg [31:0] _zz_execute_FullBarrelShifterPlugin_reversed; + wire [31:0] execute_FullBarrelShifterPlugin_reversed; + reg [31:0] _zz_decode_RS2_3; + reg HazardSimplePlugin_src0Hazard; + reg HazardSimplePlugin_src1Hazard; + wire HazardSimplePlugin_writeBackWrites_valid; + wire [4:0] HazardSimplePlugin_writeBackWrites_payload_address; + wire [31:0] HazardSimplePlugin_writeBackWrites_payload_data; + reg HazardSimplePlugin_writeBackBuffer_valid; + reg [4:0] HazardSimplePlugin_writeBackBuffer_payload_address; + reg [31:0] HazardSimplePlugin_writeBackBuffer_payload_data; + wire HazardSimplePlugin_addr0Match; + wire HazardSimplePlugin_addr1Match; + wire when_HazardSimplePlugin_l47; + wire when_HazardSimplePlugin_l48; + wire when_HazardSimplePlugin_l51; + wire when_HazardSimplePlugin_l45; + wire when_HazardSimplePlugin_l57; + wire when_HazardSimplePlugin_l58; + wire when_HazardSimplePlugin_l48_1; + wire when_HazardSimplePlugin_l51_1; + wire when_HazardSimplePlugin_l45_1; + wire when_HazardSimplePlugin_l57_1; + wire when_HazardSimplePlugin_l58_1; + wire when_HazardSimplePlugin_l48_2; + wire when_HazardSimplePlugin_l51_2; + wire when_HazardSimplePlugin_l45_2; + wire when_HazardSimplePlugin_l57_2; + wire when_HazardSimplePlugin_l58_2; + wire when_HazardSimplePlugin_l105; + wire when_HazardSimplePlugin_l108; + wire when_HazardSimplePlugin_l113; + wire execute_BranchPlugin_eq; + wire [2:0] switch_Misc_l200_1; + reg _zz_execute_BRANCH_COND_RESULT; + reg _zz_execute_BRANCH_COND_RESULT_1; + wire _zz_execute_BranchPlugin_missAlignedTarget; + reg [19:0] _zz_execute_BranchPlugin_missAlignedTarget_1; + wire _zz_execute_BranchPlugin_missAlignedTarget_2; + reg [10:0] _zz_execute_BranchPlugin_missAlignedTarget_3; + wire _zz_execute_BranchPlugin_missAlignedTarget_4; + reg [18:0] _zz_execute_BranchPlugin_missAlignedTarget_5; + reg _zz_execute_BranchPlugin_missAlignedTarget_6; + wire execute_BranchPlugin_missAlignedTarget; + reg [31:0] execute_BranchPlugin_branch_src1; + reg [31:0] execute_BranchPlugin_branch_src2; + wire _zz_execute_BranchPlugin_branch_src2; + reg [19:0] _zz_execute_BranchPlugin_branch_src2_1; + wire _zz_execute_BranchPlugin_branch_src2_2; + reg [10:0] _zz_execute_BranchPlugin_branch_src2_3; + wire _zz_execute_BranchPlugin_branch_src2_4; + reg [18:0] _zz_execute_BranchPlugin_branch_src2_5; + wire [31:0] execute_BranchPlugin_branchAdder; + reg [1:0] CsrPlugin_misa_base; + reg [25:0] CsrPlugin_misa_extensions; + reg [1:0] CsrPlugin_mtvec_mode; + reg [29:0] CsrPlugin_mtvec_base; + reg [31:0] CsrPlugin_mepc; + reg CsrPlugin_mstatus_MIE; + reg CsrPlugin_mstatus_MPIE; + reg [1:0] CsrPlugin_mstatus_MPP; + reg CsrPlugin_mip_MEIP; + reg CsrPlugin_mip_MTIP; + reg CsrPlugin_mip_MSIP; + reg CsrPlugin_mie_MEIE; + reg CsrPlugin_mie_MTIE; + reg CsrPlugin_mie_MSIE; + reg [31:0] CsrPlugin_mscratch; + reg CsrPlugin_mcause_interrupt; + reg [3:0] CsrPlugin_mcause_exceptionCode; + reg [31:0] CsrPlugin_mtval; + reg [63:0] CsrPlugin_mcycle = 64'b0000000000000000000000000000000000000000000000000000000000000000; + reg [63:0] CsrPlugin_minstret = 64'b0000000000000000000000000000000000000000000000000000000000000000; + wire _zz_when_CsrPlugin_l952; + wire _zz_when_CsrPlugin_l952_1; + wire _zz_when_CsrPlugin_l952_2; + reg CsrPlugin_exceptionPortCtrl_exceptionValids_decode; + reg CsrPlugin_exceptionPortCtrl_exceptionValids_execute; + reg CsrPlugin_exceptionPortCtrl_exceptionValids_memory; + reg CsrPlugin_exceptionPortCtrl_exceptionValids_writeBack; + reg CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_decode; + reg CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_execute; + reg CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_memory; + reg CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_writeBack; + reg [3:0] CsrPlugin_exceptionPortCtrl_exceptionContext_code; + reg [31:0] CsrPlugin_exceptionPortCtrl_exceptionContext_badAddr; + wire [1:0] CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilegeUncapped; + wire [1:0] CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilege; + wire [1:0] _zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code; + wire _zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_1; + wire when_CsrPlugin_l909; + wire when_CsrPlugin_l909_1; + wire when_CsrPlugin_l909_2; + wire when_CsrPlugin_l909_3; + wire when_CsrPlugin_l922; + reg CsrPlugin_interrupt_valid; + reg [3:0] CsrPlugin_interrupt_code /* verilator public */ ; + reg [1:0] CsrPlugin_interrupt_targetPrivilege; + wire when_CsrPlugin_l946; + wire when_CsrPlugin_l952; + wire when_CsrPlugin_l952_1; + wire when_CsrPlugin_l952_2; + wire CsrPlugin_exception; + reg CsrPlugin_lastStageWasWfi; + reg CsrPlugin_pipelineLiberator_pcValids_0; + reg CsrPlugin_pipelineLiberator_pcValids_1; + reg CsrPlugin_pipelineLiberator_pcValids_2; + wire CsrPlugin_pipelineLiberator_active; + wire when_CsrPlugin_l980; + wire when_CsrPlugin_l980_1; + wire when_CsrPlugin_l980_2; + wire when_CsrPlugin_l985; + reg CsrPlugin_pipelineLiberator_done; + wire when_CsrPlugin_l991; + wire CsrPlugin_interruptJump /* verilator public */ ; + reg CsrPlugin_hadException /* verilator public */ ; + reg [1:0] CsrPlugin_targetPrivilege; + reg [3:0] CsrPlugin_trapCause; + reg [1:0] CsrPlugin_xtvec_mode; + reg [29:0] CsrPlugin_xtvec_base; + wire when_CsrPlugin_l1019; + wire when_CsrPlugin_l1064; + wire [1:0] switch_CsrPlugin_l1068; + reg execute_CsrPlugin_wfiWake; + wire when_CsrPlugin_l1108; + wire when_CsrPlugin_l1110; + wire when_CsrPlugin_l1116; + wire execute_CsrPlugin_blockedBySideEffects; + reg execute_CsrPlugin_illegalAccess; + reg execute_CsrPlugin_illegalInstruction; + wire when_CsrPlugin_l1129; + wire when_CsrPlugin_l1136; + wire when_CsrPlugin_l1137; + wire when_CsrPlugin_l1144; + reg execute_CsrPlugin_writeInstruction; + reg execute_CsrPlugin_readInstruction; + wire execute_CsrPlugin_writeEnable; + wire execute_CsrPlugin_readEnable; + wire [31:0] execute_CsrPlugin_readToWriteData; + wire switch_Misc_l200_2; + reg [31:0] _zz_CsrPlugin_csrMapping_writeDataSignal; + wire when_CsrPlugin_l1176; + wire when_CsrPlugin_l1180; + wire [11:0] execute_CsrPlugin_csrAddress; + reg execute_MulPlugin_aSigned; + reg execute_MulPlugin_bSigned; + wire [31:0] execute_MulPlugin_a; + wire [31:0] execute_MulPlugin_b; + wire [1:0] switch_MulPlugin_l87; + wire [15:0] execute_MulPlugin_aULow; + wire [15:0] execute_MulPlugin_bULow; + wire [16:0] execute_MulPlugin_aSLow; + wire [16:0] execute_MulPlugin_bSLow; + wire [16:0] execute_MulPlugin_aHigh; + wire [16:0] execute_MulPlugin_bHigh; + wire [65:0] writeBack_MulPlugin_result; + wire when_MulPlugin_l147; + wire [1:0] switch_MulPlugin_l148; + reg [32:0] memory_DivPlugin_rs1; + reg [31:0] memory_DivPlugin_rs2; + reg [64:0] memory_DivPlugin_accumulator; + wire memory_DivPlugin_frontendOk; + reg memory_DivPlugin_div_needRevert; + reg memory_DivPlugin_div_counter_willIncrement; + reg memory_DivPlugin_div_counter_willClear; + reg [5:0] memory_DivPlugin_div_counter_valueNext; + reg [5:0] memory_DivPlugin_div_counter_value; + wire memory_DivPlugin_div_counter_willOverflowIfInc; + wire memory_DivPlugin_div_counter_willOverflow; + reg memory_DivPlugin_div_done; + wire when_MulDivIterativePlugin_l126; + wire when_MulDivIterativePlugin_l126_1; + reg [31:0] memory_DivPlugin_div_result; + wire when_MulDivIterativePlugin_l128; + wire when_MulDivIterativePlugin_l129; + wire when_MulDivIterativePlugin_l132; + wire [31:0] _zz_memory_DivPlugin_div_stage_0_remainderShifted; + wire [32:0] memory_DivPlugin_div_stage_0_remainderShifted; + wire [32:0] memory_DivPlugin_div_stage_0_remainderMinusDenominator; + wire [31:0] memory_DivPlugin_div_stage_0_outRemainder; + wire [31:0] memory_DivPlugin_div_stage_0_outNumerator; + wire when_MulDivIterativePlugin_l151; + wire [31:0] _zz_memory_DivPlugin_div_result; + wire when_MulDivIterativePlugin_l162; + wire _zz_memory_DivPlugin_rs2; + wire _zz_memory_DivPlugin_rs1; + reg [32:0] _zz_memory_DivPlugin_rs1_1; + reg [31:0] externalInterruptArray_regNext; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit; + wire [31:0] _zz_CsrPlugin_csrMapping_readDataInit_1; + wire when_Pipeline_l124; + reg [31:0] decode_to_execute_PC; + wire when_Pipeline_l124_1; + reg [31:0] execute_to_memory_PC; + wire when_Pipeline_l124_2; + reg [31:0] memory_to_writeBack_PC; + wire when_Pipeline_l124_3; + reg [31:0] decode_to_execute_INSTRUCTION; + wire when_Pipeline_l124_4; + reg [31:0] execute_to_memory_INSTRUCTION; + wire when_Pipeline_l124_5; + reg [31:0] memory_to_writeBack_INSTRUCTION; + wire when_Pipeline_l124_6; + reg [31:0] decode_to_execute_FORMAL_PC_NEXT; + wire when_Pipeline_l124_7; + reg [31:0] execute_to_memory_FORMAL_PC_NEXT; + wire when_Pipeline_l124_8; + reg [31:0] memory_to_writeBack_FORMAL_PC_NEXT; + wire when_Pipeline_l124_9; + reg decode_to_execute_MEMORY_FORCE_CONSTISTENCY; + wire when_Pipeline_l124_10; + reg `Src1CtrlEnum_binary_sequential_type decode_to_execute_SRC1_CTRL; + wire when_Pipeline_l124_11; + reg decode_to_execute_SRC_USE_SUB_LESS; + wire when_Pipeline_l124_12; + reg decode_to_execute_MEMORY_ENABLE; + wire when_Pipeline_l124_13; + reg execute_to_memory_MEMORY_ENABLE; + wire when_Pipeline_l124_14; + reg memory_to_writeBack_MEMORY_ENABLE; + wire when_Pipeline_l124_15; + reg `AluCtrlEnum_binary_sequential_type decode_to_execute_ALU_CTRL; + wire when_Pipeline_l124_16; + reg `Src2CtrlEnum_binary_sequential_type decode_to_execute_SRC2_CTRL; + wire when_Pipeline_l124_17; + reg decode_to_execute_REGFILE_WRITE_VALID; + wire when_Pipeline_l124_18; + reg execute_to_memory_REGFILE_WRITE_VALID; + wire when_Pipeline_l124_19; + reg memory_to_writeBack_REGFILE_WRITE_VALID; + wire when_Pipeline_l124_20; + reg decode_to_execute_BYPASSABLE_EXECUTE_STAGE; + wire when_Pipeline_l124_21; + reg decode_to_execute_BYPASSABLE_MEMORY_STAGE; + wire when_Pipeline_l124_22; + reg execute_to_memory_BYPASSABLE_MEMORY_STAGE; + wire when_Pipeline_l124_23; + reg decode_to_execute_MEMORY_WR; + wire when_Pipeline_l124_24; + reg execute_to_memory_MEMORY_WR; + wire when_Pipeline_l124_25; + reg memory_to_writeBack_MEMORY_WR; + wire when_Pipeline_l124_26; + reg decode_to_execute_MEMORY_MANAGMENT; + wire when_Pipeline_l124_27; + reg decode_to_execute_SRC_LESS_UNSIGNED; + wire when_Pipeline_l124_28; + reg `AluBitwiseCtrlEnum_binary_sequential_type decode_to_execute_ALU_BITWISE_CTRL; + wire when_Pipeline_l124_29; + reg `ShiftCtrlEnum_binary_sequential_type decode_to_execute_SHIFT_CTRL; + wire when_Pipeline_l124_30; + reg `ShiftCtrlEnum_binary_sequential_type execute_to_memory_SHIFT_CTRL; + wire when_Pipeline_l124_31; + reg `BranchCtrlEnum_binary_sequential_type decode_to_execute_BRANCH_CTRL; + wire when_Pipeline_l124_32; + reg decode_to_execute_IS_CSR; + wire when_Pipeline_l124_33; + reg `EnvCtrlEnum_binary_sequential_type decode_to_execute_ENV_CTRL; + wire when_Pipeline_l124_34; + reg `EnvCtrlEnum_binary_sequential_type execute_to_memory_ENV_CTRL; + wire when_Pipeline_l124_35; + reg `EnvCtrlEnum_binary_sequential_type memory_to_writeBack_ENV_CTRL; + wire when_Pipeline_l124_36; + reg decode_to_execute_IS_MUL; + wire when_Pipeline_l124_37; + reg execute_to_memory_IS_MUL; + wire when_Pipeline_l124_38; + reg memory_to_writeBack_IS_MUL; + wire when_Pipeline_l124_39; + reg decode_to_execute_IS_DIV; + wire when_Pipeline_l124_40; + reg execute_to_memory_IS_DIV; + wire when_Pipeline_l124_41; + reg decode_to_execute_IS_RS1_SIGNED; + wire when_Pipeline_l124_42; + reg decode_to_execute_IS_RS2_SIGNED; + wire when_Pipeline_l124_43; + reg [31:0] decode_to_execute_RS1; + wire when_Pipeline_l124_44; + reg [31:0] decode_to_execute_RS2; + wire when_Pipeline_l124_45; + reg decode_to_execute_SRC2_FORCE_ZERO; + wire when_Pipeline_l124_46; + reg decode_to_execute_PREDICTION_HAD_BRANCHED2; + wire when_Pipeline_l124_47; + reg decode_to_execute_CSR_WRITE_OPCODE; + wire when_Pipeline_l124_48; + reg decode_to_execute_CSR_READ_OPCODE; + wire when_Pipeline_l124_49; + reg [31:0] execute_to_memory_MEMORY_STORE_DATA_RF; + wire when_Pipeline_l124_50; + reg [31:0] memory_to_writeBack_MEMORY_STORE_DATA_RF; + wire when_Pipeline_l124_51; + reg [31:0] execute_to_memory_REGFILE_WRITE_DATA; + wire when_Pipeline_l124_52; + reg [31:0] memory_to_writeBack_REGFILE_WRITE_DATA; + wire when_Pipeline_l124_53; + reg [31:0] execute_to_memory_SHIFT_RIGHT; + wire when_Pipeline_l124_54; + reg execute_to_memory_BRANCH_DO; + wire when_Pipeline_l124_55; + reg [31:0] execute_to_memory_BRANCH_CALC; + wire when_Pipeline_l124_56; + reg [31:0] execute_to_memory_MUL_LL; + wire when_Pipeline_l124_57; + reg [33:0] execute_to_memory_MUL_LH; + wire when_Pipeline_l124_58; + reg [33:0] execute_to_memory_MUL_HL; + wire when_Pipeline_l124_59; + reg [33:0] execute_to_memory_MUL_HH; + wire when_Pipeline_l124_60; + reg [33:0] memory_to_writeBack_MUL_HH; + wire when_Pipeline_l124_61; + reg [51:0] memory_to_writeBack_MUL_LOW; + wire when_Pipeline_l151; + wire when_Pipeline_l154; + wire when_Pipeline_l151_1; + wire when_Pipeline_l154_1; + wire when_Pipeline_l151_2; + wire when_Pipeline_l154_2; + wire when_CsrPlugin_l1264; + reg execute_CsrPlugin_csr_3264; + wire when_CsrPlugin_l1264_1; + reg execute_CsrPlugin_csr_3857; + wire when_CsrPlugin_l1264_2; + reg execute_CsrPlugin_csr_3858; + wire when_CsrPlugin_l1264_3; + reg execute_CsrPlugin_csr_3859; + wire when_CsrPlugin_l1264_4; + reg execute_CsrPlugin_csr_3860; + wire when_CsrPlugin_l1264_5; + reg execute_CsrPlugin_csr_769; + wire when_CsrPlugin_l1264_6; + reg execute_CsrPlugin_csr_768; + wire when_CsrPlugin_l1264_7; + reg execute_CsrPlugin_csr_836; + wire when_CsrPlugin_l1264_8; + reg execute_CsrPlugin_csr_772; + wire when_CsrPlugin_l1264_9; + reg execute_CsrPlugin_csr_773; + wire when_CsrPlugin_l1264_10; + reg execute_CsrPlugin_csr_833; + wire when_CsrPlugin_l1264_11; + reg execute_CsrPlugin_csr_832; + wire when_CsrPlugin_l1264_12; + reg execute_CsrPlugin_csr_834; + wire when_CsrPlugin_l1264_13; + reg execute_CsrPlugin_csr_835; + wire when_CsrPlugin_l1264_14; + reg execute_CsrPlugin_csr_2816; + wire when_CsrPlugin_l1264_15; + reg execute_CsrPlugin_csr_2944; + wire when_CsrPlugin_l1264_16; + reg execute_CsrPlugin_csr_2818; + wire when_CsrPlugin_l1264_17; + reg execute_CsrPlugin_csr_2946; + wire when_CsrPlugin_l1264_18; + reg execute_CsrPlugin_csr_3072; + wire when_CsrPlugin_l1264_19; + reg execute_CsrPlugin_csr_3200; + wire when_CsrPlugin_l1264_20; + reg execute_CsrPlugin_csr_3074; + wire when_CsrPlugin_l1264_21; + reg execute_CsrPlugin_csr_3202; + wire when_CsrPlugin_l1264_22; + reg execute_CsrPlugin_csr_3008; + wire when_CsrPlugin_l1264_23; + reg execute_CsrPlugin_csr_4032; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_2; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_3; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_4; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_5; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_6; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_7; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_8; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_9; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_10; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_11; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_12; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_13; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_14; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_15; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_16; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_17; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_18; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_19; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_20; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_21; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_22; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_23; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_24; + wire when_CsrPlugin_l1297; + wire when_CsrPlugin_l1302; + reg [2:0] _zz_iBusWishbone_ADR; + wire when_InstructionCache_l239; + reg _zz_iBus_rsp_valid; + reg [31:0] iBusWishbone_DAT_MISO_regNext; + reg [2:0] _zz_dBus_cmd_ready; + wire _zz_dBus_cmd_ready_1; + wire _zz_dBus_cmd_ready_2; + wire _zz_dBus_cmd_ready_3; + wire _zz_dBus_cmd_ready_4; + wire _zz_dBus_cmd_ready_5; + reg _zz_dBus_rsp_valid; + reg [31:0] dBusWishbone_DAT_MISO_regNext; + `ifndef SYNTHESIS + reg [39:0] _zz_memory_to_writeBack_ENV_CTRL_string; + reg [39:0] _zz_memory_to_writeBack_ENV_CTRL_1_string; + reg [39:0] _zz_execute_to_memory_ENV_CTRL_string; + reg [39:0] _zz_execute_to_memory_ENV_CTRL_1_string; + reg [39:0] decode_ENV_CTRL_string; + reg [39:0] _zz_decode_ENV_CTRL_string; + reg [39:0] _zz_decode_to_execute_ENV_CTRL_string; + reg [39:0] _zz_decode_to_execute_ENV_CTRL_1_string; + reg [31:0] _zz_decode_to_execute_BRANCH_CTRL_string; + reg [31:0] _zz_decode_to_execute_BRANCH_CTRL_1_string; + reg [71:0] _zz_execute_to_memory_SHIFT_CTRL_string; + reg [71:0] _zz_execute_to_memory_SHIFT_CTRL_1_string; + reg [71:0] decode_SHIFT_CTRL_string; + reg [71:0] _zz_decode_SHIFT_CTRL_string; + reg [71:0] _zz_decode_to_execute_SHIFT_CTRL_string; + reg [71:0] _zz_decode_to_execute_SHIFT_CTRL_1_string; + reg [39:0] decode_ALU_BITWISE_CTRL_string; + reg [39:0] _zz_decode_ALU_BITWISE_CTRL_string; + reg [39:0] _zz_decode_to_execute_ALU_BITWISE_CTRL_string; + reg [39:0] _zz_decode_to_execute_ALU_BITWISE_CTRL_1_string; + reg [23:0] decode_SRC2_CTRL_string; + reg [23:0] _zz_decode_SRC2_CTRL_string; + reg [23:0] _zz_decode_to_execute_SRC2_CTRL_string; + reg [23:0] _zz_decode_to_execute_SRC2_CTRL_1_string; + reg [63:0] decode_ALU_CTRL_string; + reg [63:0] _zz_decode_ALU_CTRL_string; + reg [63:0] _zz_decode_to_execute_ALU_CTRL_string; + reg [63:0] _zz_decode_to_execute_ALU_CTRL_1_string; + reg [95:0] decode_SRC1_CTRL_string; + reg [95:0] _zz_decode_SRC1_CTRL_string; + reg [95:0] _zz_decode_to_execute_SRC1_CTRL_string; + reg [95:0] _zz_decode_to_execute_SRC1_CTRL_1_string; + reg [39:0] memory_ENV_CTRL_string; + reg [39:0] _zz_memory_ENV_CTRL_string; + reg [39:0] execute_ENV_CTRL_string; + reg [39:0] _zz_execute_ENV_CTRL_string; + reg [39:0] writeBack_ENV_CTRL_string; + reg [39:0] _zz_writeBack_ENV_CTRL_string; + reg [31:0] execute_BRANCH_CTRL_string; + reg [31:0] _zz_execute_BRANCH_CTRL_string; + reg [71:0] memory_SHIFT_CTRL_string; + reg [71:0] _zz_memory_SHIFT_CTRL_string; + reg [71:0] execute_SHIFT_CTRL_string; + reg [71:0] _zz_execute_SHIFT_CTRL_string; + reg [23:0] execute_SRC2_CTRL_string; + reg [23:0] _zz_execute_SRC2_CTRL_string; + reg [95:0] execute_SRC1_CTRL_string; + reg [95:0] _zz_execute_SRC1_CTRL_string; + reg [63:0] execute_ALU_CTRL_string; + reg [63:0] _zz_execute_ALU_CTRL_string; + reg [39:0] execute_ALU_BITWISE_CTRL_string; + reg [39:0] _zz_execute_ALU_BITWISE_CTRL_string; + reg [39:0] _zz_decode_ENV_CTRL_1_string; + reg [31:0] _zz_decode_BRANCH_CTRL_string; + reg [71:0] _zz_decode_SHIFT_CTRL_1_string; + reg [39:0] _zz_decode_ALU_BITWISE_CTRL_1_string; + reg [23:0] _zz_decode_SRC2_CTRL_1_string; + reg [63:0] _zz_decode_ALU_CTRL_1_string; + reg [95:0] _zz_decode_SRC1_CTRL_1_string; + reg [31:0] decode_BRANCH_CTRL_string; + reg [31:0] _zz_decode_BRANCH_CTRL_1_string; + reg [95:0] _zz_decode_SRC1_CTRL_2_string; + reg [63:0] _zz_decode_ALU_CTRL_2_string; + reg [23:0] _zz_decode_SRC2_CTRL_2_string; + reg [39:0] _zz_decode_ALU_BITWISE_CTRL_2_string; + reg [71:0] _zz_decode_SHIFT_CTRL_2_string; + reg [31:0] _zz_decode_BRANCH_CTRL_2_string; + reg [39:0] _zz_decode_ENV_CTRL_2_string; + reg [95:0] decode_to_execute_SRC1_CTRL_string; + reg [63:0] decode_to_execute_ALU_CTRL_string; + reg [23:0] decode_to_execute_SRC2_CTRL_string; + reg [39:0] decode_to_execute_ALU_BITWISE_CTRL_string; + reg [71:0] decode_to_execute_SHIFT_CTRL_string; + reg [71:0] execute_to_memory_SHIFT_CTRL_string; + reg [31:0] decode_to_execute_BRANCH_CTRL_string; + reg [39:0] decode_to_execute_ENV_CTRL_string; + reg [39:0] execute_to_memory_ENV_CTRL_string; + reg [39:0] memory_to_writeBack_ENV_CTRL_string; + `endif + + (* ram_style = "block" *) reg [31:0] RegFilePlugin_regFile [0:31] /* verilator public */ ; + + assign _zz_when = ({decodeExceptionPort_valid,IBusCachedPlugin_decodeExceptionPort_valid} != 2'b00); + assign _zz_memory_MUL_LOW = ($signed(_zz_memory_MUL_LOW_1) + $signed(_zz_memory_MUL_LOW_5)); + assign _zz_memory_MUL_LOW_1 = ($signed(_zz_memory_MUL_LOW_2) + $signed(_zz_memory_MUL_LOW_3)); + assign _zz_memory_MUL_LOW_2 = 52'h0; + assign _zz_memory_MUL_LOW_4 = {1'b0,memory_MUL_LL}; + assign _zz_memory_MUL_LOW_3 = {{19{_zz_memory_MUL_LOW_4[32]}}, _zz_memory_MUL_LOW_4}; + assign _zz_memory_MUL_LOW_6 = ({16'd0,memory_MUL_LH} <<< 16); + assign _zz_memory_MUL_LOW_5 = {{2{_zz_memory_MUL_LOW_6[49]}}, _zz_memory_MUL_LOW_6}; + assign _zz_memory_MUL_LOW_8 = ({16'd0,memory_MUL_HL} <<< 16); + assign _zz_memory_MUL_LOW_7 = {{2{_zz_memory_MUL_LOW_8[49]}}, _zz_memory_MUL_LOW_8}; + assign _zz_execute_SHIFT_RIGHT_1 = ($signed(_zz_execute_SHIFT_RIGHT_2) >>> execute_FullBarrelShifterPlugin_amplitude); + assign _zz_execute_SHIFT_RIGHT = _zz_execute_SHIFT_RIGHT_1[31 : 0]; + assign _zz_execute_SHIFT_RIGHT_2 = {((execute_SHIFT_CTRL == `ShiftCtrlEnum_binary_sequential_SRA_1) && execute_FullBarrelShifterPlugin_reversed[31]),execute_FullBarrelShifterPlugin_reversed}; + assign _zz__zz_IBusCachedPlugin_jump_pcLoad_payload_1 = (_zz_IBusCachedPlugin_jump_pcLoad_payload - 4'b0001); + assign _zz_IBusCachedPlugin_fetchPc_pc_1 = {IBusCachedPlugin_fetchPc_inc,2'b00}; + assign _zz_IBusCachedPlugin_fetchPc_pc = {29'd0, _zz_IBusCachedPlugin_fetchPc_pc_1}; + assign _zz__zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch = {{{decode_INSTRUCTION[31],decode_INSTRUCTION[7]},decode_INSTRUCTION[30 : 25]},decode_INSTRUCTION[11 : 8]}; + assign _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_2 = {{_zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_1,{{{decode_INSTRUCTION[31],decode_INSTRUCTION[7]},decode_INSTRUCTION[30 : 25]},decode_INSTRUCTION[11 : 8]}},1'b0}; + assign _zz__zz_2 = {{{decode_INSTRUCTION[31],decode_INSTRUCTION[19 : 12]},decode_INSTRUCTION[20]},decode_INSTRUCTION[30 : 21]}; + assign _zz__zz_4 = {{{decode_INSTRUCTION[31],decode_INSTRUCTION[7]},decode_INSTRUCTION[30 : 25]},decode_INSTRUCTION[11 : 8]}; + assign _zz__zz_6 = {{_zz_3,{{{decode_INSTRUCTION[31],decode_INSTRUCTION[19 : 12]},decode_INSTRUCTION[20]},decode_INSTRUCTION[30 : 21]}},1'b0}; + assign _zz__zz_6_1 = {{_zz_5,{{{decode_INSTRUCTION[31],decode_INSTRUCTION[7]},decode_INSTRUCTION[30 : 25]},decode_INSTRUCTION[11 : 8]}},1'b0}; + assign _zz__zz_IBusCachedPlugin_predictionJumpInterface_payload = {{{decode_INSTRUCTION[31],decode_INSTRUCTION[19 : 12]},decode_INSTRUCTION[20]},decode_INSTRUCTION[30 : 21]}; + assign _zz__zz_IBusCachedPlugin_predictionJumpInterface_payload_2 = {{{decode_INSTRUCTION[31],decode_INSTRUCTION[7]},decode_INSTRUCTION[30 : 25]},decode_INSTRUCTION[11 : 8]}; + assign _zz_DBusCachedPlugin_exceptionBus_payload_code = (writeBack_MEMORY_WR ? 3'b111 : 3'b101); + assign _zz_DBusCachedPlugin_exceptionBus_payload_code_1 = (writeBack_MEMORY_WR ? 3'b110 : 3'b100); + assign _zz__zz_execute_REGFILE_WRITE_DATA = execute_SRC_LESS; + assign _zz__zz_execute_SRC1 = 3'b100; + assign _zz__zz_execute_SRC1_1 = execute_INSTRUCTION[19 : 15]; + assign _zz__zz_execute_SRC2_3 = {execute_INSTRUCTION[31 : 25],execute_INSTRUCTION[11 : 7]}; + assign _zz_execute_SrcPlugin_addSub = ($signed(_zz_execute_SrcPlugin_addSub_1) + $signed(_zz_execute_SrcPlugin_addSub_4)); + assign _zz_execute_SrcPlugin_addSub_1 = ($signed(_zz_execute_SrcPlugin_addSub_2) + $signed(_zz_execute_SrcPlugin_addSub_3)); + assign _zz_execute_SrcPlugin_addSub_2 = execute_SRC1; + assign _zz_execute_SrcPlugin_addSub_3 = (execute_SRC_USE_SUB_LESS ? (~ execute_SRC2) : execute_SRC2); + assign _zz_execute_SrcPlugin_addSub_4 = (execute_SRC_USE_SUB_LESS ? _zz_execute_SrcPlugin_addSub_5 : _zz_execute_SrcPlugin_addSub_6); + assign _zz_execute_SrcPlugin_addSub_5 = 32'h00000001; + assign _zz_execute_SrcPlugin_addSub_6 = 32'h0; + assign _zz__zz_execute_BranchPlugin_missAlignedTarget_2 = {{{execute_INSTRUCTION[31],execute_INSTRUCTION[19 : 12]},execute_INSTRUCTION[20]},execute_INSTRUCTION[30 : 21]}; + assign _zz__zz_execute_BranchPlugin_missAlignedTarget_4 = {{{execute_INSTRUCTION[31],execute_INSTRUCTION[7]},execute_INSTRUCTION[30 : 25]},execute_INSTRUCTION[11 : 8]}; + assign _zz__zz_execute_BranchPlugin_missAlignedTarget_6 = {_zz_execute_BranchPlugin_missAlignedTarget_1,execute_INSTRUCTION[31 : 20]}; + assign _zz__zz_execute_BranchPlugin_missAlignedTarget_6_1 = {{_zz_execute_BranchPlugin_missAlignedTarget_3,{{{execute_INSTRUCTION[31],execute_INSTRUCTION[19 : 12]},execute_INSTRUCTION[20]},execute_INSTRUCTION[30 : 21]}},1'b0}; + assign _zz__zz_execute_BranchPlugin_missAlignedTarget_6_2 = {{_zz_execute_BranchPlugin_missAlignedTarget_5,{{{execute_INSTRUCTION[31],execute_INSTRUCTION[7]},execute_INSTRUCTION[30 : 25]},execute_INSTRUCTION[11 : 8]}},1'b0}; + assign _zz__zz_execute_BranchPlugin_branch_src2_2 = {{{execute_INSTRUCTION[31],execute_INSTRUCTION[19 : 12]},execute_INSTRUCTION[20]},execute_INSTRUCTION[30 : 21]}; + assign _zz__zz_execute_BranchPlugin_branch_src2_4 = {{{execute_INSTRUCTION[31],execute_INSTRUCTION[7]},execute_INSTRUCTION[30 : 25]},execute_INSTRUCTION[11 : 8]}; + assign _zz_execute_BranchPlugin_branch_src2_9 = 3'b100; + assign _zz__zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_1 = (_zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code & (~ _zz__zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_1_1)); + assign _zz__zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_1_1 = (_zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code - 2'b01); + assign _zz_writeBack_MulPlugin_result = {{14{writeBack_MUL_LOW[51]}}, writeBack_MUL_LOW}; + assign _zz_writeBack_MulPlugin_result_1 = ({32'd0,writeBack_MUL_HH} <<< 32); + assign _zz__zz_decode_RS2_2 = writeBack_MUL_LOW[31 : 0]; + assign _zz__zz_decode_RS2_2_1 = writeBack_MulPlugin_result[63 : 32]; + assign _zz_memory_DivPlugin_div_counter_valueNext_1 = memory_DivPlugin_div_counter_willIncrement; + assign _zz_memory_DivPlugin_div_counter_valueNext = {5'd0, _zz_memory_DivPlugin_div_counter_valueNext_1}; + assign _zz_memory_DivPlugin_div_stage_0_remainderMinusDenominator = {1'd0, memory_DivPlugin_rs2}; + assign _zz_memory_DivPlugin_div_stage_0_outRemainder = memory_DivPlugin_div_stage_0_remainderMinusDenominator[31:0]; + assign _zz_memory_DivPlugin_div_stage_0_outRemainder_1 = memory_DivPlugin_div_stage_0_remainderShifted[31:0]; + assign _zz_memory_DivPlugin_div_stage_0_outNumerator = {_zz_memory_DivPlugin_div_stage_0_remainderShifted,(! memory_DivPlugin_div_stage_0_remainderMinusDenominator[32])}; + assign _zz_memory_DivPlugin_div_result_1 = _zz_memory_DivPlugin_div_result_2; + assign _zz_memory_DivPlugin_div_result_2 = _zz_memory_DivPlugin_div_result_3; + assign _zz_memory_DivPlugin_div_result_3 = ({memory_DivPlugin_div_needRevert,(memory_DivPlugin_div_needRevert ? (~ _zz_memory_DivPlugin_div_result) : _zz_memory_DivPlugin_div_result)} + _zz_memory_DivPlugin_div_result_4); + assign _zz_memory_DivPlugin_div_result_5 = memory_DivPlugin_div_needRevert; + assign _zz_memory_DivPlugin_div_result_4 = {32'd0, _zz_memory_DivPlugin_div_result_5}; + assign _zz_memory_DivPlugin_rs1_3 = _zz_memory_DivPlugin_rs1; + assign _zz_memory_DivPlugin_rs1_2 = {32'd0, _zz_memory_DivPlugin_rs1_3}; + assign _zz_memory_DivPlugin_rs2_2 = _zz_memory_DivPlugin_rs2; + assign _zz_memory_DivPlugin_rs2_1 = {31'd0, _zz_memory_DivPlugin_rs2_2}; + assign _zz_iBusWishbone_ADR_1 = (iBus_cmd_payload_address >>> 5); + assign _zz_decode_RegFilePlugin_rs1Data = 1'b1; + assign _zz_decode_RegFilePlugin_rs2Data = 1'b1; + assign _zz_IBusCachedPlugin_jump_pcLoad_payload_6 = {_zz_IBusCachedPlugin_jump_pcLoad_payload_4,_zz_IBusCachedPlugin_jump_pcLoad_payload_3}; + assign _zz_writeBack_DBusCachedPlugin_rspShifted_1 = dataCache_1_io_cpu_writeBack_address[1 : 0]; + assign _zz_writeBack_DBusCachedPlugin_rspShifted_3 = dataCache_1_io_cpu_writeBack_address[1 : 1]; + assign _zz_decode_LEGAL_INSTRUCTION = 32'h0000107f; + assign _zz_decode_LEGAL_INSTRUCTION_1 = (decode_INSTRUCTION & 32'h0000207f); + assign _zz_decode_LEGAL_INSTRUCTION_2 = 32'h00002073; + assign _zz_decode_LEGAL_INSTRUCTION_3 = ((decode_INSTRUCTION & 32'h0000407f) == 32'h00004063); + assign _zz_decode_LEGAL_INSTRUCTION_4 = ((decode_INSTRUCTION & 32'h0000207f) == 32'h00002013); + assign _zz_decode_LEGAL_INSTRUCTION_5 = {((decode_INSTRUCTION & 32'h0000603f) == 32'h00000023),{((decode_INSTRUCTION & 32'h0000207f) == 32'h00000003),{((decode_INSTRUCTION & _zz_decode_LEGAL_INSTRUCTION_6) == 32'h00000003),{(_zz_decode_LEGAL_INSTRUCTION_7 == _zz_decode_LEGAL_INSTRUCTION_8),{_zz_decode_LEGAL_INSTRUCTION_9,{_zz_decode_LEGAL_INSTRUCTION_10,_zz_decode_LEGAL_INSTRUCTION_11}}}}}}; + assign _zz_decode_LEGAL_INSTRUCTION_6 = 32'h0000505f; + assign _zz_decode_LEGAL_INSTRUCTION_7 = (decode_INSTRUCTION & 32'h0000707b); + assign _zz_decode_LEGAL_INSTRUCTION_8 = 32'h00000063; + assign _zz_decode_LEGAL_INSTRUCTION_9 = ((decode_INSTRUCTION & 32'h0000607f) == 32'h0000000f); + assign _zz_decode_LEGAL_INSTRUCTION_10 = ((decode_INSTRUCTION & 32'hfc00007f) == 32'h00000033); + assign _zz_decode_LEGAL_INSTRUCTION_11 = {((decode_INSTRUCTION & 32'h01f0707f) == 32'h0000500f),{((decode_INSTRUCTION & 32'hbc00707f) == 32'h00005013),{((decode_INSTRUCTION & _zz_decode_LEGAL_INSTRUCTION_12) == 32'h00001013),{(_zz_decode_LEGAL_INSTRUCTION_13 == _zz_decode_LEGAL_INSTRUCTION_14),{_zz_decode_LEGAL_INSTRUCTION_15,{_zz_decode_LEGAL_INSTRUCTION_16,_zz_decode_LEGAL_INSTRUCTION_17}}}}}}; + assign _zz_decode_LEGAL_INSTRUCTION_12 = 32'hfc00307f; + assign _zz_decode_LEGAL_INSTRUCTION_13 = (decode_INSTRUCTION & 32'hbe00707f); + assign _zz_decode_LEGAL_INSTRUCTION_14 = 32'h00005033; + assign _zz_decode_LEGAL_INSTRUCTION_15 = ((decode_INSTRUCTION & 32'hbe00707f) == 32'h00000033); + assign _zz_decode_LEGAL_INSTRUCTION_16 = ((decode_INSTRUCTION & 32'hdfffffff) == 32'h10200073); + assign _zz_decode_LEGAL_INSTRUCTION_17 = {((decode_INSTRUCTION & 32'hffffffff) == 32'h10500073),((decode_INSTRUCTION & 32'hffffffff) == 32'h00000073)}; + assign _zz_IBusCachedPlugin_predictionJumpInterface_payload_4 = decode_INSTRUCTION[31]; + assign _zz_IBusCachedPlugin_predictionJumpInterface_payload_5 = decode_INSTRUCTION[31]; + assign _zz_IBusCachedPlugin_predictionJumpInterface_payload_6 = decode_INSTRUCTION[7]; + assign _zz__zz_decode_IS_RS2_SIGNED = (decode_INSTRUCTION & 32'h02004064); + assign _zz__zz_decode_IS_RS2_SIGNED_1 = 32'h02004020; + assign _zz__zz_decode_IS_RS2_SIGNED_2 = ((decode_INSTRUCTION & 32'h02004074) == 32'h02000030); + assign _zz__zz_decode_IS_RS2_SIGNED_3 = ((decode_INSTRUCTION & 32'h00203050) == 32'h00000050); + assign _zz__zz_decode_IS_RS2_SIGNED_4 = 1'b0; + assign _zz__zz_decode_IS_RS2_SIGNED_5 = (((decode_INSTRUCTION & _zz__zz_decode_IS_RS2_SIGNED_6) == 32'h00000050) != 1'b0); + assign _zz__zz_decode_IS_RS2_SIGNED_7 = ({_zz__zz_decode_IS_RS2_SIGNED_8,_zz__zz_decode_IS_RS2_SIGNED_9} != 2'b00); + assign _zz__zz_decode_IS_RS2_SIGNED_10 = {({_zz__zz_decode_IS_RS2_SIGNED_11,_zz__zz_decode_IS_RS2_SIGNED_12} != 2'b00),{(_zz__zz_decode_IS_RS2_SIGNED_14 != _zz__zz_decode_IS_RS2_SIGNED_16),{_zz__zz_decode_IS_RS2_SIGNED_17,{_zz__zz_decode_IS_RS2_SIGNED_20,_zz__zz_decode_IS_RS2_SIGNED_28}}}}; + assign _zz__zz_decode_IS_RS2_SIGNED_6 = 32'h00403050; + assign _zz__zz_decode_IS_RS2_SIGNED_8 = ((decode_INSTRUCTION & 32'h00001050) == 32'h00001050); + assign _zz__zz_decode_IS_RS2_SIGNED_9 = ((decode_INSTRUCTION & 32'h00002050) == 32'h00002050); + assign _zz__zz_decode_IS_RS2_SIGNED_11 = _zz_decode_IS_RS2_SIGNED_3; + assign _zz__zz_decode_IS_RS2_SIGNED_12 = ((decode_INSTRUCTION & _zz__zz_decode_IS_RS2_SIGNED_13) == 32'h00000004); + assign _zz__zz_decode_IS_RS2_SIGNED_14 = ((decode_INSTRUCTION & _zz__zz_decode_IS_RS2_SIGNED_15) == 32'h00000040); + assign _zz__zz_decode_IS_RS2_SIGNED_16 = 1'b0; + assign _zz__zz_decode_IS_RS2_SIGNED_17 = ({_zz__zz_decode_IS_RS2_SIGNED_18,_zz__zz_decode_IS_RS2_SIGNED_19} != 2'b00); + assign _zz__zz_decode_IS_RS2_SIGNED_20 = ({_zz__zz_decode_IS_RS2_SIGNED_21,_zz__zz_decode_IS_RS2_SIGNED_23} != 3'b000); + assign _zz__zz_decode_IS_RS2_SIGNED_28 = {(_zz__zz_decode_IS_RS2_SIGNED_29 != _zz__zz_decode_IS_RS2_SIGNED_31),{_zz__zz_decode_IS_RS2_SIGNED_32,{_zz__zz_decode_IS_RS2_SIGNED_35,_zz__zz_decode_IS_RS2_SIGNED_37}}}; + assign _zz__zz_decode_IS_RS2_SIGNED_13 = 32'h0000001c; + assign _zz__zz_decode_IS_RS2_SIGNED_15 = 32'h00000058; + assign _zz__zz_decode_IS_RS2_SIGNED_18 = ((decode_INSTRUCTION & 32'h00007034) == 32'h00005010); + assign _zz__zz_decode_IS_RS2_SIGNED_19 = ((decode_INSTRUCTION & 32'h02007064) == 32'h00005020); + assign _zz__zz_decode_IS_RS2_SIGNED_21 = ((decode_INSTRUCTION & _zz__zz_decode_IS_RS2_SIGNED_22) == 32'h40001010); + assign _zz__zz_decode_IS_RS2_SIGNED_23 = {(_zz__zz_decode_IS_RS2_SIGNED_24 == _zz__zz_decode_IS_RS2_SIGNED_25),(_zz__zz_decode_IS_RS2_SIGNED_26 == _zz__zz_decode_IS_RS2_SIGNED_27)}; + assign _zz__zz_decode_IS_RS2_SIGNED_29 = ((decode_INSTRUCTION & _zz__zz_decode_IS_RS2_SIGNED_30) == 32'h00000024); + assign _zz__zz_decode_IS_RS2_SIGNED_31 = 1'b0; + assign _zz__zz_decode_IS_RS2_SIGNED_32 = ((_zz__zz_decode_IS_RS2_SIGNED_33 == _zz__zz_decode_IS_RS2_SIGNED_34) != 1'b0); + assign _zz__zz_decode_IS_RS2_SIGNED_35 = (_zz__zz_decode_IS_RS2_SIGNED_36 != 1'b0); + assign _zz__zz_decode_IS_RS2_SIGNED_37 = {(_zz__zz_decode_IS_RS2_SIGNED_38 != _zz__zz_decode_IS_RS2_SIGNED_43),{_zz__zz_decode_IS_RS2_SIGNED_44,{_zz__zz_decode_IS_RS2_SIGNED_47,_zz__zz_decode_IS_RS2_SIGNED_52}}}; + assign _zz__zz_decode_IS_RS2_SIGNED_22 = 32'h40003054; + assign _zz__zz_decode_IS_RS2_SIGNED_24 = (decode_INSTRUCTION & 32'h00007034); + assign _zz__zz_decode_IS_RS2_SIGNED_25 = 32'h00001010; + assign _zz__zz_decode_IS_RS2_SIGNED_26 = (decode_INSTRUCTION & 32'h02007054); + assign _zz__zz_decode_IS_RS2_SIGNED_27 = 32'h00001010; + assign _zz__zz_decode_IS_RS2_SIGNED_30 = 32'h00000064; + assign _zz__zz_decode_IS_RS2_SIGNED_33 = (decode_INSTRUCTION & 32'h00001000); + assign _zz__zz_decode_IS_RS2_SIGNED_34 = 32'h00001000; + assign _zz__zz_decode_IS_RS2_SIGNED_36 = ((decode_INSTRUCTION & 32'h00003000) == 32'h00002000); + assign _zz__zz_decode_IS_RS2_SIGNED_38 = {(_zz__zz_decode_IS_RS2_SIGNED_39 == _zz__zz_decode_IS_RS2_SIGNED_40),(_zz__zz_decode_IS_RS2_SIGNED_41 == _zz__zz_decode_IS_RS2_SIGNED_42)}; + assign _zz__zz_decode_IS_RS2_SIGNED_43 = 2'b00; + assign _zz__zz_decode_IS_RS2_SIGNED_44 = ((_zz__zz_decode_IS_RS2_SIGNED_45 == _zz__zz_decode_IS_RS2_SIGNED_46) != 1'b0); + assign _zz__zz_decode_IS_RS2_SIGNED_47 = ({_zz__zz_decode_IS_RS2_SIGNED_48,_zz__zz_decode_IS_RS2_SIGNED_50} != 2'b00); + assign _zz__zz_decode_IS_RS2_SIGNED_52 = {(_zz__zz_decode_IS_RS2_SIGNED_53 != _zz__zz_decode_IS_RS2_SIGNED_66),{_zz__zz_decode_IS_RS2_SIGNED_67,{_zz__zz_decode_IS_RS2_SIGNED_70,_zz__zz_decode_IS_RS2_SIGNED_83}}}; + assign _zz__zz_decode_IS_RS2_SIGNED_39 = (decode_INSTRUCTION & 32'h00002010); + assign _zz__zz_decode_IS_RS2_SIGNED_40 = 32'h00002000; + assign _zz__zz_decode_IS_RS2_SIGNED_41 = (decode_INSTRUCTION & 32'h00005000); + assign _zz__zz_decode_IS_RS2_SIGNED_42 = 32'h00001000; + assign _zz__zz_decode_IS_RS2_SIGNED_45 = (decode_INSTRUCTION & 32'h00004048); + assign _zz__zz_decode_IS_RS2_SIGNED_46 = 32'h00004008; + assign _zz__zz_decode_IS_RS2_SIGNED_48 = ((decode_INSTRUCTION & _zz__zz_decode_IS_RS2_SIGNED_49) == 32'h00000020); + assign _zz__zz_decode_IS_RS2_SIGNED_50 = ((decode_INSTRUCTION & _zz__zz_decode_IS_RS2_SIGNED_51) == 32'h00000020); + assign _zz__zz_decode_IS_RS2_SIGNED_53 = {(_zz__zz_decode_IS_RS2_SIGNED_54 == _zz__zz_decode_IS_RS2_SIGNED_55),{_zz__zz_decode_IS_RS2_SIGNED_56,{_zz__zz_decode_IS_RS2_SIGNED_58,_zz__zz_decode_IS_RS2_SIGNED_61}}}; + assign _zz__zz_decode_IS_RS2_SIGNED_66 = 5'h0; + assign _zz__zz_decode_IS_RS2_SIGNED_67 = ((_zz__zz_decode_IS_RS2_SIGNED_68 == _zz__zz_decode_IS_RS2_SIGNED_69) != 1'b0); + assign _zz__zz_decode_IS_RS2_SIGNED_70 = ({_zz__zz_decode_IS_RS2_SIGNED_71,_zz__zz_decode_IS_RS2_SIGNED_74} != 5'h0); + assign _zz__zz_decode_IS_RS2_SIGNED_83 = {(_zz__zz_decode_IS_RS2_SIGNED_84 != _zz__zz_decode_IS_RS2_SIGNED_97),{_zz__zz_decode_IS_RS2_SIGNED_98,{_zz__zz_decode_IS_RS2_SIGNED_115,_zz__zz_decode_IS_RS2_SIGNED_120}}}; + assign _zz__zz_decode_IS_RS2_SIGNED_49 = 32'h00000034; + assign _zz__zz_decode_IS_RS2_SIGNED_51 = 32'h00000064; + assign _zz__zz_decode_IS_RS2_SIGNED_54 = (decode_INSTRUCTION & 32'h00002040); + assign _zz__zz_decode_IS_RS2_SIGNED_55 = 32'h00002040; + assign _zz__zz_decode_IS_RS2_SIGNED_56 = ((decode_INSTRUCTION & _zz__zz_decode_IS_RS2_SIGNED_57) == 32'h00001040); + assign _zz__zz_decode_IS_RS2_SIGNED_58 = (_zz__zz_decode_IS_RS2_SIGNED_59 == _zz__zz_decode_IS_RS2_SIGNED_60); + assign _zz__zz_decode_IS_RS2_SIGNED_61 = {_zz__zz_decode_IS_RS2_SIGNED_62,_zz__zz_decode_IS_RS2_SIGNED_64}; + assign _zz__zz_decode_IS_RS2_SIGNED_68 = (decode_INSTRUCTION & 32'h00000020); + assign _zz__zz_decode_IS_RS2_SIGNED_69 = 32'h00000020; + assign _zz__zz_decode_IS_RS2_SIGNED_71 = (_zz__zz_decode_IS_RS2_SIGNED_72 == _zz__zz_decode_IS_RS2_SIGNED_73); + assign _zz__zz_decode_IS_RS2_SIGNED_74 = {_zz_decode_IS_RS2_SIGNED_2,{_zz__zz_decode_IS_RS2_SIGNED_75,_zz__zz_decode_IS_RS2_SIGNED_78}}; + assign _zz__zz_decode_IS_RS2_SIGNED_84 = {_zz_decode_IS_RS2_SIGNED_2,{_zz__zz_decode_IS_RS2_SIGNED_85,_zz__zz_decode_IS_RS2_SIGNED_88}}; + assign _zz__zz_decode_IS_RS2_SIGNED_97 = 5'h0; + assign _zz__zz_decode_IS_RS2_SIGNED_98 = ({_zz__zz_decode_IS_RS2_SIGNED_99,_zz__zz_decode_IS_RS2_SIGNED_100} != 6'h0); + assign _zz__zz_decode_IS_RS2_SIGNED_115 = (_zz__zz_decode_IS_RS2_SIGNED_116 != _zz__zz_decode_IS_RS2_SIGNED_119); + assign _zz__zz_decode_IS_RS2_SIGNED_120 = {_zz__zz_decode_IS_RS2_SIGNED_121,{_zz__zz_decode_IS_RS2_SIGNED_126,_zz__zz_decode_IS_RS2_SIGNED_131}}; + assign _zz__zz_decode_IS_RS2_SIGNED_57 = 32'h00001040; + assign _zz__zz_decode_IS_RS2_SIGNED_59 = (decode_INSTRUCTION & 32'h00000050); + assign _zz__zz_decode_IS_RS2_SIGNED_60 = 32'h00000040; + assign _zz__zz_decode_IS_RS2_SIGNED_62 = ((decode_INSTRUCTION & _zz__zz_decode_IS_RS2_SIGNED_63) == 32'h00000040); + assign _zz__zz_decode_IS_RS2_SIGNED_64 = ((decode_INSTRUCTION & _zz__zz_decode_IS_RS2_SIGNED_65) == 32'h0); + assign _zz__zz_decode_IS_RS2_SIGNED_72 = (decode_INSTRUCTION & 32'h00000040); + assign _zz__zz_decode_IS_RS2_SIGNED_73 = 32'h00000040; + assign _zz__zz_decode_IS_RS2_SIGNED_75 = (_zz__zz_decode_IS_RS2_SIGNED_76 == _zz__zz_decode_IS_RS2_SIGNED_77); + assign _zz__zz_decode_IS_RS2_SIGNED_78 = {_zz__zz_decode_IS_RS2_SIGNED_79,_zz__zz_decode_IS_RS2_SIGNED_81}; + assign _zz__zz_decode_IS_RS2_SIGNED_85 = (_zz__zz_decode_IS_RS2_SIGNED_86 == _zz__zz_decode_IS_RS2_SIGNED_87); + assign _zz__zz_decode_IS_RS2_SIGNED_88 = {_zz__zz_decode_IS_RS2_SIGNED_89,{_zz__zz_decode_IS_RS2_SIGNED_91,_zz__zz_decode_IS_RS2_SIGNED_94}}; + assign _zz__zz_decode_IS_RS2_SIGNED_99 = _zz_decode_IS_RS2_SIGNED_3; + assign _zz__zz_decode_IS_RS2_SIGNED_100 = {_zz__zz_decode_IS_RS2_SIGNED_101,{_zz__zz_decode_IS_RS2_SIGNED_103,_zz__zz_decode_IS_RS2_SIGNED_106}}; + assign _zz__zz_decode_IS_RS2_SIGNED_116 = {_zz_decode_IS_RS2_SIGNED_2,_zz__zz_decode_IS_RS2_SIGNED_117}; + assign _zz__zz_decode_IS_RS2_SIGNED_119 = 2'b00; + assign _zz__zz_decode_IS_RS2_SIGNED_121 = ({_zz__zz_decode_IS_RS2_SIGNED_122,_zz__zz_decode_IS_RS2_SIGNED_123} != 2'b00); + assign _zz__zz_decode_IS_RS2_SIGNED_126 = (_zz__zz_decode_IS_RS2_SIGNED_127 != _zz__zz_decode_IS_RS2_SIGNED_130); + assign _zz__zz_decode_IS_RS2_SIGNED_131 = {_zz__zz_decode_IS_RS2_SIGNED_132,{_zz__zz_decode_IS_RS2_SIGNED_135,_zz__zz_decode_IS_RS2_SIGNED_146}}; + assign _zz__zz_decode_IS_RS2_SIGNED_63 = 32'h00400040; + assign _zz__zz_decode_IS_RS2_SIGNED_65 = 32'h00000038; + assign _zz__zz_decode_IS_RS2_SIGNED_76 = (decode_INSTRUCTION & 32'h00004020); + assign _zz__zz_decode_IS_RS2_SIGNED_77 = 32'h00004020; + assign _zz__zz_decode_IS_RS2_SIGNED_79 = ((decode_INSTRUCTION & _zz__zz_decode_IS_RS2_SIGNED_80) == 32'h00000010); + assign _zz__zz_decode_IS_RS2_SIGNED_81 = ((decode_INSTRUCTION & _zz__zz_decode_IS_RS2_SIGNED_82) == 32'h00000020); + assign _zz__zz_decode_IS_RS2_SIGNED_86 = (decode_INSTRUCTION & 32'h00002030); + assign _zz__zz_decode_IS_RS2_SIGNED_87 = 32'h00002010; + assign _zz__zz_decode_IS_RS2_SIGNED_89 = ((decode_INSTRUCTION & _zz__zz_decode_IS_RS2_SIGNED_90) == 32'h00000010); + assign _zz__zz_decode_IS_RS2_SIGNED_91 = (_zz__zz_decode_IS_RS2_SIGNED_92 == _zz__zz_decode_IS_RS2_SIGNED_93); + assign _zz__zz_decode_IS_RS2_SIGNED_94 = (_zz__zz_decode_IS_RS2_SIGNED_95 == _zz__zz_decode_IS_RS2_SIGNED_96); + assign _zz__zz_decode_IS_RS2_SIGNED_101 = ((decode_INSTRUCTION & _zz__zz_decode_IS_RS2_SIGNED_102) == 32'h00001010); + assign _zz__zz_decode_IS_RS2_SIGNED_103 = (_zz__zz_decode_IS_RS2_SIGNED_104 == _zz__zz_decode_IS_RS2_SIGNED_105); + assign _zz__zz_decode_IS_RS2_SIGNED_106 = {_zz__zz_decode_IS_RS2_SIGNED_107,{_zz__zz_decode_IS_RS2_SIGNED_109,_zz__zz_decode_IS_RS2_SIGNED_112}}; + assign _zz__zz_decode_IS_RS2_SIGNED_117 = ((decode_INSTRUCTION & _zz__zz_decode_IS_RS2_SIGNED_118) == 32'h00000020); + assign _zz__zz_decode_IS_RS2_SIGNED_122 = _zz_decode_IS_RS2_SIGNED_2; + assign _zz__zz_decode_IS_RS2_SIGNED_123 = (_zz__zz_decode_IS_RS2_SIGNED_124 == _zz__zz_decode_IS_RS2_SIGNED_125); + assign _zz__zz_decode_IS_RS2_SIGNED_127 = (_zz__zz_decode_IS_RS2_SIGNED_128 == _zz__zz_decode_IS_RS2_SIGNED_129); + assign _zz__zz_decode_IS_RS2_SIGNED_130 = 1'b0; + assign _zz__zz_decode_IS_RS2_SIGNED_132 = (_zz__zz_decode_IS_RS2_SIGNED_133 != 1'b0); + assign _zz__zz_decode_IS_RS2_SIGNED_135 = (_zz__zz_decode_IS_RS2_SIGNED_136 != _zz__zz_decode_IS_RS2_SIGNED_145); + assign _zz__zz_decode_IS_RS2_SIGNED_146 = {_zz__zz_decode_IS_RS2_SIGNED_147,{_zz__zz_decode_IS_RS2_SIGNED_149,_zz__zz_decode_IS_RS2_SIGNED_156}}; + assign _zz__zz_decode_IS_RS2_SIGNED_80 = 32'h00000030; + assign _zz__zz_decode_IS_RS2_SIGNED_82 = 32'h02000020; + assign _zz__zz_decode_IS_RS2_SIGNED_90 = 32'h00001030; + assign _zz__zz_decode_IS_RS2_SIGNED_92 = (decode_INSTRUCTION & 32'h02002060); + assign _zz__zz_decode_IS_RS2_SIGNED_93 = 32'h00002020; + assign _zz__zz_decode_IS_RS2_SIGNED_95 = (decode_INSTRUCTION & 32'h02003020); + assign _zz__zz_decode_IS_RS2_SIGNED_96 = 32'h00000020; + assign _zz__zz_decode_IS_RS2_SIGNED_102 = 32'h00001010; + assign _zz__zz_decode_IS_RS2_SIGNED_104 = (decode_INSTRUCTION & 32'h00002010); + assign _zz__zz_decode_IS_RS2_SIGNED_105 = 32'h00002010; + assign _zz__zz_decode_IS_RS2_SIGNED_107 = ((decode_INSTRUCTION & _zz__zz_decode_IS_RS2_SIGNED_108) == 32'h00000010); + assign _zz__zz_decode_IS_RS2_SIGNED_109 = (_zz__zz_decode_IS_RS2_SIGNED_110 == _zz__zz_decode_IS_RS2_SIGNED_111); + assign _zz__zz_decode_IS_RS2_SIGNED_112 = (_zz__zz_decode_IS_RS2_SIGNED_113 == _zz__zz_decode_IS_RS2_SIGNED_114); + assign _zz__zz_decode_IS_RS2_SIGNED_118 = 32'h00000070; + assign _zz__zz_decode_IS_RS2_SIGNED_124 = (decode_INSTRUCTION & 32'h00000020); + assign _zz__zz_decode_IS_RS2_SIGNED_125 = 32'h0; + assign _zz__zz_decode_IS_RS2_SIGNED_128 = (decode_INSTRUCTION & 32'h00004014); + assign _zz__zz_decode_IS_RS2_SIGNED_129 = 32'h00004010; + assign _zz__zz_decode_IS_RS2_SIGNED_133 = ((decode_INSTRUCTION & _zz__zz_decode_IS_RS2_SIGNED_134) == 32'h00002010); + assign _zz__zz_decode_IS_RS2_SIGNED_136 = {_zz__zz_decode_IS_RS2_SIGNED_137,{_zz__zz_decode_IS_RS2_SIGNED_138,_zz__zz_decode_IS_RS2_SIGNED_140}}; + assign _zz__zz_decode_IS_RS2_SIGNED_145 = 4'b0000; + assign _zz__zz_decode_IS_RS2_SIGNED_147 = (_zz__zz_decode_IS_RS2_SIGNED_148 != 1'b0); + assign _zz__zz_decode_IS_RS2_SIGNED_149 = (_zz__zz_decode_IS_RS2_SIGNED_150 != _zz__zz_decode_IS_RS2_SIGNED_155); + assign _zz__zz_decode_IS_RS2_SIGNED_156 = {_zz__zz_decode_IS_RS2_SIGNED_157,{_zz__zz_decode_IS_RS2_SIGNED_159,_zz__zz_decode_IS_RS2_SIGNED_162}}; + assign _zz__zz_decode_IS_RS2_SIGNED_108 = 32'h00000050; + assign _zz__zz_decode_IS_RS2_SIGNED_110 = (decode_INSTRUCTION & 32'h0000000c); + assign _zz__zz_decode_IS_RS2_SIGNED_111 = 32'h00000004; + assign _zz__zz_decode_IS_RS2_SIGNED_113 = (decode_INSTRUCTION & 32'h00000028); + assign _zz__zz_decode_IS_RS2_SIGNED_114 = 32'h0; + assign _zz__zz_decode_IS_RS2_SIGNED_134 = 32'h00006014; + assign _zz__zz_decode_IS_RS2_SIGNED_137 = ((decode_INSTRUCTION & 32'h00000044) == 32'h0); + assign _zz__zz_decode_IS_RS2_SIGNED_138 = ((decode_INSTRUCTION & _zz__zz_decode_IS_RS2_SIGNED_139) == 32'h0); + assign _zz__zz_decode_IS_RS2_SIGNED_140 = {(_zz__zz_decode_IS_RS2_SIGNED_141 == _zz__zz_decode_IS_RS2_SIGNED_142),(_zz__zz_decode_IS_RS2_SIGNED_143 == _zz__zz_decode_IS_RS2_SIGNED_144)}; + assign _zz__zz_decode_IS_RS2_SIGNED_148 = ((decode_INSTRUCTION & 32'h00000058) == 32'h0); + assign _zz__zz_decode_IS_RS2_SIGNED_150 = {(_zz__zz_decode_IS_RS2_SIGNED_151 == _zz__zz_decode_IS_RS2_SIGNED_152),{_zz__zz_decode_IS_RS2_SIGNED_153,_zz__zz_decode_IS_RS2_SIGNED_154}}; + assign _zz__zz_decode_IS_RS2_SIGNED_155 = 3'b000; + assign _zz__zz_decode_IS_RS2_SIGNED_157 = ({_zz__zz_decode_IS_RS2_SIGNED_158,_zz_decode_IS_RS2_SIGNED_1} != 2'b00); + assign _zz__zz_decode_IS_RS2_SIGNED_159 = ({_zz__zz_decode_IS_RS2_SIGNED_160,_zz__zz_decode_IS_RS2_SIGNED_161} != 2'b00); + assign _zz__zz_decode_IS_RS2_SIGNED_162 = (_zz__zz_decode_IS_RS2_SIGNED_163 != 1'b0); + assign _zz__zz_decode_IS_RS2_SIGNED_139 = 32'h00000018; + assign _zz__zz_decode_IS_RS2_SIGNED_141 = (decode_INSTRUCTION & 32'h00006004); + assign _zz__zz_decode_IS_RS2_SIGNED_142 = 32'h00002000; + assign _zz__zz_decode_IS_RS2_SIGNED_143 = (decode_INSTRUCTION & 32'h00005004); + assign _zz__zz_decode_IS_RS2_SIGNED_144 = 32'h00001000; + assign _zz__zz_decode_IS_RS2_SIGNED_151 = (decode_INSTRUCTION & 32'h00000044); + assign _zz__zz_decode_IS_RS2_SIGNED_152 = 32'h00000040; + assign _zz__zz_decode_IS_RS2_SIGNED_153 = ((decode_INSTRUCTION & 32'h00002014) == 32'h00002010); + assign _zz__zz_decode_IS_RS2_SIGNED_154 = ((decode_INSTRUCTION & 32'h40000034) == 32'h40000030); + assign _zz__zz_decode_IS_RS2_SIGNED_158 = ((decode_INSTRUCTION & 32'h00000014) == 32'h00000004); + assign _zz__zz_decode_IS_RS2_SIGNED_160 = ((decode_INSTRUCTION & 32'h00000044) == 32'h00000004); + assign _zz__zz_decode_IS_RS2_SIGNED_161 = _zz_decode_IS_RS2_SIGNED_1; + assign _zz__zz_decode_IS_RS2_SIGNED_163 = ((decode_INSTRUCTION & 32'h00005048) == 32'h00001008); + assign _zz_execute_BranchPlugin_branch_src2_6 = execute_INSTRUCTION[31]; + assign _zz_execute_BranchPlugin_branch_src2_7 = execute_INSTRUCTION[31]; + assign _zz_execute_BranchPlugin_branch_src2_8 = execute_INSTRUCTION[7]; + assign _zz_CsrPlugin_csrMapping_readDataInit_25 = 32'h0; + always @(posedge clk) begin + if(_zz_decode_RegFilePlugin_rs1Data) begin + _zz_RegFilePlugin_regFile_port0 <= RegFilePlugin_regFile[decode_RegFilePlugin_regFileReadAddress1]; + end + end + + always @(posedge clk) begin + if(_zz_decode_RegFilePlugin_rs2Data) begin + _zz_RegFilePlugin_regFile_port1 <= RegFilePlugin_regFile[decode_RegFilePlugin_regFileReadAddress2]; + end + end + + always @(posedge clk) begin + if(_zz_1) begin + RegFilePlugin_regFile[lastStageRegFileWrite_payload_address] <= lastStageRegFileWrite_payload_data; + end + end + + InstructionCache IBusCachedPlugin_cache ( + .io_flush (IBusCachedPlugin_cache_io_flush ), //i + .io_cpu_prefetch_isValid (IBusCachedPlugin_cache_io_cpu_prefetch_isValid ), //i + .io_cpu_prefetch_haltIt (IBusCachedPlugin_cache_io_cpu_prefetch_haltIt ), //o + .io_cpu_prefetch_pc (IBusCachedPlugin_iBusRsp_stages_0_input_payload ), //i + .io_cpu_fetch_isValid (IBusCachedPlugin_cache_io_cpu_fetch_isValid ), //i + .io_cpu_fetch_isStuck (IBusCachedPlugin_cache_io_cpu_fetch_isStuck ), //i + .io_cpu_fetch_isRemoved (IBusCachedPlugin_cache_io_cpu_fetch_isRemoved ), //i + .io_cpu_fetch_pc (IBusCachedPlugin_iBusRsp_stages_1_input_payload ), //i + .io_cpu_fetch_data (IBusCachedPlugin_cache_io_cpu_fetch_data ), //o + .io_cpu_fetch_mmuRsp_physicalAddress (IBusCachedPlugin_mmuBus_rsp_physicalAddress ), //i + .io_cpu_fetch_mmuRsp_isIoAccess (IBusCachedPlugin_mmuBus_rsp_isIoAccess ), //i + .io_cpu_fetch_mmuRsp_isPaging (IBusCachedPlugin_mmuBus_rsp_isPaging ), //i + .io_cpu_fetch_mmuRsp_allowRead (IBusCachedPlugin_mmuBus_rsp_allowRead ), //i + .io_cpu_fetch_mmuRsp_allowWrite (IBusCachedPlugin_mmuBus_rsp_allowWrite ), //i + .io_cpu_fetch_mmuRsp_allowExecute (IBusCachedPlugin_mmuBus_rsp_allowExecute ), //i + .io_cpu_fetch_mmuRsp_exception (IBusCachedPlugin_mmuBus_rsp_exception ), //i + .io_cpu_fetch_mmuRsp_refilling (IBusCachedPlugin_mmuBus_rsp_refilling ), //i + .io_cpu_fetch_mmuRsp_bypassTranslation (IBusCachedPlugin_mmuBus_rsp_bypassTranslation ), //i + .io_cpu_fetch_physicalAddress (IBusCachedPlugin_cache_io_cpu_fetch_physicalAddress ), //o + .io_cpu_decode_isValid (IBusCachedPlugin_cache_io_cpu_decode_isValid ), //i + .io_cpu_decode_isStuck (IBusCachedPlugin_cache_io_cpu_decode_isStuck ), //i + .io_cpu_decode_pc (IBusCachedPlugin_iBusRsp_stages_2_input_payload ), //i + .io_cpu_decode_physicalAddress (IBusCachedPlugin_cache_io_cpu_decode_physicalAddress ), //o + .io_cpu_decode_data (IBusCachedPlugin_cache_io_cpu_decode_data ), //o + .io_cpu_decode_cacheMiss (IBusCachedPlugin_cache_io_cpu_decode_cacheMiss ), //o + .io_cpu_decode_error (IBusCachedPlugin_cache_io_cpu_decode_error ), //o + .io_cpu_decode_mmuRefilling (IBusCachedPlugin_cache_io_cpu_decode_mmuRefilling ), //o + .io_cpu_decode_mmuException (IBusCachedPlugin_cache_io_cpu_decode_mmuException ), //o + .io_cpu_decode_isUser (IBusCachedPlugin_cache_io_cpu_decode_isUser ), //i + .io_cpu_fill_valid (IBusCachedPlugin_cache_io_cpu_fill_valid ), //i + .io_cpu_fill_payload (IBusCachedPlugin_cache_io_cpu_decode_physicalAddress ), //i + .io_mem_cmd_valid (IBusCachedPlugin_cache_io_mem_cmd_valid ), //o + .io_mem_cmd_ready (iBus_cmd_ready ), //i + .io_mem_cmd_payload_address (IBusCachedPlugin_cache_io_mem_cmd_payload_address ), //o + .io_mem_cmd_payload_size (IBusCachedPlugin_cache_io_mem_cmd_payload_size ), //o + .io_mem_rsp_valid (iBus_rsp_valid ), //i + .io_mem_rsp_payload_data (iBus_rsp_payload_data ), //i + .io_mem_rsp_payload_error (iBus_rsp_payload_error ), //i + .clk (clk ), //i + .reset (reset ) //i + ); + DataCache dataCache_1 ( + .io_cpu_execute_isValid (dataCache_1_io_cpu_execute_isValid ), //i + .io_cpu_execute_address (dataCache_1_io_cpu_execute_address ), //i + .io_cpu_execute_haltIt (dataCache_1_io_cpu_execute_haltIt ), //o + .io_cpu_execute_args_wr (execute_MEMORY_WR ), //i + .io_cpu_execute_args_size (execute_DBusCachedPlugin_size ), //i + .io_cpu_execute_args_totalyConsistent (execute_MEMORY_FORCE_CONSTISTENCY ), //i + .io_cpu_execute_refilling (dataCache_1_io_cpu_execute_refilling ), //o + .io_cpu_memory_isValid (dataCache_1_io_cpu_memory_isValid ), //i + .io_cpu_memory_isStuck (memory_arbitration_isStuck ), //i + .io_cpu_memory_isWrite (dataCache_1_io_cpu_memory_isWrite ), //o + .io_cpu_memory_address (dataCache_1_io_cpu_memory_address ), //i + .io_cpu_memory_mmuRsp_physicalAddress (DBusCachedPlugin_mmuBus_rsp_physicalAddress ), //i + .io_cpu_memory_mmuRsp_isIoAccess (dataCache_1_io_cpu_memory_mmuRsp_isIoAccess ), //i + .io_cpu_memory_mmuRsp_isPaging (DBusCachedPlugin_mmuBus_rsp_isPaging ), //i + .io_cpu_memory_mmuRsp_allowRead (DBusCachedPlugin_mmuBus_rsp_allowRead ), //i + .io_cpu_memory_mmuRsp_allowWrite (DBusCachedPlugin_mmuBus_rsp_allowWrite ), //i + .io_cpu_memory_mmuRsp_allowExecute (DBusCachedPlugin_mmuBus_rsp_allowExecute ), //i + .io_cpu_memory_mmuRsp_exception (DBusCachedPlugin_mmuBus_rsp_exception ), //i + .io_cpu_memory_mmuRsp_refilling (DBusCachedPlugin_mmuBus_rsp_refilling ), //i + .io_cpu_memory_mmuRsp_bypassTranslation (DBusCachedPlugin_mmuBus_rsp_bypassTranslation ), //i + .io_cpu_writeBack_isValid (dataCache_1_io_cpu_writeBack_isValid ), //i + .io_cpu_writeBack_isStuck (writeBack_arbitration_isStuck ), //i + .io_cpu_writeBack_isUser (dataCache_1_io_cpu_writeBack_isUser ), //i + .io_cpu_writeBack_haltIt (dataCache_1_io_cpu_writeBack_haltIt ), //o + .io_cpu_writeBack_isWrite (dataCache_1_io_cpu_writeBack_isWrite ), //o + .io_cpu_writeBack_storeData (dataCache_1_io_cpu_writeBack_storeData ), //i + .io_cpu_writeBack_data (dataCache_1_io_cpu_writeBack_data ), //o + .io_cpu_writeBack_address (dataCache_1_io_cpu_writeBack_address ), //i + .io_cpu_writeBack_mmuException (dataCache_1_io_cpu_writeBack_mmuException ), //o + .io_cpu_writeBack_unalignedAccess (dataCache_1_io_cpu_writeBack_unalignedAccess ), //o + .io_cpu_writeBack_accessError (dataCache_1_io_cpu_writeBack_accessError ), //o + .io_cpu_writeBack_keepMemRspData (dataCache_1_io_cpu_writeBack_keepMemRspData ), //o + .io_cpu_writeBack_fence_SW (dataCache_1_io_cpu_writeBack_fence_SW ), //i + .io_cpu_writeBack_fence_SR (dataCache_1_io_cpu_writeBack_fence_SR ), //i + .io_cpu_writeBack_fence_SO (dataCache_1_io_cpu_writeBack_fence_SO ), //i + .io_cpu_writeBack_fence_SI (dataCache_1_io_cpu_writeBack_fence_SI ), //i + .io_cpu_writeBack_fence_PW (dataCache_1_io_cpu_writeBack_fence_PW ), //i + .io_cpu_writeBack_fence_PR (dataCache_1_io_cpu_writeBack_fence_PR ), //i + .io_cpu_writeBack_fence_PO (dataCache_1_io_cpu_writeBack_fence_PO ), //i + .io_cpu_writeBack_fence_PI (dataCache_1_io_cpu_writeBack_fence_PI ), //i + .io_cpu_writeBack_fence_FM (dataCache_1_io_cpu_writeBack_fence_FM ), //i + .io_cpu_writeBack_exclusiveOk (dataCache_1_io_cpu_writeBack_exclusiveOk ), //o + .io_cpu_redo (dataCache_1_io_cpu_redo ), //o + .io_cpu_flush_valid (dataCache_1_io_cpu_flush_valid ), //i + .io_cpu_flush_ready (dataCache_1_io_cpu_flush_ready ), //o + .io_mem_cmd_valid (dataCache_1_io_mem_cmd_valid ), //o + .io_mem_cmd_ready (dataCache_1_io_mem_cmd_ready ), //i + .io_mem_cmd_payload_wr (dataCache_1_io_mem_cmd_payload_wr ), //o + .io_mem_cmd_payload_uncached (dataCache_1_io_mem_cmd_payload_uncached ), //o + .io_mem_cmd_payload_address (dataCache_1_io_mem_cmd_payload_address ), //o + .io_mem_cmd_payload_data (dataCache_1_io_mem_cmd_payload_data ), //o + .io_mem_cmd_payload_mask (dataCache_1_io_mem_cmd_payload_mask ), //o + .io_mem_cmd_payload_size (dataCache_1_io_mem_cmd_payload_size ), //o + .io_mem_cmd_payload_last (dataCache_1_io_mem_cmd_payload_last ), //o + .io_mem_rsp_valid (dBus_rsp_valid ), //i + .io_mem_rsp_payload_last (dBus_rsp_payload_last ), //i + .io_mem_rsp_payload_data (dBus_rsp_payload_data ), //i + .io_mem_rsp_payload_error (dBus_rsp_payload_error ), //i + .clk (clk ), //i + .reset (reset ) //i + ); + always @(*) begin + case(_zz_IBusCachedPlugin_jump_pcLoad_payload_6) + 2'b00 : begin + _zz_IBusCachedPlugin_jump_pcLoad_payload_5 = DBusCachedPlugin_redoBranch_payload; + end + 2'b01 : begin + _zz_IBusCachedPlugin_jump_pcLoad_payload_5 = CsrPlugin_jumpInterface_payload; + end + 2'b10 : begin + _zz_IBusCachedPlugin_jump_pcLoad_payload_5 = BranchPlugin_jumpInterface_payload; + end + default : begin + _zz_IBusCachedPlugin_jump_pcLoad_payload_5 = IBusCachedPlugin_predictionJumpInterface_payload; + end + endcase + end + + always @(*) begin + case(_zz_writeBack_DBusCachedPlugin_rspShifted_1) + 2'b00 : begin + _zz_writeBack_DBusCachedPlugin_rspShifted = writeBack_DBusCachedPlugin_rspSplits_0; + end + 2'b01 : begin + _zz_writeBack_DBusCachedPlugin_rspShifted = writeBack_DBusCachedPlugin_rspSplits_1; + end + 2'b10 : begin + _zz_writeBack_DBusCachedPlugin_rspShifted = writeBack_DBusCachedPlugin_rspSplits_2; + end + default : begin + _zz_writeBack_DBusCachedPlugin_rspShifted = writeBack_DBusCachedPlugin_rspSplits_3; + end + endcase + end + + always @(*) begin + case(_zz_writeBack_DBusCachedPlugin_rspShifted_3) + 1'b0 : begin + _zz_writeBack_DBusCachedPlugin_rspShifted_2 = writeBack_DBusCachedPlugin_rspSplits_1; + end + default : begin + _zz_writeBack_DBusCachedPlugin_rspShifted_2 = writeBack_DBusCachedPlugin_rspSplits_3; + end + endcase + end + + `ifndef SYNTHESIS + always @(*) begin + case(_zz_memory_to_writeBack_ENV_CTRL) + `EnvCtrlEnum_binary_sequential_NONE : _zz_memory_to_writeBack_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : _zz_memory_to_writeBack_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_binary_sequential_WFI : _zz_memory_to_writeBack_ENV_CTRL_string = "WFI "; + `EnvCtrlEnum_binary_sequential_ECALL : _zz_memory_to_writeBack_ENV_CTRL_string = "ECALL"; + default : _zz_memory_to_writeBack_ENV_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(_zz_memory_to_writeBack_ENV_CTRL_1) + `EnvCtrlEnum_binary_sequential_NONE : _zz_memory_to_writeBack_ENV_CTRL_1_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : _zz_memory_to_writeBack_ENV_CTRL_1_string = "XRET "; + `EnvCtrlEnum_binary_sequential_WFI : _zz_memory_to_writeBack_ENV_CTRL_1_string = "WFI "; + `EnvCtrlEnum_binary_sequential_ECALL : _zz_memory_to_writeBack_ENV_CTRL_1_string = "ECALL"; + default : _zz_memory_to_writeBack_ENV_CTRL_1_string = "?????"; + endcase + end + always @(*) begin + case(_zz_execute_to_memory_ENV_CTRL) + `EnvCtrlEnum_binary_sequential_NONE : _zz_execute_to_memory_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : _zz_execute_to_memory_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_binary_sequential_WFI : _zz_execute_to_memory_ENV_CTRL_string = "WFI "; + `EnvCtrlEnum_binary_sequential_ECALL : _zz_execute_to_memory_ENV_CTRL_string = "ECALL"; + default : _zz_execute_to_memory_ENV_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(_zz_execute_to_memory_ENV_CTRL_1) + `EnvCtrlEnum_binary_sequential_NONE : _zz_execute_to_memory_ENV_CTRL_1_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : _zz_execute_to_memory_ENV_CTRL_1_string = "XRET "; + `EnvCtrlEnum_binary_sequential_WFI : _zz_execute_to_memory_ENV_CTRL_1_string = "WFI "; + `EnvCtrlEnum_binary_sequential_ECALL : _zz_execute_to_memory_ENV_CTRL_1_string = "ECALL"; + default : _zz_execute_to_memory_ENV_CTRL_1_string = "?????"; + endcase + end + always @(*) begin + case(decode_ENV_CTRL) + `EnvCtrlEnum_binary_sequential_NONE : decode_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : decode_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_binary_sequential_WFI : decode_ENV_CTRL_string = "WFI "; + `EnvCtrlEnum_binary_sequential_ECALL : decode_ENV_CTRL_string = "ECALL"; + default : decode_ENV_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(_zz_decode_ENV_CTRL) + `EnvCtrlEnum_binary_sequential_NONE : _zz_decode_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : _zz_decode_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_binary_sequential_WFI : _zz_decode_ENV_CTRL_string = "WFI "; + `EnvCtrlEnum_binary_sequential_ECALL : _zz_decode_ENV_CTRL_string = "ECALL"; + default : _zz_decode_ENV_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(_zz_decode_to_execute_ENV_CTRL) + `EnvCtrlEnum_binary_sequential_NONE : _zz_decode_to_execute_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : _zz_decode_to_execute_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_binary_sequential_WFI : _zz_decode_to_execute_ENV_CTRL_string = "WFI "; + `EnvCtrlEnum_binary_sequential_ECALL : _zz_decode_to_execute_ENV_CTRL_string = "ECALL"; + default : _zz_decode_to_execute_ENV_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(_zz_decode_to_execute_ENV_CTRL_1) + `EnvCtrlEnum_binary_sequential_NONE : _zz_decode_to_execute_ENV_CTRL_1_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : _zz_decode_to_execute_ENV_CTRL_1_string = "XRET "; + `EnvCtrlEnum_binary_sequential_WFI : _zz_decode_to_execute_ENV_CTRL_1_string = "WFI "; + `EnvCtrlEnum_binary_sequential_ECALL : _zz_decode_to_execute_ENV_CTRL_1_string = "ECALL"; + default : _zz_decode_to_execute_ENV_CTRL_1_string = "?????"; + endcase + end + always @(*) begin + case(_zz_decode_to_execute_BRANCH_CTRL) + `BranchCtrlEnum_binary_sequential_INC : _zz_decode_to_execute_BRANCH_CTRL_string = "INC "; + `BranchCtrlEnum_binary_sequential_B : _zz_decode_to_execute_BRANCH_CTRL_string = "B "; + `BranchCtrlEnum_binary_sequential_JAL : _zz_decode_to_execute_BRANCH_CTRL_string = "JAL "; + `BranchCtrlEnum_binary_sequential_JALR : _zz_decode_to_execute_BRANCH_CTRL_string = "JALR"; + default : _zz_decode_to_execute_BRANCH_CTRL_string = "????"; + endcase + end + always @(*) begin + case(_zz_decode_to_execute_BRANCH_CTRL_1) + `BranchCtrlEnum_binary_sequential_INC : _zz_decode_to_execute_BRANCH_CTRL_1_string = "INC "; + `BranchCtrlEnum_binary_sequential_B : _zz_decode_to_execute_BRANCH_CTRL_1_string = "B "; + `BranchCtrlEnum_binary_sequential_JAL : _zz_decode_to_execute_BRANCH_CTRL_1_string = "JAL "; + `BranchCtrlEnum_binary_sequential_JALR : _zz_decode_to_execute_BRANCH_CTRL_1_string = "JALR"; + default : _zz_decode_to_execute_BRANCH_CTRL_1_string = "????"; + endcase + end + always @(*) begin + case(_zz_execute_to_memory_SHIFT_CTRL) + `ShiftCtrlEnum_binary_sequential_DISABLE_1 : _zz_execute_to_memory_SHIFT_CTRL_string = "DISABLE_1"; + `ShiftCtrlEnum_binary_sequential_SLL_1 : _zz_execute_to_memory_SHIFT_CTRL_string = "SLL_1 "; + `ShiftCtrlEnum_binary_sequential_SRL_1 : _zz_execute_to_memory_SHIFT_CTRL_string = "SRL_1 "; + `ShiftCtrlEnum_binary_sequential_SRA_1 : _zz_execute_to_memory_SHIFT_CTRL_string = "SRA_1 "; + default : _zz_execute_to_memory_SHIFT_CTRL_string = "?????????"; + endcase + end + always @(*) begin + case(_zz_execute_to_memory_SHIFT_CTRL_1) + `ShiftCtrlEnum_binary_sequential_DISABLE_1 : _zz_execute_to_memory_SHIFT_CTRL_1_string = "DISABLE_1"; + `ShiftCtrlEnum_binary_sequential_SLL_1 : _zz_execute_to_memory_SHIFT_CTRL_1_string = "SLL_1 "; + `ShiftCtrlEnum_binary_sequential_SRL_1 : _zz_execute_to_memory_SHIFT_CTRL_1_string = "SRL_1 "; + `ShiftCtrlEnum_binary_sequential_SRA_1 : _zz_execute_to_memory_SHIFT_CTRL_1_string = "SRA_1 "; + default : _zz_execute_to_memory_SHIFT_CTRL_1_string = "?????????"; + endcase + end + always @(*) begin + case(decode_SHIFT_CTRL) + `ShiftCtrlEnum_binary_sequential_DISABLE_1 : decode_SHIFT_CTRL_string = "DISABLE_1"; + `ShiftCtrlEnum_binary_sequential_SLL_1 : decode_SHIFT_CTRL_string = "SLL_1 "; + `ShiftCtrlEnum_binary_sequential_SRL_1 : decode_SHIFT_CTRL_string = "SRL_1 "; + `ShiftCtrlEnum_binary_sequential_SRA_1 : decode_SHIFT_CTRL_string = "SRA_1 "; + default : decode_SHIFT_CTRL_string = "?????????"; + endcase + end + always @(*) begin + case(_zz_decode_SHIFT_CTRL) + `ShiftCtrlEnum_binary_sequential_DISABLE_1 : _zz_decode_SHIFT_CTRL_string = "DISABLE_1"; + `ShiftCtrlEnum_binary_sequential_SLL_1 : _zz_decode_SHIFT_CTRL_string = "SLL_1 "; + `ShiftCtrlEnum_binary_sequential_SRL_1 : _zz_decode_SHIFT_CTRL_string = "SRL_1 "; + `ShiftCtrlEnum_binary_sequential_SRA_1 : _zz_decode_SHIFT_CTRL_string = "SRA_1 "; + default : _zz_decode_SHIFT_CTRL_string = "?????????"; + endcase + end + always @(*) begin + case(_zz_decode_to_execute_SHIFT_CTRL) + `ShiftCtrlEnum_binary_sequential_DISABLE_1 : _zz_decode_to_execute_SHIFT_CTRL_string = "DISABLE_1"; + `ShiftCtrlEnum_binary_sequential_SLL_1 : _zz_decode_to_execute_SHIFT_CTRL_string = "SLL_1 "; + `ShiftCtrlEnum_binary_sequential_SRL_1 : _zz_decode_to_execute_SHIFT_CTRL_string = "SRL_1 "; + `ShiftCtrlEnum_binary_sequential_SRA_1 : _zz_decode_to_execute_SHIFT_CTRL_string = "SRA_1 "; + default : _zz_decode_to_execute_SHIFT_CTRL_string = "?????????"; + endcase + end + always @(*) begin + case(_zz_decode_to_execute_SHIFT_CTRL_1) + `ShiftCtrlEnum_binary_sequential_DISABLE_1 : _zz_decode_to_execute_SHIFT_CTRL_1_string = "DISABLE_1"; + `ShiftCtrlEnum_binary_sequential_SLL_1 : _zz_decode_to_execute_SHIFT_CTRL_1_string = "SLL_1 "; + `ShiftCtrlEnum_binary_sequential_SRL_1 : _zz_decode_to_execute_SHIFT_CTRL_1_string = "SRL_1 "; + `ShiftCtrlEnum_binary_sequential_SRA_1 : _zz_decode_to_execute_SHIFT_CTRL_1_string = "SRA_1 "; + default : _zz_decode_to_execute_SHIFT_CTRL_1_string = "?????????"; + endcase + end + always @(*) begin + case(decode_ALU_BITWISE_CTRL) + `AluBitwiseCtrlEnum_binary_sequential_XOR_1 : decode_ALU_BITWISE_CTRL_string = "XOR_1"; + `AluBitwiseCtrlEnum_binary_sequential_OR_1 : decode_ALU_BITWISE_CTRL_string = "OR_1 "; + `AluBitwiseCtrlEnum_binary_sequential_AND_1 : decode_ALU_BITWISE_CTRL_string = "AND_1"; + default : decode_ALU_BITWISE_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(_zz_decode_ALU_BITWISE_CTRL) + `AluBitwiseCtrlEnum_binary_sequential_XOR_1 : _zz_decode_ALU_BITWISE_CTRL_string = "XOR_1"; + `AluBitwiseCtrlEnum_binary_sequential_OR_1 : _zz_decode_ALU_BITWISE_CTRL_string = "OR_1 "; + `AluBitwiseCtrlEnum_binary_sequential_AND_1 : _zz_decode_ALU_BITWISE_CTRL_string = "AND_1"; + default : _zz_decode_ALU_BITWISE_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(_zz_decode_to_execute_ALU_BITWISE_CTRL) + `AluBitwiseCtrlEnum_binary_sequential_XOR_1 : _zz_decode_to_execute_ALU_BITWISE_CTRL_string = "XOR_1"; + `AluBitwiseCtrlEnum_binary_sequential_OR_1 : _zz_decode_to_execute_ALU_BITWISE_CTRL_string = "OR_1 "; + `AluBitwiseCtrlEnum_binary_sequential_AND_1 : _zz_decode_to_execute_ALU_BITWISE_CTRL_string = "AND_1"; + default : _zz_decode_to_execute_ALU_BITWISE_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(_zz_decode_to_execute_ALU_BITWISE_CTRL_1) + `AluBitwiseCtrlEnum_binary_sequential_XOR_1 : _zz_decode_to_execute_ALU_BITWISE_CTRL_1_string = "XOR_1"; + `AluBitwiseCtrlEnum_binary_sequential_OR_1 : _zz_decode_to_execute_ALU_BITWISE_CTRL_1_string = "OR_1 "; + `AluBitwiseCtrlEnum_binary_sequential_AND_1 : _zz_decode_to_execute_ALU_BITWISE_CTRL_1_string = "AND_1"; + default : _zz_decode_to_execute_ALU_BITWISE_CTRL_1_string = "?????"; + endcase + end + always @(*) begin + case(decode_SRC2_CTRL) + `Src2CtrlEnum_binary_sequential_RS : decode_SRC2_CTRL_string = "RS "; + `Src2CtrlEnum_binary_sequential_IMI : decode_SRC2_CTRL_string = "IMI"; + `Src2CtrlEnum_binary_sequential_IMS : decode_SRC2_CTRL_string = "IMS"; + `Src2CtrlEnum_binary_sequential_PC : decode_SRC2_CTRL_string = "PC "; + default : decode_SRC2_CTRL_string = "???"; + endcase + end + always @(*) begin + case(_zz_decode_SRC2_CTRL) + `Src2CtrlEnum_binary_sequential_RS : _zz_decode_SRC2_CTRL_string = "RS "; + `Src2CtrlEnum_binary_sequential_IMI : _zz_decode_SRC2_CTRL_string = "IMI"; + `Src2CtrlEnum_binary_sequential_IMS : _zz_decode_SRC2_CTRL_string = "IMS"; + `Src2CtrlEnum_binary_sequential_PC : _zz_decode_SRC2_CTRL_string = "PC "; + default : _zz_decode_SRC2_CTRL_string = "???"; + endcase + end + always @(*) begin + case(_zz_decode_to_execute_SRC2_CTRL) + `Src2CtrlEnum_binary_sequential_RS : _zz_decode_to_execute_SRC2_CTRL_string = "RS "; + `Src2CtrlEnum_binary_sequential_IMI : _zz_decode_to_execute_SRC2_CTRL_string = "IMI"; + `Src2CtrlEnum_binary_sequential_IMS : _zz_decode_to_execute_SRC2_CTRL_string = "IMS"; + `Src2CtrlEnum_binary_sequential_PC : _zz_decode_to_execute_SRC2_CTRL_string = "PC "; + default : _zz_decode_to_execute_SRC2_CTRL_string = "???"; + endcase + end + always @(*) begin + case(_zz_decode_to_execute_SRC2_CTRL_1) + `Src2CtrlEnum_binary_sequential_RS : _zz_decode_to_execute_SRC2_CTRL_1_string = "RS "; + `Src2CtrlEnum_binary_sequential_IMI : _zz_decode_to_execute_SRC2_CTRL_1_string = "IMI"; + `Src2CtrlEnum_binary_sequential_IMS : _zz_decode_to_execute_SRC2_CTRL_1_string = "IMS"; + `Src2CtrlEnum_binary_sequential_PC : _zz_decode_to_execute_SRC2_CTRL_1_string = "PC "; + default : _zz_decode_to_execute_SRC2_CTRL_1_string = "???"; + endcase + end + always @(*) begin + case(decode_ALU_CTRL) + `AluCtrlEnum_binary_sequential_ADD_SUB : decode_ALU_CTRL_string = "ADD_SUB "; + `AluCtrlEnum_binary_sequential_SLT_SLTU : decode_ALU_CTRL_string = "SLT_SLTU"; + `AluCtrlEnum_binary_sequential_BITWISE : decode_ALU_CTRL_string = "BITWISE "; + default : decode_ALU_CTRL_string = "????????"; + endcase + end + always @(*) begin + case(_zz_decode_ALU_CTRL) + `AluCtrlEnum_binary_sequential_ADD_SUB : _zz_decode_ALU_CTRL_string = "ADD_SUB "; + `AluCtrlEnum_binary_sequential_SLT_SLTU : _zz_decode_ALU_CTRL_string = "SLT_SLTU"; + `AluCtrlEnum_binary_sequential_BITWISE : _zz_decode_ALU_CTRL_string = "BITWISE "; + default : _zz_decode_ALU_CTRL_string = "????????"; + endcase + end + always @(*) begin + case(_zz_decode_to_execute_ALU_CTRL) + `AluCtrlEnum_binary_sequential_ADD_SUB : _zz_decode_to_execute_ALU_CTRL_string = "ADD_SUB "; + `AluCtrlEnum_binary_sequential_SLT_SLTU : _zz_decode_to_execute_ALU_CTRL_string = "SLT_SLTU"; + `AluCtrlEnum_binary_sequential_BITWISE : _zz_decode_to_execute_ALU_CTRL_string = "BITWISE "; + default : _zz_decode_to_execute_ALU_CTRL_string = "????????"; + endcase + end + always @(*) begin + case(_zz_decode_to_execute_ALU_CTRL_1) + `AluCtrlEnum_binary_sequential_ADD_SUB : _zz_decode_to_execute_ALU_CTRL_1_string = "ADD_SUB "; + `AluCtrlEnum_binary_sequential_SLT_SLTU : _zz_decode_to_execute_ALU_CTRL_1_string = "SLT_SLTU"; + `AluCtrlEnum_binary_sequential_BITWISE : _zz_decode_to_execute_ALU_CTRL_1_string = "BITWISE "; + default : _zz_decode_to_execute_ALU_CTRL_1_string = "????????"; + endcase + end + always @(*) begin + case(decode_SRC1_CTRL) + `Src1CtrlEnum_binary_sequential_RS : decode_SRC1_CTRL_string = "RS "; + `Src1CtrlEnum_binary_sequential_IMU : decode_SRC1_CTRL_string = "IMU "; + `Src1CtrlEnum_binary_sequential_PC_INCREMENT : decode_SRC1_CTRL_string = "PC_INCREMENT"; + `Src1CtrlEnum_binary_sequential_URS1 : decode_SRC1_CTRL_string = "URS1 "; + default : decode_SRC1_CTRL_string = "????????????"; + endcase + end + always @(*) begin + case(_zz_decode_SRC1_CTRL) + `Src1CtrlEnum_binary_sequential_RS : _zz_decode_SRC1_CTRL_string = "RS "; + `Src1CtrlEnum_binary_sequential_IMU : _zz_decode_SRC1_CTRL_string = "IMU "; + `Src1CtrlEnum_binary_sequential_PC_INCREMENT : _zz_decode_SRC1_CTRL_string = "PC_INCREMENT"; + `Src1CtrlEnum_binary_sequential_URS1 : _zz_decode_SRC1_CTRL_string = "URS1 "; + default : _zz_decode_SRC1_CTRL_string = "????????????"; + endcase + end + always @(*) begin + case(_zz_decode_to_execute_SRC1_CTRL) + `Src1CtrlEnum_binary_sequential_RS : _zz_decode_to_execute_SRC1_CTRL_string = "RS "; + `Src1CtrlEnum_binary_sequential_IMU : _zz_decode_to_execute_SRC1_CTRL_string = "IMU "; + `Src1CtrlEnum_binary_sequential_PC_INCREMENT : _zz_decode_to_execute_SRC1_CTRL_string = "PC_INCREMENT"; + `Src1CtrlEnum_binary_sequential_URS1 : _zz_decode_to_execute_SRC1_CTRL_string = "URS1 "; + default : _zz_decode_to_execute_SRC1_CTRL_string = "????????????"; + endcase + end + always @(*) begin + case(_zz_decode_to_execute_SRC1_CTRL_1) + `Src1CtrlEnum_binary_sequential_RS : _zz_decode_to_execute_SRC1_CTRL_1_string = "RS "; + `Src1CtrlEnum_binary_sequential_IMU : _zz_decode_to_execute_SRC1_CTRL_1_string = "IMU "; + `Src1CtrlEnum_binary_sequential_PC_INCREMENT : _zz_decode_to_execute_SRC1_CTRL_1_string = "PC_INCREMENT"; + `Src1CtrlEnum_binary_sequential_URS1 : _zz_decode_to_execute_SRC1_CTRL_1_string = "URS1 "; + default : _zz_decode_to_execute_SRC1_CTRL_1_string = "????????????"; + endcase + end + always @(*) begin + case(memory_ENV_CTRL) + `EnvCtrlEnum_binary_sequential_NONE : memory_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : memory_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_binary_sequential_WFI : memory_ENV_CTRL_string = "WFI "; + `EnvCtrlEnum_binary_sequential_ECALL : memory_ENV_CTRL_string = "ECALL"; + default : memory_ENV_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(_zz_memory_ENV_CTRL) + `EnvCtrlEnum_binary_sequential_NONE : _zz_memory_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : _zz_memory_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_binary_sequential_WFI : _zz_memory_ENV_CTRL_string = "WFI "; + `EnvCtrlEnum_binary_sequential_ECALL : _zz_memory_ENV_CTRL_string = "ECALL"; + default : _zz_memory_ENV_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(execute_ENV_CTRL) + `EnvCtrlEnum_binary_sequential_NONE : execute_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : execute_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_binary_sequential_WFI : execute_ENV_CTRL_string = "WFI "; + `EnvCtrlEnum_binary_sequential_ECALL : execute_ENV_CTRL_string = "ECALL"; + default : execute_ENV_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(_zz_execute_ENV_CTRL) + `EnvCtrlEnum_binary_sequential_NONE : _zz_execute_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : _zz_execute_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_binary_sequential_WFI : _zz_execute_ENV_CTRL_string = "WFI "; + `EnvCtrlEnum_binary_sequential_ECALL : _zz_execute_ENV_CTRL_string = "ECALL"; + default : _zz_execute_ENV_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(writeBack_ENV_CTRL) + `EnvCtrlEnum_binary_sequential_NONE : writeBack_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : writeBack_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_binary_sequential_WFI : writeBack_ENV_CTRL_string = "WFI "; + `EnvCtrlEnum_binary_sequential_ECALL : writeBack_ENV_CTRL_string = "ECALL"; + default : writeBack_ENV_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(_zz_writeBack_ENV_CTRL) + `EnvCtrlEnum_binary_sequential_NONE : _zz_writeBack_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : _zz_writeBack_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_binary_sequential_WFI : _zz_writeBack_ENV_CTRL_string = "WFI "; + `EnvCtrlEnum_binary_sequential_ECALL : _zz_writeBack_ENV_CTRL_string = "ECALL"; + default : _zz_writeBack_ENV_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(execute_BRANCH_CTRL) + `BranchCtrlEnum_binary_sequential_INC : execute_BRANCH_CTRL_string = "INC "; + `BranchCtrlEnum_binary_sequential_B : execute_BRANCH_CTRL_string = "B "; + `BranchCtrlEnum_binary_sequential_JAL : execute_BRANCH_CTRL_string = "JAL "; + `BranchCtrlEnum_binary_sequential_JALR : execute_BRANCH_CTRL_string = "JALR"; + default : execute_BRANCH_CTRL_string = "????"; + endcase + end + always @(*) begin + case(_zz_execute_BRANCH_CTRL) + `BranchCtrlEnum_binary_sequential_INC : _zz_execute_BRANCH_CTRL_string = "INC "; + `BranchCtrlEnum_binary_sequential_B : _zz_execute_BRANCH_CTRL_string = "B "; + `BranchCtrlEnum_binary_sequential_JAL : _zz_execute_BRANCH_CTRL_string = "JAL "; + `BranchCtrlEnum_binary_sequential_JALR : _zz_execute_BRANCH_CTRL_string = "JALR"; + default : _zz_execute_BRANCH_CTRL_string = "????"; + endcase + end + always @(*) begin + case(memory_SHIFT_CTRL) + `ShiftCtrlEnum_binary_sequential_DISABLE_1 : memory_SHIFT_CTRL_string = "DISABLE_1"; + `ShiftCtrlEnum_binary_sequential_SLL_1 : memory_SHIFT_CTRL_string = "SLL_1 "; + `ShiftCtrlEnum_binary_sequential_SRL_1 : memory_SHIFT_CTRL_string = "SRL_1 "; + `ShiftCtrlEnum_binary_sequential_SRA_1 : memory_SHIFT_CTRL_string = "SRA_1 "; + default : memory_SHIFT_CTRL_string = "?????????"; + endcase + end + always @(*) begin + case(_zz_memory_SHIFT_CTRL) + `ShiftCtrlEnum_binary_sequential_DISABLE_1 : _zz_memory_SHIFT_CTRL_string = "DISABLE_1"; + `ShiftCtrlEnum_binary_sequential_SLL_1 : _zz_memory_SHIFT_CTRL_string = "SLL_1 "; + `ShiftCtrlEnum_binary_sequential_SRL_1 : _zz_memory_SHIFT_CTRL_string = "SRL_1 "; + `ShiftCtrlEnum_binary_sequential_SRA_1 : _zz_memory_SHIFT_CTRL_string = "SRA_1 "; + default : _zz_memory_SHIFT_CTRL_string = "?????????"; + endcase + end + always @(*) begin + case(execute_SHIFT_CTRL) + `ShiftCtrlEnum_binary_sequential_DISABLE_1 : execute_SHIFT_CTRL_string = "DISABLE_1"; + `ShiftCtrlEnum_binary_sequential_SLL_1 : execute_SHIFT_CTRL_string = "SLL_1 "; + `ShiftCtrlEnum_binary_sequential_SRL_1 : execute_SHIFT_CTRL_string = "SRL_1 "; + `ShiftCtrlEnum_binary_sequential_SRA_1 : execute_SHIFT_CTRL_string = "SRA_1 "; + default : execute_SHIFT_CTRL_string = "?????????"; + endcase + end + always @(*) begin + case(_zz_execute_SHIFT_CTRL) + `ShiftCtrlEnum_binary_sequential_DISABLE_1 : _zz_execute_SHIFT_CTRL_string = "DISABLE_1"; + `ShiftCtrlEnum_binary_sequential_SLL_1 : _zz_execute_SHIFT_CTRL_string = "SLL_1 "; + `ShiftCtrlEnum_binary_sequential_SRL_1 : _zz_execute_SHIFT_CTRL_string = "SRL_1 "; + `ShiftCtrlEnum_binary_sequential_SRA_1 : _zz_execute_SHIFT_CTRL_string = "SRA_1 "; + default : _zz_execute_SHIFT_CTRL_string = "?????????"; + endcase + end + always @(*) begin + case(execute_SRC2_CTRL) + `Src2CtrlEnum_binary_sequential_RS : execute_SRC2_CTRL_string = "RS "; + `Src2CtrlEnum_binary_sequential_IMI : execute_SRC2_CTRL_string = "IMI"; + `Src2CtrlEnum_binary_sequential_IMS : execute_SRC2_CTRL_string = "IMS"; + `Src2CtrlEnum_binary_sequential_PC : execute_SRC2_CTRL_string = "PC "; + default : execute_SRC2_CTRL_string = "???"; + endcase + end + always @(*) begin + case(_zz_execute_SRC2_CTRL) + `Src2CtrlEnum_binary_sequential_RS : _zz_execute_SRC2_CTRL_string = "RS "; + `Src2CtrlEnum_binary_sequential_IMI : _zz_execute_SRC2_CTRL_string = "IMI"; + `Src2CtrlEnum_binary_sequential_IMS : _zz_execute_SRC2_CTRL_string = "IMS"; + `Src2CtrlEnum_binary_sequential_PC : _zz_execute_SRC2_CTRL_string = "PC "; + default : _zz_execute_SRC2_CTRL_string = "???"; + endcase + end + always @(*) begin + case(execute_SRC1_CTRL) + `Src1CtrlEnum_binary_sequential_RS : execute_SRC1_CTRL_string = "RS "; + `Src1CtrlEnum_binary_sequential_IMU : execute_SRC1_CTRL_string = "IMU "; + `Src1CtrlEnum_binary_sequential_PC_INCREMENT : execute_SRC1_CTRL_string = "PC_INCREMENT"; + `Src1CtrlEnum_binary_sequential_URS1 : execute_SRC1_CTRL_string = "URS1 "; + default : execute_SRC1_CTRL_string = "????????????"; + endcase + end + always @(*) begin + case(_zz_execute_SRC1_CTRL) + `Src1CtrlEnum_binary_sequential_RS : _zz_execute_SRC1_CTRL_string = "RS "; + `Src1CtrlEnum_binary_sequential_IMU : _zz_execute_SRC1_CTRL_string = "IMU "; + `Src1CtrlEnum_binary_sequential_PC_INCREMENT : _zz_execute_SRC1_CTRL_string = "PC_INCREMENT"; + `Src1CtrlEnum_binary_sequential_URS1 : _zz_execute_SRC1_CTRL_string = "URS1 "; + default : _zz_execute_SRC1_CTRL_string = "????????????"; + endcase + end + always @(*) begin + case(execute_ALU_CTRL) + `AluCtrlEnum_binary_sequential_ADD_SUB : execute_ALU_CTRL_string = "ADD_SUB "; + `AluCtrlEnum_binary_sequential_SLT_SLTU : execute_ALU_CTRL_string = "SLT_SLTU"; + `AluCtrlEnum_binary_sequential_BITWISE : execute_ALU_CTRL_string = "BITWISE "; + default : execute_ALU_CTRL_string = "????????"; + endcase + end + always @(*) begin + case(_zz_execute_ALU_CTRL) + `AluCtrlEnum_binary_sequential_ADD_SUB : _zz_execute_ALU_CTRL_string = "ADD_SUB "; + `AluCtrlEnum_binary_sequential_SLT_SLTU : _zz_execute_ALU_CTRL_string = "SLT_SLTU"; + `AluCtrlEnum_binary_sequential_BITWISE : _zz_execute_ALU_CTRL_string = "BITWISE "; + default : _zz_execute_ALU_CTRL_string = "????????"; + endcase + end + always @(*) begin + case(execute_ALU_BITWISE_CTRL) + `AluBitwiseCtrlEnum_binary_sequential_XOR_1 : execute_ALU_BITWISE_CTRL_string = "XOR_1"; + `AluBitwiseCtrlEnum_binary_sequential_OR_1 : execute_ALU_BITWISE_CTRL_string = "OR_1 "; + `AluBitwiseCtrlEnum_binary_sequential_AND_1 : execute_ALU_BITWISE_CTRL_string = "AND_1"; + default : execute_ALU_BITWISE_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(_zz_execute_ALU_BITWISE_CTRL) + `AluBitwiseCtrlEnum_binary_sequential_XOR_1 : _zz_execute_ALU_BITWISE_CTRL_string = "XOR_1"; + `AluBitwiseCtrlEnum_binary_sequential_OR_1 : _zz_execute_ALU_BITWISE_CTRL_string = "OR_1 "; + `AluBitwiseCtrlEnum_binary_sequential_AND_1 : _zz_execute_ALU_BITWISE_CTRL_string = "AND_1"; + default : _zz_execute_ALU_BITWISE_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(_zz_decode_ENV_CTRL_1) + `EnvCtrlEnum_binary_sequential_NONE : _zz_decode_ENV_CTRL_1_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : _zz_decode_ENV_CTRL_1_string = "XRET "; + `EnvCtrlEnum_binary_sequential_WFI : _zz_decode_ENV_CTRL_1_string = "WFI "; + `EnvCtrlEnum_binary_sequential_ECALL : _zz_decode_ENV_CTRL_1_string = "ECALL"; + default : _zz_decode_ENV_CTRL_1_string = "?????"; + endcase + end + always @(*) begin + case(_zz_decode_BRANCH_CTRL) + `BranchCtrlEnum_binary_sequential_INC : _zz_decode_BRANCH_CTRL_string = "INC "; + `BranchCtrlEnum_binary_sequential_B : _zz_decode_BRANCH_CTRL_string = "B "; + `BranchCtrlEnum_binary_sequential_JAL : _zz_decode_BRANCH_CTRL_string = "JAL "; + `BranchCtrlEnum_binary_sequential_JALR : _zz_decode_BRANCH_CTRL_string = "JALR"; + default : _zz_decode_BRANCH_CTRL_string = "????"; + endcase + end + always @(*) begin + case(_zz_decode_SHIFT_CTRL_1) + `ShiftCtrlEnum_binary_sequential_DISABLE_1 : _zz_decode_SHIFT_CTRL_1_string = "DISABLE_1"; + `ShiftCtrlEnum_binary_sequential_SLL_1 : _zz_decode_SHIFT_CTRL_1_string = "SLL_1 "; + `ShiftCtrlEnum_binary_sequential_SRL_1 : _zz_decode_SHIFT_CTRL_1_string = "SRL_1 "; + `ShiftCtrlEnum_binary_sequential_SRA_1 : _zz_decode_SHIFT_CTRL_1_string = "SRA_1 "; + default : _zz_decode_SHIFT_CTRL_1_string = "?????????"; + endcase + end + always @(*) begin + case(_zz_decode_ALU_BITWISE_CTRL_1) + `AluBitwiseCtrlEnum_binary_sequential_XOR_1 : _zz_decode_ALU_BITWISE_CTRL_1_string = "XOR_1"; + `AluBitwiseCtrlEnum_binary_sequential_OR_1 : _zz_decode_ALU_BITWISE_CTRL_1_string = "OR_1 "; + `AluBitwiseCtrlEnum_binary_sequential_AND_1 : _zz_decode_ALU_BITWISE_CTRL_1_string = "AND_1"; + default : _zz_decode_ALU_BITWISE_CTRL_1_string = "?????"; + endcase + end + always @(*) begin + case(_zz_decode_SRC2_CTRL_1) + `Src2CtrlEnum_binary_sequential_RS : _zz_decode_SRC2_CTRL_1_string = "RS "; + `Src2CtrlEnum_binary_sequential_IMI : _zz_decode_SRC2_CTRL_1_string = "IMI"; + `Src2CtrlEnum_binary_sequential_IMS : _zz_decode_SRC2_CTRL_1_string = "IMS"; + `Src2CtrlEnum_binary_sequential_PC : _zz_decode_SRC2_CTRL_1_string = "PC "; + default : _zz_decode_SRC2_CTRL_1_string = "???"; + endcase + end + always @(*) begin + case(_zz_decode_ALU_CTRL_1) + `AluCtrlEnum_binary_sequential_ADD_SUB : _zz_decode_ALU_CTRL_1_string = "ADD_SUB "; + `AluCtrlEnum_binary_sequential_SLT_SLTU : _zz_decode_ALU_CTRL_1_string = "SLT_SLTU"; + `AluCtrlEnum_binary_sequential_BITWISE : _zz_decode_ALU_CTRL_1_string = "BITWISE "; + default : _zz_decode_ALU_CTRL_1_string = "????????"; + endcase + end + always @(*) begin + case(_zz_decode_SRC1_CTRL_1) + `Src1CtrlEnum_binary_sequential_RS : _zz_decode_SRC1_CTRL_1_string = "RS "; + `Src1CtrlEnum_binary_sequential_IMU : _zz_decode_SRC1_CTRL_1_string = "IMU "; + `Src1CtrlEnum_binary_sequential_PC_INCREMENT : _zz_decode_SRC1_CTRL_1_string = "PC_INCREMENT"; + `Src1CtrlEnum_binary_sequential_URS1 : _zz_decode_SRC1_CTRL_1_string = "URS1 "; + default : _zz_decode_SRC1_CTRL_1_string = "????????????"; + endcase + end + always @(*) begin + case(decode_BRANCH_CTRL) + `BranchCtrlEnum_binary_sequential_INC : decode_BRANCH_CTRL_string = "INC "; + `BranchCtrlEnum_binary_sequential_B : decode_BRANCH_CTRL_string = "B "; + `BranchCtrlEnum_binary_sequential_JAL : decode_BRANCH_CTRL_string = "JAL "; + `BranchCtrlEnum_binary_sequential_JALR : decode_BRANCH_CTRL_string = "JALR"; + default : decode_BRANCH_CTRL_string = "????"; + endcase + end + always @(*) begin + case(_zz_decode_BRANCH_CTRL_1) + `BranchCtrlEnum_binary_sequential_INC : _zz_decode_BRANCH_CTRL_1_string = "INC "; + `BranchCtrlEnum_binary_sequential_B : _zz_decode_BRANCH_CTRL_1_string = "B "; + `BranchCtrlEnum_binary_sequential_JAL : _zz_decode_BRANCH_CTRL_1_string = "JAL "; + `BranchCtrlEnum_binary_sequential_JALR : _zz_decode_BRANCH_CTRL_1_string = "JALR"; + default : _zz_decode_BRANCH_CTRL_1_string = "????"; + endcase + end + always @(*) begin + case(_zz_decode_SRC1_CTRL_2) + `Src1CtrlEnum_binary_sequential_RS : _zz_decode_SRC1_CTRL_2_string = "RS "; + `Src1CtrlEnum_binary_sequential_IMU : _zz_decode_SRC1_CTRL_2_string = "IMU "; + `Src1CtrlEnum_binary_sequential_PC_INCREMENT : _zz_decode_SRC1_CTRL_2_string = "PC_INCREMENT"; + `Src1CtrlEnum_binary_sequential_URS1 : _zz_decode_SRC1_CTRL_2_string = "URS1 "; + default : _zz_decode_SRC1_CTRL_2_string = "????????????"; + endcase + end + always @(*) begin + case(_zz_decode_ALU_CTRL_2) + `AluCtrlEnum_binary_sequential_ADD_SUB : _zz_decode_ALU_CTRL_2_string = "ADD_SUB "; + `AluCtrlEnum_binary_sequential_SLT_SLTU : _zz_decode_ALU_CTRL_2_string = "SLT_SLTU"; + `AluCtrlEnum_binary_sequential_BITWISE : _zz_decode_ALU_CTRL_2_string = "BITWISE "; + default : _zz_decode_ALU_CTRL_2_string = "????????"; + endcase + end + always @(*) begin + case(_zz_decode_SRC2_CTRL_2) + `Src2CtrlEnum_binary_sequential_RS : _zz_decode_SRC2_CTRL_2_string = "RS "; + `Src2CtrlEnum_binary_sequential_IMI : _zz_decode_SRC2_CTRL_2_string = "IMI"; + `Src2CtrlEnum_binary_sequential_IMS : _zz_decode_SRC2_CTRL_2_string = "IMS"; + `Src2CtrlEnum_binary_sequential_PC : _zz_decode_SRC2_CTRL_2_string = "PC "; + default : _zz_decode_SRC2_CTRL_2_string = "???"; + endcase + end + always @(*) begin + case(_zz_decode_ALU_BITWISE_CTRL_2) + `AluBitwiseCtrlEnum_binary_sequential_XOR_1 : _zz_decode_ALU_BITWISE_CTRL_2_string = "XOR_1"; + `AluBitwiseCtrlEnum_binary_sequential_OR_1 : _zz_decode_ALU_BITWISE_CTRL_2_string = "OR_1 "; + `AluBitwiseCtrlEnum_binary_sequential_AND_1 : _zz_decode_ALU_BITWISE_CTRL_2_string = "AND_1"; + default : _zz_decode_ALU_BITWISE_CTRL_2_string = "?????"; + endcase + end + always @(*) begin + case(_zz_decode_SHIFT_CTRL_2) + `ShiftCtrlEnum_binary_sequential_DISABLE_1 : _zz_decode_SHIFT_CTRL_2_string = "DISABLE_1"; + `ShiftCtrlEnum_binary_sequential_SLL_1 : _zz_decode_SHIFT_CTRL_2_string = "SLL_1 "; + `ShiftCtrlEnum_binary_sequential_SRL_1 : _zz_decode_SHIFT_CTRL_2_string = "SRL_1 "; + `ShiftCtrlEnum_binary_sequential_SRA_1 : _zz_decode_SHIFT_CTRL_2_string = "SRA_1 "; + default : _zz_decode_SHIFT_CTRL_2_string = "?????????"; + endcase + end + always @(*) begin + case(_zz_decode_BRANCH_CTRL_2) + `BranchCtrlEnum_binary_sequential_INC : _zz_decode_BRANCH_CTRL_2_string = "INC "; + `BranchCtrlEnum_binary_sequential_B : _zz_decode_BRANCH_CTRL_2_string = "B "; + `BranchCtrlEnum_binary_sequential_JAL : _zz_decode_BRANCH_CTRL_2_string = "JAL "; + `BranchCtrlEnum_binary_sequential_JALR : _zz_decode_BRANCH_CTRL_2_string = "JALR"; + default : _zz_decode_BRANCH_CTRL_2_string = "????"; + endcase + end + always @(*) begin + case(_zz_decode_ENV_CTRL_2) + `EnvCtrlEnum_binary_sequential_NONE : _zz_decode_ENV_CTRL_2_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : _zz_decode_ENV_CTRL_2_string = "XRET "; + `EnvCtrlEnum_binary_sequential_WFI : _zz_decode_ENV_CTRL_2_string = "WFI "; + `EnvCtrlEnum_binary_sequential_ECALL : _zz_decode_ENV_CTRL_2_string = "ECALL"; + default : _zz_decode_ENV_CTRL_2_string = "?????"; + endcase + end + always @(*) begin + case(decode_to_execute_SRC1_CTRL) + `Src1CtrlEnum_binary_sequential_RS : decode_to_execute_SRC1_CTRL_string = "RS "; + `Src1CtrlEnum_binary_sequential_IMU : decode_to_execute_SRC1_CTRL_string = "IMU "; + `Src1CtrlEnum_binary_sequential_PC_INCREMENT : decode_to_execute_SRC1_CTRL_string = "PC_INCREMENT"; + `Src1CtrlEnum_binary_sequential_URS1 : decode_to_execute_SRC1_CTRL_string = "URS1 "; + default : decode_to_execute_SRC1_CTRL_string = "????????????"; + endcase + end + always @(*) begin + case(decode_to_execute_ALU_CTRL) + `AluCtrlEnum_binary_sequential_ADD_SUB : decode_to_execute_ALU_CTRL_string = "ADD_SUB "; + `AluCtrlEnum_binary_sequential_SLT_SLTU : decode_to_execute_ALU_CTRL_string = "SLT_SLTU"; + `AluCtrlEnum_binary_sequential_BITWISE : decode_to_execute_ALU_CTRL_string = "BITWISE "; + default : decode_to_execute_ALU_CTRL_string = "????????"; + endcase + end + always @(*) begin + case(decode_to_execute_SRC2_CTRL) + `Src2CtrlEnum_binary_sequential_RS : decode_to_execute_SRC2_CTRL_string = "RS "; + `Src2CtrlEnum_binary_sequential_IMI : decode_to_execute_SRC2_CTRL_string = "IMI"; + `Src2CtrlEnum_binary_sequential_IMS : decode_to_execute_SRC2_CTRL_string = "IMS"; + `Src2CtrlEnum_binary_sequential_PC : decode_to_execute_SRC2_CTRL_string = "PC "; + default : decode_to_execute_SRC2_CTRL_string = "???"; + endcase + end + always @(*) begin + case(decode_to_execute_ALU_BITWISE_CTRL) + `AluBitwiseCtrlEnum_binary_sequential_XOR_1 : decode_to_execute_ALU_BITWISE_CTRL_string = "XOR_1"; + `AluBitwiseCtrlEnum_binary_sequential_OR_1 : decode_to_execute_ALU_BITWISE_CTRL_string = "OR_1 "; + `AluBitwiseCtrlEnum_binary_sequential_AND_1 : decode_to_execute_ALU_BITWISE_CTRL_string = "AND_1"; + default : decode_to_execute_ALU_BITWISE_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(decode_to_execute_SHIFT_CTRL) + `ShiftCtrlEnum_binary_sequential_DISABLE_1 : decode_to_execute_SHIFT_CTRL_string = "DISABLE_1"; + `ShiftCtrlEnum_binary_sequential_SLL_1 : decode_to_execute_SHIFT_CTRL_string = "SLL_1 "; + `ShiftCtrlEnum_binary_sequential_SRL_1 : decode_to_execute_SHIFT_CTRL_string = "SRL_1 "; + `ShiftCtrlEnum_binary_sequential_SRA_1 : decode_to_execute_SHIFT_CTRL_string = "SRA_1 "; + default : decode_to_execute_SHIFT_CTRL_string = "?????????"; + endcase + end + always @(*) begin + case(execute_to_memory_SHIFT_CTRL) + `ShiftCtrlEnum_binary_sequential_DISABLE_1 : execute_to_memory_SHIFT_CTRL_string = "DISABLE_1"; + `ShiftCtrlEnum_binary_sequential_SLL_1 : execute_to_memory_SHIFT_CTRL_string = "SLL_1 "; + `ShiftCtrlEnum_binary_sequential_SRL_1 : execute_to_memory_SHIFT_CTRL_string = "SRL_1 "; + `ShiftCtrlEnum_binary_sequential_SRA_1 : execute_to_memory_SHIFT_CTRL_string = "SRA_1 "; + default : execute_to_memory_SHIFT_CTRL_string = "?????????"; + endcase + end + always @(*) begin + case(decode_to_execute_BRANCH_CTRL) + `BranchCtrlEnum_binary_sequential_INC : decode_to_execute_BRANCH_CTRL_string = "INC "; + `BranchCtrlEnum_binary_sequential_B : decode_to_execute_BRANCH_CTRL_string = "B "; + `BranchCtrlEnum_binary_sequential_JAL : decode_to_execute_BRANCH_CTRL_string = "JAL "; + `BranchCtrlEnum_binary_sequential_JALR : decode_to_execute_BRANCH_CTRL_string = "JALR"; + default : decode_to_execute_BRANCH_CTRL_string = "????"; + endcase + end + always @(*) begin + case(decode_to_execute_ENV_CTRL) + `EnvCtrlEnum_binary_sequential_NONE : decode_to_execute_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : decode_to_execute_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_binary_sequential_WFI : decode_to_execute_ENV_CTRL_string = "WFI "; + `EnvCtrlEnum_binary_sequential_ECALL : decode_to_execute_ENV_CTRL_string = "ECALL"; + default : decode_to_execute_ENV_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(execute_to_memory_ENV_CTRL) + `EnvCtrlEnum_binary_sequential_NONE : execute_to_memory_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : execute_to_memory_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_binary_sequential_WFI : execute_to_memory_ENV_CTRL_string = "WFI "; + `EnvCtrlEnum_binary_sequential_ECALL : execute_to_memory_ENV_CTRL_string = "ECALL"; + default : execute_to_memory_ENV_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(memory_to_writeBack_ENV_CTRL) + `EnvCtrlEnum_binary_sequential_NONE : memory_to_writeBack_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : memory_to_writeBack_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_binary_sequential_WFI : memory_to_writeBack_ENV_CTRL_string = "WFI "; + `EnvCtrlEnum_binary_sequential_ECALL : memory_to_writeBack_ENV_CTRL_string = "ECALL"; + default : memory_to_writeBack_ENV_CTRL_string = "?????"; + endcase + end + `endif + + assign memory_MUL_LOW = ($signed(_zz_memory_MUL_LOW) + $signed(_zz_memory_MUL_LOW_7)); + assign memory_MUL_HH = execute_to_memory_MUL_HH; + assign execute_MUL_HH = ($signed(execute_MulPlugin_aHigh) * $signed(execute_MulPlugin_bHigh)); + assign execute_MUL_HL = ($signed(execute_MulPlugin_aHigh) * $signed(execute_MulPlugin_bSLow)); + assign execute_MUL_LH = ($signed(execute_MulPlugin_aSLow) * $signed(execute_MulPlugin_bHigh)); + assign execute_MUL_LL = (execute_MulPlugin_aULow * execute_MulPlugin_bULow); + assign execute_BRANCH_CALC = {execute_BranchPlugin_branchAdder[31 : 1],1'b0}; + assign execute_BRANCH_DO = ((execute_PREDICTION_HAD_BRANCHED2 != execute_BRANCH_COND_RESULT) || execute_BranchPlugin_missAlignedTarget); + assign execute_SHIFT_RIGHT = _zz_execute_SHIFT_RIGHT; + assign execute_REGFILE_WRITE_DATA = _zz_execute_REGFILE_WRITE_DATA; + assign memory_MEMORY_STORE_DATA_RF = execute_to_memory_MEMORY_STORE_DATA_RF; + assign execute_MEMORY_STORE_DATA_RF = _zz_execute_MEMORY_STORE_DATA_RF; + assign decode_CSR_READ_OPCODE = (decode_INSTRUCTION[13 : 7] != 7'h20); + assign decode_CSR_WRITE_OPCODE = (! (((decode_INSTRUCTION[14 : 13] == 2'b01) && (decode_INSTRUCTION[19 : 15] == 5'h0)) || ((decode_INSTRUCTION[14 : 13] == 2'b11) && (decode_INSTRUCTION[19 : 15] == 5'h0)))); + assign decode_PREDICTION_HAD_BRANCHED2 = IBusCachedPlugin_decodePrediction_cmd_hadBranch; + assign decode_SRC2_FORCE_ZERO = (decode_SRC_ADD_ZERO && (! decode_SRC_USE_SUB_LESS)); + assign decode_IS_RS2_SIGNED = _zz_decode_IS_RS2_SIGNED[31]; + assign decode_IS_RS1_SIGNED = _zz_decode_IS_RS2_SIGNED[30]; + assign decode_IS_DIV = _zz_decode_IS_RS2_SIGNED[29]; + assign memory_IS_MUL = execute_to_memory_IS_MUL; + assign execute_IS_MUL = decode_to_execute_IS_MUL; + assign decode_IS_MUL = _zz_decode_IS_RS2_SIGNED[28]; + assign _zz_memory_to_writeBack_ENV_CTRL = _zz_memory_to_writeBack_ENV_CTRL_1; + assign _zz_execute_to_memory_ENV_CTRL = _zz_execute_to_memory_ENV_CTRL_1; + assign decode_ENV_CTRL = _zz_decode_ENV_CTRL; + assign _zz_decode_to_execute_ENV_CTRL = _zz_decode_to_execute_ENV_CTRL_1; + assign decode_IS_CSR = _zz_decode_IS_RS2_SIGNED[25]; + assign _zz_decode_to_execute_BRANCH_CTRL = _zz_decode_to_execute_BRANCH_CTRL_1; + assign _zz_execute_to_memory_SHIFT_CTRL = _zz_execute_to_memory_SHIFT_CTRL_1; + assign decode_SHIFT_CTRL = _zz_decode_SHIFT_CTRL; + assign _zz_decode_to_execute_SHIFT_CTRL = _zz_decode_to_execute_SHIFT_CTRL_1; + assign decode_ALU_BITWISE_CTRL = _zz_decode_ALU_BITWISE_CTRL; + assign _zz_decode_to_execute_ALU_BITWISE_CTRL = _zz_decode_to_execute_ALU_BITWISE_CTRL_1; + assign decode_SRC_LESS_UNSIGNED = _zz_decode_IS_RS2_SIGNED[17]; + assign decode_MEMORY_MANAGMENT = _zz_decode_IS_RS2_SIGNED[16]; + assign memory_MEMORY_WR = execute_to_memory_MEMORY_WR; + assign decode_MEMORY_WR = _zz_decode_IS_RS2_SIGNED[13]; + assign execute_BYPASSABLE_MEMORY_STAGE = decode_to_execute_BYPASSABLE_MEMORY_STAGE; + assign decode_BYPASSABLE_MEMORY_STAGE = _zz_decode_IS_RS2_SIGNED[12]; + assign decode_BYPASSABLE_EXECUTE_STAGE = _zz_decode_IS_RS2_SIGNED[11]; + assign decode_SRC2_CTRL = _zz_decode_SRC2_CTRL; + assign _zz_decode_to_execute_SRC2_CTRL = _zz_decode_to_execute_SRC2_CTRL_1; + assign decode_ALU_CTRL = _zz_decode_ALU_CTRL; + assign _zz_decode_to_execute_ALU_CTRL = _zz_decode_to_execute_ALU_CTRL_1; + assign decode_SRC1_CTRL = _zz_decode_SRC1_CTRL; + assign _zz_decode_to_execute_SRC1_CTRL = _zz_decode_to_execute_SRC1_CTRL_1; + assign decode_MEMORY_FORCE_CONSTISTENCY = 1'b0; + assign writeBack_FORMAL_PC_NEXT = memory_to_writeBack_FORMAL_PC_NEXT; + assign memory_FORMAL_PC_NEXT = execute_to_memory_FORMAL_PC_NEXT; + assign execute_FORMAL_PC_NEXT = decode_to_execute_FORMAL_PC_NEXT; + assign decode_FORMAL_PC_NEXT = (decode_PC + 32'h00000004); + assign memory_PC = execute_to_memory_PC; + assign execute_IS_RS1_SIGNED = decode_to_execute_IS_RS1_SIGNED; + assign execute_IS_DIV = decode_to_execute_IS_DIV; + assign execute_IS_RS2_SIGNED = decode_to_execute_IS_RS2_SIGNED; + assign memory_IS_DIV = execute_to_memory_IS_DIV; + assign writeBack_IS_MUL = memory_to_writeBack_IS_MUL; + assign writeBack_MUL_HH = memory_to_writeBack_MUL_HH; + assign writeBack_MUL_LOW = memory_to_writeBack_MUL_LOW; + assign memory_MUL_HL = execute_to_memory_MUL_HL; + assign memory_MUL_LH = execute_to_memory_MUL_LH; + assign memory_MUL_LL = execute_to_memory_MUL_LL; + assign execute_CSR_READ_OPCODE = decode_to_execute_CSR_READ_OPCODE; + assign execute_CSR_WRITE_OPCODE = decode_to_execute_CSR_WRITE_OPCODE; + assign execute_IS_CSR = decode_to_execute_IS_CSR; + assign memory_ENV_CTRL = _zz_memory_ENV_CTRL; + assign execute_ENV_CTRL = _zz_execute_ENV_CTRL; + assign writeBack_ENV_CTRL = _zz_writeBack_ENV_CTRL; + assign memory_BRANCH_CALC = execute_to_memory_BRANCH_CALC; + assign memory_BRANCH_DO = execute_to_memory_BRANCH_DO; + assign execute_PC = decode_to_execute_PC; + assign execute_PREDICTION_HAD_BRANCHED2 = decode_to_execute_PREDICTION_HAD_BRANCHED2; + assign execute_RS1 = decode_to_execute_RS1; + assign execute_BRANCH_COND_RESULT = _zz_execute_BRANCH_COND_RESULT_1; + assign execute_BRANCH_CTRL = _zz_execute_BRANCH_CTRL; + assign decode_RS2_USE = _zz_decode_IS_RS2_SIGNED[15]; + assign decode_RS1_USE = _zz_decode_IS_RS2_SIGNED[5]; + always @(*) begin + _zz_decode_RS2 = execute_REGFILE_WRITE_DATA; + if(when_CsrPlugin_l1176) begin + _zz_decode_RS2 = CsrPlugin_csrMapping_readDataSignal; + end + end + + assign execute_REGFILE_WRITE_VALID = decode_to_execute_REGFILE_WRITE_VALID; + assign execute_BYPASSABLE_EXECUTE_STAGE = decode_to_execute_BYPASSABLE_EXECUTE_STAGE; + assign memory_REGFILE_WRITE_VALID = execute_to_memory_REGFILE_WRITE_VALID; + assign memory_INSTRUCTION = execute_to_memory_INSTRUCTION; + assign memory_BYPASSABLE_MEMORY_STAGE = execute_to_memory_BYPASSABLE_MEMORY_STAGE; + assign writeBack_REGFILE_WRITE_VALID = memory_to_writeBack_REGFILE_WRITE_VALID; + always @(*) begin + decode_RS2 = decode_RegFilePlugin_rs2Data; + if(HazardSimplePlugin_writeBackBuffer_valid) begin + if(HazardSimplePlugin_addr1Match) begin + decode_RS2 = HazardSimplePlugin_writeBackBuffer_payload_data; + end + end + if(when_HazardSimplePlugin_l45) begin + if(when_HazardSimplePlugin_l47) begin + if(when_HazardSimplePlugin_l51) begin + decode_RS2 = _zz_decode_RS2_2; + end + end + end + if(when_HazardSimplePlugin_l45_1) begin + if(memory_BYPASSABLE_MEMORY_STAGE) begin + if(when_HazardSimplePlugin_l51_1) begin + decode_RS2 = _zz_decode_RS2_1; + end + end + end + if(when_HazardSimplePlugin_l45_2) begin + if(execute_BYPASSABLE_EXECUTE_STAGE) begin + if(when_HazardSimplePlugin_l51_2) begin + decode_RS2 = _zz_decode_RS2; + end + end + end + end + + always @(*) begin + decode_RS1 = decode_RegFilePlugin_rs1Data; + if(HazardSimplePlugin_writeBackBuffer_valid) begin + if(HazardSimplePlugin_addr0Match) begin + decode_RS1 = HazardSimplePlugin_writeBackBuffer_payload_data; + end + end + if(when_HazardSimplePlugin_l45) begin + if(when_HazardSimplePlugin_l47) begin + if(when_HazardSimplePlugin_l48) begin + decode_RS1 = _zz_decode_RS2_2; + end + end + end + if(when_HazardSimplePlugin_l45_1) begin + if(memory_BYPASSABLE_MEMORY_STAGE) begin + if(when_HazardSimplePlugin_l48_1) begin + decode_RS1 = _zz_decode_RS2_1; + end + end + end + if(when_HazardSimplePlugin_l45_2) begin + if(execute_BYPASSABLE_EXECUTE_STAGE) begin + if(when_HazardSimplePlugin_l48_2) begin + decode_RS1 = _zz_decode_RS2; + end + end + end + end + + assign memory_SHIFT_RIGHT = execute_to_memory_SHIFT_RIGHT; + always @(*) begin + _zz_decode_RS2_1 = memory_REGFILE_WRITE_DATA; + if(memory_arbitration_isValid) begin + case(memory_SHIFT_CTRL) + `ShiftCtrlEnum_binary_sequential_SLL_1 : begin + _zz_decode_RS2_1 = _zz_decode_RS2_3; + end + `ShiftCtrlEnum_binary_sequential_SRL_1, `ShiftCtrlEnum_binary_sequential_SRA_1 : begin + _zz_decode_RS2_1 = memory_SHIFT_RIGHT; + end + default : begin + end + endcase + end + if(when_MulDivIterativePlugin_l128) begin + _zz_decode_RS2_1 = memory_DivPlugin_div_result; + end + end + + assign memory_SHIFT_CTRL = _zz_memory_SHIFT_CTRL; + assign execute_SHIFT_CTRL = _zz_execute_SHIFT_CTRL; + assign execute_SRC_LESS_UNSIGNED = decode_to_execute_SRC_LESS_UNSIGNED; + assign execute_SRC2_FORCE_ZERO = decode_to_execute_SRC2_FORCE_ZERO; + assign execute_SRC_USE_SUB_LESS = decode_to_execute_SRC_USE_SUB_LESS; + assign _zz_execute_SRC2 = execute_PC; + assign execute_SRC2_CTRL = _zz_execute_SRC2_CTRL; + assign execute_SRC1_CTRL = _zz_execute_SRC1_CTRL; + assign decode_SRC_USE_SUB_LESS = _zz_decode_IS_RS2_SIGNED[3]; + assign decode_SRC_ADD_ZERO = _zz_decode_IS_RS2_SIGNED[20]; + assign execute_SRC_ADD_SUB = execute_SrcPlugin_addSub; + assign execute_SRC_LESS = execute_SrcPlugin_less; + assign execute_ALU_CTRL = _zz_execute_ALU_CTRL; + assign execute_SRC2 = _zz_execute_SRC2_5; + assign execute_SRC1 = _zz_execute_SRC1; + assign execute_ALU_BITWISE_CTRL = _zz_execute_ALU_BITWISE_CTRL; + assign _zz_lastStageRegFileWrite_payload_address = writeBack_INSTRUCTION; + assign _zz_lastStageRegFileWrite_valid = writeBack_REGFILE_WRITE_VALID; + always @(*) begin + _zz_1 = 1'b0; + if(lastStageRegFileWrite_valid) begin + _zz_1 = 1'b1; + end + end + + assign decode_INSTRUCTION_ANTICIPATED = (decode_arbitration_isStuck ? decode_INSTRUCTION : IBusCachedPlugin_cache_io_cpu_fetch_data); + always @(*) begin + decode_REGFILE_WRITE_VALID = _zz_decode_IS_RS2_SIGNED[10]; + if(when_RegFilePlugin_l63) begin + decode_REGFILE_WRITE_VALID = 1'b0; + end + end + + assign decode_LEGAL_INSTRUCTION = ({((decode_INSTRUCTION & 32'h0000005f) == 32'h00000017),{((decode_INSTRUCTION & 32'h0000007f) == 32'h0000006f),{((decode_INSTRUCTION & 32'h0000106f) == 32'h00000003),{((decode_INSTRUCTION & _zz_decode_LEGAL_INSTRUCTION) == 32'h00001073),{(_zz_decode_LEGAL_INSTRUCTION_1 == _zz_decode_LEGAL_INSTRUCTION_2),{_zz_decode_LEGAL_INSTRUCTION_3,{_zz_decode_LEGAL_INSTRUCTION_4,_zz_decode_LEGAL_INSTRUCTION_5}}}}}}} != 21'h0); + always @(*) begin + _zz_decode_RS2_2 = writeBack_REGFILE_WRITE_DATA; + if(when_DBusCachedPlugin_l484) begin + _zz_decode_RS2_2 = writeBack_DBusCachedPlugin_rspFormated; + end + if(when_MulPlugin_l147) begin + case(switch_MulPlugin_l148) + 2'b00 : begin + _zz_decode_RS2_2 = _zz__zz_decode_RS2_2; + end + default : begin + _zz_decode_RS2_2 = _zz__zz_decode_RS2_2_1; + end + endcase + end + end + + assign writeBack_MEMORY_WR = memory_to_writeBack_MEMORY_WR; + assign writeBack_MEMORY_STORE_DATA_RF = memory_to_writeBack_MEMORY_STORE_DATA_RF; + assign writeBack_REGFILE_WRITE_DATA = memory_to_writeBack_REGFILE_WRITE_DATA; + assign writeBack_MEMORY_ENABLE = memory_to_writeBack_MEMORY_ENABLE; + assign memory_REGFILE_WRITE_DATA = execute_to_memory_REGFILE_WRITE_DATA; + assign memory_MEMORY_ENABLE = execute_to_memory_MEMORY_ENABLE; + assign execute_MEMORY_FORCE_CONSTISTENCY = decode_to_execute_MEMORY_FORCE_CONSTISTENCY; + assign execute_MEMORY_MANAGMENT = decode_to_execute_MEMORY_MANAGMENT; + assign execute_RS2 = decode_to_execute_RS2; + assign execute_MEMORY_WR = decode_to_execute_MEMORY_WR; + assign execute_SRC_ADD = execute_SrcPlugin_addSub; + assign execute_MEMORY_ENABLE = decode_to_execute_MEMORY_ENABLE; + assign execute_INSTRUCTION = decode_to_execute_INSTRUCTION; + assign decode_MEMORY_ENABLE = _zz_decode_IS_RS2_SIGNED[4]; + assign decode_FLUSH_ALL = _zz_decode_IS_RS2_SIGNED[0]; + always @(*) begin + IBusCachedPlugin_rsp_issueDetected_4 = IBusCachedPlugin_rsp_issueDetected_3; + if(when_IBusCachedPlugin_l256) begin + IBusCachedPlugin_rsp_issueDetected_4 = 1'b1; + end + end + + always @(*) begin + IBusCachedPlugin_rsp_issueDetected_3 = IBusCachedPlugin_rsp_issueDetected_2; + if(when_IBusCachedPlugin_l250) begin + IBusCachedPlugin_rsp_issueDetected_3 = 1'b1; + end + end + + always @(*) begin + IBusCachedPlugin_rsp_issueDetected_2 = IBusCachedPlugin_rsp_issueDetected_1; + if(when_IBusCachedPlugin_l244) begin + IBusCachedPlugin_rsp_issueDetected_2 = 1'b1; + end + end + + always @(*) begin + IBusCachedPlugin_rsp_issueDetected_1 = IBusCachedPlugin_rsp_issueDetected; + if(when_IBusCachedPlugin_l239) begin + IBusCachedPlugin_rsp_issueDetected_1 = 1'b1; + end + end + + assign decode_BRANCH_CTRL = _zz_decode_BRANCH_CTRL_1; + assign decode_INSTRUCTION = IBusCachedPlugin_iBusRsp_output_payload_rsp_inst; + always @(*) begin + _zz_memory_to_writeBack_FORMAL_PC_NEXT = memory_FORMAL_PC_NEXT; + if(BranchPlugin_jumpInterface_valid) begin + _zz_memory_to_writeBack_FORMAL_PC_NEXT = BranchPlugin_jumpInterface_payload; + end + end + + always @(*) begin + _zz_decode_to_execute_FORMAL_PC_NEXT = decode_FORMAL_PC_NEXT; + if(IBusCachedPlugin_predictionJumpInterface_valid) begin + _zz_decode_to_execute_FORMAL_PC_NEXT = IBusCachedPlugin_predictionJumpInterface_payload; + end + end + + assign decode_PC = IBusCachedPlugin_iBusRsp_output_payload_pc; + assign writeBack_PC = memory_to_writeBack_PC; + assign writeBack_INSTRUCTION = memory_to_writeBack_INSTRUCTION; + always @(*) begin + decode_arbitration_haltItself = 1'b0; + if(when_DBusCachedPlugin_l303) begin + decode_arbitration_haltItself = 1'b1; + end + end + + always @(*) begin + decode_arbitration_haltByOther = 1'b0; + if(when_HazardSimplePlugin_l113) begin + decode_arbitration_haltByOther = 1'b1; + end + if(CsrPlugin_pipelineLiberator_active) begin + decode_arbitration_haltByOther = 1'b1; + end + if(when_CsrPlugin_l1116) begin + decode_arbitration_haltByOther = 1'b1; + end + end + + always @(*) begin + decode_arbitration_removeIt = 1'b0; + if(_zz_when) begin + decode_arbitration_removeIt = 1'b1; + end + if(decode_arbitration_isFlushed) begin + decode_arbitration_removeIt = 1'b1; + end + end + + assign decode_arbitration_flushIt = 1'b0; + always @(*) begin + decode_arbitration_flushNext = 1'b0; + if(IBusCachedPlugin_predictionJumpInterface_valid) begin + decode_arbitration_flushNext = 1'b1; + end + if(_zz_when) begin + decode_arbitration_flushNext = 1'b1; + end + end + + always @(*) begin + execute_arbitration_haltItself = 1'b0; + if(when_DBusCachedPlugin_l343) begin + execute_arbitration_haltItself = 1'b1; + end + if(when_CsrPlugin_l1108) begin + if(when_CsrPlugin_l1110) begin + execute_arbitration_haltItself = 1'b1; + end + end + if(when_CsrPlugin_l1180) begin + if(execute_CsrPlugin_blockedBySideEffects) begin + execute_arbitration_haltItself = 1'b1; + end + end + end + + always @(*) begin + execute_arbitration_haltByOther = 1'b0; + if(when_DBusCachedPlugin_l359) begin + execute_arbitration_haltByOther = 1'b1; + end + end + + always @(*) begin + execute_arbitration_removeIt = 1'b0; + if(CsrPlugin_selfException_valid) begin + execute_arbitration_removeIt = 1'b1; + end + if(execute_arbitration_isFlushed) begin + execute_arbitration_removeIt = 1'b1; + end + end + + assign execute_arbitration_flushIt = 1'b0; + always @(*) begin + execute_arbitration_flushNext = 1'b0; + if(CsrPlugin_selfException_valid) begin + execute_arbitration_flushNext = 1'b1; + end + end + + always @(*) begin + memory_arbitration_haltItself = 1'b0; + if(when_MulDivIterativePlugin_l128) begin + if(when_MulDivIterativePlugin_l129) begin + memory_arbitration_haltItself = 1'b1; + end + end + end + + assign memory_arbitration_haltByOther = 1'b0; + always @(*) begin + memory_arbitration_removeIt = 1'b0; + if(BranchPlugin_branchExceptionPort_valid) begin + memory_arbitration_removeIt = 1'b1; + end + if(memory_arbitration_isFlushed) begin + memory_arbitration_removeIt = 1'b1; + end + end + + assign memory_arbitration_flushIt = 1'b0; + always @(*) begin + memory_arbitration_flushNext = 1'b0; + if(BranchPlugin_jumpInterface_valid) begin + memory_arbitration_flushNext = 1'b1; + end + if(BranchPlugin_branchExceptionPort_valid) begin + memory_arbitration_flushNext = 1'b1; + end + end + + always @(*) begin + writeBack_arbitration_haltItself = 1'b0; + if(when_DBusCachedPlugin_l458) begin + writeBack_arbitration_haltItself = 1'b1; + end + end + + assign writeBack_arbitration_haltByOther = 1'b0; + always @(*) begin + writeBack_arbitration_removeIt = 1'b0; + if(DBusCachedPlugin_exceptionBus_valid) begin + writeBack_arbitration_removeIt = 1'b1; + end + if(writeBack_arbitration_isFlushed) begin + writeBack_arbitration_removeIt = 1'b1; + end + end + + always @(*) begin + writeBack_arbitration_flushIt = 1'b0; + if(DBusCachedPlugin_redoBranch_valid) begin + writeBack_arbitration_flushIt = 1'b1; + end + end + + always @(*) begin + writeBack_arbitration_flushNext = 1'b0; + if(DBusCachedPlugin_redoBranch_valid) begin + writeBack_arbitration_flushNext = 1'b1; + end + if(DBusCachedPlugin_exceptionBus_valid) begin + writeBack_arbitration_flushNext = 1'b1; + end + if(when_CsrPlugin_l1019) begin + writeBack_arbitration_flushNext = 1'b1; + end + if(when_CsrPlugin_l1064) begin + writeBack_arbitration_flushNext = 1'b1; + end + end + + assign lastStageInstruction = writeBack_INSTRUCTION; + assign lastStagePc = writeBack_PC; + assign lastStageIsValid = writeBack_arbitration_isValid; + assign lastStageIsFiring = writeBack_arbitration_isFiring; + always @(*) begin + IBusCachedPlugin_fetcherHalt = 1'b0; + if(when_CsrPlugin_l922) begin + IBusCachedPlugin_fetcherHalt = 1'b1; + end + if(when_CsrPlugin_l1019) begin + IBusCachedPlugin_fetcherHalt = 1'b1; + end + if(when_CsrPlugin_l1064) begin + IBusCachedPlugin_fetcherHalt = 1'b1; + end + end + + always @(*) begin + IBusCachedPlugin_incomingInstruction = 1'b0; + if(when_Fetcher_l240) begin + IBusCachedPlugin_incomingInstruction = 1'b1; + end + end + + assign CsrPlugin_csrMapping_allowCsrSignal = 1'b0; + assign CsrPlugin_csrMapping_readDataSignal = CsrPlugin_csrMapping_readDataInit; + always @(*) begin + CsrPlugin_inWfi = 1'b0; + if(when_CsrPlugin_l1108) begin + CsrPlugin_inWfi = 1'b1; + end + end + + assign CsrPlugin_thirdPartyWake = 1'b0; + always @(*) begin + CsrPlugin_jumpInterface_valid = 1'b0; + if(when_CsrPlugin_l1019) begin + CsrPlugin_jumpInterface_valid = 1'b1; + end + if(when_CsrPlugin_l1064) begin + CsrPlugin_jumpInterface_valid = 1'b1; + end + end + + always @(*) begin + CsrPlugin_jumpInterface_payload = 32'bxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx; + if(when_CsrPlugin_l1019) begin + CsrPlugin_jumpInterface_payload = {CsrPlugin_xtvec_base,2'b00}; + end + if(when_CsrPlugin_l1064) begin + case(switch_CsrPlugin_l1068) + 2'b11 : begin + CsrPlugin_jumpInterface_payload = CsrPlugin_mepc; + end + default : begin + end + endcase + end + end + + assign CsrPlugin_forceMachineWire = 1'b0; + assign CsrPlugin_allowInterrupts = 1'b1; + assign CsrPlugin_allowException = 1'b1; + assign CsrPlugin_allowEbreakException = 1'b1; + assign IBusCachedPlugin_externalFlush = ({writeBack_arbitration_flushNext,{memory_arbitration_flushNext,{execute_arbitration_flushNext,decode_arbitration_flushNext}}} != 4'b0000); + assign IBusCachedPlugin_jump_pcLoad_valid = ({CsrPlugin_jumpInterface_valid,{BranchPlugin_jumpInterface_valid,{DBusCachedPlugin_redoBranch_valid,IBusCachedPlugin_predictionJumpInterface_valid}}} != 4'b0000); + assign _zz_IBusCachedPlugin_jump_pcLoad_payload = {IBusCachedPlugin_predictionJumpInterface_valid,{BranchPlugin_jumpInterface_valid,{CsrPlugin_jumpInterface_valid,DBusCachedPlugin_redoBranch_valid}}}; + assign _zz_IBusCachedPlugin_jump_pcLoad_payload_1 = (_zz_IBusCachedPlugin_jump_pcLoad_payload & (~ _zz__zz_IBusCachedPlugin_jump_pcLoad_payload_1)); + assign _zz_IBusCachedPlugin_jump_pcLoad_payload_2 = _zz_IBusCachedPlugin_jump_pcLoad_payload_1[3]; + assign _zz_IBusCachedPlugin_jump_pcLoad_payload_3 = (_zz_IBusCachedPlugin_jump_pcLoad_payload_1[1] || _zz_IBusCachedPlugin_jump_pcLoad_payload_2); + assign _zz_IBusCachedPlugin_jump_pcLoad_payload_4 = (_zz_IBusCachedPlugin_jump_pcLoad_payload_1[2] || _zz_IBusCachedPlugin_jump_pcLoad_payload_2); + assign IBusCachedPlugin_jump_pcLoad_payload = _zz_IBusCachedPlugin_jump_pcLoad_payload_5; + always @(*) begin + IBusCachedPlugin_fetchPc_correction = 1'b0; + if(IBusCachedPlugin_fetchPc_redo_valid) begin + IBusCachedPlugin_fetchPc_correction = 1'b1; + end + if(IBusCachedPlugin_jump_pcLoad_valid) begin + IBusCachedPlugin_fetchPc_correction = 1'b1; + end + end + + assign IBusCachedPlugin_fetchPc_output_fire = (IBusCachedPlugin_fetchPc_output_valid && IBusCachedPlugin_fetchPc_output_ready); + assign IBusCachedPlugin_fetchPc_corrected = (IBusCachedPlugin_fetchPc_correction || IBusCachedPlugin_fetchPc_correctionReg); + always @(*) begin + IBusCachedPlugin_fetchPc_pcRegPropagate = 1'b0; + if(IBusCachedPlugin_iBusRsp_stages_1_input_ready) begin + IBusCachedPlugin_fetchPc_pcRegPropagate = 1'b1; + end + end + + assign when_Fetcher_l131 = (IBusCachedPlugin_fetchPc_correction || IBusCachedPlugin_fetchPc_pcRegPropagate); + assign IBusCachedPlugin_fetchPc_output_fire_1 = (IBusCachedPlugin_fetchPc_output_valid && IBusCachedPlugin_fetchPc_output_ready); + assign when_Fetcher_l131_1 = ((! IBusCachedPlugin_fetchPc_output_valid) && IBusCachedPlugin_fetchPc_output_ready); + always @(*) begin + IBusCachedPlugin_fetchPc_pc = (IBusCachedPlugin_fetchPc_pcReg + _zz_IBusCachedPlugin_fetchPc_pc); + if(IBusCachedPlugin_fetchPc_redo_valid) begin + IBusCachedPlugin_fetchPc_pc = IBusCachedPlugin_fetchPc_redo_payload; + end + if(IBusCachedPlugin_jump_pcLoad_valid) begin + IBusCachedPlugin_fetchPc_pc = IBusCachedPlugin_jump_pcLoad_payload; + end + IBusCachedPlugin_fetchPc_pc[0] = 1'b0; + IBusCachedPlugin_fetchPc_pc[1] = 1'b0; + end + + always @(*) begin + IBusCachedPlugin_fetchPc_flushed = 1'b0; + if(IBusCachedPlugin_fetchPc_redo_valid) begin + IBusCachedPlugin_fetchPc_flushed = 1'b1; + end + if(IBusCachedPlugin_jump_pcLoad_valid) begin + IBusCachedPlugin_fetchPc_flushed = 1'b1; + end + end + + assign when_Fetcher_l158 = (IBusCachedPlugin_fetchPc_booted && ((IBusCachedPlugin_fetchPc_output_ready || IBusCachedPlugin_fetchPc_correction) || IBusCachedPlugin_fetchPc_pcRegPropagate)); + assign IBusCachedPlugin_fetchPc_output_valid = ((! IBusCachedPlugin_fetcherHalt) && IBusCachedPlugin_fetchPc_booted); + assign IBusCachedPlugin_fetchPc_output_payload = IBusCachedPlugin_fetchPc_pc; + always @(*) begin + IBusCachedPlugin_iBusRsp_redoFetch = 1'b0; + if(IBusCachedPlugin_rsp_redoFetch) begin + IBusCachedPlugin_iBusRsp_redoFetch = 1'b1; + end + end + + assign IBusCachedPlugin_iBusRsp_stages_0_input_valid = IBusCachedPlugin_fetchPc_output_valid; + assign IBusCachedPlugin_fetchPc_output_ready = IBusCachedPlugin_iBusRsp_stages_0_input_ready; + assign IBusCachedPlugin_iBusRsp_stages_0_input_payload = IBusCachedPlugin_fetchPc_output_payload; + always @(*) begin + IBusCachedPlugin_iBusRsp_stages_0_halt = 1'b0; + if(IBusCachedPlugin_cache_io_cpu_prefetch_haltIt) begin + IBusCachedPlugin_iBusRsp_stages_0_halt = 1'b1; + end + end + + assign _zz_IBusCachedPlugin_iBusRsp_stages_0_input_ready = (! IBusCachedPlugin_iBusRsp_stages_0_halt); + assign IBusCachedPlugin_iBusRsp_stages_0_input_ready = (IBusCachedPlugin_iBusRsp_stages_0_output_ready && _zz_IBusCachedPlugin_iBusRsp_stages_0_input_ready); + assign IBusCachedPlugin_iBusRsp_stages_0_output_valid = (IBusCachedPlugin_iBusRsp_stages_0_input_valid && _zz_IBusCachedPlugin_iBusRsp_stages_0_input_ready); + assign IBusCachedPlugin_iBusRsp_stages_0_output_payload = IBusCachedPlugin_iBusRsp_stages_0_input_payload; + always @(*) begin + IBusCachedPlugin_iBusRsp_stages_1_halt = 1'b0; + if(IBusCachedPlugin_mmuBus_busy) begin + IBusCachedPlugin_iBusRsp_stages_1_halt = 1'b1; + end + end + + assign _zz_IBusCachedPlugin_iBusRsp_stages_1_input_ready = (! IBusCachedPlugin_iBusRsp_stages_1_halt); + assign IBusCachedPlugin_iBusRsp_stages_1_input_ready = (IBusCachedPlugin_iBusRsp_stages_1_output_ready && _zz_IBusCachedPlugin_iBusRsp_stages_1_input_ready); + assign IBusCachedPlugin_iBusRsp_stages_1_output_valid = (IBusCachedPlugin_iBusRsp_stages_1_input_valid && _zz_IBusCachedPlugin_iBusRsp_stages_1_input_ready); + assign IBusCachedPlugin_iBusRsp_stages_1_output_payload = IBusCachedPlugin_iBusRsp_stages_1_input_payload; + always @(*) begin + IBusCachedPlugin_iBusRsp_stages_2_halt = 1'b0; + if(when_IBusCachedPlugin_l267) begin + IBusCachedPlugin_iBusRsp_stages_2_halt = 1'b1; + end + end + + assign _zz_IBusCachedPlugin_iBusRsp_stages_2_input_ready = (! IBusCachedPlugin_iBusRsp_stages_2_halt); + assign IBusCachedPlugin_iBusRsp_stages_2_input_ready = (IBusCachedPlugin_iBusRsp_stages_2_output_ready && _zz_IBusCachedPlugin_iBusRsp_stages_2_input_ready); + assign IBusCachedPlugin_iBusRsp_stages_2_output_valid = (IBusCachedPlugin_iBusRsp_stages_2_input_valid && _zz_IBusCachedPlugin_iBusRsp_stages_2_input_ready); + assign IBusCachedPlugin_iBusRsp_stages_2_output_payload = IBusCachedPlugin_iBusRsp_stages_2_input_payload; + assign IBusCachedPlugin_fetchPc_redo_valid = IBusCachedPlugin_iBusRsp_redoFetch; + assign IBusCachedPlugin_fetchPc_redo_payload = IBusCachedPlugin_iBusRsp_stages_2_input_payload; + assign IBusCachedPlugin_iBusRsp_flush = ((decode_arbitration_removeIt || (decode_arbitration_flushNext && (! decode_arbitration_isStuck))) || IBusCachedPlugin_iBusRsp_redoFetch); + assign IBusCachedPlugin_iBusRsp_stages_0_output_ready = _zz_IBusCachedPlugin_iBusRsp_stages_0_output_ready; + assign _zz_IBusCachedPlugin_iBusRsp_stages_0_output_ready = ((1'b0 && (! _zz_IBusCachedPlugin_iBusRsp_stages_0_output_ready_1)) || IBusCachedPlugin_iBusRsp_stages_1_input_ready); + assign _zz_IBusCachedPlugin_iBusRsp_stages_0_output_ready_1 = _zz_IBusCachedPlugin_iBusRsp_stages_0_output_ready_2; + assign IBusCachedPlugin_iBusRsp_stages_1_input_valid = _zz_IBusCachedPlugin_iBusRsp_stages_0_output_ready_1; + assign IBusCachedPlugin_iBusRsp_stages_1_input_payload = IBusCachedPlugin_fetchPc_pcReg; + assign IBusCachedPlugin_iBusRsp_stages_1_output_ready = ((1'b0 && (! IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_valid)) || IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_ready); + assign IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_valid = _zz_IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_valid; + assign IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_payload = _zz_IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_payload; + assign IBusCachedPlugin_iBusRsp_stages_2_input_valid = IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_valid; + assign IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_ready = IBusCachedPlugin_iBusRsp_stages_2_input_ready; + assign IBusCachedPlugin_iBusRsp_stages_2_input_payload = IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_payload; + always @(*) begin + IBusCachedPlugin_iBusRsp_readyForError = 1'b1; + if(when_Fetcher_l320) begin + IBusCachedPlugin_iBusRsp_readyForError = 1'b0; + end + end + + assign when_Fetcher_l240 = (IBusCachedPlugin_iBusRsp_stages_1_input_valid || IBusCachedPlugin_iBusRsp_stages_2_input_valid); + assign when_Fetcher_l320 = (! IBusCachedPlugin_pcValids_0); + assign when_Fetcher_l329 = (! (! IBusCachedPlugin_iBusRsp_stages_1_input_ready)); + assign when_Fetcher_l329_1 = (! (! IBusCachedPlugin_iBusRsp_stages_2_input_ready)); + assign when_Fetcher_l329_2 = (! execute_arbitration_isStuck); + assign when_Fetcher_l329_3 = (! memory_arbitration_isStuck); + assign when_Fetcher_l329_4 = (! writeBack_arbitration_isStuck); + assign IBusCachedPlugin_pcValids_0 = IBusCachedPlugin_injector_nextPcCalc_valids_1; + assign IBusCachedPlugin_pcValids_1 = IBusCachedPlugin_injector_nextPcCalc_valids_2; + assign IBusCachedPlugin_pcValids_2 = IBusCachedPlugin_injector_nextPcCalc_valids_3; + assign IBusCachedPlugin_pcValids_3 = IBusCachedPlugin_injector_nextPcCalc_valids_4; + assign IBusCachedPlugin_iBusRsp_output_ready = (! decode_arbitration_isStuck); + assign decode_arbitration_isValid = IBusCachedPlugin_iBusRsp_output_valid; + assign _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch = _zz__zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch[11]; + always @(*) begin + _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_1[18] = _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch; + _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_1[17] = _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch; + _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_1[16] = _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch; + _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_1[15] = _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch; + _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_1[14] = _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch; + _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_1[13] = _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch; + _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_1[12] = _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch; + _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_1[11] = _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch; + _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_1[10] = _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch; + _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_1[9] = _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch; + _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_1[8] = _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch; + _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_1[7] = _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch; + _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_1[6] = _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch; + _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_1[5] = _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch; + _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_1[4] = _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch; + _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_1[3] = _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch; + _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_1[2] = _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch; + _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_1[1] = _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch; + _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_1[0] = _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch; + end + + always @(*) begin + IBusCachedPlugin_decodePrediction_cmd_hadBranch = ((decode_BRANCH_CTRL == `BranchCtrlEnum_binary_sequential_JAL) || ((decode_BRANCH_CTRL == `BranchCtrlEnum_binary_sequential_B) && _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_2[31])); + if(_zz_6) begin + IBusCachedPlugin_decodePrediction_cmd_hadBranch = 1'b0; + end + end + + assign _zz_2 = _zz__zz_2[19]; + always @(*) begin + _zz_3[10] = _zz_2; + _zz_3[9] = _zz_2; + _zz_3[8] = _zz_2; + _zz_3[7] = _zz_2; + _zz_3[6] = _zz_2; + _zz_3[5] = _zz_2; + _zz_3[4] = _zz_2; + _zz_3[3] = _zz_2; + _zz_3[2] = _zz_2; + _zz_3[1] = _zz_2; + _zz_3[0] = _zz_2; + end + + assign _zz_4 = _zz__zz_4[11]; + always @(*) begin + _zz_5[18] = _zz_4; + _zz_5[17] = _zz_4; + _zz_5[16] = _zz_4; + _zz_5[15] = _zz_4; + _zz_5[14] = _zz_4; + _zz_5[13] = _zz_4; + _zz_5[12] = _zz_4; + _zz_5[11] = _zz_4; + _zz_5[10] = _zz_4; + _zz_5[9] = _zz_4; + _zz_5[8] = _zz_4; + _zz_5[7] = _zz_4; + _zz_5[6] = _zz_4; + _zz_5[5] = _zz_4; + _zz_5[4] = _zz_4; + _zz_5[3] = _zz_4; + _zz_5[2] = _zz_4; + _zz_5[1] = _zz_4; + _zz_5[0] = _zz_4; + end + + always @(*) begin + case(decode_BRANCH_CTRL) + `BranchCtrlEnum_binary_sequential_JAL : begin + _zz_6 = _zz__zz_6[1]; + end + default : begin + _zz_6 = _zz__zz_6_1[1]; + end + endcase + end + + assign IBusCachedPlugin_predictionJumpInterface_valid = (decode_arbitration_isValid && IBusCachedPlugin_decodePrediction_cmd_hadBranch); + assign _zz_IBusCachedPlugin_predictionJumpInterface_payload = _zz__zz_IBusCachedPlugin_predictionJumpInterface_payload[19]; + always @(*) begin + _zz_IBusCachedPlugin_predictionJumpInterface_payload_1[10] = _zz_IBusCachedPlugin_predictionJumpInterface_payload; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_1[9] = _zz_IBusCachedPlugin_predictionJumpInterface_payload; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_1[8] = _zz_IBusCachedPlugin_predictionJumpInterface_payload; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_1[7] = _zz_IBusCachedPlugin_predictionJumpInterface_payload; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_1[6] = _zz_IBusCachedPlugin_predictionJumpInterface_payload; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_1[5] = _zz_IBusCachedPlugin_predictionJumpInterface_payload; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_1[4] = _zz_IBusCachedPlugin_predictionJumpInterface_payload; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_1[3] = _zz_IBusCachedPlugin_predictionJumpInterface_payload; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_1[2] = _zz_IBusCachedPlugin_predictionJumpInterface_payload; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_1[1] = _zz_IBusCachedPlugin_predictionJumpInterface_payload; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_1[0] = _zz_IBusCachedPlugin_predictionJumpInterface_payload; + end + + assign _zz_IBusCachedPlugin_predictionJumpInterface_payload_2 = _zz__zz_IBusCachedPlugin_predictionJumpInterface_payload_2[11]; + always @(*) begin + _zz_IBusCachedPlugin_predictionJumpInterface_payload_3[18] = _zz_IBusCachedPlugin_predictionJumpInterface_payload_2; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_3[17] = _zz_IBusCachedPlugin_predictionJumpInterface_payload_2; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_3[16] = _zz_IBusCachedPlugin_predictionJumpInterface_payload_2; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_3[15] = _zz_IBusCachedPlugin_predictionJumpInterface_payload_2; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_3[14] = _zz_IBusCachedPlugin_predictionJumpInterface_payload_2; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_3[13] = _zz_IBusCachedPlugin_predictionJumpInterface_payload_2; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_3[12] = _zz_IBusCachedPlugin_predictionJumpInterface_payload_2; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_3[11] = _zz_IBusCachedPlugin_predictionJumpInterface_payload_2; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_3[10] = _zz_IBusCachedPlugin_predictionJumpInterface_payload_2; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_3[9] = _zz_IBusCachedPlugin_predictionJumpInterface_payload_2; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_3[8] = _zz_IBusCachedPlugin_predictionJumpInterface_payload_2; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_3[7] = _zz_IBusCachedPlugin_predictionJumpInterface_payload_2; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_3[6] = _zz_IBusCachedPlugin_predictionJumpInterface_payload_2; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_3[5] = _zz_IBusCachedPlugin_predictionJumpInterface_payload_2; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_3[4] = _zz_IBusCachedPlugin_predictionJumpInterface_payload_2; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_3[3] = _zz_IBusCachedPlugin_predictionJumpInterface_payload_2; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_3[2] = _zz_IBusCachedPlugin_predictionJumpInterface_payload_2; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_3[1] = _zz_IBusCachedPlugin_predictionJumpInterface_payload_2; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_3[0] = _zz_IBusCachedPlugin_predictionJumpInterface_payload_2; + end + + assign IBusCachedPlugin_predictionJumpInterface_payload = (decode_PC + ((decode_BRANCH_CTRL == `BranchCtrlEnum_binary_sequential_JAL) ? {{_zz_IBusCachedPlugin_predictionJumpInterface_payload_1,{{{_zz_IBusCachedPlugin_predictionJumpInterface_payload_4,decode_INSTRUCTION[19 : 12]},decode_INSTRUCTION[20]},decode_INSTRUCTION[30 : 21]}},1'b0} : {{_zz_IBusCachedPlugin_predictionJumpInterface_payload_3,{{{_zz_IBusCachedPlugin_predictionJumpInterface_payload_5,_zz_IBusCachedPlugin_predictionJumpInterface_payload_6},decode_INSTRUCTION[30 : 25]},decode_INSTRUCTION[11 : 8]}},1'b0})); + assign iBus_cmd_valid = IBusCachedPlugin_cache_io_mem_cmd_valid; + always @(*) begin + iBus_cmd_payload_address = IBusCachedPlugin_cache_io_mem_cmd_payload_address; + iBus_cmd_payload_address = IBusCachedPlugin_cache_io_mem_cmd_payload_address; + end + + assign iBus_cmd_payload_size = IBusCachedPlugin_cache_io_mem_cmd_payload_size; + assign IBusCachedPlugin_s0_tightlyCoupledHit = 1'b0; + assign IBusCachedPlugin_cache_io_cpu_prefetch_isValid = (IBusCachedPlugin_iBusRsp_stages_0_input_valid && (! IBusCachedPlugin_s0_tightlyCoupledHit)); + assign IBusCachedPlugin_cache_io_cpu_fetch_isValid = (IBusCachedPlugin_iBusRsp_stages_1_input_valid && (! IBusCachedPlugin_s1_tightlyCoupledHit)); + assign IBusCachedPlugin_cache_io_cpu_fetch_isStuck = (! IBusCachedPlugin_iBusRsp_stages_1_input_ready); + assign IBusCachedPlugin_mmuBus_cmd_0_isValid = IBusCachedPlugin_cache_io_cpu_fetch_isValid; + assign IBusCachedPlugin_mmuBus_cmd_0_isStuck = (! IBusCachedPlugin_iBusRsp_stages_1_input_ready); + assign IBusCachedPlugin_mmuBus_cmd_0_virtualAddress = IBusCachedPlugin_iBusRsp_stages_1_input_payload; + assign IBusCachedPlugin_mmuBus_cmd_0_bypassTranslation = 1'b0; + assign IBusCachedPlugin_mmuBus_end = (IBusCachedPlugin_iBusRsp_stages_1_input_ready || IBusCachedPlugin_externalFlush); + assign IBusCachedPlugin_cache_io_cpu_decode_isValid = (IBusCachedPlugin_iBusRsp_stages_2_input_valid && (! IBusCachedPlugin_s2_tightlyCoupledHit)); + assign IBusCachedPlugin_cache_io_cpu_decode_isStuck = (! IBusCachedPlugin_iBusRsp_stages_2_input_ready); + assign IBusCachedPlugin_cache_io_cpu_decode_isUser = (CsrPlugin_privilege == 2'b00); + assign IBusCachedPlugin_rsp_iBusRspOutputHalt = 1'b0; + assign IBusCachedPlugin_rsp_issueDetected = 1'b0; + always @(*) begin + IBusCachedPlugin_rsp_redoFetch = 1'b0; + if(when_IBusCachedPlugin_l239) begin + IBusCachedPlugin_rsp_redoFetch = 1'b1; + end + if(when_IBusCachedPlugin_l250) begin + IBusCachedPlugin_rsp_redoFetch = 1'b1; + end + end + + always @(*) begin + IBusCachedPlugin_cache_io_cpu_fill_valid = (IBusCachedPlugin_rsp_redoFetch && (! IBusCachedPlugin_cache_io_cpu_decode_mmuRefilling)); + if(when_IBusCachedPlugin_l250) begin + IBusCachedPlugin_cache_io_cpu_fill_valid = 1'b1; + end + end + + always @(*) begin + IBusCachedPlugin_decodeExceptionPort_valid = 1'b0; + if(when_IBusCachedPlugin_l244) begin + IBusCachedPlugin_decodeExceptionPort_valid = IBusCachedPlugin_iBusRsp_readyForError; + end + if(when_IBusCachedPlugin_l256) begin + IBusCachedPlugin_decodeExceptionPort_valid = IBusCachedPlugin_iBusRsp_readyForError; + end + end + + always @(*) begin + IBusCachedPlugin_decodeExceptionPort_payload_code = 4'bxxxx; + if(when_IBusCachedPlugin_l244) begin + IBusCachedPlugin_decodeExceptionPort_payload_code = 4'b1100; + end + if(when_IBusCachedPlugin_l256) begin + IBusCachedPlugin_decodeExceptionPort_payload_code = 4'b0001; + end + end + + assign IBusCachedPlugin_decodeExceptionPort_payload_badAddr = {IBusCachedPlugin_iBusRsp_stages_2_input_payload[31 : 2],2'b00}; + assign when_IBusCachedPlugin_l239 = ((IBusCachedPlugin_cache_io_cpu_decode_isValid && IBusCachedPlugin_cache_io_cpu_decode_mmuRefilling) && (! IBusCachedPlugin_rsp_issueDetected)); + assign when_IBusCachedPlugin_l244 = ((IBusCachedPlugin_cache_io_cpu_decode_isValid && IBusCachedPlugin_cache_io_cpu_decode_mmuException) && (! IBusCachedPlugin_rsp_issueDetected_1)); + assign when_IBusCachedPlugin_l250 = ((IBusCachedPlugin_cache_io_cpu_decode_isValid && IBusCachedPlugin_cache_io_cpu_decode_cacheMiss) && (! IBusCachedPlugin_rsp_issueDetected_2)); + assign when_IBusCachedPlugin_l256 = ((IBusCachedPlugin_cache_io_cpu_decode_isValid && IBusCachedPlugin_cache_io_cpu_decode_error) && (! IBusCachedPlugin_rsp_issueDetected_3)); + assign when_IBusCachedPlugin_l267 = (IBusCachedPlugin_rsp_issueDetected_4 || IBusCachedPlugin_rsp_iBusRspOutputHalt); + assign IBusCachedPlugin_iBusRsp_output_valid = IBusCachedPlugin_iBusRsp_stages_2_output_valid; + assign IBusCachedPlugin_iBusRsp_stages_2_output_ready = IBusCachedPlugin_iBusRsp_output_ready; + assign IBusCachedPlugin_iBusRsp_output_payload_rsp_inst = IBusCachedPlugin_cache_io_cpu_decode_data; + assign IBusCachedPlugin_iBusRsp_output_payload_pc = IBusCachedPlugin_iBusRsp_stages_2_output_payload; + assign IBusCachedPlugin_cache_io_flush = (decode_arbitration_isValid && decode_FLUSH_ALL); + assign dataCache_1_io_mem_cmd_ready = (! dataCache_1_io_mem_cmd_rValid); + assign dataCache_1_io_mem_cmd_s2mPipe_valid = (dataCache_1_io_mem_cmd_valid || dataCache_1_io_mem_cmd_rValid); + assign dataCache_1_io_mem_cmd_s2mPipe_payload_wr = (dataCache_1_io_mem_cmd_rValid ? dataCache_1_io_mem_cmd_rData_wr : dataCache_1_io_mem_cmd_payload_wr); + assign dataCache_1_io_mem_cmd_s2mPipe_payload_uncached = (dataCache_1_io_mem_cmd_rValid ? dataCache_1_io_mem_cmd_rData_uncached : dataCache_1_io_mem_cmd_payload_uncached); + assign dataCache_1_io_mem_cmd_s2mPipe_payload_address = (dataCache_1_io_mem_cmd_rValid ? dataCache_1_io_mem_cmd_rData_address : dataCache_1_io_mem_cmd_payload_address); + assign dataCache_1_io_mem_cmd_s2mPipe_payload_data = (dataCache_1_io_mem_cmd_rValid ? dataCache_1_io_mem_cmd_rData_data : dataCache_1_io_mem_cmd_payload_data); + assign dataCache_1_io_mem_cmd_s2mPipe_payload_mask = (dataCache_1_io_mem_cmd_rValid ? dataCache_1_io_mem_cmd_rData_mask : dataCache_1_io_mem_cmd_payload_mask); + assign dataCache_1_io_mem_cmd_s2mPipe_payload_size = (dataCache_1_io_mem_cmd_rValid ? dataCache_1_io_mem_cmd_rData_size : dataCache_1_io_mem_cmd_payload_size); + assign dataCache_1_io_mem_cmd_s2mPipe_payload_last = (dataCache_1_io_mem_cmd_rValid ? dataCache_1_io_mem_cmd_rData_last : dataCache_1_io_mem_cmd_payload_last); + always @(*) begin + dataCache_1_io_mem_cmd_s2mPipe_ready = dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_ready; + if(when_Stream_l342) begin + dataCache_1_io_mem_cmd_s2mPipe_ready = 1'b1; + end + end + + assign when_Stream_l342 = (! dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_valid); + assign dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_valid = dataCache_1_io_mem_cmd_s2mPipe_rValid; + assign dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_payload_wr = dataCache_1_io_mem_cmd_s2mPipe_rData_wr; + assign dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_payload_uncached = dataCache_1_io_mem_cmd_s2mPipe_rData_uncached; + assign dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_payload_address = dataCache_1_io_mem_cmd_s2mPipe_rData_address; + assign dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_payload_data = dataCache_1_io_mem_cmd_s2mPipe_rData_data; + assign dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_payload_mask = dataCache_1_io_mem_cmd_s2mPipe_rData_mask; + assign dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_payload_size = dataCache_1_io_mem_cmd_s2mPipe_rData_size; + assign dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_payload_last = dataCache_1_io_mem_cmd_s2mPipe_rData_last; + assign dBus_cmd_valid = dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_valid; + assign dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_ready = dBus_cmd_ready; + assign dBus_cmd_payload_wr = dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_payload_wr; + assign dBus_cmd_payload_uncached = dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_payload_uncached; + assign dBus_cmd_payload_address = dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_payload_address; + assign dBus_cmd_payload_data = dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_payload_data; + assign dBus_cmd_payload_mask = dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_payload_mask; + assign dBus_cmd_payload_size = dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_payload_size; + assign dBus_cmd_payload_last = dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_payload_last; + assign when_DBusCachedPlugin_l303 = ((DBusCachedPlugin_mmuBus_busy && decode_arbitration_isValid) && decode_MEMORY_ENABLE); + assign execute_DBusCachedPlugin_size = execute_INSTRUCTION[13 : 12]; + assign dataCache_1_io_cpu_execute_isValid = (execute_arbitration_isValid && execute_MEMORY_ENABLE); + assign dataCache_1_io_cpu_execute_address = execute_SRC_ADD; + always @(*) begin + case(execute_DBusCachedPlugin_size) + 2'b00 : begin + _zz_execute_MEMORY_STORE_DATA_RF = {{{execute_RS2[7 : 0],execute_RS2[7 : 0]},execute_RS2[7 : 0]},execute_RS2[7 : 0]}; + end + 2'b01 : begin + _zz_execute_MEMORY_STORE_DATA_RF = {execute_RS2[15 : 0],execute_RS2[15 : 0]}; + end + default : begin + _zz_execute_MEMORY_STORE_DATA_RF = execute_RS2[31 : 0]; + end + endcase + end + + assign dataCache_1_io_cpu_flush_valid = (execute_arbitration_isValid && execute_MEMORY_MANAGMENT); + assign dataCache_1_io_cpu_flush_isStall = (dataCache_1_io_cpu_flush_valid && (! dataCache_1_io_cpu_flush_ready)); + assign when_DBusCachedPlugin_l343 = (dataCache_1_io_cpu_flush_isStall || dataCache_1_io_cpu_execute_haltIt); + assign when_DBusCachedPlugin_l359 = (dataCache_1_io_cpu_execute_refilling && execute_arbitration_isValid); + assign dataCache_1_io_cpu_memory_isValid = (memory_arbitration_isValid && memory_MEMORY_ENABLE); + assign dataCache_1_io_cpu_memory_address = memory_REGFILE_WRITE_DATA; + assign DBusCachedPlugin_mmuBus_cmd_0_isValid = dataCache_1_io_cpu_memory_isValid; + assign DBusCachedPlugin_mmuBus_cmd_0_isStuck = memory_arbitration_isStuck; + assign DBusCachedPlugin_mmuBus_cmd_0_virtualAddress = dataCache_1_io_cpu_memory_address; + assign DBusCachedPlugin_mmuBus_cmd_0_bypassTranslation = 1'b0; + assign DBusCachedPlugin_mmuBus_end = ((! memory_arbitration_isStuck) || memory_arbitration_removeIt); + always @(*) begin + dataCache_1_io_cpu_memory_mmuRsp_isIoAccess = DBusCachedPlugin_mmuBus_rsp_isIoAccess; + if(when_DBusCachedPlugin_l386) begin + dataCache_1_io_cpu_memory_mmuRsp_isIoAccess = 1'b1; + end + end + + assign when_DBusCachedPlugin_l386 = (1'b0 && (! dataCache_1_io_cpu_memory_isWrite)); + always @(*) begin + dataCache_1_io_cpu_writeBack_isValid = (writeBack_arbitration_isValid && writeBack_MEMORY_ENABLE); + if(writeBack_arbitration_haltByOther) begin + dataCache_1_io_cpu_writeBack_isValid = 1'b0; + end + end + + assign dataCache_1_io_cpu_writeBack_isUser = (CsrPlugin_privilege == 2'b00); + assign dataCache_1_io_cpu_writeBack_address = writeBack_REGFILE_WRITE_DATA; + assign dataCache_1_io_cpu_writeBack_storeData[31 : 0] = writeBack_MEMORY_STORE_DATA_RF; + always @(*) begin + DBusCachedPlugin_redoBranch_valid = 1'b0; + if(when_DBusCachedPlugin_l438) begin + if(dataCache_1_io_cpu_redo) begin + DBusCachedPlugin_redoBranch_valid = 1'b1; + end + end + end + + assign DBusCachedPlugin_redoBranch_payload = writeBack_PC; + always @(*) begin + DBusCachedPlugin_exceptionBus_valid = 1'b0; + if(when_DBusCachedPlugin_l438) begin + if(dataCache_1_io_cpu_writeBack_accessError) begin + DBusCachedPlugin_exceptionBus_valid = 1'b1; + end + if(dataCache_1_io_cpu_writeBack_mmuException) begin + DBusCachedPlugin_exceptionBus_valid = 1'b1; + end + if(dataCache_1_io_cpu_writeBack_unalignedAccess) begin + DBusCachedPlugin_exceptionBus_valid = 1'b1; + end + if(dataCache_1_io_cpu_redo) begin + DBusCachedPlugin_exceptionBus_valid = 1'b0; + end + end + end + + assign DBusCachedPlugin_exceptionBus_payload_badAddr = writeBack_REGFILE_WRITE_DATA; + always @(*) begin + DBusCachedPlugin_exceptionBus_payload_code = 4'bxxxx; + if(when_DBusCachedPlugin_l438) begin + if(dataCache_1_io_cpu_writeBack_accessError) begin + DBusCachedPlugin_exceptionBus_payload_code = {1'd0, _zz_DBusCachedPlugin_exceptionBus_payload_code}; + end + if(dataCache_1_io_cpu_writeBack_mmuException) begin + DBusCachedPlugin_exceptionBus_payload_code = (writeBack_MEMORY_WR ? 4'b1111 : 4'b1101); + end + if(dataCache_1_io_cpu_writeBack_unalignedAccess) begin + DBusCachedPlugin_exceptionBus_payload_code = {1'd0, _zz_DBusCachedPlugin_exceptionBus_payload_code_1}; + end + end + end + + assign when_DBusCachedPlugin_l438 = (writeBack_arbitration_isValid && writeBack_MEMORY_ENABLE); + assign when_DBusCachedPlugin_l458 = (dataCache_1_io_cpu_writeBack_isValid && dataCache_1_io_cpu_writeBack_haltIt); + assign writeBack_DBusCachedPlugin_rspSplits_0 = dataCache_1_io_cpu_writeBack_data[7 : 0]; + assign writeBack_DBusCachedPlugin_rspSplits_1 = dataCache_1_io_cpu_writeBack_data[15 : 8]; + assign writeBack_DBusCachedPlugin_rspSplits_2 = dataCache_1_io_cpu_writeBack_data[23 : 16]; + assign writeBack_DBusCachedPlugin_rspSplits_3 = dataCache_1_io_cpu_writeBack_data[31 : 24]; + always @(*) begin + writeBack_DBusCachedPlugin_rspShifted[7 : 0] = _zz_writeBack_DBusCachedPlugin_rspShifted; + writeBack_DBusCachedPlugin_rspShifted[15 : 8] = _zz_writeBack_DBusCachedPlugin_rspShifted_2; + writeBack_DBusCachedPlugin_rspShifted[23 : 16] = writeBack_DBusCachedPlugin_rspSplits_2; + writeBack_DBusCachedPlugin_rspShifted[31 : 24] = writeBack_DBusCachedPlugin_rspSplits_3; + end + + assign writeBack_DBusCachedPlugin_rspRf = writeBack_DBusCachedPlugin_rspShifted[31 : 0]; + assign switch_Misc_l200 = writeBack_INSTRUCTION[13 : 12]; + assign _zz_writeBack_DBusCachedPlugin_rspFormated = (writeBack_DBusCachedPlugin_rspRf[7] && (! writeBack_INSTRUCTION[14])); + always @(*) begin + _zz_writeBack_DBusCachedPlugin_rspFormated_1[31] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[30] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[29] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[28] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[27] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[26] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[25] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[24] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[23] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[22] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[21] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[20] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[19] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[18] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[17] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[16] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[15] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[14] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[13] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[12] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[11] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[10] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[9] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[8] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[7 : 0] = writeBack_DBusCachedPlugin_rspRf[7 : 0]; + end + + assign _zz_writeBack_DBusCachedPlugin_rspFormated_2 = (writeBack_DBusCachedPlugin_rspRf[15] && (! writeBack_INSTRUCTION[14])); + always @(*) begin + _zz_writeBack_DBusCachedPlugin_rspFormated_3[31] = _zz_writeBack_DBusCachedPlugin_rspFormated_2; + _zz_writeBack_DBusCachedPlugin_rspFormated_3[30] = _zz_writeBack_DBusCachedPlugin_rspFormated_2; + _zz_writeBack_DBusCachedPlugin_rspFormated_3[29] = _zz_writeBack_DBusCachedPlugin_rspFormated_2; + _zz_writeBack_DBusCachedPlugin_rspFormated_3[28] = _zz_writeBack_DBusCachedPlugin_rspFormated_2; + _zz_writeBack_DBusCachedPlugin_rspFormated_3[27] = _zz_writeBack_DBusCachedPlugin_rspFormated_2; + _zz_writeBack_DBusCachedPlugin_rspFormated_3[26] = _zz_writeBack_DBusCachedPlugin_rspFormated_2; + _zz_writeBack_DBusCachedPlugin_rspFormated_3[25] = _zz_writeBack_DBusCachedPlugin_rspFormated_2; + _zz_writeBack_DBusCachedPlugin_rspFormated_3[24] = _zz_writeBack_DBusCachedPlugin_rspFormated_2; + _zz_writeBack_DBusCachedPlugin_rspFormated_3[23] = _zz_writeBack_DBusCachedPlugin_rspFormated_2; + _zz_writeBack_DBusCachedPlugin_rspFormated_3[22] = _zz_writeBack_DBusCachedPlugin_rspFormated_2; + _zz_writeBack_DBusCachedPlugin_rspFormated_3[21] = _zz_writeBack_DBusCachedPlugin_rspFormated_2; + _zz_writeBack_DBusCachedPlugin_rspFormated_3[20] = _zz_writeBack_DBusCachedPlugin_rspFormated_2; + _zz_writeBack_DBusCachedPlugin_rspFormated_3[19] = _zz_writeBack_DBusCachedPlugin_rspFormated_2; + _zz_writeBack_DBusCachedPlugin_rspFormated_3[18] = _zz_writeBack_DBusCachedPlugin_rspFormated_2; + _zz_writeBack_DBusCachedPlugin_rspFormated_3[17] = _zz_writeBack_DBusCachedPlugin_rspFormated_2; + _zz_writeBack_DBusCachedPlugin_rspFormated_3[16] = _zz_writeBack_DBusCachedPlugin_rspFormated_2; + _zz_writeBack_DBusCachedPlugin_rspFormated_3[15 : 0] = writeBack_DBusCachedPlugin_rspRf[15 : 0]; + end + + always @(*) begin + case(switch_Misc_l200) + 2'b00 : begin + writeBack_DBusCachedPlugin_rspFormated = _zz_writeBack_DBusCachedPlugin_rspFormated_1; + end + 2'b01 : begin + writeBack_DBusCachedPlugin_rspFormated = _zz_writeBack_DBusCachedPlugin_rspFormated_3; + end + default : begin + writeBack_DBusCachedPlugin_rspFormated = writeBack_DBusCachedPlugin_rspRf; + end + endcase + end + + assign when_DBusCachedPlugin_l484 = (writeBack_arbitration_isValid && writeBack_MEMORY_ENABLE); + assign IBusCachedPlugin_mmuBus_rsp_physicalAddress = IBusCachedPlugin_mmuBus_cmd_0_virtualAddress; + assign IBusCachedPlugin_mmuBus_rsp_allowRead = 1'b1; + assign IBusCachedPlugin_mmuBus_rsp_allowWrite = 1'b1; + assign IBusCachedPlugin_mmuBus_rsp_allowExecute = 1'b1; + assign IBusCachedPlugin_mmuBus_rsp_isIoAccess = IBusCachedPlugin_mmuBus_rsp_physicalAddress[31]; + assign IBusCachedPlugin_mmuBus_rsp_isPaging = 1'b0; + assign IBusCachedPlugin_mmuBus_rsp_exception = 1'b0; + assign IBusCachedPlugin_mmuBus_rsp_refilling = 1'b0; + assign IBusCachedPlugin_mmuBus_busy = 1'b0; + assign DBusCachedPlugin_mmuBus_rsp_physicalAddress = DBusCachedPlugin_mmuBus_cmd_0_virtualAddress; + assign DBusCachedPlugin_mmuBus_rsp_allowRead = 1'b1; + assign DBusCachedPlugin_mmuBus_rsp_allowWrite = 1'b1; + assign DBusCachedPlugin_mmuBus_rsp_allowExecute = 1'b1; + assign DBusCachedPlugin_mmuBus_rsp_isIoAccess = DBusCachedPlugin_mmuBus_rsp_physicalAddress[31]; + assign DBusCachedPlugin_mmuBus_rsp_isPaging = 1'b0; + assign DBusCachedPlugin_mmuBus_rsp_exception = 1'b0; + assign DBusCachedPlugin_mmuBus_rsp_refilling = 1'b0; + assign DBusCachedPlugin_mmuBus_busy = 1'b0; + assign _zz_decode_IS_RS2_SIGNED_1 = ((decode_INSTRUCTION & 32'h00004050) == 32'h00004050); + assign _zz_decode_IS_RS2_SIGNED_2 = ((decode_INSTRUCTION & 32'h00000004) == 32'h00000004); + assign _zz_decode_IS_RS2_SIGNED_3 = ((decode_INSTRUCTION & 32'h00000048) == 32'h00000048); + assign _zz_decode_IS_RS2_SIGNED_4 = ((decode_INSTRUCTION & 32'h00001000) == 32'h0); + assign _zz_decode_IS_RS2_SIGNED = {(_zz_decode_IS_RS2_SIGNED_4 != 1'b0),{(_zz_decode_IS_RS2_SIGNED_4 != 1'b0),{((_zz__zz_decode_IS_RS2_SIGNED == _zz__zz_decode_IS_RS2_SIGNED_1) != 1'b0),{(_zz__zz_decode_IS_RS2_SIGNED_2 != 1'b0),{(_zz__zz_decode_IS_RS2_SIGNED_3 != _zz__zz_decode_IS_RS2_SIGNED_4),{_zz__zz_decode_IS_RS2_SIGNED_5,{_zz__zz_decode_IS_RS2_SIGNED_7,_zz__zz_decode_IS_RS2_SIGNED_10}}}}}}}; + assign _zz_decode_SRC1_CTRL_2 = _zz_decode_IS_RS2_SIGNED[2 : 1]; + assign _zz_decode_SRC1_CTRL_1 = _zz_decode_SRC1_CTRL_2; + assign _zz_decode_ALU_CTRL_2 = _zz_decode_IS_RS2_SIGNED[7 : 6]; + assign _zz_decode_ALU_CTRL_1 = _zz_decode_ALU_CTRL_2; + assign _zz_decode_SRC2_CTRL_2 = _zz_decode_IS_RS2_SIGNED[9 : 8]; + assign _zz_decode_SRC2_CTRL_1 = _zz_decode_SRC2_CTRL_2; + assign _zz_decode_ALU_BITWISE_CTRL_2 = _zz_decode_IS_RS2_SIGNED[19 : 18]; + assign _zz_decode_ALU_BITWISE_CTRL_1 = _zz_decode_ALU_BITWISE_CTRL_2; + assign _zz_decode_SHIFT_CTRL_2 = _zz_decode_IS_RS2_SIGNED[22 : 21]; + assign _zz_decode_SHIFT_CTRL_1 = _zz_decode_SHIFT_CTRL_2; + assign _zz_decode_BRANCH_CTRL_2 = _zz_decode_IS_RS2_SIGNED[24 : 23]; + assign _zz_decode_BRANCH_CTRL = _zz_decode_BRANCH_CTRL_2; + assign _zz_decode_ENV_CTRL_2 = _zz_decode_IS_RS2_SIGNED[27 : 26]; + assign _zz_decode_ENV_CTRL_1 = _zz_decode_ENV_CTRL_2; + assign decodeExceptionPort_valid = (decode_arbitration_isValid && (! decode_LEGAL_INSTRUCTION)); + assign decodeExceptionPort_payload_code = 4'b0010; + assign decodeExceptionPort_payload_badAddr = decode_INSTRUCTION; + assign when_RegFilePlugin_l63 = (decode_INSTRUCTION[11 : 7] == 5'h0); + assign decode_RegFilePlugin_regFileReadAddress1 = decode_INSTRUCTION_ANTICIPATED[19 : 15]; + assign decode_RegFilePlugin_regFileReadAddress2 = decode_INSTRUCTION_ANTICIPATED[24 : 20]; + assign decode_RegFilePlugin_rs1Data = _zz_RegFilePlugin_regFile_port0; + assign decode_RegFilePlugin_rs2Data = _zz_RegFilePlugin_regFile_port1; + always @(*) begin + lastStageRegFileWrite_valid = (_zz_lastStageRegFileWrite_valid && writeBack_arbitration_isFiring); + if(_zz_7) begin + lastStageRegFileWrite_valid = 1'b1; + end + end + + always @(*) begin + lastStageRegFileWrite_payload_address = _zz_lastStageRegFileWrite_payload_address[11 : 7]; + if(_zz_7) begin + lastStageRegFileWrite_payload_address = 5'h0; + end + end + + always @(*) begin + lastStageRegFileWrite_payload_data = _zz_decode_RS2_2; + if(_zz_7) begin + lastStageRegFileWrite_payload_data = 32'h0; + end + end + + always @(*) begin + case(execute_ALU_BITWISE_CTRL) + `AluBitwiseCtrlEnum_binary_sequential_AND_1 : begin + execute_IntAluPlugin_bitwise = (execute_SRC1 & execute_SRC2); + end + `AluBitwiseCtrlEnum_binary_sequential_OR_1 : begin + execute_IntAluPlugin_bitwise = (execute_SRC1 | execute_SRC2); + end + default : begin + execute_IntAluPlugin_bitwise = (execute_SRC1 ^ execute_SRC2); + end + endcase + end + + always @(*) begin + case(execute_ALU_CTRL) + `AluCtrlEnum_binary_sequential_BITWISE : begin + _zz_execute_REGFILE_WRITE_DATA = execute_IntAluPlugin_bitwise; + end + `AluCtrlEnum_binary_sequential_SLT_SLTU : begin + _zz_execute_REGFILE_WRITE_DATA = {31'd0, _zz__zz_execute_REGFILE_WRITE_DATA}; + end + default : begin + _zz_execute_REGFILE_WRITE_DATA = execute_SRC_ADD_SUB; + end + endcase + end + + always @(*) begin + case(execute_SRC1_CTRL) + `Src1CtrlEnum_binary_sequential_RS : begin + _zz_execute_SRC1 = execute_RS1; + end + `Src1CtrlEnum_binary_sequential_PC_INCREMENT : begin + _zz_execute_SRC1 = {29'd0, _zz__zz_execute_SRC1}; + end + `Src1CtrlEnum_binary_sequential_IMU : begin + _zz_execute_SRC1 = {execute_INSTRUCTION[31 : 12],12'h0}; + end + default : begin + _zz_execute_SRC1 = {27'd0, _zz__zz_execute_SRC1_1}; + end + endcase + end + + assign _zz_execute_SRC2_1 = execute_INSTRUCTION[31]; + always @(*) begin + _zz_execute_SRC2_2[19] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[18] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[17] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[16] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[15] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[14] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[13] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[12] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[11] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[10] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[9] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[8] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[7] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[6] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[5] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[4] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[3] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[2] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[1] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[0] = _zz_execute_SRC2_1; + end + + assign _zz_execute_SRC2_3 = _zz__zz_execute_SRC2_3[11]; + always @(*) begin + _zz_execute_SRC2_4[19] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[18] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[17] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[16] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[15] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[14] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[13] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[12] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[11] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[10] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[9] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[8] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[7] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[6] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[5] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[4] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[3] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[2] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[1] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[0] = _zz_execute_SRC2_3; + end + + always @(*) begin + case(execute_SRC2_CTRL) + `Src2CtrlEnum_binary_sequential_RS : begin + _zz_execute_SRC2_5 = execute_RS2; + end + `Src2CtrlEnum_binary_sequential_IMI : begin + _zz_execute_SRC2_5 = {_zz_execute_SRC2_2,execute_INSTRUCTION[31 : 20]}; + end + `Src2CtrlEnum_binary_sequential_IMS : begin + _zz_execute_SRC2_5 = {_zz_execute_SRC2_4,{execute_INSTRUCTION[31 : 25],execute_INSTRUCTION[11 : 7]}}; + end + default : begin + _zz_execute_SRC2_5 = _zz_execute_SRC2; + end + endcase + end + + always @(*) begin + execute_SrcPlugin_addSub = _zz_execute_SrcPlugin_addSub; + if(execute_SRC2_FORCE_ZERO) begin + execute_SrcPlugin_addSub = execute_SRC1; + end + end + + assign execute_SrcPlugin_less = ((execute_SRC1[31] == execute_SRC2[31]) ? execute_SrcPlugin_addSub[31] : (execute_SRC_LESS_UNSIGNED ? execute_SRC2[31] : execute_SRC1[31])); + assign execute_FullBarrelShifterPlugin_amplitude = execute_SRC2[4 : 0]; + always @(*) begin + _zz_execute_FullBarrelShifterPlugin_reversed[0] = execute_SRC1[31]; + _zz_execute_FullBarrelShifterPlugin_reversed[1] = execute_SRC1[30]; + _zz_execute_FullBarrelShifterPlugin_reversed[2] = execute_SRC1[29]; + _zz_execute_FullBarrelShifterPlugin_reversed[3] = execute_SRC1[28]; + _zz_execute_FullBarrelShifterPlugin_reversed[4] = execute_SRC1[27]; + _zz_execute_FullBarrelShifterPlugin_reversed[5] = execute_SRC1[26]; + _zz_execute_FullBarrelShifterPlugin_reversed[6] = execute_SRC1[25]; + _zz_execute_FullBarrelShifterPlugin_reversed[7] = execute_SRC1[24]; + _zz_execute_FullBarrelShifterPlugin_reversed[8] = execute_SRC1[23]; + _zz_execute_FullBarrelShifterPlugin_reversed[9] = execute_SRC1[22]; + _zz_execute_FullBarrelShifterPlugin_reversed[10] = execute_SRC1[21]; + _zz_execute_FullBarrelShifterPlugin_reversed[11] = execute_SRC1[20]; + _zz_execute_FullBarrelShifterPlugin_reversed[12] = execute_SRC1[19]; + _zz_execute_FullBarrelShifterPlugin_reversed[13] = execute_SRC1[18]; + _zz_execute_FullBarrelShifterPlugin_reversed[14] = execute_SRC1[17]; + _zz_execute_FullBarrelShifterPlugin_reversed[15] = execute_SRC1[16]; + _zz_execute_FullBarrelShifterPlugin_reversed[16] = execute_SRC1[15]; + _zz_execute_FullBarrelShifterPlugin_reversed[17] = execute_SRC1[14]; + _zz_execute_FullBarrelShifterPlugin_reversed[18] = execute_SRC1[13]; + _zz_execute_FullBarrelShifterPlugin_reversed[19] = execute_SRC1[12]; + _zz_execute_FullBarrelShifterPlugin_reversed[20] = execute_SRC1[11]; + _zz_execute_FullBarrelShifterPlugin_reversed[21] = execute_SRC1[10]; + _zz_execute_FullBarrelShifterPlugin_reversed[22] = execute_SRC1[9]; + _zz_execute_FullBarrelShifterPlugin_reversed[23] = execute_SRC1[8]; + _zz_execute_FullBarrelShifterPlugin_reversed[24] = execute_SRC1[7]; + _zz_execute_FullBarrelShifterPlugin_reversed[25] = execute_SRC1[6]; + _zz_execute_FullBarrelShifterPlugin_reversed[26] = execute_SRC1[5]; + _zz_execute_FullBarrelShifterPlugin_reversed[27] = execute_SRC1[4]; + _zz_execute_FullBarrelShifterPlugin_reversed[28] = execute_SRC1[3]; + _zz_execute_FullBarrelShifterPlugin_reversed[29] = execute_SRC1[2]; + _zz_execute_FullBarrelShifterPlugin_reversed[30] = execute_SRC1[1]; + _zz_execute_FullBarrelShifterPlugin_reversed[31] = execute_SRC1[0]; + end + + assign execute_FullBarrelShifterPlugin_reversed = ((execute_SHIFT_CTRL == `ShiftCtrlEnum_binary_sequential_SLL_1) ? _zz_execute_FullBarrelShifterPlugin_reversed : execute_SRC1); + always @(*) begin + _zz_decode_RS2_3[0] = memory_SHIFT_RIGHT[31]; + _zz_decode_RS2_3[1] = memory_SHIFT_RIGHT[30]; + _zz_decode_RS2_3[2] = memory_SHIFT_RIGHT[29]; + _zz_decode_RS2_3[3] = memory_SHIFT_RIGHT[28]; + _zz_decode_RS2_3[4] = memory_SHIFT_RIGHT[27]; + _zz_decode_RS2_3[5] = memory_SHIFT_RIGHT[26]; + _zz_decode_RS2_3[6] = memory_SHIFT_RIGHT[25]; + _zz_decode_RS2_3[7] = memory_SHIFT_RIGHT[24]; + _zz_decode_RS2_3[8] = memory_SHIFT_RIGHT[23]; + _zz_decode_RS2_3[9] = memory_SHIFT_RIGHT[22]; + _zz_decode_RS2_3[10] = memory_SHIFT_RIGHT[21]; + _zz_decode_RS2_3[11] = memory_SHIFT_RIGHT[20]; + _zz_decode_RS2_3[12] = memory_SHIFT_RIGHT[19]; + _zz_decode_RS2_3[13] = memory_SHIFT_RIGHT[18]; + _zz_decode_RS2_3[14] = memory_SHIFT_RIGHT[17]; + _zz_decode_RS2_3[15] = memory_SHIFT_RIGHT[16]; + _zz_decode_RS2_3[16] = memory_SHIFT_RIGHT[15]; + _zz_decode_RS2_3[17] = memory_SHIFT_RIGHT[14]; + _zz_decode_RS2_3[18] = memory_SHIFT_RIGHT[13]; + _zz_decode_RS2_3[19] = memory_SHIFT_RIGHT[12]; + _zz_decode_RS2_3[20] = memory_SHIFT_RIGHT[11]; + _zz_decode_RS2_3[21] = memory_SHIFT_RIGHT[10]; + _zz_decode_RS2_3[22] = memory_SHIFT_RIGHT[9]; + _zz_decode_RS2_3[23] = memory_SHIFT_RIGHT[8]; + _zz_decode_RS2_3[24] = memory_SHIFT_RIGHT[7]; + _zz_decode_RS2_3[25] = memory_SHIFT_RIGHT[6]; + _zz_decode_RS2_3[26] = memory_SHIFT_RIGHT[5]; + _zz_decode_RS2_3[27] = memory_SHIFT_RIGHT[4]; + _zz_decode_RS2_3[28] = memory_SHIFT_RIGHT[3]; + _zz_decode_RS2_3[29] = memory_SHIFT_RIGHT[2]; + _zz_decode_RS2_3[30] = memory_SHIFT_RIGHT[1]; + _zz_decode_RS2_3[31] = memory_SHIFT_RIGHT[0]; + end + + always @(*) begin + HazardSimplePlugin_src0Hazard = 1'b0; + if(when_HazardSimplePlugin_l57) begin + if(when_HazardSimplePlugin_l58) begin + if(when_HazardSimplePlugin_l48) begin + HazardSimplePlugin_src0Hazard = 1'b1; + end + end + end + if(when_HazardSimplePlugin_l57_1) begin + if(when_HazardSimplePlugin_l58_1) begin + if(when_HazardSimplePlugin_l48_1) begin + HazardSimplePlugin_src0Hazard = 1'b1; + end + end + end + if(when_HazardSimplePlugin_l57_2) begin + if(when_HazardSimplePlugin_l58_2) begin + if(when_HazardSimplePlugin_l48_2) begin + HazardSimplePlugin_src0Hazard = 1'b1; + end + end + end + if(when_HazardSimplePlugin_l105) begin + HazardSimplePlugin_src0Hazard = 1'b0; + end + end + + always @(*) begin + HazardSimplePlugin_src1Hazard = 1'b0; + if(when_HazardSimplePlugin_l57) begin + if(when_HazardSimplePlugin_l58) begin + if(when_HazardSimplePlugin_l51) begin + HazardSimplePlugin_src1Hazard = 1'b1; + end + end + end + if(when_HazardSimplePlugin_l57_1) begin + if(when_HazardSimplePlugin_l58_1) begin + if(when_HazardSimplePlugin_l51_1) begin + HazardSimplePlugin_src1Hazard = 1'b1; + end + end + end + if(when_HazardSimplePlugin_l57_2) begin + if(when_HazardSimplePlugin_l58_2) begin + if(when_HazardSimplePlugin_l51_2) begin + HazardSimplePlugin_src1Hazard = 1'b1; + end + end + end + if(when_HazardSimplePlugin_l108) begin + HazardSimplePlugin_src1Hazard = 1'b0; + end + end + + assign HazardSimplePlugin_writeBackWrites_valid = (_zz_lastStageRegFileWrite_valid && writeBack_arbitration_isFiring); + assign HazardSimplePlugin_writeBackWrites_payload_address = _zz_lastStageRegFileWrite_payload_address[11 : 7]; + assign HazardSimplePlugin_writeBackWrites_payload_data = _zz_decode_RS2_2; + assign HazardSimplePlugin_addr0Match = (HazardSimplePlugin_writeBackBuffer_payload_address == decode_INSTRUCTION[19 : 15]); + assign HazardSimplePlugin_addr1Match = (HazardSimplePlugin_writeBackBuffer_payload_address == decode_INSTRUCTION[24 : 20]); + assign when_HazardSimplePlugin_l47 = 1'b1; + assign when_HazardSimplePlugin_l48 = (writeBack_INSTRUCTION[11 : 7] == decode_INSTRUCTION[19 : 15]); + assign when_HazardSimplePlugin_l51 = (writeBack_INSTRUCTION[11 : 7] == decode_INSTRUCTION[24 : 20]); + assign when_HazardSimplePlugin_l45 = (writeBack_arbitration_isValid && writeBack_REGFILE_WRITE_VALID); + assign when_HazardSimplePlugin_l57 = (writeBack_arbitration_isValid && writeBack_REGFILE_WRITE_VALID); + assign when_HazardSimplePlugin_l58 = (1'b0 || (! when_HazardSimplePlugin_l47)); + assign when_HazardSimplePlugin_l48_1 = (memory_INSTRUCTION[11 : 7] == decode_INSTRUCTION[19 : 15]); + assign when_HazardSimplePlugin_l51_1 = (memory_INSTRUCTION[11 : 7] == decode_INSTRUCTION[24 : 20]); + assign when_HazardSimplePlugin_l45_1 = (memory_arbitration_isValid && memory_REGFILE_WRITE_VALID); + assign when_HazardSimplePlugin_l57_1 = (memory_arbitration_isValid && memory_REGFILE_WRITE_VALID); + assign when_HazardSimplePlugin_l58_1 = (1'b0 || (! memory_BYPASSABLE_MEMORY_STAGE)); + assign when_HazardSimplePlugin_l48_2 = (execute_INSTRUCTION[11 : 7] == decode_INSTRUCTION[19 : 15]); + assign when_HazardSimplePlugin_l51_2 = (execute_INSTRUCTION[11 : 7] == decode_INSTRUCTION[24 : 20]); + assign when_HazardSimplePlugin_l45_2 = (execute_arbitration_isValid && execute_REGFILE_WRITE_VALID); + assign when_HazardSimplePlugin_l57_2 = (execute_arbitration_isValid && execute_REGFILE_WRITE_VALID); + assign when_HazardSimplePlugin_l58_2 = (1'b0 || (! execute_BYPASSABLE_EXECUTE_STAGE)); + assign when_HazardSimplePlugin_l105 = (! decode_RS1_USE); + assign when_HazardSimplePlugin_l108 = (! decode_RS2_USE); + assign when_HazardSimplePlugin_l113 = (decode_arbitration_isValid && (HazardSimplePlugin_src0Hazard || HazardSimplePlugin_src1Hazard)); + assign execute_BranchPlugin_eq = (execute_SRC1 == execute_SRC2); + assign switch_Misc_l200_1 = execute_INSTRUCTION[14 : 12]; + always @(*) begin + casez(switch_Misc_l200_1) + 3'b000 : begin + _zz_execute_BRANCH_COND_RESULT = execute_BranchPlugin_eq; + end + 3'b001 : begin + _zz_execute_BRANCH_COND_RESULT = (! execute_BranchPlugin_eq); + end + 3'b1?1 : begin + _zz_execute_BRANCH_COND_RESULT = (! execute_SRC_LESS); + end + default : begin + _zz_execute_BRANCH_COND_RESULT = execute_SRC_LESS; + end + endcase + end + + always @(*) begin + case(execute_BRANCH_CTRL) + `BranchCtrlEnum_binary_sequential_INC : begin + _zz_execute_BRANCH_COND_RESULT_1 = 1'b0; + end + `BranchCtrlEnum_binary_sequential_JAL : begin + _zz_execute_BRANCH_COND_RESULT_1 = 1'b1; + end + `BranchCtrlEnum_binary_sequential_JALR : begin + _zz_execute_BRANCH_COND_RESULT_1 = 1'b1; + end + default : begin + _zz_execute_BRANCH_COND_RESULT_1 = _zz_execute_BRANCH_COND_RESULT; + end + endcase + end + + assign _zz_execute_BranchPlugin_missAlignedTarget = execute_INSTRUCTION[31]; + always @(*) begin + _zz_execute_BranchPlugin_missAlignedTarget_1[19] = _zz_execute_BranchPlugin_missAlignedTarget; + _zz_execute_BranchPlugin_missAlignedTarget_1[18] = _zz_execute_BranchPlugin_missAlignedTarget; + _zz_execute_BranchPlugin_missAlignedTarget_1[17] = _zz_execute_BranchPlugin_missAlignedTarget; + _zz_execute_BranchPlugin_missAlignedTarget_1[16] = _zz_execute_BranchPlugin_missAlignedTarget; + _zz_execute_BranchPlugin_missAlignedTarget_1[15] = _zz_execute_BranchPlugin_missAlignedTarget; + _zz_execute_BranchPlugin_missAlignedTarget_1[14] = _zz_execute_BranchPlugin_missAlignedTarget; + _zz_execute_BranchPlugin_missAlignedTarget_1[13] = _zz_execute_BranchPlugin_missAlignedTarget; + _zz_execute_BranchPlugin_missAlignedTarget_1[12] = _zz_execute_BranchPlugin_missAlignedTarget; + _zz_execute_BranchPlugin_missAlignedTarget_1[11] = _zz_execute_BranchPlugin_missAlignedTarget; + _zz_execute_BranchPlugin_missAlignedTarget_1[10] = _zz_execute_BranchPlugin_missAlignedTarget; + _zz_execute_BranchPlugin_missAlignedTarget_1[9] = _zz_execute_BranchPlugin_missAlignedTarget; + _zz_execute_BranchPlugin_missAlignedTarget_1[8] = _zz_execute_BranchPlugin_missAlignedTarget; + _zz_execute_BranchPlugin_missAlignedTarget_1[7] = _zz_execute_BranchPlugin_missAlignedTarget; + _zz_execute_BranchPlugin_missAlignedTarget_1[6] = _zz_execute_BranchPlugin_missAlignedTarget; + _zz_execute_BranchPlugin_missAlignedTarget_1[5] = _zz_execute_BranchPlugin_missAlignedTarget; + _zz_execute_BranchPlugin_missAlignedTarget_1[4] = _zz_execute_BranchPlugin_missAlignedTarget; + _zz_execute_BranchPlugin_missAlignedTarget_1[3] = _zz_execute_BranchPlugin_missAlignedTarget; + _zz_execute_BranchPlugin_missAlignedTarget_1[2] = _zz_execute_BranchPlugin_missAlignedTarget; + _zz_execute_BranchPlugin_missAlignedTarget_1[1] = _zz_execute_BranchPlugin_missAlignedTarget; + _zz_execute_BranchPlugin_missAlignedTarget_1[0] = _zz_execute_BranchPlugin_missAlignedTarget; + end + + assign _zz_execute_BranchPlugin_missAlignedTarget_2 = _zz__zz_execute_BranchPlugin_missAlignedTarget_2[19]; + always @(*) begin + _zz_execute_BranchPlugin_missAlignedTarget_3[10] = _zz_execute_BranchPlugin_missAlignedTarget_2; + _zz_execute_BranchPlugin_missAlignedTarget_3[9] = _zz_execute_BranchPlugin_missAlignedTarget_2; + _zz_execute_BranchPlugin_missAlignedTarget_3[8] = _zz_execute_BranchPlugin_missAlignedTarget_2; + _zz_execute_BranchPlugin_missAlignedTarget_3[7] = _zz_execute_BranchPlugin_missAlignedTarget_2; + _zz_execute_BranchPlugin_missAlignedTarget_3[6] = _zz_execute_BranchPlugin_missAlignedTarget_2; + _zz_execute_BranchPlugin_missAlignedTarget_3[5] = _zz_execute_BranchPlugin_missAlignedTarget_2; + _zz_execute_BranchPlugin_missAlignedTarget_3[4] = _zz_execute_BranchPlugin_missAlignedTarget_2; + _zz_execute_BranchPlugin_missAlignedTarget_3[3] = _zz_execute_BranchPlugin_missAlignedTarget_2; + _zz_execute_BranchPlugin_missAlignedTarget_3[2] = _zz_execute_BranchPlugin_missAlignedTarget_2; + _zz_execute_BranchPlugin_missAlignedTarget_3[1] = _zz_execute_BranchPlugin_missAlignedTarget_2; + _zz_execute_BranchPlugin_missAlignedTarget_3[0] = _zz_execute_BranchPlugin_missAlignedTarget_2; + end + + assign _zz_execute_BranchPlugin_missAlignedTarget_4 = _zz__zz_execute_BranchPlugin_missAlignedTarget_4[11]; + always @(*) begin + _zz_execute_BranchPlugin_missAlignedTarget_5[18] = _zz_execute_BranchPlugin_missAlignedTarget_4; + _zz_execute_BranchPlugin_missAlignedTarget_5[17] = _zz_execute_BranchPlugin_missAlignedTarget_4; + _zz_execute_BranchPlugin_missAlignedTarget_5[16] = _zz_execute_BranchPlugin_missAlignedTarget_4; + _zz_execute_BranchPlugin_missAlignedTarget_5[15] = _zz_execute_BranchPlugin_missAlignedTarget_4; + _zz_execute_BranchPlugin_missAlignedTarget_5[14] = _zz_execute_BranchPlugin_missAlignedTarget_4; + _zz_execute_BranchPlugin_missAlignedTarget_5[13] = _zz_execute_BranchPlugin_missAlignedTarget_4; + _zz_execute_BranchPlugin_missAlignedTarget_5[12] = _zz_execute_BranchPlugin_missAlignedTarget_4; + _zz_execute_BranchPlugin_missAlignedTarget_5[11] = _zz_execute_BranchPlugin_missAlignedTarget_4; + _zz_execute_BranchPlugin_missAlignedTarget_5[10] = _zz_execute_BranchPlugin_missAlignedTarget_4; + _zz_execute_BranchPlugin_missAlignedTarget_5[9] = _zz_execute_BranchPlugin_missAlignedTarget_4; + _zz_execute_BranchPlugin_missAlignedTarget_5[8] = _zz_execute_BranchPlugin_missAlignedTarget_4; + _zz_execute_BranchPlugin_missAlignedTarget_5[7] = _zz_execute_BranchPlugin_missAlignedTarget_4; + _zz_execute_BranchPlugin_missAlignedTarget_5[6] = _zz_execute_BranchPlugin_missAlignedTarget_4; + _zz_execute_BranchPlugin_missAlignedTarget_5[5] = _zz_execute_BranchPlugin_missAlignedTarget_4; + _zz_execute_BranchPlugin_missAlignedTarget_5[4] = _zz_execute_BranchPlugin_missAlignedTarget_4; + _zz_execute_BranchPlugin_missAlignedTarget_5[3] = _zz_execute_BranchPlugin_missAlignedTarget_4; + _zz_execute_BranchPlugin_missAlignedTarget_5[2] = _zz_execute_BranchPlugin_missAlignedTarget_4; + _zz_execute_BranchPlugin_missAlignedTarget_5[1] = _zz_execute_BranchPlugin_missAlignedTarget_4; + _zz_execute_BranchPlugin_missAlignedTarget_5[0] = _zz_execute_BranchPlugin_missAlignedTarget_4; + end + + always @(*) begin + case(execute_BRANCH_CTRL) + `BranchCtrlEnum_binary_sequential_JALR : begin + _zz_execute_BranchPlugin_missAlignedTarget_6 = (_zz__zz_execute_BranchPlugin_missAlignedTarget_6[1] ^ execute_RS1[1]); + end + `BranchCtrlEnum_binary_sequential_JAL : begin + _zz_execute_BranchPlugin_missAlignedTarget_6 = _zz__zz_execute_BranchPlugin_missAlignedTarget_6_1[1]; + end + default : begin + _zz_execute_BranchPlugin_missAlignedTarget_6 = _zz__zz_execute_BranchPlugin_missAlignedTarget_6_2[1]; + end + endcase + end + + assign execute_BranchPlugin_missAlignedTarget = (execute_BRANCH_COND_RESULT && _zz_execute_BranchPlugin_missAlignedTarget_6); + always @(*) begin + case(execute_BRANCH_CTRL) + `BranchCtrlEnum_binary_sequential_JALR : begin + execute_BranchPlugin_branch_src1 = execute_RS1; + end + default : begin + execute_BranchPlugin_branch_src1 = execute_PC; + end + endcase + end + + assign _zz_execute_BranchPlugin_branch_src2 = execute_INSTRUCTION[31]; + always @(*) begin + _zz_execute_BranchPlugin_branch_src2_1[19] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[18] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[17] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[16] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[15] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[14] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[13] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[12] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[11] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[10] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[9] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[8] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[7] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[6] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[5] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[4] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[3] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[2] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[1] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[0] = _zz_execute_BranchPlugin_branch_src2; + end + + always @(*) begin + case(execute_BRANCH_CTRL) + `BranchCtrlEnum_binary_sequential_JALR : begin + execute_BranchPlugin_branch_src2 = {_zz_execute_BranchPlugin_branch_src2_1,execute_INSTRUCTION[31 : 20]}; + end + default : begin + execute_BranchPlugin_branch_src2 = ((execute_BRANCH_CTRL == `BranchCtrlEnum_binary_sequential_JAL) ? {{_zz_execute_BranchPlugin_branch_src2_3,{{{_zz_execute_BranchPlugin_branch_src2_6,execute_INSTRUCTION[19 : 12]},execute_INSTRUCTION[20]},execute_INSTRUCTION[30 : 21]}},1'b0} : {{_zz_execute_BranchPlugin_branch_src2_5,{{{_zz_execute_BranchPlugin_branch_src2_7,_zz_execute_BranchPlugin_branch_src2_8},execute_INSTRUCTION[30 : 25]},execute_INSTRUCTION[11 : 8]}},1'b0}); + if(execute_PREDICTION_HAD_BRANCHED2) begin + execute_BranchPlugin_branch_src2 = {29'd0, _zz_execute_BranchPlugin_branch_src2_9}; + end + end + endcase + end + + assign _zz_execute_BranchPlugin_branch_src2_2 = _zz__zz_execute_BranchPlugin_branch_src2_2[19]; + always @(*) begin + _zz_execute_BranchPlugin_branch_src2_3[10] = _zz_execute_BranchPlugin_branch_src2_2; + _zz_execute_BranchPlugin_branch_src2_3[9] = _zz_execute_BranchPlugin_branch_src2_2; + _zz_execute_BranchPlugin_branch_src2_3[8] = _zz_execute_BranchPlugin_branch_src2_2; + _zz_execute_BranchPlugin_branch_src2_3[7] = _zz_execute_BranchPlugin_branch_src2_2; + _zz_execute_BranchPlugin_branch_src2_3[6] = _zz_execute_BranchPlugin_branch_src2_2; + _zz_execute_BranchPlugin_branch_src2_3[5] = _zz_execute_BranchPlugin_branch_src2_2; + _zz_execute_BranchPlugin_branch_src2_3[4] = _zz_execute_BranchPlugin_branch_src2_2; + _zz_execute_BranchPlugin_branch_src2_3[3] = _zz_execute_BranchPlugin_branch_src2_2; + _zz_execute_BranchPlugin_branch_src2_3[2] = _zz_execute_BranchPlugin_branch_src2_2; + _zz_execute_BranchPlugin_branch_src2_3[1] = _zz_execute_BranchPlugin_branch_src2_2; + _zz_execute_BranchPlugin_branch_src2_3[0] = _zz_execute_BranchPlugin_branch_src2_2; + end + + assign _zz_execute_BranchPlugin_branch_src2_4 = _zz__zz_execute_BranchPlugin_branch_src2_4[11]; + always @(*) begin + _zz_execute_BranchPlugin_branch_src2_5[18] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[17] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[16] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[15] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[14] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[13] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[12] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[11] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[10] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[9] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[8] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[7] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[6] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[5] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[4] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[3] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[2] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[1] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[0] = _zz_execute_BranchPlugin_branch_src2_4; + end + + assign execute_BranchPlugin_branchAdder = (execute_BranchPlugin_branch_src1 + execute_BranchPlugin_branch_src2); + assign BranchPlugin_jumpInterface_valid = ((memory_arbitration_isValid && memory_BRANCH_DO) && (! 1'b0)); + assign BranchPlugin_jumpInterface_payload = memory_BRANCH_CALC; + assign BranchPlugin_branchExceptionPort_valid = (memory_arbitration_isValid && (memory_BRANCH_DO && memory_BRANCH_CALC[1])); + assign BranchPlugin_branchExceptionPort_payload_code = 4'b0000; + assign BranchPlugin_branchExceptionPort_payload_badAddr = memory_BRANCH_CALC; + assign IBusCachedPlugin_decodePrediction_rsp_wasWrong = BranchPlugin_jumpInterface_valid; + always @(*) begin + CsrPlugin_privilege = 2'b11; + if(CsrPlugin_forceMachineWire) begin + CsrPlugin_privilege = 2'b11; + end + end + + assign _zz_when_CsrPlugin_l952 = (CsrPlugin_mip_MTIP && CsrPlugin_mie_MTIE); + assign _zz_when_CsrPlugin_l952_1 = (CsrPlugin_mip_MSIP && CsrPlugin_mie_MSIE); + assign _zz_when_CsrPlugin_l952_2 = (CsrPlugin_mip_MEIP && CsrPlugin_mie_MEIE); + assign CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilegeUncapped = 2'b11; + assign CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilege = ((CsrPlugin_privilege < CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilegeUncapped) ? CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilegeUncapped : CsrPlugin_privilege); + assign _zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code = {decodeExceptionPort_valid,IBusCachedPlugin_decodeExceptionPort_valid}; + assign _zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_1 = _zz__zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_1[0]; + always @(*) begin + CsrPlugin_exceptionPortCtrl_exceptionValids_decode = CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_decode; + if(_zz_when) begin + CsrPlugin_exceptionPortCtrl_exceptionValids_decode = 1'b1; + end + if(decode_arbitration_isFlushed) begin + CsrPlugin_exceptionPortCtrl_exceptionValids_decode = 1'b0; + end + end + + always @(*) begin + CsrPlugin_exceptionPortCtrl_exceptionValids_execute = CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_execute; + if(CsrPlugin_selfException_valid) begin + CsrPlugin_exceptionPortCtrl_exceptionValids_execute = 1'b1; + end + if(execute_arbitration_isFlushed) begin + CsrPlugin_exceptionPortCtrl_exceptionValids_execute = 1'b0; + end + end + + always @(*) begin + CsrPlugin_exceptionPortCtrl_exceptionValids_memory = CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_memory; + if(BranchPlugin_branchExceptionPort_valid) begin + CsrPlugin_exceptionPortCtrl_exceptionValids_memory = 1'b1; + end + if(memory_arbitration_isFlushed) begin + CsrPlugin_exceptionPortCtrl_exceptionValids_memory = 1'b0; + end + end + + always @(*) begin + CsrPlugin_exceptionPortCtrl_exceptionValids_writeBack = CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_writeBack; + if(DBusCachedPlugin_exceptionBus_valid) begin + CsrPlugin_exceptionPortCtrl_exceptionValids_writeBack = 1'b1; + end + if(writeBack_arbitration_isFlushed) begin + CsrPlugin_exceptionPortCtrl_exceptionValids_writeBack = 1'b0; + end + end + + assign when_CsrPlugin_l909 = (! decode_arbitration_isStuck); + assign when_CsrPlugin_l909_1 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l909_2 = (! memory_arbitration_isStuck); + assign when_CsrPlugin_l909_3 = (! writeBack_arbitration_isStuck); + assign when_CsrPlugin_l922 = ({CsrPlugin_exceptionPortCtrl_exceptionValids_writeBack,{CsrPlugin_exceptionPortCtrl_exceptionValids_memory,{CsrPlugin_exceptionPortCtrl_exceptionValids_execute,CsrPlugin_exceptionPortCtrl_exceptionValids_decode}}} != 4'b0000); + assign CsrPlugin_exceptionPendings_0 = CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_decode; + assign CsrPlugin_exceptionPendings_1 = CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_execute; + assign CsrPlugin_exceptionPendings_2 = CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_memory; + assign CsrPlugin_exceptionPendings_3 = CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_writeBack; + assign when_CsrPlugin_l946 = (CsrPlugin_mstatus_MIE || (CsrPlugin_privilege < 2'b11)); + assign when_CsrPlugin_l952 = ((_zz_when_CsrPlugin_l952 && 1'b1) && (! 1'b0)); + assign when_CsrPlugin_l952_1 = ((_zz_when_CsrPlugin_l952_1 && 1'b1) && (! 1'b0)); + assign when_CsrPlugin_l952_2 = ((_zz_when_CsrPlugin_l952_2 && 1'b1) && (! 1'b0)); + assign CsrPlugin_exception = (CsrPlugin_exceptionPortCtrl_exceptionValids_writeBack && CsrPlugin_allowException); + assign CsrPlugin_pipelineLiberator_active = ((CsrPlugin_interrupt_valid && CsrPlugin_allowInterrupts) && decode_arbitration_isValid); + assign when_CsrPlugin_l980 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l980_1 = (! memory_arbitration_isStuck); + assign when_CsrPlugin_l980_2 = (! writeBack_arbitration_isStuck); + assign when_CsrPlugin_l985 = ((! CsrPlugin_pipelineLiberator_active) || decode_arbitration_removeIt); + always @(*) begin + CsrPlugin_pipelineLiberator_done = CsrPlugin_pipelineLiberator_pcValids_2; + if(when_CsrPlugin_l991) begin + CsrPlugin_pipelineLiberator_done = 1'b0; + end + if(CsrPlugin_hadException) begin + CsrPlugin_pipelineLiberator_done = 1'b0; + end + end + + assign when_CsrPlugin_l991 = ({CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_writeBack,{CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_memory,CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_execute}} != 3'b000); + assign CsrPlugin_interruptJump = ((CsrPlugin_interrupt_valid && CsrPlugin_pipelineLiberator_done) && CsrPlugin_allowInterrupts); + always @(*) begin + CsrPlugin_targetPrivilege = CsrPlugin_interrupt_targetPrivilege; + if(CsrPlugin_hadException) begin + CsrPlugin_targetPrivilege = CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilege; + end + end + + always @(*) begin + CsrPlugin_trapCause = CsrPlugin_interrupt_code; + if(CsrPlugin_hadException) begin + CsrPlugin_trapCause = CsrPlugin_exceptionPortCtrl_exceptionContext_code; + end + end + + always @(*) begin + CsrPlugin_xtvec_mode = 2'bxx; + case(CsrPlugin_targetPrivilege) + 2'b11 : begin + CsrPlugin_xtvec_mode = CsrPlugin_mtvec_mode; + end + default : begin + end + endcase + end + + always @(*) begin + CsrPlugin_xtvec_base = 30'bxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx; + case(CsrPlugin_targetPrivilege) + 2'b11 : begin + CsrPlugin_xtvec_base = CsrPlugin_mtvec_base; + end + default : begin + end + endcase + end + + assign when_CsrPlugin_l1019 = (CsrPlugin_hadException || CsrPlugin_interruptJump); + assign when_CsrPlugin_l1064 = (writeBack_arbitration_isValid && (writeBack_ENV_CTRL == `EnvCtrlEnum_binary_sequential_XRET)); + assign switch_CsrPlugin_l1068 = writeBack_INSTRUCTION[29 : 28]; + assign contextSwitching = CsrPlugin_jumpInterface_valid; + assign when_CsrPlugin_l1108 = (execute_arbitration_isValid && (execute_ENV_CTRL == `EnvCtrlEnum_binary_sequential_WFI)); + assign when_CsrPlugin_l1110 = (! execute_CsrPlugin_wfiWake); + assign when_CsrPlugin_l1116 = ({(writeBack_arbitration_isValid && (writeBack_ENV_CTRL == `EnvCtrlEnum_binary_sequential_XRET)),{(memory_arbitration_isValid && (memory_ENV_CTRL == `EnvCtrlEnum_binary_sequential_XRET)),(execute_arbitration_isValid && (execute_ENV_CTRL == `EnvCtrlEnum_binary_sequential_XRET))}} != 3'b000); + assign execute_CsrPlugin_blockedBySideEffects = (({writeBack_arbitration_isValid,memory_arbitration_isValid} != 2'b00) || 1'b0); + always @(*) begin + execute_CsrPlugin_illegalAccess = 1'b1; + if(execute_CsrPlugin_csr_3264) begin + if(execute_CSR_READ_OPCODE) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + end + if(execute_CsrPlugin_csr_3857) begin + if(execute_CSR_READ_OPCODE) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + end + if(execute_CsrPlugin_csr_3858) begin + if(execute_CSR_READ_OPCODE) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + end + if(execute_CsrPlugin_csr_3859) begin + if(execute_CSR_READ_OPCODE) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + end + if(execute_CsrPlugin_csr_3860) begin + if(execute_CSR_READ_OPCODE) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + end + if(execute_CsrPlugin_csr_769) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(execute_CsrPlugin_csr_768) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(execute_CsrPlugin_csr_836) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(execute_CsrPlugin_csr_772) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(execute_CsrPlugin_csr_773) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(execute_CsrPlugin_csr_833) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(execute_CsrPlugin_csr_832) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(execute_CsrPlugin_csr_834) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(execute_CsrPlugin_csr_835) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(execute_CsrPlugin_csr_2816) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(execute_CsrPlugin_csr_2944) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(execute_CsrPlugin_csr_2818) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(execute_CsrPlugin_csr_2946) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(execute_CsrPlugin_csr_3072) begin + if(execute_CSR_READ_OPCODE) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + end + if(execute_CsrPlugin_csr_3200) begin + if(execute_CSR_READ_OPCODE) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + end + if(execute_CsrPlugin_csr_3074) begin + if(execute_CSR_READ_OPCODE) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + end + if(execute_CsrPlugin_csr_3202) begin + if(execute_CSR_READ_OPCODE) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + end + if(execute_CsrPlugin_csr_3008) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(execute_CsrPlugin_csr_4032) begin + if(execute_CSR_READ_OPCODE) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + end + if(CsrPlugin_csrMapping_allowCsrSignal) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(when_CsrPlugin_l1297) begin + execute_CsrPlugin_illegalAccess = 1'b1; + end + if(when_CsrPlugin_l1302) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + end + + always @(*) begin + execute_CsrPlugin_illegalInstruction = 1'b0; + if(when_CsrPlugin_l1136) begin + if(when_CsrPlugin_l1137) begin + execute_CsrPlugin_illegalInstruction = 1'b1; + end + end + end + + always @(*) begin + CsrPlugin_selfException_valid = 1'b0; + if(when_CsrPlugin_l1129) begin + CsrPlugin_selfException_valid = 1'b1; + end + if(when_CsrPlugin_l1144) begin + CsrPlugin_selfException_valid = 1'b1; + end + end + + always @(*) begin + CsrPlugin_selfException_payload_code = 4'bxxxx; + if(when_CsrPlugin_l1129) begin + CsrPlugin_selfException_payload_code = 4'b0010; + end + if(when_CsrPlugin_l1144) begin + case(CsrPlugin_privilege) + 2'b00 : begin + CsrPlugin_selfException_payload_code = 4'b1000; + end + default : begin + CsrPlugin_selfException_payload_code = 4'b1011; + end + endcase + end + end + + assign CsrPlugin_selfException_payload_badAddr = execute_INSTRUCTION; + assign when_CsrPlugin_l1129 = (execute_CsrPlugin_illegalAccess || execute_CsrPlugin_illegalInstruction); + assign when_CsrPlugin_l1136 = (execute_arbitration_isValid && (execute_ENV_CTRL == `EnvCtrlEnum_binary_sequential_XRET)); + assign when_CsrPlugin_l1137 = (CsrPlugin_privilege < execute_INSTRUCTION[29 : 28]); + assign when_CsrPlugin_l1144 = (execute_arbitration_isValid && (execute_ENV_CTRL == `EnvCtrlEnum_binary_sequential_ECALL)); + always @(*) begin + execute_CsrPlugin_writeInstruction = ((execute_arbitration_isValid && execute_IS_CSR) && execute_CSR_WRITE_OPCODE); + if(when_CsrPlugin_l1297) begin + execute_CsrPlugin_writeInstruction = 1'b0; + end + end + + always @(*) begin + execute_CsrPlugin_readInstruction = ((execute_arbitration_isValid && execute_IS_CSR) && execute_CSR_READ_OPCODE); + if(when_CsrPlugin_l1297) begin + execute_CsrPlugin_readInstruction = 1'b0; + end + end + + assign execute_CsrPlugin_writeEnable = (execute_CsrPlugin_writeInstruction && (! execute_arbitration_isStuck)); + assign execute_CsrPlugin_readEnable = (execute_CsrPlugin_readInstruction && (! execute_arbitration_isStuck)); + assign CsrPlugin_csrMapping_hazardFree = (! execute_CsrPlugin_blockedBySideEffects); + assign execute_CsrPlugin_readToWriteData = CsrPlugin_csrMapping_readDataSignal; + assign switch_Misc_l200_2 = execute_INSTRUCTION[13]; + always @(*) begin + case(switch_Misc_l200_2) + 1'b0 : begin + _zz_CsrPlugin_csrMapping_writeDataSignal = execute_SRC1; + end + default : begin + _zz_CsrPlugin_csrMapping_writeDataSignal = (execute_INSTRUCTION[12] ? (execute_CsrPlugin_readToWriteData & (~ execute_SRC1)) : (execute_CsrPlugin_readToWriteData | execute_SRC1)); + end + endcase + end + + assign CsrPlugin_csrMapping_writeDataSignal = _zz_CsrPlugin_csrMapping_writeDataSignal; + assign when_CsrPlugin_l1176 = (execute_arbitration_isValid && execute_IS_CSR); + assign when_CsrPlugin_l1180 = (execute_arbitration_isValid && (execute_IS_CSR || 1'b0)); + assign execute_CsrPlugin_csrAddress = execute_INSTRUCTION[31 : 20]; + assign execute_MulPlugin_a = execute_RS1; + assign execute_MulPlugin_b = execute_RS2; + assign switch_MulPlugin_l87 = execute_INSTRUCTION[13 : 12]; + always @(*) begin + case(switch_MulPlugin_l87) + 2'b01 : begin + execute_MulPlugin_aSigned = 1'b1; + end + 2'b10 : begin + execute_MulPlugin_aSigned = 1'b1; + end + default : begin + execute_MulPlugin_aSigned = 1'b0; + end + endcase + end + + always @(*) begin + case(switch_MulPlugin_l87) + 2'b01 : begin + execute_MulPlugin_bSigned = 1'b1; + end + 2'b10 : begin + execute_MulPlugin_bSigned = 1'b0; + end + default : begin + execute_MulPlugin_bSigned = 1'b0; + end + endcase + end + + assign execute_MulPlugin_aULow = execute_MulPlugin_a[15 : 0]; + assign execute_MulPlugin_bULow = execute_MulPlugin_b[15 : 0]; + assign execute_MulPlugin_aSLow = {1'b0,execute_MulPlugin_a[15 : 0]}; + assign execute_MulPlugin_bSLow = {1'b0,execute_MulPlugin_b[15 : 0]}; + assign execute_MulPlugin_aHigh = {(execute_MulPlugin_aSigned && execute_MulPlugin_a[31]),execute_MulPlugin_a[31 : 16]}; + assign execute_MulPlugin_bHigh = {(execute_MulPlugin_bSigned && execute_MulPlugin_b[31]),execute_MulPlugin_b[31 : 16]}; + assign writeBack_MulPlugin_result = ($signed(_zz_writeBack_MulPlugin_result) + $signed(_zz_writeBack_MulPlugin_result_1)); + assign when_MulPlugin_l147 = (writeBack_arbitration_isValid && writeBack_IS_MUL); + assign switch_MulPlugin_l148 = writeBack_INSTRUCTION[13 : 12]; + assign memory_DivPlugin_frontendOk = 1'b1; + always @(*) begin + memory_DivPlugin_div_counter_willIncrement = 1'b0; + if(when_MulDivIterativePlugin_l128) begin + if(when_MulDivIterativePlugin_l132) begin + memory_DivPlugin_div_counter_willIncrement = 1'b1; + end + end + end + + always @(*) begin + memory_DivPlugin_div_counter_willClear = 1'b0; + if(when_MulDivIterativePlugin_l162) begin + memory_DivPlugin_div_counter_willClear = 1'b1; + end + end + + assign memory_DivPlugin_div_counter_willOverflowIfInc = (memory_DivPlugin_div_counter_value == 6'h21); + assign memory_DivPlugin_div_counter_willOverflow = (memory_DivPlugin_div_counter_willOverflowIfInc && memory_DivPlugin_div_counter_willIncrement); + always @(*) begin + if(memory_DivPlugin_div_counter_willOverflow) begin + memory_DivPlugin_div_counter_valueNext = 6'h0; + end else begin + memory_DivPlugin_div_counter_valueNext = (memory_DivPlugin_div_counter_value + _zz_memory_DivPlugin_div_counter_valueNext); + end + if(memory_DivPlugin_div_counter_willClear) begin + memory_DivPlugin_div_counter_valueNext = 6'h0; + end + end + + assign when_MulDivIterativePlugin_l126 = (memory_DivPlugin_div_counter_value == 6'h20); + assign when_MulDivIterativePlugin_l126_1 = (! memory_arbitration_isStuck); + assign when_MulDivIterativePlugin_l128 = (memory_arbitration_isValid && memory_IS_DIV); + assign when_MulDivIterativePlugin_l129 = ((! memory_DivPlugin_frontendOk) || (! memory_DivPlugin_div_done)); + assign when_MulDivIterativePlugin_l132 = (memory_DivPlugin_frontendOk && (! memory_DivPlugin_div_done)); + assign _zz_memory_DivPlugin_div_stage_0_remainderShifted = memory_DivPlugin_rs1[31 : 0]; + assign memory_DivPlugin_div_stage_0_remainderShifted = {memory_DivPlugin_accumulator[31 : 0],_zz_memory_DivPlugin_div_stage_0_remainderShifted[31]}; + assign memory_DivPlugin_div_stage_0_remainderMinusDenominator = (memory_DivPlugin_div_stage_0_remainderShifted - _zz_memory_DivPlugin_div_stage_0_remainderMinusDenominator); + assign memory_DivPlugin_div_stage_0_outRemainder = ((! memory_DivPlugin_div_stage_0_remainderMinusDenominator[32]) ? _zz_memory_DivPlugin_div_stage_0_outRemainder : _zz_memory_DivPlugin_div_stage_0_outRemainder_1); + assign memory_DivPlugin_div_stage_0_outNumerator = _zz_memory_DivPlugin_div_stage_0_outNumerator[31:0]; + assign when_MulDivIterativePlugin_l151 = (memory_DivPlugin_div_counter_value == 6'h20); + assign _zz_memory_DivPlugin_div_result = (memory_INSTRUCTION[13] ? memory_DivPlugin_accumulator[31 : 0] : memory_DivPlugin_rs1[31 : 0]); + assign when_MulDivIterativePlugin_l162 = (! memory_arbitration_isStuck); + assign _zz_memory_DivPlugin_rs2 = (execute_RS2[31] && execute_IS_RS2_SIGNED); + assign _zz_memory_DivPlugin_rs1 = (1'b0 || ((execute_IS_DIV && execute_RS1[31]) && execute_IS_RS1_SIGNED)); + always @(*) begin + _zz_memory_DivPlugin_rs1_1[32] = (execute_IS_RS1_SIGNED && execute_RS1[31]); + _zz_memory_DivPlugin_rs1_1[31 : 0] = execute_RS1; + end + + assign _zz_CsrPlugin_csrMapping_readDataInit_1 = (_zz_CsrPlugin_csrMapping_readDataInit & externalInterruptArray_regNext); + assign externalInterrupt = (_zz_CsrPlugin_csrMapping_readDataInit_1 != 32'h0); + assign when_Pipeline_l124 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_1 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_2 = ((! writeBack_arbitration_isStuck) && (! CsrPlugin_exceptionPortCtrl_exceptionValids_writeBack)); + assign when_Pipeline_l124_3 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_4 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_5 = (! writeBack_arbitration_isStuck); + assign when_Pipeline_l124_6 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_7 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_8 = (! writeBack_arbitration_isStuck); + assign when_Pipeline_l124_9 = (! execute_arbitration_isStuck); + assign _zz_decode_to_execute_SRC1_CTRL_1 = decode_SRC1_CTRL; + assign _zz_decode_SRC1_CTRL = _zz_decode_SRC1_CTRL_1; + assign when_Pipeline_l124_10 = (! execute_arbitration_isStuck); + assign _zz_execute_SRC1_CTRL = decode_to_execute_SRC1_CTRL; + assign when_Pipeline_l124_11 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_12 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_13 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_14 = (! writeBack_arbitration_isStuck); + assign _zz_decode_to_execute_ALU_CTRL_1 = decode_ALU_CTRL; + assign _zz_decode_ALU_CTRL = _zz_decode_ALU_CTRL_1; + assign when_Pipeline_l124_15 = (! execute_arbitration_isStuck); + assign _zz_execute_ALU_CTRL = decode_to_execute_ALU_CTRL; + assign _zz_decode_to_execute_SRC2_CTRL_1 = decode_SRC2_CTRL; + assign _zz_decode_SRC2_CTRL = _zz_decode_SRC2_CTRL_1; + assign when_Pipeline_l124_16 = (! execute_arbitration_isStuck); + assign _zz_execute_SRC2_CTRL = decode_to_execute_SRC2_CTRL; + assign when_Pipeline_l124_17 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_18 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_19 = (! writeBack_arbitration_isStuck); + assign when_Pipeline_l124_20 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_21 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_22 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_23 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_24 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_25 = (! writeBack_arbitration_isStuck); + assign when_Pipeline_l124_26 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_27 = (! execute_arbitration_isStuck); + assign _zz_decode_to_execute_ALU_BITWISE_CTRL_1 = decode_ALU_BITWISE_CTRL; + assign _zz_decode_ALU_BITWISE_CTRL = _zz_decode_ALU_BITWISE_CTRL_1; + assign when_Pipeline_l124_28 = (! execute_arbitration_isStuck); + assign _zz_execute_ALU_BITWISE_CTRL = decode_to_execute_ALU_BITWISE_CTRL; + assign _zz_decode_to_execute_SHIFT_CTRL_1 = decode_SHIFT_CTRL; + assign _zz_execute_to_memory_SHIFT_CTRL_1 = execute_SHIFT_CTRL; + assign _zz_decode_SHIFT_CTRL = _zz_decode_SHIFT_CTRL_1; + assign when_Pipeline_l124_29 = (! execute_arbitration_isStuck); + assign _zz_execute_SHIFT_CTRL = decode_to_execute_SHIFT_CTRL; + assign when_Pipeline_l124_30 = (! memory_arbitration_isStuck); + assign _zz_memory_SHIFT_CTRL = execute_to_memory_SHIFT_CTRL; + assign _zz_decode_to_execute_BRANCH_CTRL_1 = decode_BRANCH_CTRL; + assign _zz_decode_BRANCH_CTRL_1 = _zz_decode_BRANCH_CTRL; + assign when_Pipeline_l124_31 = (! execute_arbitration_isStuck); + assign _zz_execute_BRANCH_CTRL = decode_to_execute_BRANCH_CTRL; + assign when_Pipeline_l124_32 = (! execute_arbitration_isStuck); + assign _zz_decode_to_execute_ENV_CTRL_1 = decode_ENV_CTRL; + assign _zz_execute_to_memory_ENV_CTRL_1 = execute_ENV_CTRL; + assign _zz_memory_to_writeBack_ENV_CTRL_1 = memory_ENV_CTRL; + assign _zz_decode_ENV_CTRL = _zz_decode_ENV_CTRL_1; + assign when_Pipeline_l124_33 = (! execute_arbitration_isStuck); + assign _zz_execute_ENV_CTRL = decode_to_execute_ENV_CTRL; + assign when_Pipeline_l124_34 = (! memory_arbitration_isStuck); + assign _zz_memory_ENV_CTRL = execute_to_memory_ENV_CTRL; + assign when_Pipeline_l124_35 = (! writeBack_arbitration_isStuck); + assign _zz_writeBack_ENV_CTRL = memory_to_writeBack_ENV_CTRL; + assign when_Pipeline_l124_36 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_37 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_38 = (! writeBack_arbitration_isStuck); + assign when_Pipeline_l124_39 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_40 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_41 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_42 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_43 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_44 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_45 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_46 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_47 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_48 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_49 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_50 = (! writeBack_arbitration_isStuck); + assign when_Pipeline_l124_51 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_52 = (! writeBack_arbitration_isStuck); + assign when_Pipeline_l124_53 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_54 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_55 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_56 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_57 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_58 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_59 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_60 = (! writeBack_arbitration_isStuck); + assign when_Pipeline_l124_61 = (! writeBack_arbitration_isStuck); + assign decode_arbitration_isFlushed = (({writeBack_arbitration_flushNext,{memory_arbitration_flushNext,execute_arbitration_flushNext}} != 3'b000) || ({writeBack_arbitration_flushIt,{memory_arbitration_flushIt,{execute_arbitration_flushIt,decode_arbitration_flushIt}}} != 4'b0000)); + assign execute_arbitration_isFlushed = (({writeBack_arbitration_flushNext,memory_arbitration_flushNext} != 2'b00) || ({writeBack_arbitration_flushIt,{memory_arbitration_flushIt,execute_arbitration_flushIt}} != 3'b000)); + assign memory_arbitration_isFlushed = ((writeBack_arbitration_flushNext != 1'b0) || ({writeBack_arbitration_flushIt,memory_arbitration_flushIt} != 2'b00)); + assign writeBack_arbitration_isFlushed = (1'b0 || (writeBack_arbitration_flushIt != 1'b0)); + assign decode_arbitration_isStuckByOthers = (decode_arbitration_haltByOther || (((1'b0 || execute_arbitration_isStuck) || memory_arbitration_isStuck) || writeBack_arbitration_isStuck)); + assign decode_arbitration_isStuck = (decode_arbitration_haltItself || decode_arbitration_isStuckByOthers); + assign decode_arbitration_isMoving = ((! decode_arbitration_isStuck) && (! decode_arbitration_removeIt)); + assign decode_arbitration_isFiring = ((decode_arbitration_isValid && (! decode_arbitration_isStuck)) && (! decode_arbitration_removeIt)); + assign execute_arbitration_isStuckByOthers = (execute_arbitration_haltByOther || ((1'b0 || memory_arbitration_isStuck) || writeBack_arbitration_isStuck)); + assign execute_arbitration_isStuck = (execute_arbitration_haltItself || execute_arbitration_isStuckByOthers); + assign execute_arbitration_isMoving = ((! execute_arbitration_isStuck) && (! execute_arbitration_removeIt)); + assign execute_arbitration_isFiring = ((execute_arbitration_isValid && (! execute_arbitration_isStuck)) && (! execute_arbitration_removeIt)); + assign memory_arbitration_isStuckByOthers = (memory_arbitration_haltByOther || (1'b0 || writeBack_arbitration_isStuck)); + assign memory_arbitration_isStuck = (memory_arbitration_haltItself || memory_arbitration_isStuckByOthers); + assign memory_arbitration_isMoving = ((! memory_arbitration_isStuck) && (! memory_arbitration_removeIt)); + assign memory_arbitration_isFiring = ((memory_arbitration_isValid && (! memory_arbitration_isStuck)) && (! memory_arbitration_removeIt)); + assign writeBack_arbitration_isStuckByOthers = (writeBack_arbitration_haltByOther || 1'b0); + assign writeBack_arbitration_isStuck = (writeBack_arbitration_haltItself || writeBack_arbitration_isStuckByOthers); + assign writeBack_arbitration_isMoving = ((! writeBack_arbitration_isStuck) && (! writeBack_arbitration_removeIt)); + assign writeBack_arbitration_isFiring = ((writeBack_arbitration_isValid && (! writeBack_arbitration_isStuck)) && (! writeBack_arbitration_removeIt)); + assign when_Pipeline_l151 = ((! execute_arbitration_isStuck) || execute_arbitration_removeIt); + assign when_Pipeline_l154 = ((! decode_arbitration_isStuck) && (! decode_arbitration_removeIt)); + assign when_Pipeline_l151_1 = ((! memory_arbitration_isStuck) || memory_arbitration_removeIt); + assign when_Pipeline_l154_1 = ((! execute_arbitration_isStuck) && (! execute_arbitration_removeIt)); + assign when_Pipeline_l151_2 = ((! writeBack_arbitration_isStuck) || writeBack_arbitration_removeIt); + assign when_Pipeline_l154_2 = ((! memory_arbitration_isStuck) && (! memory_arbitration_removeIt)); + assign when_CsrPlugin_l1264 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_1 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_2 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_3 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_4 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_5 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_6 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_7 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_8 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_9 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_10 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_11 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_12 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_13 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_14 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_15 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_16 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_17 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_18 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_19 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_20 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_21 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_22 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_23 = (! execute_arbitration_isStuck); + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_2 = 32'h0; + if(execute_CsrPlugin_csr_3264) begin + _zz_CsrPlugin_csrMapping_readDataInit_2[12 : 0] = 13'h1000; + _zz_CsrPlugin_csrMapping_readDataInit_2[25 : 20] = 6'h20; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_3 = 32'h0; + if(execute_CsrPlugin_csr_3857) begin + _zz_CsrPlugin_csrMapping_readDataInit_3[3 : 0] = 4'b1011; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_4 = 32'h0; + if(execute_CsrPlugin_csr_3858) begin + _zz_CsrPlugin_csrMapping_readDataInit_4[4 : 0] = 5'h16; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_5 = 32'h0; + if(execute_CsrPlugin_csr_3859) begin + _zz_CsrPlugin_csrMapping_readDataInit_5[5 : 0] = 6'h21; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_6 = 32'h0; + if(execute_CsrPlugin_csr_769) begin + _zz_CsrPlugin_csrMapping_readDataInit_6[31 : 30] = CsrPlugin_misa_base; + _zz_CsrPlugin_csrMapping_readDataInit_6[25 : 0] = CsrPlugin_misa_extensions; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_7 = 32'h0; + if(execute_CsrPlugin_csr_768) begin + _zz_CsrPlugin_csrMapping_readDataInit_7[12 : 11] = CsrPlugin_mstatus_MPP; + _zz_CsrPlugin_csrMapping_readDataInit_7[7 : 7] = CsrPlugin_mstatus_MPIE; + _zz_CsrPlugin_csrMapping_readDataInit_7[3 : 3] = CsrPlugin_mstatus_MIE; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_8 = 32'h0; + if(execute_CsrPlugin_csr_836) begin + _zz_CsrPlugin_csrMapping_readDataInit_8[11 : 11] = CsrPlugin_mip_MEIP; + _zz_CsrPlugin_csrMapping_readDataInit_8[7 : 7] = CsrPlugin_mip_MTIP; + _zz_CsrPlugin_csrMapping_readDataInit_8[3 : 3] = CsrPlugin_mip_MSIP; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_9 = 32'h0; + if(execute_CsrPlugin_csr_772) begin + _zz_CsrPlugin_csrMapping_readDataInit_9[11 : 11] = CsrPlugin_mie_MEIE; + _zz_CsrPlugin_csrMapping_readDataInit_9[7 : 7] = CsrPlugin_mie_MTIE; + _zz_CsrPlugin_csrMapping_readDataInit_9[3 : 3] = CsrPlugin_mie_MSIE; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_10 = 32'h0; + if(execute_CsrPlugin_csr_773) begin + _zz_CsrPlugin_csrMapping_readDataInit_10[31 : 2] = CsrPlugin_mtvec_base; + _zz_CsrPlugin_csrMapping_readDataInit_10[1 : 0] = CsrPlugin_mtvec_mode; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_11 = 32'h0; + if(execute_CsrPlugin_csr_833) begin + _zz_CsrPlugin_csrMapping_readDataInit_11[31 : 0] = CsrPlugin_mepc; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_12 = 32'h0; + if(execute_CsrPlugin_csr_832) begin + _zz_CsrPlugin_csrMapping_readDataInit_12[31 : 0] = CsrPlugin_mscratch; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_13 = 32'h0; + if(execute_CsrPlugin_csr_834) begin + _zz_CsrPlugin_csrMapping_readDataInit_13[31 : 31] = CsrPlugin_mcause_interrupt; + _zz_CsrPlugin_csrMapping_readDataInit_13[3 : 0] = CsrPlugin_mcause_exceptionCode; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_14 = 32'h0; + if(execute_CsrPlugin_csr_835) begin + _zz_CsrPlugin_csrMapping_readDataInit_14[31 : 0] = CsrPlugin_mtval; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_15 = 32'h0; + if(execute_CsrPlugin_csr_2816) begin + _zz_CsrPlugin_csrMapping_readDataInit_15[31 : 0] = CsrPlugin_mcycle[31 : 0]; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_16 = 32'h0; + if(execute_CsrPlugin_csr_2944) begin + _zz_CsrPlugin_csrMapping_readDataInit_16[31 : 0] = CsrPlugin_mcycle[63 : 32]; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_17 = 32'h0; + if(execute_CsrPlugin_csr_2818) begin + _zz_CsrPlugin_csrMapping_readDataInit_17[31 : 0] = CsrPlugin_minstret[31 : 0]; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_18 = 32'h0; + if(execute_CsrPlugin_csr_2946) begin + _zz_CsrPlugin_csrMapping_readDataInit_18[31 : 0] = CsrPlugin_minstret[63 : 32]; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_19 = 32'h0; + if(execute_CsrPlugin_csr_3072) begin + _zz_CsrPlugin_csrMapping_readDataInit_19[31 : 0] = CsrPlugin_mcycle[31 : 0]; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_20 = 32'h0; + if(execute_CsrPlugin_csr_3200) begin + _zz_CsrPlugin_csrMapping_readDataInit_20[31 : 0] = CsrPlugin_mcycle[63 : 32]; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_21 = 32'h0; + if(execute_CsrPlugin_csr_3074) begin + _zz_CsrPlugin_csrMapping_readDataInit_21[31 : 0] = CsrPlugin_minstret[31 : 0]; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_22 = 32'h0; + if(execute_CsrPlugin_csr_3202) begin + _zz_CsrPlugin_csrMapping_readDataInit_22[31 : 0] = CsrPlugin_minstret[63 : 32]; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_23 = 32'h0; + if(execute_CsrPlugin_csr_3008) begin + _zz_CsrPlugin_csrMapping_readDataInit_23[31 : 0] = _zz_CsrPlugin_csrMapping_readDataInit; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_24 = 32'h0; + if(execute_CsrPlugin_csr_4032) begin + _zz_CsrPlugin_csrMapping_readDataInit_24[31 : 0] = _zz_CsrPlugin_csrMapping_readDataInit_1; + end + end + + assign CsrPlugin_csrMapping_readDataInit = (((((_zz_CsrPlugin_csrMapping_readDataInit_2 | _zz_CsrPlugin_csrMapping_readDataInit_3) | (_zz_CsrPlugin_csrMapping_readDataInit_4 | _zz_CsrPlugin_csrMapping_readDataInit_5)) | ((_zz_CsrPlugin_csrMapping_readDataInit_25 | _zz_CsrPlugin_csrMapping_readDataInit_6) | (_zz_CsrPlugin_csrMapping_readDataInit_7 | _zz_CsrPlugin_csrMapping_readDataInit_8))) | (((_zz_CsrPlugin_csrMapping_readDataInit_9 | _zz_CsrPlugin_csrMapping_readDataInit_10) | (_zz_CsrPlugin_csrMapping_readDataInit_11 | _zz_CsrPlugin_csrMapping_readDataInit_12)) | ((_zz_CsrPlugin_csrMapping_readDataInit_13 | _zz_CsrPlugin_csrMapping_readDataInit_14) | (_zz_CsrPlugin_csrMapping_readDataInit_15 | _zz_CsrPlugin_csrMapping_readDataInit_16)))) | (((_zz_CsrPlugin_csrMapping_readDataInit_17 | _zz_CsrPlugin_csrMapping_readDataInit_18) | (_zz_CsrPlugin_csrMapping_readDataInit_19 | _zz_CsrPlugin_csrMapping_readDataInit_20)) | ((_zz_CsrPlugin_csrMapping_readDataInit_21 | _zz_CsrPlugin_csrMapping_readDataInit_22) | (_zz_CsrPlugin_csrMapping_readDataInit_23 | _zz_CsrPlugin_csrMapping_readDataInit_24)))); + assign when_CsrPlugin_l1297 = (CsrPlugin_privilege < execute_CsrPlugin_csrAddress[9 : 8]); + assign when_CsrPlugin_l1302 = ((! execute_arbitration_isValid) || (! execute_IS_CSR)); + assign iBusWishbone_ADR = {_zz_iBusWishbone_ADR_1,_zz_iBusWishbone_ADR}; + assign iBusWishbone_CTI = ((_zz_iBusWishbone_ADR == 3'b111) ? 3'b111 : 3'b010); + assign iBusWishbone_BTE = 2'b00; + assign iBusWishbone_SEL = 4'b1111; + assign iBusWishbone_WE = 1'b0; + assign iBusWishbone_DAT_MOSI = 32'bxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx; + always @(*) begin + iBusWishbone_CYC = 1'b0; + if(when_InstructionCache_l239) begin + iBusWishbone_CYC = 1'b1; + end + end + + always @(*) begin + iBusWishbone_STB = 1'b0; + if(when_InstructionCache_l239) begin + iBusWishbone_STB = 1'b1; + end + end + + assign when_InstructionCache_l239 = (iBus_cmd_valid || (_zz_iBusWishbone_ADR != 3'b000)); + assign iBus_cmd_ready = (iBus_cmd_valid && iBusWishbone_ACK); + assign iBus_rsp_valid = _zz_iBus_rsp_valid; + assign iBus_rsp_payload_data = iBusWishbone_DAT_MISO_regNext; + assign iBus_rsp_payload_error = 1'b0; + assign _zz_dBus_cmd_ready_5 = (dBus_cmd_payload_size == 3'b101); + assign _zz_dBus_cmd_ready_1 = dBus_cmd_valid; + assign _zz_dBus_cmd_ready_3 = dBus_cmd_payload_wr; + assign _zz_dBus_cmd_ready_4 = ((! _zz_dBus_cmd_ready_5) || (_zz_dBus_cmd_ready == 3'b111)); + assign dBus_cmd_ready = (_zz_dBus_cmd_ready_2 && (_zz_dBus_cmd_ready_3 || _zz_dBus_cmd_ready_4)); + assign dBusWishbone_ADR = ((_zz_dBus_cmd_ready_5 ? {{dBus_cmd_payload_address[31 : 5],_zz_dBus_cmd_ready},2'b00} : {dBus_cmd_payload_address[31 : 2],2'b00}) >>> 2); + assign dBusWishbone_CTI = (_zz_dBus_cmd_ready_5 ? (_zz_dBus_cmd_ready_4 ? 3'b111 : 3'b010) : 3'b000); + assign dBusWishbone_BTE = 2'b00; + assign dBusWishbone_SEL = (_zz_dBus_cmd_ready_3 ? dBus_cmd_payload_mask : 4'b1111); + assign dBusWishbone_WE = _zz_dBus_cmd_ready_3; + assign dBusWishbone_DAT_MOSI = dBus_cmd_payload_data; + assign _zz_dBus_cmd_ready_2 = (_zz_dBus_cmd_ready_1 && dBusWishbone_ACK); + assign dBusWishbone_CYC = _zz_dBus_cmd_ready_1; + assign dBusWishbone_STB = _zz_dBus_cmd_ready_1; + assign dBus_rsp_valid = _zz_dBus_rsp_valid; + assign dBus_rsp_payload_data = dBusWishbone_DAT_MISO_regNext; + assign dBus_rsp_payload_error = 1'b0; + always @(posedge clk) begin + if(reset) begin + IBusCachedPlugin_fetchPc_pcReg <= externalResetVector; + IBusCachedPlugin_fetchPc_correctionReg <= 1'b0; + IBusCachedPlugin_fetchPc_booted <= 1'b0; + IBusCachedPlugin_fetchPc_inc <= 1'b0; + _zz_IBusCachedPlugin_iBusRsp_stages_0_output_ready_2 <= 1'b0; + _zz_IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_valid <= 1'b0; + IBusCachedPlugin_injector_nextPcCalc_valids_0 <= 1'b0; + IBusCachedPlugin_injector_nextPcCalc_valids_1 <= 1'b0; + IBusCachedPlugin_injector_nextPcCalc_valids_2 <= 1'b0; + IBusCachedPlugin_injector_nextPcCalc_valids_3 <= 1'b0; + IBusCachedPlugin_injector_nextPcCalc_valids_4 <= 1'b0; + IBusCachedPlugin_rspCounter <= _zz_IBusCachedPlugin_rspCounter; + IBusCachedPlugin_rspCounter <= 32'h0; + dataCache_1_io_mem_cmd_rValid <= 1'b0; + dataCache_1_io_mem_cmd_s2mPipe_rValid <= 1'b0; + DBusCachedPlugin_rspCounter <= _zz_DBusCachedPlugin_rspCounter; + DBusCachedPlugin_rspCounter <= 32'h0; + _zz_7 <= 1'b1; + HazardSimplePlugin_writeBackBuffer_valid <= 1'b0; + CsrPlugin_misa_base <= 2'b01; + CsrPlugin_misa_extensions <= 26'h0000042; + CsrPlugin_mstatus_MIE <= 1'b0; + CsrPlugin_mstatus_MPIE <= 1'b0; + CsrPlugin_mstatus_MPP <= 2'b11; + CsrPlugin_mie_MEIE <= 1'b0; + CsrPlugin_mie_MTIE <= 1'b0; + CsrPlugin_mie_MSIE <= 1'b0; + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_decode <= 1'b0; + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_execute <= 1'b0; + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_memory <= 1'b0; + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_writeBack <= 1'b0; + CsrPlugin_interrupt_valid <= 1'b0; + CsrPlugin_lastStageWasWfi <= 1'b0; + CsrPlugin_pipelineLiberator_pcValids_0 <= 1'b0; + CsrPlugin_pipelineLiberator_pcValids_1 <= 1'b0; + CsrPlugin_pipelineLiberator_pcValids_2 <= 1'b0; + CsrPlugin_hadException <= 1'b0; + execute_CsrPlugin_wfiWake <= 1'b0; + memory_DivPlugin_div_counter_value <= 6'h0; + _zz_CsrPlugin_csrMapping_readDataInit <= 32'h0; + execute_arbitration_isValid <= 1'b0; + memory_arbitration_isValid <= 1'b0; + writeBack_arbitration_isValid <= 1'b0; + _zz_iBusWishbone_ADR <= 3'b000; + _zz_iBus_rsp_valid <= 1'b0; + _zz_dBus_cmd_ready <= 3'b000; + _zz_dBus_rsp_valid <= 1'b0; + end else begin + if(IBusCachedPlugin_fetchPc_correction) begin + IBusCachedPlugin_fetchPc_correctionReg <= 1'b1; + end + if(IBusCachedPlugin_fetchPc_output_fire) begin + IBusCachedPlugin_fetchPc_correctionReg <= 1'b0; + end + IBusCachedPlugin_fetchPc_booted <= 1'b1; + if(when_Fetcher_l131) begin + IBusCachedPlugin_fetchPc_inc <= 1'b0; + end + if(IBusCachedPlugin_fetchPc_output_fire_1) begin + IBusCachedPlugin_fetchPc_inc <= 1'b1; + end + if(when_Fetcher_l131_1) begin + IBusCachedPlugin_fetchPc_inc <= 1'b0; + end + if(when_Fetcher_l158) begin + IBusCachedPlugin_fetchPc_pcReg <= IBusCachedPlugin_fetchPc_pc; + end + if(IBusCachedPlugin_iBusRsp_flush) begin + _zz_IBusCachedPlugin_iBusRsp_stages_0_output_ready_2 <= 1'b0; + end + if(_zz_IBusCachedPlugin_iBusRsp_stages_0_output_ready) begin + _zz_IBusCachedPlugin_iBusRsp_stages_0_output_ready_2 <= (IBusCachedPlugin_iBusRsp_stages_0_output_valid && (! 1'b0)); + end + if(IBusCachedPlugin_iBusRsp_flush) begin + _zz_IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_valid <= 1'b0; + end + if(IBusCachedPlugin_iBusRsp_stages_1_output_ready) begin + _zz_IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_valid <= (IBusCachedPlugin_iBusRsp_stages_1_output_valid && (! IBusCachedPlugin_iBusRsp_flush)); + end + if(IBusCachedPlugin_fetchPc_flushed) begin + IBusCachedPlugin_injector_nextPcCalc_valids_0 <= 1'b0; + end + if(when_Fetcher_l329) begin + IBusCachedPlugin_injector_nextPcCalc_valids_0 <= 1'b1; + end + if(IBusCachedPlugin_fetchPc_flushed) begin + IBusCachedPlugin_injector_nextPcCalc_valids_1 <= 1'b0; + end + if(when_Fetcher_l329_1) begin + IBusCachedPlugin_injector_nextPcCalc_valids_1 <= IBusCachedPlugin_injector_nextPcCalc_valids_0; + end + if(IBusCachedPlugin_fetchPc_flushed) begin + IBusCachedPlugin_injector_nextPcCalc_valids_1 <= 1'b0; + end + if(IBusCachedPlugin_fetchPc_flushed) begin + IBusCachedPlugin_injector_nextPcCalc_valids_2 <= 1'b0; + end + if(when_Fetcher_l329_2) begin + IBusCachedPlugin_injector_nextPcCalc_valids_2 <= IBusCachedPlugin_injector_nextPcCalc_valids_1; + end + if(IBusCachedPlugin_fetchPc_flushed) begin + IBusCachedPlugin_injector_nextPcCalc_valids_2 <= 1'b0; + end + if(IBusCachedPlugin_fetchPc_flushed) begin + IBusCachedPlugin_injector_nextPcCalc_valids_3 <= 1'b0; + end + if(when_Fetcher_l329_3) begin + IBusCachedPlugin_injector_nextPcCalc_valids_3 <= IBusCachedPlugin_injector_nextPcCalc_valids_2; + end + if(IBusCachedPlugin_fetchPc_flushed) begin + IBusCachedPlugin_injector_nextPcCalc_valids_3 <= 1'b0; + end + if(IBusCachedPlugin_fetchPc_flushed) begin + IBusCachedPlugin_injector_nextPcCalc_valids_4 <= 1'b0; + end + if(when_Fetcher_l329_4) begin + IBusCachedPlugin_injector_nextPcCalc_valids_4 <= IBusCachedPlugin_injector_nextPcCalc_valids_3; + end + if(IBusCachedPlugin_fetchPc_flushed) begin + IBusCachedPlugin_injector_nextPcCalc_valids_4 <= 1'b0; + end + if(iBus_rsp_valid) begin + IBusCachedPlugin_rspCounter <= (IBusCachedPlugin_rspCounter + 32'h00000001); + end + if(dataCache_1_io_mem_cmd_valid) begin + dataCache_1_io_mem_cmd_rValid <= 1'b1; + end + if(dataCache_1_io_mem_cmd_s2mPipe_ready) begin + dataCache_1_io_mem_cmd_rValid <= 1'b0; + end + if(dataCache_1_io_mem_cmd_s2mPipe_ready) begin + dataCache_1_io_mem_cmd_s2mPipe_rValid <= dataCache_1_io_mem_cmd_s2mPipe_valid; + end + if(dBus_rsp_valid) begin + DBusCachedPlugin_rspCounter <= (DBusCachedPlugin_rspCounter + 32'h00000001); + end + _zz_7 <= 1'b0; + HazardSimplePlugin_writeBackBuffer_valid <= HazardSimplePlugin_writeBackWrites_valid; + if(when_CsrPlugin_l909) begin + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_decode <= 1'b0; + end else begin + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_decode <= CsrPlugin_exceptionPortCtrl_exceptionValids_decode; + end + if(when_CsrPlugin_l909_1) begin + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_execute <= (CsrPlugin_exceptionPortCtrl_exceptionValids_decode && (! decode_arbitration_isStuck)); + end else begin + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_execute <= CsrPlugin_exceptionPortCtrl_exceptionValids_execute; + end + if(when_CsrPlugin_l909_2) begin + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_memory <= (CsrPlugin_exceptionPortCtrl_exceptionValids_execute && (! execute_arbitration_isStuck)); + end else begin + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_memory <= CsrPlugin_exceptionPortCtrl_exceptionValids_memory; + end + if(when_CsrPlugin_l909_3) begin + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_writeBack <= (CsrPlugin_exceptionPortCtrl_exceptionValids_memory && (! memory_arbitration_isStuck)); + end else begin + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_writeBack <= 1'b0; + end + CsrPlugin_interrupt_valid <= 1'b0; + if(when_CsrPlugin_l946) begin + if(when_CsrPlugin_l952) begin + CsrPlugin_interrupt_valid <= 1'b1; + end + if(when_CsrPlugin_l952_1) begin + CsrPlugin_interrupt_valid <= 1'b1; + end + if(when_CsrPlugin_l952_2) begin + CsrPlugin_interrupt_valid <= 1'b1; + end + end + CsrPlugin_lastStageWasWfi <= (writeBack_arbitration_isFiring && (writeBack_ENV_CTRL == `EnvCtrlEnum_binary_sequential_WFI)); + if(CsrPlugin_pipelineLiberator_active) begin + if(when_CsrPlugin_l980) begin + CsrPlugin_pipelineLiberator_pcValids_0 <= 1'b1; + end + if(when_CsrPlugin_l980_1) begin + CsrPlugin_pipelineLiberator_pcValids_1 <= CsrPlugin_pipelineLiberator_pcValids_0; + end + if(when_CsrPlugin_l980_2) begin + CsrPlugin_pipelineLiberator_pcValids_2 <= CsrPlugin_pipelineLiberator_pcValids_1; + end + end + if(when_CsrPlugin_l985) begin + CsrPlugin_pipelineLiberator_pcValids_0 <= 1'b0; + CsrPlugin_pipelineLiberator_pcValids_1 <= 1'b0; + CsrPlugin_pipelineLiberator_pcValids_2 <= 1'b0; + end + if(CsrPlugin_interruptJump) begin + CsrPlugin_interrupt_valid <= 1'b0; + end + CsrPlugin_hadException <= CsrPlugin_exception; + if(when_CsrPlugin_l1019) begin + case(CsrPlugin_targetPrivilege) + 2'b11 : begin + CsrPlugin_mstatus_MIE <= 1'b0; + CsrPlugin_mstatus_MPIE <= CsrPlugin_mstatus_MIE; + CsrPlugin_mstatus_MPP <= CsrPlugin_privilege; + end + default : begin + end + endcase + end + if(when_CsrPlugin_l1064) begin + case(switch_CsrPlugin_l1068) + 2'b11 : begin + CsrPlugin_mstatus_MPP <= 2'b00; + CsrPlugin_mstatus_MIE <= CsrPlugin_mstatus_MPIE; + CsrPlugin_mstatus_MPIE <= 1'b1; + end + default : begin + end + endcase + end + execute_CsrPlugin_wfiWake <= (({_zz_when_CsrPlugin_l952_2,{_zz_when_CsrPlugin_l952_1,_zz_when_CsrPlugin_l952}} != 3'b000) || CsrPlugin_thirdPartyWake); + memory_DivPlugin_div_counter_value <= memory_DivPlugin_div_counter_valueNext; + if(when_Pipeline_l151) begin + execute_arbitration_isValid <= 1'b0; + end + if(when_Pipeline_l154) begin + execute_arbitration_isValid <= decode_arbitration_isValid; + end + if(when_Pipeline_l151_1) begin + memory_arbitration_isValid <= 1'b0; + end + if(when_Pipeline_l154_1) begin + memory_arbitration_isValid <= execute_arbitration_isValid; + end + if(when_Pipeline_l151_2) begin + writeBack_arbitration_isValid <= 1'b0; + end + if(when_Pipeline_l154_2) begin + writeBack_arbitration_isValid <= memory_arbitration_isValid; + end + if(execute_CsrPlugin_csr_769) begin + if(execute_CsrPlugin_writeEnable) begin + CsrPlugin_misa_base <= CsrPlugin_csrMapping_writeDataSignal[31 : 30]; + CsrPlugin_misa_extensions <= CsrPlugin_csrMapping_writeDataSignal[25 : 0]; + end + end + if(execute_CsrPlugin_csr_768) begin + if(execute_CsrPlugin_writeEnable) begin + CsrPlugin_mstatus_MPP <= CsrPlugin_csrMapping_writeDataSignal[12 : 11]; + CsrPlugin_mstatus_MPIE <= CsrPlugin_csrMapping_writeDataSignal[7]; + CsrPlugin_mstatus_MIE <= CsrPlugin_csrMapping_writeDataSignal[3]; + end + end + if(execute_CsrPlugin_csr_772) begin + if(execute_CsrPlugin_writeEnable) begin + CsrPlugin_mie_MEIE <= CsrPlugin_csrMapping_writeDataSignal[11]; + CsrPlugin_mie_MTIE <= CsrPlugin_csrMapping_writeDataSignal[7]; + CsrPlugin_mie_MSIE <= CsrPlugin_csrMapping_writeDataSignal[3]; + end + end + if(execute_CsrPlugin_csr_3008) begin + if(execute_CsrPlugin_writeEnable) begin + _zz_CsrPlugin_csrMapping_readDataInit <= CsrPlugin_csrMapping_writeDataSignal[31 : 0]; + end + end + if(when_InstructionCache_l239) begin + if(iBusWishbone_ACK) begin + _zz_iBusWishbone_ADR <= (_zz_iBusWishbone_ADR + 3'b001); + end + end + _zz_iBus_rsp_valid <= (iBusWishbone_CYC && iBusWishbone_ACK); + if((_zz_dBus_cmd_ready_1 && _zz_dBus_cmd_ready_2)) begin + _zz_dBus_cmd_ready <= (_zz_dBus_cmd_ready + 3'b001); + if(_zz_dBus_cmd_ready_4) begin + _zz_dBus_cmd_ready <= 3'b000; + end + end + _zz_dBus_rsp_valid <= ((_zz_dBus_cmd_ready_1 && (! dBusWishbone_WE)) && dBusWishbone_ACK); + end + end + + always @(posedge clk) begin + if(IBusCachedPlugin_iBusRsp_stages_1_output_ready) begin + _zz_IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_payload <= IBusCachedPlugin_iBusRsp_stages_1_output_payload; + end + if(IBusCachedPlugin_iBusRsp_stages_1_input_ready) begin + IBusCachedPlugin_s1_tightlyCoupledHit <= IBusCachedPlugin_s0_tightlyCoupledHit; + end + if(IBusCachedPlugin_iBusRsp_stages_2_input_ready) begin + IBusCachedPlugin_s2_tightlyCoupledHit <= IBusCachedPlugin_s1_tightlyCoupledHit; + end + if(dataCache_1_io_mem_cmd_ready) begin + dataCache_1_io_mem_cmd_rData_wr <= dataCache_1_io_mem_cmd_payload_wr; + dataCache_1_io_mem_cmd_rData_uncached <= dataCache_1_io_mem_cmd_payload_uncached; + dataCache_1_io_mem_cmd_rData_address <= dataCache_1_io_mem_cmd_payload_address; + dataCache_1_io_mem_cmd_rData_data <= dataCache_1_io_mem_cmd_payload_data; + dataCache_1_io_mem_cmd_rData_mask <= dataCache_1_io_mem_cmd_payload_mask; + dataCache_1_io_mem_cmd_rData_size <= dataCache_1_io_mem_cmd_payload_size; + dataCache_1_io_mem_cmd_rData_last <= dataCache_1_io_mem_cmd_payload_last; + end + if(dataCache_1_io_mem_cmd_s2mPipe_ready) begin + dataCache_1_io_mem_cmd_s2mPipe_rData_wr <= dataCache_1_io_mem_cmd_s2mPipe_payload_wr; + dataCache_1_io_mem_cmd_s2mPipe_rData_uncached <= dataCache_1_io_mem_cmd_s2mPipe_payload_uncached; + dataCache_1_io_mem_cmd_s2mPipe_rData_address <= dataCache_1_io_mem_cmd_s2mPipe_payload_address; + dataCache_1_io_mem_cmd_s2mPipe_rData_data <= dataCache_1_io_mem_cmd_s2mPipe_payload_data; + dataCache_1_io_mem_cmd_s2mPipe_rData_mask <= dataCache_1_io_mem_cmd_s2mPipe_payload_mask; + dataCache_1_io_mem_cmd_s2mPipe_rData_size <= dataCache_1_io_mem_cmd_s2mPipe_payload_size; + dataCache_1_io_mem_cmd_s2mPipe_rData_last <= dataCache_1_io_mem_cmd_s2mPipe_payload_last; + end + HazardSimplePlugin_writeBackBuffer_payload_address <= HazardSimplePlugin_writeBackWrites_payload_address; + HazardSimplePlugin_writeBackBuffer_payload_data <= HazardSimplePlugin_writeBackWrites_payload_data; + CsrPlugin_mip_MEIP <= externalInterrupt; + CsrPlugin_mip_MTIP <= timerInterrupt; + CsrPlugin_mip_MSIP <= softwareInterrupt; + CsrPlugin_mcycle <= (CsrPlugin_mcycle + 64'h0000000000000001); + if(writeBack_arbitration_isFiring) begin + CsrPlugin_minstret <= (CsrPlugin_minstret + 64'h0000000000000001); + end + if(_zz_when) begin + CsrPlugin_exceptionPortCtrl_exceptionContext_code <= (_zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_1 ? IBusCachedPlugin_decodeExceptionPort_payload_code : decodeExceptionPort_payload_code); + CsrPlugin_exceptionPortCtrl_exceptionContext_badAddr <= (_zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_1 ? IBusCachedPlugin_decodeExceptionPort_payload_badAddr : decodeExceptionPort_payload_badAddr); + end + if(CsrPlugin_selfException_valid) begin + CsrPlugin_exceptionPortCtrl_exceptionContext_code <= CsrPlugin_selfException_payload_code; + CsrPlugin_exceptionPortCtrl_exceptionContext_badAddr <= CsrPlugin_selfException_payload_badAddr; + end + if(BranchPlugin_branchExceptionPort_valid) begin + CsrPlugin_exceptionPortCtrl_exceptionContext_code <= BranchPlugin_branchExceptionPort_payload_code; + CsrPlugin_exceptionPortCtrl_exceptionContext_badAddr <= BranchPlugin_branchExceptionPort_payload_badAddr; + end + if(DBusCachedPlugin_exceptionBus_valid) begin + CsrPlugin_exceptionPortCtrl_exceptionContext_code <= DBusCachedPlugin_exceptionBus_payload_code; + CsrPlugin_exceptionPortCtrl_exceptionContext_badAddr <= DBusCachedPlugin_exceptionBus_payload_badAddr; + end + if(when_CsrPlugin_l946) begin + if(when_CsrPlugin_l952) begin + CsrPlugin_interrupt_code <= 4'b0111; + CsrPlugin_interrupt_targetPrivilege <= 2'b11; + end + if(when_CsrPlugin_l952_1) begin + CsrPlugin_interrupt_code <= 4'b0011; + CsrPlugin_interrupt_targetPrivilege <= 2'b11; + end + if(when_CsrPlugin_l952_2) begin + CsrPlugin_interrupt_code <= 4'b1011; + CsrPlugin_interrupt_targetPrivilege <= 2'b11; + end + end + if(when_CsrPlugin_l1019) begin + case(CsrPlugin_targetPrivilege) + 2'b11 : begin + CsrPlugin_mcause_interrupt <= (! CsrPlugin_hadException); + CsrPlugin_mcause_exceptionCode <= CsrPlugin_trapCause; + CsrPlugin_mepc <= writeBack_PC; + if(CsrPlugin_hadException) begin + CsrPlugin_mtval <= CsrPlugin_exceptionPortCtrl_exceptionContext_badAddr; + end + end + default : begin + end + endcase + end + if(when_MulDivIterativePlugin_l126) begin + memory_DivPlugin_div_done <= 1'b1; + end + if(when_MulDivIterativePlugin_l126_1) begin + memory_DivPlugin_div_done <= 1'b0; + end + if(when_MulDivIterativePlugin_l128) begin + if(when_MulDivIterativePlugin_l132) begin + memory_DivPlugin_rs1[31 : 0] <= memory_DivPlugin_div_stage_0_outNumerator; + memory_DivPlugin_accumulator[31 : 0] <= memory_DivPlugin_div_stage_0_outRemainder; + if(when_MulDivIterativePlugin_l151) begin + memory_DivPlugin_div_result <= _zz_memory_DivPlugin_div_result_1[31:0]; + end + end + end + if(when_MulDivIterativePlugin_l162) begin + memory_DivPlugin_accumulator <= 65'h0; + memory_DivPlugin_rs1 <= ((_zz_memory_DivPlugin_rs1 ? (~ _zz_memory_DivPlugin_rs1_1) : _zz_memory_DivPlugin_rs1_1) + _zz_memory_DivPlugin_rs1_2); + memory_DivPlugin_rs2 <= ((_zz_memory_DivPlugin_rs2 ? (~ execute_RS2) : execute_RS2) + _zz_memory_DivPlugin_rs2_1); + memory_DivPlugin_div_needRevert <= ((_zz_memory_DivPlugin_rs1 ^ (_zz_memory_DivPlugin_rs2 && (! execute_INSTRUCTION[13]))) && (! (((execute_RS2 == 32'h0) && execute_IS_RS2_SIGNED) && (! execute_INSTRUCTION[13])))); + end + externalInterruptArray_regNext <= externalInterruptArray; + if(when_Pipeline_l124) begin + decode_to_execute_PC <= decode_PC; + end + if(when_Pipeline_l124_1) begin + execute_to_memory_PC <= _zz_execute_SRC2; + end + if(when_Pipeline_l124_2) begin + memory_to_writeBack_PC <= memory_PC; + end + if(when_Pipeline_l124_3) begin + decode_to_execute_INSTRUCTION <= decode_INSTRUCTION; + end + if(when_Pipeline_l124_4) begin + execute_to_memory_INSTRUCTION <= execute_INSTRUCTION; + end + if(when_Pipeline_l124_5) begin + memory_to_writeBack_INSTRUCTION <= memory_INSTRUCTION; + end + if(when_Pipeline_l124_6) begin + decode_to_execute_FORMAL_PC_NEXT <= _zz_decode_to_execute_FORMAL_PC_NEXT; + end + if(when_Pipeline_l124_7) begin + execute_to_memory_FORMAL_PC_NEXT <= execute_FORMAL_PC_NEXT; + end + if(when_Pipeline_l124_8) begin + memory_to_writeBack_FORMAL_PC_NEXT <= _zz_memory_to_writeBack_FORMAL_PC_NEXT; + end + if(when_Pipeline_l124_9) begin + decode_to_execute_MEMORY_FORCE_CONSTISTENCY <= decode_MEMORY_FORCE_CONSTISTENCY; + end + if(when_Pipeline_l124_10) begin + decode_to_execute_SRC1_CTRL <= _zz_decode_to_execute_SRC1_CTRL; + end + if(when_Pipeline_l124_11) begin + decode_to_execute_SRC_USE_SUB_LESS <= decode_SRC_USE_SUB_LESS; + end + if(when_Pipeline_l124_12) begin + decode_to_execute_MEMORY_ENABLE <= decode_MEMORY_ENABLE; + end + if(when_Pipeline_l124_13) begin + execute_to_memory_MEMORY_ENABLE <= execute_MEMORY_ENABLE; + end + if(when_Pipeline_l124_14) begin + memory_to_writeBack_MEMORY_ENABLE <= memory_MEMORY_ENABLE; + end + if(when_Pipeline_l124_15) begin + decode_to_execute_ALU_CTRL <= _zz_decode_to_execute_ALU_CTRL; + end + if(when_Pipeline_l124_16) begin + decode_to_execute_SRC2_CTRL <= _zz_decode_to_execute_SRC2_CTRL; + end + if(when_Pipeline_l124_17) begin + decode_to_execute_REGFILE_WRITE_VALID <= decode_REGFILE_WRITE_VALID; + end + if(when_Pipeline_l124_18) begin + execute_to_memory_REGFILE_WRITE_VALID <= execute_REGFILE_WRITE_VALID; + end + if(when_Pipeline_l124_19) begin + memory_to_writeBack_REGFILE_WRITE_VALID <= memory_REGFILE_WRITE_VALID; + end + if(when_Pipeline_l124_20) begin + decode_to_execute_BYPASSABLE_EXECUTE_STAGE <= decode_BYPASSABLE_EXECUTE_STAGE; + end + if(when_Pipeline_l124_21) begin + decode_to_execute_BYPASSABLE_MEMORY_STAGE <= decode_BYPASSABLE_MEMORY_STAGE; + end + if(when_Pipeline_l124_22) begin + execute_to_memory_BYPASSABLE_MEMORY_STAGE <= execute_BYPASSABLE_MEMORY_STAGE; + end + if(when_Pipeline_l124_23) begin + decode_to_execute_MEMORY_WR <= decode_MEMORY_WR; + end + if(when_Pipeline_l124_24) begin + execute_to_memory_MEMORY_WR <= execute_MEMORY_WR; + end + if(when_Pipeline_l124_25) begin + memory_to_writeBack_MEMORY_WR <= memory_MEMORY_WR; + end + if(when_Pipeline_l124_26) begin + decode_to_execute_MEMORY_MANAGMENT <= decode_MEMORY_MANAGMENT; + end + if(when_Pipeline_l124_27) begin + decode_to_execute_SRC_LESS_UNSIGNED <= decode_SRC_LESS_UNSIGNED; + end + if(when_Pipeline_l124_28) begin + decode_to_execute_ALU_BITWISE_CTRL <= _zz_decode_to_execute_ALU_BITWISE_CTRL; + end + if(when_Pipeline_l124_29) begin + decode_to_execute_SHIFT_CTRL <= _zz_decode_to_execute_SHIFT_CTRL; + end + if(when_Pipeline_l124_30) begin + execute_to_memory_SHIFT_CTRL <= _zz_execute_to_memory_SHIFT_CTRL; + end + if(when_Pipeline_l124_31) begin + decode_to_execute_BRANCH_CTRL <= _zz_decode_to_execute_BRANCH_CTRL; + end + if(when_Pipeline_l124_32) begin + decode_to_execute_IS_CSR <= decode_IS_CSR; + end + if(when_Pipeline_l124_33) begin + decode_to_execute_ENV_CTRL <= _zz_decode_to_execute_ENV_CTRL; + end + if(when_Pipeline_l124_34) begin + execute_to_memory_ENV_CTRL <= _zz_execute_to_memory_ENV_CTRL; + end + if(when_Pipeline_l124_35) begin + memory_to_writeBack_ENV_CTRL <= _zz_memory_to_writeBack_ENV_CTRL; + end + if(when_Pipeline_l124_36) begin + decode_to_execute_IS_MUL <= decode_IS_MUL; + end + if(when_Pipeline_l124_37) begin + execute_to_memory_IS_MUL <= execute_IS_MUL; + end + if(when_Pipeline_l124_38) begin + memory_to_writeBack_IS_MUL <= memory_IS_MUL; + end + if(when_Pipeline_l124_39) begin + decode_to_execute_IS_DIV <= decode_IS_DIV; + end + if(when_Pipeline_l124_40) begin + execute_to_memory_IS_DIV <= execute_IS_DIV; + end + if(when_Pipeline_l124_41) begin + decode_to_execute_IS_RS1_SIGNED <= decode_IS_RS1_SIGNED; + end + if(when_Pipeline_l124_42) begin + decode_to_execute_IS_RS2_SIGNED <= decode_IS_RS2_SIGNED; + end + if(when_Pipeline_l124_43) begin + decode_to_execute_RS1 <= decode_RS1; + end + if(when_Pipeline_l124_44) begin + decode_to_execute_RS2 <= decode_RS2; + end + if(when_Pipeline_l124_45) begin + decode_to_execute_SRC2_FORCE_ZERO <= decode_SRC2_FORCE_ZERO; + end + if(when_Pipeline_l124_46) begin + decode_to_execute_PREDICTION_HAD_BRANCHED2 <= decode_PREDICTION_HAD_BRANCHED2; + end + if(when_Pipeline_l124_47) begin + decode_to_execute_CSR_WRITE_OPCODE <= decode_CSR_WRITE_OPCODE; + end + if(when_Pipeline_l124_48) begin + decode_to_execute_CSR_READ_OPCODE <= decode_CSR_READ_OPCODE; + end + if(when_Pipeline_l124_49) begin + execute_to_memory_MEMORY_STORE_DATA_RF <= execute_MEMORY_STORE_DATA_RF; + end + if(when_Pipeline_l124_50) begin + memory_to_writeBack_MEMORY_STORE_DATA_RF <= memory_MEMORY_STORE_DATA_RF; + end + if(when_Pipeline_l124_51) begin + execute_to_memory_REGFILE_WRITE_DATA <= _zz_decode_RS2; + end + if(when_Pipeline_l124_52) begin + memory_to_writeBack_REGFILE_WRITE_DATA <= _zz_decode_RS2_1; + end + if(when_Pipeline_l124_53) begin + execute_to_memory_SHIFT_RIGHT <= execute_SHIFT_RIGHT; + end + if(when_Pipeline_l124_54) begin + execute_to_memory_BRANCH_DO <= execute_BRANCH_DO; + end + if(when_Pipeline_l124_55) begin + execute_to_memory_BRANCH_CALC <= execute_BRANCH_CALC; + end + if(when_Pipeline_l124_56) begin + execute_to_memory_MUL_LL <= execute_MUL_LL; + end + if(when_Pipeline_l124_57) begin + execute_to_memory_MUL_LH <= execute_MUL_LH; + end + if(when_Pipeline_l124_58) begin + execute_to_memory_MUL_HL <= execute_MUL_HL; + end + if(when_Pipeline_l124_59) begin + execute_to_memory_MUL_HH <= execute_MUL_HH; + end + if(when_Pipeline_l124_60) begin + memory_to_writeBack_MUL_HH <= memory_MUL_HH; + end + if(when_Pipeline_l124_61) begin + memory_to_writeBack_MUL_LOW <= memory_MUL_LOW; + end + if(when_CsrPlugin_l1264) begin + execute_CsrPlugin_csr_3264 <= (decode_INSTRUCTION[31 : 20] == 12'hcc0); + end + if(when_CsrPlugin_l1264_1) begin + execute_CsrPlugin_csr_3857 <= (decode_INSTRUCTION[31 : 20] == 12'hf11); + end + if(when_CsrPlugin_l1264_2) begin + execute_CsrPlugin_csr_3858 <= (decode_INSTRUCTION[31 : 20] == 12'hf12); + end + if(when_CsrPlugin_l1264_3) begin + execute_CsrPlugin_csr_3859 <= (decode_INSTRUCTION[31 : 20] == 12'hf13); + end + if(when_CsrPlugin_l1264_4) begin + execute_CsrPlugin_csr_3860 <= (decode_INSTRUCTION[31 : 20] == 12'hf14); + end + if(when_CsrPlugin_l1264_5) begin + execute_CsrPlugin_csr_769 <= (decode_INSTRUCTION[31 : 20] == 12'h301); + end + if(when_CsrPlugin_l1264_6) begin + execute_CsrPlugin_csr_768 <= (decode_INSTRUCTION[31 : 20] == 12'h300); + end + if(when_CsrPlugin_l1264_7) begin + execute_CsrPlugin_csr_836 <= (decode_INSTRUCTION[31 : 20] == 12'h344); + end + if(when_CsrPlugin_l1264_8) begin + execute_CsrPlugin_csr_772 <= (decode_INSTRUCTION[31 : 20] == 12'h304); + end + if(when_CsrPlugin_l1264_9) begin + execute_CsrPlugin_csr_773 <= (decode_INSTRUCTION[31 : 20] == 12'h305); + end + if(when_CsrPlugin_l1264_10) begin + execute_CsrPlugin_csr_833 <= (decode_INSTRUCTION[31 : 20] == 12'h341); + end + if(when_CsrPlugin_l1264_11) begin + execute_CsrPlugin_csr_832 <= (decode_INSTRUCTION[31 : 20] == 12'h340); + end + if(when_CsrPlugin_l1264_12) begin + execute_CsrPlugin_csr_834 <= (decode_INSTRUCTION[31 : 20] == 12'h342); + end + if(when_CsrPlugin_l1264_13) begin + execute_CsrPlugin_csr_835 <= (decode_INSTRUCTION[31 : 20] == 12'h343); + end + if(when_CsrPlugin_l1264_14) begin + execute_CsrPlugin_csr_2816 <= (decode_INSTRUCTION[31 : 20] == 12'hb00); + end + if(when_CsrPlugin_l1264_15) begin + execute_CsrPlugin_csr_2944 <= (decode_INSTRUCTION[31 : 20] == 12'hb80); + end + if(when_CsrPlugin_l1264_16) begin + execute_CsrPlugin_csr_2818 <= (decode_INSTRUCTION[31 : 20] == 12'hb02); + end + if(when_CsrPlugin_l1264_17) begin + execute_CsrPlugin_csr_2946 <= (decode_INSTRUCTION[31 : 20] == 12'hb82); + end + if(when_CsrPlugin_l1264_18) begin + execute_CsrPlugin_csr_3072 <= (decode_INSTRUCTION[31 : 20] == 12'hc00); + end + if(when_CsrPlugin_l1264_19) begin + execute_CsrPlugin_csr_3200 <= (decode_INSTRUCTION[31 : 20] == 12'hc80); + end + if(when_CsrPlugin_l1264_20) begin + execute_CsrPlugin_csr_3074 <= (decode_INSTRUCTION[31 : 20] == 12'hc02); + end + if(when_CsrPlugin_l1264_21) begin + execute_CsrPlugin_csr_3202 <= (decode_INSTRUCTION[31 : 20] == 12'hc82); + end + if(when_CsrPlugin_l1264_22) begin + execute_CsrPlugin_csr_3008 <= (decode_INSTRUCTION[31 : 20] == 12'hbc0); + end + if(when_CsrPlugin_l1264_23) begin + execute_CsrPlugin_csr_4032 <= (decode_INSTRUCTION[31 : 20] == 12'hfc0); + end + if(execute_CsrPlugin_csr_836) begin + if(execute_CsrPlugin_writeEnable) begin + CsrPlugin_mip_MSIP <= CsrPlugin_csrMapping_writeDataSignal[3]; + end + end + if(execute_CsrPlugin_csr_773) begin + if(execute_CsrPlugin_writeEnable) begin + CsrPlugin_mtvec_base <= CsrPlugin_csrMapping_writeDataSignal[31 : 2]; + CsrPlugin_mtvec_mode <= CsrPlugin_csrMapping_writeDataSignal[1 : 0]; + end + end + if(execute_CsrPlugin_csr_833) begin + if(execute_CsrPlugin_writeEnable) begin + CsrPlugin_mepc <= CsrPlugin_csrMapping_writeDataSignal[31 : 0]; + end + end + if(execute_CsrPlugin_csr_832) begin + if(execute_CsrPlugin_writeEnable) begin + CsrPlugin_mscratch <= CsrPlugin_csrMapping_writeDataSignal[31 : 0]; + end + end + if(execute_CsrPlugin_csr_834) begin + if(execute_CsrPlugin_writeEnable) begin + CsrPlugin_mcause_interrupt <= CsrPlugin_csrMapping_writeDataSignal[31]; + CsrPlugin_mcause_exceptionCode <= CsrPlugin_csrMapping_writeDataSignal[3 : 0]; + end + end + if(execute_CsrPlugin_csr_835) begin + if(execute_CsrPlugin_writeEnable) begin + CsrPlugin_mtval <= CsrPlugin_csrMapping_writeDataSignal[31 : 0]; + end + end + if(execute_CsrPlugin_csr_2816) begin + if(execute_CsrPlugin_writeEnable) begin + CsrPlugin_mcycle[31 : 0] <= CsrPlugin_csrMapping_writeDataSignal[31 : 0]; + end + end + if(execute_CsrPlugin_csr_2944) begin + if(execute_CsrPlugin_writeEnable) begin + CsrPlugin_mcycle[63 : 32] <= CsrPlugin_csrMapping_writeDataSignal[31 : 0]; + end + end + if(execute_CsrPlugin_csr_2818) begin + if(execute_CsrPlugin_writeEnable) begin + CsrPlugin_minstret[31 : 0] <= CsrPlugin_csrMapping_writeDataSignal[31 : 0]; + end + end + if(execute_CsrPlugin_csr_2946) begin + if(execute_CsrPlugin_writeEnable) begin + CsrPlugin_minstret[63 : 32] <= CsrPlugin_csrMapping_writeDataSignal[31 : 0]; + end + end + iBusWishbone_DAT_MISO_regNext <= iBusWishbone_DAT_MISO; + dBusWishbone_DAT_MISO_regNext <= dBusWishbone_DAT_MISO; + end + + +endmodule + +module DataCache ( + input io_cpu_execute_isValid, + input [31:0] io_cpu_execute_address, + output reg io_cpu_execute_haltIt, + input io_cpu_execute_args_wr, + input [1:0] io_cpu_execute_args_size, + input io_cpu_execute_args_totalyConsistent, + output io_cpu_execute_refilling, + input io_cpu_memory_isValid, + input io_cpu_memory_isStuck, + output io_cpu_memory_isWrite, + input [31:0] io_cpu_memory_address, + input [31:0] io_cpu_memory_mmuRsp_physicalAddress, + input io_cpu_memory_mmuRsp_isIoAccess, + input io_cpu_memory_mmuRsp_isPaging, + input io_cpu_memory_mmuRsp_allowRead, + input io_cpu_memory_mmuRsp_allowWrite, + input io_cpu_memory_mmuRsp_allowExecute, + input io_cpu_memory_mmuRsp_exception, + input io_cpu_memory_mmuRsp_refilling, + input io_cpu_memory_mmuRsp_bypassTranslation, + input io_cpu_writeBack_isValid, + input io_cpu_writeBack_isStuck, + input io_cpu_writeBack_isUser, + output reg io_cpu_writeBack_haltIt, + output io_cpu_writeBack_isWrite, + input [31:0] io_cpu_writeBack_storeData, + output reg [31:0] io_cpu_writeBack_data, + input [31:0] io_cpu_writeBack_address, + output io_cpu_writeBack_mmuException, + output io_cpu_writeBack_unalignedAccess, + output reg io_cpu_writeBack_accessError, + output io_cpu_writeBack_keepMemRspData, + input io_cpu_writeBack_fence_SW, + input io_cpu_writeBack_fence_SR, + input io_cpu_writeBack_fence_SO, + input io_cpu_writeBack_fence_SI, + input io_cpu_writeBack_fence_PW, + input io_cpu_writeBack_fence_PR, + input io_cpu_writeBack_fence_PO, + input io_cpu_writeBack_fence_PI, + input [3:0] io_cpu_writeBack_fence_FM, + output io_cpu_writeBack_exclusiveOk, + output reg io_cpu_redo, + input io_cpu_flush_valid, + output io_cpu_flush_ready, + output reg io_mem_cmd_valid, + input io_mem_cmd_ready, + output reg io_mem_cmd_payload_wr, + output io_mem_cmd_payload_uncached, + output reg [31:0] io_mem_cmd_payload_address, + output [31:0] io_mem_cmd_payload_data, + output [3:0] io_mem_cmd_payload_mask, + output reg [2:0] io_mem_cmd_payload_size, + output io_mem_cmd_payload_last, + input io_mem_rsp_valid, + input io_mem_rsp_payload_last, + input [31:0] io_mem_rsp_payload_data, + input io_mem_rsp_payload_error, + input clk, + input reset +); + reg [21:0] _zz_ways_0_tags_port0; + reg [31:0] _zz_ways_0_data_port0; + wire [21:0] _zz_ways_0_tags_port; + wire [9:0] _zz_stage0_dataColisions; + wire [9:0] _zz__zz_stageA_dataColisions; + wire [0:0] _zz_when; + wire [2:0] _zz_loader_counter_valueNext; + wire [0:0] _zz_loader_counter_valueNext_1; + wire [1:0] _zz_loader_waysAllocator; + reg _zz_1; + reg _zz_2; + wire haltCpu; + reg tagsReadCmd_valid; + reg [6:0] tagsReadCmd_payload; + reg tagsWriteCmd_valid; + reg [0:0] tagsWriteCmd_payload_way; + reg [6:0] tagsWriteCmd_payload_address; + reg tagsWriteCmd_payload_data_valid; + reg tagsWriteCmd_payload_data_error; + reg [19:0] tagsWriteCmd_payload_data_address; + reg tagsWriteLastCmd_valid; + reg [0:0] tagsWriteLastCmd_payload_way; + reg [6:0] tagsWriteLastCmd_payload_address; + reg tagsWriteLastCmd_payload_data_valid; + reg tagsWriteLastCmd_payload_data_error; + reg [19:0] tagsWriteLastCmd_payload_data_address; + reg dataReadCmd_valid; + reg [9:0] dataReadCmd_payload; + reg dataWriteCmd_valid; + reg [0:0] dataWriteCmd_payload_way; + reg [9:0] dataWriteCmd_payload_address; + reg [31:0] dataWriteCmd_payload_data; + reg [3:0] dataWriteCmd_payload_mask; + wire _zz_ways_0_tagsReadRsp_valid; + wire ways_0_tagsReadRsp_valid; + wire ways_0_tagsReadRsp_error; + wire [19:0] ways_0_tagsReadRsp_address; + wire [21:0] _zz_ways_0_tagsReadRsp_valid_1; + wire _zz_ways_0_dataReadRspMem; + wire [31:0] ways_0_dataReadRspMem; + wire [31:0] ways_0_dataReadRsp; + wire when_DataCache_l634; + wire when_DataCache_l637; + wire when_DataCache_l656; + wire rspSync; + wire rspLast; + reg memCmdSent; + wire io_mem_cmd_fire; + wire when_DataCache_l678; + reg [3:0] _zz_stage0_mask; + wire [3:0] stage0_mask; + wire [0:0] stage0_dataColisions; + wire [0:0] stage0_wayInvalidate; + wire stage0_isAmo; + wire when_DataCache_l763; + reg stageA_request_wr; + reg [1:0] stageA_request_size; + reg stageA_request_totalyConsistent; + wire when_DataCache_l763_1; + reg [3:0] stageA_mask; + wire stageA_isAmo; + wire stageA_isLrsc; + wire [0:0] stageA_wayHits; + wire when_DataCache_l763_2; + reg [0:0] stageA_wayInvalidate; + wire when_DataCache_l763_3; + reg [0:0] stage0_dataColisions_regNextWhen; + wire [0:0] _zz_stageA_dataColisions; + wire [0:0] stageA_dataColisions; + wire when_DataCache_l814; + reg stageB_request_wr; + reg [1:0] stageB_request_size; + reg stageB_request_totalyConsistent; + reg stageB_mmuRspFreeze; + wire when_DataCache_l816; + reg [31:0] stageB_mmuRsp_physicalAddress; + reg stageB_mmuRsp_isIoAccess; + reg stageB_mmuRsp_isPaging; + reg stageB_mmuRsp_allowRead; + reg stageB_mmuRsp_allowWrite; + reg stageB_mmuRsp_allowExecute; + reg stageB_mmuRsp_exception; + reg stageB_mmuRsp_refilling; + reg stageB_mmuRsp_bypassTranslation; + wire when_DataCache_l813; + reg stageB_tagsReadRsp_0_valid; + reg stageB_tagsReadRsp_0_error; + reg [19:0] stageB_tagsReadRsp_0_address; + wire when_DataCache_l813_1; + reg [31:0] stageB_dataReadRsp_0; + wire when_DataCache_l812; + reg [0:0] stageB_wayInvalidate; + wire stageB_consistancyHazard; + wire when_DataCache_l812_1; + reg [0:0] stageB_dataColisions; + wire when_DataCache_l812_2; + reg stageB_unaligned; + wire when_DataCache_l812_3; + reg [0:0] stageB_waysHitsBeforeInvalidate; + wire [0:0] stageB_waysHits; + wire stageB_waysHit; + wire [31:0] stageB_dataMux; + wire when_DataCache_l812_4; + reg [3:0] stageB_mask; + reg stageB_loaderValid; + wire [31:0] stageB_ioMemRspMuxed; + reg stageB_flusher_waitDone; + wire stageB_flusher_hold; + reg [7:0] stageB_flusher_counter; + wire when_DataCache_l842; + wire when_DataCache_l848; + reg stageB_flusher_start; + wire stageB_isAmo; + wire stageB_isAmoCached; + wire stageB_isExternalLsrc; + wire stageB_isExternalAmo; + wire [31:0] stageB_requestDataBypass; + reg stageB_cpuWriteToCache; + wire when_DataCache_l911; + wire stageB_badPermissions; + wire stageB_loadStoreFault; + wire stageB_bypassCache; + wire when_DataCache_l980; + wire when_DataCache_l989; + wire when_DataCache_l994; + wire when_DataCache_l1005; + wire when_DataCache_l1017; + wire when_DataCache_l976; + wire when_DataCache_l1051; + wire when_DataCache_l1060; + reg loader_valid; + reg loader_counter_willIncrement; + wire loader_counter_willClear; + reg [2:0] loader_counter_valueNext; + reg [2:0] loader_counter_value; + wire loader_counter_willOverflowIfInc; + wire loader_counter_willOverflow; + reg [0:0] loader_waysAllocator; + reg loader_error; + wire loader_kill; + reg loader_killReg; + wire when_DataCache_l1075; + wire loader_done; + wire when_DataCache_l1103; + reg loader_valid_regNext; + wire when_DataCache_l1107; + wire when_DataCache_l1110; + (* ram_style = "block" *) reg [21:0] ways_0_tags [0:127]; + (* ram_style = "block" *) reg [7:0] ways_0_data_symbol0 [0:1023]; + (* ram_style = "block" *) reg [7:0] ways_0_data_symbol1 [0:1023]; + (* ram_style = "block" *) reg [7:0] ways_0_data_symbol2 [0:1023]; + (* ram_style = "block" *) reg [7:0] ways_0_data_symbol3 [0:1023]; + reg [7:0] _zz_ways_0_datasymbol_read; + reg [7:0] _zz_ways_0_datasymbol_read_1; + reg [7:0] _zz_ways_0_datasymbol_read_2; + reg [7:0] _zz_ways_0_datasymbol_read_3; + + assign _zz_stage0_dataColisions = (io_cpu_execute_address[11 : 2] >>> 0); + assign _zz__zz_stageA_dataColisions = (io_cpu_memory_address[11 : 2] >>> 0); + assign _zz_when = 1'b1; + assign _zz_loader_counter_valueNext_1 = loader_counter_willIncrement; + assign _zz_loader_counter_valueNext = {2'd0, _zz_loader_counter_valueNext_1}; + assign _zz_loader_waysAllocator = {loader_waysAllocator,loader_waysAllocator[0]}; + assign _zz_ways_0_tags_port = {tagsWriteCmd_payload_data_address,{tagsWriteCmd_payload_data_error,tagsWriteCmd_payload_data_valid}}; + always @(posedge clk) begin + if(_zz_ways_0_tagsReadRsp_valid) begin + _zz_ways_0_tags_port0 <= ways_0_tags[tagsReadCmd_payload]; + end + end + + always @(posedge clk) begin + if(_zz_2) begin + ways_0_tags[tagsWriteCmd_payload_address] <= _zz_ways_0_tags_port; + end + end + + always @(*) begin + _zz_ways_0_data_port0 = {_zz_ways_0_datasymbol_read_3, _zz_ways_0_datasymbol_read_2, _zz_ways_0_datasymbol_read_1, _zz_ways_0_datasymbol_read}; + end + always @(posedge clk) begin + if(_zz_ways_0_dataReadRspMem) begin + _zz_ways_0_datasymbol_read <= ways_0_data_symbol0[dataReadCmd_payload]; + _zz_ways_0_datasymbol_read_1 <= ways_0_data_symbol1[dataReadCmd_payload]; + _zz_ways_0_datasymbol_read_2 <= ways_0_data_symbol2[dataReadCmd_payload]; + _zz_ways_0_datasymbol_read_3 <= ways_0_data_symbol3[dataReadCmd_payload]; + end + end + + always @(posedge clk) begin + if(dataWriteCmd_payload_mask[0] && _zz_1) begin + ways_0_data_symbol0[dataWriteCmd_payload_address] <= dataWriteCmd_payload_data[7 : 0]; + end + if(dataWriteCmd_payload_mask[1] && _zz_1) begin + ways_0_data_symbol1[dataWriteCmd_payload_address] <= dataWriteCmd_payload_data[15 : 8]; + end + if(dataWriteCmd_payload_mask[2] && _zz_1) begin + ways_0_data_symbol2[dataWriteCmd_payload_address] <= dataWriteCmd_payload_data[23 : 16]; + end + if(dataWriteCmd_payload_mask[3] && _zz_1) begin + ways_0_data_symbol3[dataWriteCmd_payload_address] <= dataWriteCmd_payload_data[31 : 24]; + end + end + + always @(*) begin + _zz_1 = 1'b0; + if(when_DataCache_l637) begin + _zz_1 = 1'b1; + end + end + + always @(*) begin + _zz_2 = 1'b0; + if(when_DataCache_l634) begin + _zz_2 = 1'b1; + end + end + + assign haltCpu = 1'b0; + assign _zz_ways_0_tagsReadRsp_valid = (tagsReadCmd_valid && (! io_cpu_memory_isStuck)); + assign _zz_ways_0_tagsReadRsp_valid_1 = _zz_ways_0_tags_port0; + assign ways_0_tagsReadRsp_valid = _zz_ways_0_tagsReadRsp_valid_1[0]; + assign ways_0_tagsReadRsp_error = _zz_ways_0_tagsReadRsp_valid_1[1]; + assign ways_0_tagsReadRsp_address = _zz_ways_0_tagsReadRsp_valid_1[21 : 2]; + assign _zz_ways_0_dataReadRspMem = (dataReadCmd_valid && (! io_cpu_memory_isStuck)); + assign ways_0_dataReadRspMem = _zz_ways_0_data_port0; + assign ways_0_dataReadRsp = ways_0_dataReadRspMem[31 : 0]; + assign when_DataCache_l634 = (tagsWriteCmd_valid && tagsWriteCmd_payload_way[0]); + assign when_DataCache_l637 = (dataWriteCmd_valid && dataWriteCmd_payload_way[0]); + always @(*) begin + tagsReadCmd_valid = 1'b0; + if(when_DataCache_l656) begin + tagsReadCmd_valid = 1'b1; + end + end + + always @(*) begin + tagsReadCmd_payload = 7'bxxxxxxx; + if(when_DataCache_l656) begin + tagsReadCmd_payload = io_cpu_execute_address[11 : 5]; + end + end + + always @(*) begin + dataReadCmd_valid = 1'b0; + if(when_DataCache_l656) begin + dataReadCmd_valid = 1'b1; + end + end + + always @(*) begin + dataReadCmd_payload = 10'bxxxxxxxxxx; + if(when_DataCache_l656) begin + dataReadCmd_payload = io_cpu_execute_address[11 : 2]; + end + end + + always @(*) begin + tagsWriteCmd_valid = 1'b0; + if(when_DataCache_l842) begin + tagsWriteCmd_valid = 1'b1; + end + if(when_DataCache_l1051) begin + tagsWriteCmd_valid = 1'b0; + end + if(loader_done) begin + tagsWriteCmd_valid = 1'b1; + end + end + + always @(*) begin + tagsWriteCmd_payload_way = 1'bx; + if(when_DataCache_l842) begin + tagsWriteCmd_payload_way = 1'b1; + end + if(loader_done) begin + tagsWriteCmd_payload_way = loader_waysAllocator; + end + end + + always @(*) begin + tagsWriteCmd_payload_address = 7'bxxxxxxx; + if(when_DataCache_l842) begin + tagsWriteCmd_payload_address = stageB_flusher_counter[6:0]; + end + if(loader_done) begin + tagsWriteCmd_payload_address = stageB_mmuRsp_physicalAddress[11 : 5]; + end + end + + always @(*) begin + tagsWriteCmd_payload_data_valid = 1'bx; + if(when_DataCache_l842) begin + tagsWriteCmd_payload_data_valid = 1'b0; + end + if(loader_done) begin + tagsWriteCmd_payload_data_valid = (! (loader_kill || loader_killReg)); + end + end + + always @(*) begin + tagsWriteCmd_payload_data_error = 1'bx; + if(loader_done) begin + tagsWriteCmd_payload_data_error = (loader_error || (io_mem_rsp_valid && io_mem_rsp_payload_error)); + end + end + + always @(*) begin + tagsWriteCmd_payload_data_address = 20'bxxxxxxxxxxxxxxxxxxxx; + if(loader_done) begin + tagsWriteCmd_payload_data_address = stageB_mmuRsp_physicalAddress[31 : 12]; + end + end + + always @(*) begin + dataWriteCmd_valid = 1'b0; + if(stageB_cpuWriteToCache) begin + if(when_DataCache_l911) begin + dataWriteCmd_valid = 1'b1; + end + end + if(when_DataCache_l1051) begin + dataWriteCmd_valid = 1'b0; + end + if(when_DataCache_l1075) begin + dataWriteCmd_valid = 1'b1; + end + end + + always @(*) begin + dataWriteCmd_payload_way = 1'bx; + if(stageB_cpuWriteToCache) begin + dataWriteCmd_payload_way = stageB_waysHits; + end + if(when_DataCache_l1075) begin + dataWriteCmd_payload_way = loader_waysAllocator; + end + end + + always @(*) begin + dataWriteCmd_payload_address = 10'bxxxxxxxxxx; + if(stageB_cpuWriteToCache) begin + dataWriteCmd_payload_address = stageB_mmuRsp_physicalAddress[11 : 2]; + end + if(when_DataCache_l1075) begin + dataWriteCmd_payload_address = {stageB_mmuRsp_physicalAddress[11 : 5],loader_counter_value}; + end + end + + always @(*) begin + dataWriteCmd_payload_data = 32'bxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx; + if(stageB_cpuWriteToCache) begin + dataWriteCmd_payload_data[31 : 0] = stageB_requestDataBypass; + end + if(when_DataCache_l1075) begin + dataWriteCmd_payload_data = io_mem_rsp_payload_data; + end + end + + always @(*) begin + dataWriteCmd_payload_mask = 4'bxxxx; + if(stageB_cpuWriteToCache) begin + dataWriteCmd_payload_mask = 4'b0000; + if(_zz_when[0]) begin + dataWriteCmd_payload_mask[3 : 0] = stageB_mask; + end + end + if(when_DataCache_l1075) begin + dataWriteCmd_payload_mask = 4'b1111; + end + end + + assign when_DataCache_l656 = (io_cpu_execute_isValid && (! io_cpu_memory_isStuck)); + always @(*) begin + io_cpu_execute_haltIt = 1'b0; + if(when_DataCache_l842) begin + io_cpu_execute_haltIt = 1'b1; + end + end + + assign rspSync = 1'b1; + assign rspLast = 1'b1; + assign io_mem_cmd_fire = (io_mem_cmd_valid && io_mem_cmd_ready); + assign when_DataCache_l678 = (! io_cpu_writeBack_isStuck); + always @(*) begin + _zz_stage0_mask = 4'bxxxx; + case(io_cpu_execute_args_size) + 2'b00 : begin + _zz_stage0_mask = 4'b0001; + end + 2'b01 : begin + _zz_stage0_mask = 4'b0011; + end + 2'b10 : begin + _zz_stage0_mask = 4'b1111; + end + default : begin + end + endcase + end + + assign stage0_mask = (_zz_stage0_mask <<< io_cpu_execute_address[1 : 0]); + assign stage0_dataColisions[0] = (((dataWriteCmd_valid && dataWriteCmd_payload_way[0]) && (dataWriteCmd_payload_address == _zz_stage0_dataColisions)) && ((stage0_mask & dataWriteCmd_payload_mask[3 : 0]) != 4'b0000)); + assign stage0_wayInvalidate = 1'b0; + assign stage0_isAmo = 1'b0; + assign when_DataCache_l763 = (! io_cpu_memory_isStuck); + assign when_DataCache_l763_1 = (! io_cpu_memory_isStuck); + assign io_cpu_memory_isWrite = stageA_request_wr; + assign stageA_isAmo = 1'b0; + assign stageA_isLrsc = 1'b0; + assign stageA_wayHits = ((io_cpu_memory_mmuRsp_physicalAddress[31 : 12] == ways_0_tagsReadRsp_address) && ways_0_tagsReadRsp_valid); + assign when_DataCache_l763_2 = (! io_cpu_memory_isStuck); + assign when_DataCache_l763_3 = (! io_cpu_memory_isStuck); + assign _zz_stageA_dataColisions[0] = (((dataWriteCmd_valid && dataWriteCmd_payload_way[0]) && (dataWriteCmd_payload_address == _zz__zz_stageA_dataColisions)) && ((stageA_mask & dataWriteCmd_payload_mask[3 : 0]) != 4'b0000)); + assign stageA_dataColisions = (stage0_dataColisions_regNextWhen | _zz_stageA_dataColisions); + assign when_DataCache_l814 = (! io_cpu_writeBack_isStuck); + always @(*) begin + stageB_mmuRspFreeze = 1'b0; + if(when_DataCache_l1110) begin + stageB_mmuRspFreeze = 1'b1; + end + end + + assign when_DataCache_l816 = ((! io_cpu_writeBack_isStuck) && (! stageB_mmuRspFreeze)); + assign when_DataCache_l813 = (! io_cpu_writeBack_isStuck); + assign when_DataCache_l813_1 = (! io_cpu_writeBack_isStuck); + assign when_DataCache_l812 = (! io_cpu_writeBack_isStuck); + assign stageB_consistancyHazard = 1'b0; + assign when_DataCache_l812_1 = (! io_cpu_writeBack_isStuck); + assign when_DataCache_l812_2 = (! io_cpu_writeBack_isStuck); + assign when_DataCache_l812_3 = (! io_cpu_writeBack_isStuck); + assign stageB_waysHits = (stageB_waysHitsBeforeInvalidate & (~ stageB_wayInvalidate)); + assign stageB_waysHit = (stageB_waysHits != 1'b0); + assign stageB_dataMux = stageB_dataReadRsp_0; + assign when_DataCache_l812_4 = (! io_cpu_writeBack_isStuck); + always @(*) begin + stageB_loaderValid = 1'b0; + if(io_cpu_writeBack_isValid) begin + if(!stageB_isExternalAmo) begin + if(!when_DataCache_l976) begin + if(!when_DataCache_l989) begin + if(io_mem_cmd_ready) begin + stageB_loaderValid = 1'b1; + end + end + end + end + end + if(when_DataCache_l1051) begin + stageB_loaderValid = 1'b0; + end + end + + assign stageB_ioMemRspMuxed = io_mem_rsp_payload_data[31 : 0]; + always @(*) begin + io_cpu_writeBack_haltIt = 1'b1; + if(io_cpu_writeBack_isValid) begin + if(!stageB_isExternalAmo) begin + if(when_DataCache_l976) begin + if(when_DataCache_l980) begin + io_cpu_writeBack_haltIt = 1'b0; + end + end else begin + if(when_DataCache_l989) begin + if(when_DataCache_l994) begin + io_cpu_writeBack_haltIt = 1'b0; + end + end + end + end + end + if(when_DataCache_l1051) begin + io_cpu_writeBack_haltIt = 1'b0; + end + end + + assign stageB_flusher_hold = 1'b0; + assign when_DataCache_l842 = (! stageB_flusher_counter[7]); + assign when_DataCache_l848 = (! stageB_flusher_hold); + assign io_cpu_flush_ready = (stageB_flusher_waitDone && stageB_flusher_counter[7]); + assign stageB_isAmo = 1'b0; + assign stageB_isAmoCached = 1'b0; + assign stageB_isExternalLsrc = 1'b0; + assign stageB_isExternalAmo = 1'b0; + assign stageB_requestDataBypass = io_cpu_writeBack_storeData; + always @(*) begin + stageB_cpuWriteToCache = 1'b0; + if(io_cpu_writeBack_isValid) begin + if(!stageB_isExternalAmo) begin + if(!when_DataCache_l976) begin + if(when_DataCache_l989) begin + stageB_cpuWriteToCache = 1'b1; + end + end + end + end + end + + assign when_DataCache_l911 = (stageB_request_wr && stageB_waysHit); + assign stageB_badPermissions = (((! stageB_mmuRsp_allowWrite) && stageB_request_wr) || ((! stageB_mmuRsp_allowRead) && ((! stageB_request_wr) || stageB_isAmo))); + assign stageB_loadStoreFault = (io_cpu_writeBack_isValid && (stageB_mmuRsp_exception || stageB_badPermissions)); + always @(*) begin + io_cpu_redo = 1'b0; + if(io_cpu_writeBack_isValid) begin + if(!stageB_isExternalAmo) begin + if(!when_DataCache_l976) begin + if(when_DataCache_l989) begin + if(when_DataCache_l1005) begin + io_cpu_redo = 1'b1; + end + end + end + end + end + if(when_DataCache_l1060) begin + io_cpu_redo = 1'b1; + end + if(when_DataCache_l1107) begin + io_cpu_redo = 1'b1; + end + end + + always @(*) begin + io_cpu_writeBack_accessError = 1'b0; + if(stageB_bypassCache) begin + io_cpu_writeBack_accessError = ((((! stageB_request_wr) && 1'b1) && io_mem_rsp_valid) && io_mem_rsp_payload_error); + end else begin + io_cpu_writeBack_accessError = (((stageB_waysHits & stageB_tagsReadRsp_0_error) != 1'b0) || (stageB_loadStoreFault && (! stageB_mmuRsp_isPaging))); + end + end + + assign io_cpu_writeBack_mmuException = (stageB_loadStoreFault && stageB_mmuRsp_isPaging); + assign io_cpu_writeBack_unalignedAccess = (io_cpu_writeBack_isValid && stageB_unaligned); + assign io_cpu_writeBack_isWrite = stageB_request_wr; + always @(*) begin + io_mem_cmd_valid = 1'b0; + if(io_cpu_writeBack_isValid) begin + if(!stageB_isExternalAmo) begin + if(when_DataCache_l976) begin + io_mem_cmd_valid = (! memCmdSent); + end else begin + if(when_DataCache_l989) begin + if(stageB_request_wr) begin + io_mem_cmd_valid = 1'b1; + end + end else begin + if(when_DataCache_l1017) begin + io_mem_cmd_valid = 1'b1; + end + end + end + end + end + if(when_DataCache_l1051) begin + io_mem_cmd_valid = 1'b0; + end + end + + always @(*) begin + io_mem_cmd_payload_address = stageB_mmuRsp_physicalAddress; + if(io_cpu_writeBack_isValid) begin + if(!stageB_isExternalAmo) begin + if(!when_DataCache_l976) begin + if(!when_DataCache_l989) begin + io_mem_cmd_payload_address[4 : 0] = 5'h0; + end + end + end + end + end + + assign io_mem_cmd_payload_last = 1'b1; + always @(*) begin + io_mem_cmd_payload_wr = stageB_request_wr; + if(io_cpu_writeBack_isValid) begin + if(!stageB_isExternalAmo) begin + if(!when_DataCache_l976) begin + if(!when_DataCache_l989) begin + io_mem_cmd_payload_wr = 1'b0; + end + end + end + end + end + + assign io_mem_cmd_payload_mask = stageB_mask; + assign io_mem_cmd_payload_data = stageB_requestDataBypass; + assign io_mem_cmd_payload_uncached = stageB_mmuRsp_isIoAccess; + always @(*) begin + io_mem_cmd_payload_size = {1'd0, stageB_request_size}; + if(io_cpu_writeBack_isValid) begin + if(!stageB_isExternalAmo) begin + if(!when_DataCache_l976) begin + if(!when_DataCache_l989) begin + io_mem_cmd_payload_size = 3'b101; + end + end + end + end + end + + assign stageB_bypassCache = ((stageB_mmuRsp_isIoAccess || stageB_isExternalLsrc) || stageB_isExternalAmo); + assign io_cpu_writeBack_keepMemRspData = 1'b0; + assign when_DataCache_l980 = ((! stageB_request_wr) ? (io_mem_rsp_valid && rspSync) : io_mem_cmd_ready); + assign when_DataCache_l989 = (stageB_waysHit || (stageB_request_wr && (! stageB_isAmoCached))); + assign when_DataCache_l994 = ((! stageB_request_wr) || io_mem_cmd_ready); + assign when_DataCache_l1005 = (((! stageB_request_wr) || stageB_isAmoCached) && ((stageB_dataColisions & stageB_waysHits) != 1'b0)); + assign when_DataCache_l1017 = (! memCmdSent); + assign when_DataCache_l976 = (stageB_mmuRsp_isIoAccess || stageB_isExternalLsrc); + always @(*) begin + if(stageB_bypassCache) begin + io_cpu_writeBack_data = stageB_ioMemRspMuxed; + end else begin + io_cpu_writeBack_data = stageB_dataMux; + end + end + + assign when_DataCache_l1051 = ((((stageB_consistancyHazard || stageB_mmuRsp_refilling) || io_cpu_writeBack_accessError) || io_cpu_writeBack_mmuException) || io_cpu_writeBack_unalignedAccess); + assign when_DataCache_l1060 = (io_cpu_writeBack_isValid && (stageB_mmuRsp_refilling || stageB_consistancyHazard)); + always @(*) begin + loader_counter_willIncrement = 1'b0; + if(when_DataCache_l1075) begin + loader_counter_willIncrement = 1'b1; + end + end + + assign loader_counter_willClear = 1'b0; + assign loader_counter_willOverflowIfInc = (loader_counter_value == 3'b111); + assign loader_counter_willOverflow = (loader_counter_willOverflowIfInc && loader_counter_willIncrement); + always @(*) begin + loader_counter_valueNext = (loader_counter_value + _zz_loader_counter_valueNext); + if(loader_counter_willClear) begin + loader_counter_valueNext = 3'b000; + end + end + + assign loader_kill = 1'b0; + assign when_DataCache_l1075 = ((loader_valid && io_mem_rsp_valid) && rspLast); + assign loader_done = loader_counter_willOverflow; + assign when_DataCache_l1103 = (! loader_valid); + assign when_DataCache_l1107 = (loader_valid && (! loader_valid_regNext)); + assign io_cpu_execute_refilling = loader_valid; + assign when_DataCache_l1110 = (stageB_loaderValid || loader_valid); + always @(posedge clk) begin + tagsWriteLastCmd_valid <= tagsWriteCmd_valid; + tagsWriteLastCmd_payload_way <= tagsWriteCmd_payload_way; + tagsWriteLastCmd_payload_address <= tagsWriteCmd_payload_address; + tagsWriteLastCmd_payload_data_valid <= tagsWriteCmd_payload_data_valid; + tagsWriteLastCmd_payload_data_error <= tagsWriteCmd_payload_data_error; + tagsWriteLastCmd_payload_data_address <= tagsWriteCmd_payload_data_address; + if(when_DataCache_l763) begin + stageA_request_wr <= io_cpu_execute_args_wr; + stageA_request_size <= io_cpu_execute_args_size; + stageA_request_totalyConsistent <= io_cpu_execute_args_totalyConsistent; + end + if(when_DataCache_l763_1) begin + stageA_mask <= stage0_mask; + end + if(when_DataCache_l763_2) begin + stageA_wayInvalidate <= stage0_wayInvalidate; + end + if(when_DataCache_l763_3) begin + stage0_dataColisions_regNextWhen <= stage0_dataColisions; + end + if(when_DataCache_l814) begin + stageB_request_wr <= stageA_request_wr; + stageB_request_size <= stageA_request_size; + stageB_request_totalyConsistent <= stageA_request_totalyConsistent; + end + if(when_DataCache_l816) begin + stageB_mmuRsp_physicalAddress <= io_cpu_memory_mmuRsp_physicalAddress; + stageB_mmuRsp_isIoAccess <= io_cpu_memory_mmuRsp_isIoAccess; + stageB_mmuRsp_isPaging <= io_cpu_memory_mmuRsp_isPaging; + stageB_mmuRsp_allowRead <= io_cpu_memory_mmuRsp_allowRead; + stageB_mmuRsp_allowWrite <= io_cpu_memory_mmuRsp_allowWrite; + stageB_mmuRsp_allowExecute <= io_cpu_memory_mmuRsp_allowExecute; + stageB_mmuRsp_exception <= io_cpu_memory_mmuRsp_exception; + stageB_mmuRsp_refilling <= io_cpu_memory_mmuRsp_refilling; + stageB_mmuRsp_bypassTranslation <= io_cpu_memory_mmuRsp_bypassTranslation; + end + if(when_DataCache_l813) begin + stageB_tagsReadRsp_0_valid <= ways_0_tagsReadRsp_valid; + stageB_tagsReadRsp_0_error <= ways_0_tagsReadRsp_error; + stageB_tagsReadRsp_0_address <= ways_0_tagsReadRsp_address; + end + if(when_DataCache_l813_1) begin + stageB_dataReadRsp_0 <= ways_0_dataReadRsp; + end + if(when_DataCache_l812) begin + stageB_wayInvalidate <= stageA_wayInvalidate; + end + if(when_DataCache_l812_1) begin + stageB_dataColisions <= stageA_dataColisions; + end + if(when_DataCache_l812_2) begin + stageB_unaligned <= ({((stageA_request_size == 2'b10) && (io_cpu_memory_address[1 : 0] != 2'b00)),((stageA_request_size == 2'b01) && (io_cpu_memory_address[0 : 0] != 1'b0))} != 2'b00); + end + if(when_DataCache_l812_3) begin + stageB_waysHitsBeforeInvalidate <= stageA_wayHits; + end + if(when_DataCache_l812_4) begin + stageB_mask <= stageA_mask; + end + loader_valid_regNext <= loader_valid; + end + + always @(posedge clk) begin + if(reset) begin + memCmdSent <= 1'b0; + stageB_flusher_waitDone <= 1'b0; + stageB_flusher_counter <= 8'h0; + stageB_flusher_start <= 1'b1; + loader_valid <= 1'b0; + loader_counter_value <= 3'b000; + loader_waysAllocator <= 1'b1; + loader_error <= 1'b0; + loader_killReg <= 1'b0; + end else begin + if(io_mem_cmd_fire) begin + memCmdSent <= 1'b1; + end + if(when_DataCache_l678) begin + memCmdSent <= 1'b0; + end + if(io_cpu_flush_ready) begin + stageB_flusher_waitDone <= 1'b0; + end + if(when_DataCache_l842) begin + if(when_DataCache_l848) begin + stageB_flusher_counter <= (stageB_flusher_counter + 8'h01); + end + end + stageB_flusher_start <= (((((((! stageB_flusher_waitDone) && (! stageB_flusher_start)) && io_cpu_flush_valid) && (! io_cpu_execute_isValid)) && (! io_cpu_memory_isValid)) && (! io_cpu_writeBack_isValid)) && (! io_cpu_redo)); + if(stageB_flusher_start) begin + stageB_flusher_waitDone <= 1'b1; + stageB_flusher_counter <= 8'h0; + end + `ifndef SYNTHESIS + `ifdef FORMAL + assert((! ((io_cpu_writeBack_isValid && (! io_cpu_writeBack_haltIt)) && io_cpu_writeBack_isStuck))); + `else + if(!(! ((io_cpu_writeBack_isValid && (! io_cpu_writeBack_haltIt)) && io_cpu_writeBack_isStuck))) begin + $display("ERROR writeBack stuck by another plugin is not allowed"); + end + `endif + `endif + if(stageB_loaderValid) begin + loader_valid <= 1'b1; + end + loader_counter_value <= loader_counter_valueNext; + if(loader_kill) begin + loader_killReg <= 1'b1; + end + if(when_DataCache_l1075) begin + loader_error <= (loader_error || io_mem_rsp_payload_error); + end + if(loader_done) begin + loader_valid <= 1'b0; + loader_error <= 1'b0; + loader_killReg <= 1'b0; + end + if(when_DataCache_l1103) begin + loader_waysAllocator <= _zz_loader_waysAllocator[0:0]; + end + end + end + + +endmodule + +module InstructionCache ( + input io_flush, + input io_cpu_prefetch_isValid, + output reg io_cpu_prefetch_haltIt, + input [31:0] io_cpu_prefetch_pc, + input io_cpu_fetch_isValid, + input io_cpu_fetch_isStuck, + input io_cpu_fetch_isRemoved, + input [31:0] io_cpu_fetch_pc, + output [31:0] io_cpu_fetch_data, + input [31:0] io_cpu_fetch_mmuRsp_physicalAddress, + input io_cpu_fetch_mmuRsp_isIoAccess, + input io_cpu_fetch_mmuRsp_isPaging, + input io_cpu_fetch_mmuRsp_allowRead, + input io_cpu_fetch_mmuRsp_allowWrite, + input io_cpu_fetch_mmuRsp_allowExecute, + input io_cpu_fetch_mmuRsp_exception, + input io_cpu_fetch_mmuRsp_refilling, + input io_cpu_fetch_mmuRsp_bypassTranslation, + output [31:0] io_cpu_fetch_physicalAddress, + input io_cpu_decode_isValid, + input io_cpu_decode_isStuck, + input [31:0] io_cpu_decode_pc, + output [31:0] io_cpu_decode_physicalAddress, + output [31:0] io_cpu_decode_data, + output io_cpu_decode_cacheMiss, + output io_cpu_decode_error, + output io_cpu_decode_mmuRefilling, + output io_cpu_decode_mmuException, + input io_cpu_decode_isUser, + input io_cpu_fill_valid, + input [31:0] io_cpu_fill_payload, + output io_mem_cmd_valid, + input io_mem_cmd_ready, + output [31:0] io_mem_cmd_payload_address, + output [2:0] io_mem_cmd_payload_size, + input io_mem_rsp_valid, + input [31:0] io_mem_rsp_payload_data, + input io_mem_rsp_payload_error, + input clk, + input reset +); + reg [31:0] _zz_banks_0_port1; + reg [22:0] _zz_ways_0_tags_port1; + wire [22:0] _zz_ways_0_tags_port; + reg _zz_1; + reg _zz_2; + reg lineLoader_fire; + reg lineLoader_valid; + (* keep , syn_keep *) reg [31:0] lineLoader_address /* synthesis syn_keep = 1 */ ; + reg lineLoader_hadError; + reg lineLoader_flushPending; + reg [6:0] lineLoader_flushCounter; + wire when_InstructionCache_l338; + reg _zz_when_InstructionCache_l342; + wire when_InstructionCache_l342; + wire when_InstructionCache_l351; + reg lineLoader_cmdSent; + wire io_mem_cmd_fire; + wire when_Utils_l357; + reg lineLoader_wayToAllocate_willIncrement; + wire lineLoader_wayToAllocate_willClear; + wire lineLoader_wayToAllocate_willOverflowIfInc; + wire lineLoader_wayToAllocate_willOverflow; + (* keep , syn_keep *) reg [2:0] lineLoader_wordIndex /* synthesis syn_keep = 1 */ ; + wire lineLoader_write_tag_0_valid; + wire [5:0] lineLoader_write_tag_0_payload_address; + wire lineLoader_write_tag_0_payload_data_valid; + wire lineLoader_write_tag_0_payload_data_error; + wire [20:0] lineLoader_write_tag_0_payload_data_address; + wire lineLoader_write_data_0_valid; + wire [8:0] lineLoader_write_data_0_payload_address; + wire [31:0] lineLoader_write_data_0_payload_data; + wire when_InstructionCache_l401; + wire [8:0] _zz_fetchStage_read_banksValue_0_dataMem; + wire _zz_fetchStage_read_banksValue_0_dataMem_1; + wire [31:0] fetchStage_read_banksValue_0_dataMem; + wire [31:0] fetchStage_read_banksValue_0_data; + wire [5:0] _zz_fetchStage_read_waysValues_0_tag_valid; + wire _zz_fetchStage_read_waysValues_0_tag_valid_1; + wire fetchStage_read_waysValues_0_tag_valid; + wire fetchStage_read_waysValues_0_tag_error; + wire [20:0] fetchStage_read_waysValues_0_tag_address; + wire [22:0] _zz_fetchStage_read_waysValues_0_tag_valid_2; + wire fetchStage_hit_hits_0; + wire fetchStage_hit_valid; + wire fetchStage_hit_error; + wire [31:0] fetchStage_hit_data; + wire [31:0] fetchStage_hit_word; + wire when_InstructionCache_l435; + reg [31:0] io_cpu_fetch_data_regNextWhen; + wire when_InstructionCache_l459; + reg [31:0] decodeStage_mmuRsp_physicalAddress; + reg decodeStage_mmuRsp_isIoAccess; + reg decodeStage_mmuRsp_isPaging; + reg decodeStage_mmuRsp_allowRead; + reg decodeStage_mmuRsp_allowWrite; + reg decodeStage_mmuRsp_allowExecute; + reg decodeStage_mmuRsp_exception; + reg decodeStage_mmuRsp_refilling; + reg decodeStage_mmuRsp_bypassTranslation; + wire when_InstructionCache_l459_1; + reg decodeStage_hit_valid; + wire when_InstructionCache_l459_2; + reg decodeStage_hit_error; + (* ram_style = "block" *) reg [31:0] banks_0 [0:511]; + (* ram_style = "block" *) reg [22:0] ways_0_tags [0:63]; + + assign _zz_ways_0_tags_port = {lineLoader_write_tag_0_payload_data_address,{lineLoader_write_tag_0_payload_data_error,lineLoader_write_tag_0_payload_data_valid}}; + always @(posedge clk) begin + if(_zz_1) begin + banks_0[lineLoader_write_data_0_payload_address] <= lineLoader_write_data_0_payload_data; + end + end + + always @(posedge clk) begin + if(_zz_fetchStage_read_banksValue_0_dataMem_1) begin + _zz_banks_0_port1 <= banks_0[_zz_fetchStage_read_banksValue_0_dataMem]; + end + end + + always @(posedge clk) begin + if(_zz_2) begin + ways_0_tags[lineLoader_write_tag_0_payload_address] <= _zz_ways_0_tags_port; + end + end + + always @(posedge clk) begin + if(_zz_fetchStage_read_waysValues_0_tag_valid_1) begin + _zz_ways_0_tags_port1 <= ways_0_tags[_zz_fetchStage_read_waysValues_0_tag_valid]; + end + end + + always @(*) begin + _zz_1 = 1'b0; + if(lineLoader_write_data_0_valid) begin + _zz_1 = 1'b1; + end + end + + always @(*) begin + _zz_2 = 1'b0; + if(lineLoader_write_tag_0_valid) begin + _zz_2 = 1'b1; + end + end + + always @(*) begin + lineLoader_fire = 1'b0; + if(io_mem_rsp_valid) begin + if(when_InstructionCache_l401) begin + lineLoader_fire = 1'b1; + end + end + end + + always @(*) begin + io_cpu_prefetch_haltIt = (lineLoader_valid || lineLoader_flushPending); + if(when_InstructionCache_l338) begin + io_cpu_prefetch_haltIt = 1'b1; + end + if(when_InstructionCache_l342) begin + io_cpu_prefetch_haltIt = 1'b1; + end + if(io_flush) begin + io_cpu_prefetch_haltIt = 1'b1; + end + end + + assign when_InstructionCache_l338 = (! lineLoader_flushCounter[6]); + assign when_InstructionCache_l342 = (! _zz_when_InstructionCache_l342); + assign when_InstructionCache_l351 = (lineLoader_flushPending && (! (lineLoader_valid || io_cpu_fetch_isValid))); + assign io_mem_cmd_fire = (io_mem_cmd_valid && io_mem_cmd_ready); + assign io_mem_cmd_valid = (lineLoader_valid && (! lineLoader_cmdSent)); + assign io_mem_cmd_payload_address = {lineLoader_address[31 : 5],5'h0}; + assign io_mem_cmd_payload_size = 3'b101; + assign when_Utils_l357 = (! lineLoader_valid); + always @(*) begin + lineLoader_wayToAllocate_willIncrement = 1'b0; + if(when_Utils_l357) begin + lineLoader_wayToAllocate_willIncrement = 1'b1; + end + end + + assign lineLoader_wayToAllocate_willClear = 1'b0; + assign lineLoader_wayToAllocate_willOverflowIfInc = 1'b1; + assign lineLoader_wayToAllocate_willOverflow = (lineLoader_wayToAllocate_willOverflowIfInc && lineLoader_wayToAllocate_willIncrement); + assign lineLoader_write_tag_0_valid = ((1'b1 && lineLoader_fire) || (! lineLoader_flushCounter[6])); + assign lineLoader_write_tag_0_payload_address = (lineLoader_flushCounter[6] ? lineLoader_address[10 : 5] : lineLoader_flushCounter[5 : 0]); + assign lineLoader_write_tag_0_payload_data_valid = lineLoader_flushCounter[6]; + assign lineLoader_write_tag_0_payload_data_error = (lineLoader_hadError || io_mem_rsp_payload_error); + assign lineLoader_write_tag_0_payload_data_address = lineLoader_address[31 : 11]; + assign lineLoader_write_data_0_valid = (io_mem_rsp_valid && 1'b1); + assign lineLoader_write_data_0_payload_address = {lineLoader_address[10 : 5],lineLoader_wordIndex}; + assign lineLoader_write_data_0_payload_data = io_mem_rsp_payload_data; + assign when_InstructionCache_l401 = (lineLoader_wordIndex == 3'b111); + assign _zz_fetchStage_read_banksValue_0_dataMem = io_cpu_prefetch_pc[10 : 2]; + assign _zz_fetchStage_read_banksValue_0_dataMem_1 = (! io_cpu_fetch_isStuck); + assign fetchStage_read_banksValue_0_dataMem = _zz_banks_0_port1; + assign fetchStage_read_banksValue_0_data = fetchStage_read_banksValue_0_dataMem[31 : 0]; + assign _zz_fetchStage_read_waysValues_0_tag_valid = io_cpu_prefetch_pc[10 : 5]; + assign _zz_fetchStage_read_waysValues_0_tag_valid_1 = (! io_cpu_fetch_isStuck); + assign _zz_fetchStage_read_waysValues_0_tag_valid_2 = _zz_ways_0_tags_port1; + assign fetchStage_read_waysValues_0_tag_valid = _zz_fetchStage_read_waysValues_0_tag_valid_2[0]; + assign fetchStage_read_waysValues_0_tag_error = _zz_fetchStage_read_waysValues_0_tag_valid_2[1]; + assign fetchStage_read_waysValues_0_tag_address = _zz_fetchStage_read_waysValues_0_tag_valid_2[22 : 2]; + assign fetchStage_hit_hits_0 = (fetchStage_read_waysValues_0_tag_valid && (fetchStage_read_waysValues_0_tag_address == io_cpu_fetch_mmuRsp_physicalAddress[31 : 11])); + assign fetchStage_hit_valid = (fetchStage_hit_hits_0 != 1'b0); + assign fetchStage_hit_error = fetchStage_read_waysValues_0_tag_error; + assign fetchStage_hit_data = fetchStage_read_banksValue_0_data; + assign fetchStage_hit_word = fetchStage_hit_data; + assign io_cpu_fetch_data = fetchStage_hit_word; + assign when_InstructionCache_l435 = (! io_cpu_decode_isStuck); + assign io_cpu_decode_data = io_cpu_fetch_data_regNextWhen; + assign io_cpu_fetch_physicalAddress = io_cpu_fetch_mmuRsp_physicalAddress; + assign when_InstructionCache_l459 = (! io_cpu_decode_isStuck); + assign when_InstructionCache_l459_1 = (! io_cpu_decode_isStuck); + assign when_InstructionCache_l459_2 = (! io_cpu_decode_isStuck); + assign io_cpu_decode_cacheMiss = (! decodeStage_hit_valid); + assign io_cpu_decode_error = (decodeStage_hit_error || ((! decodeStage_mmuRsp_isPaging) && (decodeStage_mmuRsp_exception || (! decodeStage_mmuRsp_allowExecute)))); + assign io_cpu_decode_mmuRefilling = decodeStage_mmuRsp_refilling; + assign io_cpu_decode_mmuException = (((! decodeStage_mmuRsp_refilling) && decodeStage_mmuRsp_isPaging) && (decodeStage_mmuRsp_exception || (! decodeStage_mmuRsp_allowExecute))); + assign io_cpu_decode_physicalAddress = decodeStage_mmuRsp_physicalAddress; + always @(posedge clk) begin + if(reset) begin + lineLoader_valid <= 1'b0; + lineLoader_hadError <= 1'b0; + lineLoader_flushPending <= 1'b1; + lineLoader_cmdSent <= 1'b0; + lineLoader_wordIndex <= 3'b000; + end else begin + if(lineLoader_fire) begin + lineLoader_valid <= 1'b0; + end + if(lineLoader_fire) begin + lineLoader_hadError <= 1'b0; + end + if(io_cpu_fill_valid) begin + lineLoader_valid <= 1'b1; + end + if(io_flush) begin + lineLoader_flushPending <= 1'b1; + end + if(when_InstructionCache_l351) begin + lineLoader_flushPending <= 1'b0; + end + if(io_mem_cmd_fire) begin + lineLoader_cmdSent <= 1'b1; + end + if(lineLoader_fire) begin + lineLoader_cmdSent <= 1'b0; + end + if(io_mem_rsp_valid) begin + lineLoader_wordIndex <= (lineLoader_wordIndex + 3'b001); + if(io_mem_rsp_payload_error) begin + lineLoader_hadError <= 1'b1; + end + end + end + end + + always @(posedge clk) begin + if(io_cpu_fill_valid) begin + lineLoader_address <= io_cpu_fill_payload; + end + if(when_InstructionCache_l338) begin + lineLoader_flushCounter <= (lineLoader_flushCounter + 7'h01); + end + _zz_when_InstructionCache_l342 <= lineLoader_flushCounter[6]; + if(when_InstructionCache_l351) begin + lineLoader_flushCounter <= 7'h0; + end + if(when_InstructionCache_l435) begin + io_cpu_fetch_data_regNextWhen <= io_cpu_fetch_data; + end + if(when_InstructionCache_l459) begin + decodeStage_mmuRsp_physicalAddress <= io_cpu_fetch_mmuRsp_physicalAddress; + decodeStage_mmuRsp_isIoAccess <= io_cpu_fetch_mmuRsp_isIoAccess; + decodeStage_mmuRsp_isPaging <= io_cpu_fetch_mmuRsp_isPaging; + decodeStage_mmuRsp_allowRead <= io_cpu_fetch_mmuRsp_allowRead; + decodeStage_mmuRsp_allowWrite <= io_cpu_fetch_mmuRsp_allowWrite; + decodeStage_mmuRsp_allowExecute <= io_cpu_fetch_mmuRsp_allowExecute; + decodeStage_mmuRsp_exception <= io_cpu_fetch_mmuRsp_exception; + decodeStage_mmuRsp_refilling <= io_cpu_fetch_mmuRsp_refilling; + decodeStage_mmuRsp_bypassTranslation <= io_cpu_fetch_mmuRsp_bypassTranslation; + end + if(when_InstructionCache_l459_1) begin + decodeStage_hit_valid <= fetchStage_hit_valid; + end + if(when_InstructionCache_l459_2) begin + decodeStage_hit_error <= fetchStage_hit_error; + end + end + + +endmodule diff --git a/pythondata_cpu_vexriscv/verilog/VexRiscv_Slim.yaml b/pythondata_cpu_vexriscv/verilog/VexRiscv_Slim.yaml new file mode 100644 index 0000000..b55f8e5 --- /dev/null +++ b/pythondata_cpu_vexriscv/verilog/VexRiscv_Slim.yaml @@ -0,0 +1,4 @@ +iBus: !!vexriscv.BusReport + flushInstructions: [4111, 19, 19, 19] + info: !!vexriscv.CacheReport {bytePerLine: 32, size: 2048} + kind: cached diff --git a/pythondata_cpu_vexriscv/verilog/VexRiscv_SlimCfu.v b/pythondata_cpu_vexriscv/verilog/VexRiscv_SlimCfu.v new file mode 100644 index 0000000..76f3ba0 --- /dev/null +++ b/pythondata_cpu_vexriscv/verilog/VexRiscv_SlimCfu.v @@ -0,0 +1,6928 @@ +// Generator : SpinalHDL v1.6.0 git head : 73c8d8e2b86b45646e9d0b2e729291f2b65e6be3 +// Component : VexRiscv +// Git hash : 593e180abf5ba39e7fa33d4f371646453f84496a + + +`define Input2Kind_binary_sequential_type [0:0] +`define Input2Kind_binary_sequential_RS 1'b0 +`define Input2Kind_binary_sequential_IMM_I 1'b1 + +`define EnvCtrlEnum_binary_sequential_type [1:0] +`define EnvCtrlEnum_binary_sequential_NONE 2'b00 +`define EnvCtrlEnum_binary_sequential_XRET 2'b01 +`define EnvCtrlEnum_binary_sequential_WFI 2'b10 +`define EnvCtrlEnum_binary_sequential_ECALL 2'b11 + +`define BranchCtrlEnum_binary_sequential_type [1:0] +`define BranchCtrlEnum_binary_sequential_INC 2'b00 +`define BranchCtrlEnum_binary_sequential_B 2'b01 +`define BranchCtrlEnum_binary_sequential_JAL 2'b10 +`define BranchCtrlEnum_binary_sequential_JALR 2'b11 + +`define ShiftCtrlEnum_binary_sequential_type [1:0] +`define ShiftCtrlEnum_binary_sequential_DISABLE_1 2'b00 +`define ShiftCtrlEnum_binary_sequential_SLL_1 2'b01 +`define ShiftCtrlEnum_binary_sequential_SRL_1 2'b10 +`define ShiftCtrlEnum_binary_sequential_SRA_1 2'b11 + +`define AluBitwiseCtrlEnum_binary_sequential_type [1:0] +`define AluBitwiseCtrlEnum_binary_sequential_XOR_1 2'b00 +`define AluBitwiseCtrlEnum_binary_sequential_OR_1 2'b01 +`define AluBitwiseCtrlEnum_binary_sequential_AND_1 2'b10 + +`define Src2CtrlEnum_binary_sequential_type [1:0] +`define Src2CtrlEnum_binary_sequential_RS 2'b00 +`define Src2CtrlEnum_binary_sequential_IMI 2'b01 +`define Src2CtrlEnum_binary_sequential_IMS 2'b10 +`define Src2CtrlEnum_binary_sequential_PC 2'b11 + +`define AluCtrlEnum_binary_sequential_type [1:0] +`define AluCtrlEnum_binary_sequential_ADD_SUB 2'b00 +`define AluCtrlEnum_binary_sequential_SLT_SLTU 2'b01 +`define AluCtrlEnum_binary_sequential_BITWISE 2'b10 + +`define Src1CtrlEnum_binary_sequential_type [1:0] +`define Src1CtrlEnum_binary_sequential_RS 2'b00 +`define Src1CtrlEnum_binary_sequential_IMU 2'b01 +`define Src1CtrlEnum_binary_sequential_PC_INCREMENT 2'b10 +`define Src1CtrlEnum_binary_sequential_URS1 2'b11 + + +module VexRiscv ( + input [31:0] externalResetVector, + input timerInterrupt, + input softwareInterrupt, + input [31:0] externalInterruptArray, + output CfuPlugin_bus_cmd_valid, + input CfuPlugin_bus_cmd_ready, + output [9:0] CfuPlugin_bus_cmd_payload_function_id, + output [31:0] CfuPlugin_bus_cmd_payload_inputs_0, + output [31:0] CfuPlugin_bus_cmd_payload_inputs_1, + input CfuPlugin_bus_rsp_valid, + output CfuPlugin_bus_rsp_ready, + input [31:0] CfuPlugin_bus_rsp_payload_outputs_0, + output reg iBusWishbone_CYC, + output reg iBusWishbone_STB, + input iBusWishbone_ACK, + output iBusWishbone_WE, + output [29:0] iBusWishbone_ADR, + input [31:0] iBusWishbone_DAT_MISO, + output [31:0] iBusWishbone_DAT_MOSI, + output [3:0] iBusWishbone_SEL, + input iBusWishbone_ERR, + output [2:0] iBusWishbone_CTI, + output [1:0] iBusWishbone_BTE, + output dBusWishbone_CYC, + output dBusWishbone_STB, + input dBusWishbone_ACK, + output dBusWishbone_WE, + output [29:0] dBusWishbone_ADR, + input [31:0] dBusWishbone_DAT_MISO, + output [31:0] dBusWishbone_DAT_MOSI, + output [3:0] dBusWishbone_SEL, + input dBusWishbone_ERR, + output [2:0] dBusWishbone_CTI, + output [1:0] dBusWishbone_BTE, + input clk, + input reset +); + wire IBusCachedPlugin_cache_io_flush; + wire IBusCachedPlugin_cache_io_cpu_prefetch_isValid; + wire IBusCachedPlugin_cache_io_cpu_fetch_isValid; + wire IBusCachedPlugin_cache_io_cpu_fetch_isStuck; + wire IBusCachedPlugin_cache_io_cpu_fetch_isRemoved; + wire IBusCachedPlugin_cache_io_cpu_decode_isValid; + wire IBusCachedPlugin_cache_io_cpu_decode_isStuck; + wire IBusCachedPlugin_cache_io_cpu_decode_isUser; + reg IBusCachedPlugin_cache_io_cpu_fill_valid; + wire dataCache_1_io_cpu_execute_isValid; + wire [31:0] dataCache_1_io_cpu_execute_address; + wire dataCache_1_io_cpu_memory_isValid; + wire [31:0] dataCache_1_io_cpu_memory_address; + reg dataCache_1_io_cpu_memory_mmuRsp_isIoAccess; + reg dataCache_1_io_cpu_writeBack_isValid; + wire dataCache_1_io_cpu_writeBack_isUser; + wire [31:0] dataCache_1_io_cpu_writeBack_storeData; + wire [31:0] dataCache_1_io_cpu_writeBack_address; + wire dataCache_1_io_cpu_writeBack_fence_SW; + wire dataCache_1_io_cpu_writeBack_fence_SR; + wire dataCache_1_io_cpu_writeBack_fence_SO; + wire dataCache_1_io_cpu_writeBack_fence_SI; + wire dataCache_1_io_cpu_writeBack_fence_PW; + wire dataCache_1_io_cpu_writeBack_fence_PR; + wire dataCache_1_io_cpu_writeBack_fence_PO; + wire dataCache_1_io_cpu_writeBack_fence_PI; + wire [3:0] dataCache_1_io_cpu_writeBack_fence_FM; + wire dataCache_1_io_cpu_flush_valid; + wire dataCache_1_io_mem_cmd_ready; + reg [31:0] _zz_RegFilePlugin_regFile_port0; + reg [31:0] _zz_RegFilePlugin_regFile_port1; + wire IBusCachedPlugin_cache_io_cpu_prefetch_haltIt; + wire [31:0] IBusCachedPlugin_cache_io_cpu_fetch_data; + wire [31:0] IBusCachedPlugin_cache_io_cpu_fetch_physicalAddress; + wire IBusCachedPlugin_cache_io_cpu_decode_error; + wire IBusCachedPlugin_cache_io_cpu_decode_mmuRefilling; + wire IBusCachedPlugin_cache_io_cpu_decode_mmuException; + wire [31:0] IBusCachedPlugin_cache_io_cpu_decode_data; + wire IBusCachedPlugin_cache_io_cpu_decode_cacheMiss; + wire [31:0] IBusCachedPlugin_cache_io_cpu_decode_physicalAddress; + wire IBusCachedPlugin_cache_io_mem_cmd_valid; + wire [31:0] IBusCachedPlugin_cache_io_mem_cmd_payload_address; + wire [2:0] IBusCachedPlugin_cache_io_mem_cmd_payload_size; + wire dataCache_1_io_cpu_execute_haltIt; + wire dataCache_1_io_cpu_execute_refilling; + wire dataCache_1_io_cpu_memory_isWrite; + wire dataCache_1_io_cpu_writeBack_haltIt; + wire [31:0] dataCache_1_io_cpu_writeBack_data; + wire dataCache_1_io_cpu_writeBack_mmuException; + wire dataCache_1_io_cpu_writeBack_unalignedAccess; + wire dataCache_1_io_cpu_writeBack_accessError; + wire dataCache_1_io_cpu_writeBack_isWrite; + wire dataCache_1_io_cpu_writeBack_keepMemRspData; + wire dataCache_1_io_cpu_writeBack_exclusiveOk; + wire dataCache_1_io_cpu_flush_ready; + wire dataCache_1_io_cpu_redo; + wire dataCache_1_io_mem_cmd_valid; + wire dataCache_1_io_mem_cmd_payload_wr; + wire dataCache_1_io_mem_cmd_payload_uncached; + wire [31:0] dataCache_1_io_mem_cmd_payload_address; + wire [31:0] dataCache_1_io_mem_cmd_payload_data; + wire [3:0] dataCache_1_io_mem_cmd_payload_mask; + wire [2:0] dataCache_1_io_mem_cmd_payload_size; + wire dataCache_1_io_mem_cmd_payload_last; + wire [51:0] _zz_memory_MUL_LOW; + wire [51:0] _zz_memory_MUL_LOW_1; + wire [51:0] _zz_memory_MUL_LOW_2; + wire [51:0] _zz_memory_MUL_LOW_3; + wire [32:0] _zz_memory_MUL_LOW_4; + wire [51:0] _zz_memory_MUL_LOW_5; + wire [49:0] _zz_memory_MUL_LOW_6; + wire [51:0] _zz_memory_MUL_LOW_7; + wire [49:0] _zz_memory_MUL_LOW_8; + wire [31:0] _zz_execute_SHIFT_RIGHT; + wire [32:0] _zz_execute_SHIFT_RIGHT_1; + wire [32:0] _zz_execute_SHIFT_RIGHT_2; + wire [31:0] _zz_decode_LEGAL_INSTRUCTION; + wire [31:0] _zz_decode_LEGAL_INSTRUCTION_1; + wire [31:0] _zz_decode_LEGAL_INSTRUCTION_2; + wire _zz_decode_LEGAL_INSTRUCTION_3; + wire [0:0] _zz_decode_LEGAL_INSTRUCTION_4; + wire [14:0] _zz_decode_LEGAL_INSTRUCTION_5; + wire [31:0] _zz_decode_LEGAL_INSTRUCTION_6; + wire [31:0] _zz_decode_LEGAL_INSTRUCTION_7; + wire [31:0] _zz_decode_LEGAL_INSTRUCTION_8; + wire _zz_decode_LEGAL_INSTRUCTION_9; + wire [0:0] _zz_decode_LEGAL_INSTRUCTION_10; + wire [8:0] _zz_decode_LEGAL_INSTRUCTION_11; + wire [31:0] _zz_decode_LEGAL_INSTRUCTION_12; + wire [31:0] _zz_decode_LEGAL_INSTRUCTION_13; + wire [31:0] _zz_decode_LEGAL_INSTRUCTION_14; + wire _zz_decode_LEGAL_INSTRUCTION_15; + wire [0:0] _zz_decode_LEGAL_INSTRUCTION_16; + wire [2:0] _zz_decode_LEGAL_INSTRUCTION_17; + wire [3:0] _zz__zz_IBusCachedPlugin_jump_pcLoad_payload_1; + reg [31:0] _zz_IBusCachedPlugin_jump_pcLoad_payload_5; + wire [1:0] _zz_IBusCachedPlugin_jump_pcLoad_payload_6; + wire [31:0] _zz_IBusCachedPlugin_fetchPc_pc; + wire [2:0] _zz_IBusCachedPlugin_fetchPc_pc_1; + wire [11:0] _zz__zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch; + wire [31:0] _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_2; + wire [19:0] _zz__zz_2; + wire [11:0] _zz__zz_4; + wire [31:0] _zz__zz_6; + wire [31:0] _zz__zz_6_1; + wire [19:0] _zz__zz_IBusCachedPlugin_predictionJumpInterface_payload; + wire [11:0] _zz__zz_IBusCachedPlugin_predictionJumpInterface_payload_2; + wire _zz_IBusCachedPlugin_predictionJumpInterface_payload_4; + wire _zz_IBusCachedPlugin_predictionJumpInterface_payload_5; + wire _zz_IBusCachedPlugin_predictionJumpInterface_payload_6; + wire [2:0] _zz_DBusCachedPlugin_exceptionBus_payload_code; + wire [2:0] _zz_DBusCachedPlugin_exceptionBus_payload_code_1; + reg [7:0] _zz_writeBack_DBusCachedPlugin_rspShifted; + wire [1:0] _zz_writeBack_DBusCachedPlugin_rspShifted_1; + reg [7:0] _zz_writeBack_DBusCachedPlugin_rspShifted_2; + wire [0:0] _zz_writeBack_DBusCachedPlugin_rspShifted_3; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_1; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_2; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_3; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_4; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_5; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_6; + wire [26:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_7; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_8; + wire [1:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_9; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_10; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_11; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_12; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_13; + wire [1:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_14; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_15; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_16; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_17; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_18; + wire [22:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_19; + wire [1:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_20; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_21; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_22; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_23; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_24; + wire [1:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_25; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_26; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_27; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_28; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_29; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_30; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_31; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_32; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_33; + wire [19:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_34; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_35; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_36; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_37; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_38; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_39; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_40; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_41; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_42; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_43; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_44; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_45; + wire [16:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_46; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_47; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_48; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_49; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_50; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_51; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_52; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_53; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_54; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_55; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_56; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_57; + wire [3:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_58; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_59; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_60; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_61; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_62; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_63; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_64; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_65; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_66; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_67; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_68; + wire [13:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_69; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_70; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_71; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_72; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_73; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_74; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_75; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_76; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_77; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_78; + wire [3:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_79; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_80; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_81; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_82; + wire [1:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_83; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_84; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_85; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_86; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_87; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_88; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_89; + wire [3:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_90; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_91; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_92; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_93; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_94; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_95; + wire [1:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_96; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_97; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_98; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_99; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_100; + wire [10:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_101; + wire [5:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_102; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_103; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_104; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_105; + wire [3:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_106; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_107; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_108; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_109; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_110; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_111; + wire [1:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_112; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_113; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_114; + wire [5:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_115; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_116; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_117; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_118; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_119; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_120; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_121; + wire [1:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_122; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_123; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_124; + wire [1:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_125; + wire [7:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_126; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_127; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_128; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_129; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_130; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_131; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_132; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_133; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_134; + wire [5:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_135; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_136; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_137; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_138; + wire [2:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_139; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_140; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_141; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_142; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_143; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_144; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_145; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_146; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_147; + wire [3:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_148; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_149; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_150; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_151; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_152; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_153; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_154; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_155; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_156; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_157; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_158; + wire [1:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_159; + wire [1:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_160; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_161; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_162; + wire [1:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_163; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_164; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_165; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_166; + wire _zz_RegFilePlugin_regFile_port; + wire _zz_decode_RegFilePlugin_rs1Data; + wire _zz_RegFilePlugin_regFile_port_1; + wire _zz_decode_RegFilePlugin_rs2Data; + wire [0:0] _zz__zz_execute_REGFILE_WRITE_DATA; + wire [2:0] _zz__zz_execute_SRC1; + wire [4:0] _zz__zz_execute_SRC1_1; + wire [11:0] _zz__zz_execute_SRC2_3; + wire [31:0] _zz_execute_SrcPlugin_addSub; + wire [31:0] _zz_execute_SrcPlugin_addSub_1; + wire [31:0] _zz_execute_SrcPlugin_addSub_2; + wire [31:0] _zz_execute_SrcPlugin_addSub_3; + wire [31:0] _zz_execute_SrcPlugin_addSub_4; + wire [31:0] _zz_execute_SrcPlugin_addSub_5; + wire [31:0] _zz_execute_SrcPlugin_addSub_6; + wire [19:0] _zz__zz_execute_BranchPlugin_missAlignedTarget_2; + wire [11:0] _zz__zz_execute_BranchPlugin_missAlignedTarget_4; + wire [31:0] _zz__zz_execute_BranchPlugin_missAlignedTarget_6; + wire [31:0] _zz__zz_execute_BranchPlugin_missAlignedTarget_6_1; + wire [31:0] _zz__zz_execute_BranchPlugin_missAlignedTarget_6_2; + wire [19:0] _zz__zz_execute_BranchPlugin_branch_src2_2; + wire [11:0] _zz__zz_execute_BranchPlugin_branch_src2_4; + wire _zz_execute_BranchPlugin_branch_src2_6; + wire _zz_execute_BranchPlugin_branch_src2_7; + wire _zz_execute_BranchPlugin_branch_src2_8; + wire [2:0] _zz_execute_BranchPlugin_branch_src2_9; + wire [1:0] _zz__zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_1; + wire [1:0] _zz__zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_1_1; + wire [1:0] _zz__zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_3; + wire [1:0] _zz__zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_3_1; + wire _zz_when; + wire _zz_when_1; + wire [65:0] _zz_writeBack_MulPlugin_result; + wire [65:0] _zz_writeBack_MulPlugin_result_1; + wire [31:0] _zz__zz_decode_RS2_2; + wire [31:0] _zz__zz_decode_RS2_2_1; + wire [5:0] _zz_memory_DivPlugin_div_counter_valueNext; + wire [0:0] _zz_memory_DivPlugin_div_counter_valueNext_1; + wire [32:0] _zz_memory_DivPlugin_div_stage_0_remainderMinusDenominator; + wire [31:0] _zz_memory_DivPlugin_div_stage_0_outRemainder; + wire [31:0] _zz_memory_DivPlugin_div_stage_0_outRemainder_1; + wire [32:0] _zz_memory_DivPlugin_div_stage_0_outNumerator; + wire [32:0] _zz_memory_DivPlugin_div_result_1; + wire [32:0] _zz_memory_DivPlugin_div_result_2; + wire [32:0] _zz_memory_DivPlugin_div_result_3; + wire [32:0] _zz_memory_DivPlugin_div_result_4; + wire [0:0] _zz_memory_DivPlugin_div_result_5; + wire [32:0] _zz_memory_DivPlugin_rs1_2; + wire [0:0] _zz_memory_DivPlugin_rs1_3; + wire [31:0] _zz_memory_DivPlugin_rs2_1; + wire [0:0] _zz_memory_DivPlugin_rs2_2; + wire [9:0] _zz_execute_CfuPlugin_functionsIds_0; + wire [31:0] _zz_CsrPlugin_csrMapping_readDataInit_25; + wire [26:0] _zz_iBusWishbone_ADR_1; + wire [51:0] memory_MUL_LOW; + wire writeBack_CfuPlugin_CFU_IN_FLIGHT; + wire execute_CfuPlugin_CFU_IN_FLIGHT; + wire [33:0] memory_MUL_HH; + wire [33:0] execute_MUL_HH; + wire [33:0] execute_MUL_HL; + wire [33:0] execute_MUL_LH; + wire [31:0] execute_MUL_LL; + wire [31:0] execute_SHIFT_RIGHT; + wire [31:0] execute_REGFILE_WRITE_DATA; + wire [31:0] memory_MEMORY_STORE_DATA_RF; + wire [31:0] execute_MEMORY_STORE_DATA_RF; + wire decode_CSR_READ_OPCODE; + wire decode_CSR_WRITE_OPCODE; + wire decode_PREDICTION_HAD_BRANCHED2; + wire decode_SRC2_FORCE_ZERO; + wire `Input2Kind_binary_sequential_type decode_CfuPlugin_CFU_INPUT_2_KIND; + wire `Input2Kind_binary_sequential_type _zz_decode_CfuPlugin_CFU_INPUT_2_KIND; + wire `Input2Kind_binary_sequential_type _zz_decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND; + wire `Input2Kind_binary_sequential_type _zz_decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND_1; + wire decode_CfuPlugin_CFU_ENABLE; + wire decode_IS_RS2_SIGNED; + wire decode_IS_RS1_SIGNED; + wire decode_IS_DIV; + wire memory_IS_MUL; + wire execute_IS_MUL; + wire decode_IS_MUL; + wire `EnvCtrlEnum_binary_sequential_type _zz_memory_to_writeBack_ENV_CTRL; + wire `EnvCtrlEnum_binary_sequential_type _zz_memory_to_writeBack_ENV_CTRL_1; + wire `EnvCtrlEnum_binary_sequential_type _zz_execute_to_memory_ENV_CTRL; + wire `EnvCtrlEnum_binary_sequential_type _zz_execute_to_memory_ENV_CTRL_1; + wire `EnvCtrlEnum_binary_sequential_type decode_ENV_CTRL; + wire `EnvCtrlEnum_binary_sequential_type _zz_decode_ENV_CTRL; + wire `EnvCtrlEnum_binary_sequential_type _zz_decode_to_execute_ENV_CTRL; + wire `EnvCtrlEnum_binary_sequential_type _zz_decode_to_execute_ENV_CTRL_1; + wire decode_IS_CSR; + wire `BranchCtrlEnum_binary_sequential_type _zz_decode_to_execute_BRANCH_CTRL; + wire `BranchCtrlEnum_binary_sequential_type _zz_decode_to_execute_BRANCH_CTRL_1; + wire `ShiftCtrlEnum_binary_sequential_type _zz_execute_to_memory_SHIFT_CTRL; + wire `ShiftCtrlEnum_binary_sequential_type _zz_execute_to_memory_SHIFT_CTRL_1; + wire `ShiftCtrlEnum_binary_sequential_type decode_SHIFT_CTRL; + wire `ShiftCtrlEnum_binary_sequential_type _zz_decode_SHIFT_CTRL; + wire `ShiftCtrlEnum_binary_sequential_type _zz_decode_to_execute_SHIFT_CTRL; + wire `ShiftCtrlEnum_binary_sequential_type _zz_decode_to_execute_SHIFT_CTRL_1; + wire `AluBitwiseCtrlEnum_binary_sequential_type decode_ALU_BITWISE_CTRL; + wire `AluBitwiseCtrlEnum_binary_sequential_type _zz_decode_ALU_BITWISE_CTRL; + wire `AluBitwiseCtrlEnum_binary_sequential_type _zz_decode_to_execute_ALU_BITWISE_CTRL; + wire `AluBitwiseCtrlEnum_binary_sequential_type _zz_decode_to_execute_ALU_BITWISE_CTRL_1; + wire decode_SRC_LESS_UNSIGNED; + wire decode_MEMORY_MANAGMENT; + wire memory_MEMORY_WR; + wire decode_MEMORY_WR; + wire execute_BYPASSABLE_MEMORY_STAGE; + wire decode_BYPASSABLE_MEMORY_STAGE; + wire decode_BYPASSABLE_EXECUTE_STAGE; + wire `Src2CtrlEnum_binary_sequential_type decode_SRC2_CTRL; + wire `Src2CtrlEnum_binary_sequential_type _zz_decode_SRC2_CTRL; + wire `Src2CtrlEnum_binary_sequential_type _zz_decode_to_execute_SRC2_CTRL; + wire `Src2CtrlEnum_binary_sequential_type _zz_decode_to_execute_SRC2_CTRL_1; + wire `AluCtrlEnum_binary_sequential_type decode_ALU_CTRL; + wire `AluCtrlEnum_binary_sequential_type _zz_decode_ALU_CTRL; + wire `AluCtrlEnum_binary_sequential_type _zz_decode_to_execute_ALU_CTRL; + wire `AluCtrlEnum_binary_sequential_type _zz_decode_to_execute_ALU_CTRL_1; + wire `Src1CtrlEnum_binary_sequential_type decode_SRC1_CTRL; + wire `Src1CtrlEnum_binary_sequential_type _zz_decode_SRC1_CTRL; + wire `Src1CtrlEnum_binary_sequential_type _zz_decode_to_execute_SRC1_CTRL; + wire `Src1CtrlEnum_binary_sequential_type _zz_decode_to_execute_SRC1_CTRL_1; + wire decode_MEMORY_FORCE_CONSTISTENCY; + wire [31:0] writeBack_FORMAL_PC_NEXT; + wire [31:0] memory_FORMAL_PC_NEXT; + wire [31:0] execute_FORMAL_PC_NEXT; + wire [31:0] decode_FORMAL_PC_NEXT; + wire [31:0] memory_PC; + reg _zz_memory_to_writeBack_CfuPlugin_CFU_IN_FLIGHT; + reg _zz_execute_to_memory_CfuPlugin_CFU_IN_FLIGHT; + wire memory_CfuPlugin_CFU_IN_FLIGHT; + wire `Input2Kind_binary_sequential_type execute_CfuPlugin_CFU_INPUT_2_KIND; + wire `Input2Kind_binary_sequential_type _zz_execute_CfuPlugin_CFU_INPUT_2_KIND; + wire execute_CfuPlugin_CFU_ENABLE; + wire execute_IS_RS1_SIGNED; + wire execute_IS_DIV; + wire execute_IS_RS2_SIGNED; + wire memory_IS_DIV; + wire writeBack_IS_MUL; + wire [33:0] writeBack_MUL_HH; + wire [51:0] writeBack_MUL_LOW; + wire [33:0] memory_MUL_HL; + wire [33:0] memory_MUL_LH; + wire [31:0] memory_MUL_LL; + wire execute_CSR_READ_OPCODE; + wire execute_CSR_WRITE_OPCODE; + wire execute_IS_CSR; + wire `EnvCtrlEnum_binary_sequential_type memory_ENV_CTRL; + wire `EnvCtrlEnum_binary_sequential_type _zz_memory_ENV_CTRL; + wire `EnvCtrlEnum_binary_sequential_type execute_ENV_CTRL; + wire `EnvCtrlEnum_binary_sequential_type _zz_execute_ENV_CTRL; + wire `EnvCtrlEnum_binary_sequential_type writeBack_ENV_CTRL; + wire `EnvCtrlEnum_binary_sequential_type _zz_writeBack_ENV_CTRL; + wire [31:0] execute_BRANCH_CALC; + wire execute_BRANCH_DO; + wire [31:0] execute_PC; + wire execute_PREDICTION_HAD_BRANCHED2; + (* keep , syn_keep *) wire [31:0] execute_RS1 /* synthesis syn_keep = 1 */ ; + wire execute_BRANCH_COND_RESULT; + wire `BranchCtrlEnum_binary_sequential_type execute_BRANCH_CTRL; + wire `BranchCtrlEnum_binary_sequential_type _zz_execute_BRANCH_CTRL; + wire decode_RS2_USE; + wire decode_RS1_USE; + reg [31:0] _zz_decode_RS2; + wire execute_REGFILE_WRITE_VALID; + wire execute_BYPASSABLE_EXECUTE_STAGE; + wire memory_REGFILE_WRITE_VALID; + wire [31:0] memory_INSTRUCTION; + wire memory_BYPASSABLE_MEMORY_STAGE; + wire writeBack_REGFILE_WRITE_VALID; + reg [31:0] decode_RS2; + reg [31:0] decode_RS1; + wire [31:0] memory_SHIFT_RIGHT; + reg [31:0] _zz_decode_RS2_1; + wire `ShiftCtrlEnum_binary_sequential_type memory_SHIFT_CTRL; + wire `ShiftCtrlEnum_binary_sequential_type _zz_memory_SHIFT_CTRL; + wire `ShiftCtrlEnum_binary_sequential_type execute_SHIFT_CTRL; + wire `ShiftCtrlEnum_binary_sequential_type _zz_execute_SHIFT_CTRL; + wire execute_SRC_LESS_UNSIGNED; + wire execute_SRC2_FORCE_ZERO; + wire execute_SRC_USE_SUB_LESS; + wire [31:0] _zz_execute_SRC2; + wire `Src2CtrlEnum_binary_sequential_type execute_SRC2_CTRL; + wire `Src2CtrlEnum_binary_sequential_type _zz_execute_SRC2_CTRL; + wire `Src1CtrlEnum_binary_sequential_type execute_SRC1_CTRL; + wire `Src1CtrlEnum_binary_sequential_type _zz_execute_SRC1_CTRL; + wire decode_SRC_USE_SUB_LESS; + wire decode_SRC_ADD_ZERO; + wire [31:0] execute_SRC_ADD_SUB; + wire execute_SRC_LESS; + wire `AluCtrlEnum_binary_sequential_type execute_ALU_CTRL; + wire `AluCtrlEnum_binary_sequential_type _zz_execute_ALU_CTRL; + wire [31:0] execute_SRC2; + wire [31:0] execute_SRC1; + wire `AluBitwiseCtrlEnum_binary_sequential_type execute_ALU_BITWISE_CTRL; + wire `AluBitwiseCtrlEnum_binary_sequential_type _zz_execute_ALU_BITWISE_CTRL; + wire [31:0] _zz_lastStageRegFileWrite_payload_address; + wire _zz_lastStageRegFileWrite_valid; + reg _zz_1; + wire [31:0] decode_INSTRUCTION_ANTICIPATED; + reg decode_REGFILE_WRITE_VALID; + wire decode_LEGAL_INSTRUCTION; + wire `Input2Kind_binary_sequential_type _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_1; + wire `EnvCtrlEnum_binary_sequential_type _zz_decode_ENV_CTRL_1; + wire `BranchCtrlEnum_binary_sequential_type _zz_decode_BRANCH_CTRL; + wire `ShiftCtrlEnum_binary_sequential_type _zz_decode_SHIFT_CTRL_1; + wire `AluBitwiseCtrlEnum_binary_sequential_type _zz_decode_ALU_BITWISE_CTRL_1; + wire `Src2CtrlEnum_binary_sequential_type _zz_decode_SRC2_CTRL_1; + wire `AluCtrlEnum_binary_sequential_type _zz_decode_ALU_CTRL_1; + wire `Src1CtrlEnum_binary_sequential_type _zz_decode_SRC1_CTRL_1; + reg [31:0] _zz_decode_RS2_2; + wire writeBack_MEMORY_WR; + wire [31:0] writeBack_MEMORY_STORE_DATA_RF; + wire [31:0] writeBack_REGFILE_WRITE_DATA; + wire writeBack_MEMORY_ENABLE; + wire [31:0] memory_REGFILE_WRITE_DATA; + wire memory_MEMORY_ENABLE; + wire execute_MEMORY_FORCE_CONSTISTENCY; + wire execute_MEMORY_MANAGMENT; + (* keep , syn_keep *) wire [31:0] execute_RS2 /* synthesis syn_keep = 1 */ ; + wire execute_MEMORY_WR; + wire [31:0] execute_SRC_ADD; + wire execute_MEMORY_ENABLE; + wire [31:0] execute_INSTRUCTION; + wire decode_MEMORY_ENABLE; + wire decode_FLUSH_ALL; + reg IBusCachedPlugin_rsp_issueDetected_4; + reg IBusCachedPlugin_rsp_issueDetected_3; + reg IBusCachedPlugin_rsp_issueDetected_2; + reg IBusCachedPlugin_rsp_issueDetected_1; + wire `BranchCtrlEnum_binary_sequential_type decode_BRANCH_CTRL; + wire `BranchCtrlEnum_binary_sequential_type _zz_decode_BRANCH_CTRL_1; + wire [31:0] decode_INSTRUCTION; + reg [31:0] _zz_execute_to_memory_FORMAL_PC_NEXT; + reg [31:0] _zz_decode_to_execute_FORMAL_PC_NEXT; + wire [31:0] decode_PC; + wire [31:0] writeBack_PC; + wire [31:0] writeBack_INSTRUCTION; + reg decode_arbitration_haltItself; + reg decode_arbitration_haltByOther; + reg decode_arbitration_removeIt; + wire decode_arbitration_flushIt; + reg decode_arbitration_flushNext; + wire decode_arbitration_isValid; + wire decode_arbitration_isStuck; + wire decode_arbitration_isStuckByOthers; + wire decode_arbitration_isFlushed; + wire decode_arbitration_isMoving; + wire decode_arbitration_isFiring; + reg execute_arbitration_haltItself; + reg execute_arbitration_haltByOther; + reg execute_arbitration_removeIt; + wire execute_arbitration_flushIt; + reg execute_arbitration_flushNext; + reg execute_arbitration_isValid; + wire execute_arbitration_isStuck; + wire execute_arbitration_isStuckByOthers; + wire execute_arbitration_isFlushed; + wire execute_arbitration_isMoving; + wire execute_arbitration_isFiring; + reg memory_arbitration_haltItself; + wire memory_arbitration_haltByOther; + reg memory_arbitration_removeIt; + wire memory_arbitration_flushIt; + wire memory_arbitration_flushNext; + reg memory_arbitration_isValid; + wire memory_arbitration_isStuck; + wire memory_arbitration_isStuckByOthers; + wire memory_arbitration_isFlushed; + wire memory_arbitration_isMoving; + wire memory_arbitration_isFiring; + reg writeBack_arbitration_haltItself; + wire writeBack_arbitration_haltByOther; + reg writeBack_arbitration_removeIt; + reg writeBack_arbitration_flushIt; + reg writeBack_arbitration_flushNext; + reg writeBack_arbitration_isValid; + wire writeBack_arbitration_isStuck; + wire writeBack_arbitration_isStuckByOthers; + wire writeBack_arbitration_isFlushed; + wire writeBack_arbitration_isMoving; + wire writeBack_arbitration_isFiring; + wire [31:0] lastStageInstruction /* verilator public */ ; + wire [31:0] lastStagePc /* verilator public */ ; + wire lastStageIsValid /* verilator public */ ; + wire lastStageIsFiring /* verilator public */ ; + reg IBusCachedPlugin_fetcherHalt; + reg IBusCachedPlugin_incomingInstruction; + wire IBusCachedPlugin_predictionJumpInterface_valid; + (* keep , syn_keep *) wire [31:0] IBusCachedPlugin_predictionJumpInterface_payload /* synthesis syn_keep = 1 */ ; + reg IBusCachedPlugin_decodePrediction_cmd_hadBranch; + wire IBusCachedPlugin_decodePrediction_rsp_wasWrong; + wire IBusCachedPlugin_pcValids_0; + wire IBusCachedPlugin_pcValids_1; + wire IBusCachedPlugin_pcValids_2; + wire IBusCachedPlugin_pcValids_3; + reg IBusCachedPlugin_decodeExceptionPort_valid; + reg [3:0] IBusCachedPlugin_decodeExceptionPort_payload_code; + wire [31:0] IBusCachedPlugin_decodeExceptionPort_payload_badAddr; + wire IBusCachedPlugin_mmuBus_cmd_0_isValid; + wire IBusCachedPlugin_mmuBus_cmd_0_isStuck; + wire [31:0] IBusCachedPlugin_mmuBus_cmd_0_virtualAddress; + wire IBusCachedPlugin_mmuBus_cmd_0_bypassTranslation; + wire [31:0] IBusCachedPlugin_mmuBus_rsp_physicalAddress; + wire IBusCachedPlugin_mmuBus_rsp_isIoAccess; + wire IBusCachedPlugin_mmuBus_rsp_isPaging; + wire IBusCachedPlugin_mmuBus_rsp_allowRead; + wire IBusCachedPlugin_mmuBus_rsp_allowWrite; + wire IBusCachedPlugin_mmuBus_rsp_allowExecute; + wire IBusCachedPlugin_mmuBus_rsp_exception; + wire IBusCachedPlugin_mmuBus_rsp_refilling; + wire IBusCachedPlugin_mmuBus_rsp_bypassTranslation; + wire IBusCachedPlugin_mmuBus_end; + wire IBusCachedPlugin_mmuBus_busy; + wire dBus_cmd_valid; + wire dBus_cmd_ready; + wire dBus_cmd_payload_wr; + wire dBus_cmd_payload_uncached; + wire [31:0] dBus_cmd_payload_address; + wire [31:0] dBus_cmd_payload_data; + wire [3:0] dBus_cmd_payload_mask; + wire [2:0] dBus_cmd_payload_size; + wire dBus_cmd_payload_last; + wire dBus_rsp_valid; + wire dBus_rsp_payload_last; + wire [31:0] dBus_rsp_payload_data; + wire dBus_rsp_payload_error; + wire DBusCachedPlugin_mmuBus_cmd_0_isValid; + wire DBusCachedPlugin_mmuBus_cmd_0_isStuck; + wire [31:0] DBusCachedPlugin_mmuBus_cmd_0_virtualAddress; + wire DBusCachedPlugin_mmuBus_cmd_0_bypassTranslation; + wire [31:0] DBusCachedPlugin_mmuBus_rsp_physicalAddress; + wire DBusCachedPlugin_mmuBus_rsp_isIoAccess; + wire DBusCachedPlugin_mmuBus_rsp_isPaging; + wire DBusCachedPlugin_mmuBus_rsp_allowRead; + wire DBusCachedPlugin_mmuBus_rsp_allowWrite; + wire DBusCachedPlugin_mmuBus_rsp_allowExecute; + wire DBusCachedPlugin_mmuBus_rsp_exception; + wire DBusCachedPlugin_mmuBus_rsp_refilling; + wire DBusCachedPlugin_mmuBus_rsp_bypassTranslation; + wire DBusCachedPlugin_mmuBus_end; + wire DBusCachedPlugin_mmuBus_busy; + reg DBusCachedPlugin_redoBranch_valid; + wire [31:0] DBusCachedPlugin_redoBranch_payload; + reg DBusCachedPlugin_exceptionBus_valid; + reg [3:0] DBusCachedPlugin_exceptionBus_payload_code; + wire [31:0] DBusCachedPlugin_exceptionBus_payload_badAddr; + wire decodeExceptionPort_valid; + wire [3:0] decodeExceptionPort_payload_code; + wire [31:0] decodeExceptionPort_payload_badAddr; + wire BranchPlugin_jumpInterface_valid; + wire [31:0] BranchPlugin_jumpInterface_payload; + reg BranchPlugin_branchExceptionPort_valid; + wire [3:0] BranchPlugin_branchExceptionPort_payload_code; + wire [31:0] BranchPlugin_branchExceptionPort_payload_badAddr; + wire [31:0] CsrPlugin_csrMapping_readDataSignal; + wire [31:0] CsrPlugin_csrMapping_readDataInit; + wire [31:0] CsrPlugin_csrMapping_writeDataSignal; + wire CsrPlugin_csrMapping_allowCsrSignal; + wire CsrPlugin_csrMapping_hazardFree; + reg CsrPlugin_inWfi /* verilator public */ ; + wire CsrPlugin_thirdPartyWake; + reg CsrPlugin_jumpInterface_valid; + reg [31:0] CsrPlugin_jumpInterface_payload; + wire CsrPlugin_exceptionPendings_0; + wire CsrPlugin_exceptionPendings_1; + wire CsrPlugin_exceptionPendings_2; + wire CsrPlugin_exceptionPendings_3; + wire externalInterrupt; + wire contextSwitching; + reg [1:0] CsrPlugin_privilege; + wire CsrPlugin_forceMachineWire; + reg CsrPlugin_selfException_valid; + reg [3:0] CsrPlugin_selfException_payload_code; + wire [31:0] CsrPlugin_selfException_payload_badAddr; + wire CsrPlugin_allowInterrupts; + wire CsrPlugin_allowException; + wire CsrPlugin_allowEbreakException; + wire IBusCachedPlugin_externalFlush; + wire IBusCachedPlugin_jump_pcLoad_valid; + wire [31:0] IBusCachedPlugin_jump_pcLoad_payload; + wire [3:0] _zz_IBusCachedPlugin_jump_pcLoad_payload; + wire [3:0] _zz_IBusCachedPlugin_jump_pcLoad_payload_1; + wire _zz_IBusCachedPlugin_jump_pcLoad_payload_2; + wire _zz_IBusCachedPlugin_jump_pcLoad_payload_3; + wire _zz_IBusCachedPlugin_jump_pcLoad_payload_4; + wire IBusCachedPlugin_fetchPc_output_valid; + wire IBusCachedPlugin_fetchPc_output_ready; + wire [31:0] IBusCachedPlugin_fetchPc_output_payload; + reg [31:0] IBusCachedPlugin_fetchPc_pcReg /* verilator public */ ; + reg IBusCachedPlugin_fetchPc_correction; + reg IBusCachedPlugin_fetchPc_correctionReg; + wire IBusCachedPlugin_fetchPc_output_fire; + wire IBusCachedPlugin_fetchPc_corrected; + reg IBusCachedPlugin_fetchPc_pcRegPropagate; + reg IBusCachedPlugin_fetchPc_booted; + reg IBusCachedPlugin_fetchPc_inc; + wire when_Fetcher_l131; + wire IBusCachedPlugin_fetchPc_output_fire_1; + wire when_Fetcher_l131_1; + reg [31:0] IBusCachedPlugin_fetchPc_pc; + wire IBusCachedPlugin_fetchPc_redo_valid; + wire [31:0] IBusCachedPlugin_fetchPc_redo_payload; + reg IBusCachedPlugin_fetchPc_flushed; + wire when_Fetcher_l158; + reg IBusCachedPlugin_iBusRsp_redoFetch; + wire IBusCachedPlugin_iBusRsp_stages_0_input_valid; + wire IBusCachedPlugin_iBusRsp_stages_0_input_ready; + wire [31:0] IBusCachedPlugin_iBusRsp_stages_0_input_payload; + wire IBusCachedPlugin_iBusRsp_stages_0_output_valid; + wire IBusCachedPlugin_iBusRsp_stages_0_output_ready; + wire [31:0] IBusCachedPlugin_iBusRsp_stages_0_output_payload; + reg IBusCachedPlugin_iBusRsp_stages_0_halt; + wire IBusCachedPlugin_iBusRsp_stages_1_input_valid; + wire IBusCachedPlugin_iBusRsp_stages_1_input_ready; + wire [31:0] IBusCachedPlugin_iBusRsp_stages_1_input_payload; + wire IBusCachedPlugin_iBusRsp_stages_1_output_valid; + wire IBusCachedPlugin_iBusRsp_stages_1_output_ready; + wire [31:0] IBusCachedPlugin_iBusRsp_stages_1_output_payload; + reg IBusCachedPlugin_iBusRsp_stages_1_halt; + wire IBusCachedPlugin_iBusRsp_stages_2_input_valid; + wire IBusCachedPlugin_iBusRsp_stages_2_input_ready; + wire [31:0] IBusCachedPlugin_iBusRsp_stages_2_input_payload; + wire IBusCachedPlugin_iBusRsp_stages_2_output_valid; + wire IBusCachedPlugin_iBusRsp_stages_2_output_ready; + wire [31:0] IBusCachedPlugin_iBusRsp_stages_2_output_payload; + reg IBusCachedPlugin_iBusRsp_stages_2_halt; + wire _zz_IBusCachedPlugin_iBusRsp_stages_0_input_ready; + wire _zz_IBusCachedPlugin_iBusRsp_stages_1_input_ready; + wire _zz_IBusCachedPlugin_iBusRsp_stages_2_input_ready; + wire IBusCachedPlugin_iBusRsp_flush; + wire _zz_IBusCachedPlugin_iBusRsp_stages_0_output_ready; + wire _zz_IBusCachedPlugin_iBusRsp_stages_0_output_ready_1; + reg _zz_IBusCachedPlugin_iBusRsp_stages_0_output_ready_2; + wire IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_valid; + wire IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_ready; + wire [31:0] IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_payload; + reg _zz_IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_valid; + reg [31:0] _zz_IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_payload; + reg IBusCachedPlugin_iBusRsp_readyForError; + wire IBusCachedPlugin_iBusRsp_output_valid; + wire IBusCachedPlugin_iBusRsp_output_ready; + wire [31:0] IBusCachedPlugin_iBusRsp_output_payload_pc; + wire IBusCachedPlugin_iBusRsp_output_payload_rsp_error; + wire [31:0] IBusCachedPlugin_iBusRsp_output_payload_rsp_inst; + wire IBusCachedPlugin_iBusRsp_output_payload_isRvc; + wire when_Fetcher_l240; + wire when_Fetcher_l320; + reg IBusCachedPlugin_injector_nextPcCalc_valids_0; + wire when_Fetcher_l329; + reg IBusCachedPlugin_injector_nextPcCalc_valids_1; + wire when_Fetcher_l329_1; + reg IBusCachedPlugin_injector_nextPcCalc_valids_2; + wire when_Fetcher_l329_2; + reg IBusCachedPlugin_injector_nextPcCalc_valids_3; + wire when_Fetcher_l329_3; + reg IBusCachedPlugin_injector_nextPcCalc_valids_4; + wire when_Fetcher_l329_4; + wire _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch; + reg [18:0] _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_1; + wire _zz_2; + reg [10:0] _zz_3; + wire _zz_4; + reg [18:0] _zz_5; + reg _zz_6; + wire _zz_IBusCachedPlugin_predictionJumpInterface_payload; + reg [10:0] _zz_IBusCachedPlugin_predictionJumpInterface_payload_1; + wire _zz_IBusCachedPlugin_predictionJumpInterface_payload_2; + reg [18:0] _zz_IBusCachedPlugin_predictionJumpInterface_payload_3; + wire iBus_cmd_valid; + wire iBus_cmd_ready; + reg [31:0] iBus_cmd_payload_address; + wire [2:0] iBus_cmd_payload_size; + wire iBus_rsp_valid; + wire [31:0] iBus_rsp_payload_data; + wire iBus_rsp_payload_error; + wire [31:0] _zz_IBusCachedPlugin_rspCounter; + reg [31:0] IBusCachedPlugin_rspCounter; + wire IBusCachedPlugin_s0_tightlyCoupledHit; + reg IBusCachedPlugin_s1_tightlyCoupledHit; + reg IBusCachedPlugin_s2_tightlyCoupledHit; + wire IBusCachedPlugin_rsp_iBusRspOutputHalt; + wire IBusCachedPlugin_rsp_issueDetected; + reg IBusCachedPlugin_rsp_redoFetch; + wire when_IBusCachedPlugin_l239; + wire when_IBusCachedPlugin_l244; + wire when_IBusCachedPlugin_l250; + wire when_IBusCachedPlugin_l256; + wire when_IBusCachedPlugin_l267; + wire dataCache_1_io_mem_cmd_s2mPipe_valid; + reg dataCache_1_io_mem_cmd_s2mPipe_ready; + wire dataCache_1_io_mem_cmd_s2mPipe_payload_wr; + wire dataCache_1_io_mem_cmd_s2mPipe_payload_uncached; + wire [31:0] dataCache_1_io_mem_cmd_s2mPipe_payload_address; + wire [31:0] dataCache_1_io_mem_cmd_s2mPipe_payload_data; + wire [3:0] dataCache_1_io_mem_cmd_s2mPipe_payload_mask; + wire [2:0] dataCache_1_io_mem_cmd_s2mPipe_payload_size; + wire dataCache_1_io_mem_cmd_s2mPipe_payload_last; + reg dataCache_1_io_mem_cmd_rValid; + reg dataCache_1_io_mem_cmd_rData_wr; + reg dataCache_1_io_mem_cmd_rData_uncached; + reg [31:0] dataCache_1_io_mem_cmd_rData_address; + reg [31:0] dataCache_1_io_mem_cmd_rData_data; + reg [3:0] dataCache_1_io_mem_cmd_rData_mask; + reg [2:0] dataCache_1_io_mem_cmd_rData_size; + reg dataCache_1_io_mem_cmd_rData_last; + wire dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_valid; + wire dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_ready; + wire dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_payload_wr; + wire dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_payload_uncached; + wire [31:0] dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_payload_address; + wire [31:0] dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_payload_data; + wire [3:0] dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_payload_mask; + wire [2:0] dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_payload_size; + wire dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_payload_last; + reg dataCache_1_io_mem_cmd_s2mPipe_rValid; + reg dataCache_1_io_mem_cmd_s2mPipe_rData_wr; + reg dataCache_1_io_mem_cmd_s2mPipe_rData_uncached; + reg [31:0] dataCache_1_io_mem_cmd_s2mPipe_rData_address; + reg [31:0] dataCache_1_io_mem_cmd_s2mPipe_rData_data; + reg [3:0] dataCache_1_io_mem_cmd_s2mPipe_rData_mask; + reg [2:0] dataCache_1_io_mem_cmd_s2mPipe_rData_size; + reg dataCache_1_io_mem_cmd_s2mPipe_rData_last; + wire when_Stream_l342; + wire [31:0] _zz_DBusCachedPlugin_rspCounter; + reg [31:0] DBusCachedPlugin_rspCounter; + wire when_DBusCachedPlugin_l303; + wire [1:0] execute_DBusCachedPlugin_size; + reg [31:0] _zz_execute_MEMORY_STORE_DATA_RF; + wire dataCache_1_io_cpu_flush_isStall; + wire when_DBusCachedPlugin_l343; + wire when_DBusCachedPlugin_l359; + wire when_DBusCachedPlugin_l386; + wire when_DBusCachedPlugin_l438; + wire when_DBusCachedPlugin_l458; + wire [7:0] writeBack_DBusCachedPlugin_rspSplits_0; + wire [7:0] writeBack_DBusCachedPlugin_rspSplits_1; + wire [7:0] writeBack_DBusCachedPlugin_rspSplits_2; + wire [7:0] writeBack_DBusCachedPlugin_rspSplits_3; + reg [31:0] writeBack_DBusCachedPlugin_rspShifted; + wire [31:0] writeBack_DBusCachedPlugin_rspRf; + wire [1:0] switch_Misc_l200; + wire _zz_writeBack_DBusCachedPlugin_rspFormated; + reg [31:0] _zz_writeBack_DBusCachedPlugin_rspFormated_1; + wire _zz_writeBack_DBusCachedPlugin_rspFormated_2; + reg [31:0] _zz_writeBack_DBusCachedPlugin_rspFormated_3; + reg [31:0] writeBack_DBusCachedPlugin_rspFormated; + wire when_DBusCachedPlugin_l484; + wire [33:0] _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2; + wire _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_3; + wire _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_4; + wire _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_5; + wire _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_6; + wire _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_7; + wire `Src1CtrlEnum_binary_sequential_type _zz_decode_SRC1_CTRL_2; + wire `AluCtrlEnum_binary_sequential_type _zz_decode_ALU_CTRL_2; + wire `Src2CtrlEnum_binary_sequential_type _zz_decode_SRC2_CTRL_2; + wire `AluBitwiseCtrlEnum_binary_sequential_type _zz_decode_ALU_BITWISE_CTRL_2; + wire `ShiftCtrlEnum_binary_sequential_type _zz_decode_SHIFT_CTRL_2; + wire `BranchCtrlEnum_binary_sequential_type _zz_decode_BRANCH_CTRL_2; + wire `EnvCtrlEnum_binary_sequential_type _zz_decode_ENV_CTRL_2; + wire `Input2Kind_binary_sequential_type _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_8; + wire when_RegFilePlugin_l63; + wire [4:0] decode_RegFilePlugin_regFileReadAddress1; + wire [4:0] decode_RegFilePlugin_regFileReadAddress2; + wire [31:0] decode_RegFilePlugin_rs1Data; + wire [31:0] decode_RegFilePlugin_rs2Data; + reg lastStageRegFileWrite_valid /* verilator public */ ; + reg [4:0] lastStageRegFileWrite_payload_address /* verilator public */ ; + reg [31:0] lastStageRegFileWrite_payload_data /* verilator public */ ; + reg _zz_7; + reg [31:0] execute_IntAluPlugin_bitwise; + reg [31:0] _zz_execute_REGFILE_WRITE_DATA; + reg [31:0] _zz_execute_SRC1; + wire _zz_execute_SRC2_1; + reg [19:0] _zz_execute_SRC2_2; + wire _zz_execute_SRC2_3; + reg [19:0] _zz_execute_SRC2_4; + reg [31:0] _zz_execute_SRC2_5; + reg [31:0] execute_SrcPlugin_addSub; + wire execute_SrcPlugin_less; + wire [4:0] execute_FullBarrelShifterPlugin_amplitude; + reg [31:0] _zz_execute_FullBarrelShifterPlugin_reversed; + wire [31:0] execute_FullBarrelShifterPlugin_reversed; + reg [31:0] _zz_decode_RS2_3; + reg HazardSimplePlugin_src0Hazard; + reg HazardSimplePlugin_src1Hazard; + wire HazardSimplePlugin_writeBackWrites_valid; + wire [4:0] HazardSimplePlugin_writeBackWrites_payload_address; + wire [31:0] HazardSimplePlugin_writeBackWrites_payload_data; + reg HazardSimplePlugin_writeBackBuffer_valid; + reg [4:0] HazardSimplePlugin_writeBackBuffer_payload_address; + reg [31:0] HazardSimplePlugin_writeBackBuffer_payload_data; + wire HazardSimplePlugin_addr0Match; + wire HazardSimplePlugin_addr1Match; + wire when_HazardSimplePlugin_l47; + wire when_HazardSimplePlugin_l48; + wire when_HazardSimplePlugin_l51; + wire when_HazardSimplePlugin_l45; + wire when_HazardSimplePlugin_l57; + wire when_HazardSimplePlugin_l58; + wire when_HazardSimplePlugin_l48_1; + wire when_HazardSimplePlugin_l51_1; + wire when_HazardSimplePlugin_l45_1; + wire when_HazardSimplePlugin_l57_1; + wire when_HazardSimplePlugin_l58_1; + wire when_HazardSimplePlugin_l48_2; + wire when_HazardSimplePlugin_l51_2; + wire when_HazardSimplePlugin_l45_2; + wire when_HazardSimplePlugin_l57_2; + wire when_HazardSimplePlugin_l58_2; + wire when_HazardSimplePlugin_l105; + wire when_HazardSimplePlugin_l108; + wire when_HazardSimplePlugin_l113; + wire execute_BranchPlugin_eq; + wire [2:0] switch_Misc_l200_1; + reg _zz_execute_BRANCH_COND_RESULT; + reg _zz_execute_BRANCH_COND_RESULT_1; + wire _zz_execute_BranchPlugin_missAlignedTarget; + reg [19:0] _zz_execute_BranchPlugin_missAlignedTarget_1; + wire _zz_execute_BranchPlugin_missAlignedTarget_2; + reg [10:0] _zz_execute_BranchPlugin_missAlignedTarget_3; + wire _zz_execute_BranchPlugin_missAlignedTarget_4; + reg [18:0] _zz_execute_BranchPlugin_missAlignedTarget_5; + reg _zz_execute_BranchPlugin_missAlignedTarget_6; + wire execute_BranchPlugin_missAlignedTarget; + reg [31:0] execute_BranchPlugin_branch_src1; + reg [31:0] execute_BranchPlugin_branch_src2; + wire _zz_execute_BranchPlugin_branch_src2; + reg [19:0] _zz_execute_BranchPlugin_branch_src2_1; + wire _zz_execute_BranchPlugin_branch_src2_2; + reg [10:0] _zz_execute_BranchPlugin_branch_src2_3; + wire _zz_execute_BranchPlugin_branch_src2_4; + reg [18:0] _zz_execute_BranchPlugin_branch_src2_5; + wire [31:0] execute_BranchPlugin_branchAdder; + wire when_BranchPlugin_l296; + reg [1:0] CsrPlugin_misa_base; + reg [25:0] CsrPlugin_misa_extensions; + reg [1:0] CsrPlugin_mtvec_mode; + reg [29:0] CsrPlugin_mtvec_base; + reg [31:0] CsrPlugin_mepc; + reg CsrPlugin_mstatus_MIE; + reg CsrPlugin_mstatus_MPIE; + reg [1:0] CsrPlugin_mstatus_MPP; + reg CsrPlugin_mip_MEIP; + reg CsrPlugin_mip_MTIP; + reg CsrPlugin_mip_MSIP; + reg CsrPlugin_mie_MEIE; + reg CsrPlugin_mie_MTIE; + reg CsrPlugin_mie_MSIE; + reg [31:0] CsrPlugin_mscratch; + reg CsrPlugin_mcause_interrupt; + reg [3:0] CsrPlugin_mcause_exceptionCode; + reg [31:0] CsrPlugin_mtval; + reg [63:0] CsrPlugin_mcycle = 64'b0000000000000000000000000000000000000000000000000000000000000000; + reg [63:0] CsrPlugin_minstret = 64'b0000000000000000000000000000000000000000000000000000000000000000; + wire _zz_when_CsrPlugin_l952; + wire _zz_when_CsrPlugin_l952_1; + wire _zz_when_CsrPlugin_l952_2; + reg CsrPlugin_exceptionPortCtrl_exceptionValids_decode; + reg CsrPlugin_exceptionPortCtrl_exceptionValids_execute; + reg CsrPlugin_exceptionPortCtrl_exceptionValids_memory; + reg CsrPlugin_exceptionPortCtrl_exceptionValids_writeBack; + reg CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_decode; + reg CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_execute; + reg CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_memory; + reg CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_writeBack; + reg [3:0] CsrPlugin_exceptionPortCtrl_exceptionContext_code; + reg [31:0] CsrPlugin_exceptionPortCtrl_exceptionContext_badAddr; + wire [1:0] CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilegeUncapped; + wire [1:0] CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilege; + wire [1:0] _zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code; + wire _zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_1; + wire [1:0] _zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_2; + wire _zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_3; + wire when_CsrPlugin_l909; + wire when_CsrPlugin_l909_1; + wire when_CsrPlugin_l909_2; + wire when_CsrPlugin_l909_3; + wire when_CsrPlugin_l922; + reg CsrPlugin_interrupt_valid; + reg [3:0] CsrPlugin_interrupt_code /* verilator public */ ; + reg [1:0] CsrPlugin_interrupt_targetPrivilege; + wire when_CsrPlugin_l946; + wire when_CsrPlugin_l952; + wire when_CsrPlugin_l952_1; + wire when_CsrPlugin_l952_2; + wire CsrPlugin_exception; + reg CsrPlugin_lastStageWasWfi; + reg CsrPlugin_pipelineLiberator_pcValids_0; + reg CsrPlugin_pipelineLiberator_pcValids_1; + reg CsrPlugin_pipelineLiberator_pcValids_2; + wire CsrPlugin_pipelineLiberator_active; + wire when_CsrPlugin_l980; + wire when_CsrPlugin_l980_1; + wire when_CsrPlugin_l980_2; + wire when_CsrPlugin_l985; + reg CsrPlugin_pipelineLiberator_done; + wire when_CsrPlugin_l991; + wire CsrPlugin_interruptJump /* verilator public */ ; + reg CsrPlugin_hadException /* verilator public */ ; + reg [1:0] CsrPlugin_targetPrivilege; + reg [3:0] CsrPlugin_trapCause; + reg [1:0] CsrPlugin_xtvec_mode; + reg [29:0] CsrPlugin_xtvec_base; + wire when_CsrPlugin_l1019; + wire when_CsrPlugin_l1064; + wire [1:0] switch_CsrPlugin_l1068; + reg execute_CsrPlugin_wfiWake; + wire when_CsrPlugin_l1108; + wire when_CsrPlugin_l1110; + wire when_CsrPlugin_l1116; + wire execute_CsrPlugin_blockedBySideEffects; + reg execute_CsrPlugin_illegalAccess; + reg execute_CsrPlugin_illegalInstruction; + wire when_CsrPlugin_l1129; + wire when_CsrPlugin_l1136; + wire when_CsrPlugin_l1137; + wire when_CsrPlugin_l1144; + reg execute_CsrPlugin_writeInstruction; + reg execute_CsrPlugin_readInstruction; + wire execute_CsrPlugin_writeEnable; + wire execute_CsrPlugin_readEnable; + wire [31:0] execute_CsrPlugin_readToWriteData; + wire switch_Misc_l200_2; + reg [31:0] _zz_CsrPlugin_csrMapping_writeDataSignal; + wire when_CsrPlugin_l1176; + wire when_CsrPlugin_l1180; + wire [11:0] execute_CsrPlugin_csrAddress; + reg execute_MulPlugin_aSigned; + reg execute_MulPlugin_bSigned; + wire [31:0] execute_MulPlugin_a; + wire [31:0] execute_MulPlugin_b; + wire [1:0] switch_MulPlugin_l87; + wire [15:0] execute_MulPlugin_aULow; + wire [15:0] execute_MulPlugin_bULow; + wire [16:0] execute_MulPlugin_aSLow; + wire [16:0] execute_MulPlugin_bSLow; + wire [16:0] execute_MulPlugin_aHigh; + wire [16:0] execute_MulPlugin_bHigh; + wire [65:0] writeBack_MulPlugin_result; + wire when_MulPlugin_l147; + wire [1:0] switch_MulPlugin_l148; + reg [32:0] memory_DivPlugin_rs1; + reg [31:0] memory_DivPlugin_rs2; + reg [64:0] memory_DivPlugin_accumulator; + wire memory_DivPlugin_frontendOk; + reg memory_DivPlugin_div_needRevert; + reg memory_DivPlugin_div_counter_willIncrement; + reg memory_DivPlugin_div_counter_willClear; + reg [5:0] memory_DivPlugin_div_counter_valueNext; + reg [5:0] memory_DivPlugin_div_counter_value; + wire memory_DivPlugin_div_counter_willOverflowIfInc; + wire memory_DivPlugin_div_counter_willOverflow; + reg memory_DivPlugin_div_done; + wire when_MulDivIterativePlugin_l126; + wire when_MulDivIterativePlugin_l126_1; + reg [31:0] memory_DivPlugin_div_result; + wire when_MulDivIterativePlugin_l128; + wire when_MulDivIterativePlugin_l129; + wire when_MulDivIterativePlugin_l132; + wire [31:0] _zz_memory_DivPlugin_div_stage_0_remainderShifted; + wire [32:0] memory_DivPlugin_div_stage_0_remainderShifted; + wire [32:0] memory_DivPlugin_div_stage_0_remainderMinusDenominator; + wire [31:0] memory_DivPlugin_div_stage_0_outRemainder; + wire [31:0] memory_DivPlugin_div_stage_0_outNumerator; + wire when_MulDivIterativePlugin_l151; + wire [31:0] _zz_memory_DivPlugin_div_result; + wire when_MulDivIterativePlugin_l162; + wire _zz_memory_DivPlugin_rs2; + wire _zz_memory_DivPlugin_rs1; + reg [32:0] _zz_memory_DivPlugin_rs1_1; + reg [31:0] externalInterruptArray_regNext; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit; + wire [31:0] _zz_CsrPlugin_csrMapping_readDataInit_1; + wire execute_CfuPlugin_schedule; + reg execute_CfuPlugin_hold; + reg execute_CfuPlugin_fired; + wire CfuPlugin_bus_cmd_fire; + wire when_CfuPlugin_l171; + wire when_CfuPlugin_l175; + wire [9:0] execute_CfuPlugin_functionsIds_0; + wire _zz_CfuPlugin_bus_cmd_payload_inputs_1; + reg [23:0] _zz_CfuPlugin_bus_cmd_payload_inputs_1_1; + reg [31:0] _zz_CfuPlugin_bus_cmd_payload_inputs_1_2; + wire CfuPlugin_bus_rsp_rsp_valid; + reg CfuPlugin_bus_rsp_rsp_ready; + wire [31:0] CfuPlugin_bus_rsp_rsp_payload_outputs_0; + reg CfuPlugin_bus_rsp_rValid; + reg [31:0] CfuPlugin_bus_rsp_rData_outputs_0; + wire when_CfuPlugin_l208; + wire when_Pipeline_l124; + reg [31:0] decode_to_execute_PC; + wire when_Pipeline_l124_1; + reg [31:0] execute_to_memory_PC; + wire when_Pipeline_l124_2; + reg [31:0] memory_to_writeBack_PC; + wire when_Pipeline_l124_3; + reg [31:0] decode_to_execute_INSTRUCTION; + wire when_Pipeline_l124_4; + reg [31:0] execute_to_memory_INSTRUCTION; + wire when_Pipeline_l124_5; + reg [31:0] memory_to_writeBack_INSTRUCTION; + wire when_Pipeline_l124_6; + reg [31:0] decode_to_execute_FORMAL_PC_NEXT; + wire when_Pipeline_l124_7; + reg [31:0] execute_to_memory_FORMAL_PC_NEXT; + wire when_Pipeline_l124_8; + reg [31:0] memory_to_writeBack_FORMAL_PC_NEXT; + wire when_Pipeline_l124_9; + reg decode_to_execute_MEMORY_FORCE_CONSTISTENCY; + wire when_Pipeline_l124_10; + reg `Src1CtrlEnum_binary_sequential_type decode_to_execute_SRC1_CTRL; + wire when_Pipeline_l124_11; + reg decode_to_execute_SRC_USE_SUB_LESS; + wire when_Pipeline_l124_12; + reg decode_to_execute_MEMORY_ENABLE; + wire when_Pipeline_l124_13; + reg execute_to_memory_MEMORY_ENABLE; + wire when_Pipeline_l124_14; + reg memory_to_writeBack_MEMORY_ENABLE; + wire when_Pipeline_l124_15; + reg `AluCtrlEnum_binary_sequential_type decode_to_execute_ALU_CTRL; + wire when_Pipeline_l124_16; + reg `Src2CtrlEnum_binary_sequential_type decode_to_execute_SRC2_CTRL; + wire when_Pipeline_l124_17; + reg decode_to_execute_REGFILE_WRITE_VALID; + wire when_Pipeline_l124_18; + reg execute_to_memory_REGFILE_WRITE_VALID; + wire when_Pipeline_l124_19; + reg memory_to_writeBack_REGFILE_WRITE_VALID; + wire when_Pipeline_l124_20; + reg decode_to_execute_BYPASSABLE_EXECUTE_STAGE; + wire when_Pipeline_l124_21; + reg decode_to_execute_BYPASSABLE_MEMORY_STAGE; + wire when_Pipeline_l124_22; + reg execute_to_memory_BYPASSABLE_MEMORY_STAGE; + wire when_Pipeline_l124_23; + reg decode_to_execute_MEMORY_WR; + wire when_Pipeline_l124_24; + reg execute_to_memory_MEMORY_WR; + wire when_Pipeline_l124_25; + reg memory_to_writeBack_MEMORY_WR; + wire when_Pipeline_l124_26; + reg decode_to_execute_MEMORY_MANAGMENT; + wire when_Pipeline_l124_27; + reg decode_to_execute_SRC_LESS_UNSIGNED; + wire when_Pipeline_l124_28; + reg `AluBitwiseCtrlEnum_binary_sequential_type decode_to_execute_ALU_BITWISE_CTRL; + wire when_Pipeline_l124_29; + reg `ShiftCtrlEnum_binary_sequential_type decode_to_execute_SHIFT_CTRL; + wire when_Pipeline_l124_30; + reg `ShiftCtrlEnum_binary_sequential_type execute_to_memory_SHIFT_CTRL; + wire when_Pipeline_l124_31; + reg `BranchCtrlEnum_binary_sequential_type decode_to_execute_BRANCH_CTRL; + wire when_Pipeline_l124_32; + reg decode_to_execute_IS_CSR; + wire when_Pipeline_l124_33; + reg `EnvCtrlEnum_binary_sequential_type decode_to_execute_ENV_CTRL; + wire when_Pipeline_l124_34; + reg `EnvCtrlEnum_binary_sequential_type execute_to_memory_ENV_CTRL; + wire when_Pipeline_l124_35; + reg `EnvCtrlEnum_binary_sequential_type memory_to_writeBack_ENV_CTRL; + wire when_Pipeline_l124_36; + reg decode_to_execute_IS_MUL; + wire when_Pipeline_l124_37; + reg execute_to_memory_IS_MUL; + wire when_Pipeline_l124_38; + reg memory_to_writeBack_IS_MUL; + wire when_Pipeline_l124_39; + reg decode_to_execute_IS_DIV; + wire when_Pipeline_l124_40; + reg execute_to_memory_IS_DIV; + wire when_Pipeline_l124_41; + reg decode_to_execute_IS_RS1_SIGNED; + wire when_Pipeline_l124_42; + reg decode_to_execute_IS_RS2_SIGNED; + wire when_Pipeline_l124_43; + reg decode_to_execute_CfuPlugin_CFU_ENABLE; + wire when_Pipeline_l124_44; + reg `Input2Kind_binary_sequential_type decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND; + wire when_Pipeline_l124_45; + reg [31:0] decode_to_execute_RS1; + wire when_Pipeline_l124_46; + reg [31:0] decode_to_execute_RS2; + wire when_Pipeline_l124_47; + reg decode_to_execute_SRC2_FORCE_ZERO; + wire when_Pipeline_l124_48; + reg decode_to_execute_PREDICTION_HAD_BRANCHED2; + wire when_Pipeline_l124_49; + reg decode_to_execute_CSR_WRITE_OPCODE; + wire when_Pipeline_l124_50; + reg decode_to_execute_CSR_READ_OPCODE; + wire when_Pipeline_l124_51; + reg [31:0] execute_to_memory_MEMORY_STORE_DATA_RF; + wire when_Pipeline_l124_52; + reg [31:0] memory_to_writeBack_MEMORY_STORE_DATA_RF; + wire when_Pipeline_l124_53; + reg [31:0] execute_to_memory_REGFILE_WRITE_DATA; + wire when_Pipeline_l124_54; + reg [31:0] memory_to_writeBack_REGFILE_WRITE_DATA; + wire when_Pipeline_l124_55; + reg [31:0] execute_to_memory_SHIFT_RIGHT; + wire when_Pipeline_l124_56; + reg [31:0] execute_to_memory_MUL_LL; + wire when_Pipeline_l124_57; + reg [33:0] execute_to_memory_MUL_LH; + wire when_Pipeline_l124_58; + reg [33:0] execute_to_memory_MUL_HL; + wire when_Pipeline_l124_59; + reg [33:0] execute_to_memory_MUL_HH; + wire when_Pipeline_l124_60; + reg [33:0] memory_to_writeBack_MUL_HH; + wire when_Pipeline_l124_61; + reg execute_to_memory_CfuPlugin_CFU_IN_FLIGHT; + wire when_Pipeline_l124_62; + reg memory_to_writeBack_CfuPlugin_CFU_IN_FLIGHT; + wire when_Pipeline_l124_63; + reg [51:0] memory_to_writeBack_MUL_LOW; + wire when_Pipeline_l151; + wire when_Pipeline_l154; + wire when_Pipeline_l151_1; + wire when_Pipeline_l154_1; + wire when_Pipeline_l151_2; + wire when_Pipeline_l154_2; + wire when_CsrPlugin_l1264; + reg execute_CsrPlugin_csr_3264; + wire when_CsrPlugin_l1264_1; + reg execute_CsrPlugin_csr_3857; + wire when_CsrPlugin_l1264_2; + reg execute_CsrPlugin_csr_3858; + wire when_CsrPlugin_l1264_3; + reg execute_CsrPlugin_csr_3859; + wire when_CsrPlugin_l1264_4; + reg execute_CsrPlugin_csr_3860; + wire when_CsrPlugin_l1264_5; + reg execute_CsrPlugin_csr_769; + wire when_CsrPlugin_l1264_6; + reg execute_CsrPlugin_csr_768; + wire when_CsrPlugin_l1264_7; + reg execute_CsrPlugin_csr_836; + wire when_CsrPlugin_l1264_8; + reg execute_CsrPlugin_csr_772; + wire when_CsrPlugin_l1264_9; + reg execute_CsrPlugin_csr_773; + wire when_CsrPlugin_l1264_10; + reg execute_CsrPlugin_csr_833; + wire when_CsrPlugin_l1264_11; + reg execute_CsrPlugin_csr_832; + wire when_CsrPlugin_l1264_12; + reg execute_CsrPlugin_csr_834; + wire when_CsrPlugin_l1264_13; + reg execute_CsrPlugin_csr_835; + wire when_CsrPlugin_l1264_14; + reg execute_CsrPlugin_csr_2816; + wire when_CsrPlugin_l1264_15; + reg execute_CsrPlugin_csr_2944; + wire when_CsrPlugin_l1264_16; + reg execute_CsrPlugin_csr_2818; + wire when_CsrPlugin_l1264_17; + reg execute_CsrPlugin_csr_2946; + wire when_CsrPlugin_l1264_18; + reg execute_CsrPlugin_csr_3072; + wire when_CsrPlugin_l1264_19; + reg execute_CsrPlugin_csr_3200; + wire when_CsrPlugin_l1264_20; + reg execute_CsrPlugin_csr_3074; + wire when_CsrPlugin_l1264_21; + reg execute_CsrPlugin_csr_3202; + wire when_CsrPlugin_l1264_22; + reg execute_CsrPlugin_csr_3008; + wire when_CsrPlugin_l1264_23; + reg execute_CsrPlugin_csr_4032; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_2; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_3; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_4; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_5; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_6; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_7; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_8; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_9; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_10; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_11; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_12; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_13; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_14; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_15; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_16; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_17; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_18; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_19; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_20; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_21; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_22; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_23; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_24; + wire when_CsrPlugin_l1297; + wire when_CsrPlugin_l1302; + reg [2:0] _zz_iBusWishbone_ADR; + wire when_InstructionCache_l239; + reg _zz_iBus_rsp_valid; + reg [31:0] iBusWishbone_DAT_MISO_regNext; + reg [2:0] _zz_dBus_cmd_ready; + wire _zz_dBus_cmd_ready_1; + wire _zz_dBus_cmd_ready_2; + wire _zz_dBus_cmd_ready_3; + wire _zz_dBus_cmd_ready_4; + wire _zz_dBus_cmd_ready_5; + reg _zz_dBus_rsp_valid; + reg [31:0] dBusWishbone_DAT_MISO_regNext; + `ifndef SYNTHESIS + reg [39:0] decode_CfuPlugin_CFU_INPUT_2_KIND_string; + reg [39:0] _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_string; + reg [39:0] _zz_decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND_string; + reg [39:0] _zz_decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND_1_string; + reg [39:0] _zz_memory_to_writeBack_ENV_CTRL_string; + reg [39:0] _zz_memory_to_writeBack_ENV_CTRL_1_string; + reg [39:0] _zz_execute_to_memory_ENV_CTRL_string; + reg [39:0] _zz_execute_to_memory_ENV_CTRL_1_string; + reg [39:0] decode_ENV_CTRL_string; + reg [39:0] _zz_decode_ENV_CTRL_string; + reg [39:0] _zz_decode_to_execute_ENV_CTRL_string; + reg [39:0] _zz_decode_to_execute_ENV_CTRL_1_string; + reg [31:0] _zz_decode_to_execute_BRANCH_CTRL_string; + reg [31:0] _zz_decode_to_execute_BRANCH_CTRL_1_string; + reg [71:0] _zz_execute_to_memory_SHIFT_CTRL_string; + reg [71:0] _zz_execute_to_memory_SHIFT_CTRL_1_string; + reg [71:0] decode_SHIFT_CTRL_string; + reg [71:0] _zz_decode_SHIFT_CTRL_string; + reg [71:0] _zz_decode_to_execute_SHIFT_CTRL_string; + reg [71:0] _zz_decode_to_execute_SHIFT_CTRL_1_string; + reg [39:0] decode_ALU_BITWISE_CTRL_string; + reg [39:0] _zz_decode_ALU_BITWISE_CTRL_string; + reg [39:0] _zz_decode_to_execute_ALU_BITWISE_CTRL_string; + reg [39:0] _zz_decode_to_execute_ALU_BITWISE_CTRL_1_string; + reg [23:0] decode_SRC2_CTRL_string; + reg [23:0] _zz_decode_SRC2_CTRL_string; + reg [23:0] _zz_decode_to_execute_SRC2_CTRL_string; + reg [23:0] _zz_decode_to_execute_SRC2_CTRL_1_string; + reg [63:0] decode_ALU_CTRL_string; + reg [63:0] _zz_decode_ALU_CTRL_string; + reg [63:0] _zz_decode_to_execute_ALU_CTRL_string; + reg [63:0] _zz_decode_to_execute_ALU_CTRL_1_string; + reg [95:0] decode_SRC1_CTRL_string; + reg [95:0] _zz_decode_SRC1_CTRL_string; + reg [95:0] _zz_decode_to_execute_SRC1_CTRL_string; + reg [95:0] _zz_decode_to_execute_SRC1_CTRL_1_string; + reg [39:0] execute_CfuPlugin_CFU_INPUT_2_KIND_string; + reg [39:0] _zz_execute_CfuPlugin_CFU_INPUT_2_KIND_string; + reg [39:0] memory_ENV_CTRL_string; + reg [39:0] _zz_memory_ENV_CTRL_string; + reg [39:0] execute_ENV_CTRL_string; + reg [39:0] _zz_execute_ENV_CTRL_string; + reg [39:0] writeBack_ENV_CTRL_string; + reg [39:0] _zz_writeBack_ENV_CTRL_string; + reg [31:0] execute_BRANCH_CTRL_string; + reg [31:0] _zz_execute_BRANCH_CTRL_string; + reg [71:0] memory_SHIFT_CTRL_string; + reg [71:0] _zz_memory_SHIFT_CTRL_string; + reg [71:0] execute_SHIFT_CTRL_string; + reg [71:0] _zz_execute_SHIFT_CTRL_string; + reg [23:0] execute_SRC2_CTRL_string; + reg [23:0] _zz_execute_SRC2_CTRL_string; + reg [95:0] execute_SRC1_CTRL_string; + reg [95:0] _zz_execute_SRC1_CTRL_string; + reg [63:0] execute_ALU_CTRL_string; + reg [63:0] _zz_execute_ALU_CTRL_string; + reg [39:0] execute_ALU_BITWISE_CTRL_string; + reg [39:0] _zz_execute_ALU_BITWISE_CTRL_string; + reg [39:0] _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_1_string; + reg [39:0] _zz_decode_ENV_CTRL_1_string; + reg [31:0] _zz_decode_BRANCH_CTRL_string; + reg [71:0] _zz_decode_SHIFT_CTRL_1_string; + reg [39:0] _zz_decode_ALU_BITWISE_CTRL_1_string; + reg [23:0] _zz_decode_SRC2_CTRL_1_string; + reg [63:0] _zz_decode_ALU_CTRL_1_string; + reg [95:0] _zz_decode_SRC1_CTRL_1_string; + reg [31:0] decode_BRANCH_CTRL_string; + reg [31:0] _zz_decode_BRANCH_CTRL_1_string; + reg [95:0] _zz_decode_SRC1_CTRL_2_string; + reg [63:0] _zz_decode_ALU_CTRL_2_string; + reg [23:0] _zz_decode_SRC2_CTRL_2_string; + reg [39:0] _zz_decode_ALU_BITWISE_CTRL_2_string; + reg [71:0] _zz_decode_SHIFT_CTRL_2_string; + reg [31:0] _zz_decode_BRANCH_CTRL_2_string; + reg [39:0] _zz_decode_ENV_CTRL_2_string; + reg [39:0] _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_8_string; + reg [95:0] decode_to_execute_SRC1_CTRL_string; + reg [63:0] decode_to_execute_ALU_CTRL_string; + reg [23:0] decode_to_execute_SRC2_CTRL_string; + reg [39:0] decode_to_execute_ALU_BITWISE_CTRL_string; + reg [71:0] decode_to_execute_SHIFT_CTRL_string; + reg [71:0] execute_to_memory_SHIFT_CTRL_string; + reg [31:0] decode_to_execute_BRANCH_CTRL_string; + reg [39:0] decode_to_execute_ENV_CTRL_string; + reg [39:0] execute_to_memory_ENV_CTRL_string; + reg [39:0] memory_to_writeBack_ENV_CTRL_string; + reg [39:0] decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND_string; + `endif + + (* ram_style = "block" *) reg [31:0] RegFilePlugin_regFile [0:31] /* verilator public */ ; + + assign _zz_when = ({decodeExceptionPort_valid,IBusCachedPlugin_decodeExceptionPort_valid} != 2'b00); + assign _zz_when_1 = ({CsrPlugin_selfException_valid,BranchPlugin_branchExceptionPort_valid} != 2'b00); + assign _zz_memory_MUL_LOW = ($signed(_zz_memory_MUL_LOW_1) + $signed(_zz_memory_MUL_LOW_5)); + assign _zz_memory_MUL_LOW_1 = ($signed(_zz_memory_MUL_LOW_2) + $signed(_zz_memory_MUL_LOW_3)); + assign _zz_memory_MUL_LOW_2 = 52'h0; + assign _zz_memory_MUL_LOW_4 = {1'b0,memory_MUL_LL}; + assign _zz_memory_MUL_LOW_3 = {{19{_zz_memory_MUL_LOW_4[32]}}, _zz_memory_MUL_LOW_4}; + assign _zz_memory_MUL_LOW_6 = ({16'd0,memory_MUL_LH} <<< 16); + assign _zz_memory_MUL_LOW_5 = {{2{_zz_memory_MUL_LOW_6[49]}}, _zz_memory_MUL_LOW_6}; + assign _zz_memory_MUL_LOW_8 = ({16'd0,memory_MUL_HL} <<< 16); + assign _zz_memory_MUL_LOW_7 = {{2{_zz_memory_MUL_LOW_8[49]}}, _zz_memory_MUL_LOW_8}; + assign _zz_execute_SHIFT_RIGHT_1 = ($signed(_zz_execute_SHIFT_RIGHT_2) >>> execute_FullBarrelShifterPlugin_amplitude); + assign _zz_execute_SHIFT_RIGHT = _zz_execute_SHIFT_RIGHT_1[31 : 0]; + assign _zz_execute_SHIFT_RIGHT_2 = {((execute_SHIFT_CTRL == `ShiftCtrlEnum_binary_sequential_SRA_1) && execute_FullBarrelShifterPlugin_reversed[31]),execute_FullBarrelShifterPlugin_reversed}; + assign _zz__zz_IBusCachedPlugin_jump_pcLoad_payload_1 = (_zz_IBusCachedPlugin_jump_pcLoad_payload - 4'b0001); + assign _zz_IBusCachedPlugin_fetchPc_pc_1 = {IBusCachedPlugin_fetchPc_inc,2'b00}; + assign _zz_IBusCachedPlugin_fetchPc_pc = {29'd0, _zz_IBusCachedPlugin_fetchPc_pc_1}; + assign _zz__zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch = {{{decode_INSTRUCTION[31],decode_INSTRUCTION[7]},decode_INSTRUCTION[30 : 25]},decode_INSTRUCTION[11 : 8]}; + assign _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_2 = {{_zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_1,{{{decode_INSTRUCTION[31],decode_INSTRUCTION[7]},decode_INSTRUCTION[30 : 25]},decode_INSTRUCTION[11 : 8]}},1'b0}; + assign _zz__zz_2 = {{{decode_INSTRUCTION[31],decode_INSTRUCTION[19 : 12]},decode_INSTRUCTION[20]},decode_INSTRUCTION[30 : 21]}; + assign _zz__zz_4 = {{{decode_INSTRUCTION[31],decode_INSTRUCTION[7]},decode_INSTRUCTION[30 : 25]},decode_INSTRUCTION[11 : 8]}; + assign _zz__zz_6 = {{_zz_3,{{{decode_INSTRUCTION[31],decode_INSTRUCTION[19 : 12]},decode_INSTRUCTION[20]},decode_INSTRUCTION[30 : 21]}},1'b0}; + assign _zz__zz_6_1 = {{_zz_5,{{{decode_INSTRUCTION[31],decode_INSTRUCTION[7]},decode_INSTRUCTION[30 : 25]},decode_INSTRUCTION[11 : 8]}},1'b0}; + assign _zz__zz_IBusCachedPlugin_predictionJumpInterface_payload = {{{decode_INSTRUCTION[31],decode_INSTRUCTION[19 : 12]},decode_INSTRUCTION[20]},decode_INSTRUCTION[30 : 21]}; + assign _zz__zz_IBusCachedPlugin_predictionJumpInterface_payload_2 = {{{decode_INSTRUCTION[31],decode_INSTRUCTION[7]},decode_INSTRUCTION[30 : 25]},decode_INSTRUCTION[11 : 8]}; + assign _zz_DBusCachedPlugin_exceptionBus_payload_code = (writeBack_MEMORY_WR ? 3'b111 : 3'b101); + assign _zz_DBusCachedPlugin_exceptionBus_payload_code_1 = (writeBack_MEMORY_WR ? 3'b110 : 3'b100); + assign _zz__zz_execute_REGFILE_WRITE_DATA = execute_SRC_LESS; + assign _zz__zz_execute_SRC1 = 3'b100; + assign _zz__zz_execute_SRC1_1 = execute_INSTRUCTION[19 : 15]; + assign _zz__zz_execute_SRC2_3 = {execute_INSTRUCTION[31 : 25],execute_INSTRUCTION[11 : 7]}; + assign _zz_execute_SrcPlugin_addSub = ($signed(_zz_execute_SrcPlugin_addSub_1) + $signed(_zz_execute_SrcPlugin_addSub_4)); + assign _zz_execute_SrcPlugin_addSub_1 = ($signed(_zz_execute_SrcPlugin_addSub_2) + $signed(_zz_execute_SrcPlugin_addSub_3)); + assign _zz_execute_SrcPlugin_addSub_2 = execute_SRC1; + assign _zz_execute_SrcPlugin_addSub_3 = (execute_SRC_USE_SUB_LESS ? (~ execute_SRC2) : execute_SRC2); + assign _zz_execute_SrcPlugin_addSub_4 = (execute_SRC_USE_SUB_LESS ? _zz_execute_SrcPlugin_addSub_5 : _zz_execute_SrcPlugin_addSub_6); + assign _zz_execute_SrcPlugin_addSub_5 = 32'h00000001; + assign _zz_execute_SrcPlugin_addSub_6 = 32'h0; + assign _zz__zz_execute_BranchPlugin_missAlignedTarget_2 = {{{execute_INSTRUCTION[31],execute_INSTRUCTION[19 : 12]},execute_INSTRUCTION[20]},execute_INSTRUCTION[30 : 21]}; + assign _zz__zz_execute_BranchPlugin_missAlignedTarget_4 = {{{execute_INSTRUCTION[31],execute_INSTRUCTION[7]},execute_INSTRUCTION[30 : 25]},execute_INSTRUCTION[11 : 8]}; + assign _zz__zz_execute_BranchPlugin_missAlignedTarget_6 = {_zz_execute_BranchPlugin_missAlignedTarget_1,execute_INSTRUCTION[31 : 20]}; + assign _zz__zz_execute_BranchPlugin_missAlignedTarget_6_1 = {{_zz_execute_BranchPlugin_missAlignedTarget_3,{{{execute_INSTRUCTION[31],execute_INSTRUCTION[19 : 12]},execute_INSTRUCTION[20]},execute_INSTRUCTION[30 : 21]}},1'b0}; + assign _zz__zz_execute_BranchPlugin_missAlignedTarget_6_2 = {{_zz_execute_BranchPlugin_missAlignedTarget_5,{{{execute_INSTRUCTION[31],execute_INSTRUCTION[7]},execute_INSTRUCTION[30 : 25]},execute_INSTRUCTION[11 : 8]}},1'b0}; + assign _zz__zz_execute_BranchPlugin_branch_src2_2 = {{{execute_INSTRUCTION[31],execute_INSTRUCTION[19 : 12]},execute_INSTRUCTION[20]},execute_INSTRUCTION[30 : 21]}; + assign _zz__zz_execute_BranchPlugin_branch_src2_4 = {{{execute_INSTRUCTION[31],execute_INSTRUCTION[7]},execute_INSTRUCTION[30 : 25]},execute_INSTRUCTION[11 : 8]}; + assign _zz_execute_BranchPlugin_branch_src2_9 = 3'b100; + assign _zz__zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_1 = (_zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code & (~ _zz__zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_1_1)); + assign _zz__zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_1_1 = (_zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code - 2'b01); + assign _zz__zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_3 = (_zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_2 & (~ _zz__zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_3_1)); + assign _zz__zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_3_1 = (_zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_2 - 2'b01); + assign _zz_writeBack_MulPlugin_result = {{14{writeBack_MUL_LOW[51]}}, writeBack_MUL_LOW}; + assign _zz_writeBack_MulPlugin_result_1 = ({32'd0,writeBack_MUL_HH} <<< 32); + assign _zz__zz_decode_RS2_2 = writeBack_MUL_LOW[31 : 0]; + assign _zz__zz_decode_RS2_2_1 = writeBack_MulPlugin_result[63 : 32]; + assign _zz_memory_DivPlugin_div_counter_valueNext_1 = memory_DivPlugin_div_counter_willIncrement; + assign _zz_memory_DivPlugin_div_counter_valueNext = {5'd0, _zz_memory_DivPlugin_div_counter_valueNext_1}; + assign _zz_memory_DivPlugin_div_stage_0_remainderMinusDenominator = {1'd0, memory_DivPlugin_rs2}; + assign _zz_memory_DivPlugin_div_stage_0_outRemainder = memory_DivPlugin_div_stage_0_remainderMinusDenominator[31:0]; + assign _zz_memory_DivPlugin_div_stage_0_outRemainder_1 = memory_DivPlugin_div_stage_0_remainderShifted[31:0]; + assign _zz_memory_DivPlugin_div_stage_0_outNumerator = {_zz_memory_DivPlugin_div_stage_0_remainderShifted,(! memory_DivPlugin_div_stage_0_remainderMinusDenominator[32])}; + assign _zz_memory_DivPlugin_div_result_1 = _zz_memory_DivPlugin_div_result_2; + assign _zz_memory_DivPlugin_div_result_2 = _zz_memory_DivPlugin_div_result_3; + assign _zz_memory_DivPlugin_div_result_3 = ({memory_DivPlugin_div_needRevert,(memory_DivPlugin_div_needRevert ? (~ _zz_memory_DivPlugin_div_result) : _zz_memory_DivPlugin_div_result)} + _zz_memory_DivPlugin_div_result_4); + assign _zz_memory_DivPlugin_div_result_5 = memory_DivPlugin_div_needRevert; + assign _zz_memory_DivPlugin_div_result_4 = {32'd0, _zz_memory_DivPlugin_div_result_5}; + assign _zz_memory_DivPlugin_rs1_3 = _zz_memory_DivPlugin_rs1; + assign _zz_memory_DivPlugin_rs1_2 = {32'd0, _zz_memory_DivPlugin_rs1_3}; + assign _zz_memory_DivPlugin_rs2_2 = _zz_memory_DivPlugin_rs2; + assign _zz_memory_DivPlugin_rs2_1 = {31'd0, _zz_memory_DivPlugin_rs2_2}; + assign _zz_execute_CfuPlugin_functionsIds_0 = {execute_INSTRUCTION[31 : 25],execute_INSTRUCTION[14 : 12]}; + assign _zz_iBusWishbone_ADR_1 = (iBus_cmd_payload_address >>> 5); + assign _zz_decode_RegFilePlugin_rs1Data = 1'b1; + assign _zz_decode_RegFilePlugin_rs2Data = 1'b1; + assign _zz_IBusCachedPlugin_jump_pcLoad_payload_6 = {_zz_IBusCachedPlugin_jump_pcLoad_payload_4,_zz_IBusCachedPlugin_jump_pcLoad_payload_3}; + assign _zz_writeBack_DBusCachedPlugin_rspShifted_1 = dataCache_1_io_cpu_writeBack_address[1 : 0]; + assign _zz_writeBack_DBusCachedPlugin_rspShifted_3 = dataCache_1_io_cpu_writeBack_address[1 : 1]; + assign _zz_decode_LEGAL_INSTRUCTION = 32'h0000106f; + assign _zz_decode_LEGAL_INSTRUCTION_1 = (decode_INSTRUCTION & 32'h0000107f); + assign _zz_decode_LEGAL_INSTRUCTION_2 = 32'h00001073; + assign _zz_decode_LEGAL_INSTRUCTION_3 = ((decode_INSTRUCTION & 32'h0000207f) == 32'h00002073); + assign _zz_decode_LEGAL_INSTRUCTION_4 = ((decode_INSTRUCTION & 32'h0000407f) == 32'h00004063); + assign _zz_decode_LEGAL_INSTRUCTION_5 = {((decode_INSTRUCTION & 32'h0000207f) == 32'h00002013),{((decode_INSTRUCTION & 32'h0000603f) == 32'h00000023),{((decode_INSTRUCTION & _zz_decode_LEGAL_INSTRUCTION_6) == 32'h00000003),{(_zz_decode_LEGAL_INSTRUCTION_7 == _zz_decode_LEGAL_INSTRUCTION_8),{_zz_decode_LEGAL_INSTRUCTION_9,{_zz_decode_LEGAL_INSTRUCTION_10,_zz_decode_LEGAL_INSTRUCTION_11}}}}}}; + assign _zz_decode_LEGAL_INSTRUCTION_6 = 32'h0000207f; + assign _zz_decode_LEGAL_INSTRUCTION_7 = (decode_INSTRUCTION & 32'h0000505f); + assign _zz_decode_LEGAL_INSTRUCTION_8 = 32'h00000003; + assign _zz_decode_LEGAL_INSTRUCTION_9 = ((decode_INSTRUCTION & 32'h0000707b) == 32'h00000063); + assign _zz_decode_LEGAL_INSTRUCTION_10 = ((decode_INSTRUCTION & 32'h0000607f) == 32'h0000000f); + assign _zz_decode_LEGAL_INSTRUCTION_11 = {((decode_INSTRUCTION & 32'hfc00007f) == 32'h00000033),{((decode_INSTRUCTION & 32'h01f0707f) == 32'h0000500f),{((decode_INSTRUCTION & _zz_decode_LEGAL_INSTRUCTION_12) == 32'h00005013),{(_zz_decode_LEGAL_INSTRUCTION_13 == _zz_decode_LEGAL_INSTRUCTION_14),{_zz_decode_LEGAL_INSTRUCTION_15,{_zz_decode_LEGAL_INSTRUCTION_16,_zz_decode_LEGAL_INSTRUCTION_17}}}}}}; + assign _zz_decode_LEGAL_INSTRUCTION_12 = 32'hbc00707f; + assign _zz_decode_LEGAL_INSTRUCTION_13 = (decode_INSTRUCTION & 32'hfc00307f); + assign _zz_decode_LEGAL_INSTRUCTION_14 = 32'h00001013; + assign _zz_decode_LEGAL_INSTRUCTION_15 = ((decode_INSTRUCTION & 32'hbe00707f) == 32'h00005033); + assign _zz_decode_LEGAL_INSTRUCTION_16 = ((decode_INSTRUCTION & 32'hbe00707f) == 32'h00000033); + assign _zz_decode_LEGAL_INSTRUCTION_17 = {((decode_INSTRUCTION & 32'hdfffffff) == 32'h10200073),{((decode_INSTRUCTION & 32'hffffffff) == 32'h10500073),((decode_INSTRUCTION & 32'hffffffff) == 32'h00000073)}}; + assign _zz_IBusCachedPlugin_predictionJumpInterface_payload_4 = decode_INSTRUCTION[31]; + assign _zz_IBusCachedPlugin_predictionJumpInterface_payload_5 = decode_INSTRUCTION[31]; + assign _zz_IBusCachedPlugin_predictionJumpInterface_payload_6 = decode_INSTRUCTION[7]; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2 = ((decode_INSTRUCTION & 32'h02004064) == 32'h02004020); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_1 = 1'b0; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_2 = (((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_3) == 32'h02000030) != 1'b0); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_4 = ((_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_5 == _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_6) != 1'b0); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_7 = {(_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_8 != 1'b0),{(_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_9 != _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_14),{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_15,{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_17,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_19}}}}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_3 = 32'h02004074; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_5 = (decode_INSTRUCTION & 32'h00203050); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_6 = 32'h00000050; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_8 = ((decode_INSTRUCTION & 32'h00403050) == 32'h00000050); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_9 = {(_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_10 == _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_11),(_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_12 == _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_13)}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_14 = 2'b00; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_15 = ({_zz_decode_CfuPlugin_CFU_INPUT_2_KIND_5,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_16} != 2'b00); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_17 = (_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_18 != 1'b0); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_19 = {(_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_20 != _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_25),{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_26,{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_32,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_34}}}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_10 = (decode_INSTRUCTION & 32'h00001050); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_11 = 32'h00001050; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_12 = (decode_INSTRUCTION & 32'h00002050); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_13 = 32'h00002050; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_16 = ((decode_INSTRUCTION & 32'h0000001c) == 32'h00000004); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_18 = ((decode_INSTRUCTION & 32'h00000058) == 32'h00000040); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_20 = {(_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_21 == _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_22),(_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_23 == _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_24)}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_25 = 2'b00; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_26 = ({_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_27,{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_28,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_30}} != 3'b000); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_32 = (_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_33 != 1'b0); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_34 = {(_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_35 != _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_37),{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_38,{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_41,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_46}}}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_21 = (decode_INSTRUCTION & 32'h00007034); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_22 = 32'h00005010; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_23 = (decode_INSTRUCTION & 32'h02007064); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_24 = 32'h00005020; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_27 = ((decode_INSTRUCTION & 32'h40003054) == 32'h40001010); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_28 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_29) == 32'h00001010); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_30 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_31) == 32'h00001010); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_33 = ((decode_INSTRUCTION & 32'h00000064) == 32'h00000024); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_35 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_36) == 32'h00001000); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_37 = 1'b0; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_38 = ((_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_39 == _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_40) != 1'b0); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_41 = ({_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_42,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_44} != 2'b00); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_46 = {(_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_47 != _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_49),{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_50,{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_55,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_69}}}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_29 = 32'h00007034; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_31 = 32'h02007054; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_36 = 32'h00001000; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_39 = (decode_INSTRUCTION & 32'h00003000); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_40 = 32'h00002000; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_42 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_43) == 32'h00002000); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_44 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_45) == 32'h00001000); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_47 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_48) == 32'h00004004); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_49 = 1'b0; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_50 = ({_zz_decode_CfuPlugin_CFU_INPUT_2_KIND_6,{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_51,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_53}} != 3'b000); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_55 = ({_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_56,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_58} != 5'h0); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_69 = {(_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_70 != _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_72),{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_73,{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_88,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_101}}}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_43 = 32'h00002010; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_45 = 32'h00005000; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_48 = 32'h00004054; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_51 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_52) == 32'h00000020); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_53 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_54) == 32'h00000020); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_56 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_57) == 32'h00002040); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_58 = {(_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_59 == _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_60),{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_61,{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_63,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_66}}}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_70 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_71) == 32'h00000020); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_72 = 1'b0; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_73 = ({_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_74,{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_76,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_79}} != 6'h0); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_88 = ({_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_89,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_90} != 5'h0); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_101 = {(_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_102 != _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_115),{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_116,{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_121,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_126}}}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_52 = 32'h00000034; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_54 = 32'h00000064; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_57 = 32'h00002040; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_59 = (decode_INSTRUCTION & 32'h00001040); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_60 = 32'h00001040; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_61 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_62) == 32'h00000040); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_63 = (_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_64 == _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_65); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_66 = (_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_67 == _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_68); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_71 = 32'h00000020; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_74 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_75) == 32'h00000008); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_76 = (_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_77 == _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_78); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_79 = {_zz_decode_CfuPlugin_CFU_INPUT_2_KIND_4,{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_80,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_83}}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_89 = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_4; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_90 = {_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_91,{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_93,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_96}}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_102 = {_zz_decode_CfuPlugin_CFU_INPUT_2_KIND_5,{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_103,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_106}}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_115 = 6'h0; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_116 = ({_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_117,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_118} != 2'b00); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_121 = (_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_122 != _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_125); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_126 = {_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_127,{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_130,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_135}}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_62 = 32'h00000050; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_64 = (decode_INSTRUCTION & 32'h00400040); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_65 = 32'h00000040; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_67 = (decode_INSTRUCTION & 32'h00000038); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_68 = 32'h0; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_75 = 32'h00000008; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_77 = (decode_INSTRUCTION & 32'h00000040); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_78 = 32'h00000040; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_80 = (_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_81 == _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_82); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_83 = {_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_84,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_86}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_91 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_92) == 32'h00002010); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_93 = (_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_94 == _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_95); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_96 = {_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_97,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_99}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_103 = (_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_104 == _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_105); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_106 = {_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_107,{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_109,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_112}}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_117 = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_4; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_118 = (_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_119 == _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_120); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_122 = {_zz_decode_CfuPlugin_CFU_INPUT_2_KIND_4,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_123}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_125 = 2'b00; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_127 = (_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_128 != 1'b0); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_130 = (_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_131 != _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_134); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_135 = {_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_136,{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_144,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_148}}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_81 = (decode_INSTRUCTION & 32'h00004020); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_82 = 32'h00004020; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_84 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_85) == 32'h00000010); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_86 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_87) == 32'h00000020); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_92 = 32'h00002030; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_94 = (decode_INSTRUCTION & 32'h00001030); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_95 = 32'h00000010; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_97 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_98) == 32'h00002020); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_99 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_100) == 32'h00000020); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_104 = (decode_INSTRUCTION & 32'h00001010); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_105 = 32'h00001010; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_107 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_108) == 32'h00002010); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_109 = (_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_110 == _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_111); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_112 = {_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_113,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_114}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_119 = (decode_INSTRUCTION & 32'h00000070); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_120 = 32'h00000020; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_123 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_124) == 32'h0); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_128 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_129) == 32'h00004010); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_131 = (_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_132 == _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_133); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_134 = 1'b0; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_136 = ({_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_137,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_139} != 4'b0000); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_144 = (_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_145 != _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_147); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_148 = {_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_149,{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_155,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_159}}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_85 = 32'h00000030; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_87 = 32'h02000020; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_98 = 32'h02002060; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_100 = 32'h02003020; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_108 = 32'h00002010; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_110 = (decode_INSTRUCTION & 32'h00000050); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_111 = 32'h00000010; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_113 = ((decode_INSTRUCTION & 32'h0000000c) == 32'h00000004); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_114 = ((decode_INSTRUCTION & 32'h00000024) == 32'h0); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_124 = 32'h00000020; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_129 = 32'h00004014; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_132 = (decode_INSTRUCTION & 32'h00006014); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_133 = 32'h00002010; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_137 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_138) == 32'h0); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_139 = {(_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_140 == _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_141),{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_142,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_143}}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_145 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_146) == 32'h0); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_147 = 1'b0; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_149 = ({_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_150,{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_151,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_153}} != 3'b000); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_155 = ({_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_156,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_158} != 2'b00); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_159 = {(_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_160 != _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_163),(_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_164 != _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_166)}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_138 = 32'h00000044; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_140 = (decode_INSTRUCTION & 32'h00000018); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_141 = 32'h0; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_142 = ((decode_INSTRUCTION & 32'h00006004) == 32'h00002000); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_143 = ((decode_INSTRUCTION & 32'h00005004) == 32'h00001000); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_146 = 32'h00000058; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_150 = ((decode_INSTRUCTION & 32'h00000044) == 32'h00000040); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_151 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_152) == 32'h00002010); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_153 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_154) == 32'h40000030); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_156 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_157) == 32'h00000004); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_158 = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_3; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_160 = {(_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_161 == _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_162),_zz_decode_CfuPlugin_CFU_INPUT_2_KIND_3}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_163 = 2'b00; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_164 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_165) == 32'h00001004); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_166 = 1'b0; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_152 = 32'h00002014; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_154 = 32'h40000034; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_157 = 32'h00000014; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_161 = (decode_INSTRUCTION & 32'h00000044); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_162 = 32'h00000004; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_165 = 32'h00005054; + assign _zz_execute_BranchPlugin_branch_src2_6 = execute_INSTRUCTION[31]; + assign _zz_execute_BranchPlugin_branch_src2_7 = execute_INSTRUCTION[31]; + assign _zz_execute_BranchPlugin_branch_src2_8 = execute_INSTRUCTION[7]; + assign _zz_CsrPlugin_csrMapping_readDataInit_25 = 32'h0; + always @(posedge clk) begin + if(_zz_decode_RegFilePlugin_rs1Data) begin + _zz_RegFilePlugin_regFile_port0 <= RegFilePlugin_regFile[decode_RegFilePlugin_regFileReadAddress1]; + end + end + + always @(posedge clk) begin + if(_zz_decode_RegFilePlugin_rs2Data) begin + _zz_RegFilePlugin_regFile_port1 <= RegFilePlugin_regFile[decode_RegFilePlugin_regFileReadAddress2]; + end + end + + always @(posedge clk) begin + if(_zz_1) begin + RegFilePlugin_regFile[lastStageRegFileWrite_payload_address] <= lastStageRegFileWrite_payload_data; + end + end + + InstructionCache IBusCachedPlugin_cache ( + .io_flush (IBusCachedPlugin_cache_io_flush ), //i + .io_cpu_prefetch_isValid (IBusCachedPlugin_cache_io_cpu_prefetch_isValid ), //i + .io_cpu_prefetch_haltIt (IBusCachedPlugin_cache_io_cpu_prefetch_haltIt ), //o + .io_cpu_prefetch_pc (IBusCachedPlugin_iBusRsp_stages_0_input_payload ), //i + .io_cpu_fetch_isValid (IBusCachedPlugin_cache_io_cpu_fetch_isValid ), //i + .io_cpu_fetch_isStuck (IBusCachedPlugin_cache_io_cpu_fetch_isStuck ), //i + .io_cpu_fetch_isRemoved (IBusCachedPlugin_cache_io_cpu_fetch_isRemoved ), //i + .io_cpu_fetch_pc (IBusCachedPlugin_iBusRsp_stages_1_input_payload ), //i + .io_cpu_fetch_data (IBusCachedPlugin_cache_io_cpu_fetch_data ), //o + .io_cpu_fetch_mmuRsp_physicalAddress (IBusCachedPlugin_mmuBus_rsp_physicalAddress ), //i + .io_cpu_fetch_mmuRsp_isIoAccess (IBusCachedPlugin_mmuBus_rsp_isIoAccess ), //i + .io_cpu_fetch_mmuRsp_isPaging (IBusCachedPlugin_mmuBus_rsp_isPaging ), //i + .io_cpu_fetch_mmuRsp_allowRead (IBusCachedPlugin_mmuBus_rsp_allowRead ), //i + .io_cpu_fetch_mmuRsp_allowWrite (IBusCachedPlugin_mmuBus_rsp_allowWrite ), //i + .io_cpu_fetch_mmuRsp_allowExecute (IBusCachedPlugin_mmuBus_rsp_allowExecute ), //i + .io_cpu_fetch_mmuRsp_exception (IBusCachedPlugin_mmuBus_rsp_exception ), //i + .io_cpu_fetch_mmuRsp_refilling (IBusCachedPlugin_mmuBus_rsp_refilling ), //i + .io_cpu_fetch_mmuRsp_bypassTranslation (IBusCachedPlugin_mmuBus_rsp_bypassTranslation ), //i + .io_cpu_fetch_physicalAddress (IBusCachedPlugin_cache_io_cpu_fetch_physicalAddress ), //o + .io_cpu_decode_isValid (IBusCachedPlugin_cache_io_cpu_decode_isValid ), //i + .io_cpu_decode_isStuck (IBusCachedPlugin_cache_io_cpu_decode_isStuck ), //i + .io_cpu_decode_pc (IBusCachedPlugin_iBusRsp_stages_2_input_payload ), //i + .io_cpu_decode_physicalAddress (IBusCachedPlugin_cache_io_cpu_decode_physicalAddress ), //o + .io_cpu_decode_data (IBusCachedPlugin_cache_io_cpu_decode_data ), //o + .io_cpu_decode_cacheMiss (IBusCachedPlugin_cache_io_cpu_decode_cacheMiss ), //o + .io_cpu_decode_error (IBusCachedPlugin_cache_io_cpu_decode_error ), //o + .io_cpu_decode_mmuRefilling (IBusCachedPlugin_cache_io_cpu_decode_mmuRefilling ), //o + .io_cpu_decode_mmuException (IBusCachedPlugin_cache_io_cpu_decode_mmuException ), //o + .io_cpu_decode_isUser (IBusCachedPlugin_cache_io_cpu_decode_isUser ), //i + .io_cpu_fill_valid (IBusCachedPlugin_cache_io_cpu_fill_valid ), //i + .io_cpu_fill_payload (IBusCachedPlugin_cache_io_cpu_decode_physicalAddress ), //i + .io_mem_cmd_valid (IBusCachedPlugin_cache_io_mem_cmd_valid ), //o + .io_mem_cmd_ready (iBus_cmd_ready ), //i + .io_mem_cmd_payload_address (IBusCachedPlugin_cache_io_mem_cmd_payload_address ), //o + .io_mem_cmd_payload_size (IBusCachedPlugin_cache_io_mem_cmd_payload_size ), //o + .io_mem_rsp_valid (iBus_rsp_valid ), //i + .io_mem_rsp_payload_data (iBus_rsp_payload_data ), //i + .io_mem_rsp_payload_error (iBus_rsp_payload_error ), //i + .clk (clk ), //i + .reset (reset ) //i + ); + DataCache dataCache_1 ( + .io_cpu_execute_isValid (dataCache_1_io_cpu_execute_isValid ), //i + .io_cpu_execute_address (dataCache_1_io_cpu_execute_address ), //i + .io_cpu_execute_haltIt (dataCache_1_io_cpu_execute_haltIt ), //o + .io_cpu_execute_args_wr (execute_MEMORY_WR ), //i + .io_cpu_execute_args_size (execute_DBusCachedPlugin_size ), //i + .io_cpu_execute_args_totalyConsistent (execute_MEMORY_FORCE_CONSTISTENCY ), //i + .io_cpu_execute_refilling (dataCache_1_io_cpu_execute_refilling ), //o + .io_cpu_memory_isValid (dataCache_1_io_cpu_memory_isValid ), //i + .io_cpu_memory_isStuck (memory_arbitration_isStuck ), //i + .io_cpu_memory_isWrite (dataCache_1_io_cpu_memory_isWrite ), //o + .io_cpu_memory_address (dataCache_1_io_cpu_memory_address ), //i + .io_cpu_memory_mmuRsp_physicalAddress (DBusCachedPlugin_mmuBus_rsp_physicalAddress ), //i + .io_cpu_memory_mmuRsp_isIoAccess (dataCache_1_io_cpu_memory_mmuRsp_isIoAccess ), //i + .io_cpu_memory_mmuRsp_isPaging (DBusCachedPlugin_mmuBus_rsp_isPaging ), //i + .io_cpu_memory_mmuRsp_allowRead (DBusCachedPlugin_mmuBus_rsp_allowRead ), //i + .io_cpu_memory_mmuRsp_allowWrite (DBusCachedPlugin_mmuBus_rsp_allowWrite ), //i + .io_cpu_memory_mmuRsp_allowExecute (DBusCachedPlugin_mmuBus_rsp_allowExecute ), //i + .io_cpu_memory_mmuRsp_exception (DBusCachedPlugin_mmuBus_rsp_exception ), //i + .io_cpu_memory_mmuRsp_refilling (DBusCachedPlugin_mmuBus_rsp_refilling ), //i + .io_cpu_memory_mmuRsp_bypassTranslation (DBusCachedPlugin_mmuBus_rsp_bypassTranslation ), //i + .io_cpu_writeBack_isValid (dataCache_1_io_cpu_writeBack_isValid ), //i + .io_cpu_writeBack_isStuck (writeBack_arbitration_isStuck ), //i + .io_cpu_writeBack_isUser (dataCache_1_io_cpu_writeBack_isUser ), //i + .io_cpu_writeBack_haltIt (dataCache_1_io_cpu_writeBack_haltIt ), //o + .io_cpu_writeBack_isWrite (dataCache_1_io_cpu_writeBack_isWrite ), //o + .io_cpu_writeBack_storeData (dataCache_1_io_cpu_writeBack_storeData ), //i + .io_cpu_writeBack_data (dataCache_1_io_cpu_writeBack_data ), //o + .io_cpu_writeBack_address (dataCache_1_io_cpu_writeBack_address ), //i + .io_cpu_writeBack_mmuException (dataCache_1_io_cpu_writeBack_mmuException ), //o + .io_cpu_writeBack_unalignedAccess (dataCache_1_io_cpu_writeBack_unalignedAccess ), //o + .io_cpu_writeBack_accessError (dataCache_1_io_cpu_writeBack_accessError ), //o + .io_cpu_writeBack_keepMemRspData (dataCache_1_io_cpu_writeBack_keepMemRspData ), //o + .io_cpu_writeBack_fence_SW (dataCache_1_io_cpu_writeBack_fence_SW ), //i + .io_cpu_writeBack_fence_SR (dataCache_1_io_cpu_writeBack_fence_SR ), //i + .io_cpu_writeBack_fence_SO (dataCache_1_io_cpu_writeBack_fence_SO ), //i + .io_cpu_writeBack_fence_SI (dataCache_1_io_cpu_writeBack_fence_SI ), //i + .io_cpu_writeBack_fence_PW (dataCache_1_io_cpu_writeBack_fence_PW ), //i + .io_cpu_writeBack_fence_PR (dataCache_1_io_cpu_writeBack_fence_PR ), //i + .io_cpu_writeBack_fence_PO (dataCache_1_io_cpu_writeBack_fence_PO ), //i + .io_cpu_writeBack_fence_PI (dataCache_1_io_cpu_writeBack_fence_PI ), //i + .io_cpu_writeBack_fence_FM (dataCache_1_io_cpu_writeBack_fence_FM ), //i + .io_cpu_writeBack_exclusiveOk (dataCache_1_io_cpu_writeBack_exclusiveOk ), //o + .io_cpu_redo (dataCache_1_io_cpu_redo ), //o + .io_cpu_flush_valid (dataCache_1_io_cpu_flush_valid ), //i + .io_cpu_flush_ready (dataCache_1_io_cpu_flush_ready ), //o + .io_mem_cmd_valid (dataCache_1_io_mem_cmd_valid ), //o + .io_mem_cmd_ready (dataCache_1_io_mem_cmd_ready ), //i + .io_mem_cmd_payload_wr (dataCache_1_io_mem_cmd_payload_wr ), //o + .io_mem_cmd_payload_uncached (dataCache_1_io_mem_cmd_payload_uncached ), //o + .io_mem_cmd_payload_address (dataCache_1_io_mem_cmd_payload_address ), //o + .io_mem_cmd_payload_data (dataCache_1_io_mem_cmd_payload_data ), //o + .io_mem_cmd_payload_mask (dataCache_1_io_mem_cmd_payload_mask ), //o + .io_mem_cmd_payload_size (dataCache_1_io_mem_cmd_payload_size ), //o + .io_mem_cmd_payload_last (dataCache_1_io_mem_cmd_payload_last ), //o + .io_mem_rsp_valid (dBus_rsp_valid ), //i + .io_mem_rsp_payload_last (dBus_rsp_payload_last ), //i + .io_mem_rsp_payload_data (dBus_rsp_payload_data ), //i + .io_mem_rsp_payload_error (dBus_rsp_payload_error ), //i + .clk (clk ), //i + .reset (reset ) //i + ); + always @(*) begin + case(_zz_IBusCachedPlugin_jump_pcLoad_payload_6) + 2'b00 : begin + _zz_IBusCachedPlugin_jump_pcLoad_payload_5 = DBusCachedPlugin_redoBranch_payload; + end + 2'b01 : begin + _zz_IBusCachedPlugin_jump_pcLoad_payload_5 = CsrPlugin_jumpInterface_payload; + end + 2'b10 : begin + _zz_IBusCachedPlugin_jump_pcLoad_payload_5 = BranchPlugin_jumpInterface_payload; + end + default : begin + _zz_IBusCachedPlugin_jump_pcLoad_payload_5 = IBusCachedPlugin_predictionJumpInterface_payload; + end + endcase + end + + always @(*) begin + case(_zz_writeBack_DBusCachedPlugin_rspShifted_1) + 2'b00 : begin + _zz_writeBack_DBusCachedPlugin_rspShifted = writeBack_DBusCachedPlugin_rspSplits_0; + end + 2'b01 : begin + _zz_writeBack_DBusCachedPlugin_rspShifted = writeBack_DBusCachedPlugin_rspSplits_1; + end + 2'b10 : begin + _zz_writeBack_DBusCachedPlugin_rspShifted = writeBack_DBusCachedPlugin_rspSplits_2; + end + default : begin + _zz_writeBack_DBusCachedPlugin_rspShifted = writeBack_DBusCachedPlugin_rspSplits_3; + end + endcase + end + + always @(*) begin + case(_zz_writeBack_DBusCachedPlugin_rspShifted_3) + 1'b0 : begin + _zz_writeBack_DBusCachedPlugin_rspShifted_2 = writeBack_DBusCachedPlugin_rspSplits_1; + end + default : begin + _zz_writeBack_DBusCachedPlugin_rspShifted_2 = writeBack_DBusCachedPlugin_rspSplits_3; + end + endcase + end + + `ifndef SYNTHESIS + always @(*) begin + case(decode_CfuPlugin_CFU_INPUT_2_KIND) + `Input2Kind_binary_sequential_RS : decode_CfuPlugin_CFU_INPUT_2_KIND_string = "RS "; + `Input2Kind_binary_sequential_IMM_I : decode_CfuPlugin_CFU_INPUT_2_KIND_string = "IMM_I"; + default : decode_CfuPlugin_CFU_INPUT_2_KIND_string = "?????"; + endcase + end + always @(*) begin + case(_zz_decode_CfuPlugin_CFU_INPUT_2_KIND) + `Input2Kind_binary_sequential_RS : _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_string = "RS "; + `Input2Kind_binary_sequential_IMM_I : _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_string = "IMM_I"; + default : _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_string = "?????"; + endcase + end + always @(*) begin + case(_zz_decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND) + `Input2Kind_binary_sequential_RS : _zz_decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND_string = "RS "; + `Input2Kind_binary_sequential_IMM_I : _zz_decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND_string = "IMM_I"; + default : _zz_decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND_string = "?????"; + endcase + end + always @(*) begin + case(_zz_decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND_1) + `Input2Kind_binary_sequential_RS : _zz_decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND_1_string = "RS "; + `Input2Kind_binary_sequential_IMM_I : _zz_decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND_1_string = "IMM_I"; + default : _zz_decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND_1_string = "?????"; + endcase + end + always @(*) begin + case(_zz_memory_to_writeBack_ENV_CTRL) + `EnvCtrlEnum_binary_sequential_NONE : _zz_memory_to_writeBack_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : _zz_memory_to_writeBack_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_binary_sequential_WFI : _zz_memory_to_writeBack_ENV_CTRL_string = "WFI "; + `EnvCtrlEnum_binary_sequential_ECALL : _zz_memory_to_writeBack_ENV_CTRL_string = "ECALL"; + default : _zz_memory_to_writeBack_ENV_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(_zz_memory_to_writeBack_ENV_CTRL_1) + `EnvCtrlEnum_binary_sequential_NONE : _zz_memory_to_writeBack_ENV_CTRL_1_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : _zz_memory_to_writeBack_ENV_CTRL_1_string = "XRET "; + `EnvCtrlEnum_binary_sequential_WFI : _zz_memory_to_writeBack_ENV_CTRL_1_string = "WFI "; + `EnvCtrlEnum_binary_sequential_ECALL : _zz_memory_to_writeBack_ENV_CTRL_1_string = "ECALL"; + default : _zz_memory_to_writeBack_ENV_CTRL_1_string = "?????"; + endcase + end + always @(*) begin + case(_zz_execute_to_memory_ENV_CTRL) + `EnvCtrlEnum_binary_sequential_NONE : _zz_execute_to_memory_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : _zz_execute_to_memory_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_binary_sequential_WFI : _zz_execute_to_memory_ENV_CTRL_string = "WFI "; + `EnvCtrlEnum_binary_sequential_ECALL : _zz_execute_to_memory_ENV_CTRL_string = "ECALL"; + default : _zz_execute_to_memory_ENV_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(_zz_execute_to_memory_ENV_CTRL_1) + `EnvCtrlEnum_binary_sequential_NONE : _zz_execute_to_memory_ENV_CTRL_1_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : _zz_execute_to_memory_ENV_CTRL_1_string = "XRET "; + `EnvCtrlEnum_binary_sequential_WFI : _zz_execute_to_memory_ENV_CTRL_1_string = "WFI "; + `EnvCtrlEnum_binary_sequential_ECALL : _zz_execute_to_memory_ENV_CTRL_1_string = "ECALL"; + default : _zz_execute_to_memory_ENV_CTRL_1_string = "?????"; + endcase + end + always @(*) begin + case(decode_ENV_CTRL) + `EnvCtrlEnum_binary_sequential_NONE : decode_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : decode_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_binary_sequential_WFI : decode_ENV_CTRL_string = "WFI "; + `EnvCtrlEnum_binary_sequential_ECALL : decode_ENV_CTRL_string = "ECALL"; + default : decode_ENV_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(_zz_decode_ENV_CTRL) + `EnvCtrlEnum_binary_sequential_NONE : _zz_decode_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : _zz_decode_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_binary_sequential_WFI : _zz_decode_ENV_CTRL_string = "WFI "; + `EnvCtrlEnum_binary_sequential_ECALL : _zz_decode_ENV_CTRL_string = "ECALL"; + default : _zz_decode_ENV_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(_zz_decode_to_execute_ENV_CTRL) + `EnvCtrlEnum_binary_sequential_NONE : _zz_decode_to_execute_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : _zz_decode_to_execute_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_binary_sequential_WFI : _zz_decode_to_execute_ENV_CTRL_string = "WFI "; + `EnvCtrlEnum_binary_sequential_ECALL : _zz_decode_to_execute_ENV_CTRL_string = "ECALL"; + default : _zz_decode_to_execute_ENV_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(_zz_decode_to_execute_ENV_CTRL_1) + `EnvCtrlEnum_binary_sequential_NONE : _zz_decode_to_execute_ENV_CTRL_1_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : _zz_decode_to_execute_ENV_CTRL_1_string = "XRET "; + `EnvCtrlEnum_binary_sequential_WFI : _zz_decode_to_execute_ENV_CTRL_1_string = "WFI "; + `EnvCtrlEnum_binary_sequential_ECALL : _zz_decode_to_execute_ENV_CTRL_1_string = "ECALL"; + default : _zz_decode_to_execute_ENV_CTRL_1_string = "?????"; + endcase + end + always @(*) begin + case(_zz_decode_to_execute_BRANCH_CTRL) + `BranchCtrlEnum_binary_sequential_INC : _zz_decode_to_execute_BRANCH_CTRL_string = "INC "; + `BranchCtrlEnum_binary_sequential_B : _zz_decode_to_execute_BRANCH_CTRL_string = "B "; + `BranchCtrlEnum_binary_sequential_JAL : _zz_decode_to_execute_BRANCH_CTRL_string = "JAL "; + `BranchCtrlEnum_binary_sequential_JALR : _zz_decode_to_execute_BRANCH_CTRL_string = "JALR"; + default : _zz_decode_to_execute_BRANCH_CTRL_string = "????"; + endcase + end + always @(*) begin + case(_zz_decode_to_execute_BRANCH_CTRL_1) + `BranchCtrlEnum_binary_sequential_INC : _zz_decode_to_execute_BRANCH_CTRL_1_string = "INC "; + `BranchCtrlEnum_binary_sequential_B : _zz_decode_to_execute_BRANCH_CTRL_1_string = "B "; + `BranchCtrlEnum_binary_sequential_JAL : _zz_decode_to_execute_BRANCH_CTRL_1_string = "JAL "; + `BranchCtrlEnum_binary_sequential_JALR : _zz_decode_to_execute_BRANCH_CTRL_1_string = "JALR"; + default : _zz_decode_to_execute_BRANCH_CTRL_1_string = "????"; + endcase + end + always @(*) begin + case(_zz_execute_to_memory_SHIFT_CTRL) + `ShiftCtrlEnum_binary_sequential_DISABLE_1 : _zz_execute_to_memory_SHIFT_CTRL_string = "DISABLE_1"; + `ShiftCtrlEnum_binary_sequential_SLL_1 : _zz_execute_to_memory_SHIFT_CTRL_string = "SLL_1 "; + `ShiftCtrlEnum_binary_sequential_SRL_1 : _zz_execute_to_memory_SHIFT_CTRL_string = "SRL_1 "; + `ShiftCtrlEnum_binary_sequential_SRA_1 : _zz_execute_to_memory_SHIFT_CTRL_string = "SRA_1 "; + default : _zz_execute_to_memory_SHIFT_CTRL_string = "?????????"; + endcase + end + always @(*) begin + case(_zz_execute_to_memory_SHIFT_CTRL_1) + `ShiftCtrlEnum_binary_sequential_DISABLE_1 : _zz_execute_to_memory_SHIFT_CTRL_1_string = "DISABLE_1"; + `ShiftCtrlEnum_binary_sequential_SLL_1 : _zz_execute_to_memory_SHIFT_CTRL_1_string = "SLL_1 "; + `ShiftCtrlEnum_binary_sequential_SRL_1 : _zz_execute_to_memory_SHIFT_CTRL_1_string = "SRL_1 "; + `ShiftCtrlEnum_binary_sequential_SRA_1 : _zz_execute_to_memory_SHIFT_CTRL_1_string = "SRA_1 "; + default : _zz_execute_to_memory_SHIFT_CTRL_1_string = "?????????"; + endcase + end + always @(*) begin + case(decode_SHIFT_CTRL) + `ShiftCtrlEnum_binary_sequential_DISABLE_1 : decode_SHIFT_CTRL_string = "DISABLE_1"; + `ShiftCtrlEnum_binary_sequential_SLL_1 : decode_SHIFT_CTRL_string = "SLL_1 "; + `ShiftCtrlEnum_binary_sequential_SRL_1 : decode_SHIFT_CTRL_string = "SRL_1 "; + `ShiftCtrlEnum_binary_sequential_SRA_1 : decode_SHIFT_CTRL_string = "SRA_1 "; + default : decode_SHIFT_CTRL_string = "?????????"; + endcase + end + always @(*) begin + case(_zz_decode_SHIFT_CTRL) + `ShiftCtrlEnum_binary_sequential_DISABLE_1 : _zz_decode_SHIFT_CTRL_string = "DISABLE_1"; + `ShiftCtrlEnum_binary_sequential_SLL_1 : _zz_decode_SHIFT_CTRL_string = "SLL_1 "; + `ShiftCtrlEnum_binary_sequential_SRL_1 : _zz_decode_SHIFT_CTRL_string = "SRL_1 "; + `ShiftCtrlEnum_binary_sequential_SRA_1 : _zz_decode_SHIFT_CTRL_string = "SRA_1 "; + default : _zz_decode_SHIFT_CTRL_string = "?????????"; + endcase + end + always @(*) begin + case(_zz_decode_to_execute_SHIFT_CTRL) + `ShiftCtrlEnum_binary_sequential_DISABLE_1 : _zz_decode_to_execute_SHIFT_CTRL_string = "DISABLE_1"; + `ShiftCtrlEnum_binary_sequential_SLL_1 : _zz_decode_to_execute_SHIFT_CTRL_string = "SLL_1 "; + `ShiftCtrlEnum_binary_sequential_SRL_1 : _zz_decode_to_execute_SHIFT_CTRL_string = "SRL_1 "; + `ShiftCtrlEnum_binary_sequential_SRA_1 : _zz_decode_to_execute_SHIFT_CTRL_string = "SRA_1 "; + default : _zz_decode_to_execute_SHIFT_CTRL_string = "?????????"; + endcase + end + always @(*) begin + case(_zz_decode_to_execute_SHIFT_CTRL_1) + `ShiftCtrlEnum_binary_sequential_DISABLE_1 : _zz_decode_to_execute_SHIFT_CTRL_1_string = "DISABLE_1"; + `ShiftCtrlEnum_binary_sequential_SLL_1 : _zz_decode_to_execute_SHIFT_CTRL_1_string = "SLL_1 "; + `ShiftCtrlEnum_binary_sequential_SRL_1 : _zz_decode_to_execute_SHIFT_CTRL_1_string = "SRL_1 "; + `ShiftCtrlEnum_binary_sequential_SRA_1 : _zz_decode_to_execute_SHIFT_CTRL_1_string = "SRA_1 "; + default : _zz_decode_to_execute_SHIFT_CTRL_1_string = "?????????"; + endcase + end + always @(*) begin + case(decode_ALU_BITWISE_CTRL) + `AluBitwiseCtrlEnum_binary_sequential_XOR_1 : decode_ALU_BITWISE_CTRL_string = "XOR_1"; + `AluBitwiseCtrlEnum_binary_sequential_OR_1 : decode_ALU_BITWISE_CTRL_string = "OR_1 "; + `AluBitwiseCtrlEnum_binary_sequential_AND_1 : decode_ALU_BITWISE_CTRL_string = "AND_1"; + default : decode_ALU_BITWISE_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(_zz_decode_ALU_BITWISE_CTRL) + `AluBitwiseCtrlEnum_binary_sequential_XOR_1 : _zz_decode_ALU_BITWISE_CTRL_string = "XOR_1"; + `AluBitwiseCtrlEnum_binary_sequential_OR_1 : _zz_decode_ALU_BITWISE_CTRL_string = "OR_1 "; + `AluBitwiseCtrlEnum_binary_sequential_AND_1 : _zz_decode_ALU_BITWISE_CTRL_string = "AND_1"; + default : _zz_decode_ALU_BITWISE_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(_zz_decode_to_execute_ALU_BITWISE_CTRL) + `AluBitwiseCtrlEnum_binary_sequential_XOR_1 : _zz_decode_to_execute_ALU_BITWISE_CTRL_string = "XOR_1"; + `AluBitwiseCtrlEnum_binary_sequential_OR_1 : _zz_decode_to_execute_ALU_BITWISE_CTRL_string = "OR_1 "; + `AluBitwiseCtrlEnum_binary_sequential_AND_1 : _zz_decode_to_execute_ALU_BITWISE_CTRL_string = "AND_1"; + default : _zz_decode_to_execute_ALU_BITWISE_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(_zz_decode_to_execute_ALU_BITWISE_CTRL_1) + `AluBitwiseCtrlEnum_binary_sequential_XOR_1 : _zz_decode_to_execute_ALU_BITWISE_CTRL_1_string = "XOR_1"; + `AluBitwiseCtrlEnum_binary_sequential_OR_1 : _zz_decode_to_execute_ALU_BITWISE_CTRL_1_string = "OR_1 "; + `AluBitwiseCtrlEnum_binary_sequential_AND_1 : _zz_decode_to_execute_ALU_BITWISE_CTRL_1_string = "AND_1"; + default : _zz_decode_to_execute_ALU_BITWISE_CTRL_1_string = "?????"; + endcase + end + always @(*) begin + case(decode_SRC2_CTRL) + `Src2CtrlEnum_binary_sequential_RS : decode_SRC2_CTRL_string = "RS "; + `Src2CtrlEnum_binary_sequential_IMI : decode_SRC2_CTRL_string = "IMI"; + `Src2CtrlEnum_binary_sequential_IMS : decode_SRC2_CTRL_string = "IMS"; + `Src2CtrlEnum_binary_sequential_PC : decode_SRC2_CTRL_string = "PC "; + default : decode_SRC2_CTRL_string = "???"; + endcase + end + always @(*) begin + case(_zz_decode_SRC2_CTRL) + `Src2CtrlEnum_binary_sequential_RS : _zz_decode_SRC2_CTRL_string = "RS "; + `Src2CtrlEnum_binary_sequential_IMI : _zz_decode_SRC2_CTRL_string = "IMI"; + `Src2CtrlEnum_binary_sequential_IMS : _zz_decode_SRC2_CTRL_string = "IMS"; + `Src2CtrlEnum_binary_sequential_PC : _zz_decode_SRC2_CTRL_string = "PC "; + default : _zz_decode_SRC2_CTRL_string = "???"; + endcase + end + always @(*) begin + case(_zz_decode_to_execute_SRC2_CTRL) + `Src2CtrlEnum_binary_sequential_RS : _zz_decode_to_execute_SRC2_CTRL_string = "RS "; + `Src2CtrlEnum_binary_sequential_IMI : _zz_decode_to_execute_SRC2_CTRL_string = "IMI"; + `Src2CtrlEnum_binary_sequential_IMS : _zz_decode_to_execute_SRC2_CTRL_string = "IMS"; + `Src2CtrlEnum_binary_sequential_PC : _zz_decode_to_execute_SRC2_CTRL_string = "PC "; + default : _zz_decode_to_execute_SRC2_CTRL_string = "???"; + endcase + end + always @(*) begin + case(_zz_decode_to_execute_SRC2_CTRL_1) + `Src2CtrlEnum_binary_sequential_RS : _zz_decode_to_execute_SRC2_CTRL_1_string = "RS "; + `Src2CtrlEnum_binary_sequential_IMI : _zz_decode_to_execute_SRC2_CTRL_1_string = "IMI"; + `Src2CtrlEnum_binary_sequential_IMS : _zz_decode_to_execute_SRC2_CTRL_1_string = "IMS"; + `Src2CtrlEnum_binary_sequential_PC : _zz_decode_to_execute_SRC2_CTRL_1_string = "PC "; + default : _zz_decode_to_execute_SRC2_CTRL_1_string = "???"; + endcase + end + always @(*) begin + case(decode_ALU_CTRL) + `AluCtrlEnum_binary_sequential_ADD_SUB : decode_ALU_CTRL_string = "ADD_SUB "; + `AluCtrlEnum_binary_sequential_SLT_SLTU : decode_ALU_CTRL_string = "SLT_SLTU"; + `AluCtrlEnum_binary_sequential_BITWISE : decode_ALU_CTRL_string = "BITWISE "; + default : decode_ALU_CTRL_string = "????????"; + endcase + end + always @(*) begin + case(_zz_decode_ALU_CTRL) + `AluCtrlEnum_binary_sequential_ADD_SUB : _zz_decode_ALU_CTRL_string = "ADD_SUB "; + `AluCtrlEnum_binary_sequential_SLT_SLTU : _zz_decode_ALU_CTRL_string = "SLT_SLTU"; + `AluCtrlEnum_binary_sequential_BITWISE : _zz_decode_ALU_CTRL_string = "BITWISE "; + default : _zz_decode_ALU_CTRL_string = "????????"; + endcase + end + always @(*) begin + case(_zz_decode_to_execute_ALU_CTRL) + `AluCtrlEnum_binary_sequential_ADD_SUB : _zz_decode_to_execute_ALU_CTRL_string = "ADD_SUB "; + `AluCtrlEnum_binary_sequential_SLT_SLTU : _zz_decode_to_execute_ALU_CTRL_string = "SLT_SLTU"; + `AluCtrlEnum_binary_sequential_BITWISE : _zz_decode_to_execute_ALU_CTRL_string = "BITWISE "; + default : _zz_decode_to_execute_ALU_CTRL_string = "????????"; + endcase + end + always @(*) begin + case(_zz_decode_to_execute_ALU_CTRL_1) + `AluCtrlEnum_binary_sequential_ADD_SUB : _zz_decode_to_execute_ALU_CTRL_1_string = "ADD_SUB "; + `AluCtrlEnum_binary_sequential_SLT_SLTU : _zz_decode_to_execute_ALU_CTRL_1_string = "SLT_SLTU"; + `AluCtrlEnum_binary_sequential_BITWISE : _zz_decode_to_execute_ALU_CTRL_1_string = "BITWISE "; + default : _zz_decode_to_execute_ALU_CTRL_1_string = "????????"; + endcase + end + always @(*) begin + case(decode_SRC1_CTRL) + `Src1CtrlEnum_binary_sequential_RS : decode_SRC1_CTRL_string = "RS "; + `Src1CtrlEnum_binary_sequential_IMU : decode_SRC1_CTRL_string = "IMU "; + `Src1CtrlEnum_binary_sequential_PC_INCREMENT : decode_SRC1_CTRL_string = "PC_INCREMENT"; + `Src1CtrlEnum_binary_sequential_URS1 : decode_SRC1_CTRL_string = "URS1 "; + default : decode_SRC1_CTRL_string = "????????????"; + endcase + end + always @(*) begin + case(_zz_decode_SRC1_CTRL) + `Src1CtrlEnum_binary_sequential_RS : _zz_decode_SRC1_CTRL_string = "RS "; + `Src1CtrlEnum_binary_sequential_IMU : _zz_decode_SRC1_CTRL_string = "IMU "; + `Src1CtrlEnum_binary_sequential_PC_INCREMENT : _zz_decode_SRC1_CTRL_string = "PC_INCREMENT"; + `Src1CtrlEnum_binary_sequential_URS1 : _zz_decode_SRC1_CTRL_string = "URS1 "; + default : _zz_decode_SRC1_CTRL_string = "????????????"; + endcase + end + always @(*) begin + case(_zz_decode_to_execute_SRC1_CTRL) + `Src1CtrlEnum_binary_sequential_RS : _zz_decode_to_execute_SRC1_CTRL_string = "RS "; + `Src1CtrlEnum_binary_sequential_IMU : _zz_decode_to_execute_SRC1_CTRL_string = "IMU "; + `Src1CtrlEnum_binary_sequential_PC_INCREMENT : _zz_decode_to_execute_SRC1_CTRL_string = "PC_INCREMENT"; + `Src1CtrlEnum_binary_sequential_URS1 : _zz_decode_to_execute_SRC1_CTRL_string = "URS1 "; + default : _zz_decode_to_execute_SRC1_CTRL_string = "????????????"; + endcase + end + always @(*) begin + case(_zz_decode_to_execute_SRC1_CTRL_1) + `Src1CtrlEnum_binary_sequential_RS : _zz_decode_to_execute_SRC1_CTRL_1_string = "RS "; + `Src1CtrlEnum_binary_sequential_IMU : _zz_decode_to_execute_SRC1_CTRL_1_string = "IMU "; + `Src1CtrlEnum_binary_sequential_PC_INCREMENT : _zz_decode_to_execute_SRC1_CTRL_1_string = "PC_INCREMENT"; + `Src1CtrlEnum_binary_sequential_URS1 : _zz_decode_to_execute_SRC1_CTRL_1_string = "URS1 "; + default : _zz_decode_to_execute_SRC1_CTRL_1_string = "????????????"; + endcase + end + always @(*) begin + case(execute_CfuPlugin_CFU_INPUT_2_KIND) + `Input2Kind_binary_sequential_RS : execute_CfuPlugin_CFU_INPUT_2_KIND_string = "RS "; + `Input2Kind_binary_sequential_IMM_I : execute_CfuPlugin_CFU_INPUT_2_KIND_string = "IMM_I"; + default : execute_CfuPlugin_CFU_INPUT_2_KIND_string = "?????"; + endcase + end + always @(*) begin + case(_zz_execute_CfuPlugin_CFU_INPUT_2_KIND) + `Input2Kind_binary_sequential_RS : _zz_execute_CfuPlugin_CFU_INPUT_2_KIND_string = "RS "; + `Input2Kind_binary_sequential_IMM_I : _zz_execute_CfuPlugin_CFU_INPUT_2_KIND_string = "IMM_I"; + default : _zz_execute_CfuPlugin_CFU_INPUT_2_KIND_string = "?????"; + endcase + end + always @(*) begin + case(memory_ENV_CTRL) + `EnvCtrlEnum_binary_sequential_NONE : memory_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : memory_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_binary_sequential_WFI : memory_ENV_CTRL_string = "WFI "; + `EnvCtrlEnum_binary_sequential_ECALL : memory_ENV_CTRL_string = "ECALL"; + default : memory_ENV_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(_zz_memory_ENV_CTRL) + `EnvCtrlEnum_binary_sequential_NONE : _zz_memory_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : _zz_memory_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_binary_sequential_WFI : _zz_memory_ENV_CTRL_string = "WFI "; + `EnvCtrlEnum_binary_sequential_ECALL : _zz_memory_ENV_CTRL_string = "ECALL"; + default : _zz_memory_ENV_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(execute_ENV_CTRL) + `EnvCtrlEnum_binary_sequential_NONE : execute_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : execute_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_binary_sequential_WFI : execute_ENV_CTRL_string = "WFI "; + `EnvCtrlEnum_binary_sequential_ECALL : execute_ENV_CTRL_string = "ECALL"; + default : execute_ENV_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(_zz_execute_ENV_CTRL) + `EnvCtrlEnum_binary_sequential_NONE : _zz_execute_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : _zz_execute_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_binary_sequential_WFI : _zz_execute_ENV_CTRL_string = "WFI "; + `EnvCtrlEnum_binary_sequential_ECALL : _zz_execute_ENV_CTRL_string = "ECALL"; + default : _zz_execute_ENV_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(writeBack_ENV_CTRL) + `EnvCtrlEnum_binary_sequential_NONE : writeBack_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : writeBack_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_binary_sequential_WFI : writeBack_ENV_CTRL_string = "WFI "; + `EnvCtrlEnum_binary_sequential_ECALL : writeBack_ENV_CTRL_string = "ECALL"; + default : writeBack_ENV_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(_zz_writeBack_ENV_CTRL) + `EnvCtrlEnum_binary_sequential_NONE : _zz_writeBack_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : _zz_writeBack_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_binary_sequential_WFI : _zz_writeBack_ENV_CTRL_string = "WFI "; + `EnvCtrlEnum_binary_sequential_ECALL : _zz_writeBack_ENV_CTRL_string = "ECALL"; + default : _zz_writeBack_ENV_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(execute_BRANCH_CTRL) + `BranchCtrlEnum_binary_sequential_INC : execute_BRANCH_CTRL_string = "INC "; + `BranchCtrlEnum_binary_sequential_B : execute_BRANCH_CTRL_string = "B "; + `BranchCtrlEnum_binary_sequential_JAL : execute_BRANCH_CTRL_string = "JAL "; + `BranchCtrlEnum_binary_sequential_JALR : execute_BRANCH_CTRL_string = "JALR"; + default : execute_BRANCH_CTRL_string = "????"; + endcase + end + always @(*) begin + case(_zz_execute_BRANCH_CTRL) + `BranchCtrlEnum_binary_sequential_INC : _zz_execute_BRANCH_CTRL_string = "INC "; + `BranchCtrlEnum_binary_sequential_B : _zz_execute_BRANCH_CTRL_string = "B "; + `BranchCtrlEnum_binary_sequential_JAL : _zz_execute_BRANCH_CTRL_string = "JAL "; + `BranchCtrlEnum_binary_sequential_JALR : _zz_execute_BRANCH_CTRL_string = "JALR"; + default : _zz_execute_BRANCH_CTRL_string = "????"; + endcase + end + always @(*) begin + case(memory_SHIFT_CTRL) + `ShiftCtrlEnum_binary_sequential_DISABLE_1 : memory_SHIFT_CTRL_string = "DISABLE_1"; + `ShiftCtrlEnum_binary_sequential_SLL_1 : memory_SHIFT_CTRL_string = "SLL_1 "; + `ShiftCtrlEnum_binary_sequential_SRL_1 : memory_SHIFT_CTRL_string = "SRL_1 "; + `ShiftCtrlEnum_binary_sequential_SRA_1 : memory_SHIFT_CTRL_string = "SRA_1 "; + default : memory_SHIFT_CTRL_string = "?????????"; + endcase + end + always @(*) begin + case(_zz_memory_SHIFT_CTRL) + `ShiftCtrlEnum_binary_sequential_DISABLE_1 : _zz_memory_SHIFT_CTRL_string = "DISABLE_1"; + `ShiftCtrlEnum_binary_sequential_SLL_1 : _zz_memory_SHIFT_CTRL_string = "SLL_1 "; + `ShiftCtrlEnum_binary_sequential_SRL_1 : _zz_memory_SHIFT_CTRL_string = "SRL_1 "; + `ShiftCtrlEnum_binary_sequential_SRA_1 : _zz_memory_SHIFT_CTRL_string = "SRA_1 "; + default : _zz_memory_SHIFT_CTRL_string = "?????????"; + endcase + end + always @(*) begin + case(execute_SHIFT_CTRL) + `ShiftCtrlEnum_binary_sequential_DISABLE_1 : execute_SHIFT_CTRL_string = "DISABLE_1"; + `ShiftCtrlEnum_binary_sequential_SLL_1 : execute_SHIFT_CTRL_string = "SLL_1 "; + `ShiftCtrlEnum_binary_sequential_SRL_1 : execute_SHIFT_CTRL_string = "SRL_1 "; + `ShiftCtrlEnum_binary_sequential_SRA_1 : execute_SHIFT_CTRL_string = "SRA_1 "; + default : execute_SHIFT_CTRL_string = "?????????"; + endcase + end + always @(*) begin + case(_zz_execute_SHIFT_CTRL) + `ShiftCtrlEnum_binary_sequential_DISABLE_1 : _zz_execute_SHIFT_CTRL_string = "DISABLE_1"; + `ShiftCtrlEnum_binary_sequential_SLL_1 : _zz_execute_SHIFT_CTRL_string = "SLL_1 "; + `ShiftCtrlEnum_binary_sequential_SRL_1 : _zz_execute_SHIFT_CTRL_string = "SRL_1 "; + `ShiftCtrlEnum_binary_sequential_SRA_1 : _zz_execute_SHIFT_CTRL_string = "SRA_1 "; + default : _zz_execute_SHIFT_CTRL_string = "?????????"; + endcase + end + always @(*) begin + case(execute_SRC2_CTRL) + `Src2CtrlEnum_binary_sequential_RS : execute_SRC2_CTRL_string = "RS "; + `Src2CtrlEnum_binary_sequential_IMI : execute_SRC2_CTRL_string = "IMI"; + `Src2CtrlEnum_binary_sequential_IMS : execute_SRC2_CTRL_string = "IMS"; + `Src2CtrlEnum_binary_sequential_PC : execute_SRC2_CTRL_string = "PC "; + default : execute_SRC2_CTRL_string = "???"; + endcase + end + always @(*) begin + case(_zz_execute_SRC2_CTRL) + `Src2CtrlEnum_binary_sequential_RS : _zz_execute_SRC2_CTRL_string = "RS "; + `Src2CtrlEnum_binary_sequential_IMI : _zz_execute_SRC2_CTRL_string = "IMI"; + `Src2CtrlEnum_binary_sequential_IMS : _zz_execute_SRC2_CTRL_string = "IMS"; + `Src2CtrlEnum_binary_sequential_PC : _zz_execute_SRC2_CTRL_string = "PC "; + default : _zz_execute_SRC2_CTRL_string = "???"; + endcase + end + always @(*) begin + case(execute_SRC1_CTRL) + `Src1CtrlEnum_binary_sequential_RS : execute_SRC1_CTRL_string = "RS "; + `Src1CtrlEnum_binary_sequential_IMU : execute_SRC1_CTRL_string = "IMU "; + `Src1CtrlEnum_binary_sequential_PC_INCREMENT : execute_SRC1_CTRL_string = "PC_INCREMENT"; + `Src1CtrlEnum_binary_sequential_URS1 : execute_SRC1_CTRL_string = "URS1 "; + default : execute_SRC1_CTRL_string = "????????????"; + endcase + end + always @(*) begin + case(_zz_execute_SRC1_CTRL) + `Src1CtrlEnum_binary_sequential_RS : _zz_execute_SRC1_CTRL_string = "RS "; + `Src1CtrlEnum_binary_sequential_IMU : _zz_execute_SRC1_CTRL_string = "IMU "; + `Src1CtrlEnum_binary_sequential_PC_INCREMENT : _zz_execute_SRC1_CTRL_string = "PC_INCREMENT"; + `Src1CtrlEnum_binary_sequential_URS1 : _zz_execute_SRC1_CTRL_string = "URS1 "; + default : _zz_execute_SRC1_CTRL_string = "????????????"; + endcase + end + always @(*) begin + case(execute_ALU_CTRL) + `AluCtrlEnum_binary_sequential_ADD_SUB : execute_ALU_CTRL_string = "ADD_SUB "; + `AluCtrlEnum_binary_sequential_SLT_SLTU : execute_ALU_CTRL_string = "SLT_SLTU"; + `AluCtrlEnum_binary_sequential_BITWISE : execute_ALU_CTRL_string = "BITWISE "; + default : execute_ALU_CTRL_string = "????????"; + endcase + end + always @(*) begin + case(_zz_execute_ALU_CTRL) + `AluCtrlEnum_binary_sequential_ADD_SUB : _zz_execute_ALU_CTRL_string = "ADD_SUB "; + `AluCtrlEnum_binary_sequential_SLT_SLTU : _zz_execute_ALU_CTRL_string = "SLT_SLTU"; + `AluCtrlEnum_binary_sequential_BITWISE : _zz_execute_ALU_CTRL_string = "BITWISE "; + default : _zz_execute_ALU_CTRL_string = "????????"; + endcase + end + always @(*) begin + case(execute_ALU_BITWISE_CTRL) + `AluBitwiseCtrlEnum_binary_sequential_XOR_1 : execute_ALU_BITWISE_CTRL_string = "XOR_1"; + `AluBitwiseCtrlEnum_binary_sequential_OR_1 : execute_ALU_BITWISE_CTRL_string = "OR_1 "; + `AluBitwiseCtrlEnum_binary_sequential_AND_1 : execute_ALU_BITWISE_CTRL_string = "AND_1"; + default : execute_ALU_BITWISE_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(_zz_execute_ALU_BITWISE_CTRL) + `AluBitwiseCtrlEnum_binary_sequential_XOR_1 : _zz_execute_ALU_BITWISE_CTRL_string = "XOR_1"; + `AluBitwiseCtrlEnum_binary_sequential_OR_1 : _zz_execute_ALU_BITWISE_CTRL_string = "OR_1 "; + `AluBitwiseCtrlEnum_binary_sequential_AND_1 : _zz_execute_ALU_BITWISE_CTRL_string = "AND_1"; + default : _zz_execute_ALU_BITWISE_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(_zz_decode_CfuPlugin_CFU_INPUT_2_KIND_1) + `Input2Kind_binary_sequential_RS : _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_1_string = "RS "; + `Input2Kind_binary_sequential_IMM_I : _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_1_string = "IMM_I"; + default : _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_1_string = "?????"; + endcase + end + always @(*) begin + case(_zz_decode_ENV_CTRL_1) + `EnvCtrlEnum_binary_sequential_NONE : _zz_decode_ENV_CTRL_1_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : _zz_decode_ENV_CTRL_1_string = "XRET "; + `EnvCtrlEnum_binary_sequential_WFI : _zz_decode_ENV_CTRL_1_string = "WFI "; + `EnvCtrlEnum_binary_sequential_ECALL : _zz_decode_ENV_CTRL_1_string = "ECALL"; + default : _zz_decode_ENV_CTRL_1_string = "?????"; + endcase + end + always @(*) begin + case(_zz_decode_BRANCH_CTRL) + `BranchCtrlEnum_binary_sequential_INC : _zz_decode_BRANCH_CTRL_string = "INC "; + `BranchCtrlEnum_binary_sequential_B : _zz_decode_BRANCH_CTRL_string = "B "; + `BranchCtrlEnum_binary_sequential_JAL : _zz_decode_BRANCH_CTRL_string = "JAL "; + `BranchCtrlEnum_binary_sequential_JALR : _zz_decode_BRANCH_CTRL_string = "JALR"; + default : _zz_decode_BRANCH_CTRL_string = "????"; + endcase + end + always @(*) begin + case(_zz_decode_SHIFT_CTRL_1) + `ShiftCtrlEnum_binary_sequential_DISABLE_1 : _zz_decode_SHIFT_CTRL_1_string = "DISABLE_1"; + `ShiftCtrlEnum_binary_sequential_SLL_1 : _zz_decode_SHIFT_CTRL_1_string = "SLL_1 "; + `ShiftCtrlEnum_binary_sequential_SRL_1 : _zz_decode_SHIFT_CTRL_1_string = "SRL_1 "; + `ShiftCtrlEnum_binary_sequential_SRA_1 : _zz_decode_SHIFT_CTRL_1_string = "SRA_1 "; + default : _zz_decode_SHIFT_CTRL_1_string = "?????????"; + endcase + end + always @(*) begin + case(_zz_decode_ALU_BITWISE_CTRL_1) + `AluBitwiseCtrlEnum_binary_sequential_XOR_1 : _zz_decode_ALU_BITWISE_CTRL_1_string = "XOR_1"; + `AluBitwiseCtrlEnum_binary_sequential_OR_1 : _zz_decode_ALU_BITWISE_CTRL_1_string = "OR_1 "; + `AluBitwiseCtrlEnum_binary_sequential_AND_1 : _zz_decode_ALU_BITWISE_CTRL_1_string = "AND_1"; + default : _zz_decode_ALU_BITWISE_CTRL_1_string = "?????"; + endcase + end + always @(*) begin + case(_zz_decode_SRC2_CTRL_1) + `Src2CtrlEnum_binary_sequential_RS : _zz_decode_SRC2_CTRL_1_string = "RS "; + `Src2CtrlEnum_binary_sequential_IMI : _zz_decode_SRC2_CTRL_1_string = "IMI"; + `Src2CtrlEnum_binary_sequential_IMS : _zz_decode_SRC2_CTRL_1_string = "IMS"; + `Src2CtrlEnum_binary_sequential_PC : _zz_decode_SRC2_CTRL_1_string = "PC "; + default : _zz_decode_SRC2_CTRL_1_string = "???"; + endcase + end + always @(*) begin + case(_zz_decode_ALU_CTRL_1) + `AluCtrlEnum_binary_sequential_ADD_SUB : _zz_decode_ALU_CTRL_1_string = "ADD_SUB "; + `AluCtrlEnum_binary_sequential_SLT_SLTU : _zz_decode_ALU_CTRL_1_string = "SLT_SLTU"; + `AluCtrlEnum_binary_sequential_BITWISE : _zz_decode_ALU_CTRL_1_string = "BITWISE "; + default : _zz_decode_ALU_CTRL_1_string = "????????"; + endcase + end + always @(*) begin + case(_zz_decode_SRC1_CTRL_1) + `Src1CtrlEnum_binary_sequential_RS : _zz_decode_SRC1_CTRL_1_string = "RS "; + `Src1CtrlEnum_binary_sequential_IMU : _zz_decode_SRC1_CTRL_1_string = "IMU "; + `Src1CtrlEnum_binary_sequential_PC_INCREMENT : _zz_decode_SRC1_CTRL_1_string = "PC_INCREMENT"; + `Src1CtrlEnum_binary_sequential_URS1 : _zz_decode_SRC1_CTRL_1_string = "URS1 "; + default : _zz_decode_SRC1_CTRL_1_string = "????????????"; + endcase + end + always @(*) begin + case(decode_BRANCH_CTRL) + `BranchCtrlEnum_binary_sequential_INC : decode_BRANCH_CTRL_string = "INC "; + `BranchCtrlEnum_binary_sequential_B : decode_BRANCH_CTRL_string = "B "; + `BranchCtrlEnum_binary_sequential_JAL : decode_BRANCH_CTRL_string = "JAL "; + `BranchCtrlEnum_binary_sequential_JALR : decode_BRANCH_CTRL_string = "JALR"; + default : decode_BRANCH_CTRL_string = "????"; + endcase + end + always @(*) begin + case(_zz_decode_BRANCH_CTRL_1) + `BranchCtrlEnum_binary_sequential_INC : _zz_decode_BRANCH_CTRL_1_string = "INC "; + `BranchCtrlEnum_binary_sequential_B : _zz_decode_BRANCH_CTRL_1_string = "B "; + `BranchCtrlEnum_binary_sequential_JAL : _zz_decode_BRANCH_CTRL_1_string = "JAL "; + `BranchCtrlEnum_binary_sequential_JALR : _zz_decode_BRANCH_CTRL_1_string = "JALR"; + default : _zz_decode_BRANCH_CTRL_1_string = "????"; + endcase + end + always @(*) begin + case(_zz_decode_SRC1_CTRL_2) + `Src1CtrlEnum_binary_sequential_RS : _zz_decode_SRC1_CTRL_2_string = "RS "; + `Src1CtrlEnum_binary_sequential_IMU : _zz_decode_SRC1_CTRL_2_string = "IMU "; + `Src1CtrlEnum_binary_sequential_PC_INCREMENT : _zz_decode_SRC1_CTRL_2_string = "PC_INCREMENT"; + `Src1CtrlEnum_binary_sequential_URS1 : _zz_decode_SRC1_CTRL_2_string = "URS1 "; + default : _zz_decode_SRC1_CTRL_2_string = "????????????"; + endcase + end + always @(*) begin + case(_zz_decode_ALU_CTRL_2) + `AluCtrlEnum_binary_sequential_ADD_SUB : _zz_decode_ALU_CTRL_2_string = "ADD_SUB "; + `AluCtrlEnum_binary_sequential_SLT_SLTU : _zz_decode_ALU_CTRL_2_string = "SLT_SLTU"; + `AluCtrlEnum_binary_sequential_BITWISE : _zz_decode_ALU_CTRL_2_string = "BITWISE "; + default : _zz_decode_ALU_CTRL_2_string = "????????"; + endcase + end + always @(*) begin + case(_zz_decode_SRC2_CTRL_2) + `Src2CtrlEnum_binary_sequential_RS : _zz_decode_SRC2_CTRL_2_string = "RS "; + `Src2CtrlEnum_binary_sequential_IMI : _zz_decode_SRC2_CTRL_2_string = "IMI"; + `Src2CtrlEnum_binary_sequential_IMS : _zz_decode_SRC2_CTRL_2_string = "IMS"; + `Src2CtrlEnum_binary_sequential_PC : _zz_decode_SRC2_CTRL_2_string = "PC "; + default : _zz_decode_SRC2_CTRL_2_string = "???"; + endcase + end + always @(*) begin + case(_zz_decode_ALU_BITWISE_CTRL_2) + `AluBitwiseCtrlEnum_binary_sequential_XOR_1 : _zz_decode_ALU_BITWISE_CTRL_2_string = "XOR_1"; + `AluBitwiseCtrlEnum_binary_sequential_OR_1 : _zz_decode_ALU_BITWISE_CTRL_2_string = "OR_1 "; + `AluBitwiseCtrlEnum_binary_sequential_AND_1 : _zz_decode_ALU_BITWISE_CTRL_2_string = "AND_1"; + default : _zz_decode_ALU_BITWISE_CTRL_2_string = "?????"; + endcase + end + always @(*) begin + case(_zz_decode_SHIFT_CTRL_2) + `ShiftCtrlEnum_binary_sequential_DISABLE_1 : _zz_decode_SHIFT_CTRL_2_string = "DISABLE_1"; + `ShiftCtrlEnum_binary_sequential_SLL_1 : _zz_decode_SHIFT_CTRL_2_string = "SLL_1 "; + `ShiftCtrlEnum_binary_sequential_SRL_1 : _zz_decode_SHIFT_CTRL_2_string = "SRL_1 "; + `ShiftCtrlEnum_binary_sequential_SRA_1 : _zz_decode_SHIFT_CTRL_2_string = "SRA_1 "; + default : _zz_decode_SHIFT_CTRL_2_string = "?????????"; + endcase + end + always @(*) begin + case(_zz_decode_BRANCH_CTRL_2) + `BranchCtrlEnum_binary_sequential_INC : _zz_decode_BRANCH_CTRL_2_string = "INC "; + `BranchCtrlEnum_binary_sequential_B : _zz_decode_BRANCH_CTRL_2_string = "B "; + `BranchCtrlEnum_binary_sequential_JAL : _zz_decode_BRANCH_CTRL_2_string = "JAL "; + `BranchCtrlEnum_binary_sequential_JALR : _zz_decode_BRANCH_CTRL_2_string = "JALR"; + default : _zz_decode_BRANCH_CTRL_2_string = "????"; + endcase + end + always @(*) begin + case(_zz_decode_ENV_CTRL_2) + `EnvCtrlEnum_binary_sequential_NONE : _zz_decode_ENV_CTRL_2_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : _zz_decode_ENV_CTRL_2_string = "XRET "; + `EnvCtrlEnum_binary_sequential_WFI : _zz_decode_ENV_CTRL_2_string = "WFI "; + `EnvCtrlEnum_binary_sequential_ECALL : _zz_decode_ENV_CTRL_2_string = "ECALL"; + default : _zz_decode_ENV_CTRL_2_string = "?????"; + endcase + end + always @(*) begin + case(_zz_decode_CfuPlugin_CFU_INPUT_2_KIND_8) + `Input2Kind_binary_sequential_RS : _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_8_string = "RS "; + `Input2Kind_binary_sequential_IMM_I : _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_8_string = "IMM_I"; + default : _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_8_string = "?????"; + endcase + end + always @(*) begin + case(decode_to_execute_SRC1_CTRL) + `Src1CtrlEnum_binary_sequential_RS : decode_to_execute_SRC1_CTRL_string = "RS "; + `Src1CtrlEnum_binary_sequential_IMU : decode_to_execute_SRC1_CTRL_string = "IMU "; + `Src1CtrlEnum_binary_sequential_PC_INCREMENT : decode_to_execute_SRC1_CTRL_string = "PC_INCREMENT"; + `Src1CtrlEnum_binary_sequential_URS1 : decode_to_execute_SRC1_CTRL_string = "URS1 "; + default : decode_to_execute_SRC1_CTRL_string = "????????????"; + endcase + end + always @(*) begin + case(decode_to_execute_ALU_CTRL) + `AluCtrlEnum_binary_sequential_ADD_SUB : decode_to_execute_ALU_CTRL_string = "ADD_SUB "; + `AluCtrlEnum_binary_sequential_SLT_SLTU : decode_to_execute_ALU_CTRL_string = "SLT_SLTU"; + `AluCtrlEnum_binary_sequential_BITWISE : decode_to_execute_ALU_CTRL_string = "BITWISE "; + default : decode_to_execute_ALU_CTRL_string = "????????"; + endcase + end + always @(*) begin + case(decode_to_execute_SRC2_CTRL) + `Src2CtrlEnum_binary_sequential_RS : decode_to_execute_SRC2_CTRL_string = "RS "; + `Src2CtrlEnum_binary_sequential_IMI : decode_to_execute_SRC2_CTRL_string = "IMI"; + `Src2CtrlEnum_binary_sequential_IMS : decode_to_execute_SRC2_CTRL_string = "IMS"; + `Src2CtrlEnum_binary_sequential_PC : decode_to_execute_SRC2_CTRL_string = "PC "; + default : decode_to_execute_SRC2_CTRL_string = "???"; + endcase + end + always @(*) begin + case(decode_to_execute_ALU_BITWISE_CTRL) + `AluBitwiseCtrlEnum_binary_sequential_XOR_1 : decode_to_execute_ALU_BITWISE_CTRL_string = "XOR_1"; + `AluBitwiseCtrlEnum_binary_sequential_OR_1 : decode_to_execute_ALU_BITWISE_CTRL_string = "OR_1 "; + `AluBitwiseCtrlEnum_binary_sequential_AND_1 : decode_to_execute_ALU_BITWISE_CTRL_string = "AND_1"; + default : decode_to_execute_ALU_BITWISE_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(decode_to_execute_SHIFT_CTRL) + `ShiftCtrlEnum_binary_sequential_DISABLE_1 : decode_to_execute_SHIFT_CTRL_string = "DISABLE_1"; + `ShiftCtrlEnum_binary_sequential_SLL_1 : decode_to_execute_SHIFT_CTRL_string = "SLL_1 "; + `ShiftCtrlEnum_binary_sequential_SRL_1 : decode_to_execute_SHIFT_CTRL_string = "SRL_1 "; + `ShiftCtrlEnum_binary_sequential_SRA_1 : decode_to_execute_SHIFT_CTRL_string = "SRA_1 "; + default : decode_to_execute_SHIFT_CTRL_string = "?????????"; + endcase + end + always @(*) begin + case(execute_to_memory_SHIFT_CTRL) + `ShiftCtrlEnum_binary_sequential_DISABLE_1 : execute_to_memory_SHIFT_CTRL_string = "DISABLE_1"; + `ShiftCtrlEnum_binary_sequential_SLL_1 : execute_to_memory_SHIFT_CTRL_string = "SLL_1 "; + `ShiftCtrlEnum_binary_sequential_SRL_1 : execute_to_memory_SHIFT_CTRL_string = "SRL_1 "; + `ShiftCtrlEnum_binary_sequential_SRA_1 : execute_to_memory_SHIFT_CTRL_string = "SRA_1 "; + default : execute_to_memory_SHIFT_CTRL_string = "?????????"; + endcase + end + always @(*) begin + case(decode_to_execute_BRANCH_CTRL) + `BranchCtrlEnum_binary_sequential_INC : decode_to_execute_BRANCH_CTRL_string = "INC "; + `BranchCtrlEnum_binary_sequential_B : decode_to_execute_BRANCH_CTRL_string = "B "; + `BranchCtrlEnum_binary_sequential_JAL : decode_to_execute_BRANCH_CTRL_string = "JAL "; + `BranchCtrlEnum_binary_sequential_JALR : decode_to_execute_BRANCH_CTRL_string = "JALR"; + default : decode_to_execute_BRANCH_CTRL_string = "????"; + endcase + end + always @(*) begin + case(decode_to_execute_ENV_CTRL) + `EnvCtrlEnum_binary_sequential_NONE : decode_to_execute_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : decode_to_execute_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_binary_sequential_WFI : decode_to_execute_ENV_CTRL_string = "WFI "; + `EnvCtrlEnum_binary_sequential_ECALL : decode_to_execute_ENV_CTRL_string = "ECALL"; + default : decode_to_execute_ENV_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(execute_to_memory_ENV_CTRL) + `EnvCtrlEnum_binary_sequential_NONE : execute_to_memory_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : execute_to_memory_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_binary_sequential_WFI : execute_to_memory_ENV_CTRL_string = "WFI "; + `EnvCtrlEnum_binary_sequential_ECALL : execute_to_memory_ENV_CTRL_string = "ECALL"; + default : execute_to_memory_ENV_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(memory_to_writeBack_ENV_CTRL) + `EnvCtrlEnum_binary_sequential_NONE : memory_to_writeBack_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : memory_to_writeBack_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_binary_sequential_WFI : memory_to_writeBack_ENV_CTRL_string = "WFI "; + `EnvCtrlEnum_binary_sequential_ECALL : memory_to_writeBack_ENV_CTRL_string = "ECALL"; + default : memory_to_writeBack_ENV_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND) + `Input2Kind_binary_sequential_RS : decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND_string = "RS "; + `Input2Kind_binary_sequential_IMM_I : decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND_string = "IMM_I"; + default : decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND_string = "?????"; + endcase + end + `endif + + assign memory_MUL_LOW = ($signed(_zz_memory_MUL_LOW) + $signed(_zz_memory_MUL_LOW_7)); + assign writeBack_CfuPlugin_CFU_IN_FLIGHT = memory_to_writeBack_CfuPlugin_CFU_IN_FLIGHT; + assign execute_CfuPlugin_CFU_IN_FLIGHT = ((execute_CfuPlugin_schedule || execute_CfuPlugin_hold) || execute_CfuPlugin_fired); + assign memory_MUL_HH = execute_to_memory_MUL_HH; + assign execute_MUL_HH = ($signed(execute_MulPlugin_aHigh) * $signed(execute_MulPlugin_bHigh)); + assign execute_MUL_HL = ($signed(execute_MulPlugin_aHigh) * $signed(execute_MulPlugin_bSLow)); + assign execute_MUL_LH = ($signed(execute_MulPlugin_aSLow) * $signed(execute_MulPlugin_bHigh)); + assign execute_MUL_LL = (execute_MulPlugin_aULow * execute_MulPlugin_bULow); + assign execute_SHIFT_RIGHT = _zz_execute_SHIFT_RIGHT; + assign execute_REGFILE_WRITE_DATA = _zz_execute_REGFILE_WRITE_DATA; + assign memory_MEMORY_STORE_DATA_RF = execute_to_memory_MEMORY_STORE_DATA_RF; + assign execute_MEMORY_STORE_DATA_RF = _zz_execute_MEMORY_STORE_DATA_RF; + assign decode_CSR_READ_OPCODE = (decode_INSTRUCTION[13 : 7] != 7'h20); + assign decode_CSR_WRITE_OPCODE = (! (((decode_INSTRUCTION[14 : 13] == 2'b01) && (decode_INSTRUCTION[19 : 15] == 5'h0)) || ((decode_INSTRUCTION[14 : 13] == 2'b11) && (decode_INSTRUCTION[19 : 15] == 5'h0)))); + assign decode_PREDICTION_HAD_BRANCHED2 = IBusCachedPlugin_decodePrediction_cmd_hadBranch; + assign decode_SRC2_FORCE_ZERO = (decode_SRC_ADD_ZERO && (! decode_SRC_USE_SUB_LESS)); + assign decode_CfuPlugin_CFU_INPUT_2_KIND = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND; + assign _zz_decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND = _zz_decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND_1; + assign decode_CfuPlugin_CFU_ENABLE = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[32]; + assign decode_IS_RS2_SIGNED = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[31]; + assign decode_IS_RS1_SIGNED = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[30]; + assign decode_IS_DIV = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[29]; + assign memory_IS_MUL = execute_to_memory_IS_MUL; + assign execute_IS_MUL = decode_to_execute_IS_MUL; + assign decode_IS_MUL = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[28]; + assign _zz_memory_to_writeBack_ENV_CTRL = _zz_memory_to_writeBack_ENV_CTRL_1; + assign _zz_execute_to_memory_ENV_CTRL = _zz_execute_to_memory_ENV_CTRL_1; + assign decode_ENV_CTRL = _zz_decode_ENV_CTRL; + assign _zz_decode_to_execute_ENV_CTRL = _zz_decode_to_execute_ENV_CTRL_1; + assign decode_IS_CSR = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[25]; + assign _zz_decode_to_execute_BRANCH_CTRL = _zz_decode_to_execute_BRANCH_CTRL_1; + assign _zz_execute_to_memory_SHIFT_CTRL = _zz_execute_to_memory_SHIFT_CTRL_1; + assign decode_SHIFT_CTRL = _zz_decode_SHIFT_CTRL; + assign _zz_decode_to_execute_SHIFT_CTRL = _zz_decode_to_execute_SHIFT_CTRL_1; + assign decode_ALU_BITWISE_CTRL = _zz_decode_ALU_BITWISE_CTRL; + assign _zz_decode_to_execute_ALU_BITWISE_CTRL = _zz_decode_to_execute_ALU_BITWISE_CTRL_1; + assign decode_SRC_LESS_UNSIGNED = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[17]; + assign decode_MEMORY_MANAGMENT = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[16]; + assign memory_MEMORY_WR = execute_to_memory_MEMORY_WR; + assign decode_MEMORY_WR = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[13]; + assign execute_BYPASSABLE_MEMORY_STAGE = decode_to_execute_BYPASSABLE_MEMORY_STAGE; + assign decode_BYPASSABLE_MEMORY_STAGE = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[12]; + assign decode_BYPASSABLE_EXECUTE_STAGE = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[11]; + assign decode_SRC2_CTRL = _zz_decode_SRC2_CTRL; + assign _zz_decode_to_execute_SRC2_CTRL = _zz_decode_to_execute_SRC2_CTRL_1; + assign decode_ALU_CTRL = _zz_decode_ALU_CTRL; + assign _zz_decode_to_execute_ALU_CTRL = _zz_decode_to_execute_ALU_CTRL_1; + assign decode_SRC1_CTRL = _zz_decode_SRC1_CTRL; + assign _zz_decode_to_execute_SRC1_CTRL = _zz_decode_to_execute_SRC1_CTRL_1; + assign decode_MEMORY_FORCE_CONSTISTENCY = 1'b0; + assign writeBack_FORMAL_PC_NEXT = memory_to_writeBack_FORMAL_PC_NEXT; + assign memory_FORMAL_PC_NEXT = execute_to_memory_FORMAL_PC_NEXT; + assign execute_FORMAL_PC_NEXT = decode_to_execute_FORMAL_PC_NEXT; + assign decode_FORMAL_PC_NEXT = (decode_PC + 32'h00000004); + assign memory_PC = execute_to_memory_PC; + always @(*) begin + _zz_memory_to_writeBack_CfuPlugin_CFU_IN_FLIGHT = memory_CfuPlugin_CFU_IN_FLIGHT; + if(memory_arbitration_isStuck) begin + _zz_memory_to_writeBack_CfuPlugin_CFU_IN_FLIGHT = 1'b0; + end + end + + always @(*) begin + _zz_execute_to_memory_CfuPlugin_CFU_IN_FLIGHT = execute_CfuPlugin_CFU_IN_FLIGHT; + if(execute_arbitration_isStuck) begin + _zz_execute_to_memory_CfuPlugin_CFU_IN_FLIGHT = 1'b0; + end + end + + assign memory_CfuPlugin_CFU_IN_FLIGHT = execute_to_memory_CfuPlugin_CFU_IN_FLIGHT; + assign execute_CfuPlugin_CFU_INPUT_2_KIND = _zz_execute_CfuPlugin_CFU_INPUT_2_KIND; + assign execute_CfuPlugin_CFU_ENABLE = decode_to_execute_CfuPlugin_CFU_ENABLE; + assign execute_IS_RS1_SIGNED = decode_to_execute_IS_RS1_SIGNED; + assign execute_IS_DIV = decode_to_execute_IS_DIV; + assign execute_IS_RS2_SIGNED = decode_to_execute_IS_RS2_SIGNED; + assign memory_IS_DIV = execute_to_memory_IS_DIV; + assign writeBack_IS_MUL = memory_to_writeBack_IS_MUL; + assign writeBack_MUL_HH = memory_to_writeBack_MUL_HH; + assign writeBack_MUL_LOW = memory_to_writeBack_MUL_LOW; + assign memory_MUL_HL = execute_to_memory_MUL_HL; + assign memory_MUL_LH = execute_to_memory_MUL_LH; + assign memory_MUL_LL = execute_to_memory_MUL_LL; + assign execute_CSR_READ_OPCODE = decode_to_execute_CSR_READ_OPCODE; + assign execute_CSR_WRITE_OPCODE = decode_to_execute_CSR_WRITE_OPCODE; + assign execute_IS_CSR = decode_to_execute_IS_CSR; + assign memory_ENV_CTRL = _zz_memory_ENV_CTRL; + assign execute_ENV_CTRL = _zz_execute_ENV_CTRL; + assign writeBack_ENV_CTRL = _zz_writeBack_ENV_CTRL; + assign execute_BRANCH_CALC = {execute_BranchPlugin_branchAdder[31 : 1],1'b0}; + assign execute_BRANCH_DO = ((execute_PREDICTION_HAD_BRANCHED2 != execute_BRANCH_COND_RESULT) || execute_BranchPlugin_missAlignedTarget); + assign execute_PC = decode_to_execute_PC; + assign execute_PREDICTION_HAD_BRANCHED2 = decode_to_execute_PREDICTION_HAD_BRANCHED2; + assign execute_RS1 = decode_to_execute_RS1; + assign execute_BRANCH_COND_RESULT = _zz_execute_BRANCH_COND_RESULT_1; + assign execute_BRANCH_CTRL = _zz_execute_BRANCH_CTRL; + assign decode_RS2_USE = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[15]; + assign decode_RS1_USE = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[5]; + always @(*) begin + _zz_decode_RS2 = execute_REGFILE_WRITE_DATA; + if(when_CsrPlugin_l1176) begin + _zz_decode_RS2 = CsrPlugin_csrMapping_readDataSignal; + end + end + + assign execute_REGFILE_WRITE_VALID = decode_to_execute_REGFILE_WRITE_VALID; + assign execute_BYPASSABLE_EXECUTE_STAGE = decode_to_execute_BYPASSABLE_EXECUTE_STAGE; + assign memory_REGFILE_WRITE_VALID = execute_to_memory_REGFILE_WRITE_VALID; + assign memory_INSTRUCTION = execute_to_memory_INSTRUCTION; + assign memory_BYPASSABLE_MEMORY_STAGE = execute_to_memory_BYPASSABLE_MEMORY_STAGE; + assign writeBack_REGFILE_WRITE_VALID = memory_to_writeBack_REGFILE_WRITE_VALID; + always @(*) begin + decode_RS2 = decode_RegFilePlugin_rs2Data; + if(HazardSimplePlugin_writeBackBuffer_valid) begin + if(HazardSimplePlugin_addr1Match) begin + decode_RS2 = HazardSimplePlugin_writeBackBuffer_payload_data; + end + end + if(when_HazardSimplePlugin_l45) begin + if(when_HazardSimplePlugin_l47) begin + if(when_HazardSimplePlugin_l51) begin + decode_RS2 = _zz_decode_RS2_2; + end + end + end + if(when_HazardSimplePlugin_l45_1) begin + if(memory_BYPASSABLE_MEMORY_STAGE) begin + if(when_HazardSimplePlugin_l51_1) begin + decode_RS2 = _zz_decode_RS2_1; + end + end + end + if(when_HazardSimplePlugin_l45_2) begin + if(execute_BYPASSABLE_EXECUTE_STAGE) begin + if(when_HazardSimplePlugin_l51_2) begin + decode_RS2 = _zz_decode_RS2; + end + end + end + end + + always @(*) begin + decode_RS1 = decode_RegFilePlugin_rs1Data; + if(HazardSimplePlugin_writeBackBuffer_valid) begin + if(HazardSimplePlugin_addr0Match) begin + decode_RS1 = HazardSimplePlugin_writeBackBuffer_payload_data; + end + end + if(when_HazardSimplePlugin_l45) begin + if(when_HazardSimplePlugin_l47) begin + if(when_HazardSimplePlugin_l48) begin + decode_RS1 = _zz_decode_RS2_2; + end + end + end + if(when_HazardSimplePlugin_l45_1) begin + if(memory_BYPASSABLE_MEMORY_STAGE) begin + if(when_HazardSimplePlugin_l48_1) begin + decode_RS1 = _zz_decode_RS2_1; + end + end + end + if(when_HazardSimplePlugin_l45_2) begin + if(execute_BYPASSABLE_EXECUTE_STAGE) begin + if(when_HazardSimplePlugin_l48_2) begin + decode_RS1 = _zz_decode_RS2; + end + end + end + end + + assign memory_SHIFT_RIGHT = execute_to_memory_SHIFT_RIGHT; + always @(*) begin + _zz_decode_RS2_1 = memory_REGFILE_WRITE_DATA; + if(memory_arbitration_isValid) begin + case(memory_SHIFT_CTRL) + `ShiftCtrlEnum_binary_sequential_SLL_1 : begin + _zz_decode_RS2_1 = _zz_decode_RS2_3; + end + `ShiftCtrlEnum_binary_sequential_SRL_1, `ShiftCtrlEnum_binary_sequential_SRA_1 : begin + _zz_decode_RS2_1 = memory_SHIFT_RIGHT; + end + default : begin + end + endcase + end + if(when_MulDivIterativePlugin_l128) begin + _zz_decode_RS2_1 = memory_DivPlugin_div_result; + end + if(memory_CfuPlugin_CFU_IN_FLIGHT) begin + _zz_decode_RS2_1 = CfuPlugin_bus_rsp_rsp_payload_outputs_0; + end + end + + assign memory_SHIFT_CTRL = _zz_memory_SHIFT_CTRL; + assign execute_SHIFT_CTRL = _zz_execute_SHIFT_CTRL; + assign execute_SRC_LESS_UNSIGNED = decode_to_execute_SRC_LESS_UNSIGNED; + assign execute_SRC2_FORCE_ZERO = decode_to_execute_SRC2_FORCE_ZERO; + assign execute_SRC_USE_SUB_LESS = decode_to_execute_SRC_USE_SUB_LESS; + assign _zz_execute_SRC2 = execute_PC; + assign execute_SRC2_CTRL = _zz_execute_SRC2_CTRL; + assign execute_SRC1_CTRL = _zz_execute_SRC1_CTRL; + assign decode_SRC_USE_SUB_LESS = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[3]; + assign decode_SRC_ADD_ZERO = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[20]; + assign execute_SRC_ADD_SUB = execute_SrcPlugin_addSub; + assign execute_SRC_LESS = execute_SrcPlugin_less; + assign execute_ALU_CTRL = _zz_execute_ALU_CTRL; + assign execute_SRC2 = _zz_execute_SRC2_5; + assign execute_SRC1 = _zz_execute_SRC1; + assign execute_ALU_BITWISE_CTRL = _zz_execute_ALU_BITWISE_CTRL; + assign _zz_lastStageRegFileWrite_payload_address = writeBack_INSTRUCTION; + assign _zz_lastStageRegFileWrite_valid = writeBack_REGFILE_WRITE_VALID; + always @(*) begin + _zz_1 = 1'b0; + if(lastStageRegFileWrite_valid) begin + _zz_1 = 1'b1; + end + end + + assign decode_INSTRUCTION_ANTICIPATED = (decode_arbitration_isStuck ? decode_INSTRUCTION : IBusCachedPlugin_cache_io_cpu_fetch_data); + always @(*) begin + decode_REGFILE_WRITE_VALID = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[10]; + if(when_RegFilePlugin_l63) begin + decode_REGFILE_WRITE_VALID = 1'b0; + end + end + + assign decode_LEGAL_INSTRUCTION = ({((decode_INSTRUCTION & 32'h0000005f) == 32'h00000017),{((decode_INSTRUCTION & 32'h0000007f) == 32'h0000006f),{((decode_INSTRUCTION & 32'h0000007f) == 32'h0000000b),{((decode_INSTRUCTION & _zz_decode_LEGAL_INSTRUCTION) == 32'h00000003),{(_zz_decode_LEGAL_INSTRUCTION_1 == _zz_decode_LEGAL_INSTRUCTION_2),{_zz_decode_LEGAL_INSTRUCTION_3,{_zz_decode_LEGAL_INSTRUCTION_4,_zz_decode_LEGAL_INSTRUCTION_5}}}}}}} != 22'h0); + always @(*) begin + _zz_decode_RS2_2 = writeBack_REGFILE_WRITE_DATA; + if(when_DBusCachedPlugin_l484) begin + _zz_decode_RS2_2 = writeBack_DBusCachedPlugin_rspFormated; + end + if(when_MulPlugin_l147) begin + case(switch_MulPlugin_l148) + 2'b00 : begin + _zz_decode_RS2_2 = _zz__zz_decode_RS2_2; + end + default : begin + _zz_decode_RS2_2 = _zz__zz_decode_RS2_2_1; + end + endcase + end + end + + assign writeBack_MEMORY_WR = memory_to_writeBack_MEMORY_WR; + assign writeBack_MEMORY_STORE_DATA_RF = memory_to_writeBack_MEMORY_STORE_DATA_RF; + assign writeBack_REGFILE_WRITE_DATA = memory_to_writeBack_REGFILE_WRITE_DATA; + assign writeBack_MEMORY_ENABLE = memory_to_writeBack_MEMORY_ENABLE; + assign memory_REGFILE_WRITE_DATA = execute_to_memory_REGFILE_WRITE_DATA; + assign memory_MEMORY_ENABLE = execute_to_memory_MEMORY_ENABLE; + assign execute_MEMORY_FORCE_CONSTISTENCY = decode_to_execute_MEMORY_FORCE_CONSTISTENCY; + assign execute_MEMORY_MANAGMENT = decode_to_execute_MEMORY_MANAGMENT; + assign execute_RS2 = decode_to_execute_RS2; + assign execute_MEMORY_WR = decode_to_execute_MEMORY_WR; + assign execute_SRC_ADD = execute_SrcPlugin_addSub; + assign execute_MEMORY_ENABLE = decode_to_execute_MEMORY_ENABLE; + assign execute_INSTRUCTION = decode_to_execute_INSTRUCTION; + assign decode_MEMORY_ENABLE = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[4]; + assign decode_FLUSH_ALL = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[0]; + always @(*) begin + IBusCachedPlugin_rsp_issueDetected_4 = IBusCachedPlugin_rsp_issueDetected_3; + if(when_IBusCachedPlugin_l256) begin + IBusCachedPlugin_rsp_issueDetected_4 = 1'b1; + end + end + + always @(*) begin + IBusCachedPlugin_rsp_issueDetected_3 = IBusCachedPlugin_rsp_issueDetected_2; + if(when_IBusCachedPlugin_l250) begin + IBusCachedPlugin_rsp_issueDetected_3 = 1'b1; + end + end + + always @(*) begin + IBusCachedPlugin_rsp_issueDetected_2 = IBusCachedPlugin_rsp_issueDetected_1; + if(when_IBusCachedPlugin_l244) begin + IBusCachedPlugin_rsp_issueDetected_2 = 1'b1; + end + end + + always @(*) begin + IBusCachedPlugin_rsp_issueDetected_1 = IBusCachedPlugin_rsp_issueDetected; + if(when_IBusCachedPlugin_l239) begin + IBusCachedPlugin_rsp_issueDetected_1 = 1'b1; + end + end + + assign decode_BRANCH_CTRL = _zz_decode_BRANCH_CTRL_1; + assign decode_INSTRUCTION = IBusCachedPlugin_iBusRsp_output_payload_rsp_inst; + always @(*) begin + _zz_execute_to_memory_FORMAL_PC_NEXT = execute_FORMAL_PC_NEXT; + if(BranchPlugin_jumpInterface_valid) begin + _zz_execute_to_memory_FORMAL_PC_NEXT = BranchPlugin_jumpInterface_payload; + end + end + + always @(*) begin + _zz_decode_to_execute_FORMAL_PC_NEXT = decode_FORMAL_PC_NEXT; + if(IBusCachedPlugin_predictionJumpInterface_valid) begin + _zz_decode_to_execute_FORMAL_PC_NEXT = IBusCachedPlugin_predictionJumpInterface_payload; + end + end + + assign decode_PC = IBusCachedPlugin_iBusRsp_output_payload_pc; + assign writeBack_PC = memory_to_writeBack_PC; + assign writeBack_INSTRUCTION = memory_to_writeBack_INSTRUCTION; + always @(*) begin + decode_arbitration_haltItself = 1'b0; + if(when_DBusCachedPlugin_l303) begin + decode_arbitration_haltItself = 1'b1; + end + end + + always @(*) begin + decode_arbitration_haltByOther = 1'b0; + if(when_HazardSimplePlugin_l113) begin + decode_arbitration_haltByOther = 1'b1; + end + if(CsrPlugin_pipelineLiberator_active) begin + decode_arbitration_haltByOther = 1'b1; + end + if(when_CsrPlugin_l1116) begin + decode_arbitration_haltByOther = 1'b1; + end + end + + always @(*) begin + decode_arbitration_removeIt = 1'b0; + if(_zz_when) begin + decode_arbitration_removeIt = 1'b1; + end + if(decode_arbitration_isFlushed) begin + decode_arbitration_removeIt = 1'b1; + end + end + + assign decode_arbitration_flushIt = 1'b0; + always @(*) begin + decode_arbitration_flushNext = 1'b0; + if(IBusCachedPlugin_predictionJumpInterface_valid) begin + decode_arbitration_flushNext = 1'b1; + end + if(_zz_when) begin + decode_arbitration_flushNext = 1'b1; + end + end + + always @(*) begin + execute_arbitration_haltItself = 1'b0; + if(when_DBusCachedPlugin_l343) begin + execute_arbitration_haltItself = 1'b1; + end + if(when_CsrPlugin_l1108) begin + if(when_CsrPlugin_l1110) begin + execute_arbitration_haltItself = 1'b1; + end + end + if(when_CsrPlugin_l1180) begin + if(execute_CsrPlugin_blockedBySideEffects) begin + execute_arbitration_haltItself = 1'b1; + end + end + if(when_CfuPlugin_l175) begin + execute_arbitration_haltItself = 1'b1; + end + end + + always @(*) begin + execute_arbitration_haltByOther = 1'b0; + if(when_DBusCachedPlugin_l359) begin + execute_arbitration_haltByOther = 1'b1; + end + end + + always @(*) begin + execute_arbitration_removeIt = 1'b0; + if(_zz_when_1) begin + execute_arbitration_removeIt = 1'b1; + end + if(execute_arbitration_isFlushed) begin + execute_arbitration_removeIt = 1'b1; + end + end + + assign execute_arbitration_flushIt = 1'b0; + always @(*) begin + execute_arbitration_flushNext = 1'b0; + if(BranchPlugin_jumpInterface_valid) begin + execute_arbitration_flushNext = 1'b1; + end + if(_zz_when_1) begin + execute_arbitration_flushNext = 1'b1; + end + end + + always @(*) begin + memory_arbitration_haltItself = 1'b0; + if(when_MulDivIterativePlugin_l128) begin + if(when_MulDivIterativePlugin_l129) begin + memory_arbitration_haltItself = 1'b1; + end + end + if(memory_CfuPlugin_CFU_IN_FLIGHT) begin + if(when_CfuPlugin_l208) begin + memory_arbitration_haltItself = 1'b1; + end + end + end + + assign memory_arbitration_haltByOther = 1'b0; + always @(*) begin + memory_arbitration_removeIt = 1'b0; + if(memory_arbitration_isFlushed) begin + memory_arbitration_removeIt = 1'b1; + end + end + + assign memory_arbitration_flushIt = 1'b0; + assign memory_arbitration_flushNext = 1'b0; + always @(*) begin + writeBack_arbitration_haltItself = 1'b0; + if(when_DBusCachedPlugin_l458) begin + writeBack_arbitration_haltItself = 1'b1; + end + end + + assign writeBack_arbitration_haltByOther = 1'b0; + always @(*) begin + writeBack_arbitration_removeIt = 1'b0; + if(DBusCachedPlugin_exceptionBus_valid) begin + writeBack_arbitration_removeIt = 1'b1; + end + if(writeBack_arbitration_isFlushed) begin + writeBack_arbitration_removeIt = 1'b1; + end + end + + always @(*) begin + writeBack_arbitration_flushIt = 1'b0; + if(DBusCachedPlugin_redoBranch_valid) begin + writeBack_arbitration_flushIt = 1'b1; + end + end + + always @(*) begin + writeBack_arbitration_flushNext = 1'b0; + if(DBusCachedPlugin_redoBranch_valid) begin + writeBack_arbitration_flushNext = 1'b1; + end + if(DBusCachedPlugin_exceptionBus_valid) begin + writeBack_arbitration_flushNext = 1'b1; + end + if(when_CsrPlugin_l1019) begin + writeBack_arbitration_flushNext = 1'b1; + end + if(when_CsrPlugin_l1064) begin + writeBack_arbitration_flushNext = 1'b1; + end + end + + assign lastStageInstruction = writeBack_INSTRUCTION; + assign lastStagePc = writeBack_PC; + assign lastStageIsValid = writeBack_arbitration_isValid; + assign lastStageIsFiring = writeBack_arbitration_isFiring; + always @(*) begin + IBusCachedPlugin_fetcherHalt = 1'b0; + if(when_CsrPlugin_l922) begin + IBusCachedPlugin_fetcherHalt = 1'b1; + end + if(when_CsrPlugin_l1019) begin + IBusCachedPlugin_fetcherHalt = 1'b1; + end + if(when_CsrPlugin_l1064) begin + IBusCachedPlugin_fetcherHalt = 1'b1; + end + end + + always @(*) begin + IBusCachedPlugin_incomingInstruction = 1'b0; + if(when_Fetcher_l240) begin + IBusCachedPlugin_incomingInstruction = 1'b1; + end + end + + assign CsrPlugin_csrMapping_allowCsrSignal = 1'b0; + assign CsrPlugin_csrMapping_readDataSignal = CsrPlugin_csrMapping_readDataInit; + always @(*) begin + CsrPlugin_inWfi = 1'b0; + if(when_CsrPlugin_l1108) begin + CsrPlugin_inWfi = 1'b1; + end + end + + assign CsrPlugin_thirdPartyWake = 1'b0; + always @(*) begin + CsrPlugin_jumpInterface_valid = 1'b0; + if(when_CsrPlugin_l1019) begin + CsrPlugin_jumpInterface_valid = 1'b1; + end + if(when_CsrPlugin_l1064) begin + CsrPlugin_jumpInterface_valid = 1'b1; + end + end + + always @(*) begin + CsrPlugin_jumpInterface_payload = 32'bxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx; + if(when_CsrPlugin_l1019) begin + CsrPlugin_jumpInterface_payload = {CsrPlugin_xtvec_base,2'b00}; + end + if(when_CsrPlugin_l1064) begin + case(switch_CsrPlugin_l1068) + 2'b11 : begin + CsrPlugin_jumpInterface_payload = CsrPlugin_mepc; + end + default : begin + end + endcase + end + end + + assign CsrPlugin_forceMachineWire = 1'b0; + assign CsrPlugin_allowInterrupts = 1'b1; + assign CsrPlugin_allowException = 1'b1; + assign CsrPlugin_allowEbreakException = 1'b1; + assign IBusCachedPlugin_externalFlush = ({writeBack_arbitration_flushNext,{memory_arbitration_flushNext,{execute_arbitration_flushNext,decode_arbitration_flushNext}}} != 4'b0000); + assign IBusCachedPlugin_jump_pcLoad_valid = ({CsrPlugin_jumpInterface_valid,{BranchPlugin_jumpInterface_valid,{DBusCachedPlugin_redoBranch_valid,IBusCachedPlugin_predictionJumpInterface_valid}}} != 4'b0000); + assign _zz_IBusCachedPlugin_jump_pcLoad_payload = {IBusCachedPlugin_predictionJumpInterface_valid,{BranchPlugin_jumpInterface_valid,{CsrPlugin_jumpInterface_valid,DBusCachedPlugin_redoBranch_valid}}}; + assign _zz_IBusCachedPlugin_jump_pcLoad_payload_1 = (_zz_IBusCachedPlugin_jump_pcLoad_payload & (~ _zz__zz_IBusCachedPlugin_jump_pcLoad_payload_1)); + assign _zz_IBusCachedPlugin_jump_pcLoad_payload_2 = _zz_IBusCachedPlugin_jump_pcLoad_payload_1[3]; + assign _zz_IBusCachedPlugin_jump_pcLoad_payload_3 = (_zz_IBusCachedPlugin_jump_pcLoad_payload_1[1] || _zz_IBusCachedPlugin_jump_pcLoad_payload_2); + assign _zz_IBusCachedPlugin_jump_pcLoad_payload_4 = (_zz_IBusCachedPlugin_jump_pcLoad_payload_1[2] || _zz_IBusCachedPlugin_jump_pcLoad_payload_2); + assign IBusCachedPlugin_jump_pcLoad_payload = _zz_IBusCachedPlugin_jump_pcLoad_payload_5; + always @(*) begin + IBusCachedPlugin_fetchPc_correction = 1'b0; + if(IBusCachedPlugin_fetchPc_redo_valid) begin + IBusCachedPlugin_fetchPc_correction = 1'b1; + end + if(IBusCachedPlugin_jump_pcLoad_valid) begin + IBusCachedPlugin_fetchPc_correction = 1'b1; + end + end + + assign IBusCachedPlugin_fetchPc_output_fire = (IBusCachedPlugin_fetchPc_output_valid && IBusCachedPlugin_fetchPc_output_ready); + assign IBusCachedPlugin_fetchPc_corrected = (IBusCachedPlugin_fetchPc_correction || IBusCachedPlugin_fetchPc_correctionReg); + always @(*) begin + IBusCachedPlugin_fetchPc_pcRegPropagate = 1'b0; + if(IBusCachedPlugin_iBusRsp_stages_1_input_ready) begin + IBusCachedPlugin_fetchPc_pcRegPropagate = 1'b1; + end + end + + assign when_Fetcher_l131 = (IBusCachedPlugin_fetchPc_correction || IBusCachedPlugin_fetchPc_pcRegPropagate); + assign IBusCachedPlugin_fetchPc_output_fire_1 = (IBusCachedPlugin_fetchPc_output_valid && IBusCachedPlugin_fetchPc_output_ready); + assign when_Fetcher_l131_1 = ((! IBusCachedPlugin_fetchPc_output_valid) && IBusCachedPlugin_fetchPc_output_ready); + always @(*) begin + IBusCachedPlugin_fetchPc_pc = (IBusCachedPlugin_fetchPc_pcReg + _zz_IBusCachedPlugin_fetchPc_pc); + if(IBusCachedPlugin_fetchPc_redo_valid) begin + IBusCachedPlugin_fetchPc_pc = IBusCachedPlugin_fetchPc_redo_payload; + end + if(IBusCachedPlugin_jump_pcLoad_valid) begin + IBusCachedPlugin_fetchPc_pc = IBusCachedPlugin_jump_pcLoad_payload; + end + IBusCachedPlugin_fetchPc_pc[0] = 1'b0; + IBusCachedPlugin_fetchPc_pc[1] = 1'b0; + end + + always @(*) begin + IBusCachedPlugin_fetchPc_flushed = 1'b0; + if(IBusCachedPlugin_fetchPc_redo_valid) begin + IBusCachedPlugin_fetchPc_flushed = 1'b1; + end + if(IBusCachedPlugin_jump_pcLoad_valid) begin + IBusCachedPlugin_fetchPc_flushed = 1'b1; + end + end + + assign when_Fetcher_l158 = (IBusCachedPlugin_fetchPc_booted && ((IBusCachedPlugin_fetchPc_output_ready || IBusCachedPlugin_fetchPc_correction) || IBusCachedPlugin_fetchPc_pcRegPropagate)); + assign IBusCachedPlugin_fetchPc_output_valid = ((! IBusCachedPlugin_fetcherHalt) && IBusCachedPlugin_fetchPc_booted); + assign IBusCachedPlugin_fetchPc_output_payload = IBusCachedPlugin_fetchPc_pc; + always @(*) begin + IBusCachedPlugin_iBusRsp_redoFetch = 1'b0; + if(IBusCachedPlugin_rsp_redoFetch) begin + IBusCachedPlugin_iBusRsp_redoFetch = 1'b1; + end + end + + assign IBusCachedPlugin_iBusRsp_stages_0_input_valid = IBusCachedPlugin_fetchPc_output_valid; + assign IBusCachedPlugin_fetchPc_output_ready = IBusCachedPlugin_iBusRsp_stages_0_input_ready; + assign IBusCachedPlugin_iBusRsp_stages_0_input_payload = IBusCachedPlugin_fetchPc_output_payload; + always @(*) begin + IBusCachedPlugin_iBusRsp_stages_0_halt = 1'b0; + if(IBusCachedPlugin_cache_io_cpu_prefetch_haltIt) begin + IBusCachedPlugin_iBusRsp_stages_0_halt = 1'b1; + end + end + + assign _zz_IBusCachedPlugin_iBusRsp_stages_0_input_ready = (! IBusCachedPlugin_iBusRsp_stages_0_halt); + assign IBusCachedPlugin_iBusRsp_stages_0_input_ready = (IBusCachedPlugin_iBusRsp_stages_0_output_ready && _zz_IBusCachedPlugin_iBusRsp_stages_0_input_ready); + assign IBusCachedPlugin_iBusRsp_stages_0_output_valid = (IBusCachedPlugin_iBusRsp_stages_0_input_valid && _zz_IBusCachedPlugin_iBusRsp_stages_0_input_ready); + assign IBusCachedPlugin_iBusRsp_stages_0_output_payload = IBusCachedPlugin_iBusRsp_stages_0_input_payload; + always @(*) begin + IBusCachedPlugin_iBusRsp_stages_1_halt = 1'b0; + if(IBusCachedPlugin_mmuBus_busy) begin + IBusCachedPlugin_iBusRsp_stages_1_halt = 1'b1; + end + end + + assign _zz_IBusCachedPlugin_iBusRsp_stages_1_input_ready = (! IBusCachedPlugin_iBusRsp_stages_1_halt); + assign IBusCachedPlugin_iBusRsp_stages_1_input_ready = (IBusCachedPlugin_iBusRsp_stages_1_output_ready && _zz_IBusCachedPlugin_iBusRsp_stages_1_input_ready); + assign IBusCachedPlugin_iBusRsp_stages_1_output_valid = (IBusCachedPlugin_iBusRsp_stages_1_input_valid && _zz_IBusCachedPlugin_iBusRsp_stages_1_input_ready); + assign IBusCachedPlugin_iBusRsp_stages_1_output_payload = IBusCachedPlugin_iBusRsp_stages_1_input_payload; + always @(*) begin + IBusCachedPlugin_iBusRsp_stages_2_halt = 1'b0; + if(when_IBusCachedPlugin_l267) begin + IBusCachedPlugin_iBusRsp_stages_2_halt = 1'b1; + end + end + + assign _zz_IBusCachedPlugin_iBusRsp_stages_2_input_ready = (! IBusCachedPlugin_iBusRsp_stages_2_halt); + assign IBusCachedPlugin_iBusRsp_stages_2_input_ready = (IBusCachedPlugin_iBusRsp_stages_2_output_ready && _zz_IBusCachedPlugin_iBusRsp_stages_2_input_ready); + assign IBusCachedPlugin_iBusRsp_stages_2_output_valid = (IBusCachedPlugin_iBusRsp_stages_2_input_valid && _zz_IBusCachedPlugin_iBusRsp_stages_2_input_ready); + assign IBusCachedPlugin_iBusRsp_stages_2_output_payload = IBusCachedPlugin_iBusRsp_stages_2_input_payload; + assign IBusCachedPlugin_fetchPc_redo_valid = IBusCachedPlugin_iBusRsp_redoFetch; + assign IBusCachedPlugin_fetchPc_redo_payload = IBusCachedPlugin_iBusRsp_stages_2_input_payload; + assign IBusCachedPlugin_iBusRsp_flush = ((decode_arbitration_removeIt || (decode_arbitration_flushNext && (! decode_arbitration_isStuck))) || IBusCachedPlugin_iBusRsp_redoFetch); + assign IBusCachedPlugin_iBusRsp_stages_0_output_ready = _zz_IBusCachedPlugin_iBusRsp_stages_0_output_ready; + assign _zz_IBusCachedPlugin_iBusRsp_stages_0_output_ready = ((1'b0 && (! _zz_IBusCachedPlugin_iBusRsp_stages_0_output_ready_1)) || IBusCachedPlugin_iBusRsp_stages_1_input_ready); + assign _zz_IBusCachedPlugin_iBusRsp_stages_0_output_ready_1 = _zz_IBusCachedPlugin_iBusRsp_stages_0_output_ready_2; + assign IBusCachedPlugin_iBusRsp_stages_1_input_valid = _zz_IBusCachedPlugin_iBusRsp_stages_0_output_ready_1; + assign IBusCachedPlugin_iBusRsp_stages_1_input_payload = IBusCachedPlugin_fetchPc_pcReg; + assign IBusCachedPlugin_iBusRsp_stages_1_output_ready = ((1'b0 && (! IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_valid)) || IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_ready); + assign IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_valid = _zz_IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_valid; + assign IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_payload = _zz_IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_payload; + assign IBusCachedPlugin_iBusRsp_stages_2_input_valid = IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_valid; + assign IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_ready = IBusCachedPlugin_iBusRsp_stages_2_input_ready; + assign IBusCachedPlugin_iBusRsp_stages_2_input_payload = IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_payload; + always @(*) begin + IBusCachedPlugin_iBusRsp_readyForError = 1'b1; + if(when_Fetcher_l320) begin + IBusCachedPlugin_iBusRsp_readyForError = 1'b0; + end + end + + assign when_Fetcher_l240 = (IBusCachedPlugin_iBusRsp_stages_1_input_valid || IBusCachedPlugin_iBusRsp_stages_2_input_valid); + assign when_Fetcher_l320 = (! IBusCachedPlugin_pcValids_0); + assign when_Fetcher_l329 = (! (! IBusCachedPlugin_iBusRsp_stages_1_input_ready)); + assign when_Fetcher_l329_1 = (! (! IBusCachedPlugin_iBusRsp_stages_2_input_ready)); + assign when_Fetcher_l329_2 = (! execute_arbitration_isStuck); + assign when_Fetcher_l329_3 = (! memory_arbitration_isStuck); + assign when_Fetcher_l329_4 = (! writeBack_arbitration_isStuck); + assign IBusCachedPlugin_pcValids_0 = IBusCachedPlugin_injector_nextPcCalc_valids_1; + assign IBusCachedPlugin_pcValids_1 = IBusCachedPlugin_injector_nextPcCalc_valids_2; + assign IBusCachedPlugin_pcValids_2 = IBusCachedPlugin_injector_nextPcCalc_valids_3; + assign IBusCachedPlugin_pcValids_3 = IBusCachedPlugin_injector_nextPcCalc_valids_4; + assign IBusCachedPlugin_iBusRsp_output_ready = (! decode_arbitration_isStuck); + assign decode_arbitration_isValid = IBusCachedPlugin_iBusRsp_output_valid; + assign _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch = _zz__zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch[11]; + always @(*) begin + _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_1[18] = _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch; + _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_1[17] = _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch; + _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_1[16] = _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch; + _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_1[15] = _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch; + _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_1[14] = _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch; + _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_1[13] = _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch; + _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_1[12] = _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch; + _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_1[11] = _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch; + _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_1[10] = _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch; + _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_1[9] = _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch; + _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_1[8] = _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch; + _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_1[7] = _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch; + _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_1[6] = _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch; + _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_1[5] = _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch; + _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_1[4] = _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch; + _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_1[3] = _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch; + _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_1[2] = _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch; + _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_1[1] = _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch; + _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_1[0] = _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch; + end + + always @(*) begin + IBusCachedPlugin_decodePrediction_cmd_hadBranch = ((decode_BRANCH_CTRL == `BranchCtrlEnum_binary_sequential_JAL) || ((decode_BRANCH_CTRL == `BranchCtrlEnum_binary_sequential_B) && _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_2[31])); + if(_zz_6) begin + IBusCachedPlugin_decodePrediction_cmd_hadBranch = 1'b0; + end + end + + assign _zz_2 = _zz__zz_2[19]; + always @(*) begin + _zz_3[10] = _zz_2; + _zz_3[9] = _zz_2; + _zz_3[8] = _zz_2; + _zz_3[7] = _zz_2; + _zz_3[6] = _zz_2; + _zz_3[5] = _zz_2; + _zz_3[4] = _zz_2; + _zz_3[3] = _zz_2; + _zz_3[2] = _zz_2; + _zz_3[1] = _zz_2; + _zz_3[0] = _zz_2; + end + + assign _zz_4 = _zz__zz_4[11]; + always @(*) begin + _zz_5[18] = _zz_4; + _zz_5[17] = _zz_4; + _zz_5[16] = _zz_4; + _zz_5[15] = _zz_4; + _zz_5[14] = _zz_4; + _zz_5[13] = _zz_4; + _zz_5[12] = _zz_4; + _zz_5[11] = _zz_4; + _zz_5[10] = _zz_4; + _zz_5[9] = _zz_4; + _zz_5[8] = _zz_4; + _zz_5[7] = _zz_4; + _zz_5[6] = _zz_4; + _zz_5[5] = _zz_4; + _zz_5[4] = _zz_4; + _zz_5[3] = _zz_4; + _zz_5[2] = _zz_4; + _zz_5[1] = _zz_4; + _zz_5[0] = _zz_4; + end + + always @(*) begin + case(decode_BRANCH_CTRL) + `BranchCtrlEnum_binary_sequential_JAL : begin + _zz_6 = _zz__zz_6[1]; + end + default : begin + _zz_6 = _zz__zz_6_1[1]; + end + endcase + end + + assign IBusCachedPlugin_predictionJumpInterface_valid = (decode_arbitration_isValid && IBusCachedPlugin_decodePrediction_cmd_hadBranch); + assign _zz_IBusCachedPlugin_predictionJumpInterface_payload = _zz__zz_IBusCachedPlugin_predictionJumpInterface_payload[19]; + always @(*) begin + _zz_IBusCachedPlugin_predictionJumpInterface_payload_1[10] = _zz_IBusCachedPlugin_predictionJumpInterface_payload; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_1[9] = _zz_IBusCachedPlugin_predictionJumpInterface_payload; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_1[8] = _zz_IBusCachedPlugin_predictionJumpInterface_payload; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_1[7] = _zz_IBusCachedPlugin_predictionJumpInterface_payload; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_1[6] = _zz_IBusCachedPlugin_predictionJumpInterface_payload; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_1[5] = _zz_IBusCachedPlugin_predictionJumpInterface_payload; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_1[4] = _zz_IBusCachedPlugin_predictionJumpInterface_payload; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_1[3] = _zz_IBusCachedPlugin_predictionJumpInterface_payload; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_1[2] = _zz_IBusCachedPlugin_predictionJumpInterface_payload; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_1[1] = _zz_IBusCachedPlugin_predictionJumpInterface_payload; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_1[0] = _zz_IBusCachedPlugin_predictionJumpInterface_payload; + end + + assign _zz_IBusCachedPlugin_predictionJumpInterface_payload_2 = _zz__zz_IBusCachedPlugin_predictionJumpInterface_payload_2[11]; + always @(*) begin + _zz_IBusCachedPlugin_predictionJumpInterface_payload_3[18] = _zz_IBusCachedPlugin_predictionJumpInterface_payload_2; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_3[17] = _zz_IBusCachedPlugin_predictionJumpInterface_payload_2; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_3[16] = _zz_IBusCachedPlugin_predictionJumpInterface_payload_2; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_3[15] = _zz_IBusCachedPlugin_predictionJumpInterface_payload_2; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_3[14] = _zz_IBusCachedPlugin_predictionJumpInterface_payload_2; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_3[13] = _zz_IBusCachedPlugin_predictionJumpInterface_payload_2; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_3[12] = _zz_IBusCachedPlugin_predictionJumpInterface_payload_2; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_3[11] = _zz_IBusCachedPlugin_predictionJumpInterface_payload_2; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_3[10] = _zz_IBusCachedPlugin_predictionJumpInterface_payload_2; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_3[9] = _zz_IBusCachedPlugin_predictionJumpInterface_payload_2; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_3[8] = _zz_IBusCachedPlugin_predictionJumpInterface_payload_2; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_3[7] = _zz_IBusCachedPlugin_predictionJumpInterface_payload_2; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_3[6] = _zz_IBusCachedPlugin_predictionJumpInterface_payload_2; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_3[5] = _zz_IBusCachedPlugin_predictionJumpInterface_payload_2; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_3[4] = _zz_IBusCachedPlugin_predictionJumpInterface_payload_2; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_3[3] = _zz_IBusCachedPlugin_predictionJumpInterface_payload_2; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_3[2] = _zz_IBusCachedPlugin_predictionJumpInterface_payload_2; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_3[1] = _zz_IBusCachedPlugin_predictionJumpInterface_payload_2; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_3[0] = _zz_IBusCachedPlugin_predictionJumpInterface_payload_2; + end + + assign IBusCachedPlugin_predictionJumpInterface_payload = (decode_PC + ((decode_BRANCH_CTRL == `BranchCtrlEnum_binary_sequential_JAL) ? {{_zz_IBusCachedPlugin_predictionJumpInterface_payload_1,{{{_zz_IBusCachedPlugin_predictionJumpInterface_payload_4,decode_INSTRUCTION[19 : 12]},decode_INSTRUCTION[20]},decode_INSTRUCTION[30 : 21]}},1'b0} : {{_zz_IBusCachedPlugin_predictionJumpInterface_payload_3,{{{_zz_IBusCachedPlugin_predictionJumpInterface_payload_5,_zz_IBusCachedPlugin_predictionJumpInterface_payload_6},decode_INSTRUCTION[30 : 25]},decode_INSTRUCTION[11 : 8]}},1'b0})); + assign iBus_cmd_valid = IBusCachedPlugin_cache_io_mem_cmd_valid; + always @(*) begin + iBus_cmd_payload_address = IBusCachedPlugin_cache_io_mem_cmd_payload_address; + iBus_cmd_payload_address = IBusCachedPlugin_cache_io_mem_cmd_payload_address; + end + + assign iBus_cmd_payload_size = IBusCachedPlugin_cache_io_mem_cmd_payload_size; + assign IBusCachedPlugin_s0_tightlyCoupledHit = 1'b0; + assign IBusCachedPlugin_cache_io_cpu_prefetch_isValid = (IBusCachedPlugin_iBusRsp_stages_0_input_valid && (! IBusCachedPlugin_s0_tightlyCoupledHit)); + assign IBusCachedPlugin_cache_io_cpu_fetch_isValid = (IBusCachedPlugin_iBusRsp_stages_1_input_valid && (! IBusCachedPlugin_s1_tightlyCoupledHit)); + assign IBusCachedPlugin_cache_io_cpu_fetch_isStuck = (! IBusCachedPlugin_iBusRsp_stages_1_input_ready); + assign IBusCachedPlugin_mmuBus_cmd_0_isValid = IBusCachedPlugin_cache_io_cpu_fetch_isValid; + assign IBusCachedPlugin_mmuBus_cmd_0_isStuck = (! IBusCachedPlugin_iBusRsp_stages_1_input_ready); + assign IBusCachedPlugin_mmuBus_cmd_0_virtualAddress = IBusCachedPlugin_iBusRsp_stages_1_input_payload; + assign IBusCachedPlugin_mmuBus_cmd_0_bypassTranslation = 1'b0; + assign IBusCachedPlugin_mmuBus_end = (IBusCachedPlugin_iBusRsp_stages_1_input_ready || IBusCachedPlugin_externalFlush); + assign IBusCachedPlugin_cache_io_cpu_decode_isValid = (IBusCachedPlugin_iBusRsp_stages_2_input_valid && (! IBusCachedPlugin_s2_tightlyCoupledHit)); + assign IBusCachedPlugin_cache_io_cpu_decode_isStuck = (! IBusCachedPlugin_iBusRsp_stages_2_input_ready); + assign IBusCachedPlugin_cache_io_cpu_decode_isUser = (CsrPlugin_privilege == 2'b00); + assign IBusCachedPlugin_rsp_iBusRspOutputHalt = 1'b0; + assign IBusCachedPlugin_rsp_issueDetected = 1'b0; + always @(*) begin + IBusCachedPlugin_rsp_redoFetch = 1'b0; + if(when_IBusCachedPlugin_l239) begin + IBusCachedPlugin_rsp_redoFetch = 1'b1; + end + if(when_IBusCachedPlugin_l250) begin + IBusCachedPlugin_rsp_redoFetch = 1'b1; + end + end + + always @(*) begin + IBusCachedPlugin_cache_io_cpu_fill_valid = (IBusCachedPlugin_rsp_redoFetch && (! IBusCachedPlugin_cache_io_cpu_decode_mmuRefilling)); + if(when_IBusCachedPlugin_l250) begin + IBusCachedPlugin_cache_io_cpu_fill_valid = 1'b1; + end + end + + always @(*) begin + IBusCachedPlugin_decodeExceptionPort_valid = 1'b0; + if(when_IBusCachedPlugin_l244) begin + IBusCachedPlugin_decodeExceptionPort_valid = IBusCachedPlugin_iBusRsp_readyForError; + end + if(when_IBusCachedPlugin_l256) begin + IBusCachedPlugin_decodeExceptionPort_valid = IBusCachedPlugin_iBusRsp_readyForError; + end + end + + always @(*) begin + IBusCachedPlugin_decodeExceptionPort_payload_code = 4'bxxxx; + if(when_IBusCachedPlugin_l244) begin + IBusCachedPlugin_decodeExceptionPort_payload_code = 4'b1100; + end + if(when_IBusCachedPlugin_l256) begin + IBusCachedPlugin_decodeExceptionPort_payload_code = 4'b0001; + end + end + + assign IBusCachedPlugin_decodeExceptionPort_payload_badAddr = {IBusCachedPlugin_iBusRsp_stages_2_input_payload[31 : 2],2'b00}; + assign when_IBusCachedPlugin_l239 = ((IBusCachedPlugin_cache_io_cpu_decode_isValid && IBusCachedPlugin_cache_io_cpu_decode_mmuRefilling) && (! IBusCachedPlugin_rsp_issueDetected)); + assign when_IBusCachedPlugin_l244 = ((IBusCachedPlugin_cache_io_cpu_decode_isValid && IBusCachedPlugin_cache_io_cpu_decode_mmuException) && (! IBusCachedPlugin_rsp_issueDetected_1)); + assign when_IBusCachedPlugin_l250 = ((IBusCachedPlugin_cache_io_cpu_decode_isValid && IBusCachedPlugin_cache_io_cpu_decode_cacheMiss) && (! IBusCachedPlugin_rsp_issueDetected_2)); + assign when_IBusCachedPlugin_l256 = ((IBusCachedPlugin_cache_io_cpu_decode_isValid && IBusCachedPlugin_cache_io_cpu_decode_error) && (! IBusCachedPlugin_rsp_issueDetected_3)); + assign when_IBusCachedPlugin_l267 = (IBusCachedPlugin_rsp_issueDetected_4 || IBusCachedPlugin_rsp_iBusRspOutputHalt); + assign IBusCachedPlugin_iBusRsp_output_valid = IBusCachedPlugin_iBusRsp_stages_2_output_valid; + assign IBusCachedPlugin_iBusRsp_stages_2_output_ready = IBusCachedPlugin_iBusRsp_output_ready; + assign IBusCachedPlugin_iBusRsp_output_payload_rsp_inst = IBusCachedPlugin_cache_io_cpu_decode_data; + assign IBusCachedPlugin_iBusRsp_output_payload_pc = IBusCachedPlugin_iBusRsp_stages_2_output_payload; + assign IBusCachedPlugin_cache_io_flush = (decode_arbitration_isValid && decode_FLUSH_ALL); + assign dataCache_1_io_mem_cmd_ready = (! dataCache_1_io_mem_cmd_rValid); + assign dataCache_1_io_mem_cmd_s2mPipe_valid = (dataCache_1_io_mem_cmd_valid || dataCache_1_io_mem_cmd_rValid); + assign dataCache_1_io_mem_cmd_s2mPipe_payload_wr = (dataCache_1_io_mem_cmd_rValid ? dataCache_1_io_mem_cmd_rData_wr : dataCache_1_io_mem_cmd_payload_wr); + assign dataCache_1_io_mem_cmd_s2mPipe_payload_uncached = (dataCache_1_io_mem_cmd_rValid ? dataCache_1_io_mem_cmd_rData_uncached : dataCache_1_io_mem_cmd_payload_uncached); + assign dataCache_1_io_mem_cmd_s2mPipe_payload_address = (dataCache_1_io_mem_cmd_rValid ? dataCache_1_io_mem_cmd_rData_address : dataCache_1_io_mem_cmd_payload_address); + assign dataCache_1_io_mem_cmd_s2mPipe_payload_data = (dataCache_1_io_mem_cmd_rValid ? dataCache_1_io_mem_cmd_rData_data : dataCache_1_io_mem_cmd_payload_data); + assign dataCache_1_io_mem_cmd_s2mPipe_payload_mask = (dataCache_1_io_mem_cmd_rValid ? dataCache_1_io_mem_cmd_rData_mask : dataCache_1_io_mem_cmd_payload_mask); + assign dataCache_1_io_mem_cmd_s2mPipe_payload_size = (dataCache_1_io_mem_cmd_rValid ? dataCache_1_io_mem_cmd_rData_size : dataCache_1_io_mem_cmd_payload_size); + assign dataCache_1_io_mem_cmd_s2mPipe_payload_last = (dataCache_1_io_mem_cmd_rValid ? dataCache_1_io_mem_cmd_rData_last : dataCache_1_io_mem_cmd_payload_last); + always @(*) begin + dataCache_1_io_mem_cmd_s2mPipe_ready = dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_ready; + if(when_Stream_l342) begin + dataCache_1_io_mem_cmd_s2mPipe_ready = 1'b1; + end + end + + assign when_Stream_l342 = (! dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_valid); + assign dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_valid = dataCache_1_io_mem_cmd_s2mPipe_rValid; + assign dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_payload_wr = dataCache_1_io_mem_cmd_s2mPipe_rData_wr; + assign dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_payload_uncached = dataCache_1_io_mem_cmd_s2mPipe_rData_uncached; + assign dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_payload_address = dataCache_1_io_mem_cmd_s2mPipe_rData_address; + assign dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_payload_data = dataCache_1_io_mem_cmd_s2mPipe_rData_data; + assign dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_payload_mask = dataCache_1_io_mem_cmd_s2mPipe_rData_mask; + assign dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_payload_size = dataCache_1_io_mem_cmd_s2mPipe_rData_size; + assign dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_payload_last = dataCache_1_io_mem_cmd_s2mPipe_rData_last; + assign dBus_cmd_valid = dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_valid; + assign dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_ready = dBus_cmd_ready; + assign dBus_cmd_payload_wr = dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_payload_wr; + assign dBus_cmd_payload_uncached = dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_payload_uncached; + assign dBus_cmd_payload_address = dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_payload_address; + assign dBus_cmd_payload_data = dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_payload_data; + assign dBus_cmd_payload_mask = dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_payload_mask; + assign dBus_cmd_payload_size = dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_payload_size; + assign dBus_cmd_payload_last = dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_payload_last; + assign when_DBusCachedPlugin_l303 = ((DBusCachedPlugin_mmuBus_busy && decode_arbitration_isValid) && decode_MEMORY_ENABLE); + assign execute_DBusCachedPlugin_size = execute_INSTRUCTION[13 : 12]; + assign dataCache_1_io_cpu_execute_isValid = (execute_arbitration_isValid && execute_MEMORY_ENABLE); + assign dataCache_1_io_cpu_execute_address = execute_SRC_ADD; + always @(*) begin + case(execute_DBusCachedPlugin_size) + 2'b00 : begin + _zz_execute_MEMORY_STORE_DATA_RF = {{{execute_RS2[7 : 0],execute_RS2[7 : 0]},execute_RS2[7 : 0]},execute_RS2[7 : 0]}; + end + 2'b01 : begin + _zz_execute_MEMORY_STORE_DATA_RF = {execute_RS2[15 : 0],execute_RS2[15 : 0]}; + end + default : begin + _zz_execute_MEMORY_STORE_DATA_RF = execute_RS2[31 : 0]; + end + endcase + end + + assign dataCache_1_io_cpu_flush_valid = (execute_arbitration_isValid && execute_MEMORY_MANAGMENT); + assign dataCache_1_io_cpu_flush_isStall = (dataCache_1_io_cpu_flush_valid && (! dataCache_1_io_cpu_flush_ready)); + assign when_DBusCachedPlugin_l343 = (dataCache_1_io_cpu_flush_isStall || dataCache_1_io_cpu_execute_haltIt); + assign when_DBusCachedPlugin_l359 = (dataCache_1_io_cpu_execute_refilling && execute_arbitration_isValid); + assign dataCache_1_io_cpu_memory_isValid = (memory_arbitration_isValid && memory_MEMORY_ENABLE); + assign dataCache_1_io_cpu_memory_address = memory_REGFILE_WRITE_DATA; + assign DBusCachedPlugin_mmuBus_cmd_0_isValid = dataCache_1_io_cpu_memory_isValid; + assign DBusCachedPlugin_mmuBus_cmd_0_isStuck = memory_arbitration_isStuck; + assign DBusCachedPlugin_mmuBus_cmd_0_virtualAddress = dataCache_1_io_cpu_memory_address; + assign DBusCachedPlugin_mmuBus_cmd_0_bypassTranslation = 1'b0; + assign DBusCachedPlugin_mmuBus_end = ((! memory_arbitration_isStuck) || memory_arbitration_removeIt); + always @(*) begin + dataCache_1_io_cpu_memory_mmuRsp_isIoAccess = DBusCachedPlugin_mmuBus_rsp_isIoAccess; + if(when_DBusCachedPlugin_l386) begin + dataCache_1_io_cpu_memory_mmuRsp_isIoAccess = 1'b1; + end + end + + assign when_DBusCachedPlugin_l386 = (1'b0 && (! dataCache_1_io_cpu_memory_isWrite)); + always @(*) begin + dataCache_1_io_cpu_writeBack_isValid = (writeBack_arbitration_isValid && writeBack_MEMORY_ENABLE); + if(writeBack_arbitration_haltByOther) begin + dataCache_1_io_cpu_writeBack_isValid = 1'b0; + end + end + + assign dataCache_1_io_cpu_writeBack_isUser = (CsrPlugin_privilege == 2'b00); + assign dataCache_1_io_cpu_writeBack_address = writeBack_REGFILE_WRITE_DATA; + assign dataCache_1_io_cpu_writeBack_storeData[31 : 0] = writeBack_MEMORY_STORE_DATA_RF; + always @(*) begin + DBusCachedPlugin_redoBranch_valid = 1'b0; + if(when_DBusCachedPlugin_l438) begin + if(dataCache_1_io_cpu_redo) begin + DBusCachedPlugin_redoBranch_valid = 1'b1; + end + end + end + + assign DBusCachedPlugin_redoBranch_payload = writeBack_PC; + always @(*) begin + DBusCachedPlugin_exceptionBus_valid = 1'b0; + if(when_DBusCachedPlugin_l438) begin + if(dataCache_1_io_cpu_writeBack_accessError) begin + DBusCachedPlugin_exceptionBus_valid = 1'b1; + end + if(dataCache_1_io_cpu_writeBack_mmuException) begin + DBusCachedPlugin_exceptionBus_valid = 1'b1; + end + if(dataCache_1_io_cpu_writeBack_unalignedAccess) begin + DBusCachedPlugin_exceptionBus_valid = 1'b1; + end + if(dataCache_1_io_cpu_redo) begin + DBusCachedPlugin_exceptionBus_valid = 1'b0; + end + end + end + + assign DBusCachedPlugin_exceptionBus_payload_badAddr = writeBack_REGFILE_WRITE_DATA; + always @(*) begin + DBusCachedPlugin_exceptionBus_payload_code = 4'bxxxx; + if(when_DBusCachedPlugin_l438) begin + if(dataCache_1_io_cpu_writeBack_accessError) begin + DBusCachedPlugin_exceptionBus_payload_code = {1'd0, _zz_DBusCachedPlugin_exceptionBus_payload_code}; + end + if(dataCache_1_io_cpu_writeBack_mmuException) begin + DBusCachedPlugin_exceptionBus_payload_code = (writeBack_MEMORY_WR ? 4'b1111 : 4'b1101); + end + if(dataCache_1_io_cpu_writeBack_unalignedAccess) begin + DBusCachedPlugin_exceptionBus_payload_code = {1'd0, _zz_DBusCachedPlugin_exceptionBus_payload_code_1}; + end + end + end + + assign when_DBusCachedPlugin_l438 = (writeBack_arbitration_isValid && writeBack_MEMORY_ENABLE); + assign when_DBusCachedPlugin_l458 = (dataCache_1_io_cpu_writeBack_isValid && dataCache_1_io_cpu_writeBack_haltIt); + assign writeBack_DBusCachedPlugin_rspSplits_0 = dataCache_1_io_cpu_writeBack_data[7 : 0]; + assign writeBack_DBusCachedPlugin_rspSplits_1 = dataCache_1_io_cpu_writeBack_data[15 : 8]; + assign writeBack_DBusCachedPlugin_rspSplits_2 = dataCache_1_io_cpu_writeBack_data[23 : 16]; + assign writeBack_DBusCachedPlugin_rspSplits_3 = dataCache_1_io_cpu_writeBack_data[31 : 24]; + always @(*) begin + writeBack_DBusCachedPlugin_rspShifted[7 : 0] = _zz_writeBack_DBusCachedPlugin_rspShifted; + writeBack_DBusCachedPlugin_rspShifted[15 : 8] = _zz_writeBack_DBusCachedPlugin_rspShifted_2; + writeBack_DBusCachedPlugin_rspShifted[23 : 16] = writeBack_DBusCachedPlugin_rspSplits_2; + writeBack_DBusCachedPlugin_rspShifted[31 : 24] = writeBack_DBusCachedPlugin_rspSplits_3; + end + + assign writeBack_DBusCachedPlugin_rspRf = writeBack_DBusCachedPlugin_rspShifted[31 : 0]; + assign switch_Misc_l200 = writeBack_INSTRUCTION[13 : 12]; + assign _zz_writeBack_DBusCachedPlugin_rspFormated = (writeBack_DBusCachedPlugin_rspRf[7] && (! writeBack_INSTRUCTION[14])); + always @(*) begin + _zz_writeBack_DBusCachedPlugin_rspFormated_1[31] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[30] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[29] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[28] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[27] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[26] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[25] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[24] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[23] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[22] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[21] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[20] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[19] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[18] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[17] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[16] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[15] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[14] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[13] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[12] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[11] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[10] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[9] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[8] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[7 : 0] = writeBack_DBusCachedPlugin_rspRf[7 : 0]; + end + + assign _zz_writeBack_DBusCachedPlugin_rspFormated_2 = (writeBack_DBusCachedPlugin_rspRf[15] && (! writeBack_INSTRUCTION[14])); + always @(*) begin + _zz_writeBack_DBusCachedPlugin_rspFormated_3[31] = _zz_writeBack_DBusCachedPlugin_rspFormated_2; + _zz_writeBack_DBusCachedPlugin_rspFormated_3[30] = _zz_writeBack_DBusCachedPlugin_rspFormated_2; + _zz_writeBack_DBusCachedPlugin_rspFormated_3[29] = _zz_writeBack_DBusCachedPlugin_rspFormated_2; + _zz_writeBack_DBusCachedPlugin_rspFormated_3[28] = _zz_writeBack_DBusCachedPlugin_rspFormated_2; + _zz_writeBack_DBusCachedPlugin_rspFormated_3[27] = _zz_writeBack_DBusCachedPlugin_rspFormated_2; + _zz_writeBack_DBusCachedPlugin_rspFormated_3[26] = _zz_writeBack_DBusCachedPlugin_rspFormated_2; + _zz_writeBack_DBusCachedPlugin_rspFormated_3[25] = _zz_writeBack_DBusCachedPlugin_rspFormated_2; + _zz_writeBack_DBusCachedPlugin_rspFormated_3[24] = _zz_writeBack_DBusCachedPlugin_rspFormated_2; + _zz_writeBack_DBusCachedPlugin_rspFormated_3[23] = _zz_writeBack_DBusCachedPlugin_rspFormated_2; + _zz_writeBack_DBusCachedPlugin_rspFormated_3[22] = _zz_writeBack_DBusCachedPlugin_rspFormated_2; + _zz_writeBack_DBusCachedPlugin_rspFormated_3[21] = _zz_writeBack_DBusCachedPlugin_rspFormated_2; + _zz_writeBack_DBusCachedPlugin_rspFormated_3[20] = _zz_writeBack_DBusCachedPlugin_rspFormated_2; + _zz_writeBack_DBusCachedPlugin_rspFormated_3[19] = _zz_writeBack_DBusCachedPlugin_rspFormated_2; + _zz_writeBack_DBusCachedPlugin_rspFormated_3[18] = _zz_writeBack_DBusCachedPlugin_rspFormated_2; + _zz_writeBack_DBusCachedPlugin_rspFormated_3[17] = _zz_writeBack_DBusCachedPlugin_rspFormated_2; + _zz_writeBack_DBusCachedPlugin_rspFormated_3[16] = _zz_writeBack_DBusCachedPlugin_rspFormated_2; + _zz_writeBack_DBusCachedPlugin_rspFormated_3[15 : 0] = writeBack_DBusCachedPlugin_rspRf[15 : 0]; + end + + always @(*) begin + case(switch_Misc_l200) + 2'b00 : begin + writeBack_DBusCachedPlugin_rspFormated = _zz_writeBack_DBusCachedPlugin_rspFormated_1; + end + 2'b01 : begin + writeBack_DBusCachedPlugin_rspFormated = _zz_writeBack_DBusCachedPlugin_rspFormated_3; + end + default : begin + writeBack_DBusCachedPlugin_rspFormated = writeBack_DBusCachedPlugin_rspRf; + end + endcase + end + + assign when_DBusCachedPlugin_l484 = (writeBack_arbitration_isValid && writeBack_MEMORY_ENABLE); + assign IBusCachedPlugin_mmuBus_rsp_physicalAddress = IBusCachedPlugin_mmuBus_cmd_0_virtualAddress; + assign IBusCachedPlugin_mmuBus_rsp_allowRead = 1'b1; + assign IBusCachedPlugin_mmuBus_rsp_allowWrite = 1'b1; + assign IBusCachedPlugin_mmuBus_rsp_allowExecute = 1'b1; + assign IBusCachedPlugin_mmuBus_rsp_isIoAccess = IBusCachedPlugin_mmuBus_rsp_physicalAddress[31]; + assign IBusCachedPlugin_mmuBus_rsp_isPaging = 1'b0; + assign IBusCachedPlugin_mmuBus_rsp_exception = 1'b0; + assign IBusCachedPlugin_mmuBus_rsp_refilling = 1'b0; + assign IBusCachedPlugin_mmuBus_busy = 1'b0; + assign DBusCachedPlugin_mmuBus_rsp_physicalAddress = DBusCachedPlugin_mmuBus_cmd_0_virtualAddress; + assign DBusCachedPlugin_mmuBus_rsp_allowRead = 1'b1; + assign DBusCachedPlugin_mmuBus_rsp_allowWrite = 1'b1; + assign DBusCachedPlugin_mmuBus_rsp_allowExecute = 1'b1; + assign DBusCachedPlugin_mmuBus_rsp_isIoAccess = DBusCachedPlugin_mmuBus_rsp_physicalAddress[31]; + assign DBusCachedPlugin_mmuBus_rsp_isPaging = 1'b0; + assign DBusCachedPlugin_mmuBus_rsp_exception = 1'b0; + assign DBusCachedPlugin_mmuBus_rsp_refilling = 1'b0; + assign DBusCachedPlugin_mmuBus_busy = 1'b0; + assign _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_3 = ((decode_INSTRUCTION & 32'h00004050) == 32'h00004050); + assign _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_4 = ((decode_INSTRUCTION & 32'h00000004) == 32'h00000004); + assign _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_5 = ((decode_INSTRUCTION & 32'h00000048) == 32'h00000048); + assign _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_6 = ((decode_INSTRUCTION & 32'h0000000c) == 32'h00000008); + assign _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_7 = ((decode_INSTRUCTION & 32'h00001000) == 32'h0); + assign _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2 = {1'b0,{(_zz_decode_CfuPlugin_CFU_INPUT_2_KIND_6 != 1'b0),{(_zz_decode_CfuPlugin_CFU_INPUT_2_KIND_7 != 1'b0),{(_zz_decode_CfuPlugin_CFU_INPUT_2_KIND_7 != 1'b0),{(_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2 != _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_1),{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_2,{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_4,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_7}}}}}}}; + assign _zz_decode_SRC1_CTRL_2 = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[2 : 1]; + assign _zz_decode_SRC1_CTRL_1 = _zz_decode_SRC1_CTRL_2; + assign _zz_decode_ALU_CTRL_2 = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[7 : 6]; + assign _zz_decode_ALU_CTRL_1 = _zz_decode_ALU_CTRL_2; + assign _zz_decode_SRC2_CTRL_2 = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[9 : 8]; + assign _zz_decode_SRC2_CTRL_1 = _zz_decode_SRC2_CTRL_2; + assign _zz_decode_ALU_BITWISE_CTRL_2 = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[19 : 18]; + assign _zz_decode_ALU_BITWISE_CTRL_1 = _zz_decode_ALU_BITWISE_CTRL_2; + assign _zz_decode_SHIFT_CTRL_2 = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[22 : 21]; + assign _zz_decode_SHIFT_CTRL_1 = _zz_decode_SHIFT_CTRL_2; + assign _zz_decode_BRANCH_CTRL_2 = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[24 : 23]; + assign _zz_decode_BRANCH_CTRL = _zz_decode_BRANCH_CTRL_2; + assign _zz_decode_ENV_CTRL_2 = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[27 : 26]; + assign _zz_decode_ENV_CTRL_1 = _zz_decode_ENV_CTRL_2; + assign _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_8 = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[33 : 33]; + assign _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_1 = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_8; + assign decodeExceptionPort_valid = (decode_arbitration_isValid && (! decode_LEGAL_INSTRUCTION)); + assign decodeExceptionPort_payload_code = 4'b0010; + assign decodeExceptionPort_payload_badAddr = decode_INSTRUCTION; + assign when_RegFilePlugin_l63 = (decode_INSTRUCTION[11 : 7] == 5'h0); + assign decode_RegFilePlugin_regFileReadAddress1 = decode_INSTRUCTION_ANTICIPATED[19 : 15]; + assign decode_RegFilePlugin_regFileReadAddress2 = decode_INSTRUCTION_ANTICIPATED[24 : 20]; + assign decode_RegFilePlugin_rs1Data = _zz_RegFilePlugin_regFile_port0; + assign decode_RegFilePlugin_rs2Data = _zz_RegFilePlugin_regFile_port1; + always @(*) begin + lastStageRegFileWrite_valid = (_zz_lastStageRegFileWrite_valid && writeBack_arbitration_isFiring); + if(_zz_7) begin + lastStageRegFileWrite_valid = 1'b1; + end + end + + always @(*) begin + lastStageRegFileWrite_payload_address = _zz_lastStageRegFileWrite_payload_address[11 : 7]; + if(_zz_7) begin + lastStageRegFileWrite_payload_address = 5'h0; + end + end + + always @(*) begin + lastStageRegFileWrite_payload_data = _zz_decode_RS2_2; + if(_zz_7) begin + lastStageRegFileWrite_payload_data = 32'h0; + end + end + + always @(*) begin + case(execute_ALU_BITWISE_CTRL) + `AluBitwiseCtrlEnum_binary_sequential_AND_1 : begin + execute_IntAluPlugin_bitwise = (execute_SRC1 & execute_SRC2); + end + `AluBitwiseCtrlEnum_binary_sequential_OR_1 : begin + execute_IntAluPlugin_bitwise = (execute_SRC1 | execute_SRC2); + end + default : begin + execute_IntAluPlugin_bitwise = (execute_SRC1 ^ execute_SRC2); + end + endcase + end + + always @(*) begin + case(execute_ALU_CTRL) + `AluCtrlEnum_binary_sequential_BITWISE : begin + _zz_execute_REGFILE_WRITE_DATA = execute_IntAluPlugin_bitwise; + end + `AluCtrlEnum_binary_sequential_SLT_SLTU : begin + _zz_execute_REGFILE_WRITE_DATA = {31'd0, _zz__zz_execute_REGFILE_WRITE_DATA}; + end + default : begin + _zz_execute_REGFILE_WRITE_DATA = execute_SRC_ADD_SUB; + end + endcase + end + + always @(*) begin + case(execute_SRC1_CTRL) + `Src1CtrlEnum_binary_sequential_RS : begin + _zz_execute_SRC1 = execute_RS1; + end + `Src1CtrlEnum_binary_sequential_PC_INCREMENT : begin + _zz_execute_SRC1 = {29'd0, _zz__zz_execute_SRC1}; + end + `Src1CtrlEnum_binary_sequential_IMU : begin + _zz_execute_SRC1 = {execute_INSTRUCTION[31 : 12],12'h0}; + end + default : begin + _zz_execute_SRC1 = {27'd0, _zz__zz_execute_SRC1_1}; + end + endcase + end + + assign _zz_execute_SRC2_1 = execute_INSTRUCTION[31]; + always @(*) begin + _zz_execute_SRC2_2[19] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[18] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[17] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[16] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[15] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[14] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[13] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[12] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[11] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[10] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[9] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[8] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[7] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[6] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[5] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[4] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[3] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[2] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[1] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[0] = _zz_execute_SRC2_1; + end + + assign _zz_execute_SRC2_3 = _zz__zz_execute_SRC2_3[11]; + always @(*) begin + _zz_execute_SRC2_4[19] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[18] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[17] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[16] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[15] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[14] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[13] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[12] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[11] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[10] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[9] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[8] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[7] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[6] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[5] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[4] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[3] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[2] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[1] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[0] = _zz_execute_SRC2_3; + end + + always @(*) begin + case(execute_SRC2_CTRL) + `Src2CtrlEnum_binary_sequential_RS : begin + _zz_execute_SRC2_5 = execute_RS2; + end + `Src2CtrlEnum_binary_sequential_IMI : begin + _zz_execute_SRC2_5 = {_zz_execute_SRC2_2,execute_INSTRUCTION[31 : 20]}; + end + `Src2CtrlEnum_binary_sequential_IMS : begin + _zz_execute_SRC2_5 = {_zz_execute_SRC2_4,{execute_INSTRUCTION[31 : 25],execute_INSTRUCTION[11 : 7]}}; + end + default : begin + _zz_execute_SRC2_5 = _zz_execute_SRC2; + end + endcase + end + + always @(*) begin + execute_SrcPlugin_addSub = _zz_execute_SrcPlugin_addSub; + if(execute_SRC2_FORCE_ZERO) begin + execute_SrcPlugin_addSub = execute_SRC1; + end + end + + assign execute_SrcPlugin_less = ((execute_SRC1[31] == execute_SRC2[31]) ? execute_SrcPlugin_addSub[31] : (execute_SRC_LESS_UNSIGNED ? execute_SRC2[31] : execute_SRC1[31])); + assign execute_FullBarrelShifterPlugin_amplitude = execute_SRC2[4 : 0]; + always @(*) begin + _zz_execute_FullBarrelShifterPlugin_reversed[0] = execute_SRC1[31]; + _zz_execute_FullBarrelShifterPlugin_reversed[1] = execute_SRC1[30]; + _zz_execute_FullBarrelShifterPlugin_reversed[2] = execute_SRC1[29]; + _zz_execute_FullBarrelShifterPlugin_reversed[3] = execute_SRC1[28]; + _zz_execute_FullBarrelShifterPlugin_reversed[4] = execute_SRC1[27]; + _zz_execute_FullBarrelShifterPlugin_reversed[5] = execute_SRC1[26]; + _zz_execute_FullBarrelShifterPlugin_reversed[6] = execute_SRC1[25]; + _zz_execute_FullBarrelShifterPlugin_reversed[7] = execute_SRC1[24]; + _zz_execute_FullBarrelShifterPlugin_reversed[8] = execute_SRC1[23]; + _zz_execute_FullBarrelShifterPlugin_reversed[9] = execute_SRC1[22]; + _zz_execute_FullBarrelShifterPlugin_reversed[10] = execute_SRC1[21]; + _zz_execute_FullBarrelShifterPlugin_reversed[11] = execute_SRC1[20]; + _zz_execute_FullBarrelShifterPlugin_reversed[12] = execute_SRC1[19]; + _zz_execute_FullBarrelShifterPlugin_reversed[13] = execute_SRC1[18]; + _zz_execute_FullBarrelShifterPlugin_reversed[14] = execute_SRC1[17]; + _zz_execute_FullBarrelShifterPlugin_reversed[15] = execute_SRC1[16]; + _zz_execute_FullBarrelShifterPlugin_reversed[16] = execute_SRC1[15]; + _zz_execute_FullBarrelShifterPlugin_reversed[17] = execute_SRC1[14]; + _zz_execute_FullBarrelShifterPlugin_reversed[18] = execute_SRC1[13]; + _zz_execute_FullBarrelShifterPlugin_reversed[19] = execute_SRC1[12]; + _zz_execute_FullBarrelShifterPlugin_reversed[20] = execute_SRC1[11]; + _zz_execute_FullBarrelShifterPlugin_reversed[21] = execute_SRC1[10]; + _zz_execute_FullBarrelShifterPlugin_reversed[22] = execute_SRC1[9]; + _zz_execute_FullBarrelShifterPlugin_reversed[23] = execute_SRC1[8]; + _zz_execute_FullBarrelShifterPlugin_reversed[24] = execute_SRC1[7]; + _zz_execute_FullBarrelShifterPlugin_reversed[25] = execute_SRC1[6]; + _zz_execute_FullBarrelShifterPlugin_reversed[26] = execute_SRC1[5]; + _zz_execute_FullBarrelShifterPlugin_reversed[27] = execute_SRC1[4]; + _zz_execute_FullBarrelShifterPlugin_reversed[28] = execute_SRC1[3]; + _zz_execute_FullBarrelShifterPlugin_reversed[29] = execute_SRC1[2]; + _zz_execute_FullBarrelShifterPlugin_reversed[30] = execute_SRC1[1]; + _zz_execute_FullBarrelShifterPlugin_reversed[31] = execute_SRC1[0]; + end + + assign execute_FullBarrelShifterPlugin_reversed = ((execute_SHIFT_CTRL == `ShiftCtrlEnum_binary_sequential_SLL_1) ? _zz_execute_FullBarrelShifterPlugin_reversed : execute_SRC1); + always @(*) begin + _zz_decode_RS2_3[0] = memory_SHIFT_RIGHT[31]; + _zz_decode_RS2_3[1] = memory_SHIFT_RIGHT[30]; + _zz_decode_RS2_3[2] = memory_SHIFT_RIGHT[29]; + _zz_decode_RS2_3[3] = memory_SHIFT_RIGHT[28]; + _zz_decode_RS2_3[4] = memory_SHIFT_RIGHT[27]; + _zz_decode_RS2_3[5] = memory_SHIFT_RIGHT[26]; + _zz_decode_RS2_3[6] = memory_SHIFT_RIGHT[25]; + _zz_decode_RS2_3[7] = memory_SHIFT_RIGHT[24]; + _zz_decode_RS2_3[8] = memory_SHIFT_RIGHT[23]; + _zz_decode_RS2_3[9] = memory_SHIFT_RIGHT[22]; + _zz_decode_RS2_3[10] = memory_SHIFT_RIGHT[21]; + _zz_decode_RS2_3[11] = memory_SHIFT_RIGHT[20]; + _zz_decode_RS2_3[12] = memory_SHIFT_RIGHT[19]; + _zz_decode_RS2_3[13] = memory_SHIFT_RIGHT[18]; + _zz_decode_RS2_3[14] = memory_SHIFT_RIGHT[17]; + _zz_decode_RS2_3[15] = memory_SHIFT_RIGHT[16]; + _zz_decode_RS2_3[16] = memory_SHIFT_RIGHT[15]; + _zz_decode_RS2_3[17] = memory_SHIFT_RIGHT[14]; + _zz_decode_RS2_3[18] = memory_SHIFT_RIGHT[13]; + _zz_decode_RS2_3[19] = memory_SHIFT_RIGHT[12]; + _zz_decode_RS2_3[20] = memory_SHIFT_RIGHT[11]; + _zz_decode_RS2_3[21] = memory_SHIFT_RIGHT[10]; + _zz_decode_RS2_3[22] = memory_SHIFT_RIGHT[9]; + _zz_decode_RS2_3[23] = memory_SHIFT_RIGHT[8]; + _zz_decode_RS2_3[24] = memory_SHIFT_RIGHT[7]; + _zz_decode_RS2_3[25] = memory_SHIFT_RIGHT[6]; + _zz_decode_RS2_3[26] = memory_SHIFT_RIGHT[5]; + _zz_decode_RS2_3[27] = memory_SHIFT_RIGHT[4]; + _zz_decode_RS2_3[28] = memory_SHIFT_RIGHT[3]; + _zz_decode_RS2_3[29] = memory_SHIFT_RIGHT[2]; + _zz_decode_RS2_3[30] = memory_SHIFT_RIGHT[1]; + _zz_decode_RS2_3[31] = memory_SHIFT_RIGHT[0]; + end + + always @(*) begin + HazardSimplePlugin_src0Hazard = 1'b0; + if(when_HazardSimplePlugin_l57) begin + if(when_HazardSimplePlugin_l58) begin + if(when_HazardSimplePlugin_l48) begin + HazardSimplePlugin_src0Hazard = 1'b1; + end + end + end + if(when_HazardSimplePlugin_l57_1) begin + if(when_HazardSimplePlugin_l58_1) begin + if(when_HazardSimplePlugin_l48_1) begin + HazardSimplePlugin_src0Hazard = 1'b1; + end + end + end + if(when_HazardSimplePlugin_l57_2) begin + if(when_HazardSimplePlugin_l58_2) begin + if(when_HazardSimplePlugin_l48_2) begin + HazardSimplePlugin_src0Hazard = 1'b1; + end + end + end + if(when_HazardSimplePlugin_l105) begin + HazardSimplePlugin_src0Hazard = 1'b0; + end + end + + always @(*) begin + HazardSimplePlugin_src1Hazard = 1'b0; + if(when_HazardSimplePlugin_l57) begin + if(when_HazardSimplePlugin_l58) begin + if(when_HazardSimplePlugin_l51) begin + HazardSimplePlugin_src1Hazard = 1'b1; + end + end + end + if(when_HazardSimplePlugin_l57_1) begin + if(when_HazardSimplePlugin_l58_1) begin + if(when_HazardSimplePlugin_l51_1) begin + HazardSimplePlugin_src1Hazard = 1'b1; + end + end + end + if(when_HazardSimplePlugin_l57_2) begin + if(when_HazardSimplePlugin_l58_2) begin + if(when_HazardSimplePlugin_l51_2) begin + HazardSimplePlugin_src1Hazard = 1'b1; + end + end + end + if(when_HazardSimplePlugin_l108) begin + HazardSimplePlugin_src1Hazard = 1'b0; + end + end + + assign HazardSimplePlugin_writeBackWrites_valid = (_zz_lastStageRegFileWrite_valid && writeBack_arbitration_isFiring); + assign HazardSimplePlugin_writeBackWrites_payload_address = _zz_lastStageRegFileWrite_payload_address[11 : 7]; + assign HazardSimplePlugin_writeBackWrites_payload_data = _zz_decode_RS2_2; + assign HazardSimplePlugin_addr0Match = (HazardSimplePlugin_writeBackBuffer_payload_address == decode_INSTRUCTION[19 : 15]); + assign HazardSimplePlugin_addr1Match = (HazardSimplePlugin_writeBackBuffer_payload_address == decode_INSTRUCTION[24 : 20]); + assign when_HazardSimplePlugin_l47 = 1'b1; + assign when_HazardSimplePlugin_l48 = (writeBack_INSTRUCTION[11 : 7] == decode_INSTRUCTION[19 : 15]); + assign when_HazardSimplePlugin_l51 = (writeBack_INSTRUCTION[11 : 7] == decode_INSTRUCTION[24 : 20]); + assign when_HazardSimplePlugin_l45 = (writeBack_arbitration_isValid && writeBack_REGFILE_WRITE_VALID); + assign when_HazardSimplePlugin_l57 = (writeBack_arbitration_isValid && writeBack_REGFILE_WRITE_VALID); + assign when_HazardSimplePlugin_l58 = (1'b0 || (! when_HazardSimplePlugin_l47)); + assign when_HazardSimplePlugin_l48_1 = (memory_INSTRUCTION[11 : 7] == decode_INSTRUCTION[19 : 15]); + assign when_HazardSimplePlugin_l51_1 = (memory_INSTRUCTION[11 : 7] == decode_INSTRUCTION[24 : 20]); + assign when_HazardSimplePlugin_l45_1 = (memory_arbitration_isValid && memory_REGFILE_WRITE_VALID); + assign when_HazardSimplePlugin_l57_1 = (memory_arbitration_isValid && memory_REGFILE_WRITE_VALID); + assign when_HazardSimplePlugin_l58_1 = (1'b0 || (! memory_BYPASSABLE_MEMORY_STAGE)); + assign when_HazardSimplePlugin_l48_2 = (execute_INSTRUCTION[11 : 7] == decode_INSTRUCTION[19 : 15]); + assign when_HazardSimplePlugin_l51_2 = (execute_INSTRUCTION[11 : 7] == decode_INSTRUCTION[24 : 20]); + assign when_HazardSimplePlugin_l45_2 = (execute_arbitration_isValid && execute_REGFILE_WRITE_VALID); + assign when_HazardSimplePlugin_l57_2 = (execute_arbitration_isValid && execute_REGFILE_WRITE_VALID); + assign when_HazardSimplePlugin_l58_2 = (1'b0 || (! execute_BYPASSABLE_EXECUTE_STAGE)); + assign when_HazardSimplePlugin_l105 = (! decode_RS1_USE); + assign when_HazardSimplePlugin_l108 = (! decode_RS2_USE); + assign when_HazardSimplePlugin_l113 = (decode_arbitration_isValid && (HazardSimplePlugin_src0Hazard || HazardSimplePlugin_src1Hazard)); + assign execute_BranchPlugin_eq = (execute_SRC1 == execute_SRC2); + assign switch_Misc_l200_1 = execute_INSTRUCTION[14 : 12]; + always @(*) begin + casez(switch_Misc_l200_1) + 3'b000 : begin + _zz_execute_BRANCH_COND_RESULT = execute_BranchPlugin_eq; + end + 3'b001 : begin + _zz_execute_BRANCH_COND_RESULT = (! execute_BranchPlugin_eq); + end + 3'b1?1 : begin + _zz_execute_BRANCH_COND_RESULT = (! execute_SRC_LESS); + end + default : begin + _zz_execute_BRANCH_COND_RESULT = execute_SRC_LESS; + end + endcase + end + + always @(*) begin + case(execute_BRANCH_CTRL) + `BranchCtrlEnum_binary_sequential_INC : begin + _zz_execute_BRANCH_COND_RESULT_1 = 1'b0; + end + `BranchCtrlEnum_binary_sequential_JAL : begin + _zz_execute_BRANCH_COND_RESULT_1 = 1'b1; + end + `BranchCtrlEnum_binary_sequential_JALR : begin + _zz_execute_BRANCH_COND_RESULT_1 = 1'b1; + end + default : begin + _zz_execute_BRANCH_COND_RESULT_1 = _zz_execute_BRANCH_COND_RESULT; + end + endcase + end + + assign _zz_execute_BranchPlugin_missAlignedTarget = execute_INSTRUCTION[31]; + always @(*) begin + _zz_execute_BranchPlugin_missAlignedTarget_1[19] = _zz_execute_BranchPlugin_missAlignedTarget; + _zz_execute_BranchPlugin_missAlignedTarget_1[18] = _zz_execute_BranchPlugin_missAlignedTarget; + _zz_execute_BranchPlugin_missAlignedTarget_1[17] = _zz_execute_BranchPlugin_missAlignedTarget; + _zz_execute_BranchPlugin_missAlignedTarget_1[16] = _zz_execute_BranchPlugin_missAlignedTarget; + _zz_execute_BranchPlugin_missAlignedTarget_1[15] = _zz_execute_BranchPlugin_missAlignedTarget; + _zz_execute_BranchPlugin_missAlignedTarget_1[14] = _zz_execute_BranchPlugin_missAlignedTarget; + _zz_execute_BranchPlugin_missAlignedTarget_1[13] = _zz_execute_BranchPlugin_missAlignedTarget; + _zz_execute_BranchPlugin_missAlignedTarget_1[12] = _zz_execute_BranchPlugin_missAlignedTarget; + _zz_execute_BranchPlugin_missAlignedTarget_1[11] = _zz_execute_BranchPlugin_missAlignedTarget; + _zz_execute_BranchPlugin_missAlignedTarget_1[10] = _zz_execute_BranchPlugin_missAlignedTarget; + _zz_execute_BranchPlugin_missAlignedTarget_1[9] = _zz_execute_BranchPlugin_missAlignedTarget; + _zz_execute_BranchPlugin_missAlignedTarget_1[8] = _zz_execute_BranchPlugin_missAlignedTarget; + _zz_execute_BranchPlugin_missAlignedTarget_1[7] = _zz_execute_BranchPlugin_missAlignedTarget; + _zz_execute_BranchPlugin_missAlignedTarget_1[6] = _zz_execute_BranchPlugin_missAlignedTarget; + _zz_execute_BranchPlugin_missAlignedTarget_1[5] = _zz_execute_BranchPlugin_missAlignedTarget; + _zz_execute_BranchPlugin_missAlignedTarget_1[4] = _zz_execute_BranchPlugin_missAlignedTarget; + _zz_execute_BranchPlugin_missAlignedTarget_1[3] = _zz_execute_BranchPlugin_missAlignedTarget; + _zz_execute_BranchPlugin_missAlignedTarget_1[2] = _zz_execute_BranchPlugin_missAlignedTarget; + _zz_execute_BranchPlugin_missAlignedTarget_1[1] = _zz_execute_BranchPlugin_missAlignedTarget; + _zz_execute_BranchPlugin_missAlignedTarget_1[0] = _zz_execute_BranchPlugin_missAlignedTarget; + end + + assign _zz_execute_BranchPlugin_missAlignedTarget_2 = _zz__zz_execute_BranchPlugin_missAlignedTarget_2[19]; + always @(*) begin + _zz_execute_BranchPlugin_missAlignedTarget_3[10] = _zz_execute_BranchPlugin_missAlignedTarget_2; + _zz_execute_BranchPlugin_missAlignedTarget_3[9] = _zz_execute_BranchPlugin_missAlignedTarget_2; + _zz_execute_BranchPlugin_missAlignedTarget_3[8] = _zz_execute_BranchPlugin_missAlignedTarget_2; + _zz_execute_BranchPlugin_missAlignedTarget_3[7] = _zz_execute_BranchPlugin_missAlignedTarget_2; + _zz_execute_BranchPlugin_missAlignedTarget_3[6] = _zz_execute_BranchPlugin_missAlignedTarget_2; + _zz_execute_BranchPlugin_missAlignedTarget_3[5] = _zz_execute_BranchPlugin_missAlignedTarget_2; + _zz_execute_BranchPlugin_missAlignedTarget_3[4] = _zz_execute_BranchPlugin_missAlignedTarget_2; + _zz_execute_BranchPlugin_missAlignedTarget_3[3] = _zz_execute_BranchPlugin_missAlignedTarget_2; + _zz_execute_BranchPlugin_missAlignedTarget_3[2] = _zz_execute_BranchPlugin_missAlignedTarget_2; + _zz_execute_BranchPlugin_missAlignedTarget_3[1] = _zz_execute_BranchPlugin_missAlignedTarget_2; + _zz_execute_BranchPlugin_missAlignedTarget_3[0] = _zz_execute_BranchPlugin_missAlignedTarget_2; + end + + assign _zz_execute_BranchPlugin_missAlignedTarget_4 = _zz__zz_execute_BranchPlugin_missAlignedTarget_4[11]; + always @(*) begin + _zz_execute_BranchPlugin_missAlignedTarget_5[18] = _zz_execute_BranchPlugin_missAlignedTarget_4; + _zz_execute_BranchPlugin_missAlignedTarget_5[17] = _zz_execute_BranchPlugin_missAlignedTarget_4; + _zz_execute_BranchPlugin_missAlignedTarget_5[16] = _zz_execute_BranchPlugin_missAlignedTarget_4; + _zz_execute_BranchPlugin_missAlignedTarget_5[15] = _zz_execute_BranchPlugin_missAlignedTarget_4; + _zz_execute_BranchPlugin_missAlignedTarget_5[14] = _zz_execute_BranchPlugin_missAlignedTarget_4; + _zz_execute_BranchPlugin_missAlignedTarget_5[13] = _zz_execute_BranchPlugin_missAlignedTarget_4; + _zz_execute_BranchPlugin_missAlignedTarget_5[12] = _zz_execute_BranchPlugin_missAlignedTarget_4; + _zz_execute_BranchPlugin_missAlignedTarget_5[11] = _zz_execute_BranchPlugin_missAlignedTarget_4; + _zz_execute_BranchPlugin_missAlignedTarget_5[10] = _zz_execute_BranchPlugin_missAlignedTarget_4; + _zz_execute_BranchPlugin_missAlignedTarget_5[9] = _zz_execute_BranchPlugin_missAlignedTarget_4; + _zz_execute_BranchPlugin_missAlignedTarget_5[8] = _zz_execute_BranchPlugin_missAlignedTarget_4; + _zz_execute_BranchPlugin_missAlignedTarget_5[7] = _zz_execute_BranchPlugin_missAlignedTarget_4; + _zz_execute_BranchPlugin_missAlignedTarget_5[6] = _zz_execute_BranchPlugin_missAlignedTarget_4; + _zz_execute_BranchPlugin_missAlignedTarget_5[5] = _zz_execute_BranchPlugin_missAlignedTarget_4; + _zz_execute_BranchPlugin_missAlignedTarget_5[4] = _zz_execute_BranchPlugin_missAlignedTarget_4; + _zz_execute_BranchPlugin_missAlignedTarget_5[3] = _zz_execute_BranchPlugin_missAlignedTarget_4; + _zz_execute_BranchPlugin_missAlignedTarget_5[2] = _zz_execute_BranchPlugin_missAlignedTarget_4; + _zz_execute_BranchPlugin_missAlignedTarget_5[1] = _zz_execute_BranchPlugin_missAlignedTarget_4; + _zz_execute_BranchPlugin_missAlignedTarget_5[0] = _zz_execute_BranchPlugin_missAlignedTarget_4; + end + + always @(*) begin + case(execute_BRANCH_CTRL) + `BranchCtrlEnum_binary_sequential_JALR : begin + _zz_execute_BranchPlugin_missAlignedTarget_6 = (_zz__zz_execute_BranchPlugin_missAlignedTarget_6[1] ^ execute_RS1[1]); + end + `BranchCtrlEnum_binary_sequential_JAL : begin + _zz_execute_BranchPlugin_missAlignedTarget_6 = _zz__zz_execute_BranchPlugin_missAlignedTarget_6_1[1]; + end + default : begin + _zz_execute_BranchPlugin_missAlignedTarget_6 = _zz__zz_execute_BranchPlugin_missAlignedTarget_6_2[1]; + end + endcase + end + + assign execute_BranchPlugin_missAlignedTarget = (execute_BRANCH_COND_RESULT && _zz_execute_BranchPlugin_missAlignedTarget_6); + always @(*) begin + case(execute_BRANCH_CTRL) + `BranchCtrlEnum_binary_sequential_JALR : begin + execute_BranchPlugin_branch_src1 = execute_RS1; + end + default : begin + execute_BranchPlugin_branch_src1 = execute_PC; + end + endcase + end + + assign _zz_execute_BranchPlugin_branch_src2 = execute_INSTRUCTION[31]; + always @(*) begin + _zz_execute_BranchPlugin_branch_src2_1[19] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[18] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[17] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[16] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[15] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[14] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[13] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[12] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[11] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[10] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[9] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[8] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[7] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[6] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[5] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[4] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[3] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[2] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[1] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[0] = _zz_execute_BranchPlugin_branch_src2; + end + + always @(*) begin + case(execute_BRANCH_CTRL) + `BranchCtrlEnum_binary_sequential_JALR : begin + execute_BranchPlugin_branch_src2 = {_zz_execute_BranchPlugin_branch_src2_1,execute_INSTRUCTION[31 : 20]}; + end + default : begin + execute_BranchPlugin_branch_src2 = ((execute_BRANCH_CTRL == `BranchCtrlEnum_binary_sequential_JAL) ? {{_zz_execute_BranchPlugin_branch_src2_3,{{{_zz_execute_BranchPlugin_branch_src2_6,execute_INSTRUCTION[19 : 12]},execute_INSTRUCTION[20]},execute_INSTRUCTION[30 : 21]}},1'b0} : {{_zz_execute_BranchPlugin_branch_src2_5,{{{_zz_execute_BranchPlugin_branch_src2_7,_zz_execute_BranchPlugin_branch_src2_8},execute_INSTRUCTION[30 : 25]},execute_INSTRUCTION[11 : 8]}},1'b0}); + if(execute_PREDICTION_HAD_BRANCHED2) begin + execute_BranchPlugin_branch_src2 = {29'd0, _zz_execute_BranchPlugin_branch_src2_9}; + end + end + endcase + end + + assign _zz_execute_BranchPlugin_branch_src2_2 = _zz__zz_execute_BranchPlugin_branch_src2_2[19]; + always @(*) begin + _zz_execute_BranchPlugin_branch_src2_3[10] = _zz_execute_BranchPlugin_branch_src2_2; + _zz_execute_BranchPlugin_branch_src2_3[9] = _zz_execute_BranchPlugin_branch_src2_2; + _zz_execute_BranchPlugin_branch_src2_3[8] = _zz_execute_BranchPlugin_branch_src2_2; + _zz_execute_BranchPlugin_branch_src2_3[7] = _zz_execute_BranchPlugin_branch_src2_2; + _zz_execute_BranchPlugin_branch_src2_3[6] = _zz_execute_BranchPlugin_branch_src2_2; + _zz_execute_BranchPlugin_branch_src2_3[5] = _zz_execute_BranchPlugin_branch_src2_2; + _zz_execute_BranchPlugin_branch_src2_3[4] = _zz_execute_BranchPlugin_branch_src2_2; + _zz_execute_BranchPlugin_branch_src2_3[3] = _zz_execute_BranchPlugin_branch_src2_2; + _zz_execute_BranchPlugin_branch_src2_3[2] = _zz_execute_BranchPlugin_branch_src2_2; + _zz_execute_BranchPlugin_branch_src2_3[1] = _zz_execute_BranchPlugin_branch_src2_2; + _zz_execute_BranchPlugin_branch_src2_3[0] = _zz_execute_BranchPlugin_branch_src2_2; + end + + assign _zz_execute_BranchPlugin_branch_src2_4 = _zz__zz_execute_BranchPlugin_branch_src2_4[11]; + always @(*) begin + _zz_execute_BranchPlugin_branch_src2_5[18] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[17] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[16] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[15] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[14] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[13] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[12] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[11] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[10] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[9] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[8] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[7] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[6] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[5] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[4] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[3] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[2] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[1] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[0] = _zz_execute_BranchPlugin_branch_src2_4; + end + + assign execute_BranchPlugin_branchAdder = (execute_BranchPlugin_branch_src1 + execute_BranchPlugin_branch_src2); + assign BranchPlugin_jumpInterface_valid = ((execute_arbitration_isValid && execute_BRANCH_DO) && (! 1'b0)); + assign BranchPlugin_jumpInterface_payload = execute_BRANCH_CALC; + always @(*) begin + BranchPlugin_branchExceptionPort_valid = (execute_arbitration_isValid && (execute_BRANCH_DO && execute_BRANCH_CALC[1])); + if(when_BranchPlugin_l296) begin + BranchPlugin_branchExceptionPort_valid = 1'b0; + end + end + + assign BranchPlugin_branchExceptionPort_payload_code = 4'b0000; + assign BranchPlugin_branchExceptionPort_payload_badAddr = execute_BRANCH_CALC; + assign when_BranchPlugin_l296 = 1'b0; + assign IBusCachedPlugin_decodePrediction_rsp_wasWrong = BranchPlugin_jumpInterface_valid; + always @(*) begin + CsrPlugin_privilege = 2'b11; + if(CsrPlugin_forceMachineWire) begin + CsrPlugin_privilege = 2'b11; + end + end + + assign _zz_when_CsrPlugin_l952 = (CsrPlugin_mip_MTIP && CsrPlugin_mie_MTIE); + assign _zz_when_CsrPlugin_l952_1 = (CsrPlugin_mip_MSIP && CsrPlugin_mie_MSIE); + assign _zz_when_CsrPlugin_l952_2 = (CsrPlugin_mip_MEIP && CsrPlugin_mie_MEIE); + assign CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilegeUncapped = 2'b11; + assign CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilege = ((CsrPlugin_privilege < CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilegeUncapped) ? CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilegeUncapped : CsrPlugin_privilege); + assign _zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code = {decodeExceptionPort_valid,IBusCachedPlugin_decodeExceptionPort_valid}; + assign _zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_1 = _zz__zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_1[0]; + assign _zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_2 = {CsrPlugin_selfException_valid,BranchPlugin_branchExceptionPort_valid}; + assign _zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_3 = _zz__zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_3[0]; + always @(*) begin + CsrPlugin_exceptionPortCtrl_exceptionValids_decode = CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_decode; + if(_zz_when) begin + CsrPlugin_exceptionPortCtrl_exceptionValids_decode = 1'b1; + end + if(decode_arbitration_isFlushed) begin + CsrPlugin_exceptionPortCtrl_exceptionValids_decode = 1'b0; + end + end + + always @(*) begin + CsrPlugin_exceptionPortCtrl_exceptionValids_execute = CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_execute; + if(_zz_when_1) begin + CsrPlugin_exceptionPortCtrl_exceptionValids_execute = 1'b1; + end + if(execute_arbitration_isFlushed) begin + CsrPlugin_exceptionPortCtrl_exceptionValids_execute = 1'b0; + end + end + + always @(*) begin + CsrPlugin_exceptionPortCtrl_exceptionValids_memory = CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_memory; + if(memory_arbitration_isFlushed) begin + CsrPlugin_exceptionPortCtrl_exceptionValids_memory = 1'b0; + end + end + + always @(*) begin + CsrPlugin_exceptionPortCtrl_exceptionValids_writeBack = CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_writeBack; + if(DBusCachedPlugin_exceptionBus_valid) begin + CsrPlugin_exceptionPortCtrl_exceptionValids_writeBack = 1'b1; + end + if(writeBack_arbitration_isFlushed) begin + CsrPlugin_exceptionPortCtrl_exceptionValids_writeBack = 1'b0; + end + end + + assign when_CsrPlugin_l909 = (! decode_arbitration_isStuck); + assign when_CsrPlugin_l909_1 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l909_2 = (! memory_arbitration_isStuck); + assign when_CsrPlugin_l909_3 = (! writeBack_arbitration_isStuck); + assign when_CsrPlugin_l922 = ({CsrPlugin_exceptionPortCtrl_exceptionValids_writeBack,{CsrPlugin_exceptionPortCtrl_exceptionValids_memory,{CsrPlugin_exceptionPortCtrl_exceptionValids_execute,CsrPlugin_exceptionPortCtrl_exceptionValids_decode}}} != 4'b0000); + assign CsrPlugin_exceptionPendings_0 = CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_decode; + assign CsrPlugin_exceptionPendings_1 = CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_execute; + assign CsrPlugin_exceptionPendings_2 = CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_memory; + assign CsrPlugin_exceptionPendings_3 = CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_writeBack; + assign when_CsrPlugin_l946 = (CsrPlugin_mstatus_MIE || (CsrPlugin_privilege < 2'b11)); + assign when_CsrPlugin_l952 = ((_zz_when_CsrPlugin_l952 && 1'b1) && (! 1'b0)); + assign when_CsrPlugin_l952_1 = ((_zz_when_CsrPlugin_l952_1 && 1'b1) && (! 1'b0)); + assign when_CsrPlugin_l952_2 = ((_zz_when_CsrPlugin_l952_2 && 1'b1) && (! 1'b0)); + assign CsrPlugin_exception = (CsrPlugin_exceptionPortCtrl_exceptionValids_writeBack && CsrPlugin_allowException); + assign CsrPlugin_pipelineLiberator_active = ((CsrPlugin_interrupt_valid && CsrPlugin_allowInterrupts) && decode_arbitration_isValid); + assign when_CsrPlugin_l980 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l980_1 = (! memory_arbitration_isStuck); + assign when_CsrPlugin_l980_2 = (! writeBack_arbitration_isStuck); + assign when_CsrPlugin_l985 = ((! CsrPlugin_pipelineLiberator_active) || decode_arbitration_removeIt); + always @(*) begin + CsrPlugin_pipelineLiberator_done = CsrPlugin_pipelineLiberator_pcValids_2; + if(when_CsrPlugin_l991) begin + CsrPlugin_pipelineLiberator_done = 1'b0; + end + if(CsrPlugin_hadException) begin + CsrPlugin_pipelineLiberator_done = 1'b0; + end + end + + assign when_CsrPlugin_l991 = ({CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_writeBack,{CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_memory,CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_execute}} != 3'b000); + assign CsrPlugin_interruptJump = ((CsrPlugin_interrupt_valid && CsrPlugin_pipelineLiberator_done) && CsrPlugin_allowInterrupts); + always @(*) begin + CsrPlugin_targetPrivilege = CsrPlugin_interrupt_targetPrivilege; + if(CsrPlugin_hadException) begin + CsrPlugin_targetPrivilege = CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilege; + end + end + + always @(*) begin + CsrPlugin_trapCause = CsrPlugin_interrupt_code; + if(CsrPlugin_hadException) begin + CsrPlugin_trapCause = CsrPlugin_exceptionPortCtrl_exceptionContext_code; + end + end + + always @(*) begin + CsrPlugin_xtvec_mode = 2'bxx; + case(CsrPlugin_targetPrivilege) + 2'b11 : begin + CsrPlugin_xtvec_mode = CsrPlugin_mtvec_mode; + end + default : begin + end + endcase + end + + always @(*) begin + CsrPlugin_xtvec_base = 30'bxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx; + case(CsrPlugin_targetPrivilege) + 2'b11 : begin + CsrPlugin_xtvec_base = CsrPlugin_mtvec_base; + end + default : begin + end + endcase + end + + assign when_CsrPlugin_l1019 = (CsrPlugin_hadException || CsrPlugin_interruptJump); + assign when_CsrPlugin_l1064 = (writeBack_arbitration_isValid && (writeBack_ENV_CTRL == `EnvCtrlEnum_binary_sequential_XRET)); + assign switch_CsrPlugin_l1068 = writeBack_INSTRUCTION[29 : 28]; + assign contextSwitching = CsrPlugin_jumpInterface_valid; + assign when_CsrPlugin_l1108 = (execute_arbitration_isValid && (execute_ENV_CTRL == `EnvCtrlEnum_binary_sequential_WFI)); + assign when_CsrPlugin_l1110 = (! execute_CsrPlugin_wfiWake); + assign when_CsrPlugin_l1116 = ({(writeBack_arbitration_isValid && (writeBack_ENV_CTRL == `EnvCtrlEnum_binary_sequential_XRET)),{(memory_arbitration_isValid && (memory_ENV_CTRL == `EnvCtrlEnum_binary_sequential_XRET)),(execute_arbitration_isValid && (execute_ENV_CTRL == `EnvCtrlEnum_binary_sequential_XRET))}} != 3'b000); + assign execute_CsrPlugin_blockedBySideEffects = (({writeBack_arbitration_isValid,memory_arbitration_isValid} != 2'b00) || 1'b0); + always @(*) begin + execute_CsrPlugin_illegalAccess = 1'b1; + if(execute_CsrPlugin_csr_3264) begin + if(execute_CSR_READ_OPCODE) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + end + if(execute_CsrPlugin_csr_3857) begin + if(execute_CSR_READ_OPCODE) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + end + if(execute_CsrPlugin_csr_3858) begin + if(execute_CSR_READ_OPCODE) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + end + if(execute_CsrPlugin_csr_3859) begin + if(execute_CSR_READ_OPCODE) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + end + if(execute_CsrPlugin_csr_3860) begin + if(execute_CSR_READ_OPCODE) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + end + if(execute_CsrPlugin_csr_769) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(execute_CsrPlugin_csr_768) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(execute_CsrPlugin_csr_836) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(execute_CsrPlugin_csr_772) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(execute_CsrPlugin_csr_773) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(execute_CsrPlugin_csr_833) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(execute_CsrPlugin_csr_832) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(execute_CsrPlugin_csr_834) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(execute_CsrPlugin_csr_835) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(execute_CsrPlugin_csr_2816) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(execute_CsrPlugin_csr_2944) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(execute_CsrPlugin_csr_2818) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(execute_CsrPlugin_csr_2946) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(execute_CsrPlugin_csr_3072) begin + if(execute_CSR_READ_OPCODE) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + end + if(execute_CsrPlugin_csr_3200) begin + if(execute_CSR_READ_OPCODE) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + end + if(execute_CsrPlugin_csr_3074) begin + if(execute_CSR_READ_OPCODE) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + end + if(execute_CsrPlugin_csr_3202) begin + if(execute_CSR_READ_OPCODE) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + end + if(execute_CsrPlugin_csr_3008) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(execute_CsrPlugin_csr_4032) begin + if(execute_CSR_READ_OPCODE) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + end + if(CsrPlugin_csrMapping_allowCsrSignal) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(when_CsrPlugin_l1297) begin + execute_CsrPlugin_illegalAccess = 1'b1; + end + if(when_CsrPlugin_l1302) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + end + + always @(*) begin + execute_CsrPlugin_illegalInstruction = 1'b0; + if(when_CsrPlugin_l1136) begin + if(when_CsrPlugin_l1137) begin + execute_CsrPlugin_illegalInstruction = 1'b1; + end + end + end + + always @(*) begin + CsrPlugin_selfException_valid = 1'b0; + if(when_CsrPlugin_l1129) begin + CsrPlugin_selfException_valid = 1'b1; + end + if(when_CsrPlugin_l1144) begin + CsrPlugin_selfException_valid = 1'b1; + end + end + + always @(*) begin + CsrPlugin_selfException_payload_code = 4'bxxxx; + if(when_CsrPlugin_l1129) begin + CsrPlugin_selfException_payload_code = 4'b0010; + end + if(when_CsrPlugin_l1144) begin + case(CsrPlugin_privilege) + 2'b00 : begin + CsrPlugin_selfException_payload_code = 4'b1000; + end + default : begin + CsrPlugin_selfException_payload_code = 4'b1011; + end + endcase + end + end + + assign CsrPlugin_selfException_payload_badAddr = execute_INSTRUCTION; + assign when_CsrPlugin_l1129 = (execute_CsrPlugin_illegalAccess || execute_CsrPlugin_illegalInstruction); + assign when_CsrPlugin_l1136 = (execute_arbitration_isValid && (execute_ENV_CTRL == `EnvCtrlEnum_binary_sequential_XRET)); + assign when_CsrPlugin_l1137 = (CsrPlugin_privilege < execute_INSTRUCTION[29 : 28]); + assign when_CsrPlugin_l1144 = (execute_arbitration_isValid && (execute_ENV_CTRL == `EnvCtrlEnum_binary_sequential_ECALL)); + always @(*) begin + execute_CsrPlugin_writeInstruction = ((execute_arbitration_isValid && execute_IS_CSR) && execute_CSR_WRITE_OPCODE); + if(when_CsrPlugin_l1297) begin + execute_CsrPlugin_writeInstruction = 1'b0; + end + end + + always @(*) begin + execute_CsrPlugin_readInstruction = ((execute_arbitration_isValid && execute_IS_CSR) && execute_CSR_READ_OPCODE); + if(when_CsrPlugin_l1297) begin + execute_CsrPlugin_readInstruction = 1'b0; + end + end + + assign execute_CsrPlugin_writeEnable = (execute_CsrPlugin_writeInstruction && (! execute_arbitration_isStuck)); + assign execute_CsrPlugin_readEnable = (execute_CsrPlugin_readInstruction && (! execute_arbitration_isStuck)); + assign CsrPlugin_csrMapping_hazardFree = (! execute_CsrPlugin_blockedBySideEffects); + assign execute_CsrPlugin_readToWriteData = CsrPlugin_csrMapping_readDataSignal; + assign switch_Misc_l200_2 = execute_INSTRUCTION[13]; + always @(*) begin + case(switch_Misc_l200_2) + 1'b0 : begin + _zz_CsrPlugin_csrMapping_writeDataSignal = execute_SRC1; + end + default : begin + _zz_CsrPlugin_csrMapping_writeDataSignal = (execute_INSTRUCTION[12] ? (execute_CsrPlugin_readToWriteData & (~ execute_SRC1)) : (execute_CsrPlugin_readToWriteData | execute_SRC1)); + end + endcase + end + + assign CsrPlugin_csrMapping_writeDataSignal = _zz_CsrPlugin_csrMapping_writeDataSignal; + assign when_CsrPlugin_l1176 = (execute_arbitration_isValid && execute_IS_CSR); + assign when_CsrPlugin_l1180 = (execute_arbitration_isValid && (execute_IS_CSR || 1'b0)); + assign execute_CsrPlugin_csrAddress = execute_INSTRUCTION[31 : 20]; + assign execute_MulPlugin_a = execute_RS1; + assign execute_MulPlugin_b = execute_RS2; + assign switch_MulPlugin_l87 = execute_INSTRUCTION[13 : 12]; + always @(*) begin + case(switch_MulPlugin_l87) + 2'b01 : begin + execute_MulPlugin_aSigned = 1'b1; + end + 2'b10 : begin + execute_MulPlugin_aSigned = 1'b1; + end + default : begin + execute_MulPlugin_aSigned = 1'b0; + end + endcase + end + + always @(*) begin + case(switch_MulPlugin_l87) + 2'b01 : begin + execute_MulPlugin_bSigned = 1'b1; + end + 2'b10 : begin + execute_MulPlugin_bSigned = 1'b0; + end + default : begin + execute_MulPlugin_bSigned = 1'b0; + end + endcase + end + + assign execute_MulPlugin_aULow = execute_MulPlugin_a[15 : 0]; + assign execute_MulPlugin_bULow = execute_MulPlugin_b[15 : 0]; + assign execute_MulPlugin_aSLow = {1'b0,execute_MulPlugin_a[15 : 0]}; + assign execute_MulPlugin_bSLow = {1'b0,execute_MulPlugin_b[15 : 0]}; + assign execute_MulPlugin_aHigh = {(execute_MulPlugin_aSigned && execute_MulPlugin_a[31]),execute_MulPlugin_a[31 : 16]}; + assign execute_MulPlugin_bHigh = {(execute_MulPlugin_bSigned && execute_MulPlugin_b[31]),execute_MulPlugin_b[31 : 16]}; + assign writeBack_MulPlugin_result = ($signed(_zz_writeBack_MulPlugin_result) + $signed(_zz_writeBack_MulPlugin_result_1)); + assign when_MulPlugin_l147 = (writeBack_arbitration_isValid && writeBack_IS_MUL); + assign switch_MulPlugin_l148 = writeBack_INSTRUCTION[13 : 12]; + assign memory_DivPlugin_frontendOk = 1'b1; + always @(*) begin + memory_DivPlugin_div_counter_willIncrement = 1'b0; + if(when_MulDivIterativePlugin_l128) begin + if(when_MulDivIterativePlugin_l132) begin + memory_DivPlugin_div_counter_willIncrement = 1'b1; + end + end + end + + always @(*) begin + memory_DivPlugin_div_counter_willClear = 1'b0; + if(when_MulDivIterativePlugin_l162) begin + memory_DivPlugin_div_counter_willClear = 1'b1; + end + end + + assign memory_DivPlugin_div_counter_willOverflowIfInc = (memory_DivPlugin_div_counter_value == 6'h21); + assign memory_DivPlugin_div_counter_willOverflow = (memory_DivPlugin_div_counter_willOverflowIfInc && memory_DivPlugin_div_counter_willIncrement); + always @(*) begin + if(memory_DivPlugin_div_counter_willOverflow) begin + memory_DivPlugin_div_counter_valueNext = 6'h0; + end else begin + memory_DivPlugin_div_counter_valueNext = (memory_DivPlugin_div_counter_value + _zz_memory_DivPlugin_div_counter_valueNext); + end + if(memory_DivPlugin_div_counter_willClear) begin + memory_DivPlugin_div_counter_valueNext = 6'h0; + end + end + + assign when_MulDivIterativePlugin_l126 = (memory_DivPlugin_div_counter_value == 6'h20); + assign when_MulDivIterativePlugin_l126_1 = (! memory_arbitration_isStuck); + assign when_MulDivIterativePlugin_l128 = (memory_arbitration_isValid && memory_IS_DIV); + assign when_MulDivIterativePlugin_l129 = ((! memory_DivPlugin_frontendOk) || (! memory_DivPlugin_div_done)); + assign when_MulDivIterativePlugin_l132 = (memory_DivPlugin_frontendOk && (! memory_DivPlugin_div_done)); + assign _zz_memory_DivPlugin_div_stage_0_remainderShifted = memory_DivPlugin_rs1[31 : 0]; + assign memory_DivPlugin_div_stage_0_remainderShifted = {memory_DivPlugin_accumulator[31 : 0],_zz_memory_DivPlugin_div_stage_0_remainderShifted[31]}; + assign memory_DivPlugin_div_stage_0_remainderMinusDenominator = (memory_DivPlugin_div_stage_0_remainderShifted - _zz_memory_DivPlugin_div_stage_0_remainderMinusDenominator); + assign memory_DivPlugin_div_stage_0_outRemainder = ((! memory_DivPlugin_div_stage_0_remainderMinusDenominator[32]) ? _zz_memory_DivPlugin_div_stage_0_outRemainder : _zz_memory_DivPlugin_div_stage_0_outRemainder_1); + assign memory_DivPlugin_div_stage_0_outNumerator = _zz_memory_DivPlugin_div_stage_0_outNumerator[31:0]; + assign when_MulDivIterativePlugin_l151 = (memory_DivPlugin_div_counter_value == 6'h20); + assign _zz_memory_DivPlugin_div_result = (memory_INSTRUCTION[13] ? memory_DivPlugin_accumulator[31 : 0] : memory_DivPlugin_rs1[31 : 0]); + assign when_MulDivIterativePlugin_l162 = (! memory_arbitration_isStuck); + assign _zz_memory_DivPlugin_rs2 = (execute_RS2[31] && execute_IS_RS2_SIGNED); + assign _zz_memory_DivPlugin_rs1 = (1'b0 || ((execute_IS_DIV && execute_RS1[31]) && execute_IS_RS1_SIGNED)); + always @(*) begin + _zz_memory_DivPlugin_rs1_1[32] = (execute_IS_RS1_SIGNED && execute_RS1[31]); + _zz_memory_DivPlugin_rs1_1[31 : 0] = execute_RS1; + end + + assign _zz_CsrPlugin_csrMapping_readDataInit_1 = (_zz_CsrPlugin_csrMapping_readDataInit & externalInterruptArray_regNext); + assign externalInterrupt = (_zz_CsrPlugin_csrMapping_readDataInit_1 != 32'h0); + assign execute_CfuPlugin_schedule = (execute_arbitration_isValid && execute_CfuPlugin_CFU_ENABLE); + assign CfuPlugin_bus_cmd_fire = (CfuPlugin_bus_cmd_valid && CfuPlugin_bus_cmd_ready); + assign when_CfuPlugin_l171 = (! execute_arbitration_isStuckByOthers); + assign CfuPlugin_bus_cmd_valid = ((execute_CfuPlugin_schedule || execute_CfuPlugin_hold) && (! execute_CfuPlugin_fired)); + assign when_CfuPlugin_l175 = (CfuPlugin_bus_cmd_valid && (! CfuPlugin_bus_cmd_ready)); + assign execute_CfuPlugin_functionsIds_0 = _zz_execute_CfuPlugin_functionsIds_0; + assign CfuPlugin_bus_cmd_payload_function_id = execute_CfuPlugin_functionsIds_0; + assign CfuPlugin_bus_cmd_payload_inputs_0 = execute_RS1; + assign _zz_CfuPlugin_bus_cmd_payload_inputs_1 = execute_INSTRUCTION[31]; + always @(*) begin + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[23] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[22] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[21] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[20] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[19] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[18] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[17] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[16] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[15] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[14] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[13] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[12] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[11] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[10] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[9] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[8] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[7] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[6] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[5] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[4] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[3] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[2] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[1] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[0] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + end + + always @(*) begin + case(execute_CfuPlugin_CFU_INPUT_2_KIND) + `Input2Kind_binary_sequential_RS : begin + _zz_CfuPlugin_bus_cmd_payload_inputs_1_2 = execute_RS2; + end + default : begin + _zz_CfuPlugin_bus_cmd_payload_inputs_1_2 = {_zz_CfuPlugin_bus_cmd_payload_inputs_1_1,execute_INSTRUCTION[31 : 24]}; + end + endcase + end + + assign CfuPlugin_bus_cmd_payload_inputs_1 = _zz_CfuPlugin_bus_cmd_payload_inputs_1_2; + assign CfuPlugin_bus_rsp_ready = (! CfuPlugin_bus_rsp_rValid); + assign CfuPlugin_bus_rsp_rsp_valid = (CfuPlugin_bus_rsp_valid || CfuPlugin_bus_rsp_rValid); + assign CfuPlugin_bus_rsp_rsp_payload_outputs_0 = (CfuPlugin_bus_rsp_rValid ? CfuPlugin_bus_rsp_rData_outputs_0 : CfuPlugin_bus_rsp_payload_outputs_0); + always @(*) begin + CfuPlugin_bus_rsp_rsp_ready = 1'b0; + if(memory_CfuPlugin_CFU_IN_FLIGHT) begin + CfuPlugin_bus_rsp_rsp_ready = (! memory_arbitration_isStuckByOthers); + end + end + + assign when_CfuPlugin_l208 = (! CfuPlugin_bus_rsp_rsp_valid); + assign when_Pipeline_l124 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_1 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_2 = ((! writeBack_arbitration_isStuck) && (! CsrPlugin_exceptionPortCtrl_exceptionValids_writeBack)); + assign when_Pipeline_l124_3 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_4 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_5 = (! writeBack_arbitration_isStuck); + assign when_Pipeline_l124_6 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_7 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_8 = (! writeBack_arbitration_isStuck); + assign when_Pipeline_l124_9 = (! execute_arbitration_isStuck); + assign _zz_decode_to_execute_SRC1_CTRL_1 = decode_SRC1_CTRL; + assign _zz_decode_SRC1_CTRL = _zz_decode_SRC1_CTRL_1; + assign when_Pipeline_l124_10 = (! execute_arbitration_isStuck); + assign _zz_execute_SRC1_CTRL = decode_to_execute_SRC1_CTRL; + assign when_Pipeline_l124_11 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_12 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_13 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_14 = (! writeBack_arbitration_isStuck); + assign _zz_decode_to_execute_ALU_CTRL_1 = decode_ALU_CTRL; + assign _zz_decode_ALU_CTRL = _zz_decode_ALU_CTRL_1; + assign when_Pipeline_l124_15 = (! execute_arbitration_isStuck); + assign _zz_execute_ALU_CTRL = decode_to_execute_ALU_CTRL; + assign _zz_decode_to_execute_SRC2_CTRL_1 = decode_SRC2_CTRL; + assign _zz_decode_SRC2_CTRL = _zz_decode_SRC2_CTRL_1; + assign when_Pipeline_l124_16 = (! execute_arbitration_isStuck); + assign _zz_execute_SRC2_CTRL = decode_to_execute_SRC2_CTRL; + assign when_Pipeline_l124_17 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_18 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_19 = (! writeBack_arbitration_isStuck); + assign when_Pipeline_l124_20 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_21 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_22 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_23 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_24 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_25 = (! writeBack_arbitration_isStuck); + assign when_Pipeline_l124_26 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_27 = (! execute_arbitration_isStuck); + assign _zz_decode_to_execute_ALU_BITWISE_CTRL_1 = decode_ALU_BITWISE_CTRL; + assign _zz_decode_ALU_BITWISE_CTRL = _zz_decode_ALU_BITWISE_CTRL_1; + assign when_Pipeline_l124_28 = (! execute_arbitration_isStuck); + assign _zz_execute_ALU_BITWISE_CTRL = decode_to_execute_ALU_BITWISE_CTRL; + assign _zz_decode_to_execute_SHIFT_CTRL_1 = decode_SHIFT_CTRL; + assign _zz_execute_to_memory_SHIFT_CTRL_1 = execute_SHIFT_CTRL; + assign _zz_decode_SHIFT_CTRL = _zz_decode_SHIFT_CTRL_1; + assign when_Pipeline_l124_29 = (! execute_arbitration_isStuck); + assign _zz_execute_SHIFT_CTRL = decode_to_execute_SHIFT_CTRL; + assign when_Pipeline_l124_30 = (! memory_arbitration_isStuck); + assign _zz_memory_SHIFT_CTRL = execute_to_memory_SHIFT_CTRL; + assign _zz_decode_to_execute_BRANCH_CTRL_1 = decode_BRANCH_CTRL; + assign _zz_decode_BRANCH_CTRL_1 = _zz_decode_BRANCH_CTRL; + assign when_Pipeline_l124_31 = (! execute_arbitration_isStuck); + assign _zz_execute_BRANCH_CTRL = decode_to_execute_BRANCH_CTRL; + assign when_Pipeline_l124_32 = (! execute_arbitration_isStuck); + assign _zz_decode_to_execute_ENV_CTRL_1 = decode_ENV_CTRL; + assign _zz_execute_to_memory_ENV_CTRL_1 = execute_ENV_CTRL; + assign _zz_memory_to_writeBack_ENV_CTRL_1 = memory_ENV_CTRL; + assign _zz_decode_ENV_CTRL = _zz_decode_ENV_CTRL_1; + assign when_Pipeline_l124_33 = (! execute_arbitration_isStuck); + assign _zz_execute_ENV_CTRL = decode_to_execute_ENV_CTRL; + assign when_Pipeline_l124_34 = (! memory_arbitration_isStuck); + assign _zz_memory_ENV_CTRL = execute_to_memory_ENV_CTRL; + assign when_Pipeline_l124_35 = (! writeBack_arbitration_isStuck); + assign _zz_writeBack_ENV_CTRL = memory_to_writeBack_ENV_CTRL; + assign when_Pipeline_l124_36 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_37 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_38 = (! writeBack_arbitration_isStuck); + assign when_Pipeline_l124_39 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_40 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_41 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_42 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_43 = (! execute_arbitration_isStuck); + assign _zz_decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND_1 = decode_CfuPlugin_CFU_INPUT_2_KIND; + assign _zz_decode_CfuPlugin_CFU_INPUT_2_KIND = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_1; + assign when_Pipeline_l124_44 = (! execute_arbitration_isStuck); + assign _zz_execute_CfuPlugin_CFU_INPUT_2_KIND = decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND; + assign when_Pipeline_l124_45 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_46 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_47 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_48 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_49 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_50 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_51 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_52 = (! writeBack_arbitration_isStuck); + assign when_Pipeline_l124_53 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_54 = (! writeBack_arbitration_isStuck); + assign when_Pipeline_l124_55 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_56 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_57 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_58 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_59 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_60 = (! writeBack_arbitration_isStuck); + assign when_Pipeline_l124_61 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_62 = (! writeBack_arbitration_isStuck); + assign when_Pipeline_l124_63 = (! writeBack_arbitration_isStuck); + assign decode_arbitration_isFlushed = (({writeBack_arbitration_flushNext,{memory_arbitration_flushNext,execute_arbitration_flushNext}} != 3'b000) || ({writeBack_arbitration_flushIt,{memory_arbitration_flushIt,{execute_arbitration_flushIt,decode_arbitration_flushIt}}} != 4'b0000)); + assign execute_arbitration_isFlushed = (({writeBack_arbitration_flushNext,memory_arbitration_flushNext} != 2'b00) || ({writeBack_arbitration_flushIt,{memory_arbitration_flushIt,execute_arbitration_flushIt}} != 3'b000)); + assign memory_arbitration_isFlushed = ((writeBack_arbitration_flushNext != 1'b0) || ({writeBack_arbitration_flushIt,memory_arbitration_flushIt} != 2'b00)); + assign writeBack_arbitration_isFlushed = (1'b0 || (writeBack_arbitration_flushIt != 1'b0)); + assign decode_arbitration_isStuckByOthers = (decode_arbitration_haltByOther || (((1'b0 || execute_arbitration_isStuck) || memory_arbitration_isStuck) || writeBack_arbitration_isStuck)); + assign decode_arbitration_isStuck = (decode_arbitration_haltItself || decode_arbitration_isStuckByOthers); + assign decode_arbitration_isMoving = ((! decode_arbitration_isStuck) && (! decode_arbitration_removeIt)); + assign decode_arbitration_isFiring = ((decode_arbitration_isValid && (! decode_arbitration_isStuck)) && (! decode_arbitration_removeIt)); + assign execute_arbitration_isStuckByOthers = (execute_arbitration_haltByOther || ((1'b0 || memory_arbitration_isStuck) || writeBack_arbitration_isStuck)); + assign execute_arbitration_isStuck = (execute_arbitration_haltItself || execute_arbitration_isStuckByOthers); + assign execute_arbitration_isMoving = ((! execute_arbitration_isStuck) && (! execute_arbitration_removeIt)); + assign execute_arbitration_isFiring = ((execute_arbitration_isValid && (! execute_arbitration_isStuck)) && (! execute_arbitration_removeIt)); + assign memory_arbitration_isStuckByOthers = (memory_arbitration_haltByOther || (1'b0 || writeBack_arbitration_isStuck)); + assign memory_arbitration_isStuck = (memory_arbitration_haltItself || memory_arbitration_isStuckByOthers); + assign memory_arbitration_isMoving = ((! memory_arbitration_isStuck) && (! memory_arbitration_removeIt)); + assign memory_arbitration_isFiring = ((memory_arbitration_isValid && (! memory_arbitration_isStuck)) && (! memory_arbitration_removeIt)); + assign writeBack_arbitration_isStuckByOthers = (writeBack_arbitration_haltByOther || 1'b0); + assign writeBack_arbitration_isStuck = (writeBack_arbitration_haltItself || writeBack_arbitration_isStuckByOthers); + assign writeBack_arbitration_isMoving = ((! writeBack_arbitration_isStuck) && (! writeBack_arbitration_removeIt)); + assign writeBack_arbitration_isFiring = ((writeBack_arbitration_isValid && (! writeBack_arbitration_isStuck)) && (! writeBack_arbitration_removeIt)); + assign when_Pipeline_l151 = ((! execute_arbitration_isStuck) || execute_arbitration_removeIt); + assign when_Pipeline_l154 = ((! decode_arbitration_isStuck) && (! decode_arbitration_removeIt)); + assign when_Pipeline_l151_1 = ((! memory_arbitration_isStuck) || memory_arbitration_removeIt); + assign when_Pipeline_l154_1 = ((! execute_arbitration_isStuck) && (! execute_arbitration_removeIt)); + assign when_Pipeline_l151_2 = ((! writeBack_arbitration_isStuck) || writeBack_arbitration_removeIt); + assign when_Pipeline_l154_2 = ((! memory_arbitration_isStuck) && (! memory_arbitration_removeIt)); + assign when_CsrPlugin_l1264 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_1 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_2 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_3 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_4 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_5 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_6 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_7 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_8 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_9 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_10 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_11 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_12 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_13 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_14 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_15 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_16 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_17 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_18 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_19 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_20 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_21 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_22 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_23 = (! execute_arbitration_isStuck); + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_2 = 32'h0; + if(execute_CsrPlugin_csr_3264) begin + _zz_CsrPlugin_csrMapping_readDataInit_2[12 : 0] = 13'h1000; + _zz_CsrPlugin_csrMapping_readDataInit_2[25 : 20] = 6'h20; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_3 = 32'h0; + if(execute_CsrPlugin_csr_3857) begin + _zz_CsrPlugin_csrMapping_readDataInit_3[3 : 0] = 4'b1011; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_4 = 32'h0; + if(execute_CsrPlugin_csr_3858) begin + _zz_CsrPlugin_csrMapping_readDataInit_4[4 : 0] = 5'h16; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_5 = 32'h0; + if(execute_CsrPlugin_csr_3859) begin + _zz_CsrPlugin_csrMapping_readDataInit_5[5 : 0] = 6'h21; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_6 = 32'h0; + if(execute_CsrPlugin_csr_769) begin + _zz_CsrPlugin_csrMapping_readDataInit_6[31 : 30] = CsrPlugin_misa_base; + _zz_CsrPlugin_csrMapping_readDataInit_6[25 : 0] = CsrPlugin_misa_extensions; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_7 = 32'h0; + if(execute_CsrPlugin_csr_768) begin + _zz_CsrPlugin_csrMapping_readDataInit_7[12 : 11] = CsrPlugin_mstatus_MPP; + _zz_CsrPlugin_csrMapping_readDataInit_7[7 : 7] = CsrPlugin_mstatus_MPIE; + _zz_CsrPlugin_csrMapping_readDataInit_7[3 : 3] = CsrPlugin_mstatus_MIE; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_8 = 32'h0; + if(execute_CsrPlugin_csr_836) begin + _zz_CsrPlugin_csrMapping_readDataInit_8[11 : 11] = CsrPlugin_mip_MEIP; + _zz_CsrPlugin_csrMapping_readDataInit_8[7 : 7] = CsrPlugin_mip_MTIP; + _zz_CsrPlugin_csrMapping_readDataInit_8[3 : 3] = CsrPlugin_mip_MSIP; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_9 = 32'h0; + if(execute_CsrPlugin_csr_772) begin + _zz_CsrPlugin_csrMapping_readDataInit_9[11 : 11] = CsrPlugin_mie_MEIE; + _zz_CsrPlugin_csrMapping_readDataInit_9[7 : 7] = CsrPlugin_mie_MTIE; + _zz_CsrPlugin_csrMapping_readDataInit_9[3 : 3] = CsrPlugin_mie_MSIE; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_10 = 32'h0; + if(execute_CsrPlugin_csr_773) begin + _zz_CsrPlugin_csrMapping_readDataInit_10[31 : 2] = CsrPlugin_mtvec_base; + _zz_CsrPlugin_csrMapping_readDataInit_10[1 : 0] = CsrPlugin_mtvec_mode; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_11 = 32'h0; + if(execute_CsrPlugin_csr_833) begin + _zz_CsrPlugin_csrMapping_readDataInit_11[31 : 0] = CsrPlugin_mepc; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_12 = 32'h0; + if(execute_CsrPlugin_csr_832) begin + _zz_CsrPlugin_csrMapping_readDataInit_12[31 : 0] = CsrPlugin_mscratch; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_13 = 32'h0; + if(execute_CsrPlugin_csr_834) begin + _zz_CsrPlugin_csrMapping_readDataInit_13[31 : 31] = CsrPlugin_mcause_interrupt; + _zz_CsrPlugin_csrMapping_readDataInit_13[3 : 0] = CsrPlugin_mcause_exceptionCode; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_14 = 32'h0; + if(execute_CsrPlugin_csr_835) begin + _zz_CsrPlugin_csrMapping_readDataInit_14[31 : 0] = CsrPlugin_mtval; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_15 = 32'h0; + if(execute_CsrPlugin_csr_2816) begin + _zz_CsrPlugin_csrMapping_readDataInit_15[31 : 0] = CsrPlugin_mcycle[31 : 0]; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_16 = 32'h0; + if(execute_CsrPlugin_csr_2944) begin + _zz_CsrPlugin_csrMapping_readDataInit_16[31 : 0] = CsrPlugin_mcycle[63 : 32]; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_17 = 32'h0; + if(execute_CsrPlugin_csr_2818) begin + _zz_CsrPlugin_csrMapping_readDataInit_17[31 : 0] = CsrPlugin_minstret[31 : 0]; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_18 = 32'h0; + if(execute_CsrPlugin_csr_2946) begin + _zz_CsrPlugin_csrMapping_readDataInit_18[31 : 0] = CsrPlugin_minstret[63 : 32]; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_19 = 32'h0; + if(execute_CsrPlugin_csr_3072) begin + _zz_CsrPlugin_csrMapping_readDataInit_19[31 : 0] = CsrPlugin_mcycle[31 : 0]; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_20 = 32'h0; + if(execute_CsrPlugin_csr_3200) begin + _zz_CsrPlugin_csrMapping_readDataInit_20[31 : 0] = CsrPlugin_mcycle[63 : 32]; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_21 = 32'h0; + if(execute_CsrPlugin_csr_3074) begin + _zz_CsrPlugin_csrMapping_readDataInit_21[31 : 0] = CsrPlugin_minstret[31 : 0]; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_22 = 32'h0; + if(execute_CsrPlugin_csr_3202) begin + _zz_CsrPlugin_csrMapping_readDataInit_22[31 : 0] = CsrPlugin_minstret[63 : 32]; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_23 = 32'h0; + if(execute_CsrPlugin_csr_3008) begin + _zz_CsrPlugin_csrMapping_readDataInit_23[31 : 0] = _zz_CsrPlugin_csrMapping_readDataInit; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_24 = 32'h0; + if(execute_CsrPlugin_csr_4032) begin + _zz_CsrPlugin_csrMapping_readDataInit_24[31 : 0] = _zz_CsrPlugin_csrMapping_readDataInit_1; + end + end + + assign CsrPlugin_csrMapping_readDataInit = (((((_zz_CsrPlugin_csrMapping_readDataInit_2 | _zz_CsrPlugin_csrMapping_readDataInit_3) | (_zz_CsrPlugin_csrMapping_readDataInit_4 | _zz_CsrPlugin_csrMapping_readDataInit_5)) | ((_zz_CsrPlugin_csrMapping_readDataInit_25 | _zz_CsrPlugin_csrMapping_readDataInit_6) | (_zz_CsrPlugin_csrMapping_readDataInit_7 | _zz_CsrPlugin_csrMapping_readDataInit_8))) | (((_zz_CsrPlugin_csrMapping_readDataInit_9 | _zz_CsrPlugin_csrMapping_readDataInit_10) | (_zz_CsrPlugin_csrMapping_readDataInit_11 | _zz_CsrPlugin_csrMapping_readDataInit_12)) | ((_zz_CsrPlugin_csrMapping_readDataInit_13 | _zz_CsrPlugin_csrMapping_readDataInit_14) | (_zz_CsrPlugin_csrMapping_readDataInit_15 | _zz_CsrPlugin_csrMapping_readDataInit_16)))) | (((_zz_CsrPlugin_csrMapping_readDataInit_17 | _zz_CsrPlugin_csrMapping_readDataInit_18) | (_zz_CsrPlugin_csrMapping_readDataInit_19 | _zz_CsrPlugin_csrMapping_readDataInit_20)) | ((_zz_CsrPlugin_csrMapping_readDataInit_21 | _zz_CsrPlugin_csrMapping_readDataInit_22) | (_zz_CsrPlugin_csrMapping_readDataInit_23 | _zz_CsrPlugin_csrMapping_readDataInit_24)))); + assign when_CsrPlugin_l1297 = (CsrPlugin_privilege < execute_CsrPlugin_csrAddress[9 : 8]); + assign when_CsrPlugin_l1302 = ((! execute_arbitration_isValid) || (! execute_IS_CSR)); + assign iBusWishbone_ADR = {_zz_iBusWishbone_ADR_1,_zz_iBusWishbone_ADR}; + assign iBusWishbone_CTI = ((_zz_iBusWishbone_ADR == 3'b111) ? 3'b111 : 3'b010); + assign iBusWishbone_BTE = 2'b00; + assign iBusWishbone_SEL = 4'b1111; + assign iBusWishbone_WE = 1'b0; + assign iBusWishbone_DAT_MOSI = 32'bxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx; + always @(*) begin + iBusWishbone_CYC = 1'b0; + if(when_InstructionCache_l239) begin + iBusWishbone_CYC = 1'b1; + end + end + + always @(*) begin + iBusWishbone_STB = 1'b0; + if(when_InstructionCache_l239) begin + iBusWishbone_STB = 1'b1; + end + end + + assign when_InstructionCache_l239 = (iBus_cmd_valid || (_zz_iBusWishbone_ADR != 3'b000)); + assign iBus_cmd_ready = (iBus_cmd_valid && iBusWishbone_ACK); + assign iBus_rsp_valid = _zz_iBus_rsp_valid; + assign iBus_rsp_payload_data = iBusWishbone_DAT_MISO_regNext; + assign iBus_rsp_payload_error = 1'b0; + assign _zz_dBus_cmd_ready_5 = (dBus_cmd_payload_size == 3'b101); + assign _zz_dBus_cmd_ready_1 = dBus_cmd_valid; + assign _zz_dBus_cmd_ready_3 = dBus_cmd_payload_wr; + assign _zz_dBus_cmd_ready_4 = ((! _zz_dBus_cmd_ready_5) || (_zz_dBus_cmd_ready == 3'b111)); + assign dBus_cmd_ready = (_zz_dBus_cmd_ready_2 && (_zz_dBus_cmd_ready_3 || _zz_dBus_cmd_ready_4)); + assign dBusWishbone_ADR = ((_zz_dBus_cmd_ready_5 ? {{dBus_cmd_payload_address[31 : 5],_zz_dBus_cmd_ready},2'b00} : {dBus_cmd_payload_address[31 : 2],2'b00}) >>> 2); + assign dBusWishbone_CTI = (_zz_dBus_cmd_ready_5 ? (_zz_dBus_cmd_ready_4 ? 3'b111 : 3'b010) : 3'b000); + assign dBusWishbone_BTE = 2'b00; + assign dBusWishbone_SEL = (_zz_dBus_cmd_ready_3 ? dBus_cmd_payload_mask : 4'b1111); + assign dBusWishbone_WE = _zz_dBus_cmd_ready_3; + assign dBusWishbone_DAT_MOSI = dBus_cmd_payload_data; + assign _zz_dBus_cmd_ready_2 = (_zz_dBus_cmd_ready_1 && dBusWishbone_ACK); + assign dBusWishbone_CYC = _zz_dBus_cmd_ready_1; + assign dBusWishbone_STB = _zz_dBus_cmd_ready_1; + assign dBus_rsp_valid = _zz_dBus_rsp_valid; + assign dBus_rsp_payload_data = dBusWishbone_DAT_MISO_regNext; + assign dBus_rsp_payload_error = 1'b0; + always @(posedge clk) begin + if(reset) begin + IBusCachedPlugin_fetchPc_pcReg <= externalResetVector; + IBusCachedPlugin_fetchPc_correctionReg <= 1'b0; + IBusCachedPlugin_fetchPc_booted <= 1'b0; + IBusCachedPlugin_fetchPc_inc <= 1'b0; + _zz_IBusCachedPlugin_iBusRsp_stages_0_output_ready_2 <= 1'b0; + _zz_IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_valid <= 1'b0; + IBusCachedPlugin_injector_nextPcCalc_valids_0 <= 1'b0; + IBusCachedPlugin_injector_nextPcCalc_valids_1 <= 1'b0; + IBusCachedPlugin_injector_nextPcCalc_valids_2 <= 1'b0; + IBusCachedPlugin_injector_nextPcCalc_valids_3 <= 1'b0; + IBusCachedPlugin_injector_nextPcCalc_valids_4 <= 1'b0; + IBusCachedPlugin_rspCounter <= _zz_IBusCachedPlugin_rspCounter; + IBusCachedPlugin_rspCounter <= 32'h0; + dataCache_1_io_mem_cmd_rValid <= 1'b0; + dataCache_1_io_mem_cmd_s2mPipe_rValid <= 1'b0; + DBusCachedPlugin_rspCounter <= _zz_DBusCachedPlugin_rspCounter; + DBusCachedPlugin_rspCounter <= 32'h0; + _zz_7 <= 1'b1; + HazardSimplePlugin_writeBackBuffer_valid <= 1'b0; + CsrPlugin_misa_base <= 2'b01; + CsrPlugin_misa_extensions <= 26'h0000042; + CsrPlugin_mstatus_MIE <= 1'b0; + CsrPlugin_mstatus_MPIE <= 1'b0; + CsrPlugin_mstatus_MPP <= 2'b11; + CsrPlugin_mie_MEIE <= 1'b0; + CsrPlugin_mie_MTIE <= 1'b0; + CsrPlugin_mie_MSIE <= 1'b0; + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_decode <= 1'b0; + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_execute <= 1'b0; + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_memory <= 1'b0; + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_writeBack <= 1'b0; + CsrPlugin_interrupt_valid <= 1'b0; + CsrPlugin_lastStageWasWfi <= 1'b0; + CsrPlugin_pipelineLiberator_pcValids_0 <= 1'b0; + CsrPlugin_pipelineLiberator_pcValids_1 <= 1'b0; + CsrPlugin_pipelineLiberator_pcValids_2 <= 1'b0; + CsrPlugin_hadException <= 1'b0; + execute_CsrPlugin_wfiWake <= 1'b0; + memory_DivPlugin_div_counter_value <= 6'h0; + _zz_CsrPlugin_csrMapping_readDataInit <= 32'h0; + execute_CfuPlugin_hold <= 1'b0; + execute_CfuPlugin_fired <= 1'b0; + CfuPlugin_bus_rsp_rValid <= 1'b0; + execute_arbitration_isValid <= 1'b0; + memory_arbitration_isValid <= 1'b0; + writeBack_arbitration_isValid <= 1'b0; + execute_to_memory_CfuPlugin_CFU_IN_FLIGHT <= 1'b0; + _zz_iBusWishbone_ADR <= 3'b000; + _zz_iBus_rsp_valid <= 1'b0; + _zz_dBus_cmd_ready <= 3'b000; + _zz_dBus_rsp_valid <= 1'b0; + end else begin + if(IBusCachedPlugin_fetchPc_correction) begin + IBusCachedPlugin_fetchPc_correctionReg <= 1'b1; + end + if(IBusCachedPlugin_fetchPc_output_fire) begin + IBusCachedPlugin_fetchPc_correctionReg <= 1'b0; + end + IBusCachedPlugin_fetchPc_booted <= 1'b1; + if(when_Fetcher_l131) begin + IBusCachedPlugin_fetchPc_inc <= 1'b0; + end + if(IBusCachedPlugin_fetchPc_output_fire_1) begin + IBusCachedPlugin_fetchPc_inc <= 1'b1; + end + if(when_Fetcher_l131_1) begin + IBusCachedPlugin_fetchPc_inc <= 1'b0; + end + if(when_Fetcher_l158) begin + IBusCachedPlugin_fetchPc_pcReg <= IBusCachedPlugin_fetchPc_pc; + end + if(IBusCachedPlugin_iBusRsp_flush) begin + _zz_IBusCachedPlugin_iBusRsp_stages_0_output_ready_2 <= 1'b0; + end + if(_zz_IBusCachedPlugin_iBusRsp_stages_0_output_ready) begin + _zz_IBusCachedPlugin_iBusRsp_stages_0_output_ready_2 <= (IBusCachedPlugin_iBusRsp_stages_0_output_valid && (! 1'b0)); + end + if(IBusCachedPlugin_iBusRsp_flush) begin + _zz_IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_valid <= 1'b0; + end + if(IBusCachedPlugin_iBusRsp_stages_1_output_ready) begin + _zz_IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_valid <= (IBusCachedPlugin_iBusRsp_stages_1_output_valid && (! IBusCachedPlugin_iBusRsp_flush)); + end + if(IBusCachedPlugin_fetchPc_flushed) begin + IBusCachedPlugin_injector_nextPcCalc_valids_0 <= 1'b0; + end + if(when_Fetcher_l329) begin + IBusCachedPlugin_injector_nextPcCalc_valids_0 <= 1'b1; + end + if(IBusCachedPlugin_fetchPc_flushed) begin + IBusCachedPlugin_injector_nextPcCalc_valids_1 <= 1'b0; + end + if(when_Fetcher_l329_1) begin + IBusCachedPlugin_injector_nextPcCalc_valids_1 <= IBusCachedPlugin_injector_nextPcCalc_valids_0; + end + if(IBusCachedPlugin_fetchPc_flushed) begin + IBusCachedPlugin_injector_nextPcCalc_valids_1 <= 1'b0; + end + if(IBusCachedPlugin_fetchPc_flushed) begin + IBusCachedPlugin_injector_nextPcCalc_valids_2 <= 1'b0; + end + if(when_Fetcher_l329_2) begin + IBusCachedPlugin_injector_nextPcCalc_valids_2 <= IBusCachedPlugin_injector_nextPcCalc_valids_1; + end + if(IBusCachedPlugin_fetchPc_flushed) begin + IBusCachedPlugin_injector_nextPcCalc_valids_2 <= 1'b0; + end + if(IBusCachedPlugin_fetchPc_flushed) begin + IBusCachedPlugin_injector_nextPcCalc_valids_3 <= 1'b0; + end + if(when_Fetcher_l329_3) begin + IBusCachedPlugin_injector_nextPcCalc_valids_3 <= IBusCachedPlugin_injector_nextPcCalc_valids_2; + end + if(IBusCachedPlugin_fetchPc_flushed) begin + IBusCachedPlugin_injector_nextPcCalc_valids_3 <= 1'b0; + end + if(IBusCachedPlugin_fetchPc_flushed) begin + IBusCachedPlugin_injector_nextPcCalc_valids_4 <= 1'b0; + end + if(when_Fetcher_l329_4) begin + IBusCachedPlugin_injector_nextPcCalc_valids_4 <= IBusCachedPlugin_injector_nextPcCalc_valids_3; + end + if(IBusCachedPlugin_fetchPc_flushed) begin + IBusCachedPlugin_injector_nextPcCalc_valids_4 <= 1'b0; + end + if(iBus_rsp_valid) begin + IBusCachedPlugin_rspCounter <= (IBusCachedPlugin_rspCounter + 32'h00000001); + end + if(dataCache_1_io_mem_cmd_valid) begin + dataCache_1_io_mem_cmd_rValid <= 1'b1; + end + if(dataCache_1_io_mem_cmd_s2mPipe_ready) begin + dataCache_1_io_mem_cmd_rValid <= 1'b0; + end + if(dataCache_1_io_mem_cmd_s2mPipe_ready) begin + dataCache_1_io_mem_cmd_s2mPipe_rValid <= dataCache_1_io_mem_cmd_s2mPipe_valid; + end + if(dBus_rsp_valid) begin + DBusCachedPlugin_rspCounter <= (DBusCachedPlugin_rspCounter + 32'h00000001); + end + _zz_7 <= 1'b0; + HazardSimplePlugin_writeBackBuffer_valid <= HazardSimplePlugin_writeBackWrites_valid; + if(when_CsrPlugin_l909) begin + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_decode <= 1'b0; + end else begin + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_decode <= CsrPlugin_exceptionPortCtrl_exceptionValids_decode; + end + if(when_CsrPlugin_l909_1) begin + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_execute <= (CsrPlugin_exceptionPortCtrl_exceptionValids_decode && (! decode_arbitration_isStuck)); + end else begin + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_execute <= CsrPlugin_exceptionPortCtrl_exceptionValids_execute; + end + if(when_CsrPlugin_l909_2) begin + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_memory <= (CsrPlugin_exceptionPortCtrl_exceptionValids_execute && (! execute_arbitration_isStuck)); + end else begin + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_memory <= CsrPlugin_exceptionPortCtrl_exceptionValids_memory; + end + if(when_CsrPlugin_l909_3) begin + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_writeBack <= (CsrPlugin_exceptionPortCtrl_exceptionValids_memory && (! memory_arbitration_isStuck)); + end else begin + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_writeBack <= 1'b0; + end + CsrPlugin_interrupt_valid <= 1'b0; + if(when_CsrPlugin_l946) begin + if(when_CsrPlugin_l952) begin + CsrPlugin_interrupt_valid <= 1'b1; + end + if(when_CsrPlugin_l952_1) begin + CsrPlugin_interrupt_valid <= 1'b1; + end + if(when_CsrPlugin_l952_2) begin + CsrPlugin_interrupt_valid <= 1'b1; + end + end + CsrPlugin_lastStageWasWfi <= (writeBack_arbitration_isFiring && (writeBack_ENV_CTRL == `EnvCtrlEnum_binary_sequential_WFI)); + if(CsrPlugin_pipelineLiberator_active) begin + if(when_CsrPlugin_l980) begin + CsrPlugin_pipelineLiberator_pcValids_0 <= 1'b1; + end + if(when_CsrPlugin_l980_1) begin + CsrPlugin_pipelineLiberator_pcValids_1 <= CsrPlugin_pipelineLiberator_pcValids_0; + end + if(when_CsrPlugin_l980_2) begin + CsrPlugin_pipelineLiberator_pcValids_2 <= CsrPlugin_pipelineLiberator_pcValids_1; + end + end + if(when_CsrPlugin_l985) begin + CsrPlugin_pipelineLiberator_pcValids_0 <= 1'b0; + CsrPlugin_pipelineLiberator_pcValids_1 <= 1'b0; + CsrPlugin_pipelineLiberator_pcValids_2 <= 1'b0; + end + if(CsrPlugin_interruptJump) begin + CsrPlugin_interrupt_valid <= 1'b0; + end + CsrPlugin_hadException <= CsrPlugin_exception; + if(when_CsrPlugin_l1019) begin + case(CsrPlugin_targetPrivilege) + 2'b11 : begin + CsrPlugin_mstatus_MIE <= 1'b0; + CsrPlugin_mstatus_MPIE <= CsrPlugin_mstatus_MIE; + CsrPlugin_mstatus_MPP <= CsrPlugin_privilege; + end + default : begin + end + endcase + end + if(when_CsrPlugin_l1064) begin + case(switch_CsrPlugin_l1068) + 2'b11 : begin + CsrPlugin_mstatus_MPP <= 2'b00; + CsrPlugin_mstatus_MIE <= CsrPlugin_mstatus_MPIE; + CsrPlugin_mstatus_MPIE <= 1'b1; + end + default : begin + end + endcase + end + execute_CsrPlugin_wfiWake <= (({_zz_when_CsrPlugin_l952_2,{_zz_when_CsrPlugin_l952_1,_zz_when_CsrPlugin_l952}} != 3'b000) || CsrPlugin_thirdPartyWake); + memory_DivPlugin_div_counter_value <= memory_DivPlugin_div_counter_valueNext; + if(execute_CfuPlugin_schedule) begin + execute_CfuPlugin_hold <= 1'b1; + end + if(CfuPlugin_bus_cmd_ready) begin + execute_CfuPlugin_hold <= 1'b0; + end + if(CfuPlugin_bus_cmd_fire) begin + execute_CfuPlugin_fired <= 1'b1; + end + if(when_CfuPlugin_l171) begin + execute_CfuPlugin_fired <= 1'b0; + end + if(CfuPlugin_bus_rsp_valid) begin + CfuPlugin_bus_rsp_rValid <= 1'b1; + end + if(CfuPlugin_bus_rsp_rsp_ready) begin + CfuPlugin_bus_rsp_rValid <= 1'b0; + end + if(when_Pipeline_l124_61) begin + execute_to_memory_CfuPlugin_CFU_IN_FLIGHT <= _zz_execute_to_memory_CfuPlugin_CFU_IN_FLIGHT; + end + if(when_Pipeline_l151) begin + execute_arbitration_isValid <= 1'b0; + end + if(when_Pipeline_l154) begin + execute_arbitration_isValid <= decode_arbitration_isValid; + end + if(when_Pipeline_l151_1) begin + memory_arbitration_isValid <= 1'b0; + end + if(when_Pipeline_l154_1) begin + memory_arbitration_isValid <= execute_arbitration_isValid; + end + if(when_Pipeline_l151_2) begin + writeBack_arbitration_isValid <= 1'b0; + end + if(when_Pipeline_l154_2) begin + writeBack_arbitration_isValid <= memory_arbitration_isValid; + end + if(execute_CsrPlugin_csr_769) begin + if(execute_CsrPlugin_writeEnable) begin + CsrPlugin_misa_base <= CsrPlugin_csrMapping_writeDataSignal[31 : 30]; + CsrPlugin_misa_extensions <= CsrPlugin_csrMapping_writeDataSignal[25 : 0]; + end + end + if(execute_CsrPlugin_csr_768) begin + if(execute_CsrPlugin_writeEnable) begin + CsrPlugin_mstatus_MPP <= CsrPlugin_csrMapping_writeDataSignal[12 : 11]; + CsrPlugin_mstatus_MPIE <= CsrPlugin_csrMapping_writeDataSignal[7]; + CsrPlugin_mstatus_MIE <= CsrPlugin_csrMapping_writeDataSignal[3]; + end + end + if(execute_CsrPlugin_csr_772) begin + if(execute_CsrPlugin_writeEnable) begin + CsrPlugin_mie_MEIE <= CsrPlugin_csrMapping_writeDataSignal[11]; + CsrPlugin_mie_MTIE <= CsrPlugin_csrMapping_writeDataSignal[7]; + CsrPlugin_mie_MSIE <= CsrPlugin_csrMapping_writeDataSignal[3]; + end + end + if(execute_CsrPlugin_csr_3008) begin + if(execute_CsrPlugin_writeEnable) begin + _zz_CsrPlugin_csrMapping_readDataInit <= CsrPlugin_csrMapping_writeDataSignal[31 : 0]; + end + end + if(when_InstructionCache_l239) begin + if(iBusWishbone_ACK) begin + _zz_iBusWishbone_ADR <= (_zz_iBusWishbone_ADR + 3'b001); + end + end + _zz_iBus_rsp_valid <= (iBusWishbone_CYC && iBusWishbone_ACK); + if((_zz_dBus_cmd_ready_1 && _zz_dBus_cmd_ready_2)) begin + _zz_dBus_cmd_ready <= (_zz_dBus_cmd_ready + 3'b001); + if(_zz_dBus_cmd_ready_4) begin + _zz_dBus_cmd_ready <= 3'b000; + end + end + _zz_dBus_rsp_valid <= ((_zz_dBus_cmd_ready_1 && (! dBusWishbone_WE)) && dBusWishbone_ACK); + end + end + + always @(posedge clk) begin + if(IBusCachedPlugin_iBusRsp_stages_1_output_ready) begin + _zz_IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_payload <= IBusCachedPlugin_iBusRsp_stages_1_output_payload; + end + if(IBusCachedPlugin_iBusRsp_stages_1_input_ready) begin + IBusCachedPlugin_s1_tightlyCoupledHit <= IBusCachedPlugin_s0_tightlyCoupledHit; + end + if(IBusCachedPlugin_iBusRsp_stages_2_input_ready) begin + IBusCachedPlugin_s2_tightlyCoupledHit <= IBusCachedPlugin_s1_tightlyCoupledHit; + end + if(dataCache_1_io_mem_cmd_ready) begin + dataCache_1_io_mem_cmd_rData_wr <= dataCache_1_io_mem_cmd_payload_wr; + dataCache_1_io_mem_cmd_rData_uncached <= dataCache_1_io_mem_cmd_payload_uncached; + dataCache_1_io_mem_cmd_rData_address <= dataCache_1_io_mem_cmd_payload_address; + dataCache_1_io_mem_cmd_rData_data <= dataCache_1_io_mem_cmd_payload_data; + dataCache_1_io_mem_cmd_rData_mask <= dataCache_1_io_mem_cmd_payload_mask; + dataCache_1_io_mem_cmd_rData_size <= dataCache_1_io_mem_cmd_payload_size; + dataCache_1_io_mem_cmd_rData_last <= dataCache_1_io_mem_cmd_payload_last; + end + if(dataCache_1_io_mem_cmd_s2mPipe_ready) begin + dataCache_1_io_mem_cmd_s2mPipe_rData_wr <= dataCache_1_io_mem_cmd_s2mPipe_payload_wr; + dataCache_1_io_mem_cmd_s2mPipe_rData_uncached <= dataCache_1_io_mem_cmd_s2mPipe_payload_uncached; + dataCache_1_io_mem_cmd_s2mPipe_rData_address <= dataCache_1_io_mem_cmd_s2mPipe_payload_address; + dataCache_1_io_mem_cmd_s2mPipe_rData_data <= dataCache_1_io_mem_cmd_s2mPipe_payload_data; + dataCache_1_io_mem_cmd_s2mPipe_rData_mask <= dataCache_1_io_mem_cmd_s2mPipe_payload_mask; + dataCache_1_io_mem_cmd_s2mPipe_rData_size <= dataCache_1_io_mem_cmd_s2mPipe_payload_size; + dataCache_1_io_mem_cmd_s2mPipe_rData_last <= dataCache_1_io_mem_cmd_s2mPipe_payload_last; + end + HazardSimplePlugin_writeBackBuffer_payload_address <= HazardSimplePlugin_writeBackWrites_payload_address; + HazardSimplePlugin_writeBackBuffer_payload_data <= HazardSimplePlugin_writeBackWrites_payload_data; + CsrPlugin_mip_MEIP <= externalInterrupt; + CsrPlugin_mip_MTIP <= timerInterrupt; + CsrPlugin_mip_MSIP <= softwareInterrupt; + CsrPlugin_mcycle <= (CsrPlugin_mcycle + 64'h0000000000000001); + if(writeBack_arbitration_isFiring) begin + CsrPlugin_minstret <= (CsrPlugin_minstret + 64'h0000000000000001); + end + if(_zz_when) begin + CsrPlugin_exceptionPortCtrl_exceptionContext_code <= (_zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_1 ? IBusCachedPlugin_decodeExceptionPort_payload_code : decodeExceptionPort_payload_code); + CsrPlugin_exceptionPortCtrl_exceptionContext_badAddr <= (_zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_1 ? IBusCachedPlugin_decodeExceptionPort_payload_badAddr : decodeExceptionPort_payload_badAddr); + end + if(_zz_when_1) begin + CsrPlugin_exceptionPortCtrl_exceptionContext_code <= (_zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_3 ? BranchPlugin_branchExceptionPort_payload_code : CsrPlugin_selfException_payload_code); + CsrPlugin_exceptionPortCtrl_exceptionContext_badAddr <= (_zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_3 ? BranchPlugin_branchExceptionPort_payload_badAddr : CsrPlugin_selfException_payload_badAddr); + end + if(DBusCachedPlugin_exceptionBus_valid) begin + CsrPlugin_exceptionPortCtrl_exceptionContext_code <= DBusCachedPlugin_exceptionBus_payload_code; + CsrPlugin_exceptionPortCtrl_exceptionContext_badAddr <= DBusCachedPlugin_exceptionBus_payload_badAddr; + end + if(when_CsrPlugin_l946) begin + if(when_CsrPlugin_l952) begin + CsrPlugin_interrupt_code <= 4'b0111; + CsrPlugin_interrupt_targetPrivilege <= 2'b11; + end + if(when_CsrPlugin_l952_1) begin + CsrPlugin_interrupt_code <= 4'b0011; + CsrPlugin_interrupt_targetPrivilege <= 2'b11; + end + if(when_CsrPlugin_l952_2) begin + CsrPlugin_interrupt_code <= 4'b1011; + CsrPlugin_interrupt_targetPrivilege <= 2'b11; + end + end + if(when_CsrPlugin_l1019) begin + case(CsrPlugin_targetPrivilege) + 2'b11 : begin + CsrPlugin_mcause_interrupt <= (! CsrPlugin_hadException); + CsrPlugin_mcause_exceptionCode <= CsrPlugin_trapCause; + CsrPlugin_mepc <= writeBack_PC; + if(CsrPlugin_hadException) begin + CsrPlugin_mtval <= CsrPlugin_exceptionPortCtrl_exceptionContext_badAddr; + end + end + default : begin + end + endcase + end + if(when_MulDivIterativePlugin_l126) begin + memory_DivPlugin_div_done <= 1'b1; + end + if(when_MulDivIterativePlugin_l126_1) begin + memory_DivPlugin_div_done <= 1'b0; + end + if(when_MulDivIterativePlugin_l128) begin + if(when_MulDivIterativePlugin_l132) begin + memory_DivPlugin_rs1[31 : 0] <= memory_DivPlugin_div_stage_0_outNumerator; + memory_DivPlugin_accumulator[31 : 0] <= memory_DivPlugin_div_stage_0_outRemainder; + if(when_MulDivIterativePlugin_l151) begin + memory_DivPlugin_div_result <= _zz_memory_DivPlugin_div_result_1[31:0]; + end + end + end + if(when_MulDivIterativePlugin_l162) begin + memory_DivPlugin_accumulator <= 65'h0; + memory_DivPlugin_rs1 <= ((_zz_memory_DivPlugin_rs1 ? (~ _zz_memory_DivPlugin_rs1_1) : _zz_memory_DivPlugin_rs1_1) + _zz_memory_DivPlugin_rs1_2); + memory_DivPlugin_rs2 <= ((_zz_memory_DivPlugin_rs2 ? (~ execute_RS2) : execute_RS2) + _zz_memory_DivPlugin_rs2_1); + memory_DivPlugin_div_needRevert <= ((_zz_memory_DivPlugin_rs1 ^ (_zz_memory_DivPlugin_rs2 && (! execute_INSTRUCTION[13]))) && (! (((execute_RS2 == 32'h0) && execute_IS_RS2_SIGNED) && (! execute_INSTRUCTION[13])))); + end + externalInterruptArray_regNext <= externalInterruptArray; + if(CfuPlugin_bus_rsp_ready) begin + CfuPlugin_bus_rsp_rData_outputs_0 <= CfuPlugin_bus_rsp_payload_outputs_0; + end + if(when_Pipeline_l124) begin + decode_to_execute_PC <= decode_PC; + end + if(when_Pipeline_l124_1) begin + execute_to_memory_PC <= _zz_execute_SRC2; + end + if(when_Pipeline_l124_2) begin + memory_to_writeBack_PC <= memory_PC; + end + if(when_Pipeline_l124_3) begin + decode_to_execute_INSTRUCTION <= decode_INSTRUCTION; + end + if(when_Pipeline_l124_4) begin + execute_to_memory_INSTRUCTION <= execute_INSTRUCTION; + end + if(when_Pipeline_l124_5) begin + memory_to_writeBack_INSTRUCTION <= memory_INSTRUCTION; + end + if(when_Pipeline_l124_6) begin + decode_to_execute_FORMAL_PC_NEXT <= _zz_decode_to_execute_FORMAL_PC_NEXT; + end + if(when_Pipeline_l124_7) begin + execute_to_memory_FORMAL_PC_NEXT <= _zz_execute_to_memory_FORMAL_PC_NEXT; + end + if(when_Pipeline_l124_8) begin + memory_to_writeBack_FORMAL_PC_NEXT <= memory_FORMAL_PC_NEXT; + end + if(when_Pipeline_l124_9) begin + decode_to_execute_MEMORY_FORCE_CONSTISTENCY <= decode_MEMORY_FORCE_CONSTISTENCY; + end + if(when_Pipeline_l124_10) begin + decode_to_execute_SRC1_CTRL <= _zz_decode_to_execute_SRC1_CTRL; + end + if(when_Pipeline_l124_11) begin + decode_to_execute_SRC_USE_SUB_LESS <= decode_SRC_USE_SUB_LESS; + end + if(when_Pipeline_l124_12) begin + decode_to_execute_MEMORY_ENABLE <= decode_MEMORY_ENABLE; + end + if(when_Pipeline_l124_13) begin + execute_to_memory_MEMORY_ENABLE <= execute_MEMORY_ENABLE; + end + if(when_Pipeline_l124_14) begin + memory_to_writeBack_MEMORY_ENABLE <= memory_MEMORY_ENABLE; + end + if(when_Pipeline_l124_15) begin + decode_to_execute_ALU_CTRL <= _zz_decode_to_execute_ALU_CTRL; + end + if(when_Pipeline_l124_16) begin + decode_to_execute_SRC2_CTRL <= _zz_decode_to_execute_SRC2_CTRL; + end + if(when_Pipeline_l124_17) begin + decode_to_execute_REGFILE_WRITE_VALID <= decode_REGFILE_WRITE_VALID; + end + if(when_Pipeline_l124_18) begin + execute_to_memory_REGFILE_WRITE_VALID <= execute_REGFILE_WRITE_VALID; + end + if(when_Pipeline_l124_19) begin + memory_to_writeBack_REGFILE_WRITE_VALID <= memory_REGFILE_WRITE_VALID; + end + if(when_Pipeline_l124_20) begin + decode_to_execute_BYPASSABLE_EXECUTE_STAGE <= decode_BYPASSABLE_EXECUTE_STAGE; + end + if(when_Pipeline_l124_21) begin + decode_to_execute_BYPASSABLE_MEMORY_STAGE <= decode_BYPASSABLE_MEMORY_STAGE; + end + if(when_Pipeline_l124_22) begin + execute_to_memory_BYPASSABLE_MEMORY_STAGE <= execute_BYPASSABLE_MEMORY_STAGE; + end + if(when_Pipeline_l124_23) begin + decode_to_execute_MEMORY_WR <= decode_MEMORY_WR; + end + if(when_Pipeline_l124_24) begin + execute_to_memory_MEMORY_WR <= execute_MEMORY_WR; + end + if(when_Pipeline_l124_25) begin + memory_to_writeBack_MEMORY_WR <= memory_MEMORY_WR; + end + if(when_Pipeline_l124_26) begin + decode_to_execute_MEMORY_MANAGMENT <= decode_MEMORY_MANAGMENT; + end + if(when_Pipeline_l124_27) begin + decode_to_execute_SRC_LESS_UNSIGNED <= decode_SRC_LESS_UNSIGNED; + end + if(when_Pipeline_l124_28) begin + decode_to_execute_ALU_BITWISE_CTRL <= _zz_decode_to_execute_ALU_BITWISE_CTRL; + end + if(when_Pipeline_l124_29) begin + decode_to_execute_SHIFT_CTRL <= _zz_decode_to_execute_SHIFT_CTRL; + end + if(when_Pipeline_l124_30) begin + execute_to_memory_SHIFT_CTRL <= _zz_execute_to_memory_SHIFT_CTRL; + end + if(when_Pipeline_l124_31) begin + decode_to_execute_BRANCH_CTRL <= _zz_decode_to_execute_BRANCH_CTRL; + end + if(when_Pipeline_l124_32) begin + decode_to_execute_IS_CSR <= decode_IS_CSR; + end + if(when_Pipeline_l124_33) begin + decode_to_execute_ENV_CTRL <= _zz_decode_to_execute_ENV_CTRL; + end + if(when_Pipeline_l124_34) begin + execute_to_memory_ENV_CTRL <= _zz_execute_to_memory_ENV_CTRL; + end + if(when_Pipeline_l124_35) begin + memory_to_writeBack_ENV_CTRL <= _zz_memory_to_writeBack_ENV_CTRL; + end + if(when_Pipeline_l124_36) begin + decode_to_execute_IS_MUL <= decode_IS_MUL; + end + if(when_Pipeline_l124_37) begin + execute_to_memory_IS_MUL <= execute_IS_MUL; + end + if(when_Pipeline_l124_38) begin + memory_to_writeBack_IS_MUL <= memory_IS_MUL; + end + if(when_Pipeline_l124_39) begin + decode_to_execute_IS_DIV <= decode_IS_DIV; + end + if(when_Pipeline_l124_40) begin + execute_to_memory_IS_DIV <= execute_IS_DIV; + end + if(when_Pipeline_l124_41) begin + decode_to_execute_IS_RS1_SIGNED <= decode_IS_RS1_SIGNED; + end + if(when_Pipeline_l124_42) begin + decode_to_execute_IS_RS2_SIGNED <= decode_IS_RS2_SIGNED; + end + if(when_Pipeline_l124_43) begin + decode_to_execute_CfuPlugin_CFU_ENABLE <= decode_CfuPlugin_CFU_ENABLE; + end + if(when_Pipeline_l124_44) begin + decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND <= _zz_decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND; + end + if(when_Pipeline_l124_45) begin + decode_to_execute_RS1 <= decode_RS1; + end + if(when_Pipeline_l124_46) begin + decode_to_execute_RS2 <= decode_RS2; + end + if(when_Pipeline_l124_47) begin + decode_to_execute_SRC2_FORCE_ZERO <= decode_SRC2_FORCE_ZERO; + end + if(when_Pipeline_l124_48) begin + decode_to_execute_PREDICTION_HAD_BRANCHED2 <= decode_PREDICTION_HAD_BRANCHED2; + end + if(when_Pipeline_l124_49) begin + decode_to_execute_CSR_WRITE_OPCODE <= decode_CSR_WRITE_OPCODE; + end + if(when_Pipeline_l124_50) begin + decode_to_execute_CSR_READ_OPCODE <= decode_CSR_READ_OPCODE; + end + if(when_Pipeline_l124_51) begin + execute_to_memory_MEMORY_STORE_DATA_RF <= execute_MEMORY_STORE_DATA_RF; + end + if(when_Pipeline_l124_52) begin + memory_to_writeBack_MEMORY_STORE_DATA_RF <= memory_MEMORY_STORE_DATA_RF; + end + if(when_Pipeline_l124_53) begin + execute_to_memory_REGFILE_WRITE_DATA <= _zz_decode_RS2; + end + if(when_Pipeline_l124_54) begin + memory_to_writeBack_REGFILE_WRITE_DATA <= _zz_decode_RS2_1; + end + if(when_Pipeline_l124_55) begin + execute_to_memory_SHIFT_RIGHT <= execute_SHIFT_RIGHT; + end + if(when_Pipeline_l124_56) begin + execute_to_memory_MUL_LL <= execute_MUL_LL; + end + if(when_Pipeline_l124_57) begin + execute_to_memory_MUL_LH <= execute_MUL_LH; + end + if(when_Pipeline_l124_58) begin + execute_to_memory_MUL_HL <= execute_MUL_HL; + end + if(when_Pipeline_l124_59) begin + execute_to_memory_MUL_HH <= execute_MUL_HH; + end + if(when_Pipeline_l124_60) begin + memory_to_writeBack_MUL_HH <= memory_MUL_HH; + end + if(when_Pipeline_l124_62) begin + memory_to_writeBack_CfuPlugin_CFU_IN_FLIGHT <= _zz_memory_to_writeBack_CfuPlugin_CFU_IN_FLIGHT; + end + if(when_Pipeline_l124_63) begin + memory_to_writeBack_MUL_LOW <= memory_MUL_LOW; + end + if(when_CsrPlugin_l1264) begin + execute_CsrPlugin_csr_3264 <= (decode_INSTRUCTION[31 : 20] == 12'hcc0); + end + if(when_CsrPlugin_l1264_1) begin + execute_CsrPlugin_csr_3857 <= (decode_INSTRUCTION[31 : 20] == 12'hf11); + end + if(when_CsrPlugin_l1264_2) begin + execute_CsrPlugin_csr_3858 <= (decode_INSTRUCTION[31 : 20] == 12'hf12); + end + if(when_CsrPlugin_l1264_3) begin + execute_CsrPlugin_csr_3859 <= (decode_INSTRUCTION[31 : 20] == 12'hf13); + end + if(when_CsrPlugin_l1264_4) begin + execute_CsrPlugin_csr_3860 <= (decode_INSTRUCTION[31 : 20] == 12'hf14); + end + if(when_CsrPlugin_l1264_5) begin + execute_CsrPlugin_csr_769 <= (decode_INSTRUCTION[31 : 20] == 12'h301); + end + if(when_CsrPlugin_l1264_6) begin + execute_CsrPlugin_csr_768 <= (decode_INSTRUCTION[31 : 20] == 12'h300); + end + if(when_CsrPlugin_l1264_7) begin + execute_CsrPlugin_csr_836 <= (decode_INSTRUCTION[31 : 20] == 12'h344); + end + if(when_CsrPlugin_l1264_8) begin + execute_CsrPlugin_csr_772 <= (decode_INSTRUCTION[31 : 20] == 12'h304); + end + if(when_CsrPlugin_l1264_9) begin + execute_CsrPlugin_csr_773 <= (decode_INSTRUCTION[31 : 20] == 12'h305); + end + if(when_CsrPlugin_l1264_10) begin + execute_CsrPlugin_csr_833 <= (decode_INSTRUCTION[31 : 20] == 12'h341); + end + if(when_CsrPlugin_l1264_11) begin + execute_CsrPlugin_csr_832 <= (decode_INSTRUCTION[31 : 20] == 12'h340); + end + if(when_CsrPlugin_l1264_12) begin + execute_CsrPlugin_csr_834 <= (decode_INSTRUCTION[31 : 20] == 12'h342); + end + if(when_CsrPlugin_l1264_13) begin + execute_CsrPlugin_csr_835 <= (decode_INSTRUCTION[31 : 20] == 12'h343); + end + if(when_CsrPlugin_l1264_14) begin + execute_CsrPlugin_csr_2816 <= (decode_INSTRUCTION[31 : 20] == 12'hb00); + end + if(when_CsrPlugin_l1264_15) begin + execute_CsrPlugin_csr_2944 <= (decode_INSTRUCTION[31 : 20] == 12'hb80); + end + if(when_CsrPlugin_l1264_16) begin + execute_CsrPlugin_csr_2818 <= (decode_INSTRUCTION[31 : 20] == 12'hb02); + end + if(when_CsrPlugin_l1264_17) begin + execute_CsrPlugin_csr_2946 <= (decode_INSTRUCTION[31 : 20] == 12'hb82); + end + if(when_CsrPlugin_l1264_18) begin + execute_CsrPlugin_csr_3072 <= (decode_INSTRUCTION[31 : 20] == 12'hc00); + end + if(when_CsrPlugin_l1264_19) begin + execute_CsrPlugin_csr_3200 <= (decode_INSTRUCTION[31 : 20] == 12'hc80); + end + if(when_CsrPlugin_l1264_20) begin + execute_CsrPlugin_csr_3074 <= (decode_INSTRUCTION[31 : 20] == 12'hc02); + end + if(when_CsrPlugin_l1264_21) begin + execute_CsrPlugin_csr_3202 <= (decode_INSTRUCTION[31 : 20] == 12'hc82); + end + if(when_CsrPlugin_l1264_22) begin + execute_CsrPlugin_csr_3008 <= (decode_INSTRUCTION[31 : 20] == 12'hbc0); + end + if(when_CsrPlugin_l1264_23) begin + execute_CsrPlugin_csr_4032 <= (decode_INSTRUCTION[31 : 20] == 12'hfc0); + end + if(execute_CsrPlugin_csr_836) begin + if(execute_CsrPlugin_writeEnable) begin + CsrPlugin_mip_MSIP <= CsrPlugin_csrMapping_writeDataSignal[3]; + end + end + if(execute_CsrPlugin_csr_773) begin + if(execute_CsrPlugin_writeEnable) begin + CsrPlugin_mtvec_base <= CsrPlugin_csrMapping_writeDataSignal[31 : 2]; + CsrPlugin_mtvec_mode <= CsrPlugin_csrMapping_writeDataSignal[1 : 0]; + end + end + if(execute_CsrPlugin_csr_833) begin + if(execute_CsrPlugin_writeEnable) begin + CsrPlugin_mepc <= CsrPlugin_csrMapping_writeDataSignal[31 : 0]; + end + end + if(execute_CsrPlugin_csr_832) begin + if(execute_CsrPlugin_writeEnable) begin + CsrPlugin_mscratch <= CsrPlugin_csrMapping_writeDataSignal[31 : 0]; + end + end + if(execute_CsrPlugin_csr_834) begin + if(execute_CsrPlugin_writeEnable) begin + CsrPlugin_mcause_interrupt <= CsrPlugin_csrMapping_writeDataSignal[31]; + CsrPlugin_mcause_exceptionCode <= CsrPlugin_csrMapping_writeDataSignal[3 : 0]; + end + end + if(execute_CsrPlugin_csr_835) begin + if(execute_CsrPlugin_writeEnable) begin + CsrPlugin_mtval <= CsrPlugin_csrMapping_writeDataSignal[31 : 0]; + end + end + if(execute_CsrPlugin_csr_2816) begin + if(execute_CsrPlugin_writeEnable) begin + CsrPlugin_mcycle[31 : 0] <= CsrPlugin_csrMapping_writeDataSignal[31 : 0]; + end + end + if(execute_CsrPlugin_csr_2944) begin + if(execute_CsrPlugin_writeEnable) begin + CsrPlugin_mcycle[63 : 32] <= CsrPlugin_csrMapping_writeDataSignal[31 : 0]; + end + end + if(execute_CsrPlugin_csr_2818) begin + if(execute_CsrPlugin_writeEnable) begin + CsrPlugin_minstret[31 : 0] <= CsrPlugin_csrMapping_writeDataSignal[31 : 0]; + end + end + if(execute_CsrPlugin_csr_2946) begin + if(execute_CsrPlugin_writeEnable) begin + CsrPlugin_minstret[63 : 32] <= CsrPlugin_csrMapping_writeDataSignal[31 : 0]; + end + end + iBusWishbone_DAT_MISO_regNext <= iBusWishbone_DAT_MISO; + dBusWishbone_DAT_MISO_regNext <= dBusWishbone_DAT_MISO; + end + + +endmodule + +module DataCache ( + input io_cpu_execute_isValid, + input [31:0] io_cpu_execute_address, + output reg io_cpu_execute_haltIt, + input io_cpu_execute_args_wr, + input [1:0] io_cpu_execute_args_size, + input io_cpu_execute_args_totalyConsistent, + output io_cpu_execute_refilling, + input io_cpu_memory_isValid, + input io_cpu_memory_isStuck, + output io_cpu_memory_isWrite, + input [31:0] io_cpu_memory_address, + input [31:0] io_cpu_memory_mmuRsp_physicalAddress, + input io_cpu_memory_mmuRsp_isIoAccess, + input io_cpu_memory_mmuRsp_isPaging, + input io_cpu_memory_mmuRsp_allowRead, + input io_cpu_memory_mmuRsp_allowWrite, + input io_cpu_memory_mmuRsp_allowExecute, + input io_cpu_memory_mmuRsp_exception, + input io_cpu_memory_mmuRsp_refilling, + input io_cpu_memory_mmuRsp_bypassTranslation, + input io_cpu_writeBack_isValid, + input io_cpu_writeBack_isStuck, + input io_cpu_writeBack_isUser, + output reg io_cpu_writeBack_haltIt, + output io_cpu_writeBack_isWrite, + input [31:0] io_cpu_writeBack_storeData, + output reg [31:0] io_cpu_writeBack_data, + input [31:0] io_cpu_writeBack_address, + output io_cpu_writeBack_mmuException, + output io_cpu_writeBack_unalignedAccess, + output reg io_cpu_writeBack_accessError, + output io_cpu_writeBack_keepMemRspData, + input io_cpu_writeBack_fence_SW, + input io_cpu_writeBack_fence_SR, + input io_cpu_writeBack_fence_SO, + input io_cpu_writeBack_fence_SI, + input io_cpu_writeBack_fence_PW, + input io_cpu_writeBack_fence_PR, + input io_cpu_writeBack_fence_PO, + input io_cpu_writeBack_fence_PI, + input [3:0] io_cpu_writeBack_fence_FM, + output io_cpu_writeBack_exclusiveOk, + output reg io_cpu_redo, + input io_cpu_flush_valid, + output io_cpu_flush_ready, + output reg io_mem_cmd_valid, + input io_mem_cmd_ready, + output reg io_mem_cmd_payload_wr, + output io_mem_cmd_payload_uncached, + output reg [31:0] io_mem_cmd_payload_address, + output [31:0] io_mem_cmd_payload_data, + output [3:0] io_mem_cmd_payload_mask, + output reg [2:0] io_mem_cmd_payload_size, + output io_mem_cmd_payload_last, + input io_mem_rsp_valid, + input io_mem_rsp_payload_last, + input [31:0] io_mem_rsp_payload_data, + input io_mem_rsp_payload_error, + input clk, + input reset +); + reg [21:0] _zz_ways_0_tags_port0; + reg [31:0] _zz_ways_0_data_port0; + wire [21:0] _zz_ways_0_tags_port; + wire [9:0] _zz_stage0_dataColisions; + wire [9:0] _zz__zz_stageA_dataColisions; + wire [0:0] _zz_when; + wire [2:0] _zz_loader_counter_valueNext; + wire [0:0] _zz_loader_counter_valueNext_1; + wire [1:0] _zz_loader_waysAllocator; + reg _zz_1; + reg _zz_2; + wire haltCpu; + reg tagsReadCmd_valid; + reg [6:0] tagsReadCmd_payload; + reg tagsWriteCmd_valid; + reg [0:0] tagsWriteCmd_payload_way; + reg [6:0] tagsWriteCmd_payload_address; + reg tagsWriteCmd_payload_data_valid; + reg tagsWriteCmd_payload_data_error; + reg [19:0] tagsWriteCmd_payload_data_address; + reg tagsWriteLastCmd_valid; + reg [0:0] tagsWriteLastCmd_payload_way; + reg [6:0] tagsWriteLastCmd_payload_address; + reg tagsWriteLastCmd_payload_data_valid; + reg tagsWriteLastCmd_payload_data_error; + reg [19:0] tagsWriteLastCmd_payload_data_address; + reg dataReadCmd_valid; + reg [9:0] dataReadCmd_payload; + reg dataWriteCmd_valid; + reg [0:0] dataWriteCmd_payload_way; + reg [9:0] dataWriteCmd_payload_address; + reg [31:0] dataWriteCmd_payload_data; + reg [3:0] dataWriteCmd_payload_mask; + wire _zz_ways_0_tagsReadRsp_valid; + wire ways_0_tagsReadRsp_valid; + wire ways_0_tagsReadRsp_error; + wire [19:0] ways_0_tagsReadRsp_address; + wire [21:0] _zz_ways_0_tagsReadRsp_valid_1; + wire _zz_ways_0_dataReadRspMem; + wire [31:0] ways_0_dataReadRspMem; + wire [31:0] ways_0_dataReadRsp; + wire when_DataCache_l634; + wire when_DataCache_l637; + wire when_DataCache_l656; + wire rspSync; + wire rspLast; + reg memCmdSent; + wire io_mem_cmd_fire; + wire when_DataCache_l678; + reg [3:0] _zz_stage0_mask; + wire [3:0] stage0_mask; + wire [0:0] stage0_dataColisions; + wire [0:0] stage0_wayInvalidate; + wire stage0_isAmo; + wire when_DataCache_l763; + reg stageA_request_wr; + reg [1:0] stageA_request_size; + reg stageA_request_totalyConsistent; + wire when_DataCache_l763_1; + reg [3:0] stageA_mask; + wire stageA_isAmo; + wire stageA_isLrsc; + wire [0:0] stageA_wayHits; + wire when_DataCache_l763_2; + reg [0:0] stageA_wayInvalidate; + wire when_DataCache_l763_3; + reg [0:0] stage0_dataColisions_regNextWhen; + wire [0:0] _zz_stageA_dataColisions; + wire [0:0] stageA_dataColisions; + wire when_DataCache_l814; + reg stageB_request_wr; + reg [1:0] stageB_request_size; + reg stageB_request_totalyConsistent; + reg stageB_mmuRspFreeze; + wire when_DataCache_l816; + reg [31:0] stageB_mmuRsp_physicalAddress; + reg stageB_mmuRsp_isIoAccess; + reg stageB_mmuRsp_isPaging; + reg stageB_mmuRsp_allowRead; + reg stageB_mmuRsp_allowWrite; + reg stageB_mmuRsp_allowExecute; + reg stageB_mmuRsp_exception; + reg stageB_mmuRsp_refilling; + reg stageB_mmuRsp_bypassTranslation; + wire when_DataCache_l813; + reg stageB_tagsReadRsp_0_valid; + reg stageB_tagsReadRsp_0_error; + reg [19:0] stageB_tagsReadRsp_0_address; + wire when_DataCache_l813_1; + reg [31:0] stageB_dataReadRsp_0; + wire when_DataCache_l812; + reg [0:0] stageB_wayInvalidate; + wire stageB_consistancyHazard; + wire when_DataCache_l812_1; + reg [0:0] stageB_dataColisions; + wire when_DataCache_l812_2; + reg stageB_unaligned; + wire when_DataCache_l812_3; + reg [0:0] stageB_waysHitsBeforeInvalidate; + wire [0:0] stageB_waysHits; + wire stageB_waysHit; + wire [31:0] stageB_dataMux; + wire when_DataCache_l812_4; + reg [3:0] stageB_mask; + reg stageB_loaderValid; + wire [31:0] stageB_ioMemRspMuxed; + reg stageB_flusher_waitDone; + wire stageB_flusher_hold; + reg [7:0] stageB_flusher_counter; + wire when_DataCache_l842; + wire when_DataCache_l848; + reg stageB_flusher_start; + wire stageB_isAmo; + wire stageB_isAmoCached; + wire stageB_isExternalLsrc; + wire stageB_isExternalAmo; + wire [31:0] stageB_requestDataBypass; + reg stageB_cpuWriteToCache; + wire when_DataCache_l911; + wire stageB_badPermissions; + wire stageB_loadStoreFault; + wire stageB_bypassCache; + wire when_DataCache_l980; + wire when_DataCache_l989; + wire when_DataCache_l994; + wire when_DataCache_l1005; + wire when_DataCache_l1017; + wire when_DataCache_l976; + wire when_DataCache_l1051; + wire when_DataCache_l1060; + reg loader_valid; + reg loader_counter_willIncrement; + wire loader_counter_willClear; + reg [2:0] loader_counter_valueNext; + reg [2:0] loader_counter_value; + wire loader_counter_willOverflowIfInc; + wire loader_counter_willOverflow; + reg [0:0] loader_waysAllocator; + reg loader_error; + wire loader_kill; + reg loader_killReg; + wire when_DataCache_l1075; + wire loader_done; + wire when_DataCache_l1103; + reg loader_valid_regNext; + wire when_DataCache_l1107; + wire when_DataCache_l1110; + (* ram_style = "block" *) reg [21:0] ways_0_tags [0:127]; + (* ram_style = "block" *) reg [7:0] ways_0_data_symbol0 [0:1023]; + (* ram_style = "block" *) reg [7:0] ways_0_data_symbol1 [0:1023]; + (* ram_style = "block" *) reg [7:0] ways_0_data_symbol2 [0:1023]; + (* ram_style = "block" *) reg [7:0] ways_0_data_symbol3 [0:1023]; + reg [7:0] _zz_ways_0_datasymbol_read; + reg [7:0] _zz_ways_0_datasymbol_read_1; + reg [7:0] _zz_ways_0_datasymbol_read_2; + reg [7:0] _zz_ways_0_datasymbol_read_3; + + assign _zz_stage0_dataColisions = (io_cpu_execute_address[11 : 2] >>> 0); + assign _zz__zz_stageA_dataColisions = (io_cpu_memory_address[11 : 2] >>> 0); + assign _zz_when = 1'b1; + assign _zz_loader_counter_valueNext_1 = loader_counter_willIncrement; + assign _zz_loader_counter_valueNext = {2'd0, _zz_loader_counter_valueNext_1}; + assign _zz_loader_waysAllocator = {loader_waysAllocator,loader_waysAllocator[0]}; + assign _zz_ways_0_tags_port = {tagsWriteCmd_payload_data_address,{tagsWriteCmd_payload_data_error,tagsWriteCmd_payload_data_valid}}; + always @(posedge clk) begin + if(_zz_ways_0_tagsReadRsp_valid) begin + _zz_ways_0_tags_port0 <= ways_0_tags[tagsReadCmd_payload]; + end + end + + always @(posedge clk) begin + if(_zz_2) begin + ways_0_tags[tagsWriteCmd_payload_address] <= _zz_ways_0_tags_port; + end + end + + always @(*) begin + _zz_ways_0_data_port0 = {_zz_ways_0_datasymbol_read_3, _zz_ways_0_datasymbol_read_2, _zz_ways_0_datasymbol_read_1, _zz_ways_0_datasymbol_read}; + end + always @(posedge clk) begin + if(_zz_ways_0_dataReadRspMem) begin + _zz_ways_0_datasymbol_read <= ways_0_data_symbol0[dataReadCmd_payload]; + _zz_ways_0_datasymbol_read_1 <= ways_0_data_symbol1[dataReadCmd_payload]; + _zz_ways_0_datasymbol_read_2 <= ways_0_data_symbol2[dataReadCmd_payload]; + _zz_ways_0_datasymbol_read_3 <= ways_0_data_symbol3[dataReadCmd_payload]; + end + end + + always @(posedge clk) begin + if(dataWriteCmd_payload_mask[0] && _zz_1) begin + ways_0_data_symbol0[dataWriteCmd_payload_address] <= dataWriteCmd_payload_data[7 : 0]; + end + if(dataWriteCmd_payload_mask[1] && _zz_1) begin + ways_0_data_symbol1[dataWriteCmd_payload_address] <= dataWriteCmd_payload_data[15 : 8]; + end + if(dataWriteCmd_payload_mask[2] && _zz_1) begin + ways_0_data_symbol2[dataWriteCmd_payload_address] <= dataWriteCmd_payload_data[23 : 16]; + end + if(dataWriteCmd_payload_mask[3] && _zz_1) begin + ways_0_data_symbol3[dataWriteCmd_payload_address] <= dataWriteCmd_payload_data[31 : 24]; + end + end + + always @(*) begin + _zz_1 = 1'b0; + if(when_DataCache_l637) begin + _zz_1 = 1'b1; + end + end + + always @(*) begin + _zz_2 = 1'b0; + if(when_DataCache_l634) begin + _zz_2 = 1'b1; + end + end + + assign haltCpu = 1'b0; + assign _zz_ways_0_tagsReadRsp_valid = (tagsReadCmd_valid && (! io_cpu_memory_isStuck)); + assign _zz_ways_0_tagsReadRsp_valid_1 = _zz_ways_0_tags_port0; + assign ways_0_tagsReadRsp_valid = _zz_ways_0_tagsReadRsp_valid_1[0]; + assign ways_0_tagsReadRsp_error = _zz_ways_0_tagsReadRsp_valid_1[1]; + assign ways_0_tagsReadRsp_address = _zz_ways_0_tagsReadRsp_valid_1[21 : 2]; + assign _zz_ways_0_dataReadRspMem = (dataReadCmd_valid && (! io_cpu_memory_isStuck)); + assign ways_0_dataReadRspMem = _zz_ways_0_data_port0; + assign ways_0_dataReadRsp = ways_0_dataReadRspMem[31 : 0]; + assign when_DataCache_l634 = (tagsWriteCmd_valid && tagsWriteCmd_payload_way[0]); + assign when_DataCache_l637 = (dataWriteCmd_valid && dataWriteCmd_payload_way[0]); + always @(*) begin + tagsReadCmd_valid = 1'b0; + if(when_DataCache_l656) begin + tagsReadCmd_valid = 1'b1; + end + end + + always @(*) begin + tagsReadCmd_payload = 7'bxxxxxxx; + if(when_DataCache_l656) begin + tagsReadCmd_payload = io_cpu_execute_address[11 : 5]; + end + end + + always @(*) begin + dataReadCmd_valid = 1'b0; + if(when_DataCache_l656) begin + dataReadCmd_valid = 1'b1; + end + end + + always @(*) begin + dataReadCmd_payload = 10'bxxxxxxxxxx; + if(when_DataCache_l656) begin + dataReadCmd_payload = io_cpu_execute_address[11 : 2]; + end + end + + always @(*) begin + tagsWriteCmd_valid = 1'b0; + if(when_DataCache_l842) begin + tagsWriteCmd_valid = 1'b1; + end + if(when_DataCache_l1051) begin + tagsWriteCmd_valid = 1'b0; + end + if(loader_done) begin + tagsWriteCmd_valid = 1'b1; + end + end + + always @(*) begin + tagsWriteCmd_payload_way = 1'bx; + if(when_DataCache_l842) begin + tagsWriteCmd_payload_way = 1'b1; + end + if(loader_done) begin + tagsWriteCmd_payload_way = loader_waysAllocator; + end + end + + always @(*) begin + tagsWriteCmd_payload_address = 7'bxxxxxxx; + if(when_DataCache_l842) begin + tagsWriteCmd_payload_address = stageB_flusher_counter[6:0]; + end + if(loader_done) begin + tagsWriteCmd_payload_address = stageB_mmuRsp_physicalAddress[11 : 5]; + end + end + + always @(*) begin + tagsWriteCmd_payload_data_valid = 1'bx; + if(when_DataCache_l842) begin + tagsWriteCmd_payload_data_valid = 1'b0; + end + if(loader_done) begin + tagsWriteCmd_payload_data_valid = (! (loader_kill || loader_killReg)); + end + end + + always @(*) begin + tagsWriteCmd_payload_data_error = 1'bx; + if(loader_done) begin + tagsWriteCmd_payload_data_error = (loader_error || (io_mem_rsp_valid && io_mem_rsp_payload_error)); + end + end + + always @(*) begin + tagsWriteCmd_payload_data_address = 20'bxxxxxxxxxxxxxxxxxxxx; + if(loader_done) begin + tagsWriteCmd_payload_data_address = stageB_mmuRsp_physicalAddress[31 : 12]; + end + end + + always @(*) begin + dataWriteCmd_valid = 1'b0; + if(stageB_cpuWriteToCache) begin + if(when_DataCache_l911) begin + dataWriteCmd_valid = 1'b1; + end + end + if(when_DataCache_l1051) begin + dataWriteCmd_valid = 1'b0; + end + if(when_DataCache_l1075) begin + dataWriteCmd_valid = 1'b1; + end + end + + always @(*) begin + dataWriteCmd_payload_way = 1'bx; + if(stageB_cpuWriteToCache) begin + dataWriteCmd_payload_way = stageB_waysHits; + end + if(when_DataCache_l1075) begin + dataWriteCmd_payload_way = loader_waysAllocator; + end + end + + always @(*) begin + dataWriteCmd_payload_address = 10'bxxxxxxxxxx; + if(stageB_cpuWriteToCache) begin + dataWriteCmd_payload_address = stageB_mmuRsp_physicalAddress[11 : 2]; + end + if(when_DataCache_l1075) begin + dataWriteCmd_payload_address = {stageB_mmuRsp_physicalAddress[11 : 5],loader_counter_value}; + end + end + + always @(*) begin + dataWriteCmd_payload_data = 32'bxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx; + if(stageB_cpuWriteToCache) begin + dataWriteCmd_payload_data[31 : 0] = stageB_requestDataBypass; + end + if(when_DataCache_l1075) begin + dataWriteCmd_payload_data = io_mem_rsp_payload_data; + end + end + + always @(*) begin + dataWriteCmd_payload_mask = 4'bxxxx; + if(stageB_cpuWriteToCache) begin + dataWriteCmd_payload_mask = 4'b0000; + if(_zz_when[0]) begin + dataWriteCmd_payload_mask[3 : 0] = stageB_mask; + end + end + if(when_DataCache_l1075) begin + dataWriteCmd_payload_mask = 4'b1111; + end + end + + assign when_DataCache_l656 = (io_cpu_execute_isValid && (! io_cpu_memory_isStuck)); + always @(*) begin + io_cpu_execute_haltIt = 1'b0; + if(when_DataCache_l842) begin + io_cpu_execute_haltIt = 1'b1; + end + end + + assign rspSync = 1'b1; + assign rspLast = 1'b1; + assign io_mem_cmd_fire = (io_mem_cmd_valid && io_mem_cmd_ready); + assign when_DataCache_l678 = (! io_cpu_writeBack_isStuck); + always @(*) begin + _zz_stage0_mask = 4'bxxxx; + case(io_cpu_execute_args_size) + 2'b00 : begin + _zz_stage0_mask = 4'b0001; + end + 2'b01 : begin + _zz_stage0_mask = 4'b0011; + end + 2'b10 : begin + _zz_stage0_mask = 4'b1111; + end + default : begin + end + endcase + end + + assign stage0_mask = (_zz_stage0_mask <<< io_cpu_execute_address[1 : 0]); + assign stage0_dataColisions[0] = (((dataWriteCmd_valid && dataWriteCmd_payload_way[0]) && (dataWriteCmd_payload_address == _zz_stage0_dataColisions)) && ((stage0_mask & dataWriteCmd_payload_mask[3 : 0]) != 4'b0000)); + assign stage0_wayInvalidate = 1'b0; + assign stage0_isAmo = 1'b0; + assign when_DataCache_l763 = (! io_cpu_memory_isStuck); + assign when_DataCache_l763_1 = (! io_cpu_memory_isStuck); + assign io_cpu_memory_isWrite = stageA_request_wr; + assign stageA_isAmo = 1'b0; + assign stageA_isLrsc = 1'b0; + assign stageA_wayHits = ((io_cpu_memory_mmuRsp_physicalAddress[31 : 12] == ways_0_tagsReadRsp_address) && ways_0_tagsReadRsp_valid); + assign when_DataCache_l763_2 = (! io_cpu_memory_isStuck); + assign when_DataCache_l763_3 = (! io_cpu_memory_isStuck); + assign _zz_stageA_dataColisions[0] = (((dataWriteCmd_valid && dataWriteCmd_payload_way[0]) && (dataWriteCmd_payload_address == _zz__zz_stageA_dataColisions)) && ((stageA_mask & dataWriteCmd_payload_mask[3 : 0]) != 4'b0000)); + assign stageA_dataColisions = (stage0_dataColisions_regNextWhen | _zz_stageA_dataColisions); + assign when_DataCache_l814 = (! io_cpu_writeBack_isStuck); + always @(*) begin + stageB_mmuRspFreeze = 1'b0; + if(when_DataCache_l1110) begin + stageB_mmuRspFreeze = 1'b1; + end + end + + assign when_DataCache_l816 = ((! io_cpu_writeBack_isStuck) && (! stageB_mmuRspFreeze)); + assign when_DataCache_l813 = (! io_cpu_writeBack_isStuck); + assign when_DataCache_l813_1 = (! io_cpu_writeBack_isStuck); + assign when_DataCache_l812 = (! io_cpu_writeBack_isStuck); + assign stageB_consistancyHazard = 1'b0; + assign when_DataCache_l812_1 = (! io_cpu_writeBack_isStuck); + assign when_DataCache_l812_2 = (! io_cpu_writeBack_isStuck); + assign when_DataCache_l812_3 = (! io_cpu_writeBack_isStuck); + assign stageB_waysHits = (stageB_waysHitsBeforeInvalidate & (~ stageB_wayInvalidate)); + assign stageB_waysHit = (stageB_waysHits != 1'b0); + assign stageB_dataMux = stageB_dataReadRsp_0; + assign when_DataCache_l812_4 = (! io_cpu_writeBack_isStuck); + always @(*) begin + stageB_loaderValid = 1'b0; + if(io_cpu_writeBack_isValid) begin + if(!stageB_isExternalAmo) begin + if(!when_DataCache_l976) begin + if(!when_DataCache_l989) begin + if(io_mem_cmd_ready) begin + stageB_loaderValid = 1'b1; + end + end + end + end + end + if(when_DataCache_l1051) begin + stageB_loaderValid = 1'b0; + end + end + + assign stageB_ioMemRspMuxed = io_mem_rsp_payload_data[31 : 0]; + always @(*) begin + io_cpu_writeBack_haltIt = 1'b1; + if(io_cpu_writeBack_isValid) begin + if(!stageB_isExternalAmo) begin + if(when_DataCache_l976) begin + if(when_DataCache_l980) begin + io_cpu_writeBack_haltIt = 1'b0; + end + end else begin + if(when_DataCache_l989) begin + if(when_DataCache_l994) begin + io_cpu_writeBack_haltIt = 1'b0; + end + end + end + end + end + if(when_DataCache_l1051) begin + io_cpu_writeBack_haltIt = 1'b0; + end + end + + assign stageB_flusher_hold = 1'b0; + assign when_DataCache_l842 = (! stageB_flusher_counter[7]); + assign when_DataCache_l848 = (! stageB_flusher_hold); + assign io_cpu_flush_ready = (stageB_flusher_waitDone && stageB_flusher_counter[7]); + assign stageB_isAmo = 1'b0; + assign stageB_isAmoCached = 1'b0; + assign stageB_isExternalLsrc = 1'b0; + assign stageB_isExternalAmo = 1'b0; + assign stageB_requestDataBypass = io_cpu_writeBack_storeData; + always @(*) begin + stageB_cpuWriteToCache = 1'b0; + if(io_cpu_writeBack_isValid) begin + if(!stageB_isExternalAmo) begin + if(!when_DataCache_l976) begin + if(when_DataCache_l989) begin + stageB_cpuWriteToCache = 1'b1; + end + end + end + end + end + + assign when_DataCache_l911 = (stageB_request_wr && stageB_waysHit); + assign stageB_badPermissions = (((! stageB_mmuRsp_allowWrite) && stageB_request_wr) || ((! stageB_mmuRsp_allowRead) && ((! stageB_request_wr) || stageB_isAmo))); + assign stageB_loadStoreFault = (io_cpu_writeBack_isValid && (stageB_mmuRsp_exception || stageB_badPermissions)); + always @(*) begin + io_cpu_redo = 1'b0; + if(io_cpu_writeBack_isValid) begin + if(!stageB_isExternalAmo) begin + if(!when_DataCache_l976) begin + if(when_DataCache_l989) begin + if(when_DataCache_l1005) begin + io_cpu_redo = 1'b1; + end + end + end + end + end + if(when_DataCache_l1060) begin + io_cpu_redo = 1'b1; + end + if(when_DataCache_l1107) begin + io_cpu_redo = 1'b1; + end + end + + always @(*) begin + io_cpu_writeBack_accessError = 1'b0; + if(stageB_bypassCache) begin + io_cpu_writeBack_accessError = ((((! stageB_request_wr) && 1'b1) && io_mem_rsp_valid) && io_mem_rsp_payload_error); + end else begin + io_cpu_writeBack_accessError = (((stageB_waysHits & stageB_tagsReadRsp_0_error) != 1'b0) || (stageB_loadStoreFault && (! stageB_mmuRsp_isPaging))); + end + end + + assign io_cpu_writeBack_mmuException = (stageB_loadStoreFault && stageB_mmuRsp_isPaging); + assign io_cpu_writeBack_unalignedAccess = (io_cpu_writeBack_isValid && stageB_unaligned); + assign io_cpu_writeBack_isWrite = stageB_request_wr; + always @(*) begin + io_mem_cmd_valid = 1'b0; + if(io_cpu_writeBack_isValid) begin + if(!stageB_isExternalAmo) begin + if(when_DataCache_l976) begin + io_mem_cmd_valid = (! memCmdSent); + end else begin + if(when_DataCache_l989) begin + if(stageB_request_wr) begin + io_mem_cmd_valid = 1'b1; + end + end else begin + if(when_DataCache_l1017) begin + io_mem_cmd_valid = 1'b1; + end + end + end + end + end + if(when_DataCache_l1051) begin + io_mem_cmd_valid = 1'b0; + end + end + + always @(*) begin + io_mem_cmd_payload_address = stageB_mmuRsp_physicalAddress; + if(io_cpu_writeBack_isValid) begin + if(!stageB_isExternalAmo) begin + if(!when_DataCache_l976) begin + if(!when_DataCache_l989) begin + io_mem_cmd_payload_address[4 : 0] = 5'h0; + end + end + end + end + end + + assign io_mem_cmd_payload_last = 1'b1; + always @(*) begin + io_mem_cmd_payload_wr = stageB_request_wr; + if(io_cpu_writeBack_isValid) begin + if(!stageB_isExternalAmo) begin + if(!when_DataCache_l976) begin + if(!when_DataCache_l989) begin + io_mem_cmd_payload_wr = 1'b0; + end + end + end + end + end + + assign io_mem_cmd_payload_mask = stageB_mask; + assign io_mem_cmd_payload_data = stageB_requestDataBypass; + assign io_mem_cmd_payload_uncached = stageB_mmuRsp_isIoAccess; + always @(*) begin + io_mem_cmd_payload_size = {1'd0, stageB_request_size}; + if(io_cpu_writeBack_isValid) begin + if(!stageB_isExternalAmo) begin + if(!when_DataCache_l976) begin + if(!when_DataCache_l989) begin + io_mem_cmd_payload_size = 3'b101; + end + end + end + end + end + + assign stageB_bypassCache = ((stageB_mmuRsp_isIoAccess || stageB_isExternalLsrc) || stageB_isExternalAmo); + assign io_cpu_writeBack_keepMemRspData = 1'b0; + assign when_DataCache_l980 = ((! stageB_request_wr) ? (io_mem_rsp_valid && rspSync) : io_mem_cmd_ready); + assign when_DataCache_l989 = (stageB_waysHit || (stageB_request_wr && (! stageB_isAmoCached))); + assign when_DataCache_l994 = ((! stageB_request_wr) || io_mem_cmd_ready); + assign when_DataCache_l1005 = (((! stageB_request_wr) || stageB_isAmoCached) && ((stageB_dataColisions & stageB_waysHits) != 1'b0)); + assign when_DataCache_l1017 = (! memCmdSent); + assign when_DataCache_l976 = (stageB_mmuRsp_isIoAccess || stageB_isExternalLsrc); + always @(*) begin + if(stageB_bypassCache) begin + io_cpu_writeBack_data = stageB_ioMemRspMuxed; + end else begin + io_cpu_writeBack_data = stageB_dataMux; + end + end + + assign when_DataCache_l1051 = ((((stageB_consistancyHazard || stageB_mmuRsp_refilling) || io_cpu_writeBack_accessError) || io_cpu_writeBack_mmuException) || io_cpu_writeBack_unalignedAccess); + assign when_DataCache_l1060 = (io_cpu_writeBack_isValid && (stageB_mmuRsp_refilling || stageB_consistancyHazard)); + always @(*) begin + loader_counter_willIncrement = 1'b0; + if(when_DataCache_l1075) begin + loader_counter_willIncrement = 1'b1; + end + end + + assign loader_counter_willClear = 1'b0; + assign loader_counter_willOverflowIfInc = (loader_counter_value == 3'b111); + assign loader_counter_willOverflow = (loader_counter_willOverflowIfInc && loader_counter_willIncrement); + always @(*) begin + loader_counter_valueNext = (loader_counter_value + _zz_loader_counter_valueNext); + if(loader_counter_willClear) begin + loader_counter_valueNext = 3'b000; + end + end + + assign loader_kill = 1'b0; + assign when_DataCache_l1075 = ((loader_valid && io_mem_rsp_valid) && rspLast); + assign loader_done = loader_counter_willOverflow; + assign when_DataCache_l1103 = (! loader_valid); + assign when_DataCache_l1107 = (loader_valid && (! loader_valid_regNext)); + assign io_cpu_execute_refilling = loader_valid; + assign when_DataCache_l1110 = (stageB_loaderValid || loader_valid); + always @(posedge clk) begin + tagsWriteLastCmd_valid <= tagsWriteCmd_valid; + tagsWriteLastCmd_payload_way <= tagsWriteCmd_payload_way; + tagsWriteLastCmd_payload_address <= tagsWriteCmd_payload_address; + tagsWriteLastCmd_payload_data_valid <= tagsWriteCmd_payload_data_valid; + tagsWriteLastCmd_payload_data_error <= tagsWriteCmd_payload_data_error; + tagsWriteLastCmd_payload_data_address <= tagsWriteCmd_payload_data_address; + if(when_DataCache_l763) begin + stageA_request_wr <= io_cpu_execute_args_wr; + stageA_request_size <= io_cpu_execute_args_size; + stageA_request_totalyConsistent <= io_cpu_execute_args_totalyConsistent; + end + if(when_DataCache_l763_1) begin + stageA_mask <= stage0_mask; + end + if(when_DataCache_l763_2) begin + stageA_wayInvalidate <= stage0_wayInvalidate; + end + if(when_DataCache_l763_3) begin + stage0_dataColisions_regNextWhen <= stage0_dataColisions; + end + if(when_DataCache_l814) begin + stageB_request_wr <= stageA_request_wr; + stageB_request_size <= stageA_request_size; + stageB_request_totalyConsistent <= stageA_request_totalyConsistent; + end + if(when_DataCache_l816) begin + stageB_mmuRsp_physicalAddress <= io_cpu_memory_mmuRsp_physicalAddress; + stageB_mmuRsp_isIoAccess <= io_cpu_memory_mmuRsp_isIoAccess; + stageB_mmuRsp_isPaging <= io_cpu_memory_mmuRsp_isPaging; + stageB_mmuRsp_allowRead <= io_cpu_memory_mmuRsp_allowRead; + stageB_mmuRsp_allowWrite <= io_cpu_memory_mmuRsp_allowWrite; + stageB_mmuRsp_allowExecute <= io_cpu_memory_mmuRsp_allowExecute; + stageB_mmuRsp_exception <= io_cpu_memory_mmuRsp_exception; + stageB_mmuRsp_refilling <= io_cpu_memory_mmuRsp_refilling; + stageB_mmuRsp_bypassTranslation <= io_cpu_memory_mmuRsp_bypassTranslation; + end + if(when_DataCache_l813) begin + stageB_tagsReadRsp_0_valid <= ways_0_tagsReadRsp_valid; + stageB_tagsReadRsp_0_error <= ways_0_tagsReadRsp_error; + stageB_tagsReadRsp_0_address <= ways_0_tagsReadRsp_address; + end + if(when_DataCache_l813_1) begin + stageB_dataReadRsp_0 <= ways_0_dataReadRsp; + end + if(when_DataCache_l812) begin + stageB_wayInvalidate <= stageA_wayInvalidate; + end + if(when_DataCache_l812_1) begin + stageB_dataColisions <= stageA_dataColisions; + end + if(when_DataCache_l812_2) begin + stageB_unaligned <= ({((stageA_request_size == 2'b10) && (io_cpu_memory_address[1 : 0] != 2'b00)),((stageA_request_size == 2'b01) && (io_cpu_memory_address[0 : 0] != 1'b0))} != 2'b00); + end + if(when_DataCache_l812_3) begin + stageB_waysHitsBeforeInvalidate <= stageA_wayHits; + end + if(when_DataCache_l812_4) begin + stageB_mask <= stageA_mask; + end + loader_valid_regNext <= loader_valid; + end + + always @(posedge clk) begin + if(reset) begin + memCmdSent <= 1'b0; + stageB_flusher_waitDone <= 1'b0; + stageB_flusher_counter <= 8'h0; + stageB_flusher_start <= 1'b1; + loader_valid <= 1'b0; + loader_counter_value <= 3'b000; + loader_waysAllocator <= 1'b1; + loader_error <= 1'b0; + loader_killReg <= 1'b0; + end else begin + if(io_mem_cmd_fire) begin + memCmdSent <= 1'b1; + end + if(when_DataCache_l678) begin + memCmdSent <= 1'b0; + end + if(io_cpu_flush_ready) begin + stageB_flusher_waitDone <= 1'b0; + end + if(when_DataCache_l842) begin + if(when_DataCache_l848) begin + stageB_flusher_counter <= (stageB_flusher_counter + 8'h01); + end + end + stageB_flusher_start <= (((((((! stageB_flusher_waitDone) && (! stageB_flusher_start)) && io_cpu_flush_valid) && (! io_cpu_execute_isValid)) && (! io_cpu_memory_isValid)) && (! io_cpu_writeBack_isValid)) && (! io_cpu_redo)); + if(stageB_flusher_start) begin + stageB_flusher_waitDone <= 1'b1; + stageB_flusher_counter <= 8'h0; + end + `ifndef SYNTHESIS + `ifdef FORMAL + assert((! ((io_cpu_writeBack_isValid && (! io_cpu_writeBack_haltIt)) && io_cpu_writeBack_isStuck))); + `else + if(!(! ((io_cpu_writeBack_isValid && (! io_cpu_writeBack_haltIt)) && io_cpu_writeBack_isStuck))) begin + $display("ERROR writeBack stuck by another plugin is not allowed"); + end + `endif + `endif + if(stageB_loaderValid) begin + loader_valid <= 1'b1; + end + loader_counter_value <= loader_counter_valueNext; + if(loader_kill) begin + loader_killReg <= 1'b1; + end + if(when_DataCache_l1075) begin + loader_error <= (loader_error || io_mem_rsp_payload_error); + end + if(loader_done) begin + loader_valid <= 1'b0; + loader_error <= 1'b0; + loader_killReg <= 1'b0; + end + if(when_DataCache_l1103) begin + loader_waysAllocator <= _zz_loader_waysAllocator[0:0]; + end + end + end + + +endmodule + +module InstructionCache ( + input io_flush, + input io_cpu_prefetch_isValid, + output reg io_cpu_prefetch_haltIt, + input [31:0] io_cpu_prefetch_pc, + input io_cpu_fetch_isValid, + input io_cpu_fetch_isStuck, + input io_cpu_fetch_isRemoved, + input [31:0] io_cpu_fetch_pc, + output [31:0] io_cpu_fetch_data, + input [31:0] io_cpu_fetch_mmuRsp_physicalAddress, + input io_cpu_fetch_mmuRsp_isIoAccess, + input io_cpu_fetch_mmuRsp_isPaging, + input io_cpu_fetch_mmuRsp_allowRead, + input io_cpu_fetch_mmuRsp_allowWrite, + input io_cpu_fetch_mmuRsp_allowExecute, + input io_cpu_fetch_mmuRsp_exception, + input io_cpu_fetch_mmuRsp_refilling, + input io_cpu_fetch_mmuRsp_bypassTranslation, + output [31:0] io_cpu_fetch_physicalAddress, + input io_cpu_decode_isValid, + input io_cpu_decode_isStuck, + input [31:0] io_cpu_decode_pc, + output [31:0] io_cpu_decode_physicalAddress, + output [31:0] io_cpu_decode_data, + output io_cpu_decode_cacheMiss, + output io_cpu_decode_error, + output io_cpu_decode_mmuRefilling, + output io_cpu_decode_mmuException, + input io_cpu_decode_isUser, + input io_cpu_fill_valid, + input [31:0] io_cpu_fill_payload, + output io_mem_cmd_valid, + input io_mem_cmd_ready, + output [31:0] io_mem_cmd_payload_address, + output [2:0] io_mem_cmd_payload_size, + input io_mem_rsp_valid, + input [31:0] io_mem_rsp_payload_data, + input io_mem_rsp_payload_error, + input clk, + input reset +); + reg [31:0] _zz_banks_0_port1; + reg [22:0] _zz_ways_0_tags_port1; + wire [22:0] _zz_ways_0_tags_port; + reg _zz_1; + reg _zz_2; + reg lineLoader_fire; + reg lineLoader_valid; + (* keep , syn_keep *) reg [31:0] lineLoader_address /* synthesis syn_keep = 1 */ ; + reg lineLoader_hadError; + reg lineLoader_flushPending; + reg [6:0] lineLoader_flushCounter; + wire when_InstructionCache_l338; + reg _zz_when_InstructionCache_l342; + wire when_InstructionCache_l342; + wire when_InstructionCache_l351; + reg lineLoader_cmdSent; + wire io_mem_cmd_fire; + wire when_Utils_l357; + reg lineLoader_wayToAllocate_willIncrement; + wire lineLoader_wayToAllocate_willClear; + wire lineLoader_wayToAllocate_willOverflowIfInc; + wire lineLoader_wayToAllocate_willOverflow; + (* keep , syn_keep *) reg [2:0] lineLoader_wordIndex /* synthesis syn_keep = 1 */ ; + wire lineLoader_write_tag_0_valid; + wire [5:0] lineLoader_write_tag_0_payload_address; + wire lineLoader_write_tag_0_payload_data_valid; + wire lineLoader_write_tag_0_payload_data_error; + wire [20:0] lineLoader_write_tag_0_payload_data_address; + wire lineLoader_write_data_0_valid; + wire [8:0] lineLoader_write_data_0_payload_address; + wire [31:0] lineLoader_write_data_0_payload_data; + wire when_InstructionCache_l401; + wire [8:0] _zz_fetchStage_read_banksValue_0_dataMem; + wire _zz_fetchStage_read_banksValue_0_dataMem_1; + wire [31:0] fetchStage_read_banksValue_0_dataMem; + wire [31:0] fetchStage_read_banksValue_0_data; + wire [5:0] _zz_fetchStage_read_waysValues_0_tag_valid; + wire _zz_fetchStage_read_waysValues_0_tag_valid_1; + wire fetchStage_read_waysValues_0_tag_valid; + wire fetchStage_read_waysValues_0_tag_error; + wire [20:0] fetchStage_read_waysValues_0_tag_address; + wire [22:0] _zz_fetchStage_read_waysValues_0_tag_valid_2; + wire fetchStage_hit_hits_0; + wire fetchStage_hit_valid; + wire fetchStage_hit_error; + wire [31:0] fetchStage_hit_data; + wire [31:0] fetchStage_hit_word; + wire when_InstructionCache_l435; + reg [31:0] io_cpu_fetch_data_regNextWhen; + wire when_InstructionCache_l459; + reg [31:0] decodeStage_mmuRsp_physicalAddress; + reg decodeStage_mmuRsp_isIoAccess; + reg decodeStage_mmuRsp_isPaging; + reg decodeStage_mmuRsp_allowRead; + reg decodeStage_mmuRsp_allowWrite; + reg decodeStage_mmuRsp_allowExecute; + reg decodeStage_mmuRsp_exception; + reg decodeStage_mmuRsp_refilling; + reg decodeStage_mmuRsp_bypassTranslation; + wire when_InstructionCache_l459_1; + reg decodeStage_hit_valid; + wire when_InstructionCache_l459_2; + reg decodeStage_hit_error; + (* ram_style = "block" *) reg [31:0] banks_0 [0:511]; + (* ram_style = "block" *) reg [22:0] ways_0_tags [0:63]; + + assign _zz_ways_0_tags_port = {lineLoader_write_tag_0_payload_data_address,{lineLoader_write_tag_0_payload_data_error,lineLoader_write_tag_0_payload_data_valid}}; + always @(posedge clk) begin + if(_zz_1) begin + banks_0[lineLoader_write_data_0_payload_address] <= lineLoader_write_data_0_payload_data; + end + end + + always @(posedge clk) begin + if(_zz_fetchStage_read_banksValue_0_dataMem_1) begin + _zz_banks_0_port1 <= banks_0[_zz_fetchStage_read_banksValue_0_dataMem]; + end + end + + always @(posedge clk) begin + if(_zz_2) begin + ways_0_tags[lineLoader_write_tag_0_payload_address] <= _zz_ways_0_tags_port; + end + end + + always @(posedge clk) begin + if(_zz_fetchStage_read_waysValues_0_tag_valid_1) begin + _zz_ways_0_tags_port1 <= ways_0_tags[_zz_fetchStage_read_waysValues_0_tag_valid]; + end + end + + always @(*) begin + _zz_1 = 1'b0; + if(lineLoader_write_data_0_valid) begin + _zz_1 = 1'b1; + end + end + + always @(*) begin + _zz_2 = 1'b0; + if(lineLoader_write_tag_0_valid) begin + _zz_2 = 1'b1; + end + end + + always @(*) begin + lineLoader_fire = 1'b0; + if(io_mem_rsp_valid) begin + if(when_InstructionCache_l401) begin + lineLoader_fire = 1'b1; + end + end + end + + always @(*) begin + io_cpu_prefetch_haltIt = (lineLoader_valid || lineLoader_flushPending); + if(when_InstructionCache_l338) begin + io_cpu_prefetch_haltIt = 1'b1; + end + if(when_InstructionCache_l342) begin + io_cpu_prefetch_haltIt = 1'b1; + end + if(io_flush) begin + io_cpu_prefetch_haltIt = 1'b1; + end + end + + assign when_InstructionCache_l338 = (! lineLoader_flushCounter[6]); + assign when_InstructionCache_l342 = (! _zz_when_InstructionCache_l342); + assign when_InstructionCache_l351 = (lineLoader_flushPending && (! (lineLoader_valid || io_cpu_fetch_isValid))); + assign io_mem_cmd_fire = (io_mem_cmd_valid && io_mem_cmd_ready); + assign io_mem_cmd_valid = (lineLoader_valid && (! lineLoader_cmdSent)); + assign io_mem_cmd_payload_address = {lineLoader_address[31 : 5],5'h0}; + assign io_mem_cmd_payload_size = 3'b101; + assign when_Utils_l357 = (! lineLoader_valid); + always @(*) begin + lineLoader_wayToAllocate_willIncrement = 1'b0; + if(when_Utils_l357) begin + lineLoader_wayToAllocate_willIncrement = 1'b1; + end + end + + assign lineLoader_wayToAllocate_willClear = 1'b0; + assign lineLoader_wayToAllocate_willOverflowIfInc = 1'b1; + assign lineLoader_wayToAllocate_willOverflow = (lineLoader_wayToAllocate_willOverflowIfInc && lineLoader_wayToAllocate_willIncrement); + assign lineLoader_write_tag_0_valid = ((1'b1 && lineLoader_fire) || (! lineLoader_flushCounter[6])); + assign lineLoader_write_tag_0_payload_address = (lineLoader_flushCounter[6] ? lineLoader_address[10 : 5] : lineLoader_flushCounter[5 : 0]); + assign lineLoader_write_tag_0_payload_data_valid = lineLoader_flushCounter[6]; + assign lineLoader_write_tag_0_payload_data_error = (lineLoader_hadError || io_mem_rsp_payload_error); + assign lineLoader_write_tag_0_payload_data_address = lineLoader_address[31 : 11]; + assign lineLoader_write_data_0_valid = (io_mem_rsp_valid && 1'b1); + assign lineLoader_write_data_0_payload_address = {lineLoader_address[10 : 5],lineLoader_wordIndex}; + assign lineLoader_write_data_0_payload_data = io_mem_rsp_payload_data; + assign when_InstructionCache_l401 = (lineLoader_wordIndex == 3'b111); + assign _zz_fetchStage_read_banksValue_0_dataMem = io_cpu_prefetch_pc[10 : 2]; + assign _zz_fetchStage_read_banksValue_0_dataMem_1 = (! io_cpu_fetch_isStuck); + assign fetchStage_read_banksValue_0_dataMem = _zz_banks_0_port1; + assign fetchStage_read_banksValue_0_data = fetchStage_read_banksValue_0_dataMem[31 : 0]; + assign _zz_fetchStage_read_waysValues_0_tag_valid = io_cpu_prefetch_pc[10 : 5]; + assign _zz_fetchStage_read_waysValues_0_tag_valid_1 = (! io_cpu_fetch_isStuck); + assign _zz_fetchStage_read_waysValues_0_tag_valid_2 = _zz_ways_0_tags_port1; + assign fetchStage_read_waysValues_0_tag_valid = _zz_fetchStage_read_waysValues_0_tag_valid_2[0]; + assign fetchStage_read_waysValues_0_tag_error = _zz_fetchStage_read_waysValues_0_tag_valid_2[1]; + assign fetchStage_read_waysValues_0_tag_address = _zz_fetchStage_read_waysValues_0_tag_valid_2[22 : 2]; + assign fetchStage_hit_hits_0 = (fetchStage_read_waysValues_0_tag_valid && (fetchStage_read_waysValues_0_tag_address == io_cpu_fetch_mmuRsp_physicalAddress[31 : 11])); + assign fetchStage_hit_valid = (fetchStage_hit_hits_0 != 1'b0); + assign fetchStage_hit_error = fetchStage_read_waysValues_0_tag_error; + assign fetchStage_hit_data = fetchStage_read_banksValue_0_data; + assign fetchStage_hit_word = fetchStage_hit_data; + assign io_cpu_fetch_data = fetchStage_hit_word; + assign when_InstructionCache_l435 = (! io_cpu_decode_isStuck); + assign io_cpu_decode_data = io_cpu_fetch_data_regNextWhen; + assign io_cpu_fetch_physicalAddress = io_cpu_fetch_mmuRsp_physicalAddress; + assign when_InstructionCache_l459 = (! io_cpu_decode_isStuck); + assign when_InstructionCache_l459_1 = (! io_cpu_decode_isStuck); + assign when_InstructionCache_l459_2 = (! io_cpu_decode_isStuck); + assign io_cpu_decode_cacheMiss = (! decodeStage_hit_valid); + assign io_cpu_decode_error = (decodeStage_hit_error || ((! decodeStage_mmuRsp_isPaging) && (decodeStage_mmuRsp_exception || (! decodeStage_mmuRsp_allowExecute)))); + assign io_cpu_decode_mmuRefilling = decodeStage_mmuRsp_refilling; + assign io_cpu_decode_mmuException = (((! decodeStage_mmuRsp_refilling) && decodeStage_mmuRsp_isPaging) && (decodeStage_mmuRsp_exception || (! decodeStage_mmuRsp_allowExecute))); + assign io_cpu_decode_physicalAddress = decodeStage_mmuRsp_physicalAddress; + always @(posedge clk) begin + if(reset) begin + lineLoader_valid <= 1'b0; + lineLoader_hadError <= 1'b0; + lineLoader_flushPending <= 1'b1; + lineLoader_cmdSent <= 1'b0; + lineLoader_wordIndex <= 3'b000; + end else begin + if(lineLoader_fire) begin + lineLoader_valid <= 1'b0; + end + if(lineLoader_fire) begin + lineLoader_hadError <= 1'b0; + end + if(io_cpu_fill_valid) begin + lineLoader_valid <= 1'b1; + end + if(io_flush) begin + lineLoader_flushPending <= 1'b1; + end + if(when_InstructionCache_l351) begin + lineLoader_flushPending <= 1'b0; + end + if(io_mem_cmd_fire) begin + lineLoader_cmdSent <= 1'b1; + end + if(lineLoader_fire) begin + lineLoader_cmdSent <= 1'b0; + end + if(io_mem_rsp_valid) begin + lineLoader_wordIndex <= (lineLoader_wordIndex + 3'b001); + if(io_mem_rsp_payload_error) begin + lineLoader_hadError <= 1'b1; + end + end + end + end + + always @(posedge clk) begin + if(io_cpu_fill_valid) begin + lineLoader_address <= io_cpu_fill_payload; + end + if(when_InstructionCache_l338) begin + lineLoader_flushCounter <= (lineLoader_flushCounter + 7'h01); + end + _zz_when_InstructionCache_l342 <= lineLoader_flushCounter[6]; + if(when_InstructionCache_l351) begin + lineLoader_flushCounter <= 7'h0; + end + if(when_InstructionCache_l435) begin + io_cpu_fetch_data_regNextWhen <= io_cpu_fetch_data; + end + if(when_InstructionCache_l459) begin + decodeStage_mmuRsp_physicalAddress <= io_cpu_fetch_mmuRsp_physicalAddress; + decodeStage_mmuRsp_isIoAccess <= io_cpu_fetch_mmuRsp_isIoAccess; + decodeStage_mmuRsp_isPaging <= io_cpu_fetch_mmuRsp_isPaging; + decodeStage_mmuRsp_allowRead <= io_cpu_fetch_mmuRsp_allowRead; + decodeStage_mmuRsp_allowWrite <= io_cpu_fetch_mmuRsp_allowWrite; + decodeStage_mmuRsp_allowExecute <= io_cpu_fetch_mmuRsp_allowExecute; + decodeStage_mmuRsp_exception <= io_cpu_fetch_mmuRsp_exception; + decodeStage_mmuRsp_refilling <= io_cpu_fetch_mmuRsp_refilling; + decodeStage_mmuRsp_bypassTranslation <= io_cpu_fetch_mmuRsp_bypassTranslation; + end + if(when_InstructionCache_l459_1) begin + decodeStage_hit_valid <= fetchStage_hit_valid; + end + if(when_InstructionCache_l459_2) begin + decodeStage_hit_error <= fetchStage_hit_error; + end + end + + +endmodule diff --git a/pythondata_cpu_vexriscv/verilog/VexRiscv_SlimCfu.yaml b/pythondata_cpu_vexriscv/verilog/VexRiscv_SlimCfu.yaml new file mode 100644 index 0000000..b55f8e5 --- /dev/null +++ b/pythondata_cpu_vexriscv/verilog/VexRiscv_SlimCfu.yaml @@ -0,0 +1,4 @@ +iBus: !!vexriscv.BusReport + flushInstructions: [4111, 19, 19, 19] + info: !!vexriscv.CacheReport {bytePerLine: 32, size: 2048} + kind: cached diff --git a/pythondata_cpu_vexriscv/verilog/VexRiscv_SlimCfuDebug.v b/pythondata_cpu_vexriscv/verilog/VexRiscv_SlimCfuDebug.v new file mode 100644 index 0000000..bab2f8d --- /dev/null +++ b/pythondata_cpu_vexriscv/verilog/VexRiscv_SlimCfuDebug.v @@ -0,0 +1,7257 @@ +// Generator : SpinalHDL v1.6.0 git head : 73c8d8e2b86b45646e9d0b2e729291f2b65e6be3 +// Component : VexRiscv +// Git hash : 593e180abf5ba39e7fa33d4f371646453f84496a + + +`define Input2Kind_binary_sequential_type [0:0] +`define Input2Kind_binary_sequential_RS 1'b0 +`define Input2Kind_binary_sequential_IMM_I 1'b1 + +`define EnvCtrlEnum_binary_sequential_type [1:0] +`define EnvCtrlEnum_binary_sequential_NONE 2'b00 +`define EnvCtrlEnum_binary_sequential_XRET 2'b01 +`define EnvCtrlEnum_binary_sequential_WFI 2'b10 +`define EnvCtrlEnum_binary_sequential_ECALL 2'b11 + +`define BranchCtrlEnum_binary_sequential_type [1:0] +`define BranchCtrlEnum_binary_sequential_INC 2'b00 +`define BranchCtrlEnum_binary_sequential_B 2'b01 +`define BranchCtrlEnum_binary_sequential_JAL 2'b10 +`define BranchCtrlEnum_binary_sequential_JALR 2'b11 + +`define ShiftCtrlEnum_binary_sequential_type [1:0] +`define ShiftCtrlEnum_binary_sequential_DISABLE_1 2'b00 +`define ShiftCtrlEnum_binary_sequential_SLL_1 2'b01 +`define ShiftCtrlEnum_binary_sequential_SRL_1 2'b10 +`define ShiftCtrlEnum_binary_sequential_SRA_1 2'b11 + +`define AluBitwiseCtrlEnum_binary_sequential_type [1:0] +`define AluBitwiseCtrlEnum_binary_sequential_XOR_1 2'b00 +`define AluBitwiseCtrlEnum_binary_sequential_OR_1 2'b01 +`define AluBitwiseCtrlEnum_binary_sequential_AND_1 2'b10 + +`define Src2CtrlEnum_binary_sequential_type [1:0] +`define Src2CtrlEnum_binary_sequential_RS 2'b00 +`define Src2CtrlEnum_binary_sequential_IMI 2'b01 +`define Src2CtrlEnum_binary_sequential_IMS 2'b10 +`define Src2CtrlEnum_binary_sequential_PC 2'b11 + +`define AluCtrlEnum_binary_sequential_type [1:0] +`define AluCtrlEnum_binary_sequential_ADD_SUB 2'b00 +`define AluCtrlEnum_binary_sequential_SLT_SLTU 2'b01 +`define AluCtrlEnum_binary_sequential_BITWISE 2'b10 + +`define Src1CtrlEnum_binary_sequential_type [1:0] +`define Src1CtrlEnum_binary_sequential_RS 2'b00 +`define Src1CtrlEnum_binary_sequential_IMU 2'b01 +`define Src1CtrlEnum_binary_sequential_PC_INCREMENT 2'b10 +`define Src1CtrlEnum_binary_sequential_URS1 2'b11 + + +module VexRiscv ( + input [31:0] externalResetVector, + input timerInterrupt, + input softwareInterrupt, + input [31:0] externalInterruptArray, + input debug_bus_cmd_valid, + output reg debug_bus_cmd_ready, + input debug_bus_cmd_payload_wr, + input [7:0] debug_bus_cmd_payload_address, + input [31:0] debug_bus_cmd_payload_data, + output reg [31:0] debug_bus_rsp_data, + output debug_resetOut, + output CfuPlugin_bus_cmd_valid, + input CfuPlugin_bus_cmd_ready, + output [9:0] CfuPlugin_bus_cmd_payload_function_id, + output [31:0] CfuPlugin_bus_cmd_payload_inputs_0, + output [31:0] CfuPlugin_bus_cmd_payload_inputs_1, + input CfuPlugin_bus_rsp_valid, + output CfuPlugin_bus_rsp_ready, + input [31:0] CfuPlugin_bus_rsp_payload_outputs_0, + output reg iBusWishbone_CYC, + output reg iBusWishbone_STB, + input iBusWishbone_ACK, + output iBusWishbone_WE, + output [29:0] iBusWishbone_ADR, + input [31:0] iBusWishbone_DAT_MISO, + output [31:0] iBusWishbone_DAT_MOSI, + output [3:0] iBusWishbone_SEL, + input iBusWishbone_ERR, + output [2:0] iBusWishbone_CTI, + output [1:0] iBusWishbone_BTE, + output dBusWishbone_CYC, + output dBusWishbone_STB, + input dBusWishbone_ACK, + output dBusWishbone_WE, + output [29:0] dBusWishbone_ADR, + input [31:0] dBusWishbone_DAT_MISO, + output [31:0] dBusWishbone_DAT_MOSI, + output [3:0] dBusWishbone_SEL, + input dBusWishbone_ERR, + output [2:0] dBusWishbone_CTI, + output [1:0] dBusWishbone_BTE, + input clk, + input reset, + input debugReset +); + wire IBusCachedPlugin_cache_io_flush; + wire IBusCachedPlugin_cache_io_cpu_prefetch_isValid; + wire IBusCachedPlugin_cache_io_cpu_fetch_isValid; + wire IBusCachedPlugin_cache_io_cpu_fetch_isStuck; + wire IBusCachedPlugin_cache_io_cpu_fetch_isRemoved; + wire IBusCachedPlugin_cache_io_cpu_decode_isValid; + wire IBusCachedPlugin_cache_io_cpu_decode_isStuck; + wire IBusCachedPlugin_cache_io_cpu_decode_isUser; + reg IBusCachedPlugin_cache_io_cpu_fill_valid; + wire dataCache_1_io_cpu_execute_isValid; + wire [31:0] dataCache_1_io_cpu_execute_address; + wire dataCache_1_io_cpu_memory_isValid; + wire [31:0] dataCache_1_io_cpu_memory_address; + reg dataCache_1_io_cpu_memory_mmuRsp_isIoAccess; + reg dataCache_1_io_cpu_writeBack_isValid; + wire dataCache_1_io_cpu_writeBack_isUser; + wire [31:0] dataCache_1_io_cpu_writeBack_storeData; + wire [31:0] dataCache_1_io_cpu_writeBack_address; + wire dataCache_1_io_cpu_writeBack_fence_SW; + wire dataCache_1_io_cpu_writeBack_fence_SR; + wire dataCache_1_io_cpu_writeBack_fence_SO; + wire dataCache_1_io_cpu_writeBack_fence_SI; + wire dataCache_1_io_cpu_writeBack_fence_PW; + wire dataCache_1_io_cpu_writeBack_fence_PR; + wire dataCache_1_io_cpu_writeBack_fence_PO; + wire dataCache_1_io_cpu_writeBack_fence_PI; + wire [3:0] dataCache_1_io_cpu_writeBack_fence_FM; + wire dataCache_1_io_cpu_flush_valid; + wire dataCache_1_io_mem_cmd_ready; + reg [31:0] _zz_RegFilePlugin_regFile_port0; + reg [31:0] _zz_RegFilePlugin_regFile_port1; + wire IBusCachedPlugin_cache_io_cpu_prefetch_haltIt; + wire [31:0] IBusCachedPlugin_cache_io_cpu_fetch_data; + wire [31:0] IBusCachedPlugin_cache_io_cpu_fetch_physicalAddress; + wire IBusCachedPlugin_cache_io_cpu_decode_error; + wire IBusCachedPlugin_cache_io_cpu_decode_mmuRefilling; + wire IBusCachedPlugin_cache_io_cpu_decode_mmuException; + wire [31:0] IBusCachedPlugin_cache_io_cpu_decode_data; + wire IBusCachedPlugin_cache_io_cpu_decode_cacheMiss; + wire [31:0] IBusCachedPlugin_cache_io_cpu_decode_physicalAddress; + wire IBusCachedPlugin_cache_io_mem_cmd_valid; + wire [31:0] IBusCachedPlugin_cache_io_mem_cmd_payload_address; + wire [2:0] IBusCachedPlugin_cache_io_mem_cmd_payload_size; + wire dataCache_1_io_cpu_execute_haltIt; + wire dataCache_1_io_cpu_execute_refilling; + wire dataCache_1_io_cpu_memory_isWrite; + wire dataCache_1_io_cpu_writeBack_haltIt; + wire [31:0] dataCache_1_io_cpu_writeBack_data; + wire dataCache_1_io_cpu_writeBack_mmuException; + wire dataCache_1_io_cpu_writeBack_unalignedAccess; + wire dataCache_1_io_cpu_writeBack_accessError; + wire dataCache_1_io_cpu_writeBack_isWrite; + wire dataCache_1_io_cpu_writeBack_keepMemRspData; + wire dataCache_1_io_cpu_writeBack_exclusiveOk; + wire dataCache_1_io_cpu_flush_ready; + wire dataCache_1_io_cpu_redo; + wire dataCache_1_io_mem_cmd_valid; + wire dataCache_1_io_mem_cmd_payload_wr; + wire dataCache_1_io_mem_cmd_payload_uncached; + wire [31:0] dataCache_1_io_mem_cmd_payload_address; + wire [31:0] dataCache_1_io_mem_cmd_payload_data; + wire [3:0] dataCache_1_io_mem_cmd_payload_mask; + wire [2:0] dataCache_1_io_mem_cmd_payload_size; + wire dataCache_1_io_mem_cmd_payload_last; + wire [51:0] _zz_memory_MUL_LOW; + wire [51:0] _zz_memory_MUL_LOW_1; + wire [51:0] _zz_memory_MUL_LOW_2; + wire [51:0] _zz_memory_MUL_LOW_3; + wire [32:0] _zz_memory_MUL_LOW_4; + wire [51:0] _zz_memory_MUL_LOW_5; + wire [49:0] _zz_memory_MUL_LOW_6; + wire [51:0] _zz_memory_MUL_LOW_7; + wire [49:0] _zz_memory_MUL_LOW_8; + wire [31:0] _zz_execute_SHIFT_RIGHT; + wire [32:0] _zz_execute_SHIFT_RIGHT_1; + wire [32:0] _zz_execute_SHIFT_RIGHT_2; + wire [31:0] _zz_decode_LEGAL_INSTRUCTION; + wire [31:0] _zz_decode_LEGAL_INSTRUCTION_1; + wire [31:0] _zz_decode_LEGAL_INSTRUCTION_2; + wire _zz_decode_LEGAL_INSTRUCTION_3; + wire [0:0] _zz_decode_LEGAL_INSTRUCTION_4; + wire [14:0] _zz_decode_LEGAL_INSTRUCTION_5; + wire [31:0] _zz_decode_LEGAL_INSTRUCTION_6; + wire [31:0] _zz_decode_LEGAL_INSTRUCTION_7; + wire [31:0] _zz_decode_LEGAL_INSTRUCTION_8; + wire _zz_decode_LEGAL_INSTRUCTION_9; + wire [0:0] _zz_decode_LEGAL_INSTRUCTION_10; + wire [8:0] _zz_decode_LEGAL_INSTRUCTION_11; + wire [31:0] _zz_decode_LEGAL_INSTRUCTION_12; + wire [31:0] _zz_decode_LEGAL_INSTRUCTION_13; + wire [31:0] _zz_decode_LEGAL_INSTRUCTION_14; + wire _zz_decode_LEGAL_INSTRUCTION_15; + wire [0:0] _zz_decode_LEGAL_INSTRUCTION_16; + wire [2:0] _zz_decode_LEGAL_INSTRUCTION_17; + wire [3:0] _zz__zz_IBusCachedPlugin_jump_pcLoad_payload_1; + reg [31:0] _zz_IBusCachedPlugin_jump_pcLoad_payload_5; + wire [1:0] _zz_IBusCachedPlugin_jump_pcLoad_payload_6; + wire [31:0] _zz_IBusCachedPlugin_fetchPc_pc; + wire [2:0] _zz_IBusCachedPlugin_fetchPc_pc_1; + wire [11:0] _zz__zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch; + wire [31:0] _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_2; + wire [19:0] _zz__zz_2; + wire [11:0] _zz__zz_4; + wire [31:0] _zz__zz_6; + wire [31:0] _zz__zz_6_1; + wire [19:0] _zz__zz_IBusCachedPlugin_predictionJumpInterface_payload; + wire [11:0] _zz__zz_IBusCachedPlugin_predictionJumpInterface_payload_2; + wire _zz_IBusCachedPlugin_predictionJumpInterface_payload_4; + wire _zz_IBusCachedPlugin_predictionJumpInterface_payload_5; + wire _zz_IBusCachedPlugin_predictionJumpInterface_payload_6; + wire [2:0] _zz_DBusCachedPlugin_exceptionBus_payload_code; + wire [2:0] _zz_DBusCachedPlugin_exceptionBus_payload_code_1; + reg [7:0] _zz_writeBack_DBusCachedPlugin_rspShifted; + wire [1:0] _zz_writeBack_DBusCachedPlugin_rspShifted_1; + reg [7:0] _zz_writeBack_DBusCachedPlugin_rspShifted_2; + wire [0:0] _zz_writeBack_DBusCachedPlugin_rspShifted_3; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_1; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_2; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_3; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_4; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_5; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_6; + wire [27:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_7; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_8; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_9; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_10; + wire [1:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_11; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_12; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_13; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_14; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_15; + wire [1:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_16; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_17; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_18; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_19; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_20; + wire [22:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_21; + wire [1:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_22; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_23; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_24; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_25; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_26; + wire [1:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_27; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_28; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_29; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_30; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_31; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_32; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_33; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_34; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_35; + wire [19:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_36; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_37; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_38; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_39; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_40; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_41; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_42; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_43; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_44; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_45; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_46; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_47; + wire [16:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_48; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_49; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_50; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_51; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_52; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_53; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_54; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_55; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_56; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_57; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_58; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_59; + wire [3:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_60; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_61; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_62; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_63; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_64; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_65; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_66; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_67; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_68; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_69; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_70; + wire [13:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_71; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_72; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_73; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_74; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_75; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_76; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_77; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_78; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_79; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_80; + wire [3:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_81; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_82; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_83; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_84; + wire [1:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_85; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_86; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_87; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_88; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_89; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_90; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_91; + wire [3:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_92; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_93; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_94; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_95; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_96; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_97; + wire [1:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_98; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_99; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_100; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_101; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_102; + wire [10:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_103; + wire [5:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_104; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_105; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_106; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_107; + wire [3:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_108; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_109; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_110; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_111; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_112; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_113; + wire [1:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_114; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_115; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_116; + wire [5:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_117; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_118; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_119; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_120; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_121; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_122; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_123; + wire [1:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_124; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_125; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_126; + wire [1:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_127; + wire [7:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_128; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_129; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_130; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_131; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_132; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_133; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_134; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_135; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_136; + wire [5:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_137; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_138; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_139; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_140; + wire [2:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_141; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_142; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_143; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_144; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_145; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_146; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_147; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_148; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_149; + wire [3:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_150; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_151; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_152; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_153; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_154; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_155; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_156; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_157; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_158; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_159; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_160; + wire [1:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_161; + wire [1:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_162; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_163; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_164; + wire [1:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_165; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_166; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_167; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_168; + wire _zz_RegFilePlugin_regFile_port; + wire _zz_decode_RegFilePlugin_rs1Data; + wire _zz_RegFilePlugin_regFile_port_1; + wire _zz_decode_RegFilePlugin_rs2Data; + wire [0:0] _zz__zz_execute_REGFILE_WRITE_DATA; + wire [2:0] _zz__zz_execute_SRC1; + wire [4:0] _zz__zz_execute_SRC1_1; + wire [11:0] _zz__zz_execute_SRC2_3; + wire [31:0] _zz_execute_SrcPlugin_addSub; + wire [31:0] _zz_execute_SrcPlugin_addSub_1; + wire [31:0] _zz_execute_SrcPlugin_addSub_2; + wire [31:0] _zz_execute_SrcPlugin_addSub_3; + wire [31:0] _zz_execute_SrcPlugin_addSub_4; + wire [31:0] _zz_execute_SrcPlugin_addSub_5; + wire [31:0] _zz_execute_SrcPlugin_addSub_6; + wire [19:0] _zz__zz_execute_BranchPlugin_missAlignedTarget_2; + wire [11:0] _zz__zz_execute_BranchPlugin_missAlignedTarget_4; + wire [31:0] _zz__zz_execute_BranchPlugin_missAlignedTarget_6; + wire [31:0] _zz__zz_execute_BranchPlugin_missAlignedTarget_6_1; + wire [31:0] _zz__zz_execute_BranchPlugin_missAlignedTarget_6_2; + wire [19:0] _zz__zz_execute_BranchPlugin_branch_src2_2; + wire [11:0] _zz__zz_execute_BranchPlugin_branch_src2_4; + wire _zz_execute_BranchPlugin_branch_src2_6; + wire _zz_execute_BranchPlugin_branch_src2_7; + wire _zz_execute_BranchPlugin_branch_src2_8; + wire [2:0] _zz_execute_BranchPlugin_branch_src2_9; + wire [1:0] _zz__zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_1; + wire [1:0] _zz__zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_1_1; + wire [1:0] _zz__zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_3; + wire [1:0] _zz__zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_3_1; + wire _zz_when; + wire _zz_when_1; + wire [65:0] _zz_writeBack_MulPlugin_result; + wire [65:0] _zz_writeBack_MulPlugin_result_1; + wire [31:0] _zz__zz_decode_RS2_2; + wire [31:0] _zz__zz_decode_RS2_2_1; + wire [5:0] _zz_memory_DivPlugin_div_counter_valueNext; + wire [0:0] _zz_memory_DivPlugin_div_counter_valueNext_1; + wire [32:0] _zz_memory_DivPlugin_div_stage_0_remainderMinusDenominator; + wire [31:0] _zz_memory_DivPlugin_div_stage_0_outRemainder; + wire [31:0] _zz_memory_DivPlugin_div_stage_0_outRemainder_1; + wire [32:0] _zz_memory_DivPlugin_div_stage_0_outNumerator; + wire [32:0] _zz_memory_DivPlugin_div_result_1; + wire [32:0] _zz_memory_DivPlugin_div_result_2; + wire [32:0] _zz_memory_DivPlugin_div_result_3; + wire [32:0] _zz_memory_DivPlugin_div_result_4; + wire [0:0] _zz_memory_DivPlugin_div_result_5; + wire [32:0] _zz_memory_DivPlugin_rs1_2; + wire [0:0] _zz_memory_DivPlugin_rs1_3; + wire [31:0] _zz_memory_DivPlugin_rs2_1; + wire [0:0] _zz_memory_DivPlugin_rs2_2; + wire [9:0] _zz_execute_CfuPlugin_functionsIds_0; + wire [31:0] _zz_CsrPlugin_csrMapping_readDataInit_25; + wire [26:0] _zz_iBusWishbone_ADR_1; + wire [51:0] memory_MUL_LOW; + wire writeBack_CfuPlugin_CFU_IN_FLIGHT; + wire execute_CfuPlugin_CFU_IN_FLIGHT; + wire [33:0] memory_MUL_HH; + wire [33:0] execute_MUL_HH; + wire [33:0] execute_MUL_HL; + wire [33:0] execute_MUL_LH; + wire [31:0] execute_MUL_LL; + wire [31:0] execute_SHIFT_RIGHT; + wire [31:0] execute_REGFILE_WRITE_DATA; + wire [31:0] memory_MEMORY_STORE_DATA_RF; + wire [31:0] execute_MEMORY_STORE_DATA_RF; + wire decode_DO_EBREAK; + wire decode_CSR_READ_OPCODE; + wire decode_CSR_WRITE_OPCODE; + wire decode_PREDICTION_HAD_BRANCHED2; + wire decode_SRC2_FORCE_ZERO; + wire `Input2Kind_binary_sequential_type decode_CfuPlugin_CFU_INPUT_2_KIND; + wire `Input2Kind_binary_sequential_type _zz_decode_CfuPlugin_CFU_INPUT_2_KIND; + wire `Input2Kind_binary_sequential_type _zz_decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND; + wire `Input2Kind_binary_sequential_type _zz_decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND_1; + wire decode_CfuPlugin_CFU_ENABLE; + wire decode_IS_RS2_SIGNED; + wire decode_IS_RS1_SIGNED; + wire decode_IS_DIV; + wire memory_IS_MUL; + wire execute_IS_MUL; + wire decode_IS_MUL; + wire `EnvCtrlEnum_binary_sequential_type _zz_memory_to_writeBack_ENV_CTRL; + wire `EnvCtrlEnum_binary_sequential_type _zz_memory_to_writeBack_ENV_CTRL_1; + wire `EnvCtrlEnum_binary_sequential_type _zz_execute_to_memory_ENV_CTRL; + wire `EnvCtrlEnum_binary_sequential_type _zz_execute_to_memory_ENV_CTRL_1; + wire `EnvCtrlEnum_binary_sequential_type decode_ENV_CTRL; + wire `EnvCtrlEnum_binary_sequential_type _zz_decode_ENV_CTRL; + wire `EnvCtrlEnum_binary_sequential_type _zz_decode_to_execute_ENV_CTRL; + wire `EnvCtrlEnum_binary_sequential_type _zz_decode_to_execute_ENV_CTRL_1; + wire decode_IS_CSR; + wire `BranchCtrlEnum_binary_sequential_type _zz_decode_to_execute_BRANCH_CTRL; + wire `BranchCtrlEnum_binary_sequential_type _zz_decode_to_execute_BRANCH_CTRL_1; + wire `ShiftCtrlEnum_binary_sequential_type _zz_execute_to_memory_SHIFT_CTRL; + wire `ShiftCtrlEnum_binary_sequential_type _zz_execute_to_memory_SHIFT_CTRL_1; + wire `ShiftCtrlEnum_binary_sequential_type decode_SHIFT_CTRL; + wire `ShiftCtrlEnum_binary_sequential_type _zz_decode_SHIFT_CTRL; + wire `ShiftCtrlEnum_binary_sequential_type _zz_decode_to_execute_SHIFT_CTRL; + wire `ShiftCtrlEnum_binary_sequential_type _zz_decode_to_execute_SHIFT_CTRL_1; + wire `AluBitwiseCtrlEnum_binary_sequential_type decode_ALU_BITWISE_CTRL; + wire `AluBitwiseCtrlEnum_binary_sequential_type _zz_decode_ALU_BITWISE_CTRL; + wire `AluBitwiseCtrlEnum_binary_sequential_type _zz_decode_to_execute_ALU_BITWISE_CTRL; + wire `AluBitwiseCtrlEnum_binary_sequential_type _zz_decode_to_execute_ALU_BITWISE_CTRL_1; + wire decode_SRC_LESS_UNSIGNED; + wire decode_MEMORY_MANAGMENT; + wire memory_MEMORY_WR; + wire decode_MEMORY_WR; + wire execute_BYPASSABLE_MEMORY_STAGE; + wire decode_BYPASSABLE_MEMORY_STAGE; + wire decode_BYPASSABLE_EXECUTE_STAGE; + wire `Src2CtrlEnum_binary_sequential_type decode_SRC2_CTRL; + wire `Src2CtrlEnum_binary_sequential_type _zz_decode_SRC2_CTRL; + wire `Src2CtrlEnum_binary_sequential_type _zz_decode_to_execute_SRC2_CTRL; + wire `Src2CtrlEnum_binary_sequential_type _zz_decode_to_execute_SRC2_CTRL_1; + wire `AluCtrlEnum_binary_sequential_type decode_ALU_CTRL; + wire `AluCtrlEnum_binary_sequential_type _zz_decode_ALU_CTRL; + wire `AluCtrlEnum_binary_sequential_type _zz_decode_to_execute_ALU_CTRL; + wire `AluCtrlEnum_binary_sequential_type _zz_decode_to_execute_ALU_CTRL_1; + wire `Src1CtrlEnum_binary_sequential_type decode_SRC1_CTRL; + wire `Src1CtrlEnum_binary_sequential_type _zz_decode_SRC1_CTRL; + wire `Src1CtrlEnum_binary_sequential_type _zz_decode_to_execute_SRC1_CTRL; + wire `Src1CtrlEnum_binary_sequential_type _zz_decode_to_execute_SRC1_CTRL_1; + wire decode_MEMORY_FORCE_CONSTISTENCY; + wire [31:0] writeBack_FORMAL_PC_NEXT; + wire [31:0] memory_FORMAL_PC_NEXT; + wire [31:0] execute_FORMAL_PC_NEXT; + wire [31:0] decode_FORMAL_PC_NEXT; + wire [31:0] memory_PC; + reg _zz_memory_to_writeBack_CfuPlugin_CFU_IN_FLIGHT; + reg _zz_execute_to_memory_CfuPlugin_CFU_IN_FLIGHT; + wire memory_CfuPlugin_CFU_IN_FLIGHT; + wire `Input2Kind_binary_sequential_type execute_CfuPlugin_CFU_INPUT_2_KIND; + wire `Input2Kind_binary_sequential_type _zz_execute_CfuPlugin_CFU_INPUT_2_KIND; + wire execute_CfuPlugin_CFU_ENABLE; + wire execute_DO_EBREAK; + wire decode_IS_EBREAK; + wire execute_IS_RS1_SIGNED; + wire execute_IS_DIV; + wire execute_IS_RS2_SIGNED; + wire memory_IS_DIV; + wire writeBack_IS_MUL; + wire [33:0] writeBack_MUL_HH; + wire [51:0] writeBack_MUL_LOW; + wire [33:0] memory_MUL_HL; + wire [33:0] memory_MUL_LH; + wire [31:0] memory_MUL_LL; + wire execute_CSR_READ_OPCODE; + wire execute_CSR_WRITE_OPCODE; + wire execute_IS_CSR; + wire `EnvCtrlEnum_binary_sequential_type memory_ENV_CTRL; + wire `EnvCtrlEnum_binary_sequential_type _zz_memory_ENV_CTRL; + wire `EnvCtrlEnum_binary_sequential_type execute_ENV_CTRL; + wire `EnvCtrlEnum_binary_sequential_type _zz_execute_ENV_CTRL; + wire `EnvCtrlEnum_binary_sequential_type writeBack_ENV_CTRL; + wire `EnvCtrlEnum_binary_sequential_type _zz_writeBack_ENV_CTRL; + wire [31:0] execute_BRANCH_CALC; + wire execute_BRANCH_DO; + wire [31:0] execute_PC; + wire execute_PREDICTION_HAD_BRANCHED2; + (* keep , syn_keep *) wire [31:0] execute_RS1 /* synthesis syn_keep = 1 */ ; + wire execute_BRANCH_COND_RESULT; + wire `BranchCtrlEnum_binary_sequential_type execute_BRANCH_CTRL; + wire `BranchCtrlEnum_binary_sequential_type _zz_execute_BRANCH_CTRL; + wire decode_RS2_USE; + wire decode_RS1_USE; + reg [31:0] _zz_decode_RS2; + wire execute_REGFILE_WRITE_VALID; + wire execute_BYPASSABLE_EXECUTE_STAGE; + wire memory_REGFILE_WRITE_VALID; + wire [31:0] memory_INSTRUCTION; + wire memory_BYPASSABLE_MEMORY_STAGE; + wire writeBack_REGFILE_WRITE_VALID; + reg [31:0] decode_RS2; + reg [31:0] decode_RS1; + wire [31:0] memory_SHIFT_RIGHT; + reg [31:0] _zz_decode_RS2_1; + wire `ShiftCtrlEnum_binary_sequential_type memory_SHIFT_CTRL; + wire `ShiftCtrlEnum_binary_sequential_type _zz_memory_SHIFT_CTRL; + wire `ShiftCtrlEnum_binary_sequential_type execute_SHIFT_CTRL; + wire `ShiftCtrlEnum_binary_sequential_type _zz_execute_SHIFT_CTRL; + wire execute_SRC_LESS_UNSIGNED; + wire execute_SRC2_FORCE_ZERO; + wire execute_SRC_USE_SUB_LESS; + wire [31:0] _zz_execute_SRC2; + wire `Src2CtrlEnum_binary_sequential_type execute_SRC2_CTRL; + wire `Src2CtrlEnum_binary_sequential_type _zz_execute_SRC2_CTRL; + wire `Src1CtrlEnum_binary_sequential_type execute_SRC1_CTRL; + wire `Src1CtrlEnum_binary_sequential_type _zz_execute_SRC1_CTRL; + wire decode_SRC_USE_SUB_LESS; + wire decode_SRC_ADD_ZERO; + wire [31:0] execute_SRC_ADD_SUB; + wire execute_SRC_LESS; + wire `AluCtrlEnum_binary_sequential_type execute_ALU_CTRL; + wire `AluCtrlEnum_binary_sequential_type _zz_execute_ALU_CTRL; + wire [31:0] execute_SRC2; + wire [31:0] execute_SRC1; + wire `AluBitwiseCtrlEnum_binary_sequential_type execute_ALU_BITWISE_CTRL; + wire `AluBitwiseCtrlEnum_binary_sequential_type _zz_execute_ALU_BITWISE_CTRL; + wire [31:0] _zz_lastStageRegFileWrite_payload_address; + wire _zz_lastStageRegFileWrite_valid; + reg _zz_1; + wire [31:0] decode_INSTRUCTION_ANTICIPATED; + reg decode_REGFILE_WRITE_VALID; + wire decode_LEGAL_INSTRUCTION; + wire `Input2Kind_binary_sequential_type _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_1; + wire `EnvCtrlEnum_binary_sequential_type _zz_decode_ENV_CTRL_1; + wire `BranchCtrlEnum_binary_sequential_type _zz_decode_BRANCH_CTRL; + wire `ShiftCtrlEnum_binary_sequential_type _zz_decode_SHIFT_CTRL_1; + wire `AluBitwiseCtrlEnum_binary_sequential_type _zz_decode_ALU_BITWISE_CTRL_1; + wire `Src2CtrlEnum_binary_sequential_type _zz_decode_SRC2_CTRL_1; + wire `AluCtrlEnum_binary_sequential_type _zz_decode_ALU_CTRL_1; + wire `Src1CtrlEnum_binary_sequential_type _zz_decode_SRC1_CTRL_1; + reg [31:0] _zz_decode_RS2_2; + wire writeBack_MEMORY_WR; + wire [31:0] writeBack_MEMORY_STORE_DATA_RF; + wire [31:0] writeBack_REGFILE_WRITE_DATA; + wire writeBack_MEMORY_ENABLE; + wire [31:0] memory_REGFILE_WRITE_DATA; + wire memory_MEMORY_ENABLE; + wire execute_MEMORY_FORCE_CONSTISTENCY; + wire execute_MEMORY_MANAGMENT; + (* keep , syn_keep *) wire [31:0] execute_RS2 /* synthesis syn_keep = 1 */ ; + wire execute_MEMORY_WR; + wire [31:0] execute_SRC_ADD; + wire execute_MEMORY_ENABLE; + wire [31:0] execute_INSTRUCTION; + wire decode_MEMORY_ENABLE; + wire decode_FLUSH_ALL; + reg IBusCachedPlugin_rsp_issueDetected_4; + reg IBusCachedPlugin_rsp_issueDetected_3; + reg IBusCachedPlugin_rsp_issueDetected_2; + reg IBusCachedPlugin_rsp_issueDetected_1; + wire `BranchCtrlEnum_binary_sequential_type decode_BRANCH_CTRL; + wire `BranchCtrlEnum_binary_sequential_type _zz_decode_BRANCH_CTRL_1; + wire [31:0] decode_INSTRUCTION; + reg [31:0] _zz_execute_to_memory_FORMAL_PC_NEXT; + reg [31:0] _zz_decode_to_execute_FORMAL_PC_NEXT; + wire [31:0] decode_PC; + wire [31:0] writeBack_PC; + wire [31:0] writeBack_INSTRUCTION; + reg decode_arbitration_haltItself; + reg decode_arbitration_haltByOther; + reg decode_arbitration_removeIt; + wire decode_arbitration_flushIt; + reg decode_arbitration_flushNext; + reg decode_arbitration_isValid; + wire decode_arbitration_isStuck; + wire decode_arbitration_isStuckByOthers; + wire decode_arbitration_isFlushed; + wire decode_arbitration_isMoving; + wire decode_arbitration_isFiring; + reg execute_arbitration_haltItself; + reg execute_arbitration_haltByOther; + reg execute_arbitration_removeIt; + reg execute_arbitration_flushIt; + reg execute_arbitration_flushNext; + reg execute_arbitration_isValid; + wire execute_arbitration_isStuck; + wire execute_arbitration_isStuckByOthers; + wire execute_arbitration_isFlushed; + wire execute_arbitration_isMoving; + wire execute_arbitration_isFiring; + reg memory_arbitration_haltItself; + wire memory_arbitration_haltByOther; + reg memory_arbitration_removeIt; + wire memory_arbitration_flushIt; + wire memory_arbitration_flushNext; + reg memory_arbitration_isValid; + wire memory_arbitration_isStuck; + wire memory_arbitration_isStuckByOthers; + wire memory_arbitration_isFlushed; + wire memory_arbitration_isMoving; + wire memory_arbitration_isFiring; + reg writeBack_arbitration_haltItself; + wire writeBack_arbitration_haltByOther; + reg writeBack_arbitration_removeIt; + reg writeBack_arbitration_flushIt; + reg writeBack_arbitration_flushNext; + reg writeBack_arbitration_isValid; + wire writeBack_arbitration_isStuck; + wire writeBack_arbitration_isStuckByOthers; + wire writeBack_arbitration_isFlushed; + wire writeBack_arbitration_isMoving; + wire writeBack_arbitration_isFiring; + wire [31:0] lastStageInstruction /* verilator public */ ; + wire [31:0] lastStagePc /* verilator public */ ; + wire lastStageIsValid /* verilator public */ ; + wire lastStageIsFiring /* verilator public */ ; + reg IBusCachedPlugin_fetcherHalt; + reg IBusCachedPlugin_incomingInstruction; + wire IBusCachedPlugin_predictionJumpInterface_valid; + (* keep , syn_keep *) wire [31:0] IBusCachedPlugin_predictionJumpInterface_payload /* synthesis syn_keep = 1 */ ; + reg IBusCachedPlugin_decodePrediction_cmd_hadBranch; + wire IBusCachedPlugin_decodePrediction_rsp_wasWrong; + wire IBusCachedPlugin_pcValids_0; + wire IBusCachedPlugin_pcValids_1; + wire IBusCachedPlugin_pcValids_2; + wire IBusCachedPlugin_pcValids_3; + reg IBusCachedPlugin_decodeExceptionPort_valid; + reg [3:0] IBusCachedPlugin_decodeExceptionPort_payload_code; + wire [31:0] IBusCachedPlugin_decodeExceptionPort_payload_badAddr; + wire IBusCachedPlugin_mmuBus_cmd_0_isValid; + wire IBusCachedPlugin_mmuBus_cmd_0_isStuck; + wire [31:0] IBusCachedPlugin_mmuBus_cmd_0_virtualAddress; + wire IBusCachedPlugin_mmuBus_cmd_0_bypassTranslation; + wire [31:0] IBusCachedPlugin_mmuBus_rsp_physicalAddress; + wire IBusCachedPlugin_mmuBus_rsp_isIoAccess; + wire IBusCachedPlugin_mmuBus_rsp_isPaging; + wire IBusCachedPlugin_mmuBus_rsp_allowRead; + wire IBusCachedPlugin_mmuBus_rsp_allowWrite; + wire IBusCachedPlugin_mmuBus_rsp_allowExecute; + wire IBusCachedPlugin_mmuBus_rsp_exception; + wire IBusCachedPlugin_mmuBus_rsp_refilling; + wire IBusCachedPlugin_mmuBus_rsp_bypassTranslation; + wire IBusCachedPlugin_mmuBus_end; + wire IBusCachedPlugin_mmuBus_busy; + wire dBus_cmd_valid; + wire dBus_cmd_ready; + wire dBus_cmd_payload_wr; + wire dBus_cmd_payload_uncached; + wire [31:0] dBus_cmd_payload_address; + wire [31:0] dBus_cmd_payload_data; + wire [3:0] dBus_cmd_payload_mask; + wire [2:0] dBus_cmd_payload_size; + wire dBus_cmd_payload_last; + wire dBus_rsp_valid; + wire dBus_rsp_payload_last; + wire [31:0] dBus_rsp_payload_data; + wire dBus_rsp_payload_error; + wire DBusCachedPlugin_mmuBus_cmd_0_isValid; + wire DBusCachedPlugin_mmuBus_cmd_0_isStuck; + wire [31:0] DBusCachedPlugin_mmuBus_cmd_0_virtualAddress; + wire DBusCachedPlugin_mmuBus_cmd_0_bypassTranslation; + wire [31:0] DBusCachedPlugin_mmuBus_rsp_physicalAddress; + wire DBusCachedPlugin_mmuBus_rsp_isIoAccess; + wire DBusCachedPlugin_mmuBus_rsp_isPaging; + wire DBusCachedPlugin_mmuBus_rsp_allowRead; + wire DBusCachedPlugin_mmuBus_rsp_allowWrite; + wire DBusCachedPlugin_mmuBus_rsp_allowExecute; + wire DBusCachedPlugin_mmuBus_rsp_exception; + wire DBusCachedPlugin_mmuBus_rsp_refilling; + wire DBusCachedPlugin_mmuBus_rsp_bypassTranslation; + wire DBusCachedPlugin_mmuBus_end; + wire DBusCachedPlugin_mmuBus_busy; + reg DBusCachedPlugin_redoBranch_valid; + wire [31:0] DBusCachedPlugin_redoBranch_payload; + reg DBusCachedPlugin_exceptionBus_valid; + reg [3:0] DBusCachedPlugin_exceptionBus_payload_code; + wire [31:0] DBusCachedPlugin_exceptionBus_payload_badAddr; + reg _zz_when_DBusCachedPlugin_l386; + wire decodeExceptionPort_valid; + wire [3:0] decodeExceptionPort_payload_code; + wire [31:0] decodeExceptionPort_payload_badAddr; + wire BranchPlugin_jumpInterface_valid; + wire [31:0] BranchPlugin_jumpInterface_payload; + reg BranchPlugin_branchExceptionPort_valid; + wire [3:0] BranchPlugin_branchExceptionPort_payload_code; + wire [31:0] BranchPlugin_branchExceptionPort_payload_badAddr; + wire [31:0] CsrPlugin_csrMapping_readDataSignal; + wire [31:0] CsrPlugin_csrMapping_readDataInit; + wire [31:0] CsrPlugin_csrMapping_writeDataSignal; + wire CsrPlugin_csrMapping_allowCsrSignal; + wire CsrPlugin_csrMapping_hazardFree; + reg CsrPlugin_inWfi /* verilator public */ ; + reg CsrPlugin_thirdPartyWake; + reg CsrPlugin_jumpInterface_valid; + reg [31:0] CsrPlugin_jumpInterface_payload; + wire CsrPlugin_exceptionPendings_0; + wire CsrPlugin_exceptionPendings_1; + wire CsrPlugin_exceptionPendings_2; + wire CsrPlugin_exceptionPendings_3; + wire externalInterrupt; + wire contextSwitching; + reg [1:0] CsrPlugin_privilege; + reg CsrPlugin_forceMachineWire; + reg CsrPlugin_selfException_valid; + reg [3:0] CsrPlugin_selfException_payload_code; + wire [31:0] CsrPlugin_selfException_payload_badAddr; + reg CsrPlugin_allowInterrupts; + reg CsrPlugin_allowException; + reg CsrPlugin_allowEbreakException; + reg IBusCachedPlugin_injectionPort_valid; + reg IBusCachedPlugin_injectionPort_ready; + wire [31:0] IBusCachedPlugin_injectionPort_payload; + wire IBusCachedPlugin_externalFlush; + wire IBusCachedPlugin_jump_pcLoad_valid; + wire [31:0] IBusCachedPlugin_jump_pcLoad_payload; + wire [3:0] _zz_IBusCachedPlugin_jump_pcLoad_payload; + wire [3:0] _zz_IBusCachedPlugin_jump_pcLoad_payload_1; + wire _zz_IBusCachedPlugin_jump_pcLoad_payload_2; + wire _zz_IBusCachedPlugin_jump_pcLoad_payload_3; + wire _zz_IBusCachedPlugin_jump_pcLoad_payload_4; + wire IBusCachedPlugin_fetchPc_output_valid; + wire IBusCachedPlugin_fetchPc_output_ready; + wire [31:0] IBusCachedPlugin_fetchPc_output_payload; + reg [31:0] IBusCachedPlugin_fetchPc_pcReg /* verilator public */ ; + reg IBusCachedPlugin_fetchPc_correction; + reg IBusCachedPlugin_fetchPc_correctionReg; + wire IBusCachedPlugin_fetchPc_output_fire; + wire IBusCachedPlugin_fetchPc_corrected; + reg IBusCachedPlugin_fetchPc_pcRegPropagate; + reg IBusCachedPlugin_fetchPc_booted; + reg IBusCachedPlugin_fetchPc_inc; + wire when_Fetcher_l131; + wire IBusCachedPlugin_fetchPc_output_fire_1; + wire when_Fetcher_l131_1; + reg [31:0] IBusCachedPlugin_fetchPc_pc; + wire IBusCachedPlugin_fetchPc_redo_valid; + wire [31:0] IBusCachedPlugin_fetchPc_redo_payload; + reg IBusCachedPlugin_fetchPc_flushed; + wire when_Fetcher_l158; + reg IBusCachedPlugin_iBusRsp_redoFetch; + wire IBusCachedPlugin_iBusRsp_stages_0_input_valid; + wire IBusCachedPlugin_iBusRsp_stages_0_input_ready; + wire [31:0] IBusCachedPlugin_iBusRsp_stages_0_input_payload; + wire IBusCachedPlugin_iBusRsp_stages_0_output_valid; + wire IBusCachedPlugin_iBusRsp_stages_0_output_ready; + wire [31:0] IBusCachedPlugin_iBusRsp_stages_0_output_payload; + reg IBusCachedPlugin_iBusRsp_stages_0_halt; + wire IBusCachedPlugin_iBusRsp_stages_1_input_valid; + wire IBusCachedPlugin_iBusRsp_stages_1_input_ready; + wire [31:0] IBusCachedPlugin_iBusRsp_stages_1_input_payload; + wire IBusCachedPlugin_iBusRsp_stages_1_output_valid; + wire IBusCachedPlugin_iBusRsp_stages_1_output_ready; + wire [31:0] IBusCachedPlugin_iBusRsp_stages_1_output_payload; + reg IBusCachedPlugin_iBusRsp_stages_1_halt; + wire IBusCachedPlugin_iBusRsp_stages_2_input_valid; + wire IBusCachedPlugin_iBusRsp_stages_2_input_ready; + wire [31:0] IBusCachedPlugin_iBusRsp_stages_2_input_payload; + wire IBusCachedPlugin_iBusRsp_stages_2_output_valid; + wire IBusCachedPlugin_iBusRsp_stages_2_output_ready; + wire [31:0] IBusCachedPlugin_iBusRsp_stages_2_output_payload; + reg IBusCachedPlugin_iBusRsp_stages_2_halt; + wire _zz_IBusCachedPlugin_iBusRsp_stages_0_input_ready; + wire _zz_IBusCachedPlugin_iBusRsp_stages_1_input_ready; + wire _zz_IBusCachedPlugin_iBusRsp_stages_2_input_ready; + wire IBusCachedPlugin_iBusRsp_flush; + wire _zz_IBusCachedPlugin_iBusRsp_stages_0_output_ready; + wire _zz_IBusCachedPlugin_iBusRsp_stages_0_output_ready_1; + reg _zz_IBusCachedPlugin_iBusRsp_stages_0_output_ready_2; + wire IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_valid; + wire IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_ready; + wire [31:0] IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_payload; + reg _zz_IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_valid; + reg [31:0] _zz_IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_payload; + reg IBusCachedPlugin_iBusRsp_readyForError; + wire IBusCachedPlugin_iBusRsp_output_valid; + wire IBusCachedPlugin_iBusRsp_output_ready; + wire [31:0] IBusCachedPlugin_iBusRsp_output_payload_pc; + wire IBusCachedPlugin_iBusRsp_output_payload_rsp_error; + wire [31:0] IBusCachedPlugin_iBusRsp_output_payload_rsp_inst; + wire IBusCachedPlugin_iBusRsp_output_payload_isRvc; + wire when_Fetcher_l240; + wire when_Fetcher_l320; + reg IBusCachedPlugin_injector_nextPcCalc_valids_0; + wire when_Fetcher_l329; + reg IBusCachedPlugin_injector_nextPcCalc_valids_1; + wire when_Fetcher_l329_1; + reg IBusCachedPlugin_injector_nextPcCalc_valids_2; + wire when_Fetcher_l329_2; + reg IBusCachedPlugin_injector_nextPcCalc_valids_3; + wire when_Fetcher_l329_3; + reg IBusCachedPlugin_injector_nextPcCalc_valids_4; + wire when_Fetcher_l329_4; + wire _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch; + reg [18:0] _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_1; + wire _zz_2; + reg [10:0] _zz_3; + wire _zz_4; + reg [18:0] _zz_5; + reg _zz_6; + wire _zz_IBusCachedPlugin_predictionJumpInterface_payload; + reg [10:0] _zz_IBusCachedPlugin_predictionJumpInterface_payload_1; + wire _zz_IBusCachedPlugin_predictionJumpInterface_payload_2; + reg [18:0] _zz_IBusCachedPlugin_predictionJumpInterface_payload_3; + wire iBus_cmd_valid; + wire iBus_cmd_ready; + reg [31:0] iBus_cmd_payload_address; + wire [2:0] iBus_cmd_payload_size; + wire iBus_rsp_valid; + wire [31:0] iBus_rsp_payload_data; + wire iBus_rsp_payload_error; + wire [31:0] _zz_IBusCachedPlugin_rspCounter; + reg [31:0] IBusCachedPlugin_rspCounter; + wire IBusCachedPlugin_s0_tightlyCoupledHit; + reg IBusCachedPlugin_s1_tightlyCoupledHit; + reg IBusCachedPlugin_s2_tightlyCoupledHit; + wire IBusCachedPlugin_rsp_iBusRspOutputHalt; + wire IBusCachedPlugin_rsp_issueDetected; + reg IBusCachedPlugin_rsp_redoFetch; + wire when_IBusCachedPlugin_l239; + wire when_IBusCachedPlugin_l244; + wire when_IBusCachedPlugin_l250; + wire when_IBusCachedPlugin_l256; + wire when_IBusCachedPlugin_l267; + wire dataCache_1_io_mem_cmd_s2mPipe_valid; + reg dataCache_1_io_mem_cmd_s2mPipe_ready; + wire dataCache_1_io_mem_cmd_s2mPipe_payload_wr; + wire dataCache_1_io_mem_cmd_s2mPipe_payload_uncached; + wire [31:0] dataCache_1_io_mem_cmd_s2mPipe_payload_address; + wire [31:0] dataCache_1_io_mem_cmd_s2mPipe_payload_data; + wire [3:0] dataCache_1_io_mem_cmd_s2mPipe_payload_mask; + wire [2:0] dataCache_1_io_mem_cmd_s2mPipe_payload_size; + wire dataCache_1_io_mem_cmd_s2mPipe_payload_last; + reg dataCache_1_io_mem_cmd_rValid; + reg dataCache_1_io_mem_cmd_rData_wr; + reg dataCache_1_io_mem_cmd_rData_uncached; + reg [31:0] dataCache_1_io_mem_cmd_rData_address; + reg [31:0] dataCache_1_io_mem_cmd_rData_data; + reg [3:0] dataCache_1_io_mem_cmd_rData_mask; + reg [2:0] dataCache_1_io_mem_cmd_rData_size; + reg dataCache_1_io_mem_cmd_rData_last; + wire dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_valid; + wire dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_ready; + wire dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_payload_wr; + wire dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_payload_uncached; + wire [31:0] dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_payload_address; + wire [31:0] dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_payload_data; + wire [3:0] dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_payload_mask; + wire [2:0] dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_payload_size; + wire dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_payload_last; + reg dataCache_1_io_mem_cmd_s2mPipe_rValid; + reg dataCache_1_io_mem_cmd_s2mPipe_rData_wr; + reg dataCache_1_io_mem_cmd_s2mPipe_rData_uncached; + reg [31:0] dataCache_1_io_mem_cmd_s2mPipe_rData_address; + reg [31:0] dataCache_1_io_mem_cmd_s2mPipe_rData_data; + reg [3:0] dataCache_1_io_mem_cmd_s2mPipe_rData_mask; + reg [2:0] dataCache_1_io_mem_cmd_s2mPipe_rData_size; + reg dataCache_1_io_mem_cmd_s2mPipe_rData_last; + wire when_Stream_l342; + wire [31:0] _zz_DBusCachedPlugin_rspCounter; + reg [31:0] DBusCachedPlugin_rspCounter; + wire when_DBusCachedPlugin_l303; + wire [1:0] execute_DBusCachedPlugin_size; + reg [31:0] _zz_execute_MEMORY_STORE_DATA_RF; + wire dataCache_1_io_cpu_flush_isStall; + wire when_DBusCachedPlugin_l343; + wire when_DBusCachedPlugin_l359; + wire when_DBusCachedPlugin_l386; + wire when_DBusCachedPlugin_l438; + wire when_DBusCachedPlugin_l458; + wire [7:0] writeBack_DBusCachedPlugin_rspSplits_0; + wire [7:0] writeBack_DBusCachedPlugin_rspSplits_1; + wire [7:0] writeBack_DBusCachedPlugin_rspSplits_2; + wire [7:0] writeBack_DBusCachedPlugin_rspSplits_3; + reg [31:0] writeBack_DBusCachedPlugin_rspShifted; + wire [31:0] writeBack_DBusCachedPlugin_rspRf; + wire [1:0] switch_Misc_l200; + wire _zz_writeBack_DBusCachedPlugin_rspFormated; + reg [31:0] _zz_writeBack_DBusCachedPlugin_rspFormated_1; + wire _zz_writeBack_DBusCachedPlugin_rspFormated_2; + reg [31:0] _zz_writeBack_DBusCachedPlugin_rspFormated_3; + reg [31:0] writeBack_DBusCachedPlugin_rspFormated; + wire when_DBusCachedPlugin_l484; + wire [34:0] _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2; + wire _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_3; + wire _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_4; + wire _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_5; + wire _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_6; + wire _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_7; + wire `Src1CtrlEnum_binary_sequential_type _zz_decode_SRC1_CTRL_2; + wire `AluCtrlEnum_binary_sequential_type _zz_decode_ALU_CTRL_2; + wire `Src2CtrlEnum_binary_sequential_type _zz_decode_SRC2_CTRL_2; + wire `AluBitwiseCtrlEnum_binary_sequential_type _zz_decode_ALU_BITWISE_CTRL_2; + wire `ShiftCtrlEnum_binary_sequential_type _zz_decode_SHIFT_CTRL_2; + wire `BranchCtrlEnum_binary_sequential_type _zz_decode_BRANCH_CTRL_2; + wire `EnvCtrlEnum_binary_sequential_type _zz_decode_ENV_CTRL_2; + wire `Input2Kind_binary_sequential_type _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_8; + wire when_RegFilePlugin_l63; + wire [4:0] decode_RegFilePlugin_regFileReadAddress1; + wire [4:0] decode_RegFilePlugin_regFileReadAddress2; + wire [31:0] decode_RegFilePlugin_rs1Data; + wire [31:0] decode_RegFilePlugin_rs2Data; + reg lastStageRegFileWrite_valid /* verilator public */ ; + reg [4:0] lastStageRegFileWrite_payload_address /* verilator public */ ; + reg [31:0] lastStageRegFileWrite_payload_data /* verilator public */ ; + reg _zz_7; + reg [31:0] execute_IntAluPlugin_bitwise; + reg [31:0] _zz_execute_REGFILE_WRITE_DATA; + reg [31:0] _zz_execute_SRC1; + wire _zz_execute_SRC2_1; + reg [19:0] _zz_execute_SRC2_2; + wire _zz_execute_SRC2_3; + reg [19:0] _zz_execute_SRC2_4; + reg [31:0] _zz_execute_SRC2_5; + reg [31:0] execute_SrcPlugin_addSub; + wire execute_SrcPlugin_less; + wire [4:0] execute_FullBarrelShifterPlugin_amplitude; + reg [31:0] _zz_execute_FullBarrelShifterPlugin_reversed; + wire [31:0] execute_FullBarrelShifterPlugin_reversed; + reg [31:0] _zz_decode_RS2_3; + reg HazardSimplePlugin_src0Hazard; + reg HazardSimplePlugin_src1Hazard; + wire HazardSimplePlugin_writeBackWrites_valid; + wire [4:0] HazardSimplePlugin_writeBackWrites_payload_address; + wire [31:0] HazardSimplePlugin_writeBackWrites_payload_data; + reg HazardSimplePlugin_writeBackBuffer_valid; + reg [4:0] HazardSimplePlugin_writeBackBuffer_payload_address; + reg [31:0] HazardSimplePlugin_writeBackBuffer_payload_data; + wire HazardSimplePlugin_addr0Match; + wire HazardSimplePlugin_addr1Match; + wire when_HazardSimplePlugin_l47; + wire when_HazardSimplePlugin_l48; + wire when_HazardSimplePlugin_l51; + wire when_HazardSimplePlugin_l45; + wire when_HazardSimplePlugin_l57; + wire when_HazardSimplePlugin_l58; + wire when_HazardSimplePlugin_l48_1; + wire when_HazardSimplePlugin_l51_1; + wire when_HazardSimplePlugin_l45_1; + wire when_HazardSimplePlugin_l57_1; + wire when_HazardSimplePlugin_l58_1; + wire when_HazardSimplePlugin_l48_2; + wire when_HazardSimplePlugin_l51_2; + wire when_HazardSimplePlugin_l45_2; + wire when_HazardSimplePlugin_l57_2; + wire when_HazardSimplePlugin_l58_2; + wire when_HazardSimplePlugin_l105; + wire when_HazardSimplePlugin_l108; + wire when_HazardSimplePlugin_l113; + wire execute_BranchPlugin_eq; + wire [2:0] switch_Misc_l200_1; + reg _zz_execute_BRANCH_COND_RESULT; + reg _zz_execute_BRANCH_COND_RESULT_1; + wire _zz_execute_BranchPlugin_missAlignedTarget; + reg [19:0] _zz_execute_BranchPlugin_missAlignedTarget_1; + wire _zz_execute_BranchPlugin_missAlignedTarget_2; + reg [10:0] _zz_execute_BranchPlugin_missAlignedTarget_3; + wire _zz_execute_BranchPlugin_missAlignedTarget_4; + reg [18:0] _zz_execute_BranchPlugin_missAlignedTarget_5; + reg _zz_execute_BranchPlugin_missAlignedTarget_6; + wire execute_BranchPlugin_missAlignedTarget; + reg [31:0] execute_BranchPlugin_branch_src1; + reg [31:0] execute_BranchPlugin_branch_src2; + wire _zz_execute_BranchPlugin_branch_src2; + reg [19:0] _zz_execute_BranchPlugin_branch_src2_1; + wire _zz_execute_BranchPlugin_branch_src2_2; + reg [10:0] _zz_execute_BranchPlugin_branch_src2_3; + wire _zz_execute_BranchPlugin_branch_src2_4; + reg [18:0] _zz_execute_BranchPlugin_branch_src2_5; + wire [31:0] execute_BranchPlugin_branchAdder; + wire when_BranchPlugin_l296; + reg [1:0] CsrPlugin_misa_base; + reg [25:0] CsrPlugin_misa_extensions; + reg [1:0] CsrPlugin_mtvec_mode; + reg [29:0] CsrPlugin_mtvec_base; + reg [31:0] CsrPlugin_mepc; + reg CsrPlugin_mstatus_MIE; + reg CsrPlugin_mstatus_MPIE; + reg [1:0] CsrPlugin_mstatus_MPP; + reg CsrPlugin_mip_MEIP; + reg CsrPlugin_mip_MTIP; + reg CsrPlugin_mip_MSIP; + reg CsrPlugin_mie_MEIE; + reg CsrPlugin_mie_MTIE; + reg CsrPlugin_mie_MSIE; + reg [31:0] CsrPlugin_mscratch; + reg CsrPlugin_mcause_interrupt; + reg [3:0] CsrPlugin_mcause_exceptionCode; + reg [31:0] CsrPlugin_mtval; + reg [63:0] CsrPlugin_mcycle = 64'b0000000000000000000000000000000000000000000000000000000000000000; + reg [63:0] CsrPlugin_minstret = 64'b0000000000000000000000000000000000000000000000000000000000000000; + wire _zz_when_CsrPlugin_l952; + wire _zz_when_CsrPlugin_l952_1; + wire _zz_when_CsrPlugin_l952_2; + reg CsrPlugin_exceptionPortCtrl_exceptionValids_decode; + reg CsrPlugin_exceptionPortCtrl_exceptionValids_execute; + reg CsrPlugin_exceptionPortCtrl_exceptionValids_memory; + reg CsrPlugin_exceptionPortCtrl_exceptionValids_writeBack; + reg CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_decode; + reg CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_execute; + reg CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_memory; + reg CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_writeBack; + reg [3:0] CsrPlugin_exceptionPortCtrl_exceptionContext_code; + reg [31:0] CsrPlugin_exceptionPortCtrl_exceptionContext_badAddr; + wire [1:0] CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilegeUncapped; + wire [1:0] CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilege; + wire [1:0] _zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code; + wire _zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_1; + wire [1:0] _zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_2; + wire _zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_3; + wire when_CsrPlugin_l909; + wire when_CsrPlugin_l909_1; + wire when_CsrPlugin_l909_2; + wire when_CsrPlugin_l909_3; + wire when_CsrPlugin_l922; + reg CsrPlugin_interrupt_valid; + reg [3:0] CsrPlugin_interrupt_code /* verilator public */ ; + reg [1:0] CsrPlugin_interrupt_targetPrivilege; + wire when_CsrPlugin_l946; + wire when_CsrPlugin_l952; + wire when_CsrPlugin_l952_1; + wire when_CsrPlugin_l952_2; + wire CsrPlugin_exception; + reg CsrPlugin_lastStageWasWfi; + reg CsrPlugin_pipelineLiberator_pcValids_0; + reg CsrPlugin_pipelineLiberator_pcValids_1; + reg CsrPlugin_pipelineLiberator_pcValids_2; + wire CsrPlugin_pipelineLiberator_active; + wire when_CsrPlugin_l980; + wire when_CsrPlugin_l980_1; + wire when_CsrPlugin_l980_2; + wire when_CsrPlugin_l985; + reg CsrPlugin_pipelineLiberator_done; + wire when_CsrPlugin_l991; + wire CsrPlugin_interruptJump /* verilator public */ ; + reg CsrPlugin_hadException /* verilator public */ ; + reg [1:0] CsrPlugin_targetPrivilege; + reg [3:0] CsrPlugin_trapCause; + reg [1:0] CsrPlugin_xtvec_mode; + reg [29:0] CsrPlugin_xtvec_base; + wire when_CsrPlugin_l1019; + wire when_CsrPlugin_l1064; + wire [1:0] switch_CsrPlugin_l1068; + reg execute_CsrPlugin_wfiWake; + wire when_CsrPlugin_l1108; + wire when_CsrPlugin_l1110; + wire when_CsrPlugin_l1116; + wire execute_CsrPlugin_blockedBySideEffects; + reg execute_CsrPlugin_illegalAccess; + reg execute_CsrPlugin_illegalInstruction; + wire when_CsrPlugin_l1129; + wire when_CsrPlugin_l1136; + wire when_CsrPlugin_l1137; + wire when_CsrPlugin_l1144; + reg execute_CsrPlugin_writeInstruction; + reg execute_CsrPlugin_readInstruction; + wire execute_CsrPlugin_writeEnable; + wire execute_CsrPlugin_readEnable; + wire [31:0] execute_CsrPlugin_readToWriteData; + wire switch_Misc_l200_2; + reg [31:0] _zz_CsrPlugin_csrMapping_writeDataSignal; + wire when_CsrPlugin_l1176; + wire when_CsrPlugin_l1180; + wire [11:0] execute_CsrPlugin_csrAddress; + reg execute_MulPlugin_aSigned; + reg execute_MulPlugin_bSigned; + wire [31:0] execute_MulPlugin_a; + wire [31:0] execute_MulPlugin_b; + wire [1:0] switch_MulPlugin_l87; + wire [15:0] execute_MulPlugin_aULow; + wire [15:0] execute_MulPlugin_bULow; + wire [16:0] execute_MulPlugin_aSLow; + wire [16:0] execute_MulPlugin_bSLow; + wire [16:0] execute_MulPlugin_aHigh; + wire [16:0] execute_MulPlugin_bHigh; + wire [65:0] writeBack_MulPlugin_result; + wire when_MulPlugin_l147; + wire [1:0] switch_MulPlugin_l148; + reg [32:0] memory_DivPlugin_rs1; + reg [31:0] memory_DivPlugin_rs2; + reg [64:0] memory_DivPlugin_accumulator; + wire memory_DivPlugin_frontendOk; + reg memory_DivPlugin_div_needRevert; + reg memory_DivPlugin_div_counter_willIncrement; + reg memory_DivPlugin_div_counter_willClear; + reg [5:0] memory_DivPlugin_div_counter_valueNext; + reg [5:0] memory_DivPlugin_div_counter_value; + wire memory_DivPlugin_div_counter_willOverflowIfInc; + wire memory_DivPlugin_div_counter_willOverflow; + reg memory_DivPlugin_div_done; + wire when_MulDivIterativePlugin_l126; + wire when_MulDivIterativePlugin_l126_1; + reg [31:0] memory_DivPlugin_div_result; + wire when_MulDivIterativePlugin_l128; + wire when_MulDivIterativePlugin_l129; + wire when_MulDivIterativePlugin_l132; + wire [31:0] _zz_memory_DivPlugin_div_stage_0_remainderShifted; + wire [32:0] memory_DivPlugin_div_stage_0_remainderShifted; + wire [32:0] memory_DivPlugin_div_stage_0_remainderMinusDenominator; + wire [31:0] memory_DivPlugin_div_stage_0_outRemainder; + wire [31:0] memory_DivPlugin_div_stage_0_outNumerator; + wire when_MulDivIterativePlugin_l151; + wire [31:0] _zz_memory_DivPlugin_div_result; + wire when_MulDivIterativePlugin_l162; + wire _zz_memory_DivPlugin_rs2; + wire _zz_memory_DivPlugin_rs1; + reg [32:0] _zz_memory_DivPlugin_rs1_1; + reg [31:0] externalInterruptArray_regNext; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit; + wire [31:0] _zz_CsrPlugin_csrMapping_readDataInit_1; + reg DebugPlugin_firstCycle; + reg DebugPlugin_secondCycle; + reg DebugPlugin_resetIt; + reg DebugPlugin_haltIt; + reg DebugPlugin_stepIt; + reg DebugPlugin_isPipBusy; + reg DebugPlugin_godmode; + wire when_DebugPlugin_l225; + reg DebugPlugin_haltedByBreak; + reg DebugPlugin_debugUsed /* verilator public */ ; + reg DebugPlugin_disableEbreak; + wire DebugPlugin_allowEBreak; + reg [31:0] DebugPlugin_busReadDataReg; + reg _zz_when_DebugPlugin_l244; + wire when_DebugPlugin_l244; + wire [5:0] switch_DebugPlugin_l256; + wire when_DebugPlugin_l260; + wire when_DebugPlugin_l260_1; + wire when_DebugPlugin_l261; + wire when_DebugPlugin_l261_1; + wire when_DebugPlugin_l262; + wire when_DebugPlugin_l263; + wire when_DebugPlugin_l264; + wire when_DebugPlugin_l264_1; + wire when_DebugPlugin_l284; + wire when_DebugPlugin_l287; + wire when_DebugPlugin_l300; + reg DebugPlugin_resetIt_regNext; + wire when_DebugPlugin_l316; + wire execute_CfuPlugin_schedule; + reg execute_CfuPlugin_hold; + reg execute_CfuPlugin_fired; + wire CfuPlugin_bus_cmd_fire; + wire when_CfuPlugin_l171; + wire when_CfuPlugin_l175; + wire [9:0] execute_CfuPlugin_functionsIds_0; + wire _zz_CfuPlugin_bus_cmd_payload_inputs_1; + reg [23:0] _zz_CfuPlugin_bus_cmd_payload_inputs_1_1; + reg [31:0] _zz_CfuPlugin_bus_cmd_payload_inputs_1_2; + wire CfuPlugin_bus_rsp_rsp_valid; + reg CfuPlugin_bus_rsp_rsp_ready; + wire [31:0] CfuPlugin_bus_rsp_rsp_payload_outputs_0; + reg CfuPlugin_bus_rsp_rValid; + reg [31:0] CfuPlugin_bus_rsp_rData_outputs_0; + wire when_CfuPlugin_l208; + wire when_Pipeline_l124; + reg [31:0] decode_to_execute_PC; + wire when_Pipeline_l124_1; + reg [31:0] execute_to_memory_PC; + wire when_Pipeline_l124_2; + reg [31:0] memory_to_writeBack_PC; + wire when_Pipeline_l124_3; + reg [31:0] decode_to_execute_INSTRUCTION; + wire when_Pipeline_l124_4; + reg [31:0] execute_to_memory_INSTRUCTION; + wire when_Pipeline_l124_5; + reg [31:0] memory_to_writeBack_INSTRUCTION; + wire when_Pipeline_l124_6; + reg [31:0] decode_to_execute_FORMAL_PC_NEXT; + wire when_Pipeline_l124_7; + reg [31:0] execute_to_memory_FORMAL_PC_NEXT; + wire when_Pipeline_l124_8; + reg [31:0] memory_to_writeBack_FORMAL_PC_NEXT; + wire when_Pipeline_l124_9; + reg decode_to_execute_MEMORY_FORCE_CONSTISTENCY; + wire when_Pipeline_l124_10; + reg `Src1CtrlEnum_binary_sequential_type decode_to_execute_SRC1_CTRL; + wire when_Pipeline_l124_11; + reg decode_to_execute_SRC_USE_SUB_LESS; + wire when_Pipeline_l124_12; + reg decode_to_execute_MEMORY_ENABLE; + wire when_Pipeline_l124_13; + reg execute_to_memory_MEMORY_ENABLE; + wire when_Pipeline_l124_14; + reg memory_to_writeBack_MEMORY_ENABLE; + wire when_Pipeline_l124_15; + reg `AluCtrlEnum_binary_sequential_type decode_to_execute_ALU_CTRL; + wire when_Pipeline_l124_16; + reg `Src2CtrlEnum_binary_sequential_type decode_to_execute_SRC2_CTRL; + wire when_Pipeline_l124_17; + reg decode_to_execute_REGFILE_WRITE_VALID; + wire when_Pipeline_l124_18; + reg execute_to_memory_REGFILE_WRITE_VALID; + wire when_Pipeline_l124_19; + reg memory_to_writeBack_REGFILE_WRITE_VALID; + wire when_Pipeline_l124_20; + reg decode_to_execute_BYPASSABLE_EXECUTE_STAGE; + wire when_Pipeline_l124_21; + reg decode_to_execute_BYPASSABLE_MEMORY_STAGE; + wire when_Pipeline_l124_22; + reg execute_to_memory_BYPASSABLE_MEMORY_STAGE; + wire when_Pipeline_l124_23; + reg decode_to_execute_MEMORY_WR; + wire when_Pipeline_l124_24; + reg execute_to_memory_MEMORY_WR; + wire when_Pipeline_l124_25; + reg memory_to_writeBack_MEMORY_WR; + wire when_Pipeline_l124_26; + reg decode_to_execute_MEMORY_MANAGMENT; + wire when_Pipeline_l124_27; + reg decode_to_execute_SRC_LESS_UNSIGNED; + wire when_Pipeline_l124_28; + reg `AluBitwiseCtrlEnum_binary_sequential_type decode_to_execute_ALU_BITWISE_CTRL; + wire when_Pipeline_l124_29; + reg `ShiftCtrlEnum_binary_sequential_type decode_to_execute_SHIFT_CTRL; + wire when_Pipeline_l124_30; + reg `ShiftCtrlEnum_binary_sequential_type execute_to_memory_SHIFT_CTRL; + wire when_Pipeline_l124_31; + reg `BranchCtrlEnum_binary_sequential_type decode_to_execute_BRANCH_CTRL; + wire when_Pipeline_l124_32; + reg decode_to_execute_IS_CSR; + wire when_Pipeline_l124_33; + reg `EnvCtrlEnum_binary_sequential_type decode_to_execute_ENV_CTRL; + wire when_Pipeline_l124_34; + reg `EnvCtrlEnum_binary_sequential_type execute_to_memory_ENV_CTRL; + wire when_Pipeline_l124_35; + reg `EnvCtrlEnum_binary_sequential_type memory_to_writeBack_ENV_CTRL; + wire when_Pipeline_l124_36; + reg decode_to_execute_IS_MUL; + wire when_Pipeline_l124_37; + reg execute_to_memory_IS_MUL; + wire when_Pipeline_l124_38; + reg memory_to_writeBack_IS_MUL; + wire when_Pipeline_l124_39; + reg decode_to_execute_IS_DIV; + wire when_Pipeline_l124_40; + reg execute_to_memory_IS_DIV; + wire when_Pipeline_l124_41; + reg decode_to_execute_IS_RS1_SIGNED; + wire when_Pipeline_l124_42; + reg decode_to_execute_IS_RS2_SIGNED; + wire when_Pipeline_l124_43; + reg decode_to_execute_CfuPlugin_CFU_ENABLE; + wire when_Pipeline_l124_44; + reg `Input2Kind_binary_sequential_type decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND; + wire when_Pipeline_l124_45; + reg [31:0] decode_to_execute_RS1; + wire when_Pipeline_l124_46; + reg [31:0] decode_to_execute_RS2; + wire when_Pipeline_l124_47; + reg decode_to_execute_SRC2_FORCE_ZERO; + wire when_Pipeline_l124_48; + reg decode_to_execute_PREDICTION_HAD_BRANCHED2; + wire when_Pipeline_l124_49; + reg decode_to_execute_CSR_WRITE_OPCODE; + wire when_Pipeline_l124_50; + reg decode_to_execute_CSR_READ_OPCODE; + wire when_Pipeline_l124_51; + reg decode_to_execute_DO_EBREAK; + wire when_Pipeline_l124_52; + reg [31:0] execute_to_memory_MEMORY_STORE_DATA_RF; + wire when_Pipeline_l124_53; + reg [31:0] memory_to_writeBack_MEMORY_STORE_DATA_RF; + wire when_Pipeline_l124_54; + reg [31:0] execute_to_memory_REGFILE_WRITE_DATA; + wire when_Pipeline_l124_55; + reg [31:0] memory_to_writeBack_REGFILE_WRITE_DATA; + wire when_Pipeline_l124_56; + reg [31:0] execute_to_memory_SHIFT_RIGHT; + wire when_Pipeline_l124_57; + reg [31:0] execute_to_memory_MUL_LL; + wire when_Pipeline_l124_58; + reg [33:0] execute_to_memory_MUL_LH; + wire when_Pipeline_l124_59; + reg [33:0] execute_to_memory_MUL_HL; + wire when_Pipeline_l124_60; + reg [33:0] execute_to_memory_MUL_HH; + wire when_Pipeline_l124_61; + reg [33:0] memory_to_writeBack_MUL_HH; + wire when_Pipeline_l124_62; + reg execute_to_memory_CfuPlugin_CFU_IN_FLIGHT; + wire when_Pipeline_l124_63; + reg memory_to_writeBack_CfuPlugin_CFU_IN_FLIGHT; + wire when_Pipeline_l124_64; + reg [51:0] memory_to_writeBack_MUL_LOW; + wire when_Pipeline_l151; + wire when_Pipeline_l154; + wire when_Pipeline_l151_1; + wire when_Pipeline_l154_1; + wire when_Pipeline_l151_2; + wire when_Pipeline_l154_2; + reg [2:0] switch_Fetcher_l362; + wire when_Fetcher_l378; + wire when_CsrPlugin_l1264; + reg execute_CsrPlugin_csr_3264; + wire when_CsrPlugin_l1264_1; + reg execute_CsrPlugin_csr_3857; + wire when_CsrPlugin_l1264_2; + reg execute_CsrPlugin_csr_3858; + wire when_CsrPlugin_l1264_3; + reg execute_CsrPlugin_csr_3859; + wire when_CsrPlugin_l1264_4; + reg execute_CsrPlugin_csr_3860; + wire when_CsrPlugin_l1264_5; + reg execute_CsrPlugin_csr_769; + wire when_CsrPlugin_l1264_6; + reg execute_CsrPlugin_csr_768; + wire when_CsrPlugin_l1264_7; + reg execute_CsrPlugin_csr_836; + wire when_CsrPlugin_l1264_8; + reg execute_CsrPlugin_csr_772; + wire when_CsrPlugin_l1264_9; + reg execute_CsrPlugin_csr_773; + wire when_CsrPlugin_l1264_10; + reg execute_CsrPlugin_csr_833; + wire when_CsrPlugin_l1264_11; + reg execute_CsrPlugin_csr_832; + wire when_CsrPlugin_l1264_12; + reg execute_CsrPlugin_csr_834; + wire when_CsrPlugin_l1264_13; + reg execute_CsrPlugin_csr_835; + wire when_CsrPlugin_l1264_14; + reg execute_CsrPlugin_csr_2816; + wire when_CsrPlugin_l1264_15; + reg execute_CsrPlugin_csr_2944; + wire when_CsrPlugin_l1264_16; + reg execute_CsrPlugin_csr_2818; + wire when_CsrPlugin_l1264_17; + reg execute_CsrPlugin_csr_2946; + wire when_CsrPlugin_l1264_18; + reg execute_CsrPlugin_csr_3072; + wire when_CsrPlugin_l1264_19; + reg execute_CsrPlugin_csr_3200; + wire when_CsrPlugin_l1264_20; + reg execute_CsrPlugin_csr_3074; + wire when_CsrPlugin_l1264_21; + reg execute_CsrPlugin_csr_3202; + wire when_CsrPlugin_l1264_22; + reg execute_CsrPlugin_csr_3008; + wire when_CsrPlugin_l1264_23; + reg execute_CsrPlugin_csr_4032; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_2; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_3; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_4; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_5; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_6; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_7; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_8; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_9; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_10; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_11; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_12; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_13; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_14; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_15; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_16; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_17; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_18; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_19; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_20; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_21; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_22; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_23; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_24; + wire when_CsrPlugin_l1297; + wire when_CsrPlugin_l1302; + reg [2:0] _zz_iBusWishbone_ADR; + wire when_InstructionCache_l239; + reg _zz_iBus_rsp_valid; + reg [31:0] iBusWishbone_DAT_MISO_regNext; + reg [2:0] _zz_dBus_cmd_ready; + wire _zz_dBus_cmd_ready_1; + wire _zz_dBus_cmd_ready_2; + wire _zz_dBus_cmd_ready_3; + wire _zz_dBus_cmd_ready_4; + wire _zz_dBus_cmd_ready_5; + reg _zz_dBus_rsp_valid; + reg [31:0] dBusWishbone_DAT_MISO_regNext; + `ifndef SYNTHESIS + reg [39:0] decode_CfuPlugin_CFU_INPUT_2_KIND_string; + reg [39:0] _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_string; + reg [39:0] _zz_decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND_string; + reg [39:0] _zz_decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND_1_string; + reg [39:0] _zz_memory_to_writeBack_ENV_CTRL_string; + reg [39:0] _zz_memory_to_writeBack_ENV_CTRL_1_string; + reg [39:0] _zz_execute_to_memory_ENV_CTRL_string; + reg [39:0] _zz_execute_to_memory_ENV_CTRL_1_string; + reg [39:0] decode_ENV_CTRL_string; + reg [39:0] _zz_decode_ENV_CTRL_string; + reg [39:0] _zz_decode_to_execute_ENV_CTRL_string; + reg [39:0] _zz_decode_to_execute_ENV_CTRL_1_string; + reg [31:0] _zz_decode_to_execute_BRANCH_CTRL_string; + reg [31:0] _zz_decode_to_execute_BRANCH_CTRL_1_string; + reg [71:0] _zz_execute_to_memory_SHIFT_CTRL_string; + reg [71:0] _zz_execute_to_memory_SHIFT_CTRL_1_string; + reg [71:0] decode_SHIFT_CTRL_string; + reg [71:0] _zz_decode_SHIFT_CTRL_string; + reg [71:0] _zz_decode_to_execute_SHIFT_CTRL_string; + reg [71:0] _zz_decode_to_execute_SHIFT_CTRL_1_string; + reg [39:0] decode_ALU_BITWISE_CTRL_string; + reg [39:0] _zz_decode_ALU_BITWISE_CTRL_string; + reg [39:0] _zz_decode_to_execute_ALU_BITWISE_CTRL_string; + reg [39:0] _zz_decode_to_execute_ALU_BITWISE_CTRL_1_string; + reg [23:0] decode_SRC2_CTRL_string; + reg [23:0] _zz_decode_SRC2_CTRL_string; + reg [23:0] _zz_decode_to_execute_SRC2_CTRL_string; + reg [23:0] _zz_decode_to_execute_SRC2_CTRL_1_string; + reg [63:0] decode_ALU_CTRL_string; + reg [63:0] _zz_decode_ALU_CTRL_string; + reg [63:0] _zz_decode_to_execute_ALU_CTRL_string; + reg [63:0] _zz_decode_to_execute_ALU_CTRL_1_string; + reg [95:0] decode_SRC1_CTRL_string; + reg [95:0] _zz_decode_SRC1_CTRL_string; + reg [95:0] _zz_decode_to_execute_SRC1_CTRL_string; + reg [95:0] _zz_decode_to_execute_SRC1_CTRL_1_string; + reg [39:0] execute_CfuPlugin_CFU_INPUT_2_KIND_string; + reg [39:0] _zz_execute_CfuPlugin_CFU_INPUT_2_KIND_string; + reg [39:0] memory_ENV_CTRL_string; + reg [39:0] _zz_memory_ENV_CTRL_string; + reg [39:0] execute_ENV_CTRL_string; + reg [39:0] _zz_execute_ENV_CTRL_string; + reg [39:0] writeBack_ENV_CTRL_string; + reg [39:0] _zz_writeBack_ENV_CTRL_string; + reg [31:0] execute_BRANCH_CTRL_string; + reg [31:0] _zz_execute_BRANCH_CTRL_string; + reg [71:0] memory_SHIFT_CTRL_string; + reg [71:0] _zz_memory_SHIFT_CTRL_string; + reg [71:0] execute_SHIFT_CTRL_string; + reg [71:0] _zz_execute_SHIFT_CTRL_string; + reg [23:0] execute_SRC2_CTRL_string; + reg [23:0] _zz_execute_SRC2_CTRL_string; + reg [95:0] execute_SRC1_CTRL_string; + reg [95:0] _zz_execute_SRC1_CTRL_string; + reg [63:0] execute_ALU_CTRL_string; + reg [63:0] _zz_execute_ALU_CTRL_string; + reg [39:0] execute_ALU_BITWISE_CTRL_string; + reg [39:0] _zz_execute_ALU_BITWISE_CTRL_string; + reg [39:0] _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_1_string; + reg [39:0] _zz_decode_ENV_CTRL_1_string; + reg [31:0] _zz_decode_BRANCH_CTRL_string; + reg [71:0] _zz_decode_SHIFT_CTRL_1_string; + reg [39:0] _zz_decode_ALU_BITWISE_CTRL_1_string; + reg [23:0] _zz_decode_SRC2_CTRL_1_string; + reg [63:0] _zz_decode_ALU_CTRL_1_string; + reg [95:0] _zz_decode_SRC1_CTRL_1_string; + reg [31:0] decode_BRANCH_CTRL_string; + reg [31:0] _zz_decode_BRANCH_CTRL_1_string; + reg [95:0] _zz_decode_SRC1_CTRL_2_string; + reg [63:0] _zz_decode_ALU_CTRL_2_string; + reg [23:0] _zz_decode_SRC2_CTRL_2_string; + reg [39:0] _zz_decode_ALU_BITWISE_CTRL_2_string; + reg [71:0] _zz_decode_SHIFT_CTRL_2_string; + reg [31:0] _zz_decode_BRANCH_CTRL_2_string; + reg [39:0] _zz_decode_ENV_CTRL_2_string; + reg [39:0] _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_8_string; + reg [95:0] decode_to_execute_SRC1_CTRL_string; + reg [63:0] decode_to_execute_ALU_CTRL_string; + reg [23:0] decode_to_execute_SRC2_CTRL_string; + reg [39:0] decode_to_execute_ALU_BITWISE_CTRL_string; + reg [71:0] decode_to_execute_SHIFT_CTRL_string; + reg [71:0] execute_to_memory_SHIFT_CTRL_string; + reg [31:0] decode_to_execute_BRANCH_CTRL_string; + reg [39:0] decode_to_execute_ENV_CTRL_string; + reg [39:0] execute_to_memory_ENV_CTRL_string; + reg [39:0] memory_to_writeBack_ENV_CTRL_string; + reg [39:0] decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND_string; + `endif + + (* ram_style = "block" *) reg [31:0] RegFilePlugin_regFile [0:31] /* verilator public */ ; + + assign _zz_when = ({decodeExceptionPort_valid,IBusCachedPlugin_decodeExceptionPort_valid} != 2'b00); + assign _zz_when_1 = ({CsrPlugin_selfException_valid,BranchPlugin_branchExceptionPort_valid} != 2'b00); + assign _zz_memory_MUL_LOW = ($signed(_zz_memory_MUL_LOW_1) + $signed(_zz_memory_MUL_LOW_5)); + assign _zz_memory_MUL_LOW_1 = ($signed(_zz_memory_MUL_LOW_2) + $signed(_zz_memory_MUL_LOW_3)); + assign _zz_memory_MUL_LOW_2 = 52'h0; + assign _zz_memory_MUL_LOW_4 = {1'b0,memory_MUL_LL}; + assign _zz_memory_MUL_LOW_3 = {{19{_zz_memory_MUL_LOW_4[32]}}, _zz_memory_MUL_LOW_4}; + assign _zz_memory_MUL_LOW_6 = ({16'd0,memory_MUL_LH} <<< 16); + assign _zz_memory_MUL_LOW_5 = {{2{_zz_memory_MUL_LOW_6[49]}}, _zz_memory_MUL_LOW_6}; + assign _zz_memory_MUL_LOW_8 = ({16'd0,memory_MUL_HL} <<< 16); + assign _zz_memory_MUL_LOW_7 = {{2{_zz_memory_MUL_LOW_8[49]}}, _zz_memory_MUL_LOW_8}; + assign _zz_execute_SHIFT_RIGHT_1 = ($signed(_zz_execute_SHIFT_RIGHT_2) >>> execute_FullBarrelShifterPlugin_amplitude); + assign _zz_execute_SHIFT_RIGHT = _zz_execute_SHIFT_RIGHT_1[31 : 0]; + assign _zz_execute_SHIFT_RIGHT_2 = {((execute_SHIFT_CTRL == `ShiftCtrlEnum_binary_sequential_SRA_1) && execute_FullBarrelShifterPlugin_reversed[31]),execute_FullBarrelShifterPlugin_reversed}; + assign _zz__zz_IBusCachedPlugin_jump_pcLoad_payload_1 = (_zz_IBusCachedPlugin_jump_pcLoad_payload - 4'b0001); + assign _zz_IBusCachedPlugin_fetchPc_pc_1 = {IBusCachedPlugin_fetchPc_inc,2'b00}; + assign _zz_IBusCachedPlugin_fetchPc_pc = {29'd0, _zz_IBusCachedPlugin_fetchPc_pc_1}; + assign _zz__zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch = {{{decode_INSTRUCTION[31],decode_INSTRUCTION[7]},decode_INSTRUCTION[30 : 25]},decode_INSTRUCTION[11 : 8]}; + assign _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_2 = {{_zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_1,{{{decode_INSTRUCTION[31],decode_INSTRUCTION[7]},decode_INSTRUCTION[30 : 25]},decode_INSTRUCTION[11 : 8]}},1'b0}; + assign _zz__zz_2 = {{{decode_INSTRUCTION[31],decode_INSTRUCTION[19 : 12]},decode_INSTRUCTION[20]},decode_INSTRUCTION[30 : 21]}; + assign _zz__zz_4 = {{{decode_INSTRUCTION[31],decode_INSTRUCTION[7]},decode_INSTRUCTION[30 : 25]},decode_INSTRUCTION[11 : 8]}; + assign _zz__zz_6 = {{_zz_3,{{{decode_INSTRUCTION[31],decode_INSTRUCTION[19 : 12]},decode_INSTRUCTION[20]},decode_INSTRUCTION[30 : 21]}},1'b0}; + assign _zz__zz_6_1 = {{_zz_5,{{{decode_INSTRUCTION[31],decode_INSTRUCTION[7]},decode_INSTRUCTION[30 : 25]},decode_INSTRUCTION[11 : 8]}},1'b0}; + assign _zz__zz_IBusCachedPlugin_predictionJumpInterface_payload = {{{decode_INSTRUCTION[31],decode_INSTRUCTION[19 : 12]},decode_INSTRUCTION[20]},decode_INSTRUCTION[30 : 21]}; + assign _zz__zz_IBusCachedPlugin_predictionJumpInterface_payload_2 = {{{decode_INSTRUCTION[31],decode_INSTRUCTION[7]},decode_INSTRUCTION[30 : 25]},decode_INSTRUCTION[11 : 8]}; + assign _zz_DBusCachedPlugin_exceptionBus_payload_code = (writeBack_MEMORY_WR ? 3'b111 : 3'b101); + assign _zz_DBusCachedPlugin_exceptionBus_payload_code_1 = (writeBack_MEMORY_WR ? 3'b110 : 3'b100); + assign _zz__zz_execute_REGFILE_WRITE_DATA = execute_SRC_LESS; + assign _zz__zz_execute_SRC1 = 3'b100; + assign _zz__zz_execute_SRC1_1 = execute_INSTRUCTION[19 : 15]; + assign _zz__zz_execute_SRC2_3 = {execute_INSTRUCTION[31 : 25],execute_INSTRUCTION[11 : 7]}; + assign _zz_execute_SrcPlugin_addSub = ($signed(_zz_execute_SrcPlugin_addSub_1) + $signed(_zz_execute_SrcPlugin_addSub_4)); + assign _zz_execute_SrcPlugin_addSub_1 = ($signed(_zz_execute_SrcPlugin_addSub_2) + $signed(_zz_execute_SrcPlugin_addSub_3)); + assign _zz_execute_SrcPlugin_addSub_2 = execute_SRC1; + assign _zz_execute_SrcPlugin_addSub_3 = (execute_SRC_USE_SUB_LESS ? (~ execute_SRC2) : execute_SRC2); + assign _zz_execute_SrcPlugin_addSub_4 = (execute_SRC_USE_SUB_LESS ? _zz_execute_SrcPlugin_addSub_5 : _zz_execute_SrcPlugin_addSub_6); + assign _zz_execute_SrcPlugin_addSub_5 = 32'h00000001; + assign _zz_execute_SrcPlugin_addSub_6 = 32'h0; + assign _zz__zz_execute_BranchPlugin_missAlignedTarget_2 = {{{execute_INSTRUCTION[31],execute_INSTRUCTION[19 : 12]},execute_INSTRUCTION[20]},execute_INSTRUCTION[30 : 21]}; + assign _zz__zz_execute_BranchPlugin_missAlignedTarget_4 = {{{execute_INSTRUCTION[31],execute_INSTRUCTION[7]},execute_INSTRUCTION[30 : 25]},execute_INSTRUCTION[11 : 8]}; + assign _zz__zz_execute_BranchPlugin_missAlignedTarget_6 = {_zz_execute_BranchPlugin_missAlignedTarget_1,execute_INSTRUCTION[31 : 20]}; + assign _zz__zz_execute_BranchPlugin_missAlignedTarget_6_1 = {{_zz_execute_BranchPlugin_missAlignedTarget_3,{{{execute_INSTRUCTION[31],execute_INSTRUCTION[19 : 12]},execute_INSTRUCTION[20]},execute_INSTRUCTION[30 : 21]}},1'b0}; + assign _zz__zz_execute_BranchPlugin_missAlignedTarget_6_2 = {{_zz_execute_BranchPlugin_missAlignedTarget_5,{{{execute_INSTRUCTION[31],execute_INSTRUCTION[7]},execute_INSTRUCTION[30 : 25]},execute_INSTRUCTION[11 : 8]}},1'b0}; + assign _zz__zz_execute_BranchPlugin_branch_src2_2 = {{{execute_INSTRUCTION[31],execute_INSTRUCTION[19 : 12]},execute_INSTRUCTION[20]},execute_INSTRUCTION[30 : 21]}; + assign _zz__zz_execute_BranchPlugin_branch_src2_4 = {{{execute_INSTRUCTION[31],execute_INSTRUCTION[7]},execute_INSTRUCTION[30 : 25]},execute_INSTRUCTION[11 : 8]}; + assign _zz_execute_BranchPlugin_branch_src2_9 = 3'b100; + assign _zz__zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_1 = (_zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code & (~ _zz__zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_1_1)); + assign _zz__zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_1_1 = (_zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code - 2'b01); + assign _zz__zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_3 = (_zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_2 & (~ _zz__zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_3_1)); + assign _zz__zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_3_1 = (_zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_2 - 2'b01); + assign _zz_writeBack_MulPlugin_result = {{14{writeBack_MUL_LOW[51]}}, writeBack_MUL_LOW}; + assign _zz_writeBack_MulPlugin_result_1 = ({32'd0,writeBack_MUL_HH} <<< 32); + assign _zz__zz_decode_RS2_2 = writeBack_MUL_LOW[31 : 0]; + assign _zz__zz_decode_RS2_2_1 = writeBack_MulPlugin_result[63 : 32]; + assign _zz_memory_DivPlugin_div_counter_valueNext_1 = memory_DivPlugin_div_counter_willIncrement; + assign _zz_memory_DivPlugin_div_counter_valueNext = {5'd0, _zz_memory_DivPlugin_div_counter_valueNext_1}; + assign _zz_memory_DivPlugin_div_stage_0_remainderMinusDenominator = {1'd0, memory_DivPlugin_rs2}; + assign _zz_memory_DivPlugin_div_stage_0_outRemainder = memory_DivPlugin_div_stage_0_remainderMinusDenominator[31:0]; + assign _zz_memory_DivPlugin_div_stage_0_outRemainder_1 = memory_DivPlugin_div_stage_0_remainderShifted[31:0]; + assign _zz_memory_DivPlugin_div_stage_0_outNumerator = {_zz_memory_DivPlugin_div_stage_0_remainderShifted,(! memory_DivPlugin_div_stage_0_remainderMinusDenominator[32])}; + assign _zz_memory_DivPlugin_div_result_1 = _zz_memory_DivPlugin_div_result_2; + assign _zz_memory_DivPlugin_div_result_2 = _zz_memory_DivPlugin_div_result_3; + assign _zz_memory_DivPlugin_div_result_3 = ({memory_DivPlugin_div_needRevert,(memory_DivPlugin_div_needRevert ? (~ _zz_memory_DivPlugin_div_result) : _zz_memory_DivPlugin_div_result)} + _zz_memory_DivPlugin_div_result_4); + assign _zz_memory_DivPlugin_div_result_5 = memory_DivPlugin_div_needRevert; + assign _zz_memory_DivPlugin_div_result_4 = {32'd0, _zz_memory_DivPlugin_div_result_5}; + assign _zz_memory_DivPlugin_rs1_3 = _zz_memory_DivPlugin_rs1; + assign _zz_memory_DivPlugin_rs1_2 = {32'd0, _zz_memory_DivPlugin_rs1_3}; + assign _zz_memory_DivPlugin_rs2_2 = _zz_memory_DivPlugin_rs2; + assign _zz_memory_DivPlugin_rs2_1 = {31'd0, _zz_memory_DivPlugin_rs2_2}; + assign _zz_execute_CfuPlugin_functionsIds_0 = {execute_INSTRUCTION[31 : 25],execute_INSTRUCTION[14 : 12]}; + assign _zz_iBusWishbone_ADR_1 = (iBus_cmd_payload_address >>> 5); + assign _zz_decode_RegFilePlugin_rs1Data = 1'b1; + assign _zz_decode_RegFilePlugin_rs2Data = 1'b1; + assign _zz_IBusCachedPlugin_jump_pcLoad_payload_6 = {_zz_IBusCachedPlugin_jump_pcLoad_payload_4,_zz_IBusCachedPlugin_jump_pcLoad_payload_3}; + assign _zz_writeBack_DBusCachedPlugin_rspShifted_1 = dataCache_1_io_cpu_writeBack_address[1 : 0]; + assign _zz_writeBack_DBusCachedPlugin_rspShifted_3 = dataCache_1_io_cpu_writeBack_address[1 : 1]; + assign _zz_decode_LEGAL_INSTRUCTION = 32'h0000106f; + assign _zz_decode_LEGAL_INSTRUCTION_1 = (decode_INSTRUCTION & 32'h0000107f); + assign _zz_decode_LEGAL_INSTRUCTION_2 = 32'h00001073; + assign _zz_decode_LEGAL_INSTRUCTION_3 = ((decode_INSTRUCTION & 32'h0000207f) == 32'h00002073); + assign _zz_decode_LEGAL_INSTRUCTION_4 = ((decode_INSTRUCTION & 32'h0000407f) == 32'h00004063); + assign _zz_decode_LEGAL_INSTRUCTION_5 = {((decode_INSTRUCTION & 32'h0000207f) == 32'h00002013),{((decode_INSTRUCTION & 32'h0000603f) == 32'h00000023),{((decode_INSTRUCTION & _zz_decode_LEGAL_INSTRUCTION_6) == 32'h00000003),{(_zz_decode_LEGAL_INSTRUCTION_7 == _zz_decode_LEGAL_INSTRUCTION_8),{_zz_decode_LEGAL_INSTRUCTION_9,{_zz_decode_LEGAL_INSTRUCTION_10,_zz_decode_LEGAL_INSTRUCTION_11}}}}}}; + assign _zz_decode_LEGAL_INSTRUCTION_6 = 32'h0000207f; + assign _zz_decode_LEGAL_INSTRUCTION_7 = (decode_INSTRUCTION & 32'h0000505f); + assign _zz_decode_LEGAL_INSTRUCTION_8 = 32'h00000003; + assign _zz_decode_LEGAL_INSTRUCTION_9 = ((decode_INSTRUCTION & 32'h0000707b) == 32'h00000063); + assign _zz_decode_LEGAL_INSTRUCTION_10 = ((decode_INSTRUCTION & 32'h0000607f) == 32'h0000000f); + assign _zz_decode_LEGAL_INSTRUCTION_11 = {((decode_INSTRUCTION & 32'hfc00007f) == 32'h00000033),{((decode_INSTRUCTION & 32'h01f0707f) == 32'h0000500f),{((decode_INSTRUCTION & _zz_decode_LEGAL_INSTRUCTION_12) == 32'h00005013),{(_zz_decode_LEGAL_INSTRUCTION_13 == _zz_decode_LEGAL_INSTRUCTION_14),{_zz_decode_LEGAL_INSTRUCTION_15,{_zz_decode_LEGAL_INSTRUCTION_16,_zz_decode_LEGAL_INSTRUCTION_17}}}}}}; + assign _zz_decode_LEGAL_INSTRUCTION_12 = 32'hbc00707f; + assign _zz_decode_LEGAL_INSTRUCTION_13 = (decode_INSTRUCTION & 32'hfc00307f); + assign _zz_decode_LEGAL_INSTRUCTION_14 = 32'h00001013; + assign _zz_decode_LEGAL_INSTRUCTION_15 = ((decode_INSTRUCTION & 32'hbe00707f) == 32'h00005033); + assign _zz_decode_LEGAL_INSTRUCTION_16 = ((decode_INSTRUCTION & 32'hbe00707f) == 32'h00000033); + assign _zz_decode_LEGAL_INSTRUCTION_17 = {((decode_INSTRUCTION & 32'hdfffffff) == 32'h10200073),{((decode_INSTRUCTION & 32'hffefffff) == 32'h00000073),((decode_INSTRUCTION & 32'hffffffff) == 32'h10500073)}}; + assign _zz_IBusCachedPlugin_predictionJumpInterface_payload_4 = decode_INSTRUCTION[31]; + assign _zz_IBusCachedPlugin_predictionJumpInterface_payload_5 = decode_INSTRUCTION[31]; + assign _zz_IBusCachedPlugin_predictionJumpInterface_payload_6 = decode_INSTRUCTION[7]; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2 = (decode_INSTRUCTION & 32'h10103050); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_1 = 32'h00100050; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_2 = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_7; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_3 = 1'b0; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_4 = (((decode_INSTRUCTION & 32'h02004064) == 32'h02004020) != 1'b0); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_5 = (((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_6) == 32'h02000030) != 1'b0); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_7 = {({_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_8,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_9} != 2'b00),{(_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_10 != 1'b0),{(_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_11 != _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_16),{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_17,{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_19,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_21}}}}}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_6 = 32'h02004074; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_8 = ((decode_INSTRUCTION & 32'h10203050) == 32'h10000050); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_9 = ((decode_INSTRUCTION & 32'h10103050) == 32'h00000050); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_10 = ((decode_INSTRUCTION & 32'h00103050) == 32'h00000050); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_11 = {(_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_12 == _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_13),(_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_14 == _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_15)}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_16 = 2'b00; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_17 = ({_zz_decode_CfuPlugin_CFU_INPUT_2_KIND_5,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_18} != 2'b00); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_19 = (_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_20 != 1'b0); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_21 = {(_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_22 != _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_27),{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_28,{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_34,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_36}}}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_12 = (decode_INSTRUCTION & 32'h00001050); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_13 = 32'h00001050; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_14 = (decode_INSTRUCTION & 32'h00002050); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_15 = 32'h00002050; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_18 = ((decode_INSTRUCTION & 32'h0000001c) == 32'h00000004); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_20 = ((decode_INSTRUCTION & 32'h00000058) == 32'h00000040); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_22 = {(_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_23 == _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_24),(_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_25 == _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_26)}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_27 = 2'b00; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_28 = ({_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_29,{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_30,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_32}} != 3'b000); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_34 = (_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_35 != 1'b0); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_36 = {(_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_37 != _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_39),{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_40,{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_43,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_48}}}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_23 = (decode_INSTRUCTION & 32'h00007034); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_24 = 32'h00005010; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_25 = (decode_INSTRUCTION & 32'h02007064); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_26 = 32'h00005020; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_29 = ((decode_INSTRUCTION & 32'h40003054) == 32'h40001010); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_30 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_31) == 32'h00001010); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_32 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_33) == 32'h00001010); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_35 = ((decode_INSTRUCTION & 32'h00000064) == 32'h00000024); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_37 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_38) == 32'h00001000); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_39 = 1'b0; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_40 = ((_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_41 == _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_42) != 1'b0); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_43 = ({_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_44,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_46} != 2'b00); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_48 = {(_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_49 != _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_51),{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_52,{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_57,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_71}}}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_31 = 32'h00007034; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_33 = 32'h02007054; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_38 = 32'h00001000; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_41 = (decode_INSTRUCTION & 32'h00003000); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_42 = 32'h00002000; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_44 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_45) == 32'h00002000); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_46 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_47) == 32'h00001000); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_49 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_50) == 32'h00004004); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_51 = 1'b0; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_52 = ({_zz_decode_CfuPlugin_CFU_INPUT_2_KIND_6,{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_53,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_55}} != 3'b000); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_57 = ({_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_58,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_60} != 5'h0); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_71 = {(_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_72 != _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_74),{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_75,{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_90,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_103}}}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_45 = 32'h00002010; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_47 = 32'h00005000; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_50 = 32'h00004054; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_53 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_54) == 32'h00000020); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_55 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_56) == 32'h00000020); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_58 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_59) == 32'h00002040); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_60 = {(_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_61 == _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_62),{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_63,{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_65,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_68}}}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_72 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_73) == 32'h00000020); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_74 = 1'b0; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_75 = ({_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_76,{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_78,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_81}} != 6'h0); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_90 = ({_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_91,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_92} != 5'h0); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_103 = {(_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_104 != _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_117),{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_118,{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_123,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_128}}}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_54 = 32'h00000034; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_56 = 32'h00000064; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_59 = 32'h00002040; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_61 = (decode_INSTRUCTION & 32'h00001040); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_62 = 32'h00001040; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_63 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_64) == 32'h00000040); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_65 = (_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_66 == _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_67); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_68 = (_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_69 == _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_70); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_73 = 32'h00000020; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_76 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_77) == 32'h00000008); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_78 = (_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_79 == _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_80); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_81 = {_zz_decode_CfuPlugin_CFU_INPUT_2_KIND_4,{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_82,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_85}}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_91 = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_4; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_92 = {_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_93,{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_95,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_98}}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_104 = {_zz_decode_CfuPlugin_CFU_INPUT_2_KIND_5,{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_105,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_108}}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_117 = 6'h0; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_118 = ({_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_119,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_120} != 2'b00); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_123 = (_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_124 != _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_127); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_128 = {_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_129,{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_132,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_137}}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_64 = 32'h00100040; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_66 = (decode_INSTRUCTION & 32'h00000050); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_67 = 32'h00000040; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_69 = (decode_INSTRUCTION & 32'h00000038); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_70 = 32'h0; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_77 = 32'h00000008; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_79 = (decode_INSTRUCTION & 32'h00000040); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_80 = 32'h00000040; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_82 = (_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_83 == _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_84); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_85 = {_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_86,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_88}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_93 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_94) == 32'h00002010); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_95 = (_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_96 == _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_97); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_98 = {_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_99,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_101}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_105 = (_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_106 == _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_107); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_108 = {_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_109,{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_111,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_114}}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_119 = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_4; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_120 = (_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_121 == _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_122); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_124 = {_zz_decode_CfuPlugin_CFU_INPUT_2_KIND_4,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_125}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_127 = 2'b00; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_129 = (_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_130 != 1'b0); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_132 = (_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_133 != _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_136); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_137 = {_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_138,{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_146,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_150}}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_83 = (decode_INSTRUCTION & 32'h00004020); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_84 = 32'h00004020; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_86 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_87) == 32'h00000010); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_88 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_89) == 32'h00000020); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_94 = 32'h00002030; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_96 = (decode_INSTRUCTION & 32'h00001030); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_97 = 32'h00000010; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_99 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_100) == 32'h00002020); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_101 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_102) == 32'h00000020); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_106 = (decode_INSTRUCTION & 32'h00001010); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_107 = 32'h00001010; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_109 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_110) == 32'h00002010); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_111 = (_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_112 == _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_113); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_114 = {_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_115,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_116}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_121 = (decode_INSTRUCTION & 32'h00000070); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_122 = 32'h00000020; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_125 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_126) == 32'h0); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_130 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_131) == 32'h00004010); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_133 = (_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_134 == _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_135); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_136 = 1'b0; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_138 = ({_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_139,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_141} != 4'b0000); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_146 = (_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_147 != _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_149); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_150 = {_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_151,{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_157,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_161}}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_87 = 32'h00000030; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_89 = 32'h02000020; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_100 = 32'h02002060; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_102 = 32'h02003020; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_110 = 32'h00002010; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_112 = (decode_INSTRUCTION & 32'h00000050); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_113 = 32'h00000010; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_115 = ((decode_INSTRUCTION & 32'h0000000c) == 32'h00000004); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_116 = ((decode_INSTRUCTION & 32'h00000024) == 32'h0); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_126 = 32'h00000020; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_131 = 32'h00004014; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_134 = (decode_INSTRUCTION & 32'h00006014); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_135 = 32'h00002010; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_139 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_140) == 32'h0); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_141 = {(_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_142 == _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_143),{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_144,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_145}}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_147 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_148) == 32'h0); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_149 = 1'b0; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_151 = ({_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_152,{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_153,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_155}} != 3'b000); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_157 = ({_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_158,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_160} != 2'b00); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_161 = {(_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_162 != _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_165),(_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_166 != _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_168)}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_140 = 32'h00000044; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_142 = (decode_INSTRUCTION & 32'h00000018); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_143 = 32'h0; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_144 = ((decode_INSTRUCTION & 32'h00006004) == 32'h00002000); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_145 = ((decode_INSTRUCTION & 32'h00005004) == 32'h00001000); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_148 = 32'h00000058; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_152 = ((decode_INSTRUCTION & 32'h00000044) == 32'h00000040); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_153 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_154) == 32'h00002010); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_155 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_156) == 32'h40000030); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_158 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_159) == 32'h00000004); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_160 = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_3; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_162 = {(_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_163 == _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_164),_zz_decode_CfuPlugin_CFU_INPUT_2_KIND_3}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_165 = 2'b00; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_166 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_167) == 32'h00001004); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_168 = 1'b0; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_154 = 32'h00002014; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_156 = 32'h40000034; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_159 = 32'h00000014; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_163 = (decode_INSTRUCTION & 32'h00000044); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_164 = 32'h00000004; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_167 = 32'h00005054; + assign _zz_execute_BranchPlugin_branch_src2_6 = execute_INSTRUCTION[31]; + assign _zz_execute_BranchPlugin_branch_src2_7 = execute_INSTRUCTION[31]; + assign _zz_execute_BranchPlugin_branch_src2_8 = execute_INSTRUCTION[7]; + assign _zz_CsrPlugin_csrMapping_readDataInit_25 = 32'h0; + always @(posedge clk) begin + if(_zz_decode_RegFilePlugin_rs1Data) begin + _zz_RegFilePlugin_regFile_port0 <= RegFilePlugin_regFile[decode_RegFilePlugin_regFileReadAddress1]; + end + end + + always @(posedge clk) begin + if(_zz_decode_RegFilePlugin_rs2Data) begin + _zz_RegFilePlugin_regFile_port1 <= RegFilePlugin_regFile[decode_RegFilePlugin_regFileReadAddress2]; + end + end + + always @(posedge clk) begin + if(_zz_1) begin + RegFilePlugin_regFile[lastStageRegFileWrite_payload_address] <= lastStageRegFileWrite_payload_data; + end + end + + InstructionCache IBusCachedPlugin_cache ( + .io_flush (IBusCachedPlugin_cache_io_flush ), //i + .io_cpu_prefetch_isValid (IBusCachedPlugin_cache_io_cpu_prefetch_isValid ), //i + .io_cpu_prefetch_haltIt (IBusCachedPlugin_cache_io_cpu_prefetch_haltIt ), //o + .io_cpu_prefetch_pc (IBusCachedPlugin_iBusRsp_stages_0_input_payload ), //i + .io_cpu_fetch_isValid (IBusCachedPlugin_cache_io_cpu_fetch_isValid ), //i + .io_cpu_fetch_isStuck (IBusCachedPlugin_cache_io_cpu_fetch_isStuck ), //i + .io_cpu_fetch_isRemoved (IBusCachedPlugin_cache_io_cpu_fetch_isRemoved ), //i + .io_cpu_fetch_pc (IBusCachedPlugin_iBusRsp_stages_1_input_payload ), //i + .io_cpu_fetch_data (IBusCachedPlugin_cache_io_cpu_fetch_data ), //o + .io_cpu_fetch_mmuRsp_physicalAddress (IBusCachedPlugin_mmuBus_rsp_physicalAddress ), //i + .io_cpu_fetch_mmuRsp_isIoAccess (IBusCachedPlugin_mmuBus_rsp_isIoAccess ), //i + .io_cpu_fetch_mmuRsp_isPaging (IBusCachedPlugin_mmuBus_rsp_isPaging ), //i + .io_cpu_fetch_mmuRsp_allowRead (IBusCachedPlugin_mmuBus_rsp_allowRead ), //i + .io_cpu_fetch_mmuRsp_allowWrite (IBusCachedPlugin_mmuBus_rsp_allowWrite ), //i + .io_cpu_fetch_mmuRsp_allowExecute (IBusCachedPlugin_mmuBus_rsp_allowExecute ), //i + .io_cpu_fetch_mmuRsp_exception (IBusCachedPlugin_mmuBus_rsp_exception ), //i + .io_cpu_fetch_mmuRsp_refilling (IBusCachedPlugin_mmuBus_rsp_refilling ), //i + .io_cpu_fetch_mmuRsp_bypassTranslation (IBusCachedPlugin_mmuBus_rsp_bypassTranslation ), //i + .io_cpu_fetch_physicalAddress (IBusCachedPlugin_cache_io_cpu_fetch_physicalAddress ), //o + .io_cpu_decode_isValid (IBusCachedPlugin_cache_io_cpu_decode_isValid ), //i + .io_cpu_decode_isStuck (IBusCachedPlugin_cache_io_cpu_decode_isStuck ), //i + .io_cpu_decode_pc (IBusCachedPlugin_iBusRsp_stages_2_input_payload ), //i + .io_cpu_decode_physicalAddress (IBusCachedPlugin_cache_io_cpu_decode_physicalAddress ), //o + .io_cpu_decode_data (IBusCachedPlugin_cache_io_cpu_decode_data ), //o + .io_cpu_decode_cacheMiss (IBusCachedPlugin_cache_io_cpu_decode_cacheMiss ), //o + .io_cpu_decode_error (IBusCachedPlugin_cache_io_cpu_decode_error ), //o + .io_cpu_decode_mmuRefilling (IBusCachedPlugin_cache_io_cpu_decode_mmuRefilling ), //o + .io_cpu_decode_mmuException (IBusCachedPlugin_cache_io_cpu_decode_mmuException ), //o + .io_cpu_decode_isUser (IBusCachedPlugin_cache_io_cpu_decode_isUser ), //i + .io_cpu_fill_valid (IBusCachedPlugin_cache_io_cpu_fill_valid ), //i + .io_cpu_fill_payload (IBusCachedPlugin_cache_io_cpu_decode_physicalAddress ), //i + .io_mem_cmd_valid (IBusCachedPlugin_cache_io_mem_cmd_valid ), //o + .io_mem_cmd_ready (iBus_cmd_ready ), //i + .io_mem_cmd_payload_address (IBusCachedPlugin_cache_io_mem_cmd_payload_address ), //o + .io_mem_cmd_payload_size (IBusCachedPlugin_cache_io_mem_cmd_payload_size ), //o + .io_mem_rsp_valid (iBus_rsp_valid ), //i + .io_mem_rsp_payload_data (iBus_rsp_payload_data ), //i + .io_mem_rsp_payload_error (iBus_rsp_payload_error ), //i + ._zz_when_Fetcher_l398 (switch_Fetcher_l362 ), //i + ._zz_io_cpu_fetch_data_regNextWhen (IBusCachedPlugin_injectionPort_payload ), //i + .clk (clk ), //i + .reset (reset ) //i + ); + DataCache dataCache_1 ( + .io_cpu_execute_isValid (dataCache_1_io_cpu_execute_isValid ), //i + .io_cpu_execute_address (dataCache_1_io_cpu_execute_address ), //i + .io_cpu_execute_haltIt (dataCache_1_io_cpu_execute_haltIt ), //o + .io_cpu_execute_args_wr (execute_MEMORY_WR ), //i + .io_cpu_execute_args_size (execute_DBusCachedPlugin_size ), //i + .io_cpu_execute_args_totalyConsistent (execute_MEMORY_FORCE_CONSTISTENCY ), //i + .io_cpu_execute_refilling (dataCache_1_io_cpu_execute_refilling ), //o + .io_cpu_memory_isValid (dataCache_1_io_cpu_memory_isValid ), //i + .io_cpu_memory_isStuck (memory_arbitration_isStuck ), //i + .io_cpu_memory_isWrite (dataCache_1_io_cpu_memory_isWrite ), //o + .io_cpu_memory_address (dataCache_1_io_cpu_memory_address ), //i + .io_cpu_memory_mmuRsp_physicalAddress (DBusCachedPlugin_mmuBus_rsp_physicalAddress ), //i + .io_cpu_memory_mmuRsp_isIoAccess (dataCache_1_io_cpu_memory_mmuRsp_isIoAccess ), //i + .io_cpu_memory_mmuRsp_isPaging (DBusCachedPlugin_mmuBus_rsp_isPaging ), //i + .io_cpu_memory_mmuRsp_allowRead (DBusCachedPlugin_mmuBus_rsp_allowRead ), //i + .io_cpu_memory_mmuRsp_allowWrite (DBusCachedPlugin_mmuBus_rsp_allowWrite ), //i + .io_cpu_memory_mmuRsp_allowExecute (DBusCachedPlugin_mmuBus_rsp_allowExecute ), //i + .io_cpu_memory_mmuRsp_exception (DBusCachedPlugin_mmuBus_rsp_exception ), //i + .io_cpu_memory_mmuRsp_refilling (DBusCachedPlugin_mmuBus_rsp_refilling ), //i + .io_cpu_memory_mmuRsp_bypassTranslation (DBusCachedPlugin_mmuBus_rsp_bypassTranslation ), //i + .io_cpu_writeBack_isValid (dataCache_1_io_cpu_writeBack_isValid ), //i + .io_cpu_writeBack_isStuck (writeBack_arbitration_isStuck ), //i + .io_cpu_writeBack_isUser (dataCache_1_io_cpu_writeBack_isUser ), //i + .io_cpu_writeBack_haltIt (dataCache_1_io_cpu_writeBack_haltIt ), //o + .io_cpu_writeBack_isWrite (dataCache_1_io_cpu_writeBack_isWrite ), //o + .io_cpu_writeBack_storeData (dataCache_1_io_cpu_writeBack_storeData ), //i + .io_cpu_writeBack_data (dataCache_1_io_cpu_writeBack_data ), //o + .io_cpu_writeBack_address (dataCache_1_io_cpu_writeBack_address ), //i + .io_cpu_writeBack_mmuException (dataCache_1_io_cpu_writeBack_mmuException ), //o + .io_cpu_writeBack_unalignedAccess (dataCache_1_io_cpu_writeBack_unalignedAccess ), //o + .io_cpu_writeBack_accessError (dataCache_1_io_cpu_writeBack_accessError ), //o + .io_cpu_writeBack_keepMemRspData (dataCache_1_io_cpu_writeBack_keepMemRspData ), //o + .io_cpu_writeBack_fence_SW (dataCache_1_io_cpu_writeBack_fence_SW ), //i + .io_cpu_writeBack_fence_SR (dataCache_1_io_cpu_writeBack_fence_SR ), //i + .io_cpu_writeBack_fence_SO (dataCache_1_io_cpu_writeBack_fence_SO ), //i + .io_cpu_writeBack_fence_SI (dataCache_1_io_cpu_writeBack_fence_SI ), //i + .io_cpu_writeBack_fence_PW (dataCache_1_io_cpu_writeBack_fence_PW ), //i + .io_cpu_writeBack_fence_PR (dataCache_1_io_cpu_writeBack_fence_PR ), //i + .io_cpu_writeBack_fence_PO (dataCache_1_io_cpu_writeBack_fence_PO ), //i + .io_cpu_writeBack_fence_PI (dataCache_1_io_cpu_writeBack_fence_PI ), //i + .io_cpu_writeBack_fence_FM (dataCache_1_io_cpu_writeBack_fence_FM ), //i + .io_cpu_writeBack_exclusiveOk (dataCache_1_io_cpu_writeBack_exclusiveOk ), //o + .io_cpu_redo (dataCache_1_io_cpu_redo ), //o + .io_cpu_flush_valid (dataCache_1_io_cpu_flush_valid ), //i + .io_cpu_flush_ready (dataCache_1_io_cpu_flush_ready ), //o + .io_mem_cmd_valid (dataCache_1_io_mem_cmd_valid ), //o + .io_mem_cmd_ready (dataCache_1_io_mem_cmd_ready ), //i + .io_mem_cmd_payload_wr (dataCache_1_io_mem_cmd_payload_wr ), //o + .io_mem_cmd_payload_uncached (dataCache_1_io_mem_cmd_payload_uncached ), //o + .io_mem_cmd_payload_address (dataCache_1_io_mem_cmd_payload_address ), //o + .io_mem_cmd_payload_data (dataCache_1_io_mem_cmd_payload_data ), //o + .io_mem_cmd_payload_mask (dataCache_1_io_mem_cmd_payload_mask ), //o + .io_mem_cmd_payload_size (dataCache_1_io_mem_cmd_payload_size ), //o + .io_mem_cmd_payload_last (dataCache_1_io_mem_cmd_payload_last ), //o + .io_mem_rsp_valid (dBus_rsp_valid ), //i + .io_mem_rsp_payload_last (dBus_rsp_payload_last ), //i + .io_mem_rsp_payload_data (dBus_rsp_payload_data ), //i + .io_mem_rsp_payload_error (dBus_rsp_payload_error ), //i + .clk (clk ), //i + .reset (reset ) //i + ); + always @(*) begin + case(_zz_IBusCachedPlugin_jump_pcLoad_payload_6) + 2'b00 : begin + _zz_IBusCachedPlugin_jump_pcLoad_payload_5 = DBusCachedPlugin_redoBranch_payload; + end + 2'b01 : begin + _zz_IBusCachedPlugin_jump_pcLoad_payload_5 = CsrPlugin_jumpInterface_payload; + end + 2'b10 : begin + _zz_IBusCachedPlugin_jump_pcLoad_payload_5 = BranchPlugin_jumpInterface_payload; + end + default : begin + _zz_IBusCachedPlugin_jump_pcLoad_payload_5 = IBusCachedPlugin_predictionJumpInterface_payload; + end + endcase + end + + always @(*) begin + case(_zz_writeBack_DBusCachedPlugin_rspShifted_1) + 2'b00 : begin + _zz_writeBack_DBusCachedPlugin_rspShifted = writeBack_DBusCachedPlugin_rspSplits_0; + end + 2'b01 : begin + _zz_writeBack_DBusCachedPlugin_rspShifted = writeBack_DBusCachedPlugin_rspSplits_1; + end + 2'b10 : begin + _zz_writeBack_DBusCachedPlugin_rspShifted = writeBack_DBusCachedPlugin_rspSplits_2; + end + default : begin + _zz_writeBack_DBusCachedPlugin_rspShifted = writeBack_DBusCachedPlugin_rspSplits_3; + end + endcase + end + + always @(*) begin + case(_zz_writeBack_DBusCachedPlugin_rspShifted_3) + 1'b0 : begin + _zz_writeBack_DBusCachedPlugin_rspShifted_2 = writeBack_DBusCachedPlugin_rspSplits_1; + end + default : begin + _zz_writeBack_DBusCachedPlugin_rspShifted_2 = writeBack_DBusCachedPlugin_rspSplits_3; + end + endcase + end + + `ifndef SYNTHESIS + always @(*) begin + case(decode_CfuPlugin_CFU_INPUT_2_KIND) + `Input2Kind_binary_sequential_RS : decode_CfuPlugin_CFU_INPUT_2_KIND_string = "RS "; + `Input2Kind_binary_sequential_IMM_I : decode_CfuPlugin_CFU_INPUT_2_KIND_string = "IMM_I"; + default : decode_CfuPlugin_CFU_INPUT_2_KIND_string = "?????"; + endcase + end + always @(*) begin + case(_zz_decode_CfuPlugin_CFU_INPUT_2_KIND) + `Input2Kind_binary_sequential_RS : _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_string = "RS "; + `Input2Kind_binary_sequential_IMM_I : _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_string = "IMM_I"; + default : _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_string = "?????"; + endcase + end + always @(*) begin + case(_zz_decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND) + `Input2Kind_binary_sequential_RS : _zz_decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND_string = "RS "; + `Input2Kind_binary_sequential_IMM_I : _zz_decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND_string = "IMM_I"; + default : _zz_decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND_string = "?????"; + endcase + end + always @(*) begin + case(_zz_decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND_1) + `Input2Kind_binary_sequential_RS : _zz_decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND_1_string = "RS "; + `Input2Kind_binary_sequential_IMM_I : _zz_decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND_1_string = "IMM_I"; + default : _zz_decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND_1_string = "?????"; + endcase + end + always @(*) begin + case(_zz_memory_to_writeBack_ENV_CTRL) + `EnvCtrlEnum_binary_sequential_NONE : _zz_memory_to_writeBack_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : _zz_memory_to_writeBack_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_binary_sequential_WFI : _zz_memory_to_writeBack_ENV_CTRL_string = "WFI "; + `EnvCtrlEnum_binary_sequential_ECALL : _zz_memory_to_writeBack_ENV_CTRL_string = "ECALL"; + default : _zz_memory_to_writeBack_ENV_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(_zz_memory_to_writeBack_ENV_CTRL_1) + `EnvCtrlEnum_binary_sequential_NONE : _zz_memory_to_writeBack_ENV_CTRL_1_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : _zz_memory_to_writeBack_ENV_CTRL_1_string = "XRET "; + `EnvCtrlEnum_binary_sequential_WFI : _zz_memory_to_writeBack_ENV_CTRL_1_string = "WFI "; + `EnvCtrlEnum_binary_sequential_ECALL : _zz_memory_to_writeBack_ENV_CTRL_1_string = "ECALL"; + default : _zz_memory_to_writeBack_ENV_CTRL_1_string = "?????"; + endcase + end + always @(*) begin + case(_zz_execute_to_memory_ENV_CTRL) + `EnvCtrlEnum_binary_sequential_NONE : _zz_execute_to_memory_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : _zz_execute_to_memory_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_binary_sequential_WFI : _zz_execute_to_memory_ENV_CTRL_string = "WFI "; + `EnvCtrlEnum_binary_sequential_ECALL : _zz_execute_to_memory_ENV_CTRL_string = "ECALL"; + default : _zz_execute_to_memory_ENV_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(_zz_execute_to_memory_ENV_CTRL_1) + `EnvCtrlEnum_binary_sequential_NONE : _zz_execute_to_memory_ENV_CTRL_1_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : _zz_execute_to_memory_ENV_CTRL_1_string = "XRET "; + `EnvCtrlEnum_binary_sequential_WFI : _zz_execute_to_memory_ENV_CTRL_1_string = "WFI "; + `EnvCtrlEnum_binary_sequential_ECALL : _zz_execute_to_memory_ENV_CTRL_1_string = "ECALL"; + default : _zz_execute_to_memory_ENV_CTRL_1_string = "?????"; + endcase + end + always @(*) begin + case(decode_ENV_CTRL) + `EnvCtrlEnum_binary_sequential_NONE : decode_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : decode_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_binary_sequential_WFI : decode_ENV_CTRL_string = "WFI "; + `EnvCtrlEnum_binary_sequential_ECALL : decode_ENV_CTRL_string = "ECALL"; + default : decode_ENV_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(_zz_decode_ENV_CTRL) + `EnvCtrlEnum_binary_sequential_NONE : _zz_decode_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : _zz_decode_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_binary_sequential_WFI : _zz_decode_ENV_CTRL_string = "WFI "; + `EnvCtrlEnum_binary_sequential_ECALL : _zz_decode_ENV_CTRL_string = "ECALL"; + default : _zz_decode_ENV_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(_zz_decode_to_execute_ENV_CTRL) + `EnvCtrlEnum_binary_sequential_NONE : _zz_decode_to_execute_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : _zz_decode_to_execute_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_binary_sequential_WFI : _zz_decode_to_execute_ENV_CTRL_string = "WFI "; + `EnvCtrlEnum_binary_sequential_ECALL : _zz_decode_to_execute_ENV_CTRL_string = "ECALL"; + default : _zz_decode_to_execute_ENV_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(_zz_decode_to_execute_ENV_CTRL_1) + `EnvCtrlEnum_binary_sequential_NONE : _zz_decode_to_execute_ENV_CTRL_1_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : _zz_decode_to_execute_ENV_CTRL_1_string = "XRET "; + `EnvCtrlEnum_binary_sequential_WFI : _zz_decode_to_execute_ENV_CTRL_1_string = "WFI "; + `EnvCtrlEnum_binary_sequential_ECALL : _zz_decode_to_execute_ENV_CTRL_1_string = "ECALL"; + default : _zz_decode_to_execute_ENV_CTRL_1_string = "?????"; + endcase + end + always @(*) begin + case(_zz_decode_to_execute_BRANCH_CTRL) + `BranchCtrlEnum_binary_sequential_INC : _zz_decode_to_execute_BRANCH_CTRL_string = "INC "; + `BranchCtrlEnum_binary_sequential_B : _zz_decode_to_execute_BRANCH_CTRL_string = "B "; + `BranchCtrlEnum_binary_sequential_JAL : _zz_decode_to_execute_BRANCH_CTRL_string = "JAL "; + `BranchCtrlEnum_binary_sequential_JALR : _zz_decode_to_execute_BRANCH_CTRL_string = "JALR"; + default : _zz_decode_to_execute_BRANCH_CTRL_string = "????"; + endcase + end + always @(*) begin + case(_zz_decode_to_execute_BRANCH_CTRL_1) + `BranchCtrlEnum_binary_sequential_INC : _zz_decode_to_execute_BRANCH_CTRL_1_string = "INC "; + `BranchCtrlEnum_binary_sequential_B : _zz_decode_to_execute_BRANCH_CTRL_1_string = "B "; + `BranchCtrlEnum_binary_sequential_JAL : _zz_decode_to_execute_BRANCH_CTRL_1_string = "JAL "; + `BranchCtrlEnum_binary_sequential_JALR : _zz_decode_to_execute_BRANCH_CTRL_1_string = "JALR"; + default : _zz_decode_to_execute_BRANCH_CTRL_1_string = "????"; + endcase + end + always @(*) begin + case(_zz_execute_to_memory_SHIFT_CTRL) + `ShiftCtrlEnum_binary_sequential_DISABLE_1 : _zz_execute_to_memory_SHIFT_CTRL_string = "DISABLE_1"; + `ShiftCtrlEnum_binary_sequential_SLL_1 : _zz_execute_to_memory_SHIFT_CTRL_string = "SLL_1 "; + `ShiftCtrlEnum_binary_sequential_SRL_1 : _zz_execute_to_memory_SHIFT_CTRL_string = "SRL_1 "; + `ShiftCtrlEnum_binary_sequential_SRA_1 : _zz_execute_to_memory_SHIFT_CTRL_string = "SRA_1 "; + default : _zz_execute_to_memory_SHIFT_CTRL_string = "?????????"; + endcase + end + always @(*) begin + case(_zz_execute_to_memory_SHIFT_CTRL_1) + `ShiftCtrlEnum_binary_sequential_DISABLE_1 : _zz_execute_to_memory_SHIFT_CTRL_1_string = "DISABLE_1"; + `ShiftCtrlEnum_binary_sequential_SLL_1 : _zz_execute_to_memory_SHIFT_CTRL_1_string = "SLL_1 "; + `ShiftCtrlEnum_binary_sequential_SRL_1 : _zz_execute_to_memory_SHIFT_CTRL_1_string = "SRL_1 "; + `ShiftCtrlEnum_binary_sequential_SRA_1 : _zz_execute_to_memory_SHIFT_CTRL_1_string = "SRA_1 "; + default : _zz_execute_to_memory_SHIFT_CTRL_1_string = "?????????"; + endcase + end + always @(*) begin + case(decode_SHIFT_CTRL) + `ShiftCtrlEnum_binary_sequential_DISABLE_1 : decode_SHIFT_CTRL_string = "DISABLE_1"; + `ShiftCtrlEnum_binary_sequential_SLL_1 : decode_SHIFT_CTRL_string = "SLL_1 "; + `ShiftCtrlEnum_binary_sequential_SRL_1 : decode_SHIFT_CTRL_string = "SRL_1 "; + `ShiftCtrlEnum_binary_sequential_SRA_1 : decode_SHIFT_CTRL_string = "SRA_1 "; + default : decode_SHIFT_CTRL_string = "?????????"; + endcase + end + always @(*) begin + case(_zz_decode_SHIFT_CTRL) + `ShiftCtrlEnum_binary_sequential_DISABLE_1 : _zz_decode_SHIFT_CTRL_string = "DISABLE_1"; + `ShiftCtrlEnum_binary_sequential_SLL_1 : _zz_decode_SHIFT_CTRL_string = "SLL_1 "; + `ShiftCtrlEnum_binary_sequential_SRL_1 : _zz_decode_SHIFT_CTRL_string = "SRL_1 "; + `ShiftCtrlEnum_binary_sequential_SRA_1 : _zz_decode_SHIFT_CTRL_string = "SRA_1 "; + default : _zz_decode_SHIFT_CTRL_string = "?????????"; + endcase + end + always @(*) begin + case(_zz_decode_to_execute_SHIFT_CTRL) + `ShiftCtrlEnum_binary_sequential_DISABLE_1 : _zz_decode_to_execute_SHIFT_CTRL_string = "DISABLE_1"; + `ShiftCtrlEnum_binary_sequential_SLL_1 : _zz_decode_to_execute_SHIFT_CTRL_string = "SLL_1 "; + `ShiftCtrlEnum_binary_sequential_SRL_1 : _zz_decode_to_execute_SHIFT_CTRL_string = "SRL_1 "; + `ShiftCtrlEnum_binary_sequential_SRA_1 : _zz_decode_to_execute_SHIFT_CTRL_string = "SRA_1 "; + default : _zz_decode_to_execute_SHIFT_CTRL_string = "?????????"; + endcase + end + always @(*) begin + case(_zz_decode_to_execute_SHIFT_CTRL_1) + `ShiftCtrlEnum_binary_sequential_DISABLE_1 : _zz_decode_to_execute_SHIFT_CTRL_1_string = "DISABLE_1"; + `ShiftCtrlEnum_binary_sequential_SLL_1 : _zz_decode_to_execute_SHIFT_CTRL_1_string = "SLL_1 "; + `ShiftCtrlEnum_binary_sequential_SRL_1 : _zz_decode_to_execute_SHIFT_CTRL_1_string = "SRL_1 "; + `ShiftCtrlEnum_binary_sequential_SRA_1 : _zz_decode_to_execute_SHIFT_CTRL_1_string = "SRA_1 "; + default : _zz_decode_to_execute_SHIFT_CTRL_1_string = "?????????"; + endcase + end + always @(*) begin + case(decode_ALU_BITWISE_CTRL) + `AluBitwiseCtrlEnum_binary_sequential_XOR_1 : decode_ALU_BITWISE_CTRL_string = "XOR_1"; + `AluBitwiseCtrlEnum_binary_sequential_OR_1 : decode_ALU_BITWISE_CTRL_string = "OR_1 "; + `AluBitwiseCtrlEnum_binary_sequential_AND_1 : decode_ALU_BITWISE_CTRL_string = "AND_1"; + default : decode_ALU_BITWISE_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(_zz_decode_ALU_BITWISE_CTRL) + `AluBitwiseCtrlEnum_binary_sequential_XOR_1 : _zz_decode_ALU_BITWISE_CTRL_string = "XOR_1"; + `AluBitwiseCtrlEnum_binary_sequential_OR_1 : _zz_decode_ALU_BITWISE_CTRL_string = "OR_1 "; + `AluBitwiseCtrlEnum_binary_sequential_AND_1 : _zz_decode_ALU_BITWISE_CTRL_string = "AND_1"; + default : _zz_decode_ALU_BITWISE_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(_zz_decode_to_execute_ALU_BITWISE_CTRL) + `AluBitwiseCtrlEnum_binary_sequential_XOR_1 : _zz_decode_to_execute_ALU_BITWISE_CTRL_string = "XOR_1"; + `AluBitwiseCtrlEnum_binary_sequential_OR_1 : _zz_decode_to_execute_ALU_BITWISE_CTRL_string = "OR_1 "; + `AluBitwiseCtrlEnum_binary_sequential_AND_1 : _zz_decode_to_execute_ALU_BITWISE_CTRL_string = "AND_1"; + default : _zz_decode_to_execute_ALU_BITWISE_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(_zz_decode_to_execute_ALU_BITWISE_CTRL_1) + `AluBitwiseCtrlEnum_binary_sequential_XOR_1 : _zz_decode_to_execute_ALU_BITWISE_CTRL_1_string = "XOR_1"; + `AluBitwiseCtrlEnum_binary_sequential_OR_1 : _zz_decode_to_execute_ALU_BITWISE_CTRL_1_string = "OR_1 "; + `AluBitwiseCtrlEnum_binary_sequential_AND_1 : _zz_decode_to_execute_ALU_BITWISE_CTRL_1_string = "AND_1"; + default : _zz_decode_to_execute_ALU_BITWISE_CTRL_1_string = "?????"; + endcase + end + always @(*) begin + case(decode_SRC2_CTRL) + `Src2CtrlEnum_binary_sequential_RS : decode_SRC2_CTRL_string = "RS "; + `Src2CtrlEnum_binary_sequential_IMI : decode_SRC2_CTRL_string = "IMI"; + `Src2CtrlEnum_binary_sequential_IMS : decode_SRC2_CTRL_string = "IMS"; + `Src2CtrlEnum_binary_sequential_PC : decode_SRC2_CTRL_string = "PC "; + default : decode_SRC2_CTRL_string = "???"; + endcase + end + always @(*) begin + case(_zz_decode_SRC2_CTRL) + `Src2CtrlEnum_binary_sequential_RS : _zz_decode_SRC2_CTRL_string = "RS "; + `Src2CtrlEnum_binary_sequential_IMI : _zz_decode_SRC2_CTRL_string = "IMI"; + `Src2CtrlEnum_binary_sequential_IMS : _zz_decode_SRC2_CTRL_string = "IMS"; + `Src2CtrlEnum_binary_sequential_PC : _zz_decode_SRC2_CTRL_string = "PC "; + default : _zz_decode_SRC2_CTRL_string = "???"; + endcase + end + always @(*) begin + case(_zz_decode_to_execute_SRC2_CTRL) + `Src2CtrlEnum_binary_sequential_RS : _zz_decode_to_execute_SRC2_CTRL_string = "RS "; + `Src2CtrlEnum_binary_sequential_IMI : _zz_decode_to_execute_SRC2_CTRL_string = "IMI"; + `Src2CtrlEnum_binary_sequential_IMS : _zz_decode_to_execute_SRC2_CTRL_string = "IMS"; + `Src2CtrlEnum_binary_sequential_PC : _zz_decode_to_execute_SRC2_CTRL_string = "PC "; + default : _zz_decode_to_execute_SRC2_CTRL_string = "???"; + endcase + end + always @(*) begin + case(_zz_decode_to_execute_SRC2_CTRL_1) + `Src2CtrlEnum_binary_sequential_RS : _zz_decode_to_execute_SRC2_CTRL_1_string = "RS "; + `Src2CtrlEnum_binary_sequential_IMI : _zz_decode_to_execute_SRC2_CTRL_1_string = "IMI"; + `Src2CtrlEnum_binary_sequential_IMS : _zz_decode_to_execute_SRC2_CTRL_1_string = "IMS"; + `Src2CtrlEnum_binary_sequential_PC : _zz_decode_to_execute_SRC2_CTRL_1_string = "PC "; + default : _zz_decode_to_execute_SRC2_CTRL_1_string = "???"; + endcase + end + always @(*) begin + case(decode_ALU_CTRL) + `AluCtrlEnum_binary_sequential_ADD_SUB : decode_ALU_CTRL_string = "ADD_SUB "; + `AluCtrlEnum_binary_sequential_SLT_SLTU : decode_ALU_CTRL_string = "SLT_SLTU"; + `AluCtrlEnum_binary_sequential_BITWISE : decode_ALU_CTRL_string = "BITWISE "; + default : decode_ALU_CTRL_string = "????????"; + endcase + end + always @(*) begin + case(_zz_decode_ALU_CTRL) + `AluCtrlEnum_binary_sequential_ADD_SUB : _zz_decode_ALU_CTRL_string = "ADD_SUB "; + `AluCtrlEnum_binary_sequential_SLT_SLTU : _zz_decode_ALU_CTRL_string = "SLT_SLTU"; + `AluCtrlEnum_binary_sequential_BITWISE : _zz_decode_ALU_CTRL_string = "BITWISE "; + default : _zz_decode_ALU_CTRL_string = "????????"; + endcase + end + always @(*) begin + case(_zz_decode_to_execute_ALU_CTRL) + `AluCtrlEnum_binary_sequential_ADD_SUB : _zz_decode_to_execute_ALU_CTRL_string = "ADD_SUB "; + `AluCtrlEnum_binary_sequential_SLT_SLTU : _zz_decode_to_execute_ALU_CTRL_string = "SLT_SLTU"; + `AluCtrlEnum_binary_sequential_BITWISE : _zz_decode_to_execute_ALU_CTRL_string = "BITWISE "; + default : _zz_decode_to_execute_ALU_CTRL_string = "????????"; + endcase + end + always @(*) begin + case(_zz_decode_to_execute_ALU_CTRL_1) + `AluCtrlEnum_binary_sequential_ADD_SUB : _zz_decode_to_execute_ALU_CTRL_1_string = "ADD_SUB "; + `AluCtrlEnum_binary_sequential_SLT_SLTU : _zz_decode_to_execute_ALU_CTRL_1_string = "SLT_SLTU"; + `AluCtrlEnum_binary_sequential_BITWISE : _zz_decode_to_execute_ALU_CTRL_1_string = "BITWISE "; + default : _zz_decode_to_execute_ALU_CTRL_1_string = "????????"; + endcase + end + always @(*) begin + case(decode_SRC1_CTRL) + `Src1CtrlEnum_binary_sequential_RS : decode_SRC1_CTRL_string = "RS "; + `Src1CtrlEnum_binary_sequential_IMU : decode_SRC1_CTRL_string = "IMU "; + `Src1CtrlEnum_binary_sequential_PC_INCREMENT : decode_SRC1_CTRL_string = "PC_INCREMENT"; + `Src1CtrlEnum_binary_sequential_URS1 : decode_SRC1_CTRL_string = "URS1 "; + default : decode_SRC1_CTRL_string = "????????????"; + endcase + end + always @(*) begin + case(_zz_decode_SRC1_CTRL) + `Src1CtrlEnum_binary_sequential_RS : _zz_decode_SRC1_CTRL_string = "RS "; + `Src1CtrlEnum_binary_sequential_IMU : _zz_decode_SRC1_CTRL_string = "IMU "; + `Src1CtrlEnum_binary_sequential_PC_INCREMENT : _zz_decode_SRC1_CTRL_string = "PC_INCREMENT"; + `Src1CtrlEnum_binary_sequential_URS1 : _zz_decode_SRC1_CTRL_string = "URS1 "; + default : _zz_decode_SRC1_CTRL_string = "????????????"; + endcase + end + always @(*) begin + case(_zz_decode_to_execute_SRC1_CTRL) + `Src1CtrlEnum_binary_sequential_RS : _zz_decode_to_execute_SRC1_CTRL_string = "RS "; + `Src1CtrlEnum_binary_sequential_IMU : _zz_decode_to_execute_SRC1_CTRL_string = "IMU "; + `Src1CtrlEnum_binary_sequential_PC_INCREMENT : _zz_decode_to_execute_SRC1_CTRL_string = "PC_INCREMENT"; + `Src1CtrlEnum_binary_sequential_URS1 : _zz_decode_to_execute_SRC1_CTRL_string = "URS1 "; + default : _zz_decode_to_execute_SRC1_CTRL_string = "????????????"; + endcase + end + always @(*) begin + case(_zz_decode_to_execute_SRC1_CTRL_1) + `Src1CtrlEnum_binary_sequential_RS : _zz_decode_to_execute_SRC1_CTRL_1_string = "RS "; + `Src1CtrlEnum_binary_sequential_IMU : _zz_decode_to_execute_SRC1_CTRL_1_string = "IMU "; + `Src1CtrlEnum_binary_sequential_PC_INCREMENT : _zz_decode_to_execute_SRC1_CTRL_1_string = "PC_INCREMENT"; + `Src1CtrlEnum_binary_sequential_URS1 : _zz_decode_to_execute_SRC1_CTRL_1_string = "URS1 "; + default : _zz_decode_to_execute_SRC1_CTRL_1_string = "????????????"; + endcase + end + always @(*) begin + case(execute_CfuPlugin_CFU_INPUT_2_KIND) + `Input2Kind_binary_sequential_RS : execute_CfuPlugin_CFU_INPUT_2_KIND_string = "RS "; + `Input2Kind_binary_sequential_IMM_I : execute_CfuPlugin_CFU_INPUT_2_KIND_string = "IMM_I"; + default : execute_CfuPlugin_CFU_INPUT_2_KIND_string = "?????"; + endcase + end + always @(*) begin + case(_zz_execute_CfuPlugin_CFU_INPUT_2_KIND) + `Input2Kind_binary_sequential_RS : _zz_execute_CfuPlugin_CFU_INPUT_2_KIND_string = "RS "; + `Input2Kind_binary_sequential_IMM_I : _zz_execute_CfuPlugin_CFU_INPUT_2_KIND_string = "IMM_I"; + default : _zz_execute_CfuPlugin_CFU_INPUT_2_KIND_string = "?????"; + endcase + end + always @(*) begin + case(memory_ENV_CTRL) + `EnvCtrlEnum_binary_sequential_NONE : memory_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : memory_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_binary_sequential_WFI : memory_ENV_CTRL_string = "WFI "; + `EnvCtrlEnum_binary_sequential_ECALL : memory_ENV_CTRL_string = "ECALL"; + default : memory_ENV_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(_zz_memory_ENV_CTRL) + `EnvCtrlEnum_binary_sequential_NONE : _zz_memory_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : _zz_memory_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_binary_sequential_WFI : _zz_memory_ENV_CTRL_string = "WFI "; + `EnvCtrlEnum_binary_sequential_ECALL : _zz_memory_ENV_CTRL_string = "ECALL"; + default : _zz_memory_ENV_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(execute_ENV_CTRL) + `EnvCtrlEnum_binary_sequential_NONE : execute_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : execute_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_binary_sequential_WFI : execute_ENV_CTRL_string = "WFI "; + `EnvCtrlEnum_binary_sequential_ECALL : execute_ENV_CTRL_string = "ECALL"; + default : execute_ENV_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(_zz_execute_ENV_CTRL) + `EnvCtrlEnum_binary_sequential_NONE : _zz_execute_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : _zz_execute_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_binary_sequential_WFI : _zz_execute_ENV_CTRL_string = "WFI "; + `EnvCtrlEnum_binary_sequential_ECALL : _zz_execute_ENV_CTRL_string = "ECALL"; + default : _zz_execute_ENV_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(writeBack_ENV_CTRL) + `EnvCtrlEnum_binary_sequential_NONE : writeBack_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : writeBack_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_binary_sequential_WFI : writeBack_ENV_CTRL_string = "WFI "; + `EnvCtrlEnum_binary_sequential_ECALL : writeBack_ENV_CTRL_string = "ECALL"; + default : writeBack_ENV_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(_zz_writeBack_ENV_CTRL) + `EnvCtrlEnum_binary_sequential_NONE : _zz_writeBack_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : _zz_writeBack_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_binary_sequential_WFI : _zz_writeBack_ENV_CTRL_string = "WFI "; + `EnvCtrlEnum_binary_sequential_ECALL : _zz_writeBack_ENV_CTRL_string = "ECALL"; + default : _zz_writeBack_ENV_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(execute_BRANCH_CTRL) + `BranchCtrlEnum_binary_sequential_INC : execute_BRANCH_CTRL_string = "INC "; + `BranchCtrlEnum_binary_sequential_B : execute_BRANCH_CTRL_string = "B "; + `BranchCtrlEnum_binary_sequential_JAL : execute_BRANCH_CTRL_string = "JAL "; + `BranchCtrlEnum_binary_sequential_JALR : execute_BRANCH_CTRL_string = "JALR"; + default : execute_BRANCH_CTRL_string = "????"; + endcase + end + always @(*) begin + case(_zz_execute_BRANCH_CTRL) + `BranchCtrlEnum_binary_sequential_INC : _zz_execute_BRANCH_CTRL_string = "INC "; + `BranchCtrlEnum_binary_sequential_B : _zz_execute_BRANCH_CTRL_string = "B "; + `BranchCtrlEnum_binary_sequential_JAL : _zz_execute_BRANCH_CTRL_string = "JAL "; + `BranchCtrlEnum_binary_sequential_JALR : _zz_execute_BRANCH_CTRL_string = "JALR"; + default : _zz_execute_BRANCH_CTRL_string = "????"; + endcase + end + always @(*) begin + case(memory_SHIFT_CTRL) + `ShiftCtrlEnum_binary_sequential_DISABLE_1 : memory_SHIFT_CTRL_string = "DISABLE_1"; + `ShiftCtrlEnum_binary_sequential_SLL_1 : memory_SHIFT_CTRL_string = "SLL_1 "; + `ShiftCtrlEnum_binary_sequential_SRL_1 : memory_SHIFT_CTRL_string = "SRL_1 "; + `ShiftCtrlEnum_binary_sequential_SRA_1 : memory_SHIFT_CTRL_string = "SRA_1 "; + default : memory_SHIFT_CTRL_string = "?????????"; + endcase + end + always @(*) begin + case(_zz_memory_SHIFT_CTRL) + `ShiftCtrlEnum_binary_sequential_DISABLE_1 : _zz_memory_SHIFT_CTRL_string = "DISABLE_1"; + `ShiftCtrlEnum_binary_sequential_SLL_1 : _zz_memory_SHIFT_CTRL_string = "SLL_1 "; + `ShiftCtrlEnum_binary_sequential_SRL_1 : _zz_memory_SHIFT_CTRL_string = "SRL_1 "; + `ShiftCtrlEnum_binary_sequential_SRA_1 : _zz_memory_SHIFT_CTRL_string = "SRA_1 "; + default : _zz_memory_SHIFT_CTRL_string = "?????????"; + endcase + end + always @(*) begin + case(execute_SHIFT_CTRL) + `ShiftCtrlEnum_binary_sequential_DISABLE_1 : execute_SHIFT_CTRL_string = "DISABLE_1"; + `ShiftCtrlEnum_binary_sequential_SLL_1 : execute_SHIFT_CTRL_string = "SLL_1 "; + `ShiftCtrlEnum_binary_sequential_SRL_1 : execute_SHIFT_CTRL_string = "SRL_1 "; + `ShiftCtrlEnum_binary_sequential_SRA_1 : execute_SHIFT_CTRL_string = "SRA_1 "; + default : execute_SHIFT_CTRL_string = "?????????"; + endcase + end + always @(*) begin + case(_zz_execute_SHIFT_CTRL) + `ShiftCtrlEnum_binary_sequential_DISABLE_1 : _zz_execute_SHIFT_CTRL_string = "DISABLE_1"; + `ShiftCtrlEnum_binary_sequential_SLL_1 : _zz_execute_SHIFT_CTRL_string = "SLL_1 "; + `ShiftCtrlEnum_binary_sequential_SRL_1 : _zz_execute_SHIFT_CTRL_string = "SRL_1 "; + `ShiftCtrlEnum_binary_sequential_SRA_1 : _zz_execute_SHIFT_CTRL_string = "SRA_1 "; + default : _zz_execute_SHIFT_CTRL_string = "?????????"; + endcase + end + always @(*) begin + case(execute_SRC2_CTRL) + `Src2CtrlEnum_binary_sequential_RS : execute_SRC2_CTRL_string = "RS "; + `Src2CtrlEnum_binary_sequential_IMI : execute_SRC2_CTRL_string = "IMI"; + `Src2CtrlEnum_binary_sequential_IMS : execute_SRC2_CTRL_string = "IMS"; + `Src2CtrlEnum_binary_sequential_PC : execute_SRC2_CTRL_string = "PC "; + default : execute_SRC2_CTRL_string = "???"; + endcase + end + always @(*) begin + case(_zz_execute_SRC2_CTRL) + `Src2CtrlEnum_binary_sequential_RS : _zz_execute_SRC2_CTRL_string = "RS "; + `Src2CtrlEnum_binary_sequential_IMI : _zz_execute_SRC2_CTRL_string = "IMI"; + `Src2CtrlEnum_binary_sequential_IMS : _zz_execute_SRC2_CTRL_string = "IMS"; + `Src2CtrlEnum_binary_sequential_PC : _zz_execute_SRC2_CTRL_string = "PC "; + default : _zz_execute_SRC2_CTRL_string = "???"; + endcase + end + always @(*) begin + case(execute_SRC1_CTRL) + `Src1CtrlEnum_binary_sequential_RS : execute_SRC1_CTRL_string = "RS "; + `Src1CtrlEnum_binary_sequential_IMU : execute_SRC1_CTRL_string = "IMU "; + `Src1CtrlEnum_binary_sequential_PC_INCREMENT : execute_SRC1_CTRL_string = "PC_INCREMENT"; + `Src1CtrlEnum_binary_sequential_URS1 : execute_SRC1_CTRL_string = "URS1 "; + default : execute_SRC1_CTRL_string = "????????????"; + endcase + end + always @(*) begin + case(_zz_execute_SRC1_CTRL) + `Src1CtrlEnum_binary_sequential_RS : _zz_execute_SRC1_CTRL_string = "RS "; + `Src1CtrlEnum_binary_sequential_IMU : _zz_execute_SRC1_CTRL_string = "IMU "; + `Src1CtrlEnum_binary_sequential_PC_INCREMENT : _zz_execute_SRC1_CTRL_string = "PC_INCREMENT"; + `Src1CtrlEnum_binary_sequential_URS1 : _zz_execute_SRC1_CTRL_string = "URS1 "; + default : _zz_execute_SRC1_CTRL_string = "????????????"; + endcase + end + always @(*) begin + case(execute_ALU_CTRL) + `AluCtrlEnum_binary_sequential_ADD_SUB : execute_ALU_CTRL_string = "ADD_SUB "; + `AluCtrlEnum_binary_sequential_SLT_SLTU : execute_ALU_CTRL_string = "SLT_SLTU"; + `AluCtrlEnum_binary_sequential_BITWISE : execute_ALU_CTRL_string = "BITWISE "; + default : execute_ALU_CTRL_string = "????????"; + endcase + end + always @(*) begin + case(_zz_execute_ALU_CTRL) + `AluCtrlEnum_binary_sequential_ADD_SUB : _zz_execute_ALU_CTRL_string = "ADD_SUB "; + `AluCtrlEnum_binary_sequential_SLT_SLTU : _zz_execute_ALU_CTRL_string = "SLT_SLTU"; + `AluCtrlEnum_binary_sequential_BITWISE : _zz_execute_ALU_CTRL_string = "BITWISE "; + default : _zz_execute_ALU_CTRL_string = "????????"; + endcase + end + always @(*) begin + case(execute_ALU_BITWISE_CTRL) + `AluBitwiseCtrlEnum_binary_sequential_XOR_1 : execute_ALU_BITWISE_CTRL_string = "XOR_1"; + `AluBitwiseCtrlEnum_binary_sequential_OR_1 : execute_ALU_BITWISE_CTRL_string = "OR_1 "; + `AluBitwiseCtrlEnum_binary_sequential_AND_1 : execute_ALU_BITWISE_CTRL_string = "AND_1"; + default : execute_ALU_BITWISE_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(_zz_execute_ALU_BITWISE_CTRL) + `AluBitwiseCtrlEnum_binary_sequential_XOR_1 : _zz_execute_ALU_BITWISE_CTRL_string = "XOR_1"; + `AluBitwiseCtrlEnum_binary_sequential_OR_1 : _zz_execute_ALU_BITWISE_CTRL_string = "OR_1 "; + `AluBitwiseCtrlEnum_binary_sequential_AND_1 : _zz_execute_ALU_BITWISE_CTRL_string = "AND_1"; + default : _zz_execute_ALU_BITWISE_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(_zz_decode_CfuPlugin_CFU_INPUT_2_KIND_1) + `Input2Kind_binary_sequential_RS : _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_1_string = "RS "; + `Input2Kind_binary_sequential_IMM_I : _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_1_string = "IMM_I"; + default : _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_1_string = "?????"; + endcase + end + always @(*) begin + case(_zz_decode_ENV_CTRL_1) + `EnvCtrlEnum_binary_sequential_NONE : _zz_decode_ENV_CTRL_1_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : _zz_decode_ENV_CTRL_1_string = "XRET "; + `EnvCtrlEnum_binary_sequential_WFI : _zz_decode_ENV_CTRL_1_string = "WFI "; + `EnvCtrlEnum_binary_sequential_ECALL : _zz_decode_ENV_CTRL_1_string = "ECALL"; + default : _zz_decode_ENV_CTRL_1_string = "?????"; + endcase + end + always @(*) begin + case(_zz_decode_BRANCH_CTRL) + `BranchCtrlEnum_binary_sequential_INC : _zz_decode_BRANCH_CTRL_string = "INC "; + `BranchCtrlEnum_binary_sequential_B : _zz_decode_BRANCH_CTRL_string = "B "; + `BranchCtrlEnum_binary_sequential_JAL : _zz_decode_BRANCH_CTRL_string = "JAL "; + `BranchCtrlEnum_binary_sequential_JALR : _zz_decode_BRANCH_CTRL_string = "JALR"; + default : _zz_decode_BRANCH_CTRL_string = "????"; + endcase + end + always @(*) begin + case(_zz_decode_SHIFT_CTRL_1) + `ShiftCtrlEnum_binary_sequential_DISABLE_1 : _zz_decode_SHIFT_CTRL_1_string = "DISABLE_1"; + `ShiftCtrlEnum_binary_sequential_SLL_1 : _zz_decode_SHIFT_CTRL_1_string = "SLL_1 "; + `ShiftCtrlEnum_binary_sequential_SRL_1 : _zz_decode_SHIFT_CTRL_1_string = "SRL_1 "; + `ShiftCtrlEnum_binary_sequential_SRA_1 : _zz_decode_SHIFT_CTRL_1_string = "SRA_1 "; + default : _zz_decode_SHIFT_CTRL_1_string = "?????????"; + endcase + end + always @(*) begin + case(_zz_decode_ALU_BITWISE_CTRL_1) + `AluBitwiseCtrlEnum_binary_sequential_XOR_1 : _zz_decode_ALU_BITWISE_CTRL_1_string = "XOR_1"; + `AluBitwiseCtrlEnum_binary_sequential_OR_1 : _zz_decode_ALU_BITWISE_CTRL_1_string = "OR_1 "; + `AluBitwiseCtrlEnum_binary_sequential_AND_1 : _zz_decode_ALU_BITWISE_CTRL_1_string = "AND_1"; + default : _zz_decode_ALU_BITWISE_CTRL_1_string = "?????"; + endcase + end + always @(*) begin + case(_zz_decode_SRC2_CTRL_1) + `Src2CtrlEnum_binary_sequential_RS : _zz_decode_SRC2_CTRL_1_string = "RS "; + `Src2CtrlEnum_binary_sequential_IMI : _zz_decode_SRC2_CTRL_1_string = "IMI"; + `Src2CtrlEnum_binary_sequential_IMS : _zz_decode_SRC2_CTRL_1_string = "IMS"; + `Src2CtrlEnum_binary_sequential_PC : _zz_decode_SRC2_CTRL_1_string = "PC "; + default : _zz_decode_SRC2_CTRL_1_string = "???"; + endcase + end + always @(*) begin + case(_zz_decode_ALU_CTRL_1) + `AluCtrlEnum_binary_sequential_ADD_SUB : _zz_decode_ALU_CTRL_1_string = "ADD_SUB "; + `AluCtrlEnum_binary_sequential_SLT_SLTU : _zz_decode_ALU_CTRL_1_string = "SLT_SLTU"; + `AluCtrlEnum_binary_sequential_BITWISE : _zz_decode_ALU_CTRL_1_string = "BITWISE "; + default : _zz_decode_ALU_CTRL_1_string = "????????"; + endcase + end + always @(*) begin + case(_zz_decode_SRC1_CTRL_1) + `Src1CtrlEnum_binary_sequential_RS : _zz_decode_SRC1_CTRL_1_string = "RS "; + `Src1CtrlEnum_binary_sequential_IMU : _zz_decode_SRC1_CTRL_1_string = "IMU "; + `Src1CtrlEnum_binary_sequential_PC_INCREMENT : _zz_decode_SRC1_CTRL_1_string = "PC_INCREMENT"; + `Src1CtrlEnum_binary_sequential_URS1 : _zz_decode_SRC1_CTRL_1_string = "URS1 "; + default : _zz_decode_SRC1_CTRL_1_string = "????????????"; + endcase + end + always @(*) begin + case(decode_BRANCH_CTRL) + `BranchCtrlEnum_binary_sequential_INC : decode_BRANCH_CTRL_string = "INC "; + `BranchCtrlEnum_binary_sequential_B : decode_BRANCH_CTRL_string = "B "; + `BranchCtrlEnum_binary_sequential_JAL : decode_BRANCH_CTRL_string = "JAL "; + `BranchCtrlEnum_binary_sequential_JALR : decode_BRANCH_CTRL_string = "JALR"; + default : decode_BRANCH_CTRL_string = "????"; + endcase + end + always @(*) begin + case(_zz_decode_BRANCH_CTRL_1) + `BranchCtrlEnum_binary_sequential_INC : _zz_decode_BRANCH_CTRL_1_string = "INC "; + `BranchCtrlEnum_binary_sequential_B : _zz_decode_BRANCH_CTRL_1_string = "B "; + `BranchCtrlEnum_binary_sequential_JAL : _zz_decode_BRANCH_CTRL_1_string = "JAL "; + `BranchCtrlEnum_binary_sequential_JALR : _zz_decode_BRANCH_CTRL_1_string = "JALR"; + default : _zz_decode_BRANCH_CTRL_1_string = "????"; + endcase + end + always @(*) begin + case(_zz_decode_SRC1_CTRL_2) + `Src1CtrlEnum_binary_sequential_RS : _zz_decode_SRC1_CTRL_2_string = "RS "; + `Src1CtrlEnum_binary_sequential_IMU : _zz_decode_SRC1_CTRL_2_string = "IMU "; + `Src1CtrlEnum_binary_sequential_PC_INCREMENT : _zz_decode_SRC1_CTRL_2_string = "PC_INCREMENT"; + `Src1CtrlEnum_binary_sequential_URS1 : _zz_decode_SRC1_CTRL_2_string = "URS1 "; + default : _zz_decode_SRC1_CTRL_2_string = "????????????"; + endcase + end + always @(*) begin + case(_zz_decode_ALU_CTRL_2) + `AluCtrlEnum_binary_sequential_ADD_SUB : _zz_decode_ALU_CTRL_2_string = "ADD_SUB "; + `AluCtrlEnum_binary_sequential_SLT_SLTU : _zz_decode_ALU_CTRL_2_string = "SLT_SLTU"; + `AluCtrlEnum_binary_sequential_BITWISE : _zz_decode_ALU_CTRL_2_string = "BITWISE "; + default : _zz_decode_ALU_CTRL_2_string = "????????"; + endcase + end + always @(*) begin + case(_zz_decode_SRC2_CTRL_2) + `Src2CtrlEnum_binary_sequential_RS : _zz_decode_SRC2_CTRL_2_string = "RS "; + `Src2CtrlEnum_binary_sequential_IMI : _zz_decode_SRC2_CTRL_2_string = "IMI"; + `Src2CtrlEnum_binary_sequential_IMS : _zz_decode_SRC2_CTRL_2_string = "IMS"; + `Src2CtrlEnum_binary_sequential_PC : _zz_decode_SRC2_CTRL_2_string = "PC "; + default : _zz_decode_SRC2_CTRL_2_string = "???"; + endcase + end + always @(*) begin + case(_zz_decode_ALU_BITWISE_CTRL_2) + `AluBitwiseCtrlEnum_binary_sequential_XOR_1 : _zz_decode_ALU_BITWISE_CTRL_2_string = "XOR_1"; + `AluBitwiseCtrlEnum_binary_sequential_OR_1 : _zz_decode_ALU_BITWISE_CTRL_2_string = "OR_1 "; + `AluBitwiseCtrlEnum_binary_sequential_AND_1 : _zz_decode_ALU_BITWISE_CTRL_2_string = "AND_1"; + default : _zz_decode_ALU_BITWISE_CTRL_2_string = "?????"; + endcase + end + always @(*) begin + case(_zz_decode_SHIFT_CTRL_2) + `ShiftCtrlEnum_binary_sequential_DISABLE_1 : _zz_decode_SHIFT_CTRL_2_string = "DISABLE_1"; + `ShiftCtrlEnum_binary_sequential_SLL_1 : _zz_decode_SHIFT_CTRL_2_string = "SLL_1 "; + `ShiftCtrlEnum_binary_sequential_SRL_1 : _zz_decode_SHIFT_CTRL_2_string = "SRL_1 "; + `ShiftCtrlEnum_binary_sequential_SRA_1 : _zz_decode_SHIFT_CTRL_2_string = "SRA_1 "; + default : _zz_decode_SHIFT_CTRL_2_string = "?????????"; + endcase + end + always @(*) begin + case(_zz_decode_BRANCH_CTRL_2) + `BranchCtrlEnum_binary_sequential_INC : _zz_decode_BRANCH_CTRL_2_string = "INC "; + `BranchCtrlEnum_binary_sequential_B : _zz_decode_BRANCH_CTRL_2_string = "B "; + `BranchCtrlEnum_binary_sequential_JAL : _zz_decode_BRANCH_CTRL_2_string = "JAL "; + `BranchCtrlEnum_binary_sequential_JALR : _zz_decode_BRANCH_CTRL_2_string = "JALR"; + default : _zz_decode_BRANCH_CTRL_2_string = "????"; + endcase + end + always @(*) begin + case(_zz_decode_ENV_CTRL_2) + `EnvCtrlEnum_binary_sequential_NONE : _zz_decode_ENV_CTRL_2_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : _zz_decode_ENV_CTRL_2_string = "XRET "; + `EnvCtrlEnum_binary_sequential_WFI : _zz_decode_ENV_CTRL_2_string = "WFI "; + `EnvCtrlEnum_binary_sequential_ECALL : _zz_decode_ENV_CTRL_2_string = "ECALL"; + default : _zz_decode_ENV_CTRL_2_string = "?????"; + endcase + end + always @(*) begin + case(_zz_decode_CfuPlugin_CFU_INPUT_2_KIND_8) + `Input2Kind_binary_sequential_RS : _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_8_string = "RS "; + `Input2Kind_binary_sequential_IMM_I : _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_8_string = "IMM_I"; + default : _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_8_string = "?????"; + endcase + end + always @(*) begin + case(decode_to_execute_SRC1_CTRL) + `Src1CtrlEnum_binary_sequential_RS : decode_to_execute_SRC1_CTRL_string = "RS "; + `Src1CtrlEnum_binary_sequential_IMU : decode_to_execute_SRC1_CTRL_string = "IMU "; + `Src1CtrlEnum_binary_sequential_PC_INCREMENT : decode_to_execute_SRC1_CTRL_string = "PC_INCREMENT"; + `Src1CtrlEnum_binary_sequential_URS1 : decode_to_execute_SRC1_CTRL_string = "URS1 "; + default : decode_to_execute_SRC1_CTRL_string = "????????????"; + endcase + end + always @(*) begin + case(decode_to_execute_ALU_CTRL) + `AluCtrlEnum_binary_sequential_ADD_SUB : decode_to_execute_ALU_CTRL_string = "ADD_SUB "; + `AluCtrlEnum_binary_sequential_SLT_SLTU : decode_to_execute_ALU_CTRL_string = "SLT_SLTU"; + `AluCtrlEnum_binary_sequential_BITWISE : decode_to_execute_ALU_CTRL_string = "BITWISE "; + default : decode_to_execute_ALU_CTRL_string = "????????"; + endcase + end + always @(*) begin + case(decode_to_execute_SRC2_CTRL) + `Src2CtrlEnum_binary_sequential_RS : decode_to_execute_SRC2_CTRL_string = "RS "; + `Src2CtrlEnum_binary_sequential_IMI : decode_to_execute_SRC2_CTRL_string = "IMI"; + `Src2CtrlEnum_binary_sequential_IMS : decode_to_execute_SRC2_CTRL_string = "IMS"; + `Src2CtrlEnum_binary_sequential_PC : decode_to_execute_SRC2_CTRL_string = "PC "; + default : decode_to_execute_SRC2_CTRL_string = "???"; + endcase + end + always @(*) begin + case(decode_to_execute_ALU_BITWISE_CTRL) + `AluBitwiseCtrlEnum_binary_sequential_XOR_1 : decode_to_execute_ALU_BITWISE_CTRL_string = "XOR_1"; + `AluBitwiseCtrlEnum_binary_sequential_OR_1 : decode_to_execute_ALU_BITWISE_CTRL_string = "OR_1 "; + `AluBitwiseCtrlEnum_binary_sequential_AND_1 : decode_to_execute_ALU_BITWISE_CTRL_string = "AND_1"; + default : decode_to_execute_ALU_BITWISE_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(decode_to_execute_SHIFT_CTRL) + `ShiftCtrlEnum_binary_sequential_DISABLE_1 : decode_to_execute_SHIFT_CTRL_string = "DISABLE_1"; + `ShiftCtrlEnum_binary_sequential_SLL_1 : decode_to_execute_SHIFT_CTRL_string = "SLL_1 "; + `ShiftCtrlEnum_binary_sequential_SRL_1 : decode_to_execute_SHIFT_CTRL_string = "SRL_1 "; + `ShiftCtrlEnum_binary_sequential_SRA_1 : decode_to_execute_SHIFT_CTRL_string = "SRA_1 "; + default : decode_to_execute_SHIFT_CTRL_string = "?????????"; + endcase + end + always @(*) begin + case(execute_to_memory_SHIFT_CTRL) + `ShiftCtrlEnum_binary_sequential_DISABLE_1 : execute_to_memory_SHIFT_CTRL_string = "DISABLE_1"; + `ShiftCtrlEnum_binary_sequential_SLL_1 : execute_to_memory_SHIFT_CTRL_string = "SLL_1 "; + `ShiftCtrlEnum_binary_sequential_SRL_1 : execute_to_memory_SHIFT_CTRL_string = "SRL_1 "; + `ShiftCtrlEnum_binary_sequential_SRA_1 : execute_to_memory_SHIFT_CTRL_string = "SRA_1 "; + default : execute_to_memory_SHIFT_CTRL_string = "?????????"; + endcase + end + always @(*) begin + case(decode_to_execute_BRANCH_CTRL) + `BranchCtrlEnum_binary_sequential_INC : decode_to_execute_BRANCH_CTRL_string = "INC "; + `BranchCtrlEnum_binary_sequential_B : decode_to_execute_BRANCH_CTRL_string = "B "; + `BranchCtrlEnum_binary_sequential_JAL : decode_to_execute_BRANCH_CTRL_string = "JAL "; + `BranchCtrlEnum_binary_sequential_JALR : decode_to_execute_BRANCH_CTRL_string = "JALR"; + default : decode_to_execute_BRANCH_CTRL_string = "????"; + endcase + end + always @(*) begin + case(decode_to_execute_ENV_CTRL) + `EnvCtrlEnum_binary_sequential_NONE : decode_to_execute_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : decode_to_execute_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_binary_sequential_WFI : decode_to_execute_ENV_CTRL_string = "WFI "; + `EnvCtrlEnum_binary_sequential_ECALL : decode_to_execute_ENV_CTRL_string = "ECALL"; + default : decode_to_execute_ENV_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(execute_to_memory_ENV_CTRL) + `EnvCtrlEnum_binary_sequential_NONE : execute_to_memory_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : execute_to_memory_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_binary_sequential_WFI : execute_to_memory_ENV_CTRL_string = "WFI "; + `EnvCtrlEnum_binary_sequential_ECALL : execute_to_memory_ENV_CTRL_string = "ECALL"; + default : execute_to_memory_ENV_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(memory_to_writeBack_ENV_CTRL) + `EnvCtrlEnum_binary_sequential_NONE : memory_to_writeBack_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : memory_to_writeBack_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_binary_sequential_WFI : memory_to_writeBack_ENV_CTRL_string = "WFI "; + `EnvCtrlEnum_binary_sequential_ECALL : memory_to_writeBack_ENV_CTRL_string = "ECALL"; + default : memory_to_writeBack_ENV_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND) + `Input2Kind_binary_sequential_RS : decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND_string = "RS "; + `Input2Kind_binary_sequential_IMM_I : decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND_string = "IMM_I"; + default : decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND_string = "?????"; + endcase + end + `endif + + assign memory_MUL_LOW = ($signed(_zz_memory_MUL_LOW) + $signed(_zz_memory_MUL_LOW_7)); + assign writeBack_CfuPlugin_CFU_IN_FLIGHT = memory_to_writeBack_CfuPlugin_CFU_IN_FLIGHT; + assign execute_CfuPlugin_CFU_IN_FLIGHT = ((execute_CfuPlugin_schedule || execute_CfuPlugin_hold) || execute_CfuPlugin_fired); + assign memory_MUL_HH = execute_to_memory_MUL_HH; + assign execute_MUL_HH = ($signed(execute_MulPlugin_aHigh) * $signed(execute_MulPlugin_bHigh)); + assign execute_MUL_HL = ($signed(execute_MulPlugin_aHigh) * $signed(execute_MulPlugin_bSLow)); + assign execute_MUL_LH = ($signed(execute_MulPlugin_aSLow) * $signed(execute_MulPlugin_bHigh)); + assign execute_MUL_LL = (execute_MulPlugin_aULow * execute_MulPlugin_bULow); + assign execute_SHIFT_RIGHT = _zz_execute_SHIFT_RIGHT; + assign execute_REGFILE_WRITE_DATA = _zz_execute_REGFILE_WRITE_DATA; + assign memory_MEMORY_STORE_DATA_RF = execute_to_memory_MEMORY_STORE_DATA_RF; + assign execute_MEMORY_STORE_DATA_RF = _zz_execute_MEMORY_STORE_DATA_RF; + assign decode_DO_EBREAK = (((! DebugPlugin_haltIt) && (decode_IS_EBREAK || 1'b0)) && DebugPlugin_allowEBreak); + assign decode_CSR_READ_OPCODE = (decode_INSTRUCTION[13 : 7] != 7'h20); + assign decode_CSR_WRITE_OPCODE = (! (((decode_INSTRUCTION[14 : 13] == 2'b01) && (decode_INSTRUCTION[19 : 15] == 5'h0)) || ((decode_INSTRUCTION[14 : 13] == 2'b11) && (decode_INSTRUCTION[19 : 15] == 5'h0)))); + assign decode_PREDICTION_HAD_BRANCHED2 = IBusCachedPlugin_decodePrediction_cmd_hadBranch; + assign decode_SRC2_FORCE_ZERO = (decode_SRC_ADD_ZERO && (! decode_SRC_USE_SUB_LESS)); + assign decode_CfuPlugin_CFU_INPUT_2_KIND = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND; + assign _zz_decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND = _zz_decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND_1; + assign decode_CfuPlugin_CFU_ENABLE = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[33]; + assign decode_IS_RS2_SIGNED = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[31]; + assign decode_IS_RS1_SIGNED = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[30]; + assign decode_IS_DIV = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[29]; + assign memory_IS_MUL = execute_to_memory_IS_MUL; + assign execute_IS_MUL = decode_to_execute_IS_MUL; + assign decode_IS_MUL = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[28]; + assign _zz_memory_to_writeBack_ENV_CTRL = _zz_memory_to_writeBack_ENV_CTRL_1; + assign _zz_execute_to_memory_ENV_CTRL = _zz_execute_to_memory_ENV_CTRL_1; + assign decode_ENV_CTRL = _zz_decode_ENV_CTRL; + assign _zz_decode_to_execute_ENV_CTRL = _zz_decode_to_execute_ENV_CTRL_1; + assign decode_IS_CSR = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[25]; + assign _zz_decode_to_execute_BRANCH_CTRL = _zz_decode_to_execute_BRANCH_CTRL_1; + assign _zz_execute_to_memory_SHIFT_CTRL = _zz_execute_to_memory_SHIFT_CTRL_1; + assign decode_SHIFT_CTRL = _zz_decode_SHIFT_CTRL; + assign _zz_decode_to_execute_SHIFT_CTRL = _zz_decode_to_execute_SHIFT_CTRL_1; + assign decode_ALU_BITWISE_CTRL = _zz_decode_ALU_BITWISE_CTRL; + assign _zz_decode_to_execute_ALU_BITWISE_CTRL = _zz_decode_to_execute_ALU_BITWISE_CTRL_1; + assign decode_SRC_LESS_UNSIGNED = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[17]; + assign decode_MEMORY_MANAGMENT = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[16]; + assign memory_MEMORY_WR = execute_to_memory_MEMORY_WR; + assign decode_MEMORY_WR = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[13]; + assign execute_BYPASSABLE_MEMORY_STAGE = decode_to_execute_BYPASSABLE_MEMORY_STAGE; + assign decode_BYPASSABLE_MEMORY_STAGE = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[12]; + assign decode_BYPASSABLE_EXECUTE_STAGE = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[11]; + assign decode_SRC2_CTRL = _zz_decode_SRC2_CTRL; + assign _zz_decode_to_execute_SRC2_CTRL = _zz_decode_to_execute_SRC2_CTRL_1; + assign decode_ALU_CTRL = _zz_decode_ALU_CTRL; + assign _zz_decode_to_execute_ALU_CTRL = _zz_decode_to_execute_ALU_CTRL_1; + assign decode_SRC1_CTRL = _zz_decode_SRC1_CTRL; + assign _zz_decode_to_execute_SRC1_CTRL = _zz_decode_to_execute_SRC1_CTRL_1; + assign decode_MEMORY_FORCE_CONSTISTENCY = 1'b0; + assign writeBack_FORMAL_PC_NEXT = memory_to_writeBack_FORMAL_PC_NEXT; + assign memory_FORMAL_PC_NEXT = execute_to_memory_FORMAL_PC_NEXT; + assign execute_FORMAL_PC_NEXT = decode_to_execute_FORMAL_PC_NEXT; + assign decode_FORMAL_PC_NEXT = (decode_PC + 32'h00000004); + assign memory_PC = execute_to_memory_PC; + always @(*) begin + _zz_memory_to_writeBack_CfuPlugin_CFU_IN_FLIGHT = memory_CfuPlugin_CFU_IN_FLIGHT; + if(memory_arbitration_isStuck) begin + _zz_memory_to_writeBack_CfuPlugin_CFU_IN_FLIGHT = 1'b0; + end + end + + always @(*) begin + _zz_execute_to_memory_CfuPlugin_CFU_IN_FLIGHT = execute_CfuPlugin_CFU_IN_FLIGHT; + if(execute_arbitration_isStuck) begin + _zz_execute_to_memory_CfuPlugin_CFU_IN_FLIGHT = 1'b0; + end + end + + assign memory_CfuPlugin_CFU_IN_FLIGHT = execute_to_memory_CfuPlugin_CFU_IN_FLIGHT; + assign execute_CfuPlugin_CFU_INPUT_2_KIND = _zz_execute_CfuPlugin_CFU_INPUT_2_KIND; + assign execute_CfuPlugin_CFU_ENABLE = decode_to_execute_CfuPlugin_CFU_ENABLE; + assign execute_DO_EBREAK = decode_to_execute_DO_EBREAK; + assign decode_IS_EBREAK = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[32]; + assign execute_IS_RS1_SIGNED = decode_to_execute_IS_RS1_SIGNED; + assign execute_IS_DIV = decode_to_execute_IS_DIV; + assign execute_IS_RS2_SIGNED = decode_to_execute_IS_RS2_SIGNED; + assign memory_IS_DIV = execute_to_memory_IS_DIV; + assign writeBack_IS_MUL = memory_to_writeBack_IS_MUL; + assign writeBack_MUL_HH = memory_to_writeBack_MUL_HH; + assign writeBack_MUL_LOW = memory_to_writeBack_MUL_LOW; + assign memory_MUL_HL = execute_to_memory_MUL_HL; + assign memory_MUL_LH = execute_to_memory_MUL_LH; + assign memory_MUL_LL = execute_to_memory_MUL_LL; + assign execute_CSR_READ_OPCODE = decode_to_execute_CSR_READ_OPCODE; + assign execute_CSR_WRITE_OPCODE = decode_to_execute_CSR_WRITE_OPCODE; + assign execute_IS_CSR = decode_to_execute_IS_CSR; + assign memory_ENV_CTRL = _zz_memory_ENV_CTRL; + assign execute_ENV_CTRL = _zz_execute_ENV_CTRL; + assign writeBack_ENV_CTRL = _zz_writeBack_ENV_CTRL; + assign execute_BRANCH_CALC = {execute_BranchPlugin_branchAdder[31 : 1],1'b0}; + assign execute_BRANCH_DO = ((execute_PREDICTION_HAD_BRANCHED2 != execute_BRANCH_COND_RESULT) || execute_BranchPlugin_missAlignedTarget); + assign execute_PC = decode_to_execute_PC; + assign execute_PREDICTION_HAD_BRANCHED2 = decode_to_execute_PREDICTION_HAD_BRANCHED2; + assign execute_RS1 = decode_to_execute_RS1; + assign execute_BRANCH_COND_RESULT = _zz_execute_BRANCH_COND_RESULT_1; + assign execute_BRANCH_CTRL = _zz_execute_BRANCH_CTRL; + assign decode_RS2_USE = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[15]; + assign decode_RS1_USE = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[5]; + always @(*) begin + _zz_decode_RS2 = execute_REGFILE_WRITE_DATA; + if(when_CsrPlugin_l1176) begin + _zz_decode_RS2 = CsrPlugin_csrMapping_readDataSignal; + end + end + + assign execute_REGFILE_WRITE_VALID = decode_to_execute_REGFILE_WRITE_VALID; + assign execute_BYPASSABLE_EXECUTE_STAGE = decode_to_execute_BYPASSABLE_EXECUTE_STAGE; + assign memory_REGFILE_WRITE_VALID = execute_to_memory_REGFILE_WRITE_VALID; + assign memory_INSTRUCTION = execute_to_memory_INSTRUCTION; + assign memory_BYPASSABLE_MEMORY_STAGE = execute_to_memory_BYPASSABLE_MEMORY_STAGE; + assign writeBack_REGFILE_WRITE_VALID = memory_to_writeBack_REGFILE_WRITE_VALID; + always @(*) begin + decode_RS2 = decode_RegFilePlugin_rs2Data; + if(HazardSimplePlugin_writeBackBuffer_valid) begin + if(HazardSimplePlugin_addr1Match) begin + decode_RS2 = HazardSimplePlugin_writeBackBuffer_payload_data; + end + end + if(when_HazardSimplePlugin_l45) begin + if(when_HazardSimplePlugin_l47) begin + if(when_HazardSimplePlugin_l51) begin + decode_RS2 = _zz_decode_RS2_2; + end + end + end + if(when_HazardSimplePlugin_l45_1) begin + if(memory_BYPASSABLE_MEMORY_STAGE) begin + if(when_HazardSimplePlugin_l51_1) begin + decode_RS2 = _zz_decode_RS2_1; + end + end + end + if(when_HazardSimplePlugin_l45_2) begin + if(execute_BYPASSABLE_EXECUTE_STAGE) begin + if(when_HazardSimplePlugin_l51_2) begin + decode_RS2 = _zz_decode_RS2; + end + end + end + end + + always @(*) begin + decode_RS1 = decode_RegFilePlugin_rs1Data; + if(HazardSimplePlugin_writeBackBuffer_valid) begin + if(HazardSimplePlugin_addr0Match) begin + decode_RS1 = HazardSimplePlugin_writeBackBuffer_payload_data; + end + end + if(when_HazardSimplePlugin_l45) begin + if(when_HazardSimplePlugin_l47) begin + if(when_HazardSimplePlugin_l48) begin + decode_RS1 = _zz_decode_RS2_2; + end + end + end + if(when_HazardSimplePlugin_l45_1) begin + if(memory_BYPASSABLE_MEMORY_STAGE) begin + if(when_HazardSimplePlugin_l48_1) begin + decode_RS1 = _zz_decode_RS2_1; + end + end + end + if(when_HazardSimplePlugin_l45_2) begin + if(execute_BYPASSABLE_EXECUTE_STAGE) begin + if(when_HazardSimplePlugin_l48_2) begin + decode_RS1 = _zz_decode_RS2; + end + end + end + end + + assign memory_SHIFT_RIGHT = execute_to_memory_SHIFT_RIGHT; + always @(*) begin + _zz_decode_RS2_1 = memory_REGFILE_WRITE_DATA; + if(memory_arbitration_isValid) begin + case(memory_SHIFT_CTRL) + `ShiftCtrlEnum_binary_sequential_SLL_1 : begin + _zz_decode_RS2_1 = _zz_decode_RS2_3; + end + `ShiftCtrlEnum_binary_sequential_SRL_1, `ShiftCtrlEnum_binary_sequential_SRA_1 : begin + _zz_decode_RS2_1 = memory_SHIFT_RIGHT; + end + default : begin + end + endcase + end + if(when_MulDivIterativePlugin_l128) begin + _zz_decode_RS2_1 = memory_DivPlugin_div_result; + end + if(memory_CfuPlugin_CFU_IN_FLIGHT) begin + _zz_decode_RS2_1 = CfuPlugin_bus_rsp_rsp_payload_outputs_0; + end + end + + assign memory_SHIFT_CTRL = _zz_memory_SHIFT_CTRL; + assign execute_SHIFT_CTRL = _zz_execute_SHIFT_CTRL; + assign execute_SRC_LESS_UNSIGNED = decode_to_execute_SRC_LESS_UNSIGNED; + assign execute_SRC2_FORCE_ZERO = decode_to_execute_SRC2_FORCE_ZERO; + assign execute_SRC_USE_SUB_LESS = decode_to_execute_SRC_USE_SUB_LESS; + assign _zz_execute_SRC2 = execute_PC; + assign execute_SRC2_CTRL = _zz_execute_SRC2_CTRL; + assign execute_SRC1_CTRL = _zz_execute_SRC1_CTRL; + assign decode_SRC_USE_SUB_LESS = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[3]; + assign decode_SRC_ADD_ZERO = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[20]; + assign execute_SRC_ADD_SUB = execute_SrcPlugin_addSub; + assign execute_SRC_LESS = execute_SrcPlugin_less; + assign execute_ALU_CTRL = _zz_execute_ALU_CTRL; + assign execute_SRC2 = _zz_execute_SRC2_5; + assign execute_SRC1 = _zz_execute_SRC1; + assign execute_ALU_BITWISE_CTRL = _zz_execute_ALU_BITWISE_CTRL; + assign _zz_lastStageRegFileWrite_payload_address = writeBack_INSTRUCTION; + assign _zz_lastStageRegFileWrite_valid = writeBack_REGFILE_WRITE_VALID; + always @(*) begin + _zz_1 = 1'b0; + if(lastStageRegFileWrite_valid) begin + _zz_1 = 1'b1; + end + end + + assign decode_INSTRUCTION_ANTICIPATED = (decode_arbitration_isStuck ? decode_INSTRUCTION : IBusCachedPlugin_cache_io_cpu_fetch_data); + always @(*) begin + decode_REGFILE_WRITE_VALID = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[10]; + if(when_RegFilePlugin_l63) begin + decode_REGFILE_WRITE_VALID = 1'b0; + end + end + + assign decode_LEGAL_INSTRUCTION = ({((decode_INSTRUCTION & 32'h0000005f) == 32'h00000017),{((decode_INSTRUCTION & 32'h0000007f) == 32'h0000006f),{((decode_INSTRUCTION & 32'h0000007f) == 32'h0000000b),{((decode_INSTRUCTION & _zz_decode_LEGAL_INSTRUCTION) == 32'h00000003),{(_zz_decode_LEGAL_INSTRUCTION_1 == _zz_decode_LEGAL_INSTRUCTION_2),{_zz_decode_LEGAL_INSTRUCTION_3,{_zz_decode_LEGAL_INSTRUCTION_4,_zz_decode_LEGAL_INSTRUCTION_5}}}}}}} != 22'h0); + always @(*) begin + _zz_decode_RS2_2 = writeBack_REGFILE_WRITE_DATA; + if(when_DBusCachedPlugin_l484) begin + _zz_decode_RS2_2 = writeBack_DBusCachedPlugin_rspFormated; + end + if(when_MulPlugin_l147) begin + case(switch_MulPlugin_l148) + 2'b00 : begin + _zz_decode_RS2_2 = _zz__zz_decode_RS2_2; + end + default : begin + _zz_decode_RS2_2 = _zz__zz_decode_RS2_2_1; + end + endcase + end + end + + assign writeBack_MEMORY_WR = memory_to_writeBack_MEMORY_WR; + assign writeBack_MEMORY_STORE_DATA_RF = memory_to_writeBack_MEMORY_STORE_DATA_RF; + assign writeBack_REGFILE_WRITE_DATA = memory_to_writeBack_REGFILE_WRITE_DATA; + assign writeBack_MEMORY_ENABLE = memory_to_writeBack_MEMORY_ENABLE; + assign memory_REGFILE_WRITE_DATA = execute_to_memory_REGFILE_WRITE_DATA; + assign memory_MEMORY_ENABLE = execute_to_memory_MEMORY_ENABLE; + assign execute_MEMORY_FORCE_CONSTISTENCY = decode_to_execute_MEMORY_FORCE_CONSTISTENCY; + assign execute_MEMORY_MANAGMENT = decode_to_execute_MEMORY_MANAGMENT; + assign execute_RS2 = decode_to_execute_RS2; + assign execute_MEMORY_WR = decode_to_execute_MEMORY_WR; + assign execute_SRC_ADD = execute_SrcPlugin_addSub; + assign execute_MEMORY_ENABLE = decode_to_execute_MEMORY_ENABLE; + assign execute_INSTRUCTION = decode_to_execute_INSTRUCTION; + assign decode_MEMORY_ENABLE = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[4]; + assign decode_FLUSH_ALL = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[0]; + always @(*) begin + IBusCachedPlugin_rsp_issueDetected_4 = IBusCachedPlugin_rsp_issueDetected_3; + if(when_IBusCachedPlugin_l256) begin + IBusCachedPlugin_rsp_issueDetected_4 = 1'b1; + end + end + + always @(*) begin + IBusCachedPlugin_rsp_issueDetected_3 = IBusCachedPlugin_rsp_issueDetected_2; + if(when_IBusCachedPlugin_l250) begin + IBusCachedPlugin_rsp_issueDetected_3 = 1'b1; + end + end + + always @(*) begin + IBusCachedPlugin_rsp_issueDetected_2 = IBusCachedPlugin_rsp_issueDetected_1; + if(when_IBusCachedPlugin_l244) begin + IBusCachedPlugin_rsp_issueDetected_2 = 1'b1; + end + end + + always @(*) begin + IBusCachedPlugin_rsp_issueDetected_1 = IBusCachedPlugin_rsp_issueDetected; + if(when_IBusCachedPlugin_l239) begin + IBusCachedPlugin_rsp_issueDetected_1 = 1'b1; + end + end + + assign decode_BRANCH_CTRL = _zz_decode_BRANCH_CTRL_1; + assign decode_INSTRUCTION = IBusCachedPlugin_iBusRsp_output_payload_rsp_inst; + always @(*) begin + _zz_execute_to_memory_FORMAL_PC_NEXT = execute_FORMAL_PC_NEXT; + if(BranchPlugin_jumpInterface_valid) begin + _zz_execute_to_memory_FORMAL_PC_NEXT = BranchPlugin_jumpInterface_payload; + end + end + + always @(*) begin + _zz_decode_to_execute_FORMAL_PC_NEXT = decode_FORMAL_PC_NEXT; + if(IBusCachedPlugin_predictionJumpInterface_valid) begin + _zz_decode_to_execute_FORMAL_PC_NEXT = IBusCachedPlugin_predictionJumpInterface_payload; + end + end + + assign decode_PC = IBusCachedPlugin_iBusRsp_output_payload_pc; + assign writeBack_PC = memory_to_writeBack_PC; + assign writeBack_INSTRUCTION = memory_to_writeBack_INSTRUCTION; + always @(*) begin + decode_arbitration_haltItself = 1'b0; + if(when_DBusCachedPlugin_l303) begin + decode_arbitration_haltItself = 1'b1; + end + case(switch_Fetcher_l362) + 3'b010 : begin + decode_arbitration_haltItself = 1'b1; + end + default : begin + end + endcase + end + + always @(*) begin + decode_arbitration_haltByOther = 1'b0; + if(when_HazardSimplePlugin_l113) begin + decode_arbitration_haltByOther = 1'b1; + end + if(CsrPlugin_pipelineLiberator_active) begin + decode_arbitration_haltByOther = 1'b1; + end + if(when_CsrPlugin_l1116) begin + decode_arbitration_haltByOther = 1'b1; + end + end + + always @(*) begin + decode_arbitration_removeIt = 1'b0; + if(_zz_when) begin + decode_arbitration_removeIt = 1'b1; + end + if(decode_arbitration_isFlushed) begin + decode_arbitration_removeIt = 1'b1; + end + end + + assign decode_arbitration_flushIt = 1'b0; + always @(*) begin + decode_arbitration_flushNext = 1'b0; + if(IBusCachedPlugin_predictionJumpInterface_valid) begin + decode_arbitration_flushNext = 1'b1; + end + if(_zz_when) begin + decode_arbitration_flushNext = 1'b1; + end + end + + always @(*) begin + execute_arbitration_haltItself = 1'b0; + if(when_DBusCachedPlugin_l343) begin + execute_arbitration_haltItself = 1'b1; + end + if(when_CsrPlugin_l1108) begin + if(when_CsrPlugin_l1110) begin + execute_arbitration_haltItself = 1'b1; + end + end + if(when_CsrPlugin_l1180) begin + if(execute_CsrPlugin_blockedBySideEffects) begin + execute_arbitration_haltItself = 1'b1; + end + end + if(when_CfuPlugin_l175) begin + execute_arbitration_haltItself = 1'b1; + end + end + + always @(*) begin + execute_arbitration_haltByOther = 1'b0; + if(when_DBusCachedPlugin_l359) begin + execute_arbitration_haltByOther = 1'b1; + end + if(when_DebugPlugin_l284) begin + execute_arbitration_haltByOther = 1'b1; + end + end + + always @(*) begin + execute_arbitration_removeIt = 1'b0; + if(_zz_when_1) begin + execute_arbitration_removeIt = 1'b1; + end + if(execute_arbitration_isFlushed) begin + execute_arbitration_removeIt = 1'b1; + end + end + + always @(*) begin + execute_arbitration_flushIt = 1'b0; + if(when_DebugPlugin_l284) begin + if(when_DebugPlugin_l287) begin + execute_arbitration_flushIt = 1'b1; + end + end + end + + always @(*) begin + execute_arbitration_flushNext = 1'b0; + if(BranchPlugin_jumpInterface_valid) begin + execute_arbitration_flushNext = 1'b1; + end + if(_zz_when_1) begin + execute_arbitration_flushNext = 1'b1; + end + if(when_DebugPlugin_l284) begin + if(when_DebugPlugin_l287) begin + execute_arbitration_flushNext = 1'b1; + end + end + end + + always @(*) begin + memory_arbitration_haltItself = 1'b0; + if(when_MulDivIterativePlugin_l128) begin + if(when_MulDivIterativePlugin_l129) begin + memory_arbitration_haltItself = 1'b1; + end + end + if(memory_CfuPlugin_CFU_IN_FLIGHT) begin + if(when_CfuPlugin_l208) begin + memory_arbitration_haltItself = 1'b1; + end + end + end + + assign memory_arbitration_haltByOther = 1'b0; + always @(*) begin + memory_arbitration_removeIt = 1'b0; + if(memory_arbitration_isFlushed) begin + memory_arbitration_removeIt = 1'b1; + end + end + + assign memory_arbitration_flushIt = 1'b0; + assign memory_arbitration_flushNext = 1'b0; + always @(*) begin + writeBack_arbitration_haltItself = 1'b0; + if(when_DBusCachedPlugin_l458) begin + writeBack_arbitration_haltItself = 1'b1; + end + end + + assign writeBack_arbitration_haltByOther = 1'b0; + always @(*) begin + writeBack_arbitration_removeIt = 1'b0; + if(DBusCachedPlugin_exceptionBus_valid) begin + writeBack_arbitration_removeIt = 1'b1; + end + if(writeBack_arbitration_isFlushed) begin + writeBack_arbitration_removeIt = 1'b1; + end + end + + always @(*) begin + writeBack_arbitration_flushIt = 1'b0; + if(DBusCachedPlugin_redoBranch_valid) begin + writeBack_arbitration_flushIt = 1'b1; + end + end + + always @(*) begin + writeBack_arbitration_flushNext = 1'b0; + if(DBusCachedPlugin_redoBranch_valid) begin + writeBack_arbitration_flushNext = 1'b1; + end + if(DBusCachedPlugin_exceptionBus_valid) begin + writeBack_arbitration_flushNext = 1'b1; + end + if(when_CsrPlugin_l1019) begin + writeBack_arbitration_flushNext = 1'b1; + end + if(when_CsrPlugin_l1064) begin + writeBack_arbitration_flushNext = 1'b1; + end + end + + assign lastStageInstruction = writeBack_INSTRUCTION; + assign lastStagePc = writeBack_PC; + assign lastStageIsValid = writeBack_arbitration_isValid; + assign lastStageIsFiring = writeBack_arbitration_isFiring; + always @(*) begin + IBusCachedPlugin_fetcherHalt = 1'b0; + if(when_CsrPlugin_l922) begin + IBusCachedPlugin_fetcherHalt = 1'b1; + end + if(when_CsrPlugin_l1019) begin + IBusCachedPlugin_fetcherHalt = 1'b1; + end + if(when_CsrPlugin_l1064) begin + IBusCachedPlugin_fetcherHalt = 1'b1; + end + if(when_DebugPlugin_l284) begin + if(when_DebugPlugin_l287) begin + IBusCachedPlugin_fetcherHalt = 1'b1; + end + end + if(DebugPlugin_haltIt) begin + IBusCachedPlugin_fetcherHalt = 1'b1; + end + if(when_DebugPlugin_l300) begin + IBusCachedPlugin_fetcherHalt = 1'b1; + end + end + + always @(*) begin + IBusCachedPlugin_incomingInstruction = 1'b0; + if(when_Fetcher_l240) begin + IBusCachedPlugin_incomingInstruction = 1'b1; + end + end + + always @(*) begin + _zz_when_DBusCachedPlugin_l386 = 1'b0; + if(DebugPlugin_godmode) begin + _zz_when_DBusCachedPlugin_l386 = 1'b1; + end + end + + assign CsrPlugin_csrMapping_allowCsrSignal = 1'b0; + assign CsrPlugin_csrMapping_readDataSignal = CsrPlugin_csrMapping_readDataInit; + always @(*) begin + CsrPlugin_inWfi = 1'b0; + if(when_CsrPlugin_l1108) begin + CsrPlugin_inWfi = 1'b1; + end + end + + always @(*) begin + CsrPlugin_thirdPartyWake = 1'b0; + if(DebugPlugin_haltIt) begin + CsrPlugin_thirdPartyWake = 1'b1; + end + end + + always @(*) begin + CsrPlugin_jumpInterface_valid = 1'b0; + if(when_CsrPlugin_l1019) begin + CsrPlugin_jumpInterface_valid = 1'b1; + end + if(when_CsrPlugin_l1064) begin + CsrPlugin_jumpInterface_valid = 1'b1; + end + end + + always @(*) begin + CsrPlugin_jumpInterface_payload = 32'bxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx; + if(when_CsrPlugin_l1019) begin + CsrPlugin_jumpInterface_payload = {CsrPlugin_xtvec_base,2'b00}; + end + if(when_CsrPlugin_l1064) begin + case(switch_CsrPlugin_l1068) + 2'b11 : begin + CsrPlugin_jumpInterface_payload = CsrPlugin_mepc; + end + default : begin + end + endcase + end + end + + always @(*) begin + CsrPlugin_forceMachineWire = 1'b0; + if(DebugPlugin_godmode) begin + CsrPlugin_forceMachineWire = 1'b1; + end + end + + always @(*) begin + CsrPlugin_allowInterrupts = 1'b1; + if(when_DebugPlugin_l316) begin + CsrPlugin_allowInterrupts = 1'b0; + end + end + + always @(*) begin + CsrPlugin_allowException = 1'b1; + if(DebugPlugin_godmode) begin + CsrPlugin_allowException = 1'b0; + end + end + + always @(*) begin + CsrPlugin_allowEbreakException = 1'b1; + if(DebugPlugin_allowEBreak) begin + CsrPlugin_allowEbreakException = 1'b0; + end + end + + assign IBusCachedPlugin_externalFlush = ({writeBack_arbitration_flushNext,{memory_arbitration_flushNext,{execute_arbitration_flushNext,decode_arbitration_flushNext}}} != 4'b0000); + assign IBusCachedPlugin_jump_pcLoad_valid = ({CsrPlugin_jumpInterface_valid,{BranchPlugin_jumpInterface_valid,{DBusCachedPlugin_redoBranch_valid,IBusCachedPlugin_predictionJumpInterface_valid}}} != 4'b0000); + assign _zz_IBusCachedPlugin_jump_pcLoad_payload = {IBusCachedPlugin_predictionJumpInterface_valid,{BranchPlugin_jumpInterface_valid,{CsrPlugin_jumpInterface_valid,DBusCachedPlugin_redoBranch_valid}}}; + assign _zz_IBusCachedPlugin_jump_pcLoad_payload_1 = (_zz_IBusCachedPlugin_jump_pcLoad_payload & (~ _zz__zz_IBusCachedPlugin_jump_pcLoad_payload_1)); + assign _zz_IBusCachedPlugin_jump_pcLoad_payload_2 = _zz_IBusCachedPlugin_jump_pcLoad_payload_1[3]; + assign _zz_IBusCachedPlugin_jump_pcLoad_payload_3 = (_zz_IBusCachedPlugin_jump_pcLoad_payload_1[1] || _zz_IBusCachedPlugin_jump_pcLoad_payload_2); + assign _zz_IBusCachedPlugin_jump_pcLoad_payload_4 = (_zz_IBusCachedPlugin_jump_pcLoad_payload_1[2] || _zz_IBusCachedPlugin_jump_pcLoad_payload_2); + assign IBusCachedPlugin_jump_pcLoad_payload = _zz_IBusCachedPlugin_jump_pcLoad_payload_5; + always @(*) begin + IBusCachedPlugin_fetchPc_correction = 1'b0; + if(IBusCachedPlugin_fetchPc_redo_valid) begin + IBusCachedPlugin_fetchPc_correction = 1'b1; + end + if(IBusCachedPlugin_jump_pcLoad_valid) begin + IBusCachedPlugin_fetchPc_correction = 1'b1; + end + end + + assign IBusCachedPlugin_fetchPc_output_fire = (IBusCachedPlugin_fetchPc_output_valid && IBusCachedPlugin_fetchPc_output_ready); + assign IBusCachedPlugin_fetchPc_corrected = (IBusCachedPlugin_fetchPc_correction || IBusCachedPlugin_fetchPc_correctionReg); + always @(*) begin + IBusCachedPlugin_fetchPc_pcRegPropagate = 1'b0; + if(IBusCachedPlugin_iBusRsp_stages_1_input_ready) begin + IBusCachedPlugin_fetchPc_pcRegPropagate = 1'b1; + end + end + + assign when_Fetcher_l131 = (IBusCachedPlugin_fetchPc_correction || IBusCachedPlugin_fetchPc_pcRegPropagate); + assign IBusCachedPlugin_fetchPc_output_fire_1 = (IBusCachedPlugin_fetchPc_output_valid && IBusCachedPlugin_fetchPc_output_ready); + assign when_Fetcher_l131_1 = ((! IBusCachedPlugin_fetchPc_output_valid) && IBusCachedPlugin_fetchPc_output_ready); + always @(*) begin + IBusCachedPlugin_fetchPc_pc = (IBusCachedPlugin_fetchPc_pcReg + _zz_IBusCachedPlugin_fetchPc_pc); + if(IBusCachedPlugin_fetchPc_redo_valid) begin + IBusCachedPlugin_fetchPc_pc = IBusCachedPlugin_fetchPc_redo_payload; + end + if(IBusCachedPlugin_jump_pcLoad_valid) begin + IBusCachedPlugin_fetchPc_pc = IBusCachedPlugin_jump_pcLoad_payload; + end + IBusCachedPlugin_fetchPc_pc[0] = 1'b0; + IBusCachedPlugin_fetchPc_pc[1] = 1'b0; + end + + always @(*) begin + IBusCachedPlugin_fetchPc_flushed = 1'b0; + if(IBusCachedPlugin_fetchPc_redo_valid) begin + IBusCachedPlugin_fetchPc_flushed = 1'b1; + end + if(IBusCachedPlugin_jump_pcLoad_valid) begin + IBusCachedPlugin_fetchPc_flushed = 1'b1; + end + end + + assign when_Fetcher_l158 = (IBusCachedPlugin_fetchPc_booted && ((IBusCachedPlugin_fetchPc_output_ready || IBusCachedPlugin_fetchPc_correction) || IBusCachedPlugin_fetchPc_pcRegPropagate)); + assign IBusCachedPlugin_fetchPc_output_valid = ((! IBusCachedPlugin_fetcherHalt) && IBusCachedPlugin_fetchPc_booted); + assign IBusCachedPlugin_fetchPc_output_payload = IBusCachedPlugin_fetchPc_pc; + always @(*) begin + IBusCachedPlugin_iBusRsp_redoFetch = 1'b0; + if(IBusCachedPlugin_rsp_redoFetch) begin + IBusCachedPlugin_iBusRsp_redoFetch = 1'b1; + end + end + + assign IBusCachedPlugin_iBusRsp_stages_0_input_valid = IBusCachedPlugin_fetchPc_output_valid; + assign IBusCachedPlugin_fetchPc_output_ready = IBusCachedPlugin_iBusRsp_stages_0_input_ready; + assign IBusCachedPlugin_iBusRsp_stages_0_input_payload = IBusCachedPlugin_fetchPc_output_payload; + always @(*) begin + IBusCachedPlugin_iBusRsp_stages_0_halt = 1'b0; + if(IBusCachedPlugin_cache_io_cpu_prefetch_haltIt) begin + IBusCachedPlugin_iBusRsp_stages_0_halt = 1'b1; + end + end + + assign _zz_IBusCachedPlugin_iBusRsp_stages_0_input_ready = (! IBusCachedPlugin_iBusRsp_stages_0_halt); + assign IBusCachedPlugin_iBusRsp_stages_0_input_ready = (IBusCachedPlugin_iBusRsp_stages_0_output_ready && _zz_IBusCachedPlugin_iBusRsp_stages_0_input_ready); + assign IBusCachedPlugin_iBusRsp_stages_0_output_valid = (IBusCachedPlugin_iBusRsp_stages_0_input_valid && _zz_IBusCachedPlugin_iBusRsp_stages_0_input_ready); + assign IBusCachedPlugin_iBusRsp_stages_0_output_payload = IBusCachedPlugin_iBusRsp_stages_0_input_payload; + always @(*) begin + IBusCachedPlugin_iBusRsp_stages_1_halt = 1'b0; + if(IBusCachedPlugin_mmuBus_busy) begin + IBusCachedPlugin_iBusRsp_stages_1_halt = 1'b1; + end + end + + assign _zz_IBusCachedPlugin_iBusRsp_stages_1_input_ready = (! IBusCachedPlugin_iBusRsp_stages_1_halt); + assign IBusCachedPlugin_iBusRsp_stages_1_input_ready = (IBusCachedPlugin_iBusRsp_stages_1_output_ready && _zz_IBusCachedPlugin_iBusRsp_stages_1_input_ready); + assign IBusCachedPlugin_iBusRsp_stages_1_output_valid = (IBusCachedPlugin_iBusRsp_stages_1_input_valid && _zz_IBusCachedPlugin_iBusRsp_stages_1_input_ready); + assign IBusCachedPlugin_iBusRsp_stages_1_output_payload = IBusCachedPlugin_iBusRsp_stages_1_input_payload; + always @(*) begin + IBusCachedPlugin_iBusRsp_stages_2_halt = 1'b0; + if(when_IBusCachedPlugin_l267) begin + IBusCachedPlugin_iBusRsp_stages_2_halt = 1'b1; + end + end + + assign _zz_IBusCachedPlugin_iBusRsp_stages_2_input_ready = (! IBusCachedPlugin_iBusRsp_stages_2_halt); + assign IBusCachedPlugin_iBusRsp_stages_2_input_ready = (IBusCachedPlugin_iBusRsp_stages_2_output_ready && _zz_IBusCachedPlugin_iBusRsp_stages_2_input_ready); + assign IBusCachedPlugin_iBusRsp_stages_2_output_valid = (IBusCachedPlugin_iBusRsp_stages_2_input_valid && _zz_IBusCachedPlugin_iBusRsp_stages_2_input_ready); + assign IBusCachedPlugin_iBusRsp_stages_2_output_payload = IBusCachedPlugin_iBusRsp_stages_2_input_payload; + assign IBusCachedPlugin_fetchPc_redo_valid = IBusCachedPlugin_iBusRsp_redoFetch; + assign IBusCachedPlugin_fetchPc_redo_payload = IBusCachedPlugin_iBusRsp_stages_2_input_payload; + assign IBusCachedPlugin_iBusRsp_flush = ((decode_arbitration_removeIt || (decode_arbitration_flushNext && (! decode_arbitration_isStuck))) || IBusCachedPlugin_iBusRsp_redoFetch); + assign IBusCachedPlugin_iBusRsp_stages_0_output_ready = _zz_IBusCachedPlugin_iBusRsp_stages_0_output_ready; + assign _zz_IBusCachedPlugin_iBusRsp_stages_0_output_ready = ((1'b0 && (! _zz_IBusCachedPlugin_iBusRsp_stages_0_output_ready_1)) || IBusCachedPlugin_iBusRsp_stages_1_input_ready); + assign _zz_IBusCachedPlugin_iBusRsp_stages_0_output_ready_1 = _zz_IBusCachedPlugin_iBusRsp_stages_0_output_ready_2; + assign IBusCachedPlugin_iBusRsp_stages_1_input_valid = _zz_IBusCachedPlugin_iBusRsp_stages_0_output_ready_1; + assign IBusCachedPlugin_iBusRsp_stages_1_input_payload = IBusCachedPlugin_fetchPc_pcReg; + assign IBusCachedPlugin_iBusRsp_stages_1_output_ready = ((1'b0 && (! IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_valid)) || IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_ready); + assign IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_valid = _zz_IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_valid; + assign IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_payload = _zz_IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_payload; + assign IBusCachedPlugin_iBusRsp_stages_2_input_valid = IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_valid; + assign IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_ready = IBusCachedPlugin_iBusRsp_stages_2_input_ready; + assign IBusCachedPlugin_iBusRsp_stages_2_input_payload = IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_payload; + always @(*) begin + IBusCachedPlugin_iBusRsp_readyForError = 1'b1; + if(when_Fetcher_l320) begin + IBusCachedPlugin_iBusRsp_readyForError = 1'b0; + end + end + + assign when_Fetcher_l240 = (IBusCachedPlugin_iBusRsp_stages_1_input_valid || IBusCachedPlugin_iBusRsp_stages_2_input_valid); + assign when_Fetcher_l320 = (! IBusCachedPlugin_pcValids_0); + assign when_Fetcher_l329 = (! (! IBusCachedPlugin_iBusRsp_stages_1_input_ready)); + assign when_Fetcher_l329_1 = (! (! IBusCachedPlugin_iBusRsp_stages_2_input_ready)); + assign when_Fetcher_l329_2 = (! execute_arbitration_isStuck); + assign when_Fetcher_l329_3 = (! memory_arbitration_isStuck); + assign when_Fetcher_l329_4 = (! writeBack_arbitration_isStuck); + assign IBusCachedPlugin_pcValids_0 = IBusCachedPlugin_injector_nextPcCalc_valids_1; + assign IBusCachedPlugin_pcValids_1 = IBusCachedPlugin_injector_nextPcCalc_valids_2; + assign IBusCachedPlugin_pcValids_2 = IBusCachedPlugin_injector_nextPcCalc_valids_3; + assign IBusCachedPlugin_pcValids_3 = IBusCachedPlugin_injector_nextPcCalc_valids_4; + assign IBusCachedPlugin_iBusRsp_output_ready = (! decode_arbitration_isStuck); + always @(*) begin + decode_arbitration_isValid = IBusCachedPlugin_iBusRsp_output_valid; + case(switch_Fetcher_l362) + 3'b010 : begin + decode_arbitration_isValid = 1'b1; + end + 3'b011 : begin + decode_arbitration_isValid = 1'b1; + end + default : begin + end + endcase + end + + assign _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch = _zz__zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch[11]; + always @(*) begin + _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_1[18] = _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch; + _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_1[17] = _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch; + _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_1[16] = _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch; + _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_1[15] = _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch; + _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_1[14] = _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch; + _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_1[13] = _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch; + _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_1[12] = _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch; + _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_1[11] = _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch; + _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_1[10] = _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch; + _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_1[9] = _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch; + _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_1[8] = _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch; + _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_1[7] = _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch; + _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_1[6] = _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch; + _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_1[5] = _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch; + _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_1[4] = _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch; + _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_1[3] = _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch; + _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_1[2] = _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch; + _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_1[1] = _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch; + _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_1[0] = _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch; + end + + always @(*) begin + IBusCachedPlugin_decodePrediction_cmd_hadBranch = ((decode_BRANCH_CTRL == `BranchCtrlEnum_binary_sequential_JAL) || ((decode_BRANCH_CTRL == `BranchCtrlEnum_binary_sequential_B) && _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_2[31])); + if(_zz_6) begin + IBusCachedPlugin_decodePrediction_cmd_hadBranch = 1'b0; + end + end + + assign _zz_2 = _zz__zz_2[19]; + always @(*) begin + _zz_3[10] = _zz_2; + _zz_3[9] = _zz_2; + _zz_3[8] = _zz_2; + _zz_3[7] = _zz_2; + _zz_3[6] = _zz_2; + _zz_3[5] = _zz_2; + _zz_3[4] = _zz_2; + _zz_3[3] = _zz_2; + _zz_3[2] = _zz_2; + _zz_3[1] = _zz_2; + _zz_3[0] = _zz_2; + end + + assign _zz_4 = _zz__zz_4[11]; + always @(*) begin + _zz_5[18] = _zz_4; + _zz_5[17] = _zz_4; + _zz_5[16] = _zz_4; + _zz_5[15] = _zz_4; + _zz_5[14] = _zz_4; + _zz_5[13] = _zz_4; + _zz_5[12] = _zz_4; + _zz_5[11] = _zz_4; + _zz_5[10] = _zz_4; + _zz_5[9] = _zz_4; + _zz_5[8] = _zz_4; + _zz_5[7] = _zz_4; + _zz_5[6] = _zz_4; + _zz_5[5] = _zz_4; + _zz_5[4] = _zz_4; + _zz_5[3] = _zz_4; + _zz_5[2] = _zz_4; + _zz_5[1] = _zz_4; + _zz_5[0] = _zz_4; + end + + always @(*) begin + case(decode_BRANCH_CTRL) + `BranchCtrlEnum_binary_sequential_JAL : begin + _zz_6 = _zz__zz_6[1]; + end + default : begin + _zz_6 = _zz__zz_6_1[1]; + end + endcase + end + + assign IBusCachedPlugin_predictionJumpInterface_valid = (decode_arbitration_isValid && IBusCachedPlugin_decodePrediction_cmd_hadBranch); + assign _zz_IBusCachedPlugin_predictionJumpInterface_payload = _zz__zz_IBusCachedPlugin_predictionJumpInterface_payload[19]; + always @(*) begin + _zz_IBusCachedPlugin_predictionJumpInterface_payload_1[10] = _zz_IBusCachedPlugin_predictionJumpInterface_payload; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_1[9] = _zz_IBusCachedPlugin_predictionJumpInterface_payload; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_1[8] = _zz_IBusCachedPlugin_predictionJumpInterface_payload; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_1[7] = _zz_IBusCachedPlugin_predictionJumpInterface_payload; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_1[6] = _zz_IBusCachedPlugin_predictionJumpInterface_payload; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_1[5] = _zz_IBusCachedPlugin_predictionJumpInterface_payload; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_1[4] = _zz_IBusCachedPlugin_predictionJumpInterface_payload; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_1[3] = _zz_IBusCachedPlugin_predictionJumpInterface_payload; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_1[2] = _zz_IBusCachedPlugin_predictionJumpInterface_payload; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_1[1] = _zz_IBusCachedPlugin_predictionJumpInterface_payload; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_1[0] = _zz_IBusCachedPlugin_predictionJumpInterface_payload; + end + + assign _zz_IBusCachedPlugin_predictionJumpInterface_payload_2 = _zz__zz_IBusCachedPlugin_predictionJumpInterface_payload_2[11]; + always @(*) begin + _zz_IBusCachedPlugin_predictionJumpInterface_payload_3[18] = _zz_IBusCachedPlugin_predictionJumpInterface_payload_2; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_3[17] = _zz_IBusCachedPlugin_predictionJumpInterface_payload_2; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_3[16] = _zz_IBusCachedPlugin_predictionJumpInterface_payload_2; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_3[15] = _zz_IBusCachedPlugin_predictionJumpInterface_payload_2; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_3[14] = _zz_IBusCachedPlugin_predictionJumpInterface_payload_2; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_3[13] = _zz_IBusCachedPlugin_predictionJumpInterface_payload_2; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_3[12] = _zz_IBusCachedPlugin_predictionJumpInterface_payload_2; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_3[11] = _zz_IBusCachedPlugin_predictionJumpInterface_payload_2; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_3[10] = _zz_IBusCachedPlugin_predictionJumpInterface_payload_2; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_3[9] = _zz_IBusCachedPlugin_predictionJumpInterface_payload_2; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_3[8] = _zz_IBusCachedPlugin_predictionJumpInterface_payload_2; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_3[7] = _zz_IBusCachedPlugin_predictionJumpInterface_payload_2; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_3[6] = _zz_IBusCachedPlugin_predictionJumpInterface_payload_2; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_3[5] = _zz_IBusCachedPlugin_predictionJumpInterface_payload_2; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_3[4] = _zz_IBusCachedPlugin_predictionJumpInterface_payload_2; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_3[3] = _zz_IBusCachedPlugin_predictionJumpInterface_payload_2; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_3[2] = _zz_IBusCachedPlugin_predictionJumpInterface_payload_2; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_3[1] = _zz_IBusCachedPlugin_predictionJumpInterface_payload_2; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_3[0] = _zz_IBusCachedPlugin_predictionJumpInterface_payload_2; + end + + assign IBusCachedPlugin_predictionJumpInterface_payload = (decode_PC + ((decode_BRANCH_CTRL == `BranchCtrlEnum_binary_sequential_JAL) ? {{_zz_IBusCachedPlugin_predictionJumpInterface_payload_1,{{{_zz_IBusCachedPlugin_predictionJumpInterface_payload_4,decode_INSTRUCTION[19 : 12]},decode_INSTRUCTION[20]},decode_INSTRUCTION[30 : 21]}},1'b0} : {{_zz_IBusCachedPlugin_predictionJumpInterface_payload_3,{{{_zz_IBusCachedPlugin_predictionJumpInterface_payload_5,_zz_IBusCachedPlugin_predictionJumpInterface_payload_6},decode_INSTRUCTION[30 : 25]},decode_INSTRUCTION[11 : 8]}},1'b0})); + assign iBus_cmd_valid = IBusCachedPlugin_cache_io_mem_cmd_valid; + always @(*) begin + iBus_cmd_payload_address = IBusCachedPlugin_cache_io_mem_cmd_payload_address; + iBus_cmd_payload_address = IBusCachedPlugin_cache_io_mem_cmd_payload_address; + end + + assign iBus_cmd_payload_size = IBusCachedPlugin_cache_io_mem_cmd_payload_size; + assign IBusCachedPlugin_s0_tightlyCoupledHit = 1'b0; + assign IBusCachedPlugin_cache_io_cpu_prefetch_isValid = (IBusCachedPlugin_iBusRsp_stages_0_input_valid && (! IBusCachedPlugin_s0_tightlyCoupledHit)); + assign IBusCachedPlugin_cache_io_cpu_fetch_isValid = (IBusCachedPlugin_iBusRsp_stages_1_input_valid && (! IBusCachedPlugin_s1_tightlyCoupledHit)); + assign IBusCachedPlugin_cache_io_cpu_fetch_isStuck = (! IBusCachedPlugin_iBusRsp_stages_1_input_ready); + assign IBusCachedPlugin_mmuBus_cmd_0_isValid = IBusCachedPlugin_cache_io_cpu_fetch_isValid; + assign IBusCachedPlugin_mmuBus_cmd_0_isStuck = (! IBusCachedPlugin_iBusRsp_stages_1_input_ready); + assign IBusCachedPlugin_mmuBus_cmd_0_virtualAddress = IBusCachedPlugin_iBusRsp_stages_1_input_payload; + assign IBusCachedPlugin_mmuBus_cmd_0_bypassTranslation = 1'b0; + assign IBusCachedPlugin_mmuBus_end = (IBusCachedPlugin_iBusRsp_stages_1_input_ready || IBusCachedPlugin_externalFlush); + assign IBusCachedPlugin_cache_io_cpu_decode_isValid = (IBusCachedPlugin_iBusRsp_stages_2_input_valid && (! IBusCachedPlugin_s2_tightlyCoupledHit)); + assign IBusCachedPlugin_cache_io_cpu_decode_isStuck = (! IBusCachedPlugin_iBusRsp_stages_2_input_ready); + assign IBusCachedPlugin_cache_io_cpu_decode_isUser = (CsrPlugin_privilege == 2'b00); + assign IBusCachedPlugin_rsp_iBusRspOutputHalt = 1'b0; + assign IBusCachedPlugin_rsp_issueDetected = 1'b0; + always @(*) begin + IBusCachedPlugin_rsp_redoFetch = 1'b0; + if(when_IBusCachedPlugin_l239) begin + IBusCachedPlugin_rsp_redoFetch = 1'b1; + end + if(when_IBusCachedPlugin_l250) begin + IBusCachedPlugin_rsp_redoFetch = 1'b1; + end + end + + always @(*) begin + IBusCachedPlugin_cache_io_cpu_fill_valid = (IBusCachedPlugin_rsp_redoFetch && (! IBusCachedPlugin_cache_io_cpu_decode_mmuRefilling)); + if(when_IBusCachedPlugin_l250) begin + IBusCachedPlugin_cache_io_cpu_fill_valid = 1'b1; + end + end + + always @(*) begin + IBusCachedPlugin_decodeExceptionPort_valid = 1'b0; + if(when_IBusCachedPlugin_l244) begin + IBusCachedPlugin_decodeExceptionPort_valid = IBusCachedPlugin_iBusRsp_readyForError; + end + if(when_IBusCachedPlugin_l256) begin + IBusCachedPlugin_decodeExceptionPort_valid = IBusCachedPlugin_iBusRsp_readyForError; + end + end + + always @(*) begin + IBusCachedPlugin_decodeExceptionPort_payload_code = 4'bxxxx; + if(when_IBusCachedPlugin_l244) begin + IBusCachedPlugin_decodeExceptionPort_payload_code = 4'b1100; + end + if(when_IBusCachedPlugin_l256) begin + IBusCachedPlugin_decodeExceptionPort_payload_code = 4'b0001; + end + end + + assign IBusCachedPlugin_decodeExceptionPort_payload_badAddr = {IBusCachedPlugin_iBusRsp_stages_2_input_payload[31 : 2],2'b00}; + assign when_IBusCachedPlugin_l239 = ((IBusCachedPlugin_cache_io_cpu_decode_isValid && IBusCachedPlugin_cache_io_cpu_decode_mmuRefilling) && (! IBusCachedPlugin_rsp_issueDetected)); + assign when_IBusCachedPlugin_l244 = ((IBusCachedPlugin_cache_io_cpu_decode_isValid && IBusCachedPlugin_cache_io_cpu_decode_mmuException) && (! IBusCachedPlugin_rsp_issueDetected_1)); + assign when_IBusCachedPlugin_l250 = ((IBusCachedPlugin_cache_io_cpu_decode_isValid && IBusCachedPlugin_cache_io_cpu_decode_cacheMiss) && (! IBusCachedPlugin_rsp_issueDetected_2)); + assign when_IBusCachedPlugin_l256 = ((IBusCachedPlugin_cache_io_cpu_decode_isValid && IBusCachedPlugin_cache_io_cpu_decode_error) && (! IBusCachedPlugin_rsp_issueDetected_3)); + assign when_IBusCachedPlugin_l267 = (IBusCachedPlugin_rsp_issueDetected_4 || IBusCachedPlugin_rsp_iBusRspOutputHalt); + assign IBusCachedPlugin_iBusRsp_output_valid = IBusCachedPlugin_iBusRsp_stages_2_output_valid; + assign IBusCachedPlugin_iBusRsp_stages_2_output_ready = IBusCachedPlugin_iBusRsp_output_ready; + assign IBusCachedPlugin_iBusRsp_output_payload_rsp_inst = IBusCachedPlugin_cache_io_cpu_decode_data; + assign IBusCachedPlugin_iBusRsp_output_payload_pc = IBusCachedPlugin_iBusRsp_stages_2_output_payload; + assign IBusCachedPlugin_cache_io_flush = (decode_arbitration_isValid && decode_FLUSH_ALL); + assign dataCache_1_io_mem_cmd_ready = (! dataCache_1_io_mem_cmd_rValid); + assign dataCache_1_io_mem_cmd_s2mPipe_valid = (dataCache_1_io_mem_cmd_valid || dataCache_1_io_mem_cmd_rValid); + assign dataCache_1_io_mem_cmd_s2mPipe_payload_wr = (dataCache_1_io_mem_cmd_rValid ? dataCache_1_io_mem_cmd_rData_wr : dataCache_1_io_mem_cmd_payload_wr); + assign dataCache_1_io_mem_cmd_s2mPipe_payload_uncached = (dataCache_1_io_mem_cmd_rValid ? dataCache_1_io_mem_cmd_rData_uncached : dataCache_1_io_mem_cmd_payload_uncached); + assign dataCache_1_io_mem_cmd_s2mPipe_payload_address = (dataCache_1_io_mem_cmd_rValid ? dataCache_1_io_mem_cmd_rData_address : dataCache_1_io_mem_cmd_payload_address); + assign dataCache_1_io_mem_cmd_s2mPipe_payload_data = (dataCache_1_io_mem_cmd_rValid ? dataCache_1_io_mem_cmd_rData_data : dataCache_1_io_mem_cmd_payload_data); + assign dataCache_1_io_mem_cmd_s2mPipe_payload_mask = (dataCache_1_io_mem_cmd_rValid ? dataCache_1_io_mem_cmd_rData_mask : dataCache_1_io_mem_cmd_payload_mask); + assign dataCache_1_io_mem_cmd_s2mPipe_payload_size = (dataCache_1_io_mem_cmd_rValid ? dataCache_1_io_mem_cmd_rData_size : dataCache_1_io_mem_cmd_payload_size); + assign dataCache_1_io_mem_cmd_s2mPipe_payload_last = (dataCache_1_io_mem_cmd_rValid ? dataCache_1_io_mem_cmd_rData_last : dataCache_1_io_mem_cmd_payload_last); + always @(*) begin + dataCache_1_io_mem_cmd_s2mPipe_ready = dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_ready; + if(when_Stream_l342) begin + dataCache_1_io_mem_cmd_s2mPipe_ready = 1'b1; + end + end + + assign when_Stream_l342 = (! dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_valid); + assign dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_valid = dataCache_1_io_mem_cmd_s2mPipe_rValid; + assign dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_payload_wr = dataCache_1_io_mem_cmd_s2mPipe_rData_wr; + assign dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_payload_uncached = dataCache_1_io_mem_cmd_s2mPipe_rData_uncached; + assign dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_payload_address = dataCache_1_io_mem_cmd_s2mPipe_rData_address; + assign dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_payload_data = dataCache_1_io_mem_cmd_s2mPipe_rData_data; + assign dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_payload_mask = dataCache_1_io_mem_cmd_s2mPipe_rData_mask; + assign dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_payload_size = dataCache_1_io_mem_cmd_s2mPipe_rData_size; + assign dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_payload_last = dataCache_1_io_mem_cmd_s2mPipe_rData_last; + assign dBus_cmd_valid = dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_valid; + assign dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_ready = dBus_cmd_ready; + assign dBus_cmd_payload_wr = dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_payload_wr; + assign dBus_cmd_payload_uncached = dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_payload_uncached; + assign dBus_cmd_payload_address = dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_payload_address; + assign dBus_cmd_payload_data = dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_payload_data; + assign dBus_cmd_payload_mask = dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_payload_mask; + assign dBus_cmd_payload_size = dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_payload_size; + assign dBus_cmd_payload_last = dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_payload_last; + assign when_DBusCachedPlugin_l303 = ((DBusCachedPlugin_mmuBus_busy && decode_arbitration_isValid) && decode_MEMORY_ENABLE); + assign execute_DBusCachedPlugin_size = execute_INSTRUCTION[13 : 12]; + assign dataCache_1_io_cpu_execute_isValid = (execute_arbitration_isValid && execute_MEMORY_ENABLE); + assign dataCache_1_io_cpu_execute_address = execute_SRC_ADD; + always @(*) begin + case(execute_DBusCachedPlugin_size) + 2'b00 : begin + _zz_execute_MEMORY_STORE_DATA_RF = {{{execute_RS2[7 : 0],execute_RS2[7 : 0]},execute_RS2[7 : 0]},execute_RS2[7 : 0]}; + end + 2'b01 : begin + _zz_execute_MEMORY_STORE_DATA_RF = {execute_RS2[15 : 0],execute_RS2[15 : 0]}; + end + default : begin + _zz_execute_MEMORY_STORE_DATA_RF = execute_RS2[31 : 0]; + end + endcase + end + + assign dataCache_1_io_cpu_flush_valid = (execute_arbitration_isValid && execute_MEMORY_MANAGMENT); + assign dataCache_1_io_cpu_flush_isStall = (dataCache_1_io_cpu_flush_valid && (! dataCache_1_io_cpu_flush_ready)); + assign when_DBusCachedPlugin_l343 = (dataCache_1_io_cpu_flush_isStall || dataCache_1_io_cpu_execute_haltIt); + assign when_DBusCachedPlugin_l359 = (dataCache_1_io_cpu_execute_refilling && execute_arbitration_isValid); + assign dataCache_1_io_cpu_memory_isValid = (memory_arbitration_isValid && memory_MEMORY_ENABLE); + assign dataCache_1_io_cpu_memory_address = memory_REGFILE_WRITE_DATA; + assign DBusCachedPlugin_mmuBus_cmd_0_isValid = dataCache_1_io_cpu_memory_isValid; + assign DBusCachedPlugin_mmuBus_cmd_0_isStuck = memory_arbitration_isStuck; + assign DBusCachedPlugin_mmuBus_cmd_0_virtualAddress = dataCache_1_io_cpu_memory_address; + assign DBusCachedPlugin_mmuBus_cmd_0_bypassTranslation = 1'b0; + assign DBusCachedPlugin_mmuBus_end = ((! memory_arbitration_isStuck) || memory_arbitration_removeIt); + always @(*) begin + dataCache_1_io_cpu_memory_mmuRsp_isIoAccess = DBusCachedPlugin_mmuBus_rsp_isIoAccess; + if(when_DBusCachedPlugin_l386) begin + dataCache_1_io_cpu_memory_mmuRsp_isIoAccess = 1'b1; + end + end + + assign when_DBusCachedPlugin_l386 = (_zz_when_DBusCachedPlugin_l386 && (! dataCache_1_io_cpu_memory_isWrite)); + always @(*) begin + dataCache_1_io_cpu_writeBack_isValid = (writeBack_arbitration_isValid && writeBack_MEMORY_ENABLE); + if(writeBack_arbitration_haltByOther) begin + dataCache_1_io_cpu_writeBack_isValid = 1'b0; + end + end + + assign dataCache_1_io_cpu_writeBack_isUser = (CsrPlugin_privilege == 2'b00); + assign dataCache_1_io_cpu_writeBack_address = writeBack_REGFILE_WRITE_DATA; + assign dataCache_1_io_cpu_writeBack_storeData[31 : 0] = writeBack_MEMORY_STORE_DATA_RF; + always @(*) begin + DBusCachedPlugin_redoBranch_valid = 1'b0; + if(when_DBusCachedPlugin_l438) begin + if(dataCache_1_io_cpu_redo) begin + DBusCachedPlugin_redoBranch_valid = 1'b1; + end + end + end + + assign DBusCachedPlugin_redoBranch_payload = writeBack_PC; + always @(*) begin + DBusCachedPlugin_exceptionBus_valid = 1'b0; + if(when_DBusCachedPlugin_l438) begin + if(dataCache_1_io_cpu_writeBack_accessError) begin + DBusCachedPlugin_exceptionBus_valid = 1'b1; + end + if(dataCache_1_io_cpu_writeBack_mmuException) begin + DBusCachedPlugin_exceptionBus_valid = 1'b1; + end + if(dataCache_1_io_cpu_writeBack_unalignedAccess) begin + DBusCachedPlugin_exceptionBus_valid = 1'b1; + end + if(dataCache_1_io_cpu_redo) begin + DBusCachedPlugin_exceptionBus_valid = 1'b0; + end + end + end + + assign DBusCachedPlugin_exceptionBus_payload_badAddr = writeBack_REGFILE_WRITE_DATA; + always @(*) begin + DBusCachedPlugin_exceptionBus_payload_code = 4'bxxxx; + if(when_DBusCachedPlugin_l438) begin + if(dataCache_1_io_cpu_writeBack_accessError) begin + DBusCachedPlugin_exceptionBus_payload_code = {1'd0, _zz_DBusCachedPlugin_exceptionBus_payload_code}; + end + if(dataCache_1_io_cpu_writeBack_mmuException) begin + DBusCachedPlugin_exceptionBus_payload_code = (writeBack_MEMORY_WR ? 4'b1111 : 4'b1101); + end + if(dataCache_1_io_cpu_writeBack_unalignedAccess) begin + DBusCachedPlugin_exceptionBus_payload_code = {1'd0, _zz_DBusCachedPlugin_exceptionBus_payload_code_1}; + end + end + end + + assign when_DBusCachedPlugin_l438 = (writeBack_arbitration_isValid && writeBack_MEMORY_ENABLE); + assign when_DBusCachedPlugin_l458 = (dataCache_1_io_cpu_writeBack_isValid && dataCache_1_io_cpu_writeBack_haltIt); + assign writeBack_DBusCachedPlugin_rspSplits_0 = dataCache_1_io_cpu_writeBack_data[7 : 0]; + assign writeBack_DBusCachedPlugin_rspSplits_1 = dataCache_1_io_cpu_writeBack_data[15 : 8]; + assign writeBack_DBusCachedPlugin_rspSplits_2 = dataCache_1_io_cpu_writeBack_data[23 : 16]; + assign writeBack_DBusCachedPlugin_rspSplits_3 = dataCache_1_io_cpu_writeBack_data[31 : 24]; + always @(*) begin + writeBack_DBusCachedPlugin_rspShifted[7 : 0] = _zz_writeBack_DBusCachedPlugin_rspShifted; + writeBack_DBusCachedPlugin_rspShifted[15 : 8] = _zz_writeBack_DBusCachedPlugin_rspShifted_2; + writeBack_DBusCachedPlugin_rspShifted[23 : 16] = writeBack_DBusCachedPlugin_rspSplits_2; + writeBack_DBusCachedPlugin_rspShifted[31 : 24] = writeBack_DBusCachedPlugin_rspSplits_3; + end + + assign writeBack_DBusCachedPlugin_rspRf = writeBack_DBusCachedPlugin_rspShifted[31 : 0]; + assign switch_Misc_l200 = writeBack_INSTRUCTION[13 : 12]; + assign _zz_writeBack_DBusCachedPlugin_rspFormated = (writeBack_DBusCachedPlugin_rspRf[7] && (! writeBack_INSTRUCTION[14])); + always @(*) begin + _zz_writeBack_DBusCachedPlugin_rspFormated_1[31] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[30] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[29] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[28] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[27] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[26] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[25] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[24] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[23] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[22] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[21] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[20] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[19] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[18] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[17] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[16] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[15] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[14] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[13] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[12] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[11] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[10] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[9] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[8] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[7 : 0] = writeBack_DBusCachedPlugin_rspRf[7 : 0]; + end + + assign _zz_writeBack_DBusCachedPlugin_rspFormated_2 = (writeBack_DBusCachedPlugin_rspRf[15] && (! writeBack_INSTRUCTION[14])); + always @(*) begin + _zz_writeBack_DBusCachedPlugin_rspFormated_3[31] = _zz_writeBack_DBusCachedPlugin_rspFormated_2; + _zz_writeBack_DBusCachedPlugin_rspFormated_3[30] = _zz_writeBack_DBusCachedPlugin_rspFormated_2; + _zz_writeBack_DBusCachedPlugin_rspFormated_3[29] = _zz_writeBack_DBusCachedPlugin_rspFormated_2; + _zz_writeBack_DBusCachedPlugin_rspFormated_3[28] = _zz_writeBack_DBusCachedPlugin_rspFormated_2; + _zz_writeBack_DBusCachedPlugin_rspFormated_3[27] = _zz_writeBack_DBusCachedPlugin_rspFormated_2; + _zz_writeBack_DBusCachedPlugin_rspFormated_3[26] = _zz_writeBack_DBusCachedPlugin_rspFormated_2; + _zz_writeBack_DBusCachedPlugin_rspFormated_3[25] = _zz_writeBack_DBusCachedPlugin_rspFormated_2; + _zz_writeBack_DBusCachedPlugin_rspFormated_3[24] = _zz_writeBack_DBusCachedPlugin_rspFormated_2; + _zz_writeBack_DBusCachedPlugin_rspFormated_3[23] = _zz_writeBack_DBusCachedPlugin_rspFormated_2; + _zz_writeBack_DBusCachedPlugin_rspFormated_3[22] = _zz_writeBack_DBusCachedPlugin_rspFormated_2; + _zz_writeBack_DBusCachedPlugin_rspFormated_3[21] = _zz_writeBack_DBusCachedPlugin_rspFormated_2; + _zz_writeBack_DBusCachedPlugin_rspFormated_3[20] = _zz_writeBack_DBusCachedPlugin_rspFormated_2; + _zz_writeBack_DBusCachedPlugin_rspFormated_3[19] = _zz_writeBack_DBusCachedPlugin_rspFormated_2; + _zz_writeBack_DBusCachedPlugin_rspFormated_3[18] = _zz_writeBack_DBusCachedPlugin_rspFormated_2; + _zz_writeBack_DBusCachedPlugin_rspFormated_3[17] = _zz_writeBack_DBusCachedPlugin_rspFormated_2; + _zz_writeBack_DBusCachedPlugin_rspFormated_3[16] = _zz_writeBack_DBusCachedPlugin_rspFormated_2; + _zz_writeBack_DBusCachedPlugin_rspFormated_3[15 : 0] = writeBack_DBusCachedPlugin_rspRf[15 : 0]; + end + + always @(*) begin + case(switch_Misc_l200) + 2'b00 : begin + writeBack_DBusCachedPlugin_rspFormated = _zz_writeBack_DBusCachedPlugin_rspFormated_1; + end + 2'b01 : begin + writeBack_DBusCachedPlugin_rspFormated = _zz_writeBack_DBusCachedPlugin_rspFormated_3; + end + default : begin + writeBack_DBusCachedPlugin_rspFormated = writeBack_DBusCachedPlugin_rspRf; + end + endcase + end + + assign when_DBusCachedPlugin_l484 = (writeBack_arbitration_isValid && writeBack_MEMORY_ENABLE); + assign IBusCachedPlugin_mmuBus_rsp_physicalAddress = IBusCachedPlugin_mmuBus_cmd_0_virtualAddress; + assign IBusCachedPlugin_mmuBus_rsp_allowRead = 1'b1; + assign IBusCachedPlugin_mmuBus_rsp_allowWrite = 1'b1; + assign IBusCachedPlugin_mmuBus_rsp_allowExecute = 1'b1; + assign IBusCachedPlugin_mmuBus_rsp_isIoAccess = IBusCachedPlugin_mmuBus_rsp_physicalAddress[31]; + assign IBusCachedPlugin_mmuBus_rsp_isPaging = 1'b0; + assign IBusCachedPlugin_mmuBus_rsp_exception = 1'b0; + assign IBusCachedPlugin_mmuBus_rsp_refilling = 1'b0; + assign IBusCachedPlugin_mmuBus_busy = 1'b0; + assign DBusCachedPlugin_mmuBus_rsp_physicalAddress = DBusCachedPlugin_mmuBus_cmd_0_virtualAddress; + assign DBusCachedPlugin_mmuBus_rsp_allowRead = 1'b1; + assign DBusCachedPlugin_mmuBus_rsp_allowWrite = 1'b1; + assign DBusCachedPlugin_mmuBus_rsp_allowExecute = 1'b1; + assign DBusCachedPlugin_mmuBus_rsp_isIoAccess = DBusCachedPlugin_mmuBus_rsp_physicalAddress[31]; + assign DBusCachedPlugin_mmuBus_rsp_isPaging = 1'b0; + assign DBusCachedPlugin_mmuBus_rsp_exception = 1'b0; + assign DBusCachedPlugin_mmuBus_rsp_refilling = 1'b0; + assign DBusCachedPlugin_mmuBus_busy = 1'b0; + assign _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_3 = ((decode_INSTRUCTION & 32'h00004050) == 32'h00004050); + assign _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_4 = ((decode_INSTRUCTION & 32'h00000004) == 32'h00000004); + assign _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_5 = ((decode_INSTRUCTION & 32'h00000048) == 32'h00000048); + assign _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_6 = ((decode_INSTRUCTION & 32'h0000000c) == 32'h00000008); + assign _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_7 = ((decode_INSTRUCTION & 32'h00001000) == 32'h0); + assign _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2 = {1'b0,{(_zz_decode_CfuPlugin_CFU_INPUT_2_KIND_6 != 1'b0),{((_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2 == _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_1) != 1'b0),{(_zz_decode_CfuPlugin_CFU_INPUT_2_KIND_7 != 1'b0),{(_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_2 != _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_3),{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_4,{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_5,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_7}}}}}}}; + assign _zz_decode_SRC1_CTRL_2 = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[2 : 1]; + assign _zz_decode_SRC1_CTRL_1 = _zz_decode_SRC1_CTRL_2; + assign _zz_decode_ALU_CTRL_2 = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[7 : 6]; + assign _zz_decode_ALU_CTRL_1 = _zz_decode_ALU_CTRL_2; + assign _zz_decode_SRC2_CTRL_2 = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[9 : 8]; + assign _zz_decode_SRC2_CTRL_1 = _zz_decode_SRC2_CTRL_2; + assign _zz_decode_ALU_BITWISE_CTRL_2 = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[19 : 18]; + assign _zz_decode_ALU_BITWISE_CTRL_1 = _zz_decode_ALU_BITWISE_CTRL_2; + assign _zz_decode_SHIFT_CTRL_2 = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[22 : 21]; + assign _zz_decode_SHIFT_CTRL_1 = _zz_decode_SHIFT_CTRL_2; + assign _zz_decode_BRANCH_CTRL_2 = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[24 : 23]; + assign _zz_decode_BRANCH_CTRL = _zz_decode_BRANCH_CTRL_2; + assign _zz_decode_ENV_CTRL_2 = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[27 : 26]; + assign _zz_decode_ENV_CTRL_1 = _zz_decode_ENV_CTRL_2; + assign _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_8 = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[34 : 34]; + assign _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_1 = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_8; + assign decodeExceptionPort_valid = (decode_arbitration_isValid && (! decode_LEGAL_INSTRUCTION)); + assign decodeExceptionPort_payload_code = 4'b0010; + assign decodeExceptionPort_payload_badAddr = decode_INSTRUCTION; + assign when_RegFilePlugin_l63 = (decode_INSTRUCTION[11 : 7] == 5'h0); + assign decode_RegFilePlugin_regFileReadAddress1 = decode_INSTRUCTION_ANTICIPATED[19 : 15]; + assign decode_RegFilePlugin_regFileReadAddress2 = decode_INSTRUCTION_ANTICIPATED[24 : 20]; + assign decode_RegFilePlugin_rs1Data = _zz_RegFilePlugin_regFile_port0; + assign decode_RegFilePlugin_rs2Data = _zz_RegFilePlugin_regFile_port1; + always @(*) begin + lastStageRegFileWrite_valid = (_zz_lastStageRegFileWrite_valid && writeBack_arbitration_isFiring); + if(_zz_7) begin + lastStageRegFileWrite_valid = 1'b1; + end + end + + always @(*) begin + lastStageRegFileWrite_payload_address = _zz_lastStageRegFileWrite_payload_address[11 : 7]; + if(_zz_7) begin + lastStageRegFileWrite_payload_address = 5'h0; + end + end + + always @(*) begin + lastStageRegFileWrite_payload_data = _zz_decode_RS2_2; + if(_zz_7) begin + lastStageRegFileWrite_payload_data = 32'h0; + end + end + + always @(*) begin + case(execute_ALU_BITWISE_CTRL) + `AluBitwiseCtrlEnum_binary_sequential_AND_1 : begin + execute_IntAluPlugin_bitwise = (execute_SRC1 & execute_SRC2); + end + `AluBitwiseCtrlEnum_binary_sequential_OR_1 : begin + execute_IntAluPlugin_bitwise = (execute_SRC1 | execute_SRC2); + end + default : begin + execute_IntAluPlugin_bitwise = (execute_SRC1 ^ execute_SRC2); + end + endcase + end + + always @(*) begin + case(execute_ALU_CTRL) + `AluCtrlEnum_binary_sequential_BITWISE : begin + _zz_execute_REGFILE_WRITE_DATA = execute_IntAluPlugin_bitwise; + end + `AluCtrlEnum_binary_sequential_SLT_SLTU : begin + _zz_execute_REGFILE_WRITE_DATA = {31'd0, _zz__zz_execute_REGFILE_WRITE_DATA}; + end + default : begin + _zz_execute_REGFILE_WRITE_DATA = execute_SRC_ADD_SUB; + end + endcase + end + + always @(*) begin + case(execute_SRC1_CTRL) + `Src1CtrlEnum_binary_sequential_RS : begin + _zz_execute_SRC1 = execute_RS1; + end + `Src1CtrlEnum_binary_sequential_PC_INCREMENT : begin + _zz_execute_SRC1 = {29'd0, _zz__zz_execute_SRC1}; + end + `Src1CtrlEnum_binary_sequential_IMU : begin + _zz_execute_SRC1 = {execute_INSTRUCTION[31 : 12],12'h0}; + end + default : begin + _zz_execute_SRC1 = {27'd0, _zz__zz_execute_SRC1_1}; + end + endcase + end + + assign _zz_execute_SRC2_1 = execute_INSTRUCTION[31]; + always @(*) begin + _zz_execute_SRC2_2[19] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[18] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[17] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[16] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[15] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[14] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[13] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[12] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[11] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[10] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[9] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[8] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[7] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[6] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[5] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[4] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[3] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[2] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[1] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[0] = _zz_execute_SRC2_1; + end + + assign _zz_execute_SRC2_3 = _zz__zz_execute_SRC2_3[11]; + always @(*) begin + _zz_execute_SRC2_4[19] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[18] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[17] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[16] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[15] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[14] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[13] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[12] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[11] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[10] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[9] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[8] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[7] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[6] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[5] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[4] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[3] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[2] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[1] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[0] = _zz_execute_SRC2_3; + end + + always @(*) begin + case(execute_SRC2_CTRL) + `Src2CtrlEnum_binary_sequential_RS : begin + _zz_execute_SRC2_5 = execute_RS2; + end + `Src2CtrlEnum_binary_sequential_IMI : begin + _zz_execute_SRC2_5 = {_zz_execute_SRC2_2,execute_INSTRUCTION[31 : 20]}; + end + `Src2CtrlEnum_binary_sequential_IMS : begin + _zz_execute_SRC2_5 = {_zz_execute_SRC2_4,{execute_INSTRUCTION[31 : 25],execute_INSTRUCTION[11 : 7]}}; + end + default : begin + _zz_execute_SRC2_5 = _zz_execute_SRC2; + end + endcase + end + + always @(*) begin + execute_SrcPlugin_addSub = _zz_execute_SrcPlugin_addSub; + if(execute_SRC2_FORCE_ZERO) begin + execute_SrcPlugin_addSub = execute_SRC1; + end + end + + assign execute_SrcPlugin_less = ((execute_SRC1[31] == execute_SRC2[31]) ? execute_SrcPlugin_addSub[31] : (execute_SRC_LESS_UNSIGNED ? execute_SRC2[31] : execute_SRC1[31])); + assign execute_FullBarrelShifterPlugin_amplitude = execute_SRC2[4 : 0]; + always @(*) begin + _zz_execute_FullBarrelShifterPlugin_reversed[0] = execute_SRC1[31]; + _zz_execute_FullBarrelShifterPlugin_reversed[1] = execute_SRC1[30]; + _zz_execute_FullBarrelShifterPlugin_reversed[2] = execute_SRC1[29]; + _zz_execute_FullBarrelShifterPlugin_reversed[3] = execute_SRC1[28]; + _zz_execute_FullBarrelShifterPlugin_reversed[4] = execute_SRC1[27]; + _zz_execute_FullBarrelShifterPlugin_reversed[5] = execute_SRC1[26]; + _zz_execute_FullBarrelShifterPlugin_reversed[6] = execute_SRC1[25]; + _zz_execute_FullBarrelShifterPlugin_reversed[7] = execute_SRC1[24]; + _zz_execute_FullBarrelShifterPlugin_reversed[8] = execute_SRC1[23]; + _zz_execute_FullBarrelShifterPlugin_reversed[9] = execute_SRC1[22]; + _zz_execute_FullBarrelShifterPlugin_reversed[10] = execute_SRC1[21]; + _zz_execute_FullBarrelShifterPlugin_reversed[11] = execute_SRC1[20]; + _zz_execute_FullBarrelShifterPlugin_reversed[12] = execute_SRC1[19]; + _zz_execute_FullBarrelShifterPlugin_reversed[13] = execute_SRC1[18]; + _zz_execute_FullBarrelShifterPlugin_reversed[14] = execute_SRC1[17]; + _zz_execute_FullBarrelShifterPlugin_reversed[15] = execute_SRC1[16]; + _zz_execute_FullBarrelShifterPlugin_reversed[16] = execute_SRC1[15]; + _zz_execute_FullBarrelShifterPlugin_reversed[17] = execute_SRC1[14]; + _zz_execute_FullBarrelShifterPlugin_reversed[18] = execute_SRC1[13]; + _zz_execute_FullBarrelShifterPlugin_reversed[19] = execute_SRC1[12]; + _zz_execute_FullBarrelShifterPlugin_reversed[20] = execute_SRC1[11]; + _zz_execute_FullBarrelShifterPlugin_reversed[21] = execute_SRC1[10]; + _zz_execute_FullBarrelShifterPlugin_reversed[22] = execute_SRC1[9]; + _zz_execute_FullBarrelShifterPlugin_reversed[23] = execute_SRC1[8]; + _zz_execute_FullBarrelShifterPlugin_reversed[24] = execute_SRC1[7]; + _zz_execute_FullBarrelShifterPlugin_reversed[25] = execute_SRC1[6]; + _zz_execute_FullBarrelShifterPlugin_reversed[26] = execute_SRC1[5]; + _zz_execute_FullBarrelShifterPlugin_reversed[27] = execute_SRC1[4]; + _zz_execute_FullBarrelShifterPlugin_reversed[28] = execute_SRC1[3]; + _zz_execute_FullBarrelShifterPlugin_reversed[29] = execute_SRC1[2]; + _zz_execute_FullBarrelShifterPlugin_reversed[30] = execute_SRC1[1]; + _zz_execute_FullBarrelShifterPlugin_reversed[31] = execute_SRC1[0]; + end + + assign execute_FullBarrelShifterPlugin_reversed = ((execute_SHIFT_CTRL == `ShiftCtrlEnum_binary_sequential_SLL_1) ? _zz_execute_FullBarrelShifterPlugin_reversed : execute_SRC1); + always @(*) begin + _zz_decode_RS2_3[0] = memory_SHIFT_RIGHT[31]; + _zz_decode_RS2_3[1] = memory_SHIFT_RIGHT[30]; + _zz_decode_RS2_3[2] = memory_SHIFT_RIGHT[29]; + _zz_decode_RS2_3[3] = memory_SHIFT_RIGHT[28]; + _zz_decode_RS2_3[4] = memory_SHIFT_RIGHT[27]; + _zz_decode_RS2_3[5] = memory_SHIFT_RIGHT[26]; + _zz_decode_RS2_3[6] = memory_SHIFT_RIGHT[25]; + _zz_decode_RS2_3[7] = memory_SHIFT_RIGHT[24]; + _zz_decode_RS2_3[8] = memory_SHIFT_RIGHT[23]; + _zz_decode_RS2_3[9] = memory_SHIFT_RIGHT[22]; + _zz_decode_RS2_3[10] = memory_SHIFT_RIGHT[21]; + _zz_decode_RS2_3[11] = memory_SHIFT_RIGHT[20]; + _zz_decode_RS2_3[12] = memory_SHIFT_RIGHT[19]; + _zz_decode_RS2_3[13] = memory_SHIFT_RIGHT[18]; + _zz_decode_RS2_3[14] = memory_SHIFT_RIGHT[17]; + _zz_decode_RS2_3[15] = memory_SHIFT_RIGHT[16]; + _zz_decode_RS2_3[16] = memory_SHIFT_RIGHT[15]; + _zz_decode_RS2_3[17] = memory_SHIFT_RIGHT[14]; + _zz_decode_RS2_3[18] = memory_SHIFT_RIGHT[13]; + _zz_decode_RS2_3[19] = memory_SHIFT_RIGHT[12]; + _zz_decode_RS2_3[20] = memory_SHIFT_RIGHT[11]; + _zz_decode_RS2_3[21] = memory_SHIFT_RIGHT[10]; + _zz_decode_RS2_3[22] = memory_SHIFT_RIGHT[9]; + _zz_decode_RS2_3[23] = memory_SHIFT_RIGHT[8]; + _zz_decode_RS2_3[24] = memory_SHIFT_RIGHT[7]; + _zz_decode_RS2_3[25] = memory_SHIFT_RIGHT[6]; + _zz_decode_RS2_3[26] = memory_SHIFT_RIGHT[5]; + _zz_decode_RS2_3[27] = memory_SHIFT_RIGHT[4]; + _zz_decode_RS2_3[28] = memory_SHIFT_RIGHT[3]; + _zz_decode_RS2_3[29] = memory_SHIFT_RIGHT[2]; + _zz_decode_RS2_3[30] = memory_SHIFT_RIGHT[1]; + _zz_decode_RS2_3[31] = memory_SHIFT_RIGHT[0]; + end + + always @(*) begin + HazardSimplePlugin_src0Hazard = 1'b0; + if(when_HazardSimplePlugin_l57) begin + if(when_HazardSimplePlugin_l58) begin + if(when_HazardSimplePlugin_l48) begin + HazardSimplePlugin_src0Hazard = 1'b1; + end + end + end + if(when_HazardSimplePlugin_l57_1) begin + if(when_HazardSimplePlugin_l58_1) begin + if(when_HazardSimplePlugin_l48_1) begin + HazardSimplePlugin_src0Hazard = 1'b1; + end + end + end + if(when_HazardSimplePlugin_l57_2) begin + if(when_HazardSimplePlugin_l58_2) begin + if(when_HazardSimplePlugin_l48_2) begin + HazardSimplePlugin_src0Hazard = 1'b1; + end + end + end + if(when_HazardSimplePlugin_l105) begin + HazardSimplePlugin_src0Hazard = 1'b0; + end + end + + always @(*) begin + HazardSimplePlugin_src1Hazard = 1'b0; + if(when_HazardSimplePlugin_l57) begin + if(when_HazardSimplePlugin_l58) begin + if(when_HazardSimplePlugin_l51) begin + HazardSimplePlugin_src1Hazard = 1'b1; + end + end + end + if(when_HazardSimplePlugin_l57_1) begin + if(when_HazardSimplePlugin_l58_1) begin + if(when_HazardSimplePlugin_l51_1) begin + HazardSimplePlugin_src1Hazard = 1'b1; + end + end + end + if(when_HazardSimplePlugin_l57_2) begin + if(when_HazardSimplePlugin_l58_2) begin + if(when_HazardSimplePlugin_l51_2) begin + HazardSimplePlugin_src1Hazard = 1'b1; + end + end + end + if(when_HazardSimplePlugin_l108) begin + HazardSimplePlugin_src1Hazard = 1'b0; + end + end + + assign HazardSimplePlugin_writeBackWrites_valid = (_zz_lastStageRegFileWrite_valid && writeBack_arbitration_isFiring); + assign HazardSimplePlugin_writeBackWrites_payload_address = _zz_lastStageRegFileWrite_payload_address[11 : 7]; + assign HazardSimplePlugin_writeBackWrites_payload_data = _zz_decode_RS2_2; + assign HazardSimplePlugin_addr0Match = (HazardSimplePlugin_writeBackBuffer_payload_address == decode_INSTRUCTION[19 : 15]); + assign HazardSimplePlugin_addr1Match = (HazardSimplePlugin_writeBackBuffer_payload_address == decode_INSTRUCTION[24 : 20]); + assign when_HazardSimplePlugin_l47 = 1'b1; + assign when_HazardSimplePlugin_l48 = (writeBack_INSTRUCTION[11 : 7] == decode_INSTRUCTION[19 : 15]); + assign when_HazardSimplePlugin_l51 = (writeBack_INSTRUCTION[11 : 7] == decode_INSTRUCTION[24 : 20]); + assign when_HazardSimplePlugin_l45 = (writeBack_arbitration_isValid && writeBack_REGFILE_WRITE_VALID); + assign when_HazardSimplePlugin_l57 = (writeBack_arbitration_isValid && writeBack_REGFILE_WRITE_VALID); + assign when_HazardSimplePlugin_l58 = (1'b0 || (! when_HazardSimplePlugin_l47)); + assign when_HazardSimplePlugin_l48_1 = (memory_INSTRUCTION[11 : 7] == decode_INSTRUCTION[19 : 15]); + assign when_HazardSimplePlugin_l51_1 = (memory_INSTRUCTION[11 : 7] == decode_INSTRUCTION[24 : 20]); + assign when_HazardSimplePlugin_l45_1 = (memory_arbitration_isValid && memory_REGFILE_WRITE_VALID); + assign when_HazardSimplePlugin_l57_1 = (memory_arbitration_isValid && memory_REGFILE_WRITE_VALID); + assign when_HazardSimplePlugin_l58_1 = (1'b0 || (! memory_BYPASSABLE_MEMORY_STAGE)); + assign when_HazardSimplePlugin_l48_2 = (execute_INSTRUCTION[11 : 7] == decode_INSTRUCTION[19 : 15]); + assign when_HazardSimplePlugin_l51_2 = (execute_INSTRUCTION[11 : 7] == decode_INSTRUCTION[24 : 20]); + assign when_HazardSimplePlugin_l45_2 = (execute_arbitration_isValid && execute_REGFILE_WRITE_VALID); + assign when_HazardSimplePlugin_l57_2 = (execute_arbitration_isValid && execute_REGFILE_WRITE_VALID); + assign when_HazardSimplePlugin_l58_2 = (1'b0 || (! execute_BYPASSABLE_EXECUTE_STAGE)); + assign when_HazardSimplePlugin_l105 = (! decode_RS1_USE); + assign when_HazardSimplePlugin_l108 = (! decode_RS2_USE); + assign when_HazardSimplePlugin_l113 = (decode_arbitration_isValid && (HazardSimplePlugin_src0Hazard || HazardSimplePlugin_src1Hazard)); + assign execute_BranchPlugin_eq = (execute_SRC1 == execute_SRC2); + assign switch_Misc_l200_1 = execute_INSTRUCTION[14 : 12]; + always @(*) begin + casez(switch_Misc_l200_1) + 3'b000 : begin + _zz_execute_BRANCH_COND_RESULT = execute_BranchPlugin_eq; + end + 3'b001 : begin + _zz_execute_BRANCH_COND_RESULT = (! execute_BranchPlugin_eq); + end + 3'b1?1 : begin + _zz_execute_BRANCH_COND_RESULT = (! execute_SRC_LESS); + end + default : begin + _zz_execute_BRANCH_COND_RESULT = execute_SRC_LESS; + end + endcase + end + + always @(*) begin + case(execute_BRANCH_CTRL) + `BranchCtrlEnum_binary_sequential_INC : begin + _zz_execute_BRANCH_COND_RESULT_1 = 1'b0; + end + `BranchCtrlEnum_binary_sequential_JAL : begin + _zz_execute_BRANCH_COND_RESULT_1 = 1'b1; + end + `BranchCtrlEnum_binary_sequential_JALR : begin + _zz_execute_BRANCH_COND_RESULT_1 = 1'b1; + end + default : begin + _zz_execute_BRANCH_COND_RESULT_1 = _zz_execute_BRANCH_COND_RESULT; + end + endcase + end + + assign _zz_execute_BranchPlugin_missAlignedTarget = execute_INSTRUCTION[31]; + always @(*) begin + _zz_execute_BranchPlugin_missAlignedTarget_1[19] = _zz_execute_BranchPlugin_missAlignedTarget; + _zz_execute_BranchPlugin_missAlignedTarget_1[18] = _zz_execute_BranchPlugin_missAlignedTarget; + _zz_execute_BranchPlugin_missAlignedTarget_1[17] = _zz_execute_BranchPlugin_missAlignedTarget; + _zz_execute_BranchPlugin_missAlignedTarget_1[16] = _zz_execute_BranchPlugin_missAlignedTarget; + _zz_execute_BranchPlugin_missAlignedTarget_1[15] = _zz_execute_BranchPlugin_missAlignedTarget; + _zz_execute_BranchPlugin_missAlignedTarget_1[14] = _zz_execute_BranchPlugin_missAlignedTarget; + _zz_execute_BranchPlugin_missAlignedTarget_1[13] = _zz_execute_BranchPlugin_missAlignedTarget; + _zz_execute_BranchPlugin_missAlignedTarget_1[12] = _zz_execute_BranchPlugin_missAlignedTarget; + _zz_execute_BranchPlugin_missAlignedTarget_1[11] = _zz_execute_BranchPlugin_missAlignedTarget; + _zz_execute_BranchPlugin_missAlignedTarget_1[10] = _zz_execute_BranchPlugin_missAlignedTarget; + _zz_execute_BranchPlugin_missAlignedTarget_1[9] = _zz_execute_BranchPlugin_missAlignedTarget; + _zz_execute_BranchPlugin_missAlignedTarget_1[8] = _zz_execute_BranchPlugin_missAlignedTarget; + _zz_execute_BranchPlugin_missAlignedTarget_1[7] = _zz_execute_BranchPlugin_missAlignedTarget; + _zz_execute_BranchPlugin_missAlignedTarget_1[6] = _zz_execute_BranchPlugin_missAlignedTarget; + _zz_execute_BranchPlugin_missAlignedTarget_1[5] = _zz_execute_BranchPlugin_missAlignedTarget; + _zz_execute_BranchPlugin_missAlignedTarget_1[4] = _zz_execute_BranchPlugin_missAlignedTarget; + _zz_execute_BranchPlugin_missAlignedTarget_1[3] = _zz_execute_BranchPlugin_missAlignedTarget; + _zz_execute_BranchPlugin_missAlignedTarget_1[2] = _zz_execute_BranchPlugin_missAlignedTarget; + _zz_execute_BranchPlugin_missAlignedTarget_1[1] = _zz_execute_BranchPlugin_missAlignedTarget; + _zz_execute_BranchPlugin_missAlignedTarget_1[0] = _zz_execute_BranchPlugin_missAlignedTarget; + end + + assign _zz_execute_BranchPlugin_missAlignedTarget_2 = _zz__zz_execute_BranchPlugin_missAlignedTarget_2[19]; + always @(*) begin + _zz_execute_BranchPlugin_missAlignedTarget_3[10] = _zz_execute_BranchPlugin_missAlignedTarget_2; + _zz_execute_BranchPlugin_missAlignedTarget_3[9] = _zz_execute_BranchPlugin_missAlignedTarget_2; + _zz_execute_BranchPlugin_missAlignedTarget_3[8] = _zz_execute_BranchPlugin_missAlignedTarget_2; + _zz_execute_BranchPlugin_missAlignedTarget_3[7] = _zz_execute_BranchPlugin_missAlignedTarget_2; + _zz_execute_BranchPlugin_missAlignedTarget_3[6] = _zz_execute_BranchPlugin_missAlignedTarget_2; + _zz_execute_BranchPlugin_missAlignedTarget_3[5] = _zz_execute_BranchPlugin_missAlignedTarget_2; + _zz_execute_BranchPlugin_missAlignedTarget_3[4] = _zz_execute_BranchPlugin_missAlignedTarget_2; + _zz_execute_BranchPlugin_missAlignedTarget_3[3] = _zz_execute_BranchPlugin_missAlignedTarget_2; + _zz_execute_BranchPlugin_missAlignedTarget_3[2] = _zz_execute_BranchPlugin_missAlignedTarget_2; + _zz_execute_BranchPlugin_missAlignedTarget_3[1] = _zz_execute_BranchPlugin_missAlignedTarget_2; + _zz_execute_BranchPlugin_missAlignedTarget_3[0] = _zz_execute_BranchPlugin_missAlignedTarget_2; + end + + assign _zz_execute_BranchPlugin_missAlignedTarget_4 = _zz__zz_execute_BranchPlugin_missAlignedTarget_4[11]; + always @(*) begin + _zz_execute_BranchPlugin_missAlignedTarget_5[18] = _zz_execute_BranchPlugin_missAlignedTarget_4; + _zz_execute_BranchPlugin_missAlignedTarget_5[17] = _zz_execute_BranchPlugin_missAlignedTarget_4; + _zz_execute_BranchPlugin_missAlignedTarget_5[16] = _zz_execute_BranchPlugin_missAlignedTarget_4; + _zz_execute_BranchPlugin_missAlignedTarget_5[15] = _zz_execute_BranchPlugin_missAlignedTarget_4; + _zz_execute_BranchPlugin_missAlignedTarget_5[14] = _zz_execute_BranchPlugin_missAlignedTarget_4; + _zz_execute_BranchPlugin_missAlignedTarget_5[13] = _zz_execute_BranchPlugin_missAlignedTarget_4; + _zz_execute_BranchPlugin_missAlignedTarget_5[12] = _zz_execute_BranchPlugin_missAlignedTarget_4; + _zz_execute_BranchPlugin_missAlignedTarget_5[11] = _zz_execute_BranchPlugin_missAlignedTarget_4; + _zz_execute_BranchPlugin_missAlignedTarget_5[10] = _zz_execute_BranchPlugin_missAlignedTarget_4; + _zz_execute_BranchPlugin_missAlignedTarget_5[9] = _zz_execute_BranchPlugin_missAlignedTarget_4; + _zz_execute_BranchPlugin_missAlignedTarget_5[8] = _zz_execute_BranchPlugin_missAlignedTarget_4; + _zz_execute_BranchPlugin_missAlignedTarget_5[7] = _zz_execute_BranchPlugin_missAlignedTarget_4; + _zz_execute_BranchPlugin_missAlignedTarget_5[6] = _zz_execute_BranchPlugin_missAlignedTarget_4; + _zz_execute_BranchPlugin_missAlignedTarget_5[5] = _zz_execute_BranchPlugin_missAlignedTarget_4; + _zz_execute_BranchPlugin_missAlignedTarget_5[4] = _zz_execute_BranchPlugin_missAlignedTarget_4; + _zz_execute_BranchPlugin_missAlignedTarget_5[3] = _zz_execute_BranchPlugin_missAlignedTarget_4; + _zz_execute_BranchPlugin_missAlignedTarget_5[2] = _zz_execute_BranchPlugin_missAlignedTarget_4; + _zz_execute_BranchPlugin_missAlignedTarget_5[1] = _zz_execute_BranchPlugin_missAlignedTarget_4; + _zz_execute_BranchPlugin_missAlignedTarget_5[0] = _zz_execute_BranchPlugin_missAlignedTarget_4; + end + + always @(*) begin + case(execute_BRANCH_CTRL) + `BranchCtrlEnum_binary_sequential_JALR : begin + _zz_execute_BranchPlugin_missAlignedTarget_6 = (_zz__zz_execute_BranchPlugin_missAlignedTarget_6[1] ^ execute_RS1[1]); + end + `BranchCtrlEnum_binary_sequential_JAL : begin + _zz_execute_BranchPlugin_missAlignedTarget_6 = _zz__zz_execute_BranchPlugin_missAlignedTarget_6_1[1]; + end + default : begin + _zz_execute_BranchPlugin_missAlignedTarget_6 = _zz__zz_execute_BranchPlugin_missAlignedTarget_6_2[1]; + end + endcase + end + + assign execute_BranchPlugin_missAlignedTarget = (execute_BRANCH_COND_RESULT && _zz_execute_BranchPlugin_missAlignedTarget_6); + always @(*) begin + case(execute_BRANCH_CTRL) + `BranchCtrlEnum_binary_sequential_JALR : begin + execute_BranchPlugin_branch_src1 = execute_RS1; + end + default : begin + execute_BranchPlugin_branch_src1 = execute_PC; + end + endcase + end + + assign _zz_execute_BranchPlugin_branch_src2 = execute_INSTRUCTION[31]; + always @(*) begin + _zz_execute_BranchPlugin_branch_src2_1[19] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[18] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[17] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[16] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[15] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[14] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[13] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[12] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[11] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[10] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[9] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[8] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[7] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[6] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[5] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[4] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[3] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[2] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[1] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[0] = _zz_execute_BranchPlugin_branch_src2; + end + + always @(*) begin + case(execute_BRANCH_CTRL) + `BranchCtrlEnum_binary_sequential_JALR : begin + execute_BranchPlugin_branch_src2 = {_zz_execute_BranchPlugin_branch_src2_1,execute_INSTRUCTION[31 : 20]}; + end + default : begin + execute_BranchPlugin_branch_src2 = ((execute_BRANCH_CTRL == `BranchCtrlEnum_binary_sequential_JAL) ? {{_zz_execute_BranchPlugin_branch_src2_3,{{{_zz_execute_BranchPlugin_branch_src2_6,execute_INSTRUCTION[19 : 12]},execute_INSTRUCTION[20]},execute_INSTRUCTION[30 : 21]}},1'b0} : {{_zz_execute_BranchPlugin_branch_src2_5,{{{_zz_execute_BranchPlugin_branch_src2_7,_zz_execute_BranchPlugin_branch_src2_8},execute_INSTRUCTION[30 : 25]},execute_INSTRUCTION[11 : 8]}},1'b0}); + if(execute_PREDICTION_HAD_BRANCHED2) begin + execute_BranchPlugin_branch_src2 = {29'd0, _zz_execute_BranchPlugin_branch_src2_9}; + end + end + endcase + end + + assign _zz_execute_BranchPlugin_branch_src2_2 = _zz__zz_execute_BranchPlugin_branch_src2_2[19]; + always @(*) begin + _zz_execute_BranchPlugin_branch_src2_3[10] = _zz_execute_BranchPlugin_branch_src2_2; + _zz_execute_BranchPlugin_branch_src2_3[9] = _zz_execute_BranchPlugin_branch_src2_2; + _zz_execute_BranchPlugin_branch_src2_3[8] = _zz_execute_BranchPlugin_branch_src2_2; + _zz_execute_BranchPlugin_branch_src2_3[7] = _zz_execute_BranchPlugin_branch_src2_2; + _zz_execute_BranchPlugin_branch_src2_3[6] = _zz_execute_BranchPlugin_branch_src2_2; + _zz_execute_BranchPlugin_branch_src2_3[5] = _zz_execute_BranchPlugin_branch_src2_2; + _zz_execute_BranchPlugin_branch_src2_3[4] = _zz_execute_BranchPlugin_branch_src2_2; + _zz_execute_BranchPlugin_branch_src2_3[3] = _zz_execute_BranchPlugin_branch_src2_2; + _zz_execute_BranchPlugin_branch_src2_3[2] = _zz_execute_BranchPlugin_branch_src2_2; + _zz_execute_BranchPlugin_branch_src2_3[1] = _zz_execute_BranchPlugin_branch_src2_2; + _zz_execute_BranchPlugin_branch_src2_3[0] = _zz_execute_BranchPlugin_branch_src2_2; + end + + assign _zz_execute_BranchPlugin_branch_src2_4 = _zz__zz_execute_BranchPlugin_branch_src2_4[11]; + always @(*) begin + _zz_execute_BranchPlugin_branch_src2_5[18] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[17] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[16] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[15] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[14] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[13] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[12] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[11] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[10] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[9] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[8] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[7] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[6] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[5] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[4] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[3] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[2] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[1] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[0] = _zz_execute_BranchPlugin_branch_src2_4; + end + + assign execute_BranchPlugin_branchAdder = (execute_BranchPlugin_branch_src1 + execute_BranchPlugin_branch_src2); + assign BranchPlugin_jumpInterface_valid = ((execute_arbitration_isValid && execute_BRANCH_DO) && (! 1'b0)); + assign BranchPlugin_jumpInterface_payload = execute_BRANCH_CALC; + always @(*) begin + BranchPlugin_branchExceptionPort_valid = (execute_arbitration_isValid && (execute_BRANCH_DO && execute_BRANCH_CALC[1])); + if(when_BranchPlugin_l296) begin + BranchPlugin_branchExceptionPort_valid = 1'b0; + end + end + + assign BranchPlugin_branchExceptionPort_payload_code = 4'b0000; + assign BranchPlugin_branchExceptionPort_payload_badAddr = execute_BRANCH_CALC; + assign when_BranchPlugin_l296 = 1'b0; + assign IBusCachedPlugin_decodePrediction_rsp_wasWrong = BranchPlugin_jumpInterface_valid; + always @(*) begin + CsrPlugin_privilege = 2'b11; + if(CsrPlugin_forceMachineWire) begin + CsrPlugin_privilege = 2'b11; + end + end + + assign _zz_when_CsrPlugin_l952 = (CsrPlugin_mip_MTIP && CsrPlugin_mie_MTIE); + assign _zz_when_CsrPlugin_l952_1 = (CsrPlugin_mip_MSIP && CsrPlugin_mie_MSIE); + assign _zz_when_CsrPlugin_l952_2 = (CsrPlugin_mip_MEIP && CsrPlugin_mie_MEIE); + assign CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilegeUncapped = 2'b11; + assign CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilege = ((CsrPlugin_privilege < CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilegeUncapped) ? CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilegeUncapped : CsrPlugin_privilege); + assign _zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code = {decodeExceptionPort_valid,IBusCachedPlugin_decodeExceptionPort_valid}; + assign _zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_1 = _zz__zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_1[0]; + assign _zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_2 = {CsrPlugin_selfException_valid,BranchPlugin_branchExceptionPort_valid}; + assign _zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_3 = _zz__zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_3[0]; + always @(*) begin + CsrPlugin_exceptionPortCtrl_exceptionValids_decode = CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_decode; + if(_zz_when) begin + CsrPlugin_exceptionPortCtrl_exceptionValids_decode = 1'b1; + end + if(decode_arbitration_isFlushed) begin + CsrPlugin_exceptionPortCtrl_exceptionValids_decode = 1'b0; + end + end + + always @(*) begin + CsrPlugin_exceptionPortCtrl_exceptionValids_execute = CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_execute; + if(_zz_when_1) begin + CsrPlugin_exceptionPortCtrl_exceptionValids_execute = 1'b1; + end + if(execute_arbitration_isFlushed) begin + CsrPlugin_exceptionPortCtrl_exceptionValids_execute = 1'b0; + end + end + + always @(*) begin + CsrPlugin_exceptionPortCtrl_exceptionValids_memory = CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_memory; + if(memory_arbitration_isFlushed) begin + CsrPlugin_exceptionPortCtrl_exceptionValids_memory = 1'b0; + end + end + + always @(*) begin + CsrPlugin_exceptionPortCtrl_exceptionValids_writeBack = CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_writeBack; + if(DBusCachedPlugin_exceptionBus_valid) begin + CsrPlugin_exceptionPortCtrl_exceptionValids_writeBack = 1'b1; + end + if(writeBack_arbitration_isFlushed) begin + CsrPlugin_exceptionPortCtrl_exceptionValids_writeBack = 1'b0; + end + end + + assign when_CsrPlugin_l909 = (! decode_arbitration_isStuck); + assign when_CsrPlugin_l909_1 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l909_2 = (! memory_arbitration_isStuck); + assign when_CsrPlugin_l909_3 = (! writeBack_arbitration_isStuck); + assign when_CsrPlugin_l922 = ({CsrPlugin_exceptionPortCtrl_exceptionValids_writeBack,{CsrPlugin_exceptionPortCtrl_exceptionValids_memory,{CsrPlugin_exceptionPortCtrl_exceptionValids_execute,CsrPlugin_exceptionPortCtrl_exceptionValids_decode}}} != 4'b0000); + assign CsrPlugin_exceptionPendings_0 = CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_decode; + assign CsrPlugin_exceptionPendings_1 = CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_execute; + assign CsrPlugin_exceptionPendings_2 = CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_memory; + assign CsrPlugin_exceptionPendings_3 = CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_writeBack; + assign when_CsrPlugin_l946 = (CsrPlugin_mstatus_MIE || (CsrPlugin_privilege < 2'b11)); + assign when_CsrPlugin_l952 = ((_zz_when_CsrPlugin_l952 && 1'b1) && (! 1'b0)); + assign when_CsrPlugin_l952_1 = ((_zz_when_CsrPlugin_l952_1 && 1'b1) && (! 1'b0)); + assign when_CsrPlugin_l952_2 = ((_zz_when_CsrPlugin_l952_2 && 1'b1) && (! 1'b0)); + assign CsrPlugin_exception = (CsrPlugin_exceptionPortCtrl_exceptionValids_writeBack && CsrPlugin_allowException); + assign CsrPlugin_pipelineLiberator_active = ((CsrPlugin_interrupt_valid && CsrPlugin_allowInterrupts) && decode_arbitration_isValid); + assign when_CsrPlugin_l980 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l980_1 = (! memory_arbitration_isStuck); + assign when_CsrPlugin_l980_2 = (! writeBack_arbitration_isStuck); + assign when_CsrPlugin_l985 = ((! CsrPlugin_pipelineLiberator_active) || decode_arbitration_removeIt); + always @(*) begin + CsrPlugin_pipelineLiberator_done = CsrPlugin_pipelineLiberator_pcValids_2; + if(when_CsrPlugin_l991) begin + CsrPlugin_pipelineLiberator_done = 1'b0; + end + if(CsrPlugin_hadException) begin + CsrPlugin_pipelineLiberator_done = 1'b0; + end + end + + assign when_CsrPlugin_l991 = ({CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_writeBack,{CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_memory,CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_execute}} != 3'b000); + assign CsrPlugin_interruptJump = ((CsrPlugin_interrupt_valid && CsrPlugin_pipelineLiberator_done) && CsrPlugin_allowInterrupts); + always @(*) begin + CsrPlugin_targetPrivilege = CsrPlugin_interrupt_targetPrivilege; + if(CsrPlugin_hadException) begin + CsrPlugin_targetPrivilege = CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilege; + end + end + + always @(*) begin + CsrPlugin_trapCause = CsrPlugin_interrupt_code; + if(CsrPlugin_hadException) begin + CsrPlugin_trapCause = CsrPlugin_exceptionPortCtrl_exceptionContext_code; + end + end + + always @(*) begin + CsrPlugin_xtvec_mode = 2'bxx; + case(CsrPlugin_targetPrivilege) + 2'b11 : begin + CsrPlugin_xtvec_mode = CsrPlugin_mtvec_mode; + end + default : begin + end + endcase + end + + always @(*) begin + CsrPlugin_xtvec_base = 30'bxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx; + case(CsrPlugin_targetPrivilege) + 2'b11 : begin + CsrPlugin_xtvec_base = CsrPlugin_mtvec_base; + end + default : begin + end + endcase + end + + assign when_CsrPlugin_l1019 = (CsrPlugin_hadException || CsrPlugin_interruptJump); + assign when_CsrPlugin_l1064 = (writeBack_arbitration_isValid && (writeBack_ENV_CTRL == `EnvCtrlEnum_binary_sequential_XRET)); + assign switch_CsrPlugin_l1068 = writeBack_INSTRUCTION[29 : 28]; + assign contextSwitching = CsrPlugin_jumpInterface_valid; + assign when_CsrPlugin_l1108 = (execute_arbitration_isValid && (execute_ENV_CTRL == `EnvCtrlEnum_binary_sequential_WFI)); + assign when_CsrPlugin_l1110 = (! execute_CsrPlugin_wfiWake); + assign when_CsrPlugin_l1116 = ({(writeBack_arbitration_isValid && (writeBack_ENV_CTRL == `EnvCtrlEnum_binary_sequential_XRET)),{(memory_arbitration_isValid && (memory_ENV_CTRL == `EnvCtrlEnum_binary_sequential_XRET)),(execute_arbitration_isValid && (execute_ENV_CTRL == `EnvCtrlEnum_binary_sequential_XRET))}} != 3'b000); + assign execute_CsrPlugin_blockedBySideEffects = (({writeBack_arbitration_isValid,memory_arbitration_isValid} != 2'b00) || 1'b0); + always @(*) begin + execute_CsrPlugin_illegalAccess = 1'b1; + if(execute_CsrPlugin_csr_3264) begin + if(execute_CSR_READ_OPCODE) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + end + if(execute_CsrPlugin_csr_3857) begin + if(execute_CSR_READ_OPCODE) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + end + if(execute_CsrPlugin_csr_3858) begin + if(execute_CSR_READ_OPCODE) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + end + if(execute_CsrPlugin_csr_3859) begin + if(execute_CSR_READ_OPCODE) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + end + if(execute_CsrPlugin_csr_3860) begin + if(execute_CSR_READ_OPCODE) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + end + if(execute_CsrPlugin_csr_769) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(execute_CsrPlugin_csr_768) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(execute_CsrPlugin_csr_836) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(execute_CsrPlugin_csr_772) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(execute_CsrPlugin_csr_773) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(execute_CsrPlugin_csr_833) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(execute_CsrPlugin_csr_832) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(execute_CsrPlugin_csr_834) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(execute_CsrPlugin_csr_835) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(execute_CsrPlugin_csr_2816) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(execute_CsrPlugin_csr_2944) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(execute_CsrPlugin_csr_2818) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(execute_CsrPlugin_csr_2946) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(execute_CsrPlugin_csr_3072) begin + if(execute_CSR_READ_OPCODE) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + end + if(execute_CsrPlugin_csr_3200) begin + if(execute_CSR_READ_OPCODE) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + end + if(execute_CsrPlugin_csr_3074) begin + if(execute_CSR_READ_OPCODE) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + end + if(execute_CsrPlugin_csr_3202) begin + if(execute_CSR_READ_OPCODE) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + end + if(execute_CsrPlugin_csr_3008) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(execute_CsrPlugin_csr_4032) begin + if(execute_CSR_READ_OPCODE) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + end + if(CsrPlugin_csrMapping_allowCsrSignal) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(when_CsrPlugin_l1297) begin + execute_CsrPlugin_illegalAccess = 1'b1; + end + if(when_CsrPlugin_l1302) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + end + + always @(*) begin + execute_CsrPlugin_illegalInstruction = 1'b0; + if(when_CsrPlugin_l1136) begin + if(when_CsrPlugin_l1137) begin + execute_CsrPlugin_illegalInstruction = 1'b1; + end + end + end + + always @(*) begin + CsrPlugin_selfException_valid = 1'b0; + if(when_CsrPlugin_l1129) begin + CsrPlugin_selfException_valid = 1'b1; + end + if(when_CsrPlugin_l1144) begin + CsrPlugin_selfException_valid = 1'b1; + end + end + + always @(*) begin + CsrPlugin_selfException_payload_code = 4'bxxxx; + if(when_CsrPlugin_l1129) begin + CsrPlugin_selfException_payload_code = 4'b0010; + end + if(when_CsrPlugin_l1144) begin + case(CsrPlugin_privilege) + 2'b00 : begin + CsrPlugin_selfException_payload_code = 4'b1000; + end + default : begin + CsrPlugin_selfException_payload_code = 4'b1011; + end + endcase + end + end + + assign CsrPlugin_selfException_payload_badAddr = execute_INSTRUCTION; + assign when_CsrPlugin_l1129 = (execute_CsrPlugin_illegalAccess || execute_CsrPlugin_illegalInstruction); + assign when_CsrPlugin_l1136 = (execute_arbitration_isValid && (execute_ENV_CTRL == `EnvCtrlEnum_binary_sequential_XRET)); + assign when_CsrPlugin_l1137 = (CsrPlugin_privilege < execute_INSTRUCTION[29 : 28]); + assign when_CsrPlugin_l1144 = (execute_arbitration_isValid && (execute_ENV_CTRL == `EnvCtrlEnum_binary_sequential_ECALL)); + always @(*) begin + execute_CsrPlugin_writeInstruction = ((execute_arbitration_isValid && execute_IS_CSR) && execute_CSR_WRITE_OPCODE); + if(when_CsrPlugin_l1297) begin + execute_CsrPlugin_writeInstruction = 1'b0; + end + end + + always @(*) begin + execute_CsrPlugin_readInstruction = ((execute_arbitration_isValid && execute_IS_CSR) && execute_CSR_READ_OPCODE); + if(when_CsrPlugin_l1297) begin + execute_CsrPlugin_readInstruction = 1'b0; + end + end + + assign execute_CsrPlugin_writeEnable = (execute_CsrPlugin_writeInstruction && (! execute_arbitration_isStuck)); + assign execute_CsrPlugin_readEnable = (execute_CsrPlugin_readInstruction && (! execute_arbitration_isStuck)); + assign CsrPlugin_csrMapping_hazardFree = (! execute_CsrPlugin_blockedBySideEffects); + assign execute_CsrPlugin_readToWriteData = CsrPlugin_csrMapping_readDataSignal; + assign switch_Misc_l200_2 = execute_INSTRUCTION[13]; + always @(*) begin + case(switch_Misc_l200_2) + 1'b0 : begin + _zz_CsrPlugin_csrMapping_writeDataSignal = execute_SRC1; + end + default : begin + _zz_CsrPlugin_csrMapping_writeDataSignal = (execute_INSTRUCTION[12] ? (execute_CsrPlugin_readToWriteData & (~ execute_SRC1)) : (execute_CsrPlugin_readToWriteData | execute_SRC1)); + end + endcase + end + + assign CsrPlugin_csrMapping_writeDataSignal = _zz_CsrPlugin_csrMapping_writeDataSignal; + assign when_CsrPlugin_l1176 = (execute_arbitration_isValid && execute_IS_CSR); + assign when_CsrPlugin_l1180 = (execute_arbitration_isValid && (execute_IS_CSR || 1'b0)); + assign execute_CsrPlugin_csrAddress = execute_INSTRUCTION[31 : 20]; + assign execute_MulPlugin_a = execute_RS1; + assign execute_MulPlugin_b = execute_RS2; + assign switch_MulPlugin_l87 = execute_INSTRUCTION[13 : 12]; + always @(*) begin + case(switch_MulPlugin_l87) + 2'b01 : begin + execute_MulPlugin_aSigned = 1'b1; + end + 2'b10 : begin + execute_MulPlugin_aSigned = 1'b1; + end + default : begin + execute_MulPlugin_aSigned = 1'b0; + end + endcase + end + + always @(*) begin + case(switch_MulPlugin_l87) + 2'b01 : begin + execute_MulPlugin_bSigned = 1'b1; + end + 2'b10 : begin + execute_MulPlugin_bSigned = 1'b0; + end + default : begin + execute_MulPlugin_bSigned = 1'b0; + end + endcase + end + + assign execute_MulPlugin_aULow = execute_MulPlugin_a[15 : 0]; + assign execute_MulPlugin_bULow = execute_MulPlugin_b[15 : 0]; + assign execute_MulPlugin_aSLow = {1'b0,execute_MulPlugin_a[15 : 0]}; + assign execute_MulPlugin_bSLow = {1'b0,execute_MulPlugin_b[15 : 0]}; + assign execute_MulPlugin_aHigh = {(execute_MulPlugin_aSigned && execute_MulPlugin_a[31]),execute_MulPlugin_a[31 : 16]}; + assign execute_MulPlugin_bHigh = {(execute_MulPlugin_bSigned && execute_MulPlugin_b[31]),execute_MulPlugin_b[31 : 16]}; + assign writeBack_MulPlugin_result = ($signed(_zz_writeBack_MulPlugin_result) + $signed(_zz_writeBack_MulPlugin_result_1)); + assign when_MulPlugin_l147 = (writeBack_arbitration_isValid && writeBack_IS_MUL); + assign switch_MulPlugin_l148 = writeBack_INSTRUCTION[13 : 12]; + assign memory_DivPlugin_frontendOk = 1'b1; + always @(*) begin + memory_DivPlugin_div_counter_willIncrement = 1'b0; + if(when_MulDivIterativePlugin_l128) begin + if(when_MulDivIterativePlugin_l132) begin + memory_DivPlugin_div_counter_willIncrement = 1'b1; + end + end + end + + always @(*) begin + memory_DivPlugin_div_counter_willClear = 1'b0; + if(when_MulDivIterativePlugin_l162) begin + memory_DivPlugin_div_counter_willClear = 1'b1; + end + end + + assign memory_DivPlugin_div_counter_willOverflowIfInc = (memory_DivPlugin_div_counter_value == 6'h21); + assign memory_DivPlugin_div_counter_willOverflow = (memory_DivPlugin_div_counter_willOverflowIfInc && memory_DivPlugin_div_counter_willIncrement); + always @(*) begin + if(memory_DivPlugin_div_counter_willOverflow) begin + memory_DivPlugin_div_counter_valueNext = 6'h0; + end else begin + memory_DivPlugin_div_counter_valueNext = (memory_DivPlugin_div_counter_value + _zz_memory_DivPlugin_div_counter_valueNext); + end + if(memory_DivPlugin_div_counter_willClear) begin + memory_DivPlugin_div_counter_valueNext = 6'h0; + end + end + + assign when_MulDivIterativePlugin_l126 = (memory_DivPlugin_div_counter_value == 6'h20); + assign when_MulDivIterativePlugin_l126_1 = (! memory_arbitration_isStuck); + assign when_MulDivIterativePlugin_l128 = (memory_arbitration_isValid && memory_IS_DIV); + assign when_MulDivIterativePlugin_l129 = ((! memory_DivPlugin_frontendOk) || (! memory_DivPlugin_div_done)); + assign when_MulDivIterativePlugin_l132 = (memory_DivPlugin_frontendOk && (! memory_DivPlugin_div_done)); + assign _zz_memory_DivPlugin_div_stage_0_remainderShifted = memory_DivPlugin_rs1[31 : 0]; + assign memory_DivPlugin_div_stage_0_remainderShifted = {memory_DivPlugin_accumulator[31 : 0],_zz_memory_DivPlugin_div_stage_0_remainderShifted[31]}; + assign memory_DivPlugin_div_stage_0_remainderMinusDenominator = (memory_DivPlugin_div_stage_0_remainderShifted - _zz_memory_DivPlugin_div_stage_0_remainderMinusDenominator); + assign memory_DivPlugin_div_stage_0_outRemainder = ((! memory_DivPlugin_div_stage_0_remainderMinusDenominator[32]) ? _zz_memory_DivPlugin_div_stage_0_outRemainder : _zz_memory_DivPlugin_div_stage_0_outRemainder_1); + assign memory_DivPlugin_div_stage_0_outNumerator = _zz_memory_DivPlugin_div_stage_0_outNumerator[31:0]; + assign when_MulDivIterativePlugin_l151 = (memory_DivPlugin_div_counter_value == 6'h20); + assign _zz_memory_DivPlugin_div_result = (memory_INSTRUCTION[13] ? memory_DivPlugin_accumulator[31 : 0] : memory_DivPlugin_rs1[31 : 0]); + assign when_MulDivIterativePlugin_l162 = (! memory_arbitration_isStuck); + assign _zz_memory_DivPlugin_rs2 = (execute_RS2[31] && execute_IS_RS2_SIGNED); + assign _zz_memory_DivPlugin_rs1 = (1'b0 || ((execute_IS_DIV && execute_RS1[31]) && execute_IS_RS1_SIGNED)); + always @(*) begin + _zz_memory_DivPlugin_rs1_1[32] = (execute_IS_RS1_SIGNED && execute_RS1[31]); + _zz_memory_DivPlugin_rs1_1[31 : 0] = execute_RS1; + end + + assign _zz_CsrPlugin_csrMapping_readDataInit_1 = (_zz_CsrPlugin_csrMapping_readDataInit & externalInterruptArray_regNext); + assign externalInterrupt = (_zz_CsrPlugin_csrMapping_readDataInit_1 != 32'h0); + assign when_DebugPlugin_l225 = (DebugPlugin_haltIt && (! DebugPlugin_isPipBusy)); + assign DebugPlugin_allowEBreak = (DebugPlugin_debugUsed && (! DebugPlugin_disableEbreak)); + always @(*) begin + debug_bus_cmd_ready = 1'b1; + if(debug_bus_cmd_valid) begin + case(switch_DebugPlugin_l256) + 6'h01 : begin + if(debug_bus_cmd_payload_wr) begin + debug_bus_cmd_ready = IBusCachedPlugin_injectionPort_ready; + end + end + default : begin + end + endcase + end + end + + always @(*) begin + debug_bus_rsp_data = DebugPlugin_busReadDataReg; + if(when_DebugPlugin_l244) begin + debug_bus_rsp_data[0] = DebugPlugin_resetIt; + debug_bus_rsp_data[1] = DebugPlugin_haltIt; + debug_bus_rsp_data[2] = DebugPlugin_isPipBusy; + debug_bus_rsp_data[3] = DebugPlugin_haltedByBreak; + debug_bus_rsp_data[4] = DebugPlugin_stepIt; + end + end + + assign when_DebugPlugin_l244 = (! _zz_when_DebugPlugin_l244); + always @(*) begin + IBusCachedPlugin_injectionPort_valid = 1'b0; + if(debug_bus_cmd_valid) begin + case(switch_DebugPlugin_l256) + 6'h01 : begin + if(debug_bus_cmd_payload_wr) begin + IBusCachedPlugin_injectionPort_valid = 1'b1; + end + end + default : begin + end + endcase + end + end + + assign IBusCachedPlugin_injectionPort_payload = debug_bus_cmd_payload_data; + assign switch_DebugPlugin_l256 = debug_bus_cmd_payload_address[7 : 2]; + assign when_DebugPlugin_l260 = debug_bus_cmd_payload_data[16]; + assign when_DebugPlugin_l260_1 = debug_bus_cmd_payload_data[24]; + assign when_DebugPlugin_l261 = debug_bus_cmd_payload_data[17]; + assign when_DebugPlugin_l261_1 = debug_bus_cmd_payload_data[25]; + assign when_DebugPlugin_l262 = debug_bus_cmd_payload_data[25]; + assign when_DebugPlugin_l263 = debug_bus_cmd_payload_data[25]; + assign when_DebugPlugin_l264 = debug_bus_cmd_payload_data[18]; + assign when_DebugPlugin_l264_1 = debug_bus_cmd_payload_data[26]; + assign when_DebugPlugin_l284 = (execute_arbitration_isValid && execute_DO_EBREAK); + assign when_DebugPlugin_l287 = (({writeBack_arbitration_isValid,memory_arbitration_isValid} != 2'b00) == 1'b0); + assign when_DebugPlugin_l300 = (DebugPlugin_stepIt && IBusCachedPlugin_incomingInstruction); + assign debug_resetOut = DebugPlugin_resetIt_regNext; + assign when_DebugPlugin_l316 = (DebugPlugin_haltIt || DebugPlugin_stepIt); + assign execute_CfuPlugin_schedule = (execute_arbitration_isValid && execute_CfuPlugin_CFU_ENABLE); + assign CfuPlugin_bus_cmd_fire = (CfuPlugin_bus_cmd_valid && CfuPlugin_bus_cmd_ready); + assign when_CfuPlugin_l171 = (! execute_arbitration_isStuckByOthers); + assign CfuPlugin_bus_cmd_valid = ((execute_CfuPlugin_schedule || execute_CfuPlugin_hold) && (! execute_CfuPlugin_fired)); + assign when_CfuPlugin_l175 = (CfuPlugin_bus_cmd_valid && (! CfuPlugin_bus_cmd_ready)); + assign execute_CfuPlugin_functionsIds_0 = _zz_execute_CfuPlugin_functionsIds_0; + assign CfuPlugin_bus_cmd_payload_function_id = execute_CfuPlugin_functionsIds_0; + assign CfuPlugin_bus_cmd_payload_inputs_0 = execute_RS1; + assign _zz_CfuPlugin_bus_cmd_payload_inputs_1 = execute_INSTRUCTION[31]; + always @(*) begin + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[23] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[22] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[21] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[20] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[19] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[18] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[17] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[16] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[15] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[14] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[13] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[12] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[11] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[10] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[9] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[8] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[7] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[6] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[5] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[4] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[3] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[2] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[1] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[0] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + end + + always @(*) begin + case(execute_CfuPlugin_CFU_INPUT_2_KIND) + `Input2Kind_binary_sequential_RS : begin + _zz_CfuPlugin_bus_cmd_payload_inputs_1_2 = execute_RS2; + end + default : begin + _zz_CfuPlugin_bus_cmd_payload_inputs_1_2 = {_zz_CfuPlugin_bus_cmd_payload_inputs_1_1,execute_INSTRUCTION[31 : 24]}; + end + endcase + end + + assign CfuPlugin_bus_cmd_payload_inputs_1 = _zz_CfuPlugin_bus_cmd_payload_inputs_1_2; + assign CfuPlugin_bus_rsp_ready = (! CfuPlugin_bus_rsp_rValid); + assign CfuPlugin_bus_rsp_rsp_valid = (CfuPlugin_bus_rsp_valid || CfuPlugin_bus_rsp_rValid); + assign CfuPlugin_bus_rsp_rsp_payload_outputs_0 = (CfuPlugin_bus_rsp_rValid ? CfuPlugin_bus_rsp_rData_outputs_0 : CfuPlugin_bus_rsp_payload_outputs_0); + always @(*) begin + CfuPlugin_bus_rsp_rsp_ready = 1'b0; + if(memory_CfuPlugin_CFU_IN_FLIGHT) begin + CfuPlugin_bus_rsp_rsp_ready = (! memory_arbitration_isStuckByOthers); + end + end + + assign when_CfuPlugin_l208 = (! CfuPlugin_bus_rsp_rsp_valid); + assign when_Pipeline_l124 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_1 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_2 = ((! writeBack_arbitration_isStuck) && (! CsrPlugin_exceptionPortCtrl_exceptionValids_writeBack)); + assign when_Pipeline_l124_3 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_4 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_5 = (! writeBack_arbitration_isStuck); + assign when_Pipeline_l124_6 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_7 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_8 = (! writeBack_arbitration_isStuck); + assign when_Pipeline_l124_9 = (! execute_arbitration_isStuck); + assign _zz_decode_to_execute_SRC1_CTRL_1 = decode_SRC1_CTRL; + assign _zz_decode_SRC1_CTRL = _zz_decode_SRC1_CTRL_1; + assign when_Pipeline_l124_10 = (! execute_arbitration_isStuck); + assign _zz_execute_SRC1_CTRL = decode_to_execute_SRC1_CTRL; + assign when_Pipeline_l124_11 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_12 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_13 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_14 = (! writeBack_arbitration_isStuck); + assign _zz_decode_to_execute_ALU_CTRL_1 = decode_ALU_CTRL; + assign _zz_decode_ALU_CTRL = _zz_decode_ALU_CTRL_1; + assign when_Pipeline_l124_15 = (! execute_arbitration_isStuck); + assign _zz_execute_ALU_CTRL = decode_to_execute_ALU_CTRL; + assign _zz_decode_to_execute_SRC2_CTRL_1 = decode_SRC2_CTRL; + assign _zz_decode_SRC2_CTRL = _zz_decode_SRC2_CTRL_1; + assign when_Pipeline_l124_16 = (! execute_arbitration_isStuck); + assign _zz_execute_SRC2_CTRL = decode_to_execute_SRC2_CTRL; + assign when_Pipeline_l124_17 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_18 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_19 = (! writeBack_arbitration_isStuck); + assign when_Pipeline_l124_20 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_21 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_22 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_23 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_24 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_25 = (! writeBack_arbitration_isStuck); + assign when_Pipeline_l124_26 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_27 = (! execute_arbitration_isStuck); + assign _zz_decode_to_execute_ALU_BITWISE_CTRL_1 = decode_ALU_BITWISE_CTRL; + assign _zz_decode_ALU_BITWISE_CTRL = _zz_decode_ALU_BITWISE_CTRL_1; + assign when_Pipeline_l124_28 = (! execute_arbitration_isStuck); + assign _zz_execute_ALU_BITWISE_CTRL = decode_to_execute_ALU_BITWISE_CTRL; + assign _zz_decode_to_execute_SHIFT_CTRL_1 = decode_SHIFT_CTRL; + assign _zz_execute_to_memory_SHIFT_CTRL_1 = execute_SHIFT_CTRL; + assign _zz_decode_SHIFT_CTRL = _zz_decode_SHIFT_CTRL_1; + assign when_Pipeline_l124_29 = (! execute_arbitration_isStuck); + assign _zz_execute_SHIFT_CTRL = decode_to_execute_SHIFT_CTRL; + assign when_Pipeline_l124_30 = (! memory_arbitration_isStuck); + assign _zz_memory_SHIFT_CTRL = execute_to_memory_SHIFT_CTRL; + assign _zz_decode_to_execute_BRANCH_CTRL_1 = decode_BRANCH_CTRL; + assign _zz_decode_BRANCH_CTRL_1 = _zz_decode_BRANCH_CTRL; + assign when_Pipeline_l124_31 = (! execute_arbitration_isStuck); + assign _zz_execute_BRANCH_CTRL = decode_to_execute_BRANCH_CTRL; + assign when_Pipeline_l124_32 = (! execute_arbitration_isStuck); + assign _zz_decode_to_execute_ENV_CTRL_1 = decode_ENV_CTRL; + assign _zz_execute_to_memory_ENV_CTRL_1 = execute_ENV_CTRL; + assign _zz_memory_to_writeBack_ENV_CTRL_1 = memory_ENV_CTRL; + assign _zz_decode_ENV_CTRL = _zz_decode_ENV_CTRL_1; + assign when_Pipeline_l124_33 = (! execute_arbitration_isStuck); + assign _zz_execute_ENV_CTRL = decode_to_execute_ENV_CTRL; + assign when_Pipeline_l124_34 = (! memory_arbitration_isStuck); + assign _zz_memory_ENV_CTRL = execute_to_memory_ENV_CTRL; + assign when_Pipeline_l124_35 = (! writeBack_arbitration_isStuck); + assign _zz_writeBack_ENV_CTRL = memory_to_writeBack_ENV_CTRL; + assign when_Pipeline_l124_36 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_37 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_38 = (! writeBack_arbitration_isStuck); + assign when_Pipeline_l124_39 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_40 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_41 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_42 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_43 = (! execute_arbitration_isStuck); + assign _zz_decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND_1 = decode_CfuPlugin_CFU_INPUT_2_KIND; + assign _zz_decode_CfuPlugin_CFU_INPUT_2_KIND = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_1; + assign when_Pipeline_l124_44 = (! execute_arbitration_isStuck); + assign _zz_execute_CfuPlugin_CFU_INPUT_2_KIND = decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND; + assign when_Pipeline_l124_45 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_46 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_47 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_48 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_49 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_50 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_51 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_52 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_53 = (! writeBack_arbitration_isStuck); + assign when_Pipeline_l124_54 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_55 = (! writeBack_arbitration_isStuck); + assign when_Pipeline_l124_56 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_57 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_58 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_59 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_60 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_61 = (! writeBack_arbitration_isStuck); + assign when_Pipeline_l124_62 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_63 = (! writeBack_arbitration_isStuck); + assign when_Pipeline_l124_64 = (! writeBack_arbitration_isStuck); + assign decode_arbitration_isFlushed = (({writeBack_arbitration_flushNext,{memory_arbitration_flushNext,execute_arbitration_flushNext}} != 3'b000) || ({writeBack_arbitration_flushIt,{memory_arbitration_flushIt,{execute_arbitration_flushIt,decode_arbitration_flushIt}}} != 4'b0000)); + assign execute_arbitration_isFlushed = (({writeBack_arbitration_flushNext,memory_arbitration_flushNext} != 2'b00) || ({writeBack_arbitration_flushIt,{memory_arbitration_flushIt,execute_arbitration_flushIt}} != 3'b000)); + assign memory_arbitration_isFlushed = ((writeBack_arbitration_flushNext != 1'b0) || ({writeBack_arbitration_flushIt,memory_arbitration_flushIt} != 2'b00)); + assign writeBack_arbitration_isFlushed = (1'b0 || (writeBack_arbitration_flushIt != 1'b0)); + assign decode_arbitration_isStuckByOthers = (decode_arbitration_haltByOther || (((1'b0 || execute_arbitration_isStuck) || memory_arbitration_isStuck) || writeBack_arbitration_isStuck)); + assign decode_arbitration_isStuck = (decode_arbitration_haltItself || decode_arbitration_isStuckByOthers); + assign decode_arbitration_isMoving = ((! decode_arbitration_isStuck) && (! decode_arbitration_removeIt)); + assign decode_arbitration_isFiring = ((decode_arbitration_isValid && (! decode_arbitration_isStuck)) && (! decode_arbitration_removeIt)); + assign execute_arbitration_isStuckByOthers = (execute_arbitration_haltByOther || ((1'b0 || memory_arbitration_isStuck) || writeBack_arbitration_isStuck)); + assign execute_arbitration_isStuck = (execute_arbitration_haltItself || execute_arbitration_isStuckByOthers); + assign execute_arbitration_isMoving = ((! execute_arbitration_isStuck) && (! execute_arbitration_removeIt)); + assign execute_arbitration_isFiring = ((execute_arbitration_isValid && (! execute_arbitration_isStuck)) && (! execute_arbitration_removeIt)); + assign memory_arbitration_isStuckByOthers = (memory_arbitration_haltByOther || (1'b0 || writeBack_arbitration_isStuck)); + assign memory_arbitration_isStuck = (memory_arbitration_haltItself || memory_arbitration_isStuckByOthers); + assign memory_arbitration_isMoving = ((! memory_arbitration_isStuck) && (! memory_arbitration_removeIt)); + assign memory_arbitration_isFiring = ((memory_arbitration_isValid && (! memory_arbitration_isStuck)) && (! memory_arbitration_removeIt)); + assign writeBack_arbitration_isStuckByOthers = (writeBack_arbitration_haltByOther || 1'b0); + assign writeBack_arbitration_isStuck = (writeBack_arbitration_haltItself || writeBack_arbitration_isStuckByOthers); + assign writeBack_arbitration_isMoving = ((! writeBack_arbitration_isStuck) && (! writeBack_arbitration_removeIt)); + assign writeBack_arbitration_isFiring = ((writeBack_arbitration_isValid && (! writeBack_arbitration_isStuck)) && (! writeBack_arbitration_removeIt)); + assign when_Pipeline_l151 = ((! execute_arbitration_isStuck) || execute_arbitration_removeIt); + assign when_Pipeline_l154 = ((! decode_arbitration_isStuck) && (! decode_arbitration_removeIt)); + assign when_Pipeline_l151_1 = ((! memory_arbitration_isStuck) || memory_arbitration_removeIt); + assign when_Pipeline_l154_1 = ((! execute_arbitration_isStuck) && (! execute_arbitration_removeIt)); + assign when_Pipeline_l151_2 = ((! writeBack_arbitration_isStuck) || writeBack_arbitration_removeIt); + assign when_Pipeline_l154_2 = ((! memory_arbitration_isStuck) && (! memory_arbitration_removeIt)); + always @(*) begin + IBusCachedPlugin_injectionPort_ready = 1'b0; + case(switch_Fetcher_l362) + 3'b100 : begin + IBusCachedPlugin_injectionPort_ready = 1'b1; + end + default : begin + end + endcase + end + + assign when_Fetcher_l378 = (! decode_arbitration_isStuck); + assign when_CsrPlugin_l1264 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_1 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_2 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_3 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_4 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_5 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_6 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_7 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_8 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_9 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_10 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_11 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_12 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_13 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_14 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_15 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_16 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_17 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_18 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_19 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_20 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_21 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_22 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_23 = (! execute_arbitration_isStuck); + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_2 = 32'h0; + if(execute_CsrPlugin_csr_3264) begin + _zz_CsrPlugin_csrMapping_readDataInit_2[12 : 0] = 13'h1000; + _zz_CsrPlugin_csrMapping_readDataInit_2[25 : 20] = 6'h20; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_3 = 32'h0; + if(execute_CsrPlugin_csr_3857) begin + _zz_CsrPlugin_csrMapping_readDataInit_3[3 : 0] = 4'b1011; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_4 = 32'h0; + if(execute_CsrPlugin_csr_3858) begin + _zz_CsrPlugin_csrMapping_readDataInit_4[4 : 0] = 5'h16; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_5 = 32'h0; + if(execute_CsrPlugin_csr_3859) begin + _zz_CsrPlugin_csrMapping_readDataInit_5[5 : 0] = 6'h21; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_6 = 32'h0; + if(execute_CsrPlugin_csr_769) begin + _zz_CsrPlugin_csrMapping_readDataInit_6[31 : 30] = CsrPlugin_misa_base; + _zz_CsrPlugin_csrMapping_readDataInit_6[25 : 0] = CsrPlugin_misa_extensions; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_7 = 32'h0; + if(execute_CsrPlugin_csr_768) begin + _zz_CsrPlugin_csrMapping_readDataInit_7[12 : 11] = CsrPlugin_mstatus_MPP; + _zz_CsrPlugin_csrMapping_readDataInit_7[7 : 7] = CsrPlugin_mstatus_MPIE; + _zz_CsrPlugin_csrMapping_readDataInit_7[3 : 3] = CsrPlugin_mstatus_MIE; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_8 = 32'h0; + if(execute_CsrPlugin_csr_836) begin + _zz_CsrPlugin_csrMapping_readDataInit_8[11 : 11] = CsrPlugin_mip_MEIP; + _zz_CsrPlugin_csrMapping_readDataInit_8[7 : 7] = CsrPlugin_mip_MTIP; + _zz_CsrPlugin_csrMapping_readDataInit_8[3 : 3] = CsrPlugin_mip_MSIP; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_9 = 32'h0; + if(execute_CsrPlugin_csr_772) begin + _zz_CsrPlugin_csrMapping_readDataInit_9[11 : 11] = CsrPlugin_mie_MEIE; + _zz_CsrPlugin_csrMapping_readDataInit_9[7 : 7] = CsrPlugin_mie_MTIE; + _zz_CsrPlugin_csrMapping_readDataInit_9[3 : 3] = CsrPlugin_mie_MSIE; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_10 = 32'h0; + if(execute_CsrPlugin_csr_773) begin + _zz_CsrPlugin_csrMapping_readDataInit_10[31 : 2] = CsrPlugin_mtvec_base; + _zz_CsrPlugin_csrMapping_readDataInit_10[1 : 0] = CsrPlugin_mtvec_mode; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_11 = 32'h0; + if(execute_CsrPlugin_csr_833) begin + _zz_CsrPlugin_csrMapping_readDataInit_11[31 : 0] = CsrPlugin_mepc; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_12 = 32'h0; + if(execute_CsrPlugin_csr_832) begin + _zz_CsrPlugin_csrMapping_readDataInit_12[31 : 0] = CsrPlugin_mscratch; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_13 = 32'h0; + if(execute_CsrPlugin_csr_834) begin + _zz_CsrPlugin_csrMapping_readDataInit_13[31 : 31] = CsrPlugin_mcause_interrupt; + _zz_CsrPlugin_csrMapping_readDataInit_13[3 : 0] = CsrPlugin_mcause_exceptionCode; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_14 = 32'h0; + if(execute_CsrPlugin_csr_835) begin + _zz_CsrPlugin_csrMapping_readDataInit_14[31 : 0] = CsrPlugin_mtval; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_15 = 32'h0; + if(execute_CsrPlugin_csr_2816) begin + _zz_CsrPlugin_csrMapping_readDataInit_15[31 : 0] = CsrPlugin_mcycle[31 : 0]; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_16 = 32'h0; + if(execute_CsrPlugin_csr_2944) begin + _zz_CsrPlugin_csrMapping_readDataInit_16[31 : 0] = CsrPlugin_mcycle[63 : 32]; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_17 = 32'h0; + if(execute_CsrPlugin_csr_2818) begin + _zz_CsrPlugin_csrMapping_readDataInit_17[31 : 0] = CsrPlugin_minstret[31 : 0]; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_18 = 32'h0; + if(execute_CsrPlugin_csr_2946) begin + _zz_CsrPlugin_csrMapping_readDataInit_18[31 : 0] = CsrPlugin_minstret[63 : 32]; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_19 = 32'h0; + if(execute_CsrPlugin_csr_3072) begin + _zz_CsrPlugin_csrMapping_readDataInit_19[31 : 0] = CsrPlugin_mcycle[31 : 0]; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_20 = 32'h0; + if(execute_CsrPlugin_csr_3200) begin + _zz_CsrPlugin_csrMapping_readDataInit_20[31 : 0] = CsrPlugin_mcycle[63 : 32]; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_21 = 32'h0; + if(execute_CsrPlugin_csr_3074) begin + _zz_CsrPlugin_csrMapping_readDataInit_21[31 : 0] = CsrPlugin_minstret[31 : 0]; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_22 = 32'h0; + if(execute_CsrPlugin_csr_3202) begin + _zz_CsrPlugin_csrMapping_readDataInit_22[31 : 0] = CsrPlugin_minstret[63 : 32]; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_23 = 32'h0; + if(execute_CsrPlugin_csr_3008) begin + _zz_CsrPlugin_csrMapping_readDataInit_23[31 : 0] = _zz_CsrPlugin_csrMapping_readDataInit; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_24 = 32'h0; + if(execute_CsrPlugin_csr_4032) begin + _zz_CsrPlugin_csrMapping_readDataInit_24[31 : 0] = _zz_CsrPlugin_csrMapping_readDataInit_1; + end + end + + assign CsrPlugin_csrMapping_readDataInit = (((((_zz_CsrPlugin_csrMapping_readDataInit_2 | _zz_CsrPlugin_csrMapping_readDataInit_3) | (_zz_CsrPlugin_csrMapping_readDataInit_4 | _zz_CsrPlugin_csrMapping_readDataInit_5)) | ((_zz_CsrPlugin_csrMapping_readDataInit_25 | _zz_CsrPlugin_csrMapping_readDataInit_6) | (_zz_CsrPlugin_csrMapping_readDataInit_7 | _zz_CsrPlugin_csrMapping_readDataInit_8))) | (((_zz_CsrPlugin_csrMapping_readDataInit_9 | _zz_CsrPlugin_csrMapping_readDataInit_10) | (_zz_CsrPlugin_csrMapping_readDataInit_11 | _zz_CsrPlugin_csrMapping_readDataInit_12)) | ((_zz_CsrPlugin_csrMapping_readDataInit_13 | _zz_CsrPlugin_csrMapping_readDataInit_14) | (_zz_CsrPlugin_csrMapping_readDataInit_15 | _zz_CsrPlugin_csrMapping_readDataInit_16)))) | (((_zz_CsrPlugin_csrMapping_readDataInit_17 | _zz_CsrPlugin_csrMapping_readDataInit_18) | (_zz_CsrPlugin_csrMapping_readDataInit_19 | _zz_CsrPlugin_csrMapping_readDataInit_20)) | ((_zz_CsrPlugin_csrMapping_readDataInit_21 | _zz_CsrPlugin_csrMapping_readDataInit_22) | (_zz_CsrPlugin_csrMapping_readDataInit_23 | _zz_CsrPlugin_csrMapping_readDataInit_24)))); + assign when_CsrPlugin_l1297 = (CsrPlugin_privilege < execute_CsrPlugin_csrAddress[9 : 8]); + assign when_CsrPlugin_l1302 = ((! execute_arbitration_isValid) || (! execute_IS_CSR)); + assign iBusWishbone_ADR = {_zz_iBusWishbone_ADR_1,_zz_iBusWishbone_ADR}; + assign iBusWishbone_CTI = ((_zz_iBusWishbone_ADR == 3'b111) ? 3'b111 : 3'b010); + assign iBusWishbone_BTE = 2'b00; + assign iBusWishbone_SEL = 4'b1111; + assign iBusWishbone_WE = 1'b0; + assign iBusWishbone_DAT_MOSI = 32'bxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx; + always @(*) begin + iBusWishbone_CYC = 1'b0; + if(when_InstructionCache_l239) begin + iBusWishbone_CYC = 1'b1; + end + end + + always @(*) begin + iBusWishbone_STB = 1'b0; + if(when_InstructionCache_l239) begin + iBusWishbone_STB = 1'b1; + end + end + + assign when_InstructionCache_l239 = (iBus_cmd_valid || (_zz_iBusWishbone_ADR != 3'b000)); + assign iBus_cmd_ready = (iBus_cmd_valid && iBusWishbone_ACK); + assign iBus_rsp_valid = _zz_iBus_rsp_valid; + assign iBus_rsp_payload_data = iBusWishbone_DAT_MISO_regNext; + assign iBus_rsp_payload_error = 1'b0; + assign _zz_dBus_cmd_ready_5 = (dBus_cmd_payload_size == 3'b101); + assign _zz_dBus_cmd_ready_1 = dBus_cmd_valid; + assign _zz_dBus_cmd_ready_3 = dBus_cmd_payload_wr; + assign _zz_dBus_cmd_ready_4 = ((! _zz_dBus_cmd_ready_5) || (_zz_dBus_cmd_ready == 3'b111)); + assign dBus_cmd_ready = (_zz_dBus_cmd_ready_2 && (_zz_dBus_cmd_ready_3 || _zz_dBus_cmd_ready_4)); + assign dBusWishbone_ADR = ((_zz_dBus_cmd_ready_5 ? {{dBus_cmd_payload_address[31 : 5],_zz_dBus_cmd_ready},2'b00} : {dBus_cmd_payload_address[31 : 2],2'b00}) >>> 2); + assign dBusWishbone_CTI = (_zz_dBus_cmd_ready_5 ? (_zz_dBus_cmd_ready_4 ? 3'b111 : 3'b010) : 3'b000); + assign dBusWishbone_BTE = 2'b00; + assign dBusWishbone_SEL = (_zz_dBus_cmd_ready_3 ? dBus_cmd_payload_mask : 4'b1111); + assign dBusWishbone_WE = _zz_dBus_cmd_ready_3; + assign dBusWishbone_DAT_MOSI = dBus_cmd_payload_data; + assign _zz_dBus_cmd_ready_2 = (_zz_dBus_cmd_ready_1 && dBusWishbone_ACK); + assign dBusWishbone_CYC = _zz_dBus_cmd_ready_1; + assign dBusWishbone_STB = _zz_dBus_cmd_ready_1; + assign dBus_rsp_valid = _zz_dBus_rsp_valid; + assign dBus_rsp_payload_data = dBusWishbone_DAT_MISO_regNext; + assign dBus_rsp_payload_error = 1'b0; + always @(posedge clk) begin + if(reset) begin + IBusCachedPlugin_fetchPc_pcReg <= externalResetVector; + IBusCachedPlugin_fetchPc_correctionReg <= 1'b0; + IBusCachedPlugin_fetchPc_booted <= 1'b0; + IBusCachedPlugin_fetchPc_inc <= 1'b0; + _zz_IBusCachedPlugin_iBusRsp_stages_0_output_ready_2 <= 1'b0; + _zz_IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_valid <= 1'b0; + IBusCachedPlugin_injector_nextPcCalc_valids_0 <= 1'b0; + IBusCachedPlugin_injector_nextPcCalc_valids_1 <= 1'b0; + IBusCachedPlugin_injector_nextPcCalc_valids_2 <= 1'b0; + IBusCachedPlugin_injector_nextPcCalc_valids_3 <= 1'b0; + IBusCachedPlugin_injector_nextPcCalc_valids_4 <= 1'b0; + IBusCachedPlugin_rspCounter <= _zz_IBusCachedPlugin_rspCounter; + IBusCachedPlugin_rspCounter <= 32'h0; + dataCache_1_io_mem_cmd_rValid <= 1'b0; + dataCache_1_io_mem_cmd_s2mPipe_rValid <= 1'b0; + DBusCachedPlugin_rspCounter <= _zz_DBusCachedPlugin_rspCounter; + DBusCachedPlugin_rspCounter <= 32'h0; + _zz_7 <= 1'b1; + HazardSimplePlugin_writeBackBuffer_valid <= 1'b0; + CsrPlugin_misa_base <= 2'b01; + CsrPlugin_misa_extensions <= 26'h0000042; + CsrPlugin_mstatus_MIE <= 1'b0; + CsrPlugin_mstatus_MPIE <= 1'b0; + CsrPlugin_mstatus_MPP <= 2'b11; + CsrPlugin_mie_MEIE <= 1'b0; + CsrPlugin_mie_MTIE <= 1'b0; + CsrPlugin_mie_MSIE <= 1'b0; + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_decode <= 1'b0; + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_execute <= 1'b0; + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_memory <= 1'b0; + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_writeBack <= 1'b0; + CsrPlugin_interrupt_valid <= 1'b0; + CsrPlugin_lastStageWasWfi <= 1'b0; + CsrPlugin_pipelineLiberator_pcValids_0 <= 1'b0; + CsrPlugin_pipelineLiberator_pcValids_1 <= 1'b0; + CsrPlugin_pipelineLiberator_pcValids_2 <= 1'b0; + CsrPlugin_hadException <= 1'b0; + execute_CsrPlugin_wfiWake <= 1'b0; + memory_DivPlugin_div_counter_value <= 6'h0; + _zz_CsrPlugin_csrMapping_readDataInit <= 32'h0; + execute_CfuPlugin_hold <= 1'b0; + execute_CfuPlugin_fired <= 1'b0; + CfuPlugin_bus_rsp_rValid <= 1'b0; + execute_arbitration_isValid <= 1'b0; + memory_arbitration_isValid <= 1'b0; + writeBack_arbitration_isValid <= 1'b0; + switch_Fetcher_l362 <= 3'b000; + execute_to_memory_CfuPlugin_CFU_IN_FLIGHT <= 1'b0; + _zz_iBusWishbone_ADR <= 3'b000; + _zz_iBus_rsp_valid <= 1'b0; + _zz_dBus_cmd_ready <= 3'b000; + _zz_dBus_rsp_valid <= 1'b0; + end else begin + if(IBusCachedPlugin_fetchPc_correction) begin + IBusCachedPlugin_fetchPc_correctionReg <= 1'b1; + end + if(IBusCachedPlugin_fetchPc_output_fire) begin + IBusCachedPlugin_fetchPc_correctionReg <= 1'b0; + end + IBusCachedPlugin_fetchPc_booted <= 1'b1; + if(when_Fetcher_l131) begin + IBusCachedPlugin_fetchPc_inc <= 1'b0; + end + if(IBusCachedPlugin_fetchPc_output_fire_1) begin + IBusCachedPlugin_fetchPc_inc <= 1'b1; + end + if(when_Fetcher_l131_1) begin + IBusCachedPlugin_fetchPc_inc <= 1'b0; + end + if(when_Fetcher_l158) begin + IBusCachedPlugin_fetchPc_pcReg <= IBusCachedPlugin_fetchPc_pc; + end + if(IBusCachedPlugin_iBusRsp_flush) begin + _zz_IBusCachedPlugin_iBusRsp_stages_0_output_ready_2 <= 1'b0; + end + if(_zz_IBusCachedPlugin_iBusRsp_stages_0_output_ready) begin + _zz_IBusCachedPlugin_iBusRsp_stages_0_output_ready_2 <= (IBusCachedPlugin_iBusRsp_stages_0_output_valid && (! 1'b0)); + end + if(IBusCachedPlugin_iBusRsp_flush) begin + _zz_IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_valid <= 1'b0; + end + if(IBusCachedPlugin_iBusRsp_stages_1_output_ready) begin + _zz_IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_valid <= (IBusCachedPlugin_iBusRsp_stages_1_output_valid && (! IBusCachedPlugin_iBusRsp_flush)); + end + if(IBusCachedPlugin_fetchPc_flushed) begin + IBusCachedPlugin_injector_nextPcCalc_valids_0 <= 1'b0; + end + if(when_Fetcher_l329) begin + IBusCachedPlugin_injector_nextPcCalc_valids_0 <= 1'b1; + end + if(IBusCachedPlugin_fetchPc_flushed) begin + IBusCachedPlugin_injector_nextPcCalc_valids_1 <= 1'b0; + end + if(when_Fetcher_l329_1) begin + IBusCachedPlugin_injector_nextPcCalc_valids_1 <= IBusCachedPlugin_injector_nextPcCalc_valids_0; + end + if(IBusCachedPlugin_fetchPc_flushed) begin + IBusCachedPlugin_injector_nextPcCalc_valids_1 <= 1'b0; + end + if(IBusCachedPlugin_fetchPc_flushed) begin + IBusCachedPlugin_injector_nextPcCalc_valids_2 <= 1'b0; + end + if(when_Fetcher_l329_2) begin + IBusCachedPlugin_injector_nextPcCalc_valids_2 <= IBusCachedPlugin_injector_nextPcCalc_valids_1; + end + if(IBusCachedPlugin_fetchPc_flushed) begin + IBusCachedPlugin_injector_nextPcCalc_valids_2 <= 1'b0; + end + if(IBusCachedPlugin_fetchPc_flushed) begin + IBusCachedPlugin_injector_nextPcCalc_valids_3 <= 1'b0; + end + if(when_Fetcher_l329_3) begin + IBusCachedPlugin_injector_nextPcCalc_valids_3 <= IBusCachedPlugin_injector_nextPcCalc_valids_2; + end + if(IBusCachedPlugin_fetchPc_flushed) begin + IBusCachedPlugin_injector_nextPcCalc_valids_3 <= 1'b0; + end + if(IBusCachedPlugin_fetchPc_flushed) begin + IBusCachedPlugin_injector_nextPcCalc_valids_4 <= 1'b0; + end + if(when_Fetcher_l329_4) begin + IBusCachedPlugin_injector_nextPcCalc_valids_4 <= IBusCachedPlugin_injector_nextPcCalc_valids_3; + end + if(IBusCachedPlugin_fetchPc_flushed) begin + IBusCachedPlugin_injector_nextPcCalc_valids_4 <= 1'b0; + end + if(iBus_rsp_valid) begin + IBusCachedPlugin_rspCounter <= (IBusCachedPlugin_rspCounter + 32'h00000001); + end + if(dataCache_1_io_mem_cmd_valid) begin + dataCache_1_io_mem_cmd_rValid <= 1'b1; + end + if(dataCache_1_io_mem_cmd_s2mPipe_ready) begin + dataCache_1_io_mem_cmd_rValid <= 1'b0; + end + if(dataCache_1_io_mem_cmd_s2mPipe_ready) begin + dataCache_1_io_mem_cmd_s2mPipe_rValid <= dataCache_1_io_mem_cmd_s2mPipe_valid; + end + if(dBus_rsp_valid) begin + DBusCachedPlugin_rspCounter <= (DBusCachedPlugin_rspCounter + 32'h00000001); + end + _zz_7 <= 1'b0; + HazardSimplePlugin_writeBackBuffer_valid <= HazardSimplePlugin_writeBackWrites_valid; + if(when_CsrPlugin_l909) begin + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_decode <= 1'b0; + end else begin + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_decode <= CsrPlugin_exceptionPortCtrl_exceptionValids_decode; + end + if(when_CsrPlugin_l909_1) begin + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_execute <= (CsrPlugin_exceptionPortCtrl_exceptionValids_decode && (! decode_arbitration_isStuck)); + end else begin + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_execute <= CsrPlugin_exceptionPortCtrl_exceptionValids_execute; + end + if(when_CsrPlugin_l909_2) begin + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_memory <= (CsrPlugin_exceptionPortCtrl_exceptionValids_execute && (! execute_arbitration_isStuck)); + end else begin + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_memory <= CsrPlugin_exceptionPortCtrl_exceptionValids_memory; + end + if(when_CsrPlugin_l909_3) begin + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_writeBack <= (CsrPlugin_exceptionPortCtrl_exceptionValids_memory && (! memory_arbitration_isStuck)); + end else begin + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_writeBack <= 1'b0; + end + CsrPlugin_interrupt_valid <= 1'b0; + if(when_CsrPlugin_l946) begin + if(when_CsrPlugin_l952) begin + CsrPlugin_interrupt_valid <= 1'b1; + end + if(when_CsrPlugin_l952_1) begin + CsrPlugin_interrupt_valid <= 1'b1; + end + if(when_CsrPlugin_l952_2) begin + CsrPlugin_interrupt_valid <= 1'b1; + end + end + CsrPlugin_lastStageWasWfi <= (writeBack_arbitration_isFiring && (writeBack_ENV_CTRL == `EnvCtrlEnum_binary_sequential_WFI)); + if(CsrPlugin_pipelineLiberator_active) begin + if(when_CsrPlugin_l980) begin + CsrPlugin_pipelineLiberator_pcValids_0 <= 1'b1; + end + if(when_CsrPlugin_l980_1) begin + CsrPlugin_pipelineLiberator_pcValids_1 <= CsrPlugin_pipelineLiberator_pcValids_0; + end + if(when_CsrPlugin_l980_2) begin + CsrPlugin_pipelineLiberator_pcValids_2 <= CsrPlugin_pipelineLiberator_pcValids_1; + end + end + if(when_CsrPlugin_l985) begin + CsrPlugin_pipelineLiberator_pcValids_0 <= 1'b0; + CsrPlugin_pipelineLiberator_pcValids_1 <= 1'b0; + CsrPlugin_pipelineLiberator_pcValids_2 <= 1'b0; + end + if(CsrPlugin_interruptJump) begin + CsrPlugin_interrupt_valid <= 1'b0; + end + CsrPlugin_hadException <= CsrPlugin_exception; + if(when_CsrPlugin_l1019) begin + case(CsrPlugin_targetPrivilege) + 2'b11 : begin + CsrPlugin_mstatus_MIE <= 1'b0; + CsrPlugin_mstatus_MPIE <= CsrPlugin_mstatus_MIE; + CsrPlugin_mstatus_MPP <= CsrPlugin_privilege; + end + default : begin + end + endcase + end + if(when_CsrPlugin_l1064) begin + case(switch_CsrPlugin_l1068) + 2'b11 : begin + CsrPlugin_mstatus_MPP <= 2'b00; + CsrPlugin_mstatus_MIE <= CsrPlugin_mstatus_MPIE; + CsrPlugin_mstatus_MPIE <= 1'b1; + end + default : begin + end + endcase + end + execute_CsrPlugin_wfiWake <= (({_zz_when_CsrPlugin_l952_2,{_zz_when_CsrPlugin_l952_1,_zz_when_CsrPlugin_l952}} != 3'b000) || CsrPlugin_thirdPartyWake); + memory_DivPlugin_div_counter_value <= memory_DivPlugin_div_counter_valueNext; + if(execute_CfuPlugin_schedule) begin + execute_CfuPlugin_hold <= 1'b1; + end + if(CfuPlugin_bus_cmd_ready) begin + execute_CfuPlugin_hold <= 1'b0; + end + if(CfuPlugin_bus_cmd_fire) begin + execute_CfuPlugin_fired <= 1'b1; + end + if(when_CfuPlugin_l171) begin + execute_CfuPlugin_fired <= 1'b0; + end + if(CfuPlugin_bus_rsp_valid) begin + CfuPlugin_bus_rsp_rValid <= 1'b1; + end + if(CfuPlugin_bus_rsp_rsp_ready) begin + CfuPlugin_bus_rsp_rValid <= 1'b0; + end + if(when_Pipeline_l124_62) begin + execute_to_memory_CfuPlugin_CFU_IN_FLIGHT <= _zz_execute_to_memory_CfuPlugin_CFU_IN_FLIGHT; + end + if(when_Pipeline_l151) begin + execute_arbitration_isValid <= 1'b0; + end + if(when_Pipeline_l154) begin + execute_arbitration_isValid <= decode_arbitration_isValid; + end + if(when_Pipeline_l151_1) begin + memory_arbitration_isValid <= 1'b0; + end + if(when_Pipeline_l154_1) begin + memory_arbitration_isValid <= execute_arbitration_isValid; + end + if(when_Pipeline_l151_2) begin + writeBack_arbitration_isValid <= 1'b0; + end + if(when_Pipeline_l154_2) begin + writeBack_arbitration_isValid <= memory_arbitration_isValid; + end + case(switch_Fetcher_l362) + 3'b000 : begin + if(IBusCachedPlugin_injectionPort_valid) begin + switch_Fetcher_l362 <= 3'b001; + end + end + 3'b001 : begin + switch_Fetcher_l362 <= 3'b010; + end + 3'b010 : begin + switch_Fetcher_l362 <= 3'b011; + end + 3'b011 : begin + if(when_Fetcher_l378) begin + switch_Fetcher_l362 <= 3'b100; + end + end + 3'b100 : begin + switch_Fetcher_l362 <= 3'b000; + end + default : begin + end + endcase + if(execute_CsrPlugin_csr_769) begin + if(execute_CsrPlugin_writeEnable) begin + CsrPlugin_misa_base <= CsrPlugin_csrMapping_writeDataSignal[31 : 30]; + CsrPlugin_misa_extensions <= CsrPlugin_csrMapping_writeDataSignal[25 : 0]; + end + end + if(execute_CsrPlugin_csr_768) begin + if(execute_CsrPlugin_writeEnable) begin + CsrPlugin_mstatus_MPP <= CsrPlugin_csrMapping_writeDataSignal[12 : 11]; + CsrPlugin_mstatus_MPIE <= CsrPlugin_csrMapping_writeDataSignal[7]; + CsrPlugin_mstatus_MIE <= CsrPlugin_csrMapping_writeDataSignal[3]; + end + end + if(execute_CsrPlugin_csr_772) begin + if(execute_CsrPlugin_writeEnable) begin + CsrPlugin_mie_MEIE <= CsrPlugin_csrMapping_writeDataSignal[11]; + CsrPlugin_mie_MTIE <= CsrPlugin_csrMapping_writeDataSignal[7]; + CsrPlugin_mie_MSIE <= CsrPlugin_csrMapping_writeDataSignal[3]; + end + end + if(execute_CsrPlugin_csr_3008) begin + if(execute_CsrPlugin_writeEnable) begin + _zz_CsrPlugin_csrMapping_readDataInit <= CsrPlugin_csrMapping_writeDataSignal[31 : 0]; + end + end + if(when_InstructionCache_l239) begin + if(iBusWishbone_ACK) begin + _zz_iBusWishbone_ADR <= (_zz_iBusWishbone_ADR + 3'b001); + end + end + _zz_iBus_rsp_valid <= (iBusWishbone_CYC && iBusWishbone_ACK); + if((_zz_dBus_cmd_ready_1 && _zz_dBus_cmd_ready_2)) begin + _zz_dBus_cmd_ready <= (_zz_dBus_cmd_ready + 3'b001); + if(_zz_dBus_cmd_ready_4) begin + _zz_dBus_cmd_ready <= 3'b000; + end + end + _zz_dBus_rsp_valid <= ((_zz_dBus_cmd_ready_1 && (! dBusWishbone_WE)) && dBusWishbone_ACK); + end + end + + always @(posedge clk) begin + if(IBusCachedPlugin_iBusRsp_stages_1_output_ready) begin + _zz_IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_payload <= IBusCachedPlugin_iBusRsp_stages_1_output_payload; + end + if(IBusCachedPlugin_iBusRsp_stages_1_input_ready) begin + IBusCachedPlugin_s1_tightlyCoupledHit <= IBusCachedPlugin_s0_tightlyCoupledHit; + end + if(IBusCachedPlugin_iBusRsp_stages_2_input_ready) begin + IBusCachedPlugin_s2_tightlyCoupledHit <= IBusCachedPlugin_s1_tightlyCoupledHit; + end + if(dataCache_1_io_mem_cmd_ready) begin + dataCache_1_io_mem_cmd_rData_wr <= dataCache_1_io_mem_cmd_payload_wr; + dataCache_1_io_mem_cmd_rData_uncached <= dataCache_1_io_mem_cmd_payload_uncached; + dataCache_1_io_mem_cmd_rData_address <= dataCache_1_io_mem_cmd_payload_address; + dataCache_1_io_mem_cmd_rData_data <= dataCache_1_io_mem_cmd_payload_data; + dataCache_1_io_mem_cmd_rData_mask <= dataCache_1_io_mem_cmd_payload_mask; + dataCache_1_io_mem_cmd_rData_size <= dataCache_1_io_mem_cmd_payload_size; + dataCache_1_io_mem_cmd_rData_last <= dataCache_1_io_mem_cmd_payload_last; + end + if(dataCache_1_io_mem_cmd_s2mPipe_ready) begin + dataCache_1_io_mem_cmd_s2mPipe_rData_wr <= dataCache_1_io_mem_cmd_s2mPipe_payload_wr; + dataCache_1_io_mem_cmd_s2mPipe_rData_uncached <= dataCache_1_io_mem_cmd_s2mPipe_payload_uncached; + dataCache_1_io_mem_cmd_s2mPipe_rData_address <= dataCache_1_io_mem_cmd_s2mPipe_payload_address; + dataCache_1_io_mem_cmd_s2mPipe_rData_data <= dataCache_1_io_mem_cmd_s2mPipe_payload_data; + dataCache_1_io_mem_cmd_s2mPipe_rData_mask <= dataCache_1_io_mem_cmd_s2mPipe_payload_mask; + dataCache_1_io_mem_cmd_s2mPipe_rData_size <= dataCache_1_io_mem_cmd_s2mPipe_payload_size; + dataCache_1_io_mem_cmd_s2mPipe_rData_last <= dataCache_1_io_mem_cmd_s2mPipe_payload_last; + end + HazardSimplePlugin_writeBackBuffer_payload_address <= HazardSimplePlugin_writeBackWrites_payload_address; + HazardSimplePlugin_writeBackBuffer_payload_data <= HazardSimplePlugin_writeBackWrites_payload_data; + CsrPlugin_mip_MEIP <= externalInterrupt; + CsrPlugin_mip_MTIP <= timerInterrupt; + CsrPlugin_mip_MSIP <= softwareInterrupt; + CsrPlugin_mcycle <= (CsrPlugin_mcycle + 64'h0000000000000001); + if(writeBack_arbitration_isFiring) begin + CsrPlugin_minstret <= (CsrPlugin_minstret + 64'h0000000000000001); + end + if(_zz_when) begin + CsrPlugin_exceptionPortCtrl_exceptionContext_code <= (_zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_1 ? IBusCachedPlugin_decodeExceptionPort_payload_code : decodeExceptionPort_payload_code); + CsrPlugin_exceptionPortCtrl_exceptionContext_badAddr <= (_zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_1 ? IBusCachedPlugin_decodeExceptionPort_payload_badAddr : decodeExceptionPort_payload_badAddr); + end + if(_zz_when_1) begin + CsrPlugin_exceptionPortCtrl_exceptionContext_code <= (_zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_3 ? BranchPlugin_branchExceptionPort_payload_code : CsrPlugin_selfException_payload_code); + CsrPlugin_exceptionPortCtrl_exceptionContext_badAddr <= (_zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_3 ? BranchPlugin_branchExceptionPort_payload_badAddr : CsrPlugin_selfException_payload_badAddr); + end + if(DBusCachedPlugin_exceptionBus_valid) begin + CsrPlugin_exceptionPortCtrl_exceptionContext_code <= DBusCachedPlugin_exceptionBus_payload_code; + CsrPlugin_exceptionPortCtrl_exceptionContext_badAddr <= DBusCachedPlugin_exceptionBus_payload_badAddr; + end + if(when_CsrPlugin_l946) begin + if(when_CsrPlugin_l952) begin + CsrPlugin_interrupt_code <= 4'b0111; + CsrPlugin_interrupt_targetPrivilege <= 2'b11; + end + if(when_CsrPlugin_l952_1) begin + CsrPlugin_interrupt_code <= 4'b0011; + CsrPlugin_interrupt_targetPrivilege <= 2'b11; + end + if(when_CsrPlugin_l952_2) begin + CsrPlugin_interrupt_code <= 4'b1011; + CsrPlugin_interrupt_targetPrivilege <= 2'b11; + end + end + if(when_CsrPlugin_l1019) begin + case(CsrPlugin_targetPrivilege) + 2'b11 : begin + CsrPlugin_mcause_interrupt <= (! CsrPlugin_hadException); + CsrPlugin_mcause_exceptionCode <= CsrPlugin_trapCause; + CsrPlugin_mepc <= writeBack_PC; + if(CsrPlugin_hadException) begin + CsrPlugin_mtval <= CsrPlugin_exceptionPortCtrl_exceptionContext_badAddr; + end + end + default : begin + end + endcase + end + if(when_MulDivIterativePlugin_l126) begin + memory_DivPlugin_div_done <= 1'b1; + end + if(when_MulDivIterativePlugin_l126_1) begin + memory_DivPlugin_div_done <= 1'b0; + end + if(when_MulDivIterativePlugin_l128) begin + if(when_MulDivIterativePlugin_l132) begin + memory_DivPlugin_rs1[31 : 0] <= memory_DivPlugin_div_stage_0_outNumerator; + memory_DivPlugin_accumulator[31 : 0] <= memory_DivPlugin_div_stage_0_outRemainder; + if(when_MulDivIterativePlugin_l151) begin + memory_DivPlugin_div_result <= _zz_memory_DivPlugin_div_result_1[31:0]; + end + end + end + if(when_MulDivIterativePlugin_l162) begin + memory_DivPlugin_accumulator <= 65'h0; + memory_DivPlugin_rs1 <= ((_zz_memory_DivPlugin_rs1 ? (~ _zz_memory_DivPlugin_rs1_1) : _zz_memory_DivPlugin_rs1_1) + _zz_memory_DivPlugin_rs1_2); + memory_DivPlugin_rs2 <= ((_zz_memory_DivPlugin_rs2 ? (~ execute_RS2) : execute_RS2) + _zz_memory_DivPlugin_rs2_1); + memory_DivPlugin_div_needRevert <= ((_zz_memory_DivPlugin_rs1 ^ (_zz_memory_DivPlugin_rs2 && (! execute_INSTRUCTION[13]))) && (! (((execute_RS2 == 32'h0) && execute_IS_RS2_SIGNED) && (! execute_INSTRUCTION[13])))); + end + externalInterruptArray_regNext <= externalInterruptArray; + if(CfuPlugin_bus_rsp_ready) begin + CfuPlugin_bus_rsp_rData_outputs_0 <= CfuPlugin_bus_rsp_payload_outputs_0; + end + if(when_Pipeline_l124) begin + decode_to_execute_PC <= decode_PC; + end + if(when_Pipeline_l124_1) begin + execute_to_memory_PC <= _zz_execute_SRC2; + end + if(when_Pipeline_l124_2) begin + memory_to_writeBack_PC <= memory_PC; + end + if(when_Pipeline_l124_3) begin + decode_to_execute_INSTRUCTION <= decode_INSTRUCTION; + end + if(when_Pipeline_l124_4) begin + execute_to_memory_INSTRUCTION <= execute_INSTRUCTION; + end + if(when_Pipeline_l124_5) begin + memory_to_writeBack_INSTRUCTION <= memory_INSTRUCTION; + end + if(when_Pipeline_l124_6) begin + decode_to_execute_FORMAL_PC_NEXT <= _zz_decode_to_execute_FORMAL_PC_NEXT; + end + if(when_Pipeline_l124_7) begin + execute_to_memory_FORMAL_PC_NEXT <= _zz_execute_to_memory_FORMAL_PC_NEXT; + end + if(when_Pipeline_l124_8) begin + memory_to_writeBack_FORMAL_PC_NEXT <= memory_FORMAL_PC_NEXT; + end + if(when_Pipeline_l124_9) begin + decode_to_execute_MEMORY_FORCE_CONSTISTENCY <= decode_MEMORY_FORCE_CONSTISTENCY; + end + if(when_Pipeline_l124_10) begin + decode_to_execute_SRC1_CTRL <= _zz_decode_to_execute_SRC1_CTRL; + end + if(when_Pipeline_l124_11) begin + decode_to_execute_SRC_USE_SUB_LESS <= decode_SRC_USE_SUB_LESS; + end + if(when_Pipeline_l124_12) begin + decode_to_execute_MEMORY_ENABLE <= decode_MEMORY_ENABLE; + end + if(when_Pipeline_l124_13) begin + execute_to_memory_MEMORY_ENABLE <= execute_MEMORY_ENABLE; + end + if(when_Pipeline_l124_14) begin + memory_to_writeBack_MEMORY_ENABLE <= memory_MEMORY_ENABLE; + end + if(when_Pipeline_l124_15) begin + decode_to_execute_ALU_CTRL <= _zz_decode_to_execute_ALU_CTRL; + end + if(when_Pipeline_l124_16) begin + decode_to_execute_SRC2_CTRL <= _zz_decode_to_execute_SRC2_CTRL; + end + if(when_Pipeline_l124_17) begin + decode_to_execute_REGFILE_WRITE_VALID <= decode_REGFILE_WRITE_VALID; + end + if(when_Pipeline_l124_18) begin + execute_to_memory_REGFILE_WRITE_VALID <= execute_REGFILE_WRITE_VALID; + end + if(when_Pipeline_l124_19) begin + memory_to_writeBack_REGFILE_WRITE_VALID <= memory_REGFILE_WRITE_VALID; + end + if(when_Pipeline_l124_20) begin + decode_to_execute_BYPASSABLE_EXECUTE_STAGE <= decode_BYPASSABLE_EXECUTE_STAGE; + end + if(when_Pipeline_l124_21) begin + decode_to_execute_BYPASSABLE_MEMORY_STAGE <= decode_BYPASSABLE_MEMORY_STAGE; + end + if(when_Pipeline_l124_22) begin + execute_to_memory_BYPASSABLE_MEMORY_STAGE <= execute_BYPASSABLE_MEMORY_STAGE; + end + if(when_Pipeline_l124_23) begin + decode_to_execute_MEMORY_WR <= decode_MEMORY_WR; + end + if(when_Pipeline_l124_24) begin + execute_to_memory_MEMORY_WR <= execute_MEMORY_WR; + end + if(when_Pipeline_l124_25) begin + memory_to_writeBack_MEMORY_WR <= memory_MEMORY_WR; + end + if(when_Pipeline_l124_26) begin + decode_to_execute_MEMORY_MANAGMENT <= decode_MEMORY_MANAGMENT; + end + if(when_Pipeline_l124_27) begin + decode_to_execute_SRC_LESS_UNSIGNED <= decode_SRC_LESS_UNSIGNED; + end + if(when_Pipeline_l124_28) begin + decode_to_execute_ALU_BITWISE_CTRL <= _zz_decode_to_execute_ALU_BITWISE_CTRL; + end + if(when_Pipeline_l124_29) begin + decode_to_execute_SHIFT_CTRL <= _zz_decode_to_execute_SHIFT_CTRL; + end + if(when_Pipeline_l124_30) begin + execute_to_memory_SHIFT_CTRL <= _zz_execute_to_memory_SHIFT_CTRL; + end + if(when_Pipeline_l124_31) begin + decode_to_execute_BRANCH_CTRL <= _zz_decode_to_execute_BRANCH_CTRL; + end + if(when_Pipeline_l124_32) begin + decode_to_execute_IS_CSR <= decode_IS_CSR; + end + if(when_Pipeline_l124_33) begin + decode_to_execute_ENV_CTRL <= _zz_decode_to_execute_ENV_CTRL; + end + if(when_Pipeline_l124_34) begin + execute_to_memory_ENV_CTRL <= _zz_execute_to_memory_ENV_CTRL; + end + if(when_Pipeline_l124_35) begin + memory_to_writeBack_ENV_CTRL <= _zz_memory_to_writeBack_ENV_CTRL; + end + if(when_Pipeline_l124_36) begin + decode_to_execute_IS_MUL <= decode_IS_MUL; + end + if(when_Pipeline_l124_37) begin + execute_to_memory_IS_MUL <= execute_IS_MUL; + end + if(when_Pipeline_l124_38) begin + memory_to_writeBack_IS_MUL <= memory_IS_MUL; + end + if(when_Pipeline_l124_39) begin + decode_to_execute_IS_DIV <= decode_IS_DIV; + end + if(when_Pipeline_l124_40) begin + execute_to_memory_IS_DIV <= execute_IS_DIV; + end + if(when_Pipeline_l124_41) begin + decode_to_execute_IS_RS1_SIGNED <= decode_IS_RS1_SIGNED; + end + if(when_Pipeline_l124_42) begin + decode_to_execute_IS_RS2_SIGNED <= decode_IS_RS2_SIGNED; + end + if(when_Pipeline_l124_43) begin + decode_to_execute_CfuPlugin_CFU_ENABLE <= decode_CfuPlugin_CFU_ENABLE; + end + if(when_Pipeline_l124_44) begin + decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND <= _zz_decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND; + end + if(when_Pipeline_l124_45) begin + decode_to_execute_RS1 <= decode_RS1; + end + if(when_Pipeline_l124_46) begin + decode_to_execute_RS2 <= decode_RS2; + end + if(when_Pipeline_l124_47) begin + decode_to_execute_SRC2_FORCE_ZERO <= decode_SRC2_FORCE_ZERO; + end + if(when_Pipeline_l124_48) begin + decode_to_execute_PREDICTION_HAD_BRANCHED2 <= decode_PREDICTION_HAD_BRANCHED2; + end + if(when_Pipeline_l124_49) begin + decode_to_execute_CSR_WRITE_OPCODE <= decode_CSR_WRITE_OPCODE; + end + if(when_Pipeline_l124_50) begin + decode_to_execute_CSR_READ_OPCODE <= decode_CSR_READ_OPCODE; + end + if(when_Pipeline_l124_51) begin + decode_to_execute_DO_EBREAK <= decode_DO_EBREAK; + end + if(when_Pipeline_l124_52) begin + execute_to_memory_MEMORY_STORE_DATA_RF <= execute_MEMORY_STORE_DATA_RF; + end + if(when_Pipeline_l124_53) begin + memory_to_writeBack_MEMORY_STORE_DATA_RF <= memory_MEMORY_STORE_DATA_RF; + end + if(when_Pipeline_l124_54) begin + execute_to_memory_REGFILE_WRITE_DATA <= _zz_decode_RS2; + end + if(when_Pipeline_l124_55) begin + memory_to_writeBack_REGFILE_WRITE_DATA <= _zz_decode_RS2_1; + end + if(when_Pipeline_l124_56) begin + execute_to_memory_SHIFT_RIGHT <= execute_SHIFT_RIGHT; + end + if(when_Pipeline_l124_57) begin + execute_to_memory_MUL_LL <= execute_MUL_LL; + end + if(when_Pipeline_l124_58) begin + execute_to_memory_MUL_LH <= execute_MUL_LH; + end + if(when_Pipeline_l124_59) begin + execute_to_memory_MUL_HL <= execute_MUL_HL; + end + if(when_Pipeline_l124_60) begin + execute_to_memory_MUL_HH <= execute_MUL_HH; + end + if(when_Pipeline_l124_61) begin + memory_to_writeBack_MUL_HH <= memory_MUL_HH; + end + if(when_Pipeline_l124_63) begin + memory_to_writeBack_CfuPlugin_CFU_IN_FLIGHT <= _zz_memory_to_writeBack_CfuPlugin_CFU_IN_FLIGHT; + end + if(when_Pipeline_l124_64) begin + memory_to_writeBack_MUL_LOW <= memory_MUL_LOW; + end + if(when_CsrPlugin_l1264) begin + execute_CsrPlugin_csr_3264 <= (decode_INSTRUCTION[31 : 20] == 12'hcc0); + end + if(when_CsrPlugin_l1264_1) begin + execute_CsrPlugin_csr_3857 <= (decode_INSTRUCTION[31 : 20] == 12'hf11); + end + if(when_CsrPlugin_l1264_2) begin + execute_CsrPlugin_csr_3858 <= (decode_INSTRUCTION[31 : 20] == 12'hf12); + end + if(when_CsrPlugin_l1264_3) begin + execute_CsrPlugin_csr_3859 <= (decode_INSTRUCTION[31 : 20] == 12'hf13); + end + if(when_CsrPlugin_l1264_4) begin + execute_CsrPlugin_csr_3860 <= (decode_INSTRUCTION[31 : 20] == 12'hf14); + end + if(when_CsrPlugin_l1264_5) begin + execute_CsrPlugin_csr_769 <= (decode_INSTRUCTION[31 : 20] == 12'h301); + end + if(when_CsrPlugin_l1264_6) begin + execute_CsrPlugin_csr_768 <= (decode_INSTRUCTION[31 : 20] == 12'h300); + end + if(when_CsrPlugin_l1264_7) begin + execute_CsrPlugin_csr_836 <= (decode_INSTRUCTION[31 : 20] == 12'h344); + end + if(when_CsrPlugin_l1264_8) begin + execute_CsrPlugin_csr_772 <= (decode_INSTRUCTION[31 : 20] == 12'h304); + end + if(when_CsrPlugin_l1264_9) begin + execute_CsrPlugin_csr_773 <= (decode_INSTRUCTION[31 : 20] == 12'h305); + end + if(when_CsrPlugin_l1264_10) begin + execute_CsrPlugin_csr_833 <= (decode_INSTRUCTION[31 : 20] == 12'h341); + end + if(when_CsrPlugin_l1264_11) begin + execute_CsrPlugin_csr_832 <= (decode_INSTRUCTION[31 : 20] == 12'h340); + end + if(when_CsrPlugin_l1264_12) begin + execute_CsrPlugin_csr_834 <= (decode_INSTRUCTION[31 : 20] == 12'h342); + end + if(when_CsrPlugin_l1264_13) begin + execute_CsrPlugin_csr_835 <= (decode_INSTRUCTION[31 : 20] == 12'h343); + end + if(when_CsrPlugin_l1264_14) begin + execute_CsrPlugin_csr_2816 <= (decode_INSTRUCTION[31 : 20] == 12'hb00); + end + if(when_CsrPlugin_l1264_15) begin + execute_CsrPlugin_csr_2944 <= (decode_INSTRUCTION[31 : 20] == 12'hb80); + end + if(when_CsrPlugin_l1264_16) begin + execute_CsrPlugin_csr_2818 <= (decode_INSTRUCTION[31 : 20] == 12'hb02); + end + if(when_CsrPlugin_l1264_17) begin + execute_CsrPlugin_csr_2946 <= (decode_INSTRUCTION[31 : 20] == 12'hb82); + end + if(when_CsrPlugin_l1264_18) begin + execute_CsrPlugin_csr_3072 <= (decode_INSTRUCTION[31 : 20] == 12'hc00); + end + if(when_CsrPlugin_l1264_19) begin + execute_CsrPlugin_csr_3200 <= (decode_INSTRUCTION[31 : 20] == 12'hc80); + end + if(when_CsrPlugin_l1264_20) begin + execute_CsrPlugin_csr_3074 <= (decode_INSTRUCTION[31 : 20] == 12'hc02); + end + if(when_CsrPlugin_l1264_21) begin + execute_CsrPlugin_csr_3202 <= (decode_INSTRUCTION[31 : 20] == 12'hc82); + end + if(when_CsrPlugin_l1264_22) begin + execute_CsrPlugin_csr_3008 <= (decode_INSTRUCTION[31 : 20] == 12'hbc0); + end + if(when_CsrPlugin_l1264_23) begin + execute_CsrPlugin_csr_4032 <= (decode_INSTRUCTION[31 : 20] == 12'hfc0); + end + if(execute_CsrPlugin_csr_836) begin + if(execute_CsrPlugin_writeEnable) begin + CsrPlugin_mip_MSIP <= CsrPlugin_csrMapping_writeDataSignal[3]; + end + end + if(execute_CsrPlugin_csr_773) begin + if(execute_CsrPlugin_writeEnable) begin + CsrPlugin_mtvec_base <= CsrPlugin_csrMapping_writeDataSignal[31 : 2]; + CsrPlugin_mtvec_mode <= CsrPlugin_csrMapping_writeDataSignal[1 : 0]; + end + end + if(execute_CsrPlugin_csr_833) begin + if(execute_CsrPlugin_writeEnable) begin + CsrPlugin_mepc <= CsrPlugin_csrMapping_writeDataSignal[31 : 0]; + end + end + if(execute_CsrPlugin_csr_832) begin + if(execute_CsrPlugin_writeEnable) begin + CsrPlugin_mscratch <= CsrPlugin_csrMapping_writeDataSignal[31 : 0]; + end + end + if(execute_CsrPlugin_csr_834) begin + if(execute_CsrPlugin_writeEnable) begin + CsrPlugin_mcause_interrupt <= CsrPlugin_csrMapping_writeDataSignal[31]; + CsrPlugin_mcause_exceptionCode <= CsrPlugin_csrMapping_writeDataSignal[3 : 0]; + end + end + if(execute_CsrPlugin_csr_835) begin + if(execute_CsrPlugin_writeEnable) begin + CsrPlugin_mtval <= CsrPlugin_csrMapping_writeDataSignal[31 : 0]; + end + end + if(execute_CsrPlugin_csr_2816) begin + if(execute_CsrPlugin_writeEnable) begin + CsrPlugin_mcycle[31 : 0] <= CsrPlugin_csrMapping_writeDataSignal[31 : 0]; + end + end + if(execute_CsrPlugin_csr_2944) begin + if(execute_CsrPlugin_writeEnable) begin + CsrPlugin_mcycle[63 : 32] <= CsrPlugin_csrMapping_writeDataSignal[31 : 0]; + end + end + if(execute_CsrPlugin_csr_2818) begin + if(execute_CsrPlugin_writeEnable) begin + CsrPlugin_minstret[31 : 0] <= CsrPlugin_csrMapping_writeDataSignal[31 : 0]; + end + end + if(execute_CsrPlugin_csr_2946) begin + if(execute_CsrPlugin_writeEnable) begin + CsrPlugin_minstret[63 : 32] <= CsrPlugin_csrMapping_writeDataSignal[31 : 0]; + end + end + iBusWishbone_DAT_MISO_regNext <= iBusWishbone_DAT_MISO; + dBusWishbone_DAT_MISO_regNext <= dBusWishbone_DAT_MISO; + end + + always @(posedge clk) begin + DebugPlugin_firstCycle <= 1'b0; + if(debug_bus_cmd_ready) begin + DebugPlugin_firstCycle <= 1'b1; + end + DebugPlugin_secondCycle <= DebugPlugin_firstCycle; + DebugPlugin_isPipBusy <= (({writeBack_arbitration_isValid,{memory_arbitration_isValid,{execute_arbitration_isValid,decode_arbitration_isValid}}} != 4'b0000) || IBusCachedPlugin_incomingInstruction); + if(writeBack_arbitration_isValid) begin + DebugPlugin_busReadDataReg <= _zz_decode_RS2_2; + end + _zz_when_DebugPlugin_l244 <= debug_bus_cmd_payload_address[2]; + if(when_DebugPlugin_l284) begin + DebugPlugin_busReadDataReg <= execute_PC; + end + DebugPlugin_resetIt_regNext <= DebugPlugin_resetIt; + end + + always @(posedge clk) begin + if(debugReset) begin + DebugPlugin_resetIt <= 1'b0; + DebugPlugin_haltIt <= 1'b0; + DebugPlugin_stepIt <= 1'b0; + DebugPlugin_godmode <= 1'b0; + DebugPlugin_haltedByBreak <= 1'b0; + DebugPlugin_debugUsed <= 1'b0; + DebugPlugin_disableEbreak <= 1'b0; + end else begin + if(when_DebugPlugin_l225) begin + DebugPlugin_godmode <= 1'b1; + end + if(debug_bus_cmd_valid) begin + DebugPlugin_debugUsed <= 1'b1; + end + if(debug_bus_cmd_valid) begin + case(switch_DebugPlugin_l256) + 6'h0 : begin + if(debug_bus_cmd_payload_wr) begin + DebugPlugin_stepIt <= debug_bus_cmd_payload_data[4]; + if(when_DebugPlugin_l260) begin + DebugPlugin_resetIt <= 1'b1; + end + if(when_DebugPlugin_l260_1) begin + DebugPlugin_resetIt <= 1'b0; + end + if(when_DebugPlugin_l261) begin + DebugPlugin_haltIt <= 1'b1; + end + if(when_DebugPlugin_l261_1) begin + DebugPlugin_haltIt <= 1'b0; + end + if(when_DebugPlugin_l262) begin + DebugPlugin_haltedByBreak <= 1'b0; + end + if(when_DebugPlugin_l263) begin + DebugPlugin_godmode <= 1'b0; + end + if(when_DebugPlugin_l264) begin + DebugPlugin_disableEbreak <= 1'b1; + end + if(when_DebugPlugin_l264_1) begin + DebugPlugin_disableEbreak <= 1'b0; + end + end + end + default : begin + end + endcase + end + if(when_DebugPlugin_l284) begin + if(when_DebugPlugin_l287) begin + DebugPlugin_haltIt <= 1'b1; + DebugPlugin_haltedByBreak <= 1'b1; + end + end + if(when_DebugPlugin_l300) begin + if(decode_arbitration_isValid) begin + DebugPlugin_haltIt <= 1'b1; + end + end + end + end + + +endmodule + +module DataCache ( + input io_cpu_execute_isValid, + input [31:0] io_cpu_execute_address, + output reg io_cpu_execute_haltIt, + input io_cpu_execute_args_wr, + input [1:0] io_cpu_execute_args_size, + input io_cpu_execute_args_totalyConsistent, + output io_cpu_execute_refilling, + input io_cpu_memory_isValid, + input io_cpu_memory_isStuck, + output io_cpu_memory_isWrite, + input [31:0] io_cpu_memory_address, + input [31:0] io_cpu_memory_mmuRsp_physicalAddress, + input io_cpu_memory_mmuRsp_isIoAccess, + input io_cpu_memory_mmuRsp_isPaging, + input io_cpu_memory_mmuRsp_allowRead, + input io_cpu_memory_mmuRsp_allowWrite, + input io_cpu_memory_mmuRsp_allowExecute, + input io_cpu_memory_mmuRsp_exception, + input io_cpu_memory_mmuRsp_refilling, + input io_cpu_memory_mmuRsp_bypassTranslation, + input io_cpu_writeBack_isValid, + input io_cpu_writeBack_isStuck, + input io_cpu_writeBack_isUser, + output reg io_cpu_writeBack_haltIt, + output io_cpu_writeBack_isWrite, + input [31:0] io_cpu_writeBack_storeData, + output reg [31:0] io_cpu_writeBack_data, + input [31:0] io_cpu_writeBack_address, + output io_cpu_writeBack_mmuException, + output io_cpu_writeBack_unalignedAccess, + output reg io_cpu_writeBack_accessError, + output io_cpu_writeBack_keepMemRspData, + input io_cpu_writeBack_fence_SW, + input io_cpu_writeBack_fence_SR, + input io_cpu_writeBack_fence_SO, + input io_cpu_writeBack_fence_SI, + input io_cpu_writeBack_fence_PW, + input io_cpu_writeBack_fence_PR, + input io_cpu_writeBack_fence_PO, + input io_cpu_writeBack_fence_PI, + input [3:0] io_cpu_writeBack_fence_FM, + output io_cpu_writeBack_exclusiveOk, + output reg io_cpu_redo, + input io_cpu_flush_valid, + output io_cpu_flush_ready, + output reg io_mem_cmd_valid, + input io_mem_cmd_ready, + output reg io_mem_cmd_payload_wr, + output io_mem_cmd_payload_uncached, + output reg [31:0] io_mem_cmd_payload_address, + output [31:0] io_mem_cmd_payload_data, + output [3:0] io_mem_cmd_payload_mask, + output reg [2:0] io_mem_cmd_payload_size, + output io_mem_cmd_payload_last, + input io_mem_rsp_valid, + input io_mem_rsp_payload_last, + input [31:0] io_mem_rsp_payload_data, + input io_mem_rsp_payload_error, + input clk, + input reset +); + reg [21:0] _zz_ways_0_tags_port0; + reg [31:0] _zz_ways_0_data_port0; + wire [21:0] _zz_ways_0_tags_port; + wire [9:0] _zz_stage0_dataColisions; + wire [9:0] _zz__zz_stageA_dataColisions; + wire [0:0] _zz_when; + wire [2:0] _zz_loader_counter_valueNext; + wire [0:0] _zz_loader_counter_valueNext_1; + wire [1:0] _zz_loader_waysAllocator; + reg _zz_1; + reg _zz_2; + wire haltCpu; + reg tagsReadCmd_valid; + reg [6:0] tagsReadCmd_payload; + reg tagsWriteCmd_valid; + reg [0:0] tagsWriteCmd_payload_way; + reg [6:0] tagsWriteCmd_payload_address; + reg tagsWriteCmd_payload_data_valid; + reg tagsWriteCmd_payload_data_error; + reg [19:0] tagsWriteCmd_payload_data_address; + reg tagsWriteLastCmd_valid; + reg [0:0] tagsWriteLastCmd_payload_way; + reg [6:0] tagsWriteLastCmd_payload_address; + reg tagsWriteLastCmd_payload_data_valid; + reg tagsWriteLastCmd_payload_data_error; + reg [19:0] tagsWriteLastCmd_payload_data_address; + reg dataReadCmd_valid; + reg [9:0] dataReadCmd_payload; + reg dataWriteCmd_valid; + reg [0:0] dataWriteCmd_payload_way; + reg [9:0] dataWriteCmd_payload_address; + reg [31:0] dataWriteCmd_payload_data; + reg [3:0] dataWriteCmd_payload_mask; + wire _zz_ways_0_tagsReadRsp_valid; + wire ways_0_tagsReadRsp_valid; + wire ways_0_tagsReadRsp_error; + wire [19:0] ways_0_tagsReadRsp_address; + wire [21:0] _zz_ways_0_tagsReadRsp_valid_1; + wire _zz_ways_0_dataReadRspMem; + wire [31:0] ways_0_dataReadRspMem; + wire [31:0] ways_0_dataReadRsp; + wire when_DataCache_l634; + wire when_DataCache_l637; + wire when_DataCache_l656; + wire rspSync; + wire rspLast; + reg memCmdSent; + wire io_mem_cmd_fire; + wire when_DataCache_l678; + reg [3:0] _zz_stage0_mask; + wire [3:0] stage0_mask; + wire [0:0] stage0_dataColisions; + wire [0:0] stage0_wayInvalidate; + wire stage0_isAmo; + wire when_DataCache_l763; + reg stageA_request_wr; + reg [1:0] stageA_request_size; + reg stageA_request_totalyConsistent; + wire when_DataCache_l763_1; + reg [3:0] stageA_mask; + wire stageA_isAmo; + wire stageA_isLrsc; + wire [0:0] stageA_wayHits; + wire when_DataCache_l763_2; + reg [0:0] stageA_wayInvalidate; + wire when_DataCache_l763_3; + reg [0:0] stage0_dataColisions_regNextWhen; + wire [0:0] _zz_stageA_dataColisions; + wire [0:0] stageA_dataColisions; + wire when_DataCache_l814; + reg stageB_request_wr; + reg [1:0] stageB_request_size; + reg stageB_request_totalyConsistent; + reg stageB_mmuRspFreeze; + wire when_DataCache_l816; + reg [31:0] stageB_mmuRsp_physicalAddress; + reg stageB_mmuRsp_isIoAccess; + reg stageB_mmuRsp_isPaging; + reg stageB_mmuRsp_allowRead; + reg stageB_mmuRsp_allowWrite; + reg stageB_mmuRsp_allowExecute; + reg stageB_mmuRsp_exception; + reg stageB_mmuRsp_refilling; + reg stageB_mmuRsp_bypassTranslation; + wire when_DataCache_l813; + reg stageB_tagsReadRsp_0_valid; + reg stageB_tagsReadRsp_0_error; + reg [19:0] stageB_tagsReadRsp_0_address; + wire when_DataCache_l813_1; + reg [31:0] stageB_dataReadRsp_0; + wire when_DataCache_l812; + reg [0:0] stageB_wayInvalidate; + wire stageB_consistancyHazard; + wire when_DataCache_l812_1; + reg [0:0] stageB_dataColisions; + wire when_DataCache_l812_2; + reg stageB_unaligned; + wire when_DataCache_l812_3; + reg [0:0] stageB_waysHitsBeforeInvalidate; + wire [0:0] stageB_waysHits; + wire stageB_waysHit; + wire [31:0] stageB_dataMux; + wire when_DataCache_l812_4; + reg [3:0] stageB_mask; + reg stageB_loaderValid; + wire [31:0] stageB_ioMemRspMuxed; + reg stageB_flusher_waitDone; + wire stageB_flusher_hold; + reg [7:0] stageB_flusher_counter; + wire when_DataCache_l842; + wire when_DataCache_l848; + reg stageB_flusher_start; + wire stageB_isAmo; + wire stageB_isAmoCached; + wire stageB_isExternalLsrc; + wire stageB_isExternalAmo; + wire [31:0] stageB_requestDataBypass; + reg stageB_cpuWriteToCache; + wire when_DataCache_l911; + wire stageB_badPermissions; + wire stageB_loadStoreFault; + wire stageB_bypassCache; + wire when_DataCache_l980; + wire when_DataCache_l989; + wire when_DataCache_l994; + wire when_DataCache_l1005; + wire when_DataCache_l1017; + wire when_DataCache_l976; + wire when_DataCache_l1051; + wire when_DataCache_l1060; + reg loader_valid; + reg loader_counter_willIncrement; + wire loader_counter_willClear; + reg [2:0] loader_counter_valueNext; + reg [2:0] loader_counter_value; + wire loader_counter_willOverflowIfInc; + wire loader_counter_willOverflow; + reg [0:0] loader_waysAllocator; + reg loader_error; + wire loader_kill; + reg loader_killReg; + wire when_DataCache_l1075; + wire loader_done; + wire when_DataCache_l1103; + reg loader_valid_regNext; + wire when_DataCache_l1107; + wire when_DataCache_l1110; + (* ram_style = "block" *) reg [21:0] ways_0_tags [0:127]; + (* ram_style = "block" *) reg [7:0] ways_0_data_symbol0 [0:1023]; + (* ram_style = "block" *) reg [7:0] ways_0_data_symbol1 [0:1023]; + (* ram_style = "block" *) reg [7:0] ways_0_data_symbol2 [0:1023]; + (* ram_style = "block" *) reg [7:0] ways_0_data_symbol3 [0:1023]; + reg [7:0] _zz_ways_0_datasymbol_read; + reg [7:0] _zz_ways_0_datasymbol_read_1; + reg [7:0] _zz_ways_0_datasymbol_read_2; + reg [7:0] _zz_ways_0_datasymbol_read_3; + + assign _zz_stage0_dataColisions = (io_cpu_execute_address[11 : 2] >>> 0); + assign _zz__zz_stageA_dataColisions = (io_cpu_memory_address[11 : 2] >>> 0); + assign _zz_when = 1'b1; + assign _zz_loader_counter_valueNext_1 = loader_counter_willIncrement; + assign _zz_loader_counter_valueNext = {2'd0, _zz_loader_counter_valueNext_1}; + assign _zz_loader_waysAllocator = {loader_waysAllocator,loader_waysAllocator[0]}; + assign _zz_ways_0_tags_port = {tagsWriteCmd_payload_data_address,{tagsWriteCmd_payload_data_error,tagsWriteCmd_payload_data_valid}}; + always @(posedge clk) begin + if(_zz_ways_0_tagsReadRsp_valid) begin + _zz_ways_0_tags_port0 <= ways_0_tags[tagsReadCmd_payload]; + end + end + + always @(posedge clk) begin + if(_zz_2) begin + ways_0_tags[tagsWriteCmd_payload_address] <= _zz_ways_0_tags_port; + end + end + + always @(*) begin + _zz_ways_0_data_port0 = {_zz_ways_0_datasymbol_read_3, _zz_ways_0_datasymbol_read_2, _zz_ways_0_datasymbol_read_1, _zz_ways_0_datasymbol_read}; + end + always @(posedge clk) begin + if(_zz_ways_0_dataReadRspMem) begin + _zz_ways_0_datasymbol_read <= ways_0_data_symbol0[dataReadCmd_payload]; + _zz_ways_0_datasymbol_read_1 <= ways_0_data_symbol1[dataReadCmd_payload]; + _zz_ways_0_datasymbol_read_2 <= ways_0_data_symbol2[dataReadCmd_payload]; + _zz_ways_0_datasymbol_read_3 <= ways_0_data_symbol3[dataReadCmd_payload]; + end + end + + always @(posedge clk) begin + if(dataWriteCmd_payload_mask[0] && _zz_1) begin + ways_0_data_symbol0[dataWriteCmd_payload_address] <= dataWriteCmd_payload_data[7 : 0]; + end + if(dataWriteCmd_payload_mask[1] && _zz_1) begin + ways_0_data_symbol1[dataWriteCmd_payload_address] <= dataWriteCmd_payload_data[15 : 8]; + end + if(dataWriteCmd_payload_mask[2] && _zz_1) begin + ways_0_data_symbol2[dataWriteCmd_payload_address] <= dataWriteCmd_payload_data[23 : 16]; + end + if(dataWriteCmd_payload_mask[3] && _zz_1) begin + ways_0_data_symbol3[dataWriteCmd_payload_address] <= dataWriteCmd_payload_data[31 : 24]; + end + end + + always @(*) begin + _zz_1 = 1'b0; + if(when_DataCache_l637) begin + _zz_1 = 1'b1; + end + end + + always @(*) begin + _zz_2 = 1'b0; + if(when_DataCache_l634) begin + _zz_2 = 1'b1; + end + end + + assign haltCpu = 1'b0; + assign _zz_ways_0_tagsReadRsp_valid = (tagsReadCmd_valid && (! io_cpu_memory_isStuck)); + assign _zz_ways_0_tagsReadRsp_valid_1 = _zz_ways_0_tags_port0; + assign ways_0_tagsReadRsp_valid = _zz_ways_0_tagsReadRsp_valid_1[0]; + assign ways_0_tagsReadRsp_error = _zz_ways_0_tagsReadRsp_valid_1[1]; + assign ways_0_tagsReadRsp_address = _zz_ways_0_tagsReadRsp_valid_1[21 : 2]; + assign _zz_ways_0_dataReadRspMem = (dataReadCmd_valid && (! io_cpu_memory_isStuck)); + assign ways_0_dataReadRspMem = _zz_ways_0_data_port0; + assign ways_0_dataReadRsp = ways_0_dataReadRspMem[31 : 0]; + assign when_DataCache_l634 = (tagsWriteCmd_valid && tagsWriteCmd_payload_way[0]); + assign when_DataCache_l637 = (dataWriteCmd_valid && dataWriteCmd_payload_way[0]); + always @(*) begin + tagsReadCmd_valid = 1'b0; + if(when_DataCache_l656) begin + tagsReadCmd_valid = 1'b1; + end + end + + always @(*) begin + tagsReadCmd_payload = 7'bxxxxxxx; + if(when_DataCache_l656) begin + tagsReadCmd_payload = io_cpu_execute_address[11 : 5]; + end + end + + always @(*) begin + dataReadCmd_valid = 1'b0; + if(when_DataCache_l656) begin + dataReadCmd_valid = 1'b1; + end + end + + always @(*) begin + dataReadCmd_payload = 10'bxxxxxxxxxx; + if(when_DataCache_l656) begin + dataReadCmd_payload = io_cpu_execute_address[11 : 2]; + end + end + + always @(*) begin + tagsWriteCmd_valid = 1'b0; + if(when_DataCache_l842) begin + tagsWriteCmd_valid = 1'b1; + end + if(when_DataCache_l1051) begin + tagsWriteCmd_valid = 1'b0; + end + if(loader_done) begin + tagsWriteCmd_valid = 1'b1; + end + end + + always @(*) begin + tagsWriteCmd_payload_way = 1'bx; + if(when_DataCache_l842) begin + tagsWriteCmd_payload_way = 1'b1; + end + if(loader_done) begin + tagsWriteCmd_payload_way = loader_waysAllocator; + end + end + + always @(*) begin + tagsWriteCmd_payload_address = 7'bxxxxxxx; + if(when_DataCache_l842) begin + tagsWriteCmd_payload_address = stageB_flusher_counter[6:0]; + end + if(loader_done) begin + tagsWriteCmd_payload_address = stageB_mmuRsp_physicalAddress[11 : 5]; + end + end + + always @(*) begin + tagsWriteCmd_payload_data_valid = 1'bx; + if(when_DataCache_l842) begin + tagsWriteCmd_payload_data_valid = 1'b0; + end + if(loader_done) begin + tagsWriteCmd_payload_data_valid = (! (loader_kill || loader_killReg)); + end + end + + always @(*) begin + tagsWriteCmd_payload_data_error = 1'bx; + if(loader_done) begin + tagsWriteCmd_payload_data_error = (loader_error || (io_mem_rsp_valid && io_mem_rsp_payload_error)); + end + end + + always @(*) begin + tagsWriteCmd_payload_data_address = 20'bxxxxxxxxxxxxxxxxxxxx; + if(loader_done) begin + tagsWriteCmd_payload_data_address = stageB_mmuRsp_physicalAddress[31 : 12]; + end + end + + always @(*) begin + dataWriteCmd_valid = 1'b0; + if(stageB_cpuWriteToCache) begin + if(when_DataCache_l911) begin + dataWriteCmd_valid = 1'b1; + end + end + if(when_DataCache_l1051) begin + dataWriteCmd_valid = 1'b0; + end + if(when_DataCache_l1075) begin + dataWriteCmd_valid = 1'b1; + end + end + + always @(*) begin + dataWriteCmd_payload_way = 1'bx; + if(stageB_cpuWriteToCache) begin + dataWriteCmd_payload_way = stageB_waysHits; + end + if(when_DataCache_l1075) begin + dataWriteCmd_payload_way = loader_waysAllocator; + end + end + + always @(*) begin + dataWriteCmd_payload_address = 10'bxxxxxxxxxx; + if(stageB_cpuWriteToCache) begin + dataWriteCmd_payload_address = stageB_mmuRsp_physicalAddress[11 : 2]; + end + if(when_DataCache_l1075) begin + dataWriteCmd_payload_address = {stageB_mmuRsp_physicalAddress[11 : 5],loader_counter_value}; + end + end + + always @(*) begin + dataWriteCmd_payload_data = 32'bxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx; + if(stageB_cpuWriteToCache) begin + dataWriteCmd_payload_data[31 : 0] = stageB_requestDataBypass; + end + if(when_DataCache_l1075) begin + dataWriteCmd_payload_data = io_mem_rsp_payload_data; + end + end + + always @(*) begin + dataWriteCmd_payload_mask = 4'bxxxx; + if(stageB_cpuWriteToCache) begin + dataWriteCmd_payload_mask = 4'b0000; + if(_zz_when[0]) begin + dataWriteCmd_payload_mask[3 : 0] = stageB_mask; + end + end + if(when_DataCache_l1075) begin + dataWriteCmd_payload_mask = 4'b1111; + end + end + + assign when_DataCache_l656 = (io_cpu_execute_isValid && (! io_cpu_memory_isStuck)); + always @(*) begin + io_cpu_execute_haltIt = 1'b0; + if(when_DataCache_l842) begin + io_cpu_execute_haltIt = 1'b1; + end + end + + assign rspSync = 1'b1; + assign rspLast = 1'b1; + assign io_mem_cmd_fire = (io_mem_cmd_valid && io_mem_cmd_ready); + assign when_DataCache_l678 = (! io_cpu_writeBack_isStuck); + always @(*) begin + _zz_stage0_mask = 4'bxxxx; + case(io_cpu_execute_args_size) + 2'b00 : begin + _zz_stage0_mask = 4'b0001; + end + 2'b01 : begin + _zz_stage0_mask = 4'b0011; + end + 2'b10 : begin + _zz_stage0_mask = 4'b1111; + end + default : begin + end + endcase + end + + assign stage0_mask = (_zz_stage0_mask <<< io_cpu_execute_address[1 : 0]); + assign stage0_dataColisions[0] = (((dataWriteCmd_valid && dataWriteCmd_payload_way[0]) && (dataWriteCmd_payload_address == _zz_stage0_dataColisions)) && ((stage0_mask & dataWriteCmd_payload_mask[3 : 0]) != 4'b0000)); + assign stage0_wayInvalidate = 1'b0; + assign stage0_isAmo = 1'b0; + assign when_DataCache_l763 = (! io_cpu_memory_isStuck); + assign when_DataCache_l763_1 = (! io_cpu_memory_isStuck); + assign io_cpu_memory_isWrite = stageA_request_wr; + assign stageA_isAmo = 1'b0; + assign stageA_isLrsc = 1'b0; + assign stageA_wayHits = ((io_cpu_memory_mmuRsp_physicalAddress[31 : 12] == ways_0_tagsReadRsp_address) && ways_0_tagsReadRsp_valid); + assign when_DataCache_l763_2 = (! io_cpu_memory_isStuck); + assign when_DataCache_l763_3 = (! io_cpu_memory_isStuck); + assign _zz_stageA_dataColisions[0] = (((dataWriteCmd_valid && dataWriteCmd_payload_way[0]) && (dataWriteCmd_payload_address == _zz__zz_stageA_dataColisions)) && ((stageA_mask & dataWriteCmd_payload_mask[3 : 0]) != 4'b0000)); + assign stageA_dataColisions = (stage0_dataColisions_regNextWhen | _zz_stageA_dataColisions); + assign when_DataCache_l814 = (! io_cpu_writeBack_isStuck); + always @(*) begin + stageB_mmuRspFreeze = 1'b0; + if(when_DataCache_l1110) begin + stageB_mmuRspFreeze = 1'b1; + end + end + + assign when_DataCache_l816 = ((! io_cpu_writeBack_isStuck) && (! stageB_mmuRspFreeze)); + assign when_DataCache_l813 = (! io_cpu_writeBack_isStuck); + assign when_DataCache_l813_1 = (! io_cpu_writeBack_isStuck); + assign when_DataCache_l812 = (! io_cpu_writeBack_isStuck); + assign stageB_consistancyHazard = 1'b0; + assign when_DataCache_l812_1 = (! io_cpu_writeBack_isStuck); + assign when_DataCache_l812_2 = (! io_cpu_writeBack_isStuck); + assign when_DataCache_l812_3 = (! io_cpu_writeBack_isStuck); + assign stageB_waysHits = (stageB_waysHitsBeforeInvalidate & (~ stageB_wayInvalidate)); + assign stageB_waysHit = (stageB_waysHits != 1'b0); + assign stageB_dataMux = stageB_dataReadRsp_0; + assign when_DataCache_l812_4 = (! io_cpu_writeBack_isStuck); + always @(*) begin + stageB_loaderValid = 1'b0; + if(io_cpu_writeBack_isValid) begin + if(!stageB_isExternalAmo) begin + if(!when_DataCache_l976) begin + if(!when_DataCache_l989) begin + if(io_mem_cmd_ready) begin + stageB_loaderValid = 1'b1; + end + end + end + end + end + if(when_DataCache_l1051) begin + stageB_loaderValid = 1'b0; + end + end + + assign stageB_ioMemRspMuxed = io_mem_rsp_payload_data[31 : 0]; + always @(*) begin + io_cpu_writeBack_haltIt = 1'b1; + if(io_cpu_writeBack_isValid) begin + if(!stageB_isExternalAmo) begin + if(when_DataCache_l976) begin + if(when_DataCache_l980) begin + io_cpu_writeBack_haltIt = 1'b0; + end + end else begin + if(when_DataCache_l989) begin + if(when_DataCache_l994) begin + io_cpu_writeBack_haltIt = 1'b0; + end + end + end + end + end + if(when_DataCache_l1051) begin + io_cpu_writeBack_haltIt = 1'b0; + end + end + + assign stageB_flusher_hold = 1'b0; + assign when_DataCache_l842 = (! stageB_flusher_counter[7]); + assign when_DataCache_l848 = (! stageB_flusher_hold); + assign io_cpu_flush_ready = (stageB_flusher_waitDone && stageB_flusher_counter[7]); + assign stageB_isAmo = 1'b0; + assign stageB_isAmoCached = 1'b0; + assign stageB_isExternalLsrc = 1'b0; + assign stageB_isExternalAmo = 1'b0; + assign stageB_requestDataBypass = io_cpu_writeBack_storeData; + always @(*) begin + stageB_cpuWriteToCache = 1'b0; + if(io_cpu_writeBack_isValid) begin + if(!stageB_isExternalAmo) begin + if(!when_DataCache_l976) begin + if(when_DataCache_l989) begin + stageB_cpuWriteToCache = 1'b1; + end + end + end + end + end + + assign when_DataCache_l911 = (stageB_request_wr && stageB_waysHit); + assign stageB_badPermissions = (((! stageB_mmuRsp_allowWrite) && stageB_request_wr) || ((! stageB_mmuRsp_allowRead) && ((! stageB_request_wr) || stageB_isAmo))); + assign stageB_loadStoreFault = (io_cpu_writeBack_isValid && (stageB_mmuRsp_exception || stageB_badPermissions)); + always @(*) begin + io_cpu_redo = 1'b0; + if(io_cpu_writeBack_isValid) begin + if(!stageB_isExternalAmo) begin + if(!when_DataCache_l976) begin + if(when_DataCache_l989) begin + if(when_DataCache_l1005) begin + io_cpu_redo = 1'b1; + end + end + end + end + end + if(when_DataCache_l1060) begin + io_cpu_redo = 1'b1; + end + if(when_DataCache_l1107) begin + io_cpu_redo = 1'b1; + end + end + + always @(*) begin + io_cpu_writeBack_accessError = 1'b0; + if(stageB_bypassCache) begin + io_cpu_writeBack_accessError = ((((! stageB_request_wr) && 1'b1) && io_mem_rsp_valid) && io_mem_rsp_payload_error); + end else begin + io_cpu_writeBack_accessError = (((stageB_waysHits & stageB_tagsReadRsp_0_error) != 1'b0) || (stageB_loadStoreFault && (! stageB_mmuRsp_isPaging))); + end + end + + assign io_cpu_writeBack_mmuException = (stageB_loadStoreFault && stageB_mmuRsp_isPaging); + assign io_cpu_writeBack_unalignedAccess = (io_cpu_writeBack_isValid && stageB_unaligned); + assign io_cpu_writeBack_isWrite = stageB_request_wr; + always @(*) begin + io_mem_cmd_valid = 1'b0; + if(io_cpu_writeBack_isValid) begin + if(!stageB_isExternalAmo) begin + if(when_DataCache_l976) begin + io_mem_cmd_valid = (! memCmdSent); + end else begin + if(when_DataCache_l989) begin + if(stageB_request_wr) begin + io_mem_cmd_valid = 1'b1; + end + end else begin + if(when_DataCache_l1017) begin + io_mem_cmd_valid = 1'b1; + end + end + end + end + end + if(when_DataCache_l1051) begin + io_mem_cmd_valid = 1'b0; + end + end + + always @(*) begin + io_mem_cmd_payload_address = stageB_mmuRsp_physicalAddress; + if(io_cpu_writeBack_isValid) begin + if(!stageB_isExternalAmo) begin + if(!when_DataCache_l976) begin + if(!when_DataCache_l989) begin + io_mem_cmd_payload_address[4 : 0] = 5'h0; + end + end + end + end + end + + assign io_mem_cmd_payload_last = 1'b1; + always @(*) begin + io_mem_cmd_payload_wr = stageB_request_wr; + if(io_cpu_writeBack_isValid) begin + if(!stageB_isExternalAmo) begin + if(!when_DataCache_l976) begin + if(!when_DataCache_l989) begin + io_mem_cmd_payload_wr = 1'b0; + end + end + end + end + end + + assign io_mem_cmd_payload_mask = stageB_mask; + assign io_mem_cmd_payload_data = stageB_requestDataBypass; + assign io_mem_cmd_payload_uncached = stageB_mmuRsp_isIoAccess; + always @(*) begin + io_mem_cmd_payload_size = {1'd0, stageB_request_size}; + if(io_cpu_writeBack_isValid) begin + if(!stageB_isExternalAmo) begin + if(!when_DataCache_l976) begin + if(!when_DataCache_l989) begin + io_mem_cmd_payload_size = 3'b101; + end + end + end + end + end + + assign stageB_bypassCache = ((stageB_mmuRsp_isIoAccess || stageB_isExternalLsrc) || stageB_isExternalAmo); + assign io_cpu_writeBack_keepMemRspData = 1'b0; + assign when_DataCache_l980 = ((! stageB_request_wr) ? (io_mem_rsp_valid && rspSync) : io_mem_cmd_ready); + assign when_DataCache_l989 = (stageB_waysHit || (stageB_request_wr && (! stageB_isAmoCached))); + assign when_DataCache_l994 = ((! stageB_request_wr) || io_mem_cmd_ready); + assign when_DataCache_l1005 = (((! stageB_request_wr) || stageB_isAmoCached) && ((stageB_dataColisions & stageB_waysHits) != 1'b0)); + assign when_DataCache_l1017 = (! memCmdSent); + assign when_DataCache_l976 = (stageB_mmuRsp_isIoAccess || stageB_isExternalLsrc); + always @(*) begin + if(stageB_bypassCache) begin + io_cpu_writeBack_data = stageB_ioMemRspMuxed; + end else begin + io_cpu_writeBack_data = stageB_dataMux; + end + end + + assign when_DataCache_l1051 = ((((stageB_consistancyHazard || stageB_mmuRsp_refilling) || io_cpu_writeBack_accessError) || io_cpu_writeBack_mmuException) || io_cpu_writeBack_unalignedAccess); + assign when_DataCache_l1060 = (io_cpu_writeBack_isValid && (stageB_mmuRsp_refilling || stageB_consistancyHazard)); + always @(*) begin + loader_counter_willIncrement = 1'b0; + if(when_DataCache_l1075) begin + loader_counter_willIncrement = 1'b1; + end + end + + assign loader_counter_willClear = 1'b0; + assign loader_counter_willOverflowIfInc = (loader_counter_value == 3'b111); + assign loader_counter_willOverflow = (loader_counter_willOverflowIfInc && loader_counter_willIncrement); + always @(*) begin + loader_counter_valueNext = (loader_counter_value + _zz_loader_counter_valueNext); + if(loader_counter_willClear) begin + loader_counter_valueNext = 3'b000; + end + end + + assign loader_kill = 1'b0; + assign when_DataCache_l1075 = ((loader_valid && io_mem_rsp_valid) && rspLast); + assign loader_done = loader_counter_willOverflow; + assign when_DataCache_l1103 = (! loader_valid); + assign when_DataCache_l1107 = (loader_valid && (! loader_valid_regNext)); + assign io_cpu_execute_refilling = loader_valid; + assign when_DataCache_l1110 = (stageB_loaderValid || loader_valid); + always @(posedge clk) begin + tagsWriteLastCmd_valid <= tagsWriteCmd_valid; + tagsWriteLastCmd_payload_way <= tagsWriteCmd_payload_way; + tagsWriteLastCmd_payload_address <= tagsWriteCmd_payload_address; + tagsWriteLastCmd_payload_data_valid <= tagsWriteCmd_payload_data_valid; + tagsWriteLastCmd_payload_data_error <= tagsWriteCmd_payload_data_error; + tagsWriteLastCmd_payload_data_address <= tagsWriteCmd_payload_data_address; + if(when_DataCache_l763) begin + stageA_request_wr <= io_cpu_execute_args_wr; + stageA_request_size <= io_cpu_execute_args_size; + stageA_request_totalyConsistent <= io_cpu_execute_args_totalyConsistent; + end + if(when_DataCache_l763_1) begin + stageA_mask <= stage0_mask; + end + if(when_DataCache_l763_2) begin + stageA_wayInvalidate <= stage0_wayInvalidate; + end + if(when_DataCache_l763_3) begin + stage0_dataColisions_regNextWhen <= stage0_dataColisions; + end + if(when_DataCache_l814) begin + stageB_request_wr <= stageA_request_wr; + stageB_request_size <= stageA_request_size; + stageB_request_totalyConsistent <= stageA_request_totalyConsistent; + end + if(when_DataCache_l816) begin + stageB_mmuRsp_physicalAddress <= io_cpu_memory_mmuRsp_physicalAddress; + stageB_mmuRsp_isIoAccess <= io_cpu_memory_mmuRsp_isIoAccess; + stageB_mmuRsp_isPaging <= io_cpu_memory_mmuRsp_isPaging; + stageB_mmuRsp_allowRead <= io_cpu_memory_mmuRsp_allowRead; + stageB_mmuRsp_allowWrite <= io_cpu_memory_mmuRsp_allowWrite; + stageB_mmuRsp_allowExecute <= io_cpu_memory_mmuRsp_allowExecute; + stageB_mmuRsp_exception <= io_cpu_memory_mmuRsp_exception; + stageB_mmuRsp_refilling <= io_cpu_memory_mmuRsp_refilling; + stageB_mmuRsp_bypassTranslation <= io_cpu_memory_mmuRsp_bypassTranslation; + end + if(when_DataCache_l813) begin + stageB_tagsReadRsp_0_valid <= ways_0_tagsReadRsp_valid; + stageB_tagsReadRsp_0_error <= ways_0_tagsReadRsp_error; + stageB_tagsReadRsp_0_address <= ways_0_tagsReadRsp_address; + end + if(when_DataCache_l813_1) begin + stageB_dataReadRsp_0 <= ways_0_dataReadRsp; + end + if(when_DataCache_l812) begin + stageB_wayInvalidate <= stageA_wayInvalidate; + end + if(when_DataCache_l812_1) begin + stageB_dataColisions <= stageA_dataColisions; + end + if(when_DataCache_l812_2) begin + stageB_unaligned <= ({((stageA_request_size == 2'b10) && (io_cpu_memory_address[1 : 0] != 2'b00)),((stageA_request_size == 2'b01) && (io_cpu_memory_address[0 : 0] != 1'b0))} != 2'b00); + end + if(when_DataCache_l812_3) begin + stageB_waysHitsBeforeInvalidate <= stageA_wayHits; + end + if(when_DataCache_l812_4) begin + stageB_mask <= stageA_mask; + end + loader_valid_regNext <= loader_valid; + end + + always @(posedge clk) begin + if(reset) begin + memCmdSent <= 1'b0; + stageB_flusher_waitDone <= 1'b0; + stageB_flusher_counter <= 8'h0; + stageB_flusher_start <= 1'b1; + loader_valid <= 1'b0; + loader_counter_value <= 3'b000; + loader_waysAllocator <= 1'b1; + loader_error <= 1'b0; + loader_killReg <= 1'b0; + end else begin + if(io_mem_cmd_fire) begin + memCmdSent <= 1'b1; + end + if(when_DataCache_l678) begin + memCmdSent <= 1'b0; + end + if(io_cpu_flush_ready) begin + stageB_flusher_waitDone <= 1'b0; + end + if(when_DataCache_l842) begin + if(when_DataCache_l848) begin + stageB_flusher_counter <= (stageB_flusher_counter + 8'h01); + end + end + stageB_flusher_start <= (((((((! stageB_flusher_waitDone) && (! stageB_flusher_start)) && io_cpu_flush_valid) && (! io_cpu_execute_isValid)) && (! io_cpu_memory_isValid)) && (! io_cpu_writeBack_isValid)) && (! io_cpu_redo)); + if(stageB_flusher_start) begin + stageB_flusher_waitDone <= 1'b1; + stageB_flusher_counter <= 8'h0; + end + `ifndef SYNTHESIS + `ifdef FORMAL + assert((! ((io_cpu_writeBack_isValid && (! io_cpu_writeBack_haltIt)) && io_cpu_writeBack_isStuck))); + `else + if(!(! ((io_cpu_writeBack_isValid && (! io_cpu_writeBack_haltIt)) && io_cpu_writeBack_isStuck))) begin + $display("ERROR writeBack stuck by another plugin is not allowed"); + end + `endif + `endif + if(stageB_loaderValid) begin + loader_valid <= 1'b1; + end + loader_counter_value <= loader_counter_valueNext; + if(loader_kill) begin + loader_killReg <= 1'b1; + end + if(when_DataCache_l1075) begin + loader_error <= (loader_error || io_mem_rsp_payload_error); + end + if(loader_done) begin + loader_valid <= 1'b0; + loader_error <= 1'b0; + loader_killReg <= 1'b0; + end + if(when_DataCache_l1103) begin + loader_waysAllocator <= _zz_loader_waysAllocator[0:0]; + end + end + end + + +endmodule + +module InstructionCache ( + input io_flush, + input io_cpu_prefetch_isValid, + output reg io_cpu_prefetch_haltIt, + input [31:0] io_cpu_prefetch_pc, + input io_cpu_fetch_isValid, + input io_cpu_fetch_isStuck, + input io_cpu_fetch_isRemoved, + input [31:0] io_cpu_fetch_pc, + output [31:0] io_cpu_fetch_data, + input [31:0] io_cpu_fetch_mmuRsp_physicalAddress, + input io_cpu_fetch_mmuRsp_isIoAccess, + input io_cpu_fetch_mmuRsp_isPaging, + input io_cpu_fetch_mmuRsp_allowRead, + input io_cpu_fetch_mmuRsp_allowWrite, + input io_cpu_fetch_mmuRsp_allowExecute, + input io_cpu_fetch_mmuRsp_exception, + input io_cpu_fetch_mmuRsp_refilling, + input io_cpu_fetch_mmuRsp_bypassTranslation, + output [31:0] io_cpu_fetch_physicalAddress, + input io_cpu_decode_isValid, + input io_cpu_decode_isStuck, + input [31:0] io_cpu_decode_pc, + output [31:0] io_cpu_decode_physicalAddress, + output [31:0] io_cpu_decode_data, + output io_cpu_decode_cacheMiss, + output io_cpu_decode_error, + output io_cpu_decode_mmuRefilling, + output io_cpu_decode_mmuException, + input io_cpu_decode_isUser, + input io_cpu_fill_valid, + input [31:0] io_cpu_fill_payload, + output io_mem_cmd_valid, + input io_mem_cmd_ready, + output [31:0] io_mem_cmd_payload_address, + output [2:0] io_mem_cmd_payload_size, + input io_mem_rsp_valid, + input [31:0] io_mem_rsp_payload_data, + input io_mem_rsp_payload_error, + input [2:0] _zz_when_Fetcher_l398, + input [31:0] _zz_io_cpu_fetch_data_regNextWhen, + input clk, + input reset +); + reg [31:0] _zz_banks_0_port1; + reg [22:0] _zz_ways_0_tags_port1; + wire [22:0] _zz_ways_0_tags_port; + reg _zz_1; + reg _zz_2; + reg lineLoader_fire; + reg lineLoader_valid; + (* keep , syn_keep *) reg [31:0] lineLoader_address /* synthesis syn_keep = 1 */ ; + reg lineLoader_hadError; + reg lineLoader_flushPending; + reg [6:0] lineLoader_flushCounter; + wire when_InstructionCache_l338; + reg _zz_when_InstructionCache_l342; + wire when_InstructionCache_l342; + wire when_InstructionCache_l351; + reg lineLoader_cmdSent; + wire io_mem_cmd_fire; + wire when_Utils_l357; + reg lineLoader_wayToAllocate_willIncrement; + wire lineLoader_wayToAllocate_willClear; + wire lineLoader_wayToAllocate_willOverflowIfInc; + wire lineLoader_wayToAllocate_willOverflow; + (* keep , syn_keep *) reg [2:0] lineLoader_wordIndex /* synthesis syn_keep = 1 */ ; + wire lineLoader_write_tag_0_valid; + wire [5:0] lineLoader_write_tag_0_payload_address; + wire lineLoader_write_tag_0_payload_data_valid; + wire lineLoader_write_tag_0_payload_data_error; + wire [20:0] lineLoader_write_tag_0_payload_data_address; + wire lineLoader_write_data_0_valid; + wire [8:0] lineLoader_write_data_0_payload_address; + wire [31:0] lineLoader_write_data_0_payload_data; + wire when_InstructionCache_l401; + wire [8:0] _zz_fetchStage_read_banksValue_0_dataMem; + wire _zz_fetchStage_read_banksValue_0_dataMem_1; + wire [31:0] fetchStage_read_banksValue_0_dataMem; + wire [31:0] fetchStage_read_banksValue_0_data; + wire [5:0] _zz_fetchStage_read_waysValues_0_tag_valid; + wire _zz_fetchStage_read_waysValues_0_tag_valid_1; + wire fetchStage_read_waysValues_0_tag_valid; + wire fetchStage_read_waysValues_0_tag_error; + wire [20:0] fetchStage_read_waysValues_0_tag_address; + wire [22:0] _zz_fetchStage_read_waysValues_0_tag_valid_2; + wire fetchStage_hit_hits_0; + wire fetchStage_hit_valid; + wire fetchStage_hit_error; + wire [31:0] fetchStage_hit_data; + wire [31:0] fetchStage_hit_word; + wire when_InstructionCache_l435; + reg [31:0] io_cpu_fetch_data_regNextWhen; + wire when_InstructionCache_l459; + reg [31:0] decodeStage_mmuRsp_physicalAddress; + reg decodeStage_mmuRsp_isIoAccess; + reg decodeStage_mmuRsp_isPaging; + reg decodeStage_mmuRsp_allowRead; + reg decodeStage_mmuRsp_allowWrite; + reg decodeStage_mmuRsp_allowExecute; + reg decodeStage_mmuRsp_exception; + reg decodeStage_mmuRsp_refilling; + reg decodeStage_mmuRsp_bypassTranslation; + wire when_InstructionCache_l459_1; + reg decodeStage_hit_valid; + wire when_InstructionCache_l459_2; + reg decodeStage_hit_error; + wire when_Fetcher_l398; + (* ram_style = "block" *) reg [31:0] banks_0 [0:511]; + (* ram_style = "block" *) reg [22:0] ways_0_tags [0:63]; + + assign _zz_ways_0_tags_port = {lineLoader_write_tag_0_payload_data_address,{lineLoader_write_tag_0_payload_data_error,lineLoader_write_tag_0_payload_data_valid}}; + always @(posedge clk) begin + if(_zz_1) begin + banks_0[lineLoader_write_data_0_payload_address] <= lineLoader_write_data_0_payload_data; + end + end + + always @(posedge clk) begin + if(_zz_fetchStage_read_banksValue_0_dataMem_1) begin + _zz_banks_0_port1 <= banks_0[_zz_fetchStage_read_banksValue_0_dataMem]; + end + end + + always @(posedge clk) begin + if(_zz_2) begin + ways_0_tags[lineLoader_write_tag_0_payload_address] <= _zz_ways_0_tags_port; + end + end + + always @(posedge clk) begin + if(_zz_fetchStage_read_waysValues_0_tag_valid_1) begin + _zz_ways_0_tags_port1 <= ways_0_tags[_zz_fetchStage_read_waysValues_0_tag_valid]; + end + end + + always @(*) begin + _zz_1 = 1'b0; + if(lineLoader_write_data_0_valid) begin + _zz_1 = 1'b1; + end + end + + always @(*) begin + _zz_2 = 1'b0; + if(lineLoader_write_tag_0_valid) begin + _zz_2 = 1'b1; + end + end + + always @(*) begin + lineLoader_fire = 1'b0; + if(io_mem_rsp_valid) begin + if(when_InstructionCache_l401) begin + lineLoader_fire = 1'b1; + end + end + end + + always @(*) begin + io_cpu_prefetch_haltIt = (lineLoader_valid || lineLoader_flushPending); + if(when_InstructionCache_l338) begin + io_cpu_prefetch_haltIt = 1'b1; + end + if(when_InstructionCache_l342) begin + io_cpu_prefetch_haltIt = 1'b1; + end + if(io_flush) begin + io_cpu_prefetch_haltIt = 1'b1; + end + end + + assign when_InstructionCache_l338 = (! lineLoader_flushCounter[6]); + assign when_InstructionCache_l342 = (! _zz_when_InstructionCache_l342); + assign when_InstructionCache_l351 = (lineLoader_flushPending && (! (lineLoader_valid || io_cpu_fetch_isValid))); + assign io_mem_cmd_fire = (io_mem_cmd_valid && io_mem_cmd_ready); + assign io_mem_cmd_valid = (lineLoader_valid && (! lineLoader_cmdSent)); + assign io_mem_cmd_payload_address = {lineLoader_address[31 : 5],5'h0}; + assign io_mem_cmd_payload_size = 3'b101; + assign when_Utils_l357 = (! lineLoader_valid); + always @(*) begin + lineLoader_wayToAllocate_willIncrement = 1'b0; + if(when_Utils_l357) begin + lineLoader_wayToAllocate_willIncrement = 1'b1; + end + end + + assign lineLoader_wayToAllocate_willClear = 1'b0; + assign lineLoader_wayToAllocate_willOverflowIfInc = 1'b1; + assign lineLoader_wayToAllocate_willOverflow = (lineLoader_wayToAllocate_willOverflowIfInc && lineLoader_wayToAllocate_willIncrement); + assign lineLoader_write_tag_0_valid = ((1'b1 && lineLoader_fire) || (! lineLoader_flushCounter[6])); + assign lineLoader_write_tag_0_payload_address = (lineLoader_flushCounter[6] ? lineLoader_address[10 : 5] : lineLoader_flushCounter[5 : 0]); + assign lineLoader_write_tag_0_payload_data_valid = lineLoader_flushCounter[6]; + assign lineLoader_write_tag_0_payload_data_error = (lineLoader_hadError || io_mem_rsp_payload_error); + assign lineLoader_write_tag_0_payload_data_address = lineLoader_address[31 : 11]; + assign lineLoader_write_data_0_valid = (io_mem_rsp_valid && 1'b1); + assign lineLoader_write_data_0_payload_address = {lineLoader_address[10 : 5],lineLoader_wordIndex}; + assign lineLoader_write_data_0_payload_data = io_mem_rsp_payload_data; + assign when_InstructionCache_l401 = (lineLoader_wordIndex == 3'b111); + assign _zz_fetchStage_read_banksValue_0_dataMem = io_cpu_prefetch_pc[10 : 2]; + assign _zz_fetchStage_read_banksValue_0_dataMem_1 = (! io_cpu_fetch_isStuck); + assign fetchStage_read_banksValue_0_dataMem = _zz_banks_0_port1; + assign fetchStage_read_banksValue_0_data = fetchStage_read_banksValue_0_dataMem[31 : 0]; + assign _zz_fetchStage_read_waysValues_0_tag_valid = io_cpu_prefetch_pc[10 : 5]; + assign _zz_fetchStage_read_waysValues_0_tag_valid_1 = (! io_cpu_fetch_isStuck); + assign _zz_fetchStage_read_waysValues_0_tag_valid_2 = _zz_ways_0_tags_port1; + assign fetchStage_read_waysValues_0_tag_valid = _zz_fetchStage_read_waysValues_0_tag_valid_2[0]; + assign fetchStage_read_waysValues_0_tag_error = _zz_fetchStage_read_waysValues_0_tag_valid_2[1]; + assign fetchStage_read_waysValues_0_tag_address = _zz_fetchStage_read_waysValues_0_tag_valid_2[22 : 2]; + assign fetchStage_hit_hits_0 = (fetchStage_read_waysValues_0_tag_valid && (fetchStage_read_waysValues_0_tag_address == io_cpu_fetch_mmuRsp_physicalAddress[31 : 11])); + assign fetchStage_hit_valid = (fetchStage_hit_hits_0 != 1'b0); + assign fetchStage_hit_error = fetchStage_read_waysValues_0_tag_error; + assign fetchStage_hit_data = fetchStage_read_banksValue_0_data; + assign fetchStage_hit_word = fetchStage_hit_data; + assign io_cpu_fetch_data = fetchStage_hit_word; + assign when_InstructionCache_l435 = (! io_cpu_decode_isStuck); + assign io_cpu_decode_data = io_cpu_fetch_data_regNextWhen; + assign io_cpu_fetch_physicalAddress = io_cpu_fetch_mmuRsp_physicalAddress; + assign when_InstructionCache_l459 = (! io_cpu_decode_isStuck); + assign when_InstructionCache_l459_1 = (! io_cpu_decode_isStuck); + assign when_InstructionCache_l459_2 = (! io_cpu_decode_isStuck); + assign io_cpu_decode_cacheMiss = (! decodeStage_hit_valid); + assign io_cpu_decode_error = (decodeStage_hit_error || ((! decodeStage_mmuRsp_isPaging) && (decodeStage_mmuRsp_exception || (! decodeStage_mmuRsp_allowExecute)))); + assign io_cpu_decode_mmuRefilling = decodeStage_mmuRsp_refilling; + assign io_cpu_decode_mmuException = (((! decodeStage_mmuRsp_refilling) && decodeStage_mmuRsp_isPaging) && (decodeStage_mmuRsp_exception || (! decodeStage_mmuRsp_allowExecute))); + assign io_cpu_decode_physicalAddress = decodeStage_mmuRsp_physicalAddress; + assign when_Fetcher_l398 = (_zz_when_Fetcher_l398 != 3'b000); + always @(posedge clk) begin + if(reset) begin + lineLoader_valid <= 1'b0; + lineLoader_hadError <= 1'b0; + lineLoader_flushPending <= 1'b1; + lineLoader_cmdSent <= 1'b0; + lineLoader_wordIndex <= 3'b000; + end else begin + if(lineLoader_fire) begin + lineLoader_valid <= 1'b0; + end + if(lineLoader_fire) begin + lineLoader_hadError <= 1'b0; + end + if(io_cpu_fill_valid) begin + lineLoader_valid <= 1'b1; + end + if(io_flush) begin + lineLoader_flushPending <= 1'b1; + end + if(when_InstructionCache_l351) begin + lineLoader_flushPending <= 1'b0; + end + if(io_mem_cmd_fire) begin + lineLoader_cmdSent <= 1'b1; + end + if(lineLoader_fire) begin + lineLoader_cmdSent <= 1'b0; + end + if(io_mem_rsp_valid) begin + lineLoader_wordIndex <= (lineLoader_wordIndex + 3'b001); + if(io_mem_rsp_payload_error) begin + lineLoader_hadError <= 1'b1; + end + end + end + end + + always @(posedge clk) begin + if(io_cpu_fill_valid) begin + lineLoader_address <= io_cpu_fill_payload; + end + if(when_InstructionCache_l338) begin + lineLoader_flushCounter <= (lineLoader_flushCounter + 7'h01); + end + _zz_when_InstructionCache_l342 <= lineLoader_flushCounter[6]; + if(when_InstructionCache_l351) begin + lineLoader_flushCounter <= 7'h0; + end + if(when_InstructionCache_l435) begin + io_cpu_fetch_data_regNextWhen <= io_cpu_fetch_data; + end + if(when_InstructionCache_l459) begin + decodeStage_mmuRsp_physicalAddress <= io_cpu_fetch_mmuRsp_physicalAddress; + decodeStage_mmuRsp_isIoAccess <= io_cpu_fetch_mmuRsp_isIoAccess; + decodeStage_mmuRsp_isPaging <= io_cpu_fetch_mmuRsp_isPaging; + decodeStage_mmuRsp_allowRead <= io_cpu_fetch_mmuRsp_allowRead; + decodeStage_mmuRsp_allowWrite <= io_cpu_fetch_mmuRsp_allowWrite; + decodeStage_mmuRsp_allowExecute <= io_cpu_fetch_mmuRsp_allowExecute; + decodeStage_mmuRsp_exception <= io_cpu_fetch_mmuRsp_exception; + decodeStage_mmuRsp_refilling <= io_cpu_fetch_mmuRsp_refilling; + decodeStage_mmuRsp_bypassTranslation <= io_cpu_fetch_mmuRsp_bypassTranslation; + end + if(when_InstructionCache_l459_1) begin + decodeStage_hit_valid <= fetchStage_hit_valid; + end + if(when_InstructionCache_l459_2) begin + decodeStage_hit_error <= fetchStage_hit_error; + end + if(when_Fetcher_l398) begin + io_cpu_fetch_data_regNextWhen <= _zz_io_cpu_fetch_data_regNextWhen; + end + end + + +endmodule diff --git a/pythondata_cpu_vexriscv/verilog/VexRiscv_SlimCfuDebug.yaml b/pythondata_cpu_vexriscv/verilog/VexRiscv_SlimCfuDebug.yaml new file mode 100644 index 0000000..75d2f32 --- /dev/null +++ b/pythondata_cpu_vexriscv/verilog/VexRiscv_SlimCfuDebug.yaml @@ -0,0 +1,5 @@ +debug: !!vexriscv.DebugReport {hardwareBreakpointCount: 0} +iBus: !!vexriscv.BusReport + flushInstructions: [4111, 19, 19, 19] + info: !!vexriscv.CacheReport {bytePerLine: 32, size: 2048} + kind: cached diff --git a/pythondata_cpu_vexriscv/verilog/VexRiscv_SlimPerfCfu.v b/pythondata_cpu_vexriscv/verilog/VexRiscv_SlimPerfCfu.v new file mode 100644 index 0000000..726e688 --- /dev/null +++ b/pythondata_cpu_vexriscv/verilog/VexRiscv_SlimPerfCfu.v @@ -0,0 +1,7288 @@ +// Generator : SpinalHDL v1.6.0 git head : 73c8d8e2b86b45646e9d0b2e729291f2b65e6be3 +// Component : VexRiscv +// Git hash : 593e180abf5ba39e7fa33d4f371646453f84496a + + +`define Input2Kind_binary_sequential_type [0:0] +`define Input2Kind_binary_sequential_RS 1'b0 +`define Input2Kind_binary_sequential_IMM_I 1'b1 + +`define EnvCtrlEnum_binary_sequential_type [1:0] +`define EnvCtrlEnum_binary_sequential_NONE 2'b00 +`define EnvCtrlEnum_binary_sequential_XRET 2'b01 +`define EnvCtrlEnum_binary_sequential_WFI 2'b10 +`define EnvCtrlEnum_binary_sequential_ECALL 2'b11 + +`define BranchCtrlEnum_binary_sequential_type [1:0] +`define BranchCtrlEnum_binary_sequential_INC 2'b00 +`define BranchCtrlEnum_binary_sequential_B 2'b01 +`define BranchCtrlEnum_binary_sequential_JAL 2'b10 +`define BranchCtrlEnum_binary_sequential_JALR 2'b11 + +`define ShiftCtrlEnum_binary_sequential_type [1:0] +`define ShiftCtrlEnum_binary_sequential_DISABLE_1 2'b00 +`define ShiftCtrlEnum_binary_sequential_SLL_1 2'b01 +`define ShiftCtrlEnum_binary_sequential_SRL_1 2'b10 +`define ShiftCtrlEnum_binary_sequential_SRA_1 2'b11 + +`define AluBitwiseCtrlEnum_binary_sequential_type [1:0] +`define AluBitwiseCtrlEnum_binary_sequential_XOR_1 2'b00 +`define AluBitwiseCtrlEnum_binary_sequential_OR_1 2'b01 +`define AluBitwiseCtrlEnum_binary_sequential_AND_1 2'b10 + +`define Src2CtrlEnum_binary_sequential_type [1:0] +`define Src2CtrlEnum_binary_sequential_RS 2'b00 +`define Src2CtrlEnum_binary_sequential_IMI 2'b01 +`define Src2CtrlEnum_binary_sequential_IMS 2'b10 +`define Src2CtrlEnum_binary_sequential_PC 2'b11 + +`define AluCtrlEnum_binary_sequential_type [1:0] +`define AluCtrlEnum_binary_sequential_ADD_SUB 2'b00 +`define AluCtrlEnum_binary_sequential_SLT_SLTU 2'b01 +`define AluCtrlEnum_binary_sequential_BITWISE 2'b10 + +`define Src1CtrlEnum_binary_sequential_type [1:0] +`define Src1CtrlEnum_binary_sequential_RS 2'b00 +`define Src1CtrlEnum_binary_sequential_IMU 2'b01 +`define Src1CtrlEnum_binary_sequential_PC_INCREMENT 2'b10 +`define Src1CtrlEnum_binary_sequential_URS1 2'b11 + + +module VexRiscv ( + input [31:0] externalResetVector, + input timerInterrupt, + input softwareInterrupt, + input [31:0] externalInterruptArray, + output CfuPlugin_bus_cmd_valid, + input CfuPlugin_bus_cmd_ready, + output [9:0] CfuPlugin_bus_cmd_payload_function_id, + output [31:0] CfuPlugin_bus_cmd_payload_inputs_0, + output [31:0] CfuPlugin_bus_cmd_payload_inputs_1, + input CfuPlugin_bus_rsp_valid, + output CfuPlugin_bus_rsp_ready, + input [31:0] CfuPlugin_bus_rsp_payload_outputs_0, + output reg iBusWishbone_CYC, + output reg iBusWishbone_STB, + input iBusWishbone_ACK, + output iBusWishbone_WE, + output [29:0] iBusWishbone_ADR, + input [31:0] iBusWishbone_DAT_MISO, + output [31:0] iBusWishbone_DAT_MOSI, + output [3:0] iBusWishbone_SEL, + input iBusWishbone_ERR, + output [2:0] iBusWishbone_CTI, + output [1:0] iBusWishbone_BTE, + output dBusWishbone_CYC, + output dBusWishbone_STB, + input dBusWishbone_ACK, + output dBusWishbone_WE, + output [29:0] dBusWishbone_ADR, + input [31:0] dBusWishbone_DAT_MISO, + output [31:0] dBusWishbone_DAT_MOSI, + output [3:0] dBusWishbone_SEL, + input dBusWishbone_ERR, + output [2:0] dBusWishbone_CTI, + output [1:0] dBusWishbone_BTE, + input clk, + input reset +); + wire IBusCachedPlugin_cache_io_flush; + wire IBusCachedPlugin_cache_io_cpu_prefetch_isValid; + wire IBusCachedPlugin_cache_io_cpu_fetch_isValid; + wire IBusCachedPlugin_cache_io_cpu_fetch_isStuck; + wire IBusCachedPlugin_cache_io_cpu_fetch_isRemoved; + wire IBusCachedPlugin_cache_io_cpu_decode_isValid; + wire IBusCachedPlugin_cache_io_cpu_decode_isStuck; + wire IBusCachedPlugin_cache_io_cpu_decode_isUser; + reg IBusCachedPlugin_cache_io_cpu_fill_valid; + wire dataCache_1_io_cpu_execute_isValid; + wire [31:0] dataCache_1_io_cpu_execute_address; + wire dataCache_1_io_cpu_memory_isValid; + wire [31:0] dataCache_1_io_cpu_memory_address; + reg dataCache_1_io_cpu_memory_mmuRsp_isIoAccess; + reg dataCache_1_io_cpu_writeBack_isValid; + wire dataCache_1_io_cpu_writeBack_isUser; + wire [31:0] dataCache_1_io_cpu_writeBack_storeData; + wire [31:0] dataCache_1_io_cpu_writeBack_address; + wire dataCache_1_io_cpu_writeBack_fence_SW; + wire dataCache_1_io_cpu_writeBack_fence_SR; + wire dataCache_1_io_cpu_writeBack_fence_SO; + wire dataCache_1_io_cpu_writeBack_fence_SI; + wire dataCache_1_io_cpu_writeBack_fence_PW; + wire dataCache_1_io_cpu_writeBack_fence_PR; + wire dataCache_1_io_cpu_writeBack_fence_PO; + wire dataCache_1_io_cpu_writeBack_fence_PI; + wire [3:0] dataCache_1_io_cpu_writeBack_fence_FM; + wire dataCache_1_io_cpu_flush_valid; + wire dataCache_1_io_mem_cmd_ready; + reg [31:0] _zz_RegFilePlugin_regFile_port0; + reg [31:0] _zz_RegFilePlugin_regFile_port1; + wire IBusCachedPlugin_cache_io_cpu_prefetch_haltIt; + wire [31:0] IBusCachedPlugin_cache_io_cpu_fetch_data; + wire [31:0] IBusCachedPlugin_cache_io_cpu_fetch_physicalAddress; + wire IBusCachedPlugin_cache_io_cpu_decode_error; + wire IBusCachedPlugin_cache_io_cpu_decode_mmuRefilling; + wire IBusCachedPlugin_cache_io_cpu_decode_mmuException; + wire [31:0] IBusCachedPlugin_cache_io_cpu_decode_data; + wire IBusCachedPlugin_cache_io_cpu_decode_cacheMiss; + wire [31:0] IBusCachedPlugin_cache_io_cpu_decode_physicalAddress; + wire IBusCachedPlugin_cache_io_mem_cmd_valid; + wire [31:0] IBusCachedPlugin_cache_io_mem_cmd_payload_address; + wire [2:0] IBusCachedPlugin_cache_io_mem_cmd_payload_size; + wire dataCache_1_io_cpu_execute_haltIt; + wire dataCache_1_io_cpu_execute_refilling; + wire dataCache_1_io_cpu_memory_isWrite; + wire dataCache_1_io_cpu_writeBack_haltIt; + wire [31:0] dataCache_1_io_cpu_writeBack_data; + wire dataCache_1_io_cpu_writeBack_mmuException; + wire dataCache_1_io_cpu_writeBack_unalignedAccess; + wire dataCache_1_io_cpu_writeBack_accessError; + wire dataCache_1_io_cpu_writeBack_isWrite; + wire dataCache_1_io_cpu_writeBack_keepMemRspData; + wire dataCache_1_io_cpu_writeBack_exclusiveOk; + wire dataCache_1_io_cpu_flush_ready; + wire dataCache_1_io_cpu_redo; + wire dataCache_1_io_mem_cmd_valid; + wire dataCache_1_io_mem_cmd_payload_wr; + wire dataCache_1_io_mem_cmd_payload_uncached; + wire [31:0] dataCache_1_io_mem_cmd_payload_address; + wire [31:0] dataCache_1_io_mem_cmd_payload_data; + wire [3:0] dataCache_1_io_mem_cmd_payload_mask; + wire [2:0] dataCache_1_io_mem_cmd_payload_size; + wire dataCache_1_io_mem_cmd_payload_last; + wire [51:0] _zz_memory_MUL_LOW; + wire [51:0] _zz_memory_MUL_LOW_1; + wire [51:0] _zz_memory_MUL_LOW_2; + wire [51:0] _zz_memory_MUL_LOW_3; + wire [32:0] _zz_memory_MUL_LOW_4; + wire [51:0] _zz_memory_MUL_LOW_5; + wire [49:0] _zz_memory_MUL_LOW_6; + wire [51:0] _zz_memory_MUL_LOW_7; + wire [49:0] _zz_memory_MUL_LOW_8; + wire [31:0] _zz_execute_SHIFT_RIGHT; + wire [32:0] _zz_execute_SHIFT_RIGHT_1; + wire [32:0] _zz_execute_SHIFT_RIGHT_2; + wire [31:0] _zz_decode_LEGAL_INSTRUCTION; + wire [31:0] _zz_decode_LEGAL_INSTRUCTION_1; + wire [31:0] _zz_decode_LEGAL_INSTRUCTION_2; + wire _zz_decode_LEGAL_INSTRUCTION_3; + wire [0:0] _zz_decode_LEGAL_INSTRUCTION_4; + wire [14:0] _zz_decode_LEGAL_INSTRUCTION_5; + wire [31:0] _zz_decode_LEGAL_INSTRUCTION_6; + wire [31:0] _zz_decode_LEGAL_INSTRUCTION_7; + wire [31:0] _zz_decode_LEGAL_INSTRUCTION_8; + wire _zz_decode_LEGAL_INSTRUCTION_9; + wire [0:0] _zz_decode_LEGAL_INSTRUCTION_10; + wire [8:0] _zz_decode_LEGAL_INSTRUCTION_11; + wire [31:0] _zz_decode_LEGAL_INSTRUCTION_12; + wire [31:0] _zz_decode_LEGAL_INSTRUCTION_13; + wire [31:0] _zz_decode_LEGAL_INSTRUCTION_14; + wire _zz_decode_LEGAL_INSTRUCTION_15; + wire [0:0] _zz_decode_LEGAL_INSTRUCTION_16; + wire [2:0] _zz_decode_LEGAL_INSTRUCTION_17; + wire [3:0] _zz__zz_IBusCachedPlugin_jump_pcLoad_payload_1; + reg [31:0] _zz_IBusCachedPlugin_jump_pcLoad_payload_5; + wire [1:0] _zz_IBusCachedPlugin_jump_pcLoad_payload_6; + wire [31:0] _zz_IBusCachedPlugin_fetchPc_pc; + wire [2:0] _zz_IBusCachedPlugin_fetchPc_pc_1; + wire [11:0] _zz__zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch; + wire [31:0] _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_2; + wire [19:0] _zz__zz_2; + wire [11:0] _zz__zz_4; + wire [31:0] _zz__zz_6; + wire [31:0] _zz__zz_6_1; + wire [19:0] _zz__zz_IBusCachedPlugin_predictionJumpInterface_payload; + wire [11:0] _zz__zz_IBusCachedPlugin_predictionJumpInterface_payload_2; + wire _zz_IBusCachedPlugin_predictionJumpInterface_payload_4; + wire _zz_IBusCachedPlugin_predictionJumpInterface_payload_5; + wire _zz_IBusCachedPlugin_predictionJumpInterface_payload_6; + wire [2:0] _zz_DBusCachedPlugin_exceptionBus_payload_code; + wire [2:0] _zz_DBusCachedPlugin_exceptionBus_payload_code_1; + reg [7:0] _zz_writeBack_DBusCachedPlugin_rspShifted; + wire [1:0] _zz_writeBack_DBusCachedPlugin_rspShifted_1; + reg [7:0] _zz_writeBack_DBusCachedPlugin_rspShifted_2; + wire [0:0] _zz_writeBack_DBusCachedPlugin_rspShifted_3; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_1; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_2; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_3; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_4; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_5; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_6; + wire [26:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_7; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_8; + wire [1:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_9; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_10; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_11; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_12; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_13; + wire [1:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_14; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_15; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_16; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_17; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_18; + wire [22:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_19; + wire [1:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_20; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_21; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_22; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_23; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_24; + wire [1:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_25; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_26; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_27; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_28; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_29; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_30; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_31; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_32; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_33; + wire [19:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_34; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_35; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_36; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_37; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_38; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_39; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_40; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_41; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_42; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_43; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_44; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_45; + wire [16:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_46; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_47; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_48; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_49; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_50; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_51; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_52; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_53; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_54; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_55; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_56; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_57; + wire [3:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_58; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_59; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_60; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_61; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_62; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_63; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_64; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_65; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_66; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_67; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_68; + wire [13:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_69; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_70; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_71; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_72; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_73; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_74; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_75; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_76; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_77; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_78; + wire [3:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_79; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_80; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_81; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_82; + wire [1:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_83; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_84; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_85; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_86; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_87; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_88; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_89; + wire [3:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_90; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_91; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_92; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_93; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_94; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_95; + wire [1:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_96; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_97; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_98; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_99; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_100; + wire [10:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_101; + wire [5:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_102; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_103; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_104; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_105; + wire [3:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_106; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_107; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_108; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_109; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_110; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_111; + wire [1:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_112; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_113; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_114; + wire [5:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_115; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_116; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_117; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_118; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_119; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_120; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_121; + wire [1:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_122; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_123; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_124; + wire [1:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_125; + wire [7:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_126; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_127; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_128; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_129; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_130; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_131; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_132; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_133; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_134; + wire [5:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_135; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_136; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_137; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_138; + wire [2:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_139; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_140; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_141; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_142; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_143; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_144; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_145; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_146; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_147; + wire [3:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_148; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_149; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_150; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_151; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_152; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_153; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_154; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_155; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_156; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_157; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_158; + wire [1:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_159; + wire [1:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_160; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_161; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_162; + wire [1:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_163; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_164; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_165; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_166; + wire _zz_RegFilePlugin_regFile_port; + wire _zz_decode_RegFilePlugin_rs1Data; + wire _zz_RegFilePlugin_regFile_port_1; + wire _zz_decode_RegFilePlugin_rs2Data; + wire [0:0] _zz__zz_execute_REGFILE_WRITE_DATA; + wire [2:0] _zz__zz_execute_SRC1; + wire [4:0] _zz__zz_execute_SRC1_1; + wire [11:0] _zz__zz_execute_SRC2_3; + wire [31:0] _zz_execute_SrcPlugin_addSub; + wire [31:0] _zz_execute_SrcPlugin_addSub_1; + wire [31:0] _zz_execute_SrcPlugin_addSub_2; + wire [31:0] _zz_execute_SrcPlugin_addSub_3; + wire [31:0] _zz_execute_SrcPlugin_addSub_4; + wire [31:0] _zz_execute_SrcPlugin_addSub_5; + wire [31:0] _zz_execute_SrcPlugin_addSub_6; + wire [19:0] _zz__zz_execute_BranchPlugin_missAlignedTarget_2; + wire [11:0] _zz__zz_execute_BranchPlugin_missAlignedTarget_4; + wire [31:0] _zz__zz_execute_BranchPlugin_missAlignedTarget_6; + wire [31:0] _zz__zz_execute_BranchPlugin_missAlignedTarget_6_1; + wire [31:0] _zz__zz_execute_BranchPlugin_missAlignedTarget_6_2; + wire [19:0] _zz__zz_execute_BranchPlugin_branch_src2_2; + wire [11:0] _zz__zz_execute_BranchPlugin_branch_src2_4; + wire _zz_execute_BranchPlugin_branch_src2_6; + wire _zz_execute_BranchPlugin_branch_src2_7; + wire _zz_execute_BranchPlugin_branch_src2_8; + wire [2:0] _zz_execute_BranchPlugin_branch_src2_9; + wire [1:0] _zz__zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_1; + wire [1:0] _zz__zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_1_1; + wire [1:0] _zz__zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_3; + wire [1:0] _zz__zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_3_1; + wire _zz_when; + wire _zz_when_1; + wire [65:0] _zz_writeBack_MulPlugin_result; + wire [65:0] _zz_writeBack_MulPlugin_result_1; + wire [31:0] _zz__zz_decode_RS2_2; + wire [31:0] _zz__zz_decode_RS2_2_1; + wire [5:0] _zz_memory_DivPlugin_div_counter_valueNext; + wire [0:0] _zz_memory_DivPlugin_div_counter_valueNext_1; + wire [32:0] _zz_memory_DivPlugin_div_stage_0_remainderMinusDenominator; + wire [31:0] _zz_memory_DivPlugin_div_stage_0_outRemainder; + wire [31:0] _zz_memory_DivPlugin_div_stage_0_outRemainder_1; + wire [32:0] _zz_memory_DivPlugin_div_stage_0_outNumerator; + wire [32:0] _zz_memory_DivPlugin_div_result_1; + wire [32:0] _zz_memory_DivPlugin_div_result_2; + wire [32:0] _zz_memory_DivPlugin_div_result_3; + wire [32:0] _zz_memory_DivPlugin_div_result_4; + wire [0:0] _zz_memory_DivPlugin_div_result_5; + wire [32:0] _zz_memory_DivPlugin_rs1_2; + wire [0:0] _zz_memory_DivPlugin_rs1_3; + wire [31:0] _zz_memory_DivPlugin_rs2_1; + wire [0:0] _zz_memory_DivPlugin_rs2_2; + wire [9:0] _zz_execute_CfuPlugin_functionsIds_0; + wire [31:0] _zz_CsrPlugin_csrMapping_readDataInit_41; + wire [26:0] _zz_iBusWishbone_ADR_1; + wire [51:0] memory_MUL_LOW; + wire writeBack_CfuPlugin_CFU_IN_FLIGHT; + wire execute_CfuPlugin_CFU_IN_FLIGHT; + wire [33:0] memory_MUL_HH; + wire [33:0] execute_MUL_HH; + wire [33:0] execute_MUL_HL; + wire [33:0] execute_MUL_LH; + wire [31:0] execute_MUL_LL; + wire [31:0] execute_SHIFT_RIGHT; + wire [31:0] execute_REGFILE_WRITE_DATA; + wire [31:0] memory_MEMORY_STORE_DATA_RF; + wire [31:0] execute_MEMORY_STORE_DATA_RF; + wire decode_CSR_READ_OPCODE; + wire decode_CSR_WRITE_OPCODE; + wire decode_PREDICTION_HAD_BRANCHED2; + wire decode_SRC2_FORCE_ZERO; + wire `Input2Kind_binary_sequential_type decode_CfuPlugin_CFU_INPUT_2_KIND; + wire `Input2Kind_binary_sequential_type _zz_decode_CfuPlugin_CFU_INPUT_2_KIND; + wire `Input2Kind_binary_sequential_type _zz_decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND; + wire `Input2Kind_binary_sequential_type _zz_decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND_1; + wire decode_CfuPlugin_CFU_ENABLE; + wire decode_IS_RS2_SIGNED; + wire decode_IS_RS1_SIGNED; + wire decode_IS_DIV; + wire memory_IS_MUL; + wire execute_IS_MUL; + wire decode_IS_MUL; + wire `EnvCtrlEnum_binary_sequential_type _zz_memory_to_writeBack_ENV_CTRL; + wire `EnvCtrlEnum_binary_sequential_type _zz_memory_to_writeBack_ENV_CTRL_1; + wire `EnvCtrlEnum_binary_sequential_type _zz_execute_to_memory_ENV_CTRL; + wire `EnvCtrlEnum_binary_sequential_type _zz_execute_to_memory_ENV_CTRL_1; + wire `EnvCtrlEnum_binary_sequential_type decode_ENV_CTRL; + wire `EnvCtrlEnum_binary_sequential_type _zz_decode_ENV_CTRL; + wire `EnvCtrlEnum_binary_sequential_type _zz_decode_to_execute_ENV_CTRL; + wire `EnvCtrlEnum_binary_sequential_type _zz_decode_to_execute_ENV_CTRL_1; + wire decode_IS_CSR; + wire `BranchCtrlEnum_binary_sequential_type _zz_decode_to_execute_BRANCH_CTRL; + wire `BranchCtrlEnum_binary_sequential_type _zz_decode_to_execute_BRANCH_CTRL_1; + wire `ShiftCtrlEnum_binary_sequential_type _zz_execute_to_memory_SHIFT_CTRL; + wire `ShiftCtrlEnum_binary_sequential_type _zz_execute_to_memory_SHIFT_CTRL_1; + wire `ShiftCtrlEnum_binary_sequential_type decode_SHIFT_CTRL; + wire `ShiftCtrlEnum_binary_sequential_type _zz_decode_SHIFT_CTRL; + wire `ShiftCtrlEnum_binary_sequential_type _zz_decode_to_execute_SHIFT_CTRL; + wire `ShiftCtrlEnum_binary_sequential_type _zz_decode_to_execute_SHIFT_CTRL_1; + wire `AluBitwiseCtrlEnum_binary_sequential_type decode_ALU_BITWISE_CTRL; + wire `AluBitwiseCtrlEnum_binary_sequential_type _zz_decode_ALU_BITWISE_CTRL; + wire `AluBitwiseCtrlEnum_binary_sequential_type _zz_decode_to_execute_ALU_BITWISE_CTRL; + wire `AluBitwiseCtrlEnum_binary_sequential_type _zz_decode_to_execute_ALU_BITWISE_CTRL_1; + wire decode_SRC_LESS_UNSIGNED; + wire decode_MEMORY_MANAGMENT; + wire memory_MEMORY_WR; + wire decode_MEMORY_WR; + wire execute_BYPASSABLE_MEMORY_STAGE; + wire decode_BYPASSABLE_MEMORY_STAGE; + wire decode_BYPASSABLE_EXECUTE_STAGE; + wire `Src2CtrlEnum_binary_sequential_type decode_SRC2_CTRL; + wire `Src2CtrlEnum_binary_sequential_type _zz_decode_SRC2_CTRL; + wire `Src2CtrlEnum_binary_sequential_type _zz_decode_to_execute_SRC2_CTRL; + wire `Src2CtrlEnum_binary_sequential_type _zz_decode_to_execute_SRC2_CTRL_1; + wire `AluCtrlEnum_binary_sequential_type decode_ALU_CTRL; + wire `AluCtrlEnum_binary_sequential_type _zz_decode_ALU_CTRL; + wire `AluCtrlEnum_binary_sequential_type _zz_decode_to_execute_ALU_CTRL; + wire `AluCtrlEnum_binary_sequential_type _zz_decode_to_execute_ALU_CTRL_1; + wire `Src1CtrlEnum_binary_sequential_type decode_SRC1_CTRL; + wire `Src1CtrlEnum_binary_sequential_type _zz_decode_SRC1_CTRL; + wire `Src1CtrlEnum_binary_sequential_type _zz_decode_to_execute_SRC1_CTRL; + wire `Src1CtrlEnum_binary_sequential_type _zz_decode_to_execute_SRC1_CTRL_1; + wire decode_MEMORY_FORCE_CONSTISTENCY; + wire [31:0] writeBack_FORMAL_PC_NEXT; + wire [31:0] memory_FORMAL_PC_NEXT; + wire [31:0] execute_FORMAL_PC_NEXT; + wire [31:0] decode_FORMAL_PC_NEXT; + wire [31:0] memory_PC; + reg _zz_memory_to_writeBack_CfuPlugin_CFU_IN_FLIGHT; + reg _zz_execute_to_memory_CfuPlugin_CFU_IN_FLIGHT; + wire memory_CfuPlugin_CFU_IN_FLIGHT; + wire `Input2Kind_binary_sequential_type execute_CfuPlugin_CFU_INPUT_2_KIND; + wire `Input2Kind_binary_sequential_type _zz_execute_CfuPlugin_CFU_INPUT_2_KIND; + wire execute_CfuPlugin_CFU_ENABLE; + wire execute_IS_RS1_SIGNED; + wire execute_IS_DIV; + wire execute_IS_RS2_SIGNED; + wire memory_IS_DIV; + wire writeBack_IS_MUL; + wire [33:0] writeBack_MUL_HH; + wire [51:0] writeBack_MUL_LOW; + wire [33:0] memory_MUL_HL; + wire [33:0] memory_MUL_LH; + wire [31:0] memory_MUL_LL; + wire execute_CSR_READ_OPCODE; + wire execute_CSR_WRITE_OPCODE; + wire execute_IS_CSR; + wire `EnvCtrlEnum_binary_sequential_type memory_ENV_CTRL; + wire `EnvCtrlEnum_binary_sequential_type _zz_memory_ENV_CTRL; + wire `EnvCtrlEnum_binary_sequential_type execute_ENV_CTRL; + wire `EnvCtrlEnum_binary_sequential_type _zz_execute_ENV_CTRL; + wire `EnvCtrlEnum_binary_sequential_type writeBack_ENV_CTRL; + wire `EnvCtrlEnum_binary_sequential_type _zz_writeBack_ENV_CTRL; + wire [31:0] execute_BRANCH_CALC; + wire execute_BRANCH_DO; + wire [31:0] execute_PC; + wire execute_PREDICTION_HAD_BRANCHED2; + (* keep , syn_keep *) wire [31:0] execute_RS1 /* synthesis syn_keep = 1 */ ; + wire execute_BRANCH_COND_RESULT; + wire `BranchCtrlEnum_binary_sequential_type execute_BRANCH_CTRL; + wire `BranchCtrlEnum_binary_sequential_type _zz_execute_BRANCH_CTRL; + wire decode_RS2_USE; + wire decode_RS1_USE; + reg [31:0] _zz_decode_RS2; + wire execute_REGFILE_WRITE_VALID; + wire execute_BYPASSABLE_EXECUTE_STAGE; + wire memory_REGFILE_WRITE_VALID; + wire [31:0] memory_INSTRUCTION; + wire memory_BYPASSABLE_MEMORY_STAGE; + wire writeBack_REGFILE_WRITE_VALID; + reg [31:0] decode_RS2; + reg [31:0] decode_RS1; + wire [31:0] memory_SHIFT_RIGHT; + reg [31:0] _zz_decode_RS2_1; + wire `ShiftCtrlEnum_binary_sequential_type memory_SHIFT_CTRL; + wire `ShiftCtrlEnum_binary_sequential_type _zz_memory_SHIFT_CTRL; + wire `ShiftCtrlEnum_binary_sequential_type execute_SHIFT_CTRL; + wire `ShiftCtrlEnum_binary_sequential_type _zz_execute_SHIFT_CTRL; + wire execute_SRC_LESS_UNSIGNED; + wire execute_SRC2_FORCE_ZERO; + wire execute_SRC_USE_SUB_LESS; + wire [31:0] _zz_execute_SRC2; + wire `Src2CtrlEnum_binary_sequential_type execute_SRC2_CTRL; + wire `Src2CtrlEnum_binary_sequential_type _zz_execute_SRC2_CTRL; + wire `Src1CtrlEnum_binary_sequential_type execute_SRC1_CTRL; + wire `Src1CtrlEnum_binary_sequential_type _zz_execute_SRC1_CTRL; + wire decode_SRC_USE_SUB_LESS; + wire decode_SRC_ADD_ZERO; + wire [31:0] execute_SRC_ADD_SUB; + wire execute_SRC_LESS; + wire `AluCtrlEnum_binary_sequential_type execute_ALU_CTRL; + wire `AluCtrlEnum_binary_sequential_type _zz_execute_ALU_CTRL; + wire [31:0] execute_SRC2; + wire [31:0] execute_SRC1; + wire `AluBitwiseCtrlEnum_binary_sequential_type execute_ALU_BITWISE_CTRL; + wire `AluBitwiseCtrlEnum_binary_sequential_type _zz_execute_ALU_BITWISE_CTRL; + wire [31:0] _zz_lastStageRegFileWrite_payload_address; + wire _zz_lastStageRegFileWrite_valid; + reg _zz_1; + wire [31:0] decode_INSTRUCTION_ANTICIPATED; + reg decode_REGFILE_WRITE_VALID; + wire decode_LEGAL_INSTRUCTION; + wire `Input2Kind_binary_sequential_type _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_1; + wire `EnvCtrlEnum_binary_sequential_type _zz_decode_ENV_CTRL_1; + wire `BranchCtrlEnum_binary_sequential_type _zz_decode_BRANCH_CTRL; + wire `ShiftCtrlEnum_binary_sequential_type _zz_decode_SHIFT_CTRL_1; + wire `AluBitwiseCtrlEnum_binary_sequential_type _zz_decode_ALU_BITWISE_CTRL_1; + wire `Src2CtrlEnum_binary_sequential_type _zz_decode_SRC2_CTRL_1; + wire `AluCtrlEnum_binary_sequential_type _zz_decode_ALU_CTRL_1; + wire `Src1CtrlEnum_binary_sequential_type _zz_decode_SRC1_CTRL_1; + reg [31:0] _zz_decode_RS2_2; + wire writeBack_MEMORY_WR; + wire [31:0] writeBack_MEMORY_STORE_DATA_RF; + wire [31:0] writeBack_REGFILE_WRITE_DATA; + wire writeBack_MEMORY_ENABLE; + wire [31:0] memory_REGFILE_WRITE_DATA; + wire memory_MEMORY_ENABLE; + wire execute_MEMORY_FORCE_CONSTISTENCY; + wire execute_MEMORY_MANAGMENT; + (* keep , syn_keep *) wire [31:0] execute_RS2 /* synthesis syn_keep = 1 */ ; + wire execute_MEMORY_WR; + wire [31:0] execute_SRC_ADD; + wire execute_MEMORY_ENABLE; + wire [31:0] execute_INSTRUCTION; + wire decode_MEMORY_ENABLE; + wire decode_FLUSH_ALL; + reg IBusCachedPlugin_rsp_issueDetected_4; + reg IBusCachedPlugin_rsp_issueDetected_3; + reg IBusCachedPlugin_rsp_issueDetected_2; + reg IBusCachedPlugin_rsp_issueDetected_1; + wire `BranchCtrlEnum_binary_sequential_type decode_BRANCH_CTRL; + wire `BranchCtrlEnum_binary_sequential_type _zz_decode_BRANCH_CTRL_1; + wire [31:0] decode_INSTRUCTION; + reg [31:0] _zz_execute_to_memory_FORMAL_PC_NEXT; + reg [31:0] _zz_decode_to_execute_FORMAL_PC_NEXT; + wire [31:0] decode_PC; + wire [31:0] writeBack_PC; + wire [31:0] writeBack_INSTRUCTION; + reg decode_arbitration_haltItself; + reg decode_arbitration_haltByOther; + reg decode_arbitration_removeIt; + wire decode_arbitration_flushIt; + reg decode_arbitration_flushNext; + wire decode_arbitration_isValid; + wire decode_arbitration_isStuck; + wire decode_arbitration_isStuckByOthers; + wire decode_arbitration_isFlushed; + wire decode_arbitration_isMoving; + wire decode_arbitration_isFiring; + reg execute_arbitration_haltItself; + reg execute_arbitration_haltByOther; + reg execute_arbitration_removeIt; + wire execute_arbitration_flushIt; + reg execute_arbitration_flushNext; + reg execute_arbitration_isValid; + wire execute_arbitration_isStuck; + wire execute_arbitration_isStuckByOthers; + wire execute_arbitration_isFlushed; + wire execute_arbitration_isMoving; + wire execute_arbitration_isFiring; + reg memory_arbitration_haltItself; + wire memory_arbitration_haltByOther; + reg memory_arbitration_removeIt; + wire memory_arbitration_flushIt; + wire memory_arbitration_flushNext; + reg memory_arbitration_isValid; + wire memory_arbitration_isStuck; + wire memory_arbitration_isStuckByOthers; + wire memory_arbitration_isFlushed; + wire memory_arbitration_isMoving; + wire memory_arbitration_isFiring; + reg writeBack_arbitration_haltItself; + wire writeBack_arbitration_haltByOther; + reg writeBack_arbitration_removeIt; + reg writeBack_arbitration_flushIt; + reg writeBack_arbitration_flushNext; + reg writeBack_arbitration_isValid; + wire writeBack_arbitration_isStuck; + wire writeBack_arbitration_isStuckByOthers; + wire writeBack_arbitration_isFlushed; + wire writeBack_arbitration_isMoving; + wire writeBack_arbitration_isFiring; + wire [31:0] lastStageInstruction /* verilator public */ ; + wire [31:0] lastStagePc /* verilator public */ ; + wire lastStageIsValid /* verilator public */ ; + wire lastStageIsFiring /* verilator public */ ; + reg IBusCachedPlugin_fetcherHalt; + reg IBusCachedPlugin_incomingInstruction; + wire IBusCachedPlugin_predictionJumpInterface_valid; + (* keep , syn_keep *) wire [31:0] IBusCachedPlugin_predictionJumpInterface_payload /* synthesis syn_keep = 1 */ ; + reg IBusCachedPlugin_decodePrediction_cmd_hadBranch; + wire IBusCachedPlugin_decodePrediction_rsp_wasWrong; + wire IBusCachedPlugin_pcValids_0; + wire IBusCachedPlugin_pcValids_1; + wire IBusCachedPlugin_pcValids_2; + wire IBusCachedPlugin_pcValids_3; + reg IBusCachedPlugin_decodeExceptionPort_valid; + reg [3:0] IBusCachedPlugin_decodeExceptionPort_payload_code; + wire [31:0] IBusCachedPlugin_decodeExceptionPort_payload_badAddr; + wire IBusCachedPlugin_mmuBus_cmd_0_isValid; + wire IBusCachedPlugin_mmuBus_cmd_0_isStuck; + wire [31:0] IBusCachedPlugin_mmuBus_cmd_0_virtualAddress; + wire IBusCachedPlugin_mmuBus_cmd_0_bypassTranslation; + wire [31:0] IBusCachedPlugin_mmuBus_rsp_physicalAddress; + wire IBusCachedPlugin_mmuBus_rsp_isIoAccess; + wire IBusCachedPlugin_mmuBus_rsp_isPaging; + wire IBusCachedPlugin_mmuBus_rsp_allowRead; + wire IBusCachedPlugin_mmuBus_rsp_allowWrite; + wire IBusCachedPlugin_mmuBus_rsp_allowExecute; + wire IBusCachedPlugin_mmuBus_rsp_exception; + wire IBusCachedPlugin_mmuBus_rsp_refilling; + wire IBusCachedPlugin_mmuBus_rsp_bypassTranslation; + wire IBusCachedPlugin_mmuBus_end; + wire IBusCachedPlugin_mmuBus_busy; + wire dBus_cmd_valid; + wire dBus_cmd_ready; + wire dBus_cmd_payload_wr; + wire dBus_cmd_payload_uncached; + wire [31:0] dBus_cmd_payload_address; + wire [31:0] dBus_cmd_payload_data; + wire [3:0] dBus_cmd_payload_mask; + wire [2:0] dBus_cmd_payload_size; + wire dBus_cmd_payload_last; + wire dBus_rsp_valid; + wire dBus_rsp_payload_last; + wire [31:0] dBus_rsp_payload_data; + wire dBus_rsp_payload_error; + wire DBusCachedPlugin_mmuBus_cmd_0_isValid; + wire DBusCachedPlugin_mmuBus_cmd_0_isStuck; + wire [31:0] DBusCachedPlugin_mmuBus_cmd_0_virtualAddress; + wire DBusCachedPlugin_mmuBus_cmd_0_bypassTranslation; + wire [31:0] DBusCachedPlugin_mmuBus_rsp_physicalAddress; + wire DBusCachedPlugin_mmuBus_rsp_isIoAccess; + wire DBusCachedPlugin_mmuBus_rsp_isPaging; + wire DBusCachedPlugin_mmuBus_rsp_allowRead; + wire DBusCachedPlugin_mmuBus_rsp_allowWrite; + wire DBusCachedPlugin_mmuBus_rsp_allowExecute; + wire DBusCachedPlugin_mmuBus_rsp_exception; + wire DBusCachedPlugin_mmuBus_rsp_refilling; + wire DBusCachedPlugin_mmuBus_rsp_bypassTranslation; + wire DBusCachedPlugin_mmuBus_end; + wire DBusCachedPlugin_mmuBus_busy; + reg DBusCachedPlugin_redoBranch_valid; + wire [31:0] DBusCachedPlugin_redoBranch_payload; + reg DBusCachedPlugin_exceptionBus_valid; + reg [3:0] DBusCachedPlugin_exceptionBus_payload_code; + wire [31:0] DBusCachedPlugin_exceptionBus_payload_badAddr; + wire decodeExceptionPort_valid; + wire [3:0] decodeExceptionPort_payload_code; + wire [31:0] decodeExceptionPort_payload_badAddr; + wire BranchPlugin_jumpInterface_valid; + wire [31:0] BranchPlugin_jumpInterface_payload; + reg BranchPlugin_branchExceptionPort_valid; + wire [3:0] BranchPlugin_branchExceptionPort_payload_code; + wire [31:0] BranchPlugin_branchExceptionPort_payload_badAddr; + wire [31:0] CsrPlugin_csrMapping_readDataSignal; + wire [31:0] CsrPlugin_csrMapping_readDataInit; + wire [31:0] CsrPlugin_csrMapping_writeDataSignal; + wire CsrPlugin_csrMapping_allowCsrSignal; + wire CsrPlugin_csrMapping_hazardFree; + reg CsrPlugin_inWfi /* verilator public */ ; + wire CsrPlugin_thirdPartyWake; + reg CsrPlugin_jumpInterface_valid; + reg [31:0] CsrPlugin_jumpInterface_payload; + wire CsrPlugin_exceptionPendings_0; + wire CsrPlugin_exceptionPendings_1; + wire CsrPlugin_exceptionPendings_2; + wire CsrPlugin_exceptionPendings_3; + wire externalInterrupt; + wire contextSwitching; + reg [1:0] CsrPlugin_privilege; + wire CsrPlugin_forceMachineWire; + reg CsrPlugin_selfException_valid; + reg [3:0] CsrPlugin_selfException_payload_code; + wire [31:0] CsrPlugin_selfException_payload_badAddr; + wire CsrPlugin_allowInterrupts; + wire CsrPlugin_allowException; + wire CsrPlugin_allowEbreakException; + wire IBusCachedPlugin_externalFlush; + wire IBusCachedPlugin_jump_pcLoad_valid; + wire [31:0] IBusCachedPlugin_jump_pcLoad_payload; + wire [3:0] _zz_IBusCachedPlugin_jump_pcLoad_payload; + wire [3:0] _zz_IBusCachedPlugin_jump_pcLoad_payload_1; + wire _zz_IBusCachedPlugin_jump_pcLoad_payload_2; + wire _zz_IBusCachedPlugin_jump_pcLoad_payload_3; + wire _zz_IBusCachedPlugin_jump_pcLoad_payload_4; + wire IBusCachedPlugin_fetchPc_output_valid; + wire IBusCachedPlugin_fetchPc_output_ready; + wire [31:0] IBusCachedPlugin_fetchPc_output_payload; + reg [31:0] IBusCachedPlugin_fetchPc_pcReg /* verilator public */ ; + reg IBusCachedPlugin_fetchPc_correction; + reg IBusCachedPlugin_fetchPc_correctionReg; + wire IBusCachedPlugin_fetchPc_output_fire; + wire IBusCachedPlugin_fetchPc_corrected; + reg IBusCachedPlugin_fetchPc_pcRegPropagate; + reg IBusCachedPlugin_fetchPc_booted; + reg IBusCachedPlugin_fetchPc_inc; + wire when_Fetcher_l131; + wire IBusCachedPlugin_fetchPc_output_fire_1; + wire when_Fetcher_l131_1; + reg [31:0] IBusCachedPlugin_fetchPc_pc; + wire IBusCachedPlugin_fetchPc_redo_valid; + wire [31:0] IBusCachedPlugin_fetchPc_redo_payload; + reg IBusCachedPlugin_fetchPc_flushed; + wire when_Fetcher_l158; + reg IBusCachedPlugin_iBusRsp_redoFetch; + wire IBusCachedPlugin_iBusRsp_stages_0_input_valid; + wire IBusCachedPlugin_iBusRsp_stages_0_input_ready; + wire [31:0] IBusCachedPlugin_iBusRsp_stages_0_input_payload; + wire IBusCachedPlugin_iBusRsp_stages_0_output_valid; + wire IBusCachedPlugin_iBusRsp_stages_0_output_ready; + wire [31:0] IBusCachedPlugin_iBusRsp_stages_0_output_payload; + reg IBusCachedPlugin_iBusRsp_stages_0_halt; + wire IBusCachedPlugin_iBusRsp_stages_1_input_valid; + wire IBusCachedPlugin_iBusRsp_stages_1_input_ready; + wire [31:0] IBusCachedPlugin_iBusRsp_stages_1_input_payload; + wire IBusCachedPlugin_iBusRsp_stages_1_output_valid; + wire IBusCachedPlugin_iBusRsp_stages_1_output_ready; + wire [31:0] IBusCachedPlugin_iBusRsp_stages_1_output_payload; + reg IBusCachedPlugin_iBusRsp_stages_1_halt; + wire IBusCachedPlugin_iBusRsp_stages_2_input_valid; + wire IBusCachedPlugin_iBusRsp_stages_2_input_ready; + wire [31:0] IBusCachedPlugin_iBusRsp_stages_2_input_payload; + wire IBusCachedPlugin_iBusRsp_stages_2_output_valid; + wire IBusCachedPlugin_iBusRsp_stages_2_output_ready; + wire [31:0] IBusCachedPlugin_iBusRsp_stages_2_output_payload; + reg IBusCachedPlugin_iBusRsp_stages_2_halt; + wire _zz_IBusCachedPlugin_iBusRsp_stages_0_input_ready; + wire _zz_IBusCachedPlugin_iBusRsp_stages_1_input_ready; + wire _zz_IBusCachedPlugin_iBusRsp_stages_2_input_ready; + wire IBusCachedPlugin_iBusRsp_flush; + wire _zz_IBusCachedPlugin_iBusRsp_stages_0_output_ready; + wire _zz_IBusCachedPlugin_iBusRsp_stages_0_output_ready_1; + reg _zz_IBusCachedPlugin_iBusRsp_stages_0_output_ready_2; + wire IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_valid; + wire IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_ready; + wire [31:0] IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_payload; + reg _zz_IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_valid; + reg [31:0] _zz_IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_payload; + reg IBusCachedPlugin_iBusRsp_readyForError; + wire IBusCachedPlugin_iBusRsp_output_valid; + wire IBusCachedPlugin_iBusRsp_output_ready; + wire [31:0] IBusCachedPlugin_iBusRsp_output_payload_pc; + wire IBusCachedPlugin_iBusRsp_output_payload_rsp_error; + wire [31:0] IBusCachedPlugin_iBusRsp_output_payload_rsp_inst; + wire IBusCachedPlugin_iBusRsp_output_payload_isRvc; + wire when_Fetcher_l240; + wire when_Fetcher_l320; + reg IBusCachedPlugin_injector_nextPcCalc_valids_0; + wire when_Fetcher_l329; + reg IBusCachedPlugin_injector_nextPcCalc_valids_1; + wire when_Fetcher_l329_1; + reg IBusCachedPlugin_injector_nextPcCalc_valids_2; + wire when_Fetcher_l329_2; + reg IBusCachedPlugin_injector_nextPcCalc_valids_3; + wire when_Fetcher_l329_3; + reg IBusCachedPlugin_injector_nextPcCalc_valids_4; + wire when_Fetcher_l329_4; + wire _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch; + reg [18:0] _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_1; + wire _zz_2; + reg [10:0] _zz_3; + wire _zz_4; + reg [18:0] _zz_5; + reg _zz_6; + wire _zz_IBusCachedPlugin_predictionJumpInterface_payload; + reg [10:0] _zz_IBusCachedPlugin_predictionJumpInterface_payload_1; + wire _zz_IBusCachedPlugin_predictionJumpInterface_payload_2; + reg [18:0] _zz_IBusCachedPlugin_predictionJumpInterface_payload_3; + wire iBus_cmd_valid; + wire iBus_cmd_ready; + reg [31:0] iBus_cmd_payload_address; + wire [2:0] iBus_cmd_payload_size; + wire iBus_rsp_valid; + wire [31:0] iBus_rsp_payload_data; + wire iBus_rsp_payload_error; + wire [31:0] _zz_IBusCachedPlugin_rspCounter; + reg [31:0] IBusCachedPlugin_rspCounter; + wire IBusCachedPlugin_s0_tightlyCoupledHit; + reg IBusCachedPlugin_s1_tightlyCoupledHit; + reg IBusCachedPlugin_s2_tightlyCoupledHit; + wire IBusCachedPlugin_rsp_iBusRspOutputHalt; + wire IBusCachedPlugin_rsp_issueDetected; + reg IBusCachedPlugin_rsp_redoFetch; + wire when_IBusCachedPlugin_l239; + wire when_IBusCachedPlugin_l244; + wire when_IBusCachedPlugin_l250; + wire when_IBusCachedPlugin_l256; + wire when_IBusCachedPlugin_l267; + wire dataCache_1_io_mem_cmd_s2mPipe_valid; + reg dataCache_1_io_mem_cmd_s2mPipe_ready; + wire dataCache_1_io_mem_cmd_s2mPipe_payload_wr; + wire dataCache_1_io_mem_cmd_s2mPipe_payload_uncached; + wire [31:0] dataCache_1_io_mem_cmd_s2mPipe_payload_address; + wire [31:0] dataCache_1_io_mem_cmd_s2mPipe_payload_data; + wire [3:0] dataCache_1_io_mem_cmd_s2mPipe_payload_mask; + wire [2:0] dataCache_1_io_mem_cmd_s2mPipe_payload_size; + wire dataCache_1_io_mem_cmd_s2mPipe_payload_last; + reg dataCache_1_io_mem_cmd_rValid; + reg dataCache_1_io_mem_cmd_rData_wr; + reg dataCache_1_io_mem_cmd_rData_uncached; + reg [31:0] dataCache_1_io_mem_cmd_rData_address; + reg [31:0] dataCache_1_io_mem_cmd_rData_data; + reg [3:0] dataCache_1_io_mem_cmd_rData_mask; + reg [2:0] dataCache_1_io_mem_cmd_rData_size; + reg dataCache_1_io_mem_cmd_rData_last; + wire dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_valid; + wire dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_ready; + wire dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_payload_wr; + wire dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_payload_uncached; + wire [31:0] dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_payload_address; + wire [31:0] dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_payload_data; + wire [3:0] dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_payload_mask; + wire [2:0] dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_payload_size; + wire dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_payload_last; + reg dataCache_1_io_mem_cmd_s2mPipe_rValid; + reg dataCache_1_io_mem_cmd_s2mPipe_rData_wr; + reg dataCache_1_io_mem_cmd_s2mPipe_rData_uncached; + reg [31:0] dataCache_1_io_mem_cmd_s2mPipe_rData_address; + reg [31:0] dataCache_1_io_mem_cmd_s2mPipe_rData_data; + reg [3:0] dataCache_1_io_mem_cmd_s2mPipe_rData_mask; + reg [2:0] dataCache_1_io_mem_cmd_s2mPipe_rData_size; + reg dataCache_1_io_mem_cmd_s2mPipe_rData_last; + wire when_Stream_l342; + wire [31:0] _zz_DBusCachedPlugin_rspCounter; + reg [31:0] DBusCachedPlugin_rspCounter; + wire when_DBusCachedPlugin_l303; + wire [1:0] execute_DBusCachedPlugin_size; + reg [31:0] _zz_execute_MEMORY_STORE_DATA_RF; + wire dataCache_1_io_cpu_flush_isStall; + wire when_DBusCachedPlugin_l343; + wire when_DBusCachedPlugin_l359; + wire when_DBusCachedPlugin_l386; + wire when_DBusCachedPlugin_l438; + wire when_DBusCachedPlugin_l458; + wire [7:0] writeBack_DBusCachedPlugin_rspSplits_0; + wire [7:0] writeBack_DBusCachedPlugin_rspSplits_1; + wire [7:0] writeBack_DBusCachedPlugin_rspSplits_2; + wire [7:0] writeBack_DBusCachedPlugin_rspSplits_3; + reg [31:0] writeBack_DBusCachedPlugin_rspShifted; + wire [31:0] writeBack_DBusCachedPlugin_rspRf; + wire [1:0] switch_Misc_l200; + wire _zz_writeBack_DBusCachedPlugin_rspFormated; + reg [31:0] _zz_writeBack_DBusCachedPlugin_rspFormated_1; + wire _zz_writeBack_DBusCachedPlugin_rspFormated_2; + reg [31:0] _zz_writeBack_DBusCachedPlugin_rspFormated_3; + reg [31:0] writeBack_DBusCachedPlugin_rspFormated; + wire when_DBusCachedPlugin_l484; + wire [33:0] _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2; + wire _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_3; + wire _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_4; + wire _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_5; + wire _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_6; + wire _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_7; + wire `Src1CtrlEnum_binary_sequential_type _zz_decode_SRC1_CTRL_2; + wire `AluCtrlEnum_binary_sequential_type _zz_decode_ALU_CTRL_2; + wire `Src2CtrlEnum_binary_sequential_type _zz_decode_SRC2_CTRL_2; + wire `AluBitwiseCtrlEnum_binary_sequential_type _zz_decode_ALU_BITWISE_CTRL_2; + wire `ShiftCtrlEnum_binary_sequential_type _zz_decode_SHIFT_CTRL_2; + wire `BranchCtrlEnum_binary_sequential_type _zz_decode_BRANCH_CTRL_2; + wire `EnvCtrlEnum_binary_sequential_type _zz_decode_ENV_CTRL_2; + wire `Input2Kind_binary_sequential_type _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_8; + wire when_RegFilePlugin_l63; + wire [4:0] decode_RegFilePlugin_regFileReadAddress1; + wire [4:0] decode_RegFilePlugin_regFileReadAddress2; + wire [31:0] decode_RegFilePlugin_rs1Data; + wire [31:0] decode_RegFilePlugin_rs2Data; + reg lastStageRegFileWrite_valid /* verilator public */ ; + reg [4:0] lastStageRegFileWrite_payload_address /* verilator public */ ; + reg [31:0] lastStageRegFileWrite_payload_data /* verilator public */ ; + reg _zz_7; + reg [31:0] execute_IntAluPlugin_bitwise; + reg [31:0] _zz_execute_REGFILE_WRITE_DATA; + reg [31:0] _zz_execute_SRC1; + wire _zz_execute_SRC2_1; + reg [19:0] _zz_execute_SRC2_2; + wire _zz_execute_SRC2_3; + reg [19:0] _zz_execute_SRC2_4; + reg [31:0] _zz_execute_SRC2_5; + reg [31:0] execute_SrcPlugin_addSub; + wire execute_SrcPlugin_less; + wire [4:0] execute_FullBarrelShifterPlugin_amplitude; + reg [31:0] _zz_execute_FullBarrelShifterPlugin_reversed; + wire [31:0] execute_FullBarrelShifterPlugin_reversed; + reg [31:0] _zz_decode_RS2_3; + reg HazardSimplePlugin_src0Hazard; + reg HazardSimplePlugin_src1Hazard; + wire HazardSimplePlugin_writeBackWrites_valid; + wire [4:0] HazardSimplePlugin_writeBackWrites_payload_address; + wire [31:0] HazardSimplePlugin_writeBackWrites_payload_data; + reg HazardSimplePlugin_writeBackBuffer_valid; + reg [4:0] HazardSimplePlugin_writeBackBuffer_payload_address; + reg [31:0] HazardSimplePlugin_writeBackBuffer_payload_data; + wire HazardSimplePlugin_addr0Match; + wire HazardSimplePlugin_addr1Match; + wire when_HazardSimplePlugin_l47; + wire when_HazardSimplePlugin_l48; + wire when_HazardSimplePlugin_l51; + wire when_HazardSimplePlugin_l45; + wire when_HazardSimplePlugin_l57; + wire when_HazardSimplePlugin_l58; + wire when_HazardSimplePlugin_l48_1; + wire when_HazardSimplePlugin_l51_1; + wire when_HazardSimplePlugin_l45_1; + wire when_HazardSimplePlugin_l57_1; + wire when_HazardSimplePlugin_l58_1; + wire when_HazardSimplePlugin_l48_2; + wire when_HazardSimplePlugin_l51_2; + wire when_HazardSimplePlugin_l45_2; + wire when_HazardSimplePlugin_l57_2; + wire when_HazardSimplePlugin_l58_2; + wire when_HazardSimplePlugin_l105; + wire when_HazardSimplePlugin_l108; + wire when_HazardSimplePlugin_l113; + wire execute_BranchPlugin_eq; + wire [2:0] switch_Misc_l200_1; + reg _zz_execute_BRANCH_COND_RESULT; + reg _zz_execute_BRANCH_COND_RESULT_1; + wire _zz_execute_BranchPlugin_missAlignedTarget; + reg [19:0] _zz_execute_BranchPlugin_missAlignedTarget_1; + wire _zz_execute_BranchPlugin_missAlignedTarget_2; + reg [10:0] _zz_execute_BranchPlugin_missAlignedTarget_3; + wire _zz_execute_BranchPlugin_missAlignedTarget_4; + reg [18:0] _zz_execute_BranchPlugin_missAlignedTarget_5; + reg _zz_execute_BranchPlugin_missAlignedTarget_6; + wire execute_BranchPlugin_missAlignedTarget; + reg [31:0] execute_BranchPlugin_branch_src1; + reg [31:0] execute_BranchPlugin_branch_src2; + wire _zz_execute_BranchPlugin_branch_src2; + reg [19:0] _zz_execute_BranchPlugin_branch_src2_1; + wire _zz_execute_BranchPlugin_branch_src2_2; + reg [10:0] _zz_execute_BranchPlugin_branch_src2_3; + wire _zz_execute_BranchPlugin_branch_src2_4; + reg [18:0] _zz_execute_BranchPlugin_branch_src2_5; + wire [31:0] execute_BranchPlugin_branchAdder; + wire when_BranchPlugin_l296; + reg [1:0] CsrPlugin_misa_base; + reg [25:0] CsrPlugin_misa_extensions; + reg [1:0] CsrPlugin_mtvec_mode; + reg [29:0] CsrPlugin_mtvec_base; + reg [31:0] CsrPlugin_mepc; + reg CsrPlugin_mstatus_MIE; + reg CsrPlugin_mstatus_MPIE; + reg [1:0] CsrPlugin_mstatus_MPP; + reg CsrPlugin_mip_MEIP; + reg CsrPlugin_mip_MTIP; + reg CsrPlugin_mip_MSIP; + reg CsrPlugin_mie_MEIE; + reg CsrPlugin_mie_MTIE; + reg CsrPlugin_mie_MSIE; + reg [31:0] CsrPlugin_mscratch; + reg CsrPlugin_mcause_interrupt; + reg [3:0] CsrPlugin_mcause_exceptionCode; + reg [31:0] CsrPlugin_mtval; + reg [63:0] CsrPlugin_mcycle = 64'b0000000000000000000000000000000000000000000000000000000000000000; + reg [63:0] CsrPlugin_minstret = 64'b0000000000000000000000000000000000000000000000000000000000000000; + wire _zz_when_CsrPlugin_l952; + wire _zz_when_CsrPlugin_l952_1; + wire _zz_when_CsrPlugin_l952_2; + reg CsrPlugin_exceptionPortCtrl_exceptionValids_decode; + reg CsrPlugin_exceptionPortCtrl_exceptionValids_execute; + reg CsrPlugin_exceptionPortCtrl_exceptionValids_memory; + reg CsrPlugin_exceptionPortCtrl_exceptionValids_writeBack; + reg CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_decode; + reg CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_execute; + reg CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_memory; + reg CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_writeBack; + reg [3:0] CsrPlugin_exceptionPortCtrl_exceptionContext_code; + reg [31:0] CsrPlugin_exceptionPortCtrl_exceptionContext_badAddr; + wire [1:0] CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilegeUncapped; + wire [1:0] CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilege; + wire [1:0] _zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code; + wire _zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_1; + wire [1:0] _zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_2; + wire _zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_3; + wire when_CsrPlugin_l909; + wire when_CsrPlugin_l909_1; + wire when_CsrPlugin_l909_2; + wire when_CsrPlugin_l909_3; + wire when_CsrPlugin_l922; + reg CsrPlugin_interrupt_valid; + reg [3:0] CsrPlugin_interrupt_code /* verilator public */ ; + reg [1:0] CsrPlugin_interrupt_targetPrivilege; + wire when_CsrPlugin_l946; + wire when_CsrPlugin_l952; + wire when_CsrPlugin_l952_1; + wire when_CsrPlugin_l952_2; + wire CsrPlugin_exception; + reg CsrPlugin_lastStageWasWfi; + reg CsrPlugin_pipelineLiberator_pcValids_0; + reg CsrPlugin_pipelineLiberator_pcValids_1; + reg CsrPlugin_pipelineLiberator_pcValids_2; + wire CsrPlugin_pipelineLiberator_active; + wire when_CsrPlugin_l980; + wire when_CsrPlugin_l980_1; + wire when_CsrPlugin_l980_2; + wire when_CsrPlugin_l985; + reg CsrPlugin_pipelineLiberator_done; + wire when_CsrPlugin_l991; + wire CsrPlugin_interruptJump /* verilator public */ ; + reg CsrPlugin_hadException /* verilator public */ ; + reg [1:0] CsrPlugin_targetPrivilege; + reg [3:0] CsrPlugin_trapCause; + reg [1:0] CsrPlugin_xtvec_mode; + reg [29:0] CsrPlugin_xtvec_base; + wire when_CsrPlugin_l1019; + wire when_CsrPlugin_l1064; + wire [1:0] switch_CsrPlugin_l1068; + reg execute_CsrPlugin_wfiWake; + wire when_CsrPlugin_l1108; + wire when_CsrPlugin_l1110; + wire when_CsrPlugin_l1116; + wire execute_CsrPlugin_blockedBySideEffects; + reg execute_CsrPlugin_illegalAccess; + reg execute_CsrPlugin_illegalInstruction; + wire when_CsrPlugin_l1129; + wire when_CsrPlugin_l1136; + wire when_CsrPlugin_l1137; + wire when_CsrPlugin_l1144; + reg execute_CsrPlugin_writeInstruction; + reg execute_CsrPlugin_readInstruction; + wire execute_CsrPlugin_writeEnable; + wire execute_CsrPlugin_readEnable; + wire [31:0] execute_CsrPlugin_readToWriteData; + wire switch_Misc_l200_2; + reg [31:0] _zz_CsrPlugin_csrMapping_writeDataSignal; + wire when_CsrPlugin_l1176; + wire when_CsrPlugin_l1180; + wire [11:0] execute_CsrPlugin_csrAddress; + reg execute_MulPlugin_aSigned; + reg execute_MulPlugin_bSigned; + wire [31:0] execute_MulPlugin_a; + wire [31:0] execute_MulPlugin_b; + wire [1:0] switch_MulPlugin_l87; + wire [15:0] execute_MulPlugin_aULow; + wire [15:0] execute_MulPlugin_bULow; + wire [16:0] execute_MulPlugin_aSLow; + wire [16:0] execute_MulPlugin_bSLow; + wire [16:0] execute_MulPlugin_aHigh; + wire [16:0] execute_MulPlugin_bHigh; + wire [65:0] writeBack_MulPlugin_result; + wire when_MulPlugin_l147; + wire [1:0] switch_MulPlugin_l148; + reg [32:0] memory_DivPlugin_rs1; + reg [31:0] memory_DivPlugin_rs2; + reg [64:0] memory_DivPlugin_accumulator; + wire memory_DivPlugin_frontendOk; + reg memory_DivPlugin_div_needRevert; + reg memory_DivPlugin_div_counter_willIncrement; + reg memory_DivPlugin_div_counter_willClear; + reg [5:0] memory_DivPlugin_div_counter_valueNext; + reg [5:0] memory_DivPlugin_div_counter_value; + wire memory_DivPlugin_div_counter_willOverflowIfInc; + wire memory_DivPlugin_div_counter_willOverflow; + reg memory_DivPlugin_div_done; + wire when_MulDivIterativePlugin_l126; + wire when_MulDivIterativePlugin_l126_1; + reg [31:0] memory_DivPlugin_div_result; + wire when_MulDivIterativePlugin_l128; + wire when_MulDivIterativePlugin_l129; + wire when_MulDivIterativePlugin_l132; + wire [31:0] _zz_memory_DivPlugin_div_stage_0_remainderShifted; + wire [32:0] memory_DivPlugin_div_stage_0_remainderShifted; + wire [32:0] memory_DivPlugin_div_stage_0_remainderMinusDenominator; + wire [31:0] memory_DivPlugin_div_stage_0_outRemainder; + wire [31:0] memory_DivPlugin_div_stage_0_outNumerator; + wire when_MulDivIterativePlugin_l151; + wire [31:0] _zz_memory_DivPlugin_div_result; + wire when_MulDivIterativePlugin_l162; + wire _zz_memory_DivPlugin_rs2; + wire _zz_memory_DivPlugin_rs1; + reg [32:0] _zz_memory_DivPlugin_rs1_1; + reg [31:0] externalInterruptArray_regNext; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit; + wire [31:0] _zz_CsrPlugin_csrMapping_readDataInit_1; + wire execute_CfuPlugin_schedule; + reg execute_CfuPlugin_hold; + reg execute_CfuPlugin_fired; + wire CfuPlugin_bus_cmd_fire; + wire when_CfuPlugin_l171; + wire when_CfuPlugin_l175; + wire [9:0] execute_CfuPlugin_functionsIds_0; + wire _zz_CfuPlugin_bus_cmd_payload_inputs_1; + reg [23:0] _zz_CfuPlugin_bus_cmd_payload_inputs_1_1; + reg [31:0] _zz_CfuPlugin_bus_cmd_payload_inputs_1_2; + wire CfuPlugin_bus_rsp_rsp_valid; + reg CfuPlugin_bus_rsp_rsp_ready; + wire [31:0] CfuPlugin_bus_rsp_rsp_payload_outputs_0; + reg CfuPlugin_bus_rsp_rValid; + reg [31:0] CfuPlugin_bus_rsp_rData_outputs_0; + wire when_CfuPlugin_l208; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_2; + reg [31:0] _zz_when_GenCoreDefault_l367; + wire when_GenCoreDefault_l367; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_3; + reg [31:0] _zz_when_GenCoreDefault_l367_1; + wire when_GenCoreDefault_l367_1; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_4; + reg [31:0] _zz_when_GenCoreDefault_l367_2; + wire when_GenCoreDefault_l367_2; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_5; + reg [31:0] _zz_when_GenCoreDefault_l367_3; + wire when_GenCoreDefault_l367_3; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_6; + reg [31:0] _zz_when_GenCoreDefault_l367_4; + wire when_GenCoreDefault_l367_4; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_7; + reg [31:0] _zz_when_GenCoreDefault_l367_5; + wire when_GenCoreDefault_l367_5; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_8; + reg [31:0] _zz_when_GenCoreDefault_l367_6; + wire when_GenCoreDefault_l367_6; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_9; + reg [31:0] _zz_when_GenCoreDefault_l367_7; + wire when_GenCoreDefault_l367_7; + wire when_Pipeline_l124; + reg [31:0] decode_to_execute_PC; + wire when_Pipeline_l124_1; + reg [31:0] execute_to_memory_PC; + wire when_Pipeline_l124_2; + reg [31:0] memory_to_writeBack_PC; + wire when_Pipeline_l124_3; + reg [31:0] decode_to_execute_INSTRUCTION; + wire when_Pipeline_l124_4; + reg [31:0] execute_to_memory_INSTRUCTION; + wire when_Pipeline_l124_5; + reg [31:0] memory_to_writeBack_INSTRUCTION; + wire when_Pipeline_l124_6; + reg [31:0] decode_to_execute_FORMAL_PC_NEXT; + wire when_Pipeline_l124_7; + reg [31:0] execute_to_memory_FORMAL_PC_NEXT; + wire when_Pipeline_l124_8; + reg [31:0] memory_to_writeBack_FORMAL_PC_NEXT; + wire when_Pipeline_l124_9; + reg decode_to_execute_MEMORY_FORCE_CONSTISTENCY; + wire when_Pipeline_l124_10; + reg `Src1CtrlEnum_binary_sequential_type decode_to_execute_SRC1_CTRL; + wire when_Pipeline_l124_11; + reg decode_to_execute_SRC_USE_SUB_LESS; + wire when_Pipeline_l124_12; + reg decode_to_execute_MEMORY_ENABLE; + wire when_Pipeline_l124_13; + reg execute_to_memory_MEMORY_ENABLE; + wire when_Pipeline_l124_14; + reg memory_to_writeBack_MEMORY_ENABLE; + wire when_Pipeline_l124_15; + reg `AluCtrlEnum_binary_sequential_type decode_to_execute_ALU_CTRL; + wire when_Pipeline_l124_16; + reg `Src2CtrlEnum_binary_sequential_type decode_to_execute_SRC2_CTRL; + wire when_Pipeline_l124_17; + reg decode_to_execute_REGFILE_WRITE_VALID; + wire when_Pipeline_l124_18; + reg execute_to_memory_REGFILE_WRITE_VALID; + wire when_Pipeline_l124_19; + reg memory_to_writeBack_REGFILE_WRITE_VALID; + wire when_Pipeline_l124_20; + reg decode_to_execute_BYPASSABLE_EXECUTE_STAGE; + wire when_Pipeline_l124_21; + reg decode_to_execute_BYPASSABLE_MEMORY_STAGE; + wire when_Pipeline_l124_22; + reg execute_to_memory_BYPASSABLE_MEMORY_STAGE; + wire when_Pipeline_l124_23; + reg decode_to_execute_MEMORY_WR; + wire when_Pipeline_l124_24; + reg execute_to_memory_MEMORY_WR; + wire when_Pipeline_l124_25; + reg memory_to_writeBack_MEMORY_WR; + wire when_Pipeline_l124_26; + reg decode_to_execute_MEMORY_MANAGMENT; + wire when_Pipeline_l124_27; + reg decode_to_execute_SRC_LESS_UNSIGNED; + wire when_Pipeline_l124_28; + reg `AluBitwiseCtrlEnum_binary_sequential_type decode_to_execute_ALU_BITWISE_CTRL; + wire when_Pipeline_l124_29; + reg `ShiftCtrlEnum_binary_sequential_type decode_to_execute_SHIFT_CTRL; + wire when_Pipeline_l124_30; + reg `ShiftCtrlEnum_binary_sequential_type execute_to_memory_SHIFT_CTRL; + wire when_Pipeline_l124_31; + reg `BranchCtrlEnum_binary_sequential_type decode_to_execute_BRANCH_CTRL; + wire when_Pipeline_l124_32; + reg decode_to_execute_IS_CSR; + wire when_Pipeline_l124_33; + reg `EnvCtrlEnum_binary_sequential_type decode_to_execute_ENV_CTRL; + wire when_Pipeline_l124_34; + reg `EnvCtrlEnum_binary_sequential_type execute_to_memory_ENV_CTRL; + wire when_Pipeline_l124_35; + reg `EnvCtrlEnum_binary_sequential_type memory_to_writeBack_ENV_CTRL; + wire when_Pipeline_l124_36; + reg decode_to_execute_IS_MUL; + wire when_Pipeline_l124_37; + reg execute_to_memory_IS_MUL; + wire when_Pipeline_l124_38; + reg memory_to_writeBack_IS_MUL; + wire when_Pipeline_l124_39; + reg decode_to_execute_IS_DIV; + wire when_Pipeline_l124_40; + reg execute_to_memory_IS_DIV; + wire when_Pipeline_l124_41; + reg decode_to_execute_IS_RS1_SIGNED; + wire when_Pipeline_l124_42; + reg decode_to_execute_IS_RS2_SIGNED; + wire when_Pipeline_l124_43; + reg decode_to_execute_CfuPlugin_CFU_ENABLE; + wire when_Pipeline_l124_44; + reg `Input2Kind_binary_sequential_type decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND; + wire when_Pipeline_l124_45; + reg [31:0] decode_to_execute_RS1; + wire when_Pipeline_l124_46; + reg [31:0] decode_to_execute_RS2; + wire when_Pipeline_l124_47; + reg decode_to_execute_SRC2_FORCE_ZERO; + wire when_Pipeline_l124_48; + reg decode_to_execute_PREDICTION_HAD_BRANCHED2; + wire when_Pipeline_l124_49; + reg decode_to_execute_CSR_WRITE_OPCODE; + wire when_Pipeline_l124_50; + reg decode_to_execute_CSR_READ_OPCODE; + wire when_Pipeline_l124_51; + reg [31:0] execute_to_memory_MEMORY_STORE_DATA_RF; + wire when_Pipeline_l124_52; + reg [31:0] memory_to_writeBack_MEMORY_STORE_DATA_RF; + wire when_Pipeline_l124_53; + reg [31:0] execute_to_memory_REGFILE_WRITE_DATA; + wire when_Pipeline_l124_54; + reg [31:0] memory_to_writeBack_REGFILE_WRITE_DATA; + wire when_Pipeline_l124_55; + reg [31:0] execute_to_memory_SHIFT_RIGHT; + wire when_Pipeline_l124_56; + reg [31:0] execute_to_memory_MUL_LL; + wire when_Pipeline_l124_57; + reg [33:0] execute_to_memory_MUL_LH; + wire when_Pipeline_l124_58; + reg [33:0] execute_to_memory_MUL_HL; + wire when_Pipeline_l124_59; + reg [33:0] execute_to_memory_MUL_HH; + wire when_Pipeline_l124_60; + reg [33:0] memory_to_writeBack_MUL_HH; + wire when_Pipeline_l124_61; + reg execute_to_memory_CfuPlugin_CFU_IN_FLIGHT; + wire when_Pipeline_l124_62; + reg memory_to_writeBack_CfuPlugin_CFU_IN_FLIGHT; + wire when_Pipeline_l124_63; + reg [51:0] memory_to_writeBack_MUL_LOW; + wire when_Pipeline_l151; + wire when_Pipeline_l154; + wire when_Pipeline_l151_1; + wire when_Pipeline_l154_1; + wire when_Pipeline_l151_2; + wire when_Pipeline_l154_2; + wire when_CsrPlugin_l1264; + reg execute_CsrPlugin_csr_3264; + wire when_CsrPlugin_l1264_1; + reg execute_CsrPlugin_csr_3857; + wire when_CsrPlugin_l1264_2; + reg execute_CsrPlugin_csr_3858; + wire when_CsrPlugin_l1264_3; + reg execute_CsrPlugin_csr_3859; + wire when_CsrPlugin_l1264_4; + reg execute_CsrPlugin_csr_3860; + wire when_CsrPlugin_l1264_5; + reg execute_CsrPlugin_csr_769; + wire when_CsrPlugin_l1264_6; + reg execute_CsrPlugin_csr_768; + wire when_CsrPlugin_l1264_7; + reg execute_CsrPlugin_csr_836; + wire when_CsrPlugin_l1264_8; + reg execute_CsrPlugin_csr_772; + wire when_CsrPlugin_l1264_9; + reg execute_CsrPlugin_csr_773; + wire when_CsrPlugin_l1264_10; + reg execute_CsrPlugin_csr_833; + wire when_CsrPlugin_l1264_11; + reg execute_CsrPlugin_csr_832; + wire when_CsrPlugin_l1264_12; + reg execute_CsrPlugin_csr_834; + wire when_CsrPlugin_l1264_13; + reg execute_CsrPlugin_csr_835; + wire when_CsrPlugin_l1264_14; + reg execute_CsrPlugin_csr_2816; + wire when_CsrPlugin_l1264_15; + reg execute_CsrPlugin_csr_2944; + wire when_CsrPlugin_l1264_16; + reg execute_CsrPlugin_csr_2818; + wire when_CsrPlugin_l1264_17; + reg execute_CsrPlugin_csr_2946; + wire when_CsrPlugin_l1264_18; + reg execute_CsrPlugin_csr_3072; + wire when_CsrPlugin_l1264_19; + reg execute_CsrPlugin_csr_3200; + wire when_CsrPlugin_l1264_20; + reg execute_CsrPlugin_csr_3074; + wire when_CsrPlugin_l1264_21; + reg execute_CsrPlugin_csr_3202; + wire when_CsrPlugin_l1264_22; + reg execute_CsrPlugin_csr_3008; + wire when_CsrPlugin_l1264_23; + reg execute_CsrPlugin_csr_4032; + wire when_CsrPlugin_l1264_24; + reg execute_CsrPlugin_csr_2820; + wire when_CsrPlugin_l1264_25; + reg execute_CsrPlugin_csr_2821; + wire when_CsrPlugin_l1264_26; + reg execute_CsrPlugin_csr_2822; + wire when_CsrPlugin_l1264_27; + reg execute_CsrPlugin_csr_2823; + wire when_CsrPlugin_l1264_28; + reg execute_CsrPlugin_csr_2824; + wire when_CsrPlugin_l1264_29; + reg execute_CsrPlugin_csr_2825; + wire when_CsrPlugin_l1264_30; + reg execute_CsrPlugin_csr_2826; + wire when_CsrPlugin_l1264_31; + reg execute_CsrPlugin_csr_2827; + wire when_CsrPlugin_l1264_32; + reg execute_CsrPlugin_csr_2828; + wire when_CsrPlugin_l1264_33; + reg execute_CsrPlugin_csr_2829; + wire when_CsrPlugin_l1264_34; + reg execute_CsrPlugin_csr_2830; + wire when_CsrPlugin_l1264_35; + reg execute_CsrPlugin_csr_2831; + wire when_CsrPlugin_l1264_36; + reg execute_CsrPlugin_csr_2832; + wire when_CsrPlugin_l1264_37; + reg execute_CsrPlugin_csr_2833; + wire when_CsrPlugin_l1264_38; + reg execute_CsrPlugin_csr_2834; + wire when_CsrPlugin_l1264_39; + reg execute_CsrPlugin_csr_2835; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_10; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_11; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_12; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_13; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_14; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_15; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_16; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_17; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_18; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_19; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_20; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_21; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_22; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_23; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_24; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_25; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_26; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_27; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_28; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_29; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_30; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_31; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_32; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_33; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_34; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_35; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_36; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_37; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_38; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_39; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_40; + wire when_CsrPlugin_l1297; + wire when_CsrPlugin_l1302; + reg [2:0] _zz_iBusWishbone_ADR; + wire when_InstructionCache_l239; + reg _zz_iBus_rsp_valid; + reg [31:0] iBusWishbone_DAT_MISO_regNext; + reg [2:0] _zz_dBus_cmd_ready; + wire _zz_dBus_cmd_ready_1; + wire _zz_dBus_cmd_ready_2; + wire _zz_dBus_cmd_ready_3; + wire _zz_dBus_cmd_ready_4; + wire _zz_dBus_cmd_ready_5; + reg _zz_dBus_rsp_valid; + reg [31:0] dBusWishbone_DAT_MISO_regNext; + `ifndef SYNTHESIS + reg [39:0] decode_CfuPlugin_CFU_INPUT_2_KIND_string; + reg [39:0] _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_string; + reg [39:0] _zz_decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND_string; + reg [39:0] _zz_decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND_1_string; + reg [39:0] _zz_memory_to_writeBack_ENV_CTRL_string; + reg [39:0] _zz_memory_to_writeBack_ENV_CTRL_1_string; + reg [39:0] _zz_execute_to_memory_ENV_CTRL_string; + reg [39:0] _zz_execute_to_memory_ENV_CTRL_1_string; + reg [39:0] decode_ENV_CTRL_string; + reg [39:0] _zz_decode_ENV_CTRL_string; + reg [39:0] _zz_decode_to_execute_ENV_CTRL_string; + reg [39:0] _zz_decode_to_execute_ENV_CTRL_1_string; + reg [31:0] _zz_decode_to_execute_BRANCH_CTRL_string; + reg [31:0] _zz_decode_to_execute_BRANCH_CTRL_1_string; + reg [71:0] _zz_execute_to_memory_SHIFT_CTRL_string; + reg [71:0] _zz_execute_to_memory_SHIFT_CTRL_1_string; + reg [71:0] decode_SHIFT_CTRL_string; + reg [71:0] _zz_decode_SHIFT_CTRL_string; + reg [71:0] _zz_decode_to_execute_SHIFT_CTRL_string; + reg [71:0] _zz_decode_to_execute_SHIFT_CTRL_1_string; + reg [39:0] decode_ALU_BITWISE_CTRL_string; + reg [39:0] _zz_decode_ALU_BITWISE_CTRL_string; + reg [39:0] _zz_decode_to_execute_ALU_BITWISE_CTRL_string; + reg [39:0] _zz_decode_to_execute_ALU_BITWISE_CTRL_1_string; + reg [23:0] decode_SRC2_CTRL_string; + reg [23:0] _zz_decode_SRC2_CTRL_string; + reg [23:0] _zz_decode_to_execute_SRC2_CTRL_string; + reg [23:0] _zz_decode_to_execute_SRC2_CTRL_1_string; + reg [63:0] decode_ALU_CTRL_string; + reg [63:0] _zz_decode_ALU_CTRL_string; + reg [63:0] _zz_decode_to_execute_ALU_CTRL_string; + reg [63:0] _zz_decode_to_execute_ALU_CTRL_1_string; + reg [95:0] decode_SRC1_CTRL_string; + reg [95:0] _zz_decode_SRC1_CTRL_string; + reg [95:0] _zz_decode_to_execute_SRC1_CTRL_string; + reg [95:0] _zz_decode_to_execute_SRC1_CTRL_1_string; + reg [39:0] execute_CfuPlugin_CFU_INPUT_2_KIND_string; + reg [39:0] _zz_execute_CfuPlugin_CFU_INPUT_2_KIND_string; + reg [39:0] memory_ENV_CTRL_string; + reg [39:0] _zz_memory_ENV_CTRL_string; + reg [39:0] execute_ENV_CTRL_string; + reg [39:0] _zz_execute_ENV_CTRL_string; + reg [39:0] writeBack_ENV_CTRL_string; + reg [39:0] _zz_writeBack_ENV_CTRL_string; + reg [31:0] execute_BRANCH_CTRL_string; + reg [31:0] _zz_execute_BRANCH_CTRL_string; + reg [71:0] memory_SHIFT_CTRL_string; + reg [71:0] _zz_memory_SHIFT_CTRL_string; + reg [71:0] execute_SHIFT_CTRL_string; + reg [71:0] _zz_execute_SHIFT_CTRL_string; + reg [23:0] execute_SRC2_CTRL_string; + reg [23:0] _zz_execute_SRC2_CTRL_string; + reg [95:0] execute_SRC1_CTRL_string; + reg [95:0] _zz_execute_SRC1_CTRL_string; + reg [63:0] execute_ALU_CTRL_string; + reg [63:0] _zz_execute_ALU_CTRL_string; + reg [39:0] execute_ALU_BITWISE_CTRL_string; + reg [39:0] _zz_execute_ALU_BITWISE_CTRL_string; + reg [39:0] _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_1_string; + reg [39:0] _zz_decode_ENV_CTRL_1_string; + reg [31:0] _zz_decode_BRANCH_CTRL_string; + reg [71:0] _zz_decode_SHIFT_CTRL_1_string; + reg [39:0] _zz_decode_ALU_BITWISE_CTRL_1_string; + reg [23:0] _zz_decode_SRC2_CTRL_1_string; + reg [63:0] _zz_decode_ALU_CTRL_1_string; + reg [95:0] _zz_decode_SRC1_CTRL_1_string; + reg [31:0] decode_BRANCH_CTRL_string; + reg [31:0] _zz_decode_BRANCH_CTRL_1_string; + reg [95:0] _zz_decode_SRC1_CTRL_2_string; + reg [63:0] _zz_decode_ALU_CTRL_2_string; + reg [23:0] _zz_decode_SRC2_CTRL_2_string; + reg [39:0] _zz_decode_ALU_BITWISE_CTRL_2_string; + reg [71:0] _zz_decode_SHIFT_CTRL_2_string; + reg [31:0] _zz_decode_BRANCH_CTRL_2_string; + reg [39:0] _zz_decode_ENV_CTRL_2_string; + reg [39:0] _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_8_string; + reg [95:0] decode_to_execute_SRC1_CTRL_string; + reg [63:0] decode_to_execute_ALU_CTRL_string; + reg [23:0] decode_to_execute_SRC2_CTRL_string; + reg [39:0] decode_to_execute_ALU_BITWISE_CTRL_string; + reg [71:0] decode_to_execute_SHIFT_CTRL_string; + reg [71:0] execute_to_memory_SHIFT_CTRL_string; + reg [31:0] decode_to_execute_BRANCH_CTRL_string; + reg [39:0] decode_to_execute_ENV_CTRL_string; + reg [39:0] execute_to_memory_ENV_CTRL_string; + reg [39:0] memory_to_writeBack_ENV_CTRL_string; + reg [39:0] decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND_string; + `endif + + (* ram_style = "block" *) reg [31:0] RegFilePlugin_regFile [0:31] /* verilator public */ ; + + assign _zz_when = ({decodeExceptionPort_valid,IBusCachedPlugin_decodeExceptionPort_valid} != 2'b00); + assign _zz_when_1 = ({CsrPlugin_selfException_valid,BranchPlugin_branchExceptionPort_valid} != 2'b00); + assign _zz_memory_MUL_LOW = ($signed(_zz_memory_MUL_LOW_1) + $signed(_zz_memory_MUL_LOW_5)); + assign _zz_memory_MUL_LOW_1 = ($signed(_zz_memory_MUL_LOW_2) + $signed(_zz_memory_MUL_LOW_3)); + assign _zz_memory_MUL_LOW_2 = 52'h0; + assign _zz_memory_MUL_LOW_4 = {1'b0,memory_MUL_LL}; + assign _zz_memory_MUL_LOW_3 = {{19{_zz_memory_MUL_LOW_4[32]}}, _zz_memory_MUL_LOW_4}; + assign _zz_memory_MUL_LOW_6 = ({16'd0,memory_MUL_LH} <<< 16); + assign _zz_memory_MUL_LOW_5 = {{2{_zz_memory_MUL_LOW_6[49]}}, _zz_memory_MUL_LOW_6}; + assign _zz_memory_MUL_LOW_8 = ({16'd0,memory_MUL_HL} <<< 16); + assign _zz_memory_MUL_LOW_7 = {{2{_zz_memory_MUL_LOW_8[49]}}, _zz_memory_MUL_LOW_8}; + assign _zz_execute_SHIFT_RIGHT_1 = ($signed(_zz_execute_SHIFT_RIGHT_2) >>> execute_FullBarrelShifterPlugin_amplitude); + assign _zz_execute_SHIFT_RIGHT = _zz_execute_SHIFT_RIGHT_1[31 : 0]; + assign _zz_execute_SHIFT_RIGHT_2 = {((execute_SHIFT_CTRL == `ShiftCtrlEnum_binary_sequential_SRA_1) && execute_FullBarrelShifterPlugin_reversed[31]),execute_FullBarrelShifterPlugin_reversed}; + assign _zz__zz_IBusCachedPlugin_jump_pcLoad_payload_1 = (_zz_IBusCachedPlugin_jump_pcLoad_payload - 4'b0001); + assign _zz_IBusCachedPlugin_fetchPc_pc_1 = {IBusCachedPlugin_fetchPc_inc,2'b00}; + assign _zz_IBusCachedPlugin_fetchPc_pc = {29'd0, _zz_IBusCachedPlugin_fetchPc_pc_1}; + assign _zz__zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch = {{{decode_INSTRUCTION[31],decode_INSTRUCTION[7]},decode_INSTRUCTION[30 : 25]},decode_INSTRUCTION[11 : 8]}; + assign _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_2 = {{_zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_1,{{{decode_INSTRUCTION[31],decode_INSTRUCTION[7]},decode_INSTRUCTION[30 : 25]},decode_INSTRUCTION[11 : 8]}},1'b0}; + assign _zz__zz_2 = {{{decode_INSTRUCTION[31],decode_INSTRUCTION[19 : 12]},decode_INSTRUCTION[20]},decode_INSTRUCTION[30 : 21]}; + assign _zz__zz_4 = {{{decode_INSTRUCTION[31],decode_INSTRUCTION[7]},decode_INSTRUCTION[30 : 25]},decode_INSTRUCTION[11 : 8]}; + assign _zz__zz_6 = {{_zz_3,{{{decode_INSTRUCTION[31],decode_INSTRUCTION[19 : 12]},decode_INSTRUCTION[20]},decode_INSTRUCTION[30 : 21]}},1'b0}; + assign _zz__zz_6_1 = {{_zz_5,{{{decode_INSTRUCTION[31],decode_INSTRUCTION[7]},decode_INSTRUCTION[30 : 25]},decode_INSTRUCTION[11 : 8]}},1'b0}; + assign _zz__zz_IBusCachedPlugin_predictionJumpInterface_payload = {{{decode_INSTRUCTION[31],decode_INSTRUCTION[19 : 12]},decode_INSTRUCTION[20]},decode_INSTRUCTION[30 : 21]}; + assign _zz__zz_IBusCachedPlugin_predictionJumpInterface_payload_2 = {{{decode_INSTRUCTION[31],decode_INSTRUCTION[7]},decode_INSTRUCTION[30 : 25]},decode_INSTRUCTION[11 : 8]}; + assign _zz_DBusCachedPlugin_exceptionBus_payload_code = (writeBack_MEMORY_WR ? 3'b111 : 3'b101); + assign _zz_DBusCachedPlugin_exceptionBus_payload_code_1 = (writeBack_MEMORY_WR ? 3'b110 : 3'b100); + assign _zz__zz_execute_REGFILE_WRITE_DATA = execute_SRC_LESS; + assign _zz__zz_execute_SRC1 = 3'b100; + assign _zz__zz_execute_SRC1_1 = execute_INSTRUCTION[19 : 15]; + assign _zz__zz_execute_SRC2_3 = {execute_INSTRUCTION[31 : 25],execute_INSTRUCTION[11 : 7]}; + assign _zz_execute_SrcPlugin_addSub = ($signed(_zz_execute_SrcPlugin_addSub_1) + $signed(_zz_execute_SrcPlugin_addSub_4)); + assign _zz_execute_SrcPlugin_addSub_1 = ($signed(_zz_execute_SrcPlugin_addSub_2) + $signed(_zz_execute_SrcPlugin_addSub_3)); + assign _zz_execute_SrcPlugin_addSub_2 = execute_SRC1; + assign _zz_execute_SrcPlugin_addSub_3 = (execute_SRC_USE_SUB_LESS ? (~ execute_SRC2) : execute_SRC2); + assign _zz_execute_SrcPlugin_addSub_4 = (execute_SRC_USE_SUB_LESS ? _zz_execute_SrcPlugin_addSub_5 : _zz_execute_SrcPlugin_addSub_6); + assign _zz_execute_SrcPlugin_addSub_5 = 32'h00000001; + assign _zz_execute_SrcPlugin_addSub_6 = 32'h0; + assign _zz__zz_execute_BranchPlugin_missAlignedTarget_2 = {{{execute_INSTRUCTION[31],execute_INSTRUCTION[19 : 12]},execute_INSTRUCTION[20]},execute_INSTRUCTION[30 : 21]}; + assign _zz__zz_execute_BranchPlugin_missAlignedTarget_4 = {{{execute_INSTRUCTION[31],execute_INSTRUCTION[7]},execute_INSTRUCTION[30 : 25]},execute_INSTRUCTION[11 : 8]}; + assign _zz__zz_execute_BranchPlugin_missAlignedTarget_6 = {_zz_execute_BranchPlugin_missAlignedTarget_1,execute_INSTRUCTION[31 : 20]}; + assign _zz__zz_execute_BranchPlugin_missAlignedTarget_6_1 = {{_zz_execute_BranchPlugin_missAlignedTarget_3,{{{execute_INSTRUCTION[31],execute_INSTRUCTION[19 : 12]},execute_INSTRUCTION[20]},execute_INSTRUCTION[30 : 21]}},1'b0}; + assign _zz__zz_execute_BranchPlugin_missAlignedTarget_6_2 = {{_zz_execute_BranchPlugin_missAlignedTarget_5,{{{execute_INSTRUCTION[31],execute_INSTRUCTION[7]},execute_INSTRUCTION[30 : 25]},execute_INSTRUCTION[11 : 8]}},1'b0}; + assign _zz__zz_execute_BranchPlugin_branch_src2_2 = {{{execute_INSTRUCTION[31],execute_INSTRUCTION[19 : 12]},execute_INSTRUCTION[20]},execute_INSTRUCTION[30 : 21]}; + assign _zz__zz_execute_BranchPlugin_branch_src2_4 = {{{execute_INSTRUCTION[31],execute_INSTRUCTION[7]},execute_INSTRUCTION[30 : 25]},execute_INSTRUCTION[11 : 8]}; + assign _zz_execute_BranchPlugin_branch_src2_9 = 3'b100; + assign _zz__zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_1 = (_zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code & (~ _zz__zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_1_1)); + assign _zz__zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_1_1 = (_zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code - 2'b01); + assign _zz__zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_3 = (_zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_2 & (~ _zz__zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_3_1)); + assign _zz__zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_3_1 = (_zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_2 - 2'b01); + assign _zz_writeBack_MulPlugin_result = {{14{writeBack_MUL_LOW[51]}}, writeBack_MUL_LOW}; + assign _zz_writeBack_MulPlugin_result_1 = ({32'd0,writeBack_MUL_HH} <<< 32); + assign _zz__zz_decode_RS2_2 = writeBack_MUL_LOW[31 : 0]; + assign _zz__zz_decode_RS2_2_1 = writeBack_MulPlugin_result[63 : 32]; + assign _zz_memory_DivPlugin_div_counter_valueNext_1 = memory_DivPlugin_div_counter_willIncrement; + assign _zz_memory_DivPlugin_div_counter_valueNext = {5'd0, _zz_memory_DivPlugin_div_counter_valueNext_1}; + assign _zz_memory_DivPlugin_div_stage_0_remainderMinusDenominator = {1'd0, memory_DivPlugin_rs2}; + assign _zz_memory_DivPlugin_div_stage_0_outRemainder = memory_DivPlugin_div_stage_0_remainderMinusDenominator[31:0]; + assign _zz_memory_DivPlugin_div_stage_0_outRemainder_1 = memory_DivPlugin_div_stage_0_remainderShifted[31:0]; + assign _zz_memory_DivPlugin_div_stage_0_outNumerator = {_zz_memory_DivPlugin_div_stage_0_remainderShifted,(! memory_DivPlugin_div_stage_0_remainderMinusDenominator[32])}; + assign _zz_memory_DivPlugin_div_result_1 = _zz_memory_DivPlugin_div_result_2; + assign _zz_memory_DivPlugin_div_result_2 = _zz_memory_DivPlugin_div_result_3; + assign _zz_memory_DivPlugin_div_result_3 = ({memory_DivPlugin_div_needRevert,(memory_DivPlugin_div_needRevert ? (~ _zz_memory_DivPlugin_div_result) : _zz_memory_DivPlugin_div_result)} + _zz_memory_DivPlugin_div_result_4); + assign _zz_memory_DivPlugin_div_result_5 = memory_DivPlugin_div_needRevert; + assign _zz_memory_DivPlugin_div_result_4 = {32'd0, _zz_memory_DivPlugin_div_result_5}; + assign _zz_memory_DivPlugin_rs1_3 = _zz_memory_DivPlugin_rs1; + assign _zz_memory_DivPlugin_rs1_2 = {32'd0, _zz_memory_DivPlugin_rs1_3}; + assign _zz_memory_DivPlugin_rs2_2 = _zz_memory_DivPlugin_rs2; + assign _zz_memory_DivPlugin_rs2_1 = {31'd0, _zz_memory_DivPlugin_rs2_2}; + assign _zz_execute_CfuPlugin_functionsIds_0 = {execute_INSTRUCTION[31 : 25],execute_INSTRUCTION[14 : 12]}; + assign _zz_iBusWishbone_ADR_1 = (iBus_cmd_payload_address >>> 5); + assign _zz_decode_RegFilePlugin_rs1Data = 1'b1; + assign _zz_decode_RegFilePlugin_rs2Data = 1'b1; + assign _zz_IBusCachedPlugin_jump_pcLoad_payload_6 = {_zz_IBusCachedPlugin_jump_pcLoad_payload_4,_zz_IBusCachedPlugin_jump_pcLoad_payload_3}; + assign _zz_writeBack_DBusCachedPlugin_rspShifted_1 = dataCache_1_io_cpu_writeBack_address[1 : 0]; + assign _zz_writeBack_DBusCachedPlugin_rspShifted_3 = dataCache_1_io_cpu_writeBack_address[1 : 1]; + assign _zz_decode_LEGAL_INSTRUCTION = 32'h0000106f; + assign _zz_decode_LEGAL_INSTRUCTION_1 = (decode_INSTRUCTION & 32'h0000107f); + assign _zz_decode_LEGAL_INSTRUCTION_2 = 32'h00001073; + assign _zz_decode_LEGAL_INSTRUCTION_3 = ((decode_INSTRUCTION & 32'h0000207f) == 32'h00002073); + assign _zz_decode_LEGAL_INSTRUCTION_4 = ((decode_INSTRUCTION & 32'h0000407f) == 32'h00004063); + assign _zz_decode_LEGAL_INSTRUCTION_5 = {((decode_INSTRUCTION & 32'h0000207f) == 32'h00002013),{((decode_INSTRUCTION & 32'h0000603f) == 32'h00000023),{((decode_INSTRUCTION & _zz_decode_LEGAL_INSTRUCTION_6) == 32'h00000003),{(_zz_decode_LEGAL_INSTRUCTION_7 == _zz_decode_LEGAL_INSTRUCTION_8),{_zz_decode_LEGAL_INSTRUCTION_9,{_zz_decode_LEGAL_INSTRUCTION_10,_zz_decode_LEGAL_INSTRUCTION_11}}}}}}; + assign _zz_decode_LEGAL_INSTRUCTION_6 = 32'h0000207f; + assign _zz_decode_LEGAL_INSTRUCTION_7 = (decode_INSTRUCTION & 32'h0000505f); + assign _zz_decode_LEGAL_INSTRUCTION_8 = 32'h00000003; + assign _zz_decode_LEGAL_INSTRUCTION_9 = ((decode_INSTRUCTION & 32'h0000707b) == 32'h00000063); + assign _zz_decode_LEGAL_INSTRUCTION_10 = ((decode_INSTRUCTION & 32'h0000607f) == 32'h0000000f); + assign _zz_decode_LEGAL_INSTRUCTION_11 = {((decode_INSTRUCTION & 32'hfc00007f) == 32'h00000033),{((decode_INSTRUCTION & 32'h01f0707f) == 32'h0000500f),{((decode_INSTRUCTION & _zz_decode_LEGAL_INSTRUCTION_12) == 32'h00005013),{(_zz_decode_LEGAL_INSTRUCTION_13 == _zz_decode_LEGAL_INSTRUCTION_14),{_zz_decode_LEGAL_INSTRUCTION_15,{_zz_decode_LEGAL_INSTRUCTION_16,_zz_decode_LEGAL_INSTRUCTION_17}}}}}}; + assign _zz_decode_LEGAL_INSTRUCTION_12 = 32'hbc00707f; + assign _zz_decode_LEGAL_INSTRUCTION_13 = (decode_INSTRUCTION & 32'hfc00307f); + assign _zz_decode_LEGAL_INSTRUCTION_14 = 32'h00001013; + assign _zz_decode_LEGAL_INSTRUCTION_15 = ((decode_INSTRUCTION & 32'hbe00707f) == 32'h00005033); + assign _zz_decode_LEGAL_INSTRUCTION_16 = ((decode_INSTRUCTION & 32'hbe00707f) == 32'h00000033); + assign _zz_decode_LEGAL_INSTRUCTION_17 = {((decode_INSTRUCTION & 32'hdfffffff) == 32'h10200073),{((decode_INSTRUCTION & 32'hffffffff) == 32'h10500073),((decode_INSTRUCTION & 32'hffffffff) == 32'h00000073)}}; + assign _zz_IBusCachedPlugin_predictionJumpInterface_payload_4 = decode_INSTRUCTION[31]; + assign _zz_IBusCachedPlugin_predictionJumpInterface_payload_5 = decode_INSTRUCTION[31]; + assign _zz_IBusCachedPlugin_predictionJumpInterface_payload_6 = decode_INSTRUCTION[7]; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2 = ((decode_INSTRUCTION & 32'h02004064) == 32'h02004020); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_1 = 1'b0; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_2 = (((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_3) == 32'h02000030) != 1'b0); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_4 = ((_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_5 == _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_6) != 1'b0); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_7 = {(_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_8 != 1'b0),{(_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_9 != _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_14),{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_15,{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_17,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_19}}}}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_3 = 32'h02004074; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_5 = (decode_INSTRUCTION & 32'h00203050); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_6 = 32'h00000050; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_8 = ((decode_INSTRUCTION & 32'h00403050) == 32'h00000050); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_9 = {(_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_10 == _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_11),(_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_12 == _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_13)}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_14 = 2'b00; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_15 = ({_zz_decode_CfuPlugin_CFU_INPUT_2_KIND_5,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_16} != 2'b00); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_17 = (_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_18 != 1'b0); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_19 = {(_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_20 != _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_25),{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_26,{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_32,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_34}}}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_10 = (decode_INSTRUCTION & 32'h00001050); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_11 = 32'h00001050; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_12 = (decode_INSTRUCTION & 32'h00002050); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_13 = 32'h00002050; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_16 = ((decode_INSTRUCTION & 32'h0000001c) == 32'h00000004); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_18 = ((decode_INSTRUCTION & 32'h00000058) == 32'h00000040); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_20 = {(_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_21 == _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_22),(_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_23 == _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_24)}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_25 = 2'b00; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_26 = ({_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_27,{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_28,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_30}} != 3'b000); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_32 = (_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_33 != 1'b0); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_34 = {(_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_35 != _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_37),{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_38,{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_41,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_46}}}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_21 = (decode_INSTRUCTION & 32'h00007034); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_22 = 32'h00005010; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_23 = (decode_INSTRUCTION & 32'h02007064); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_24 = 32'h00005020; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_27 = ((decode_INSTRUCTION & 32'h40003054) == 32'h40001010); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_28 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_29) == 32'h00001010); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_30 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_31) == 32'h00001010); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_33 = ((decode_INSTRUCTION & 32'h00000064) == 32'h00000024); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_35 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_36) == 32'h00001000); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_37 = 1'b0; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_38 = ((_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_39 == _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_40) != 1'b0); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_41 = ({_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_42,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_44} != 2'b00); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_46 = {(_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_47 != _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_49),{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_50,{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_55,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_69}}}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_29 = 32'h00007034; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_31 = 32'h02007054; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_36 = 32'h00001000; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_39 = (decode_INSTRUCTION & 32'h00003000); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_40 = 32'h00002000; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_42 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_43) == 32'h00002000); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_44 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_45) == 32'h00001000); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_47 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_48) == 32'h00004004); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_49 = 1'b0; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_50 = ({_zz_decode_CfuPlugin_CFU_INPUT_2_KIND_6,{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_51,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_53}} != 3'b000); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_55 = ({_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_56,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_58} != 5'h0); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_69 = {(_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_70 != _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_72),{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_73,{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_88,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_101}}}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_43 = 32'h00002010; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_45 = 32'h00005000; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_48 = 32'h00004054; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_51 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_52) == 32'h00000020); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_53 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_54) == 32'h00000020); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_56 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_57) == 32'h00002040); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_58 = {(_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_59 == _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_60),{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_61,{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_63,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_66}}}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_70 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_71) == 32'h00000020); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_72 = 1'b0; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_73 = ({_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_74,{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_76,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_79}} != 6'h0); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_88 = ({_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_89,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_90} != 5'h0); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_101 = {(_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_102 != _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_115),{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_116,{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_121,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_126}}}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_52 = 32'h00000034; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_54 = 32'h00000064; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_57 = 32'h00002040; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_59 = (decode_INSTRUCTION & 32'h00001040); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_60 = 32'h00001040; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_61 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_62) == 32'h00000040); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_63 = (_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_64 == _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_65); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_66 = (_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_67 == _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_68); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_71 = 32'h00000020; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_74 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_75) == 32'h00000008); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_76 = (_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_77 == _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_78); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_79 = {_zz_decode_CfuPlugin_CFU_INPUT_2_KIND_4,{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_80,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_83}}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_89 = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_4; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_90 = {_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_91,{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_93,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_96}}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_102 = {_zz_decode_CfuPlugin_CFU_INPUT_2_KIND_5,{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_103,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_106}}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_115 = 6'h0; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_116 = ({_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_117,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_118} != 2'b00); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_121 = (_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_122 != _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_125); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_126 = {_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_127,{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_130,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_135}}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_62 = 32'h00000050; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_64 = (decode_INSTRUCTION & 32'h00400040); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_65 = 32'h00000040; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_67 = (decode_INSTRUCTION & 32'h00000038); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_68 = 32'h0; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_75 = 32'h00000008; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_77 = (decode_INSTRUCTION & 32'h00000040); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_78 = 32'h00000040; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_80 = (_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_81 == _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_82); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_83 = {_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_84,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_86}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_91 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_92) == 32'h00002010); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_93 = (_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_94 == _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_95); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_96 = {_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_97,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_99}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_103 = (_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_104 == _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_105); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_106 = {_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_107,{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_109,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_112}}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_117 = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_4; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_118 = (_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_119 == _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_120); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_122 = {_zz_decode_CfuPlugin_CFU_INPUT_2_KIND_4,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_123}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_125 = 2'b00; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_127 = (_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_128 != 1'b0); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_130 = (_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_131 != _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_134); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_135 = {_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_136,{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_144,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_148}}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_81 = (decode_INSTRUCTION & 32'h00004020); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_82 = 32'h00004020; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_84 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_85) == 32'h00000010); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_86 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_87) == 32'h00000020); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_92 = 32'h00002030; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_94 = (decode_INSTRUCTION & 32'h00001030); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_95 = 32'h00000010; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_97 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_98) == 32'h00002020); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_99 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_100) == 32'h00000020); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_104 = (decode_INSTRUCTION & 32'h00001010); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_105 = 32'h00001010; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_107 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_108) == 32'h00002010); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_109 = (_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_110 == _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_111); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_112 = {_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_113,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_114}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_119 = (decode_INSTRUCTION & 32'h00000070); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_120 = 32'h00000020; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_123 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_124) == 32'h0); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_128 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_129) == 32'h00004010); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_131 = (_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_132 == _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_133); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_134 = 1'b0; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_136 = ({_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_137,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_139} != 4'b0000); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_144 = (_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_145 != _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_147); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_148 = {_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_149,{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_155,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_159}}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_85 = 32'h00000030; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_87 = 32'h02000020; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_98 = 32'h02002060; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_100 = 32'h02003020; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_108 = 32'h00002010; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_110 = (decode_INSTRUCTION & 32'h00000050); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_111 = 32'h00000010; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_113 = ((decode_INSTRUCTION & 32'h0000000c) == 32'h00000004); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_114 = ((decode_INSTRUCTION & 32'h00000024) == 32'h0); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_124 = 32'h00000020; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_129 = 32'h00004014; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_132 = (decode_INSTRUCTION & 32'h00006014); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_133 = 32'h00002010; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_137 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_138) == 32'h0); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_139 = {(_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_140 == _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_141),{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_142,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_143}}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_145 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_146) == 32'h0); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_147 = 1'b0; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_149 = ({_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_150,{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_151,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_153}} != 3'b000); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_155 = ({_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_156,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_158} != 2'b00); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_159 = {(_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_160 != _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_163),(_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_164 != _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_166)}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_138 = 32'h00000044; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_140 = (decode_INSTRUCTION & 32'h00000018); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_141 = 32'h0; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_142 = ((decode_INSTRUCTION & 32'h00006004) == 32'h00002000); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_143 = ((decode_INSTRUCTION & 32'h00005004) == 32'h00001000); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_146 = 32'h00000058; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_150 = ((decode_INSTRUCTION & 32'h00000044) == 32'h00000040); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_151 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_152) == 32'h00002010); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_153 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_154) == 32'h40000030); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_156 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_157) == 32'h00000004); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_158 = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_3; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_160 = {(_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_161 == _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_162),_zz_decode_CfuPlugin_CFU_INPUT_2_KIND_3}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_163 = 2'b00; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_164 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_165) == 32'h00001004); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_166 = 1'b0; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_152 = 32'h00002014; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_154 = 32'h40000034; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_157 = 32'h00000014; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_161 = (decode_INSTRUCTION & 32'h00000044); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_162 = 32'h00000004; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_165 = 32'h00005054; + assign _zz_execute_BranchPlugin_branch_src2_6 = execute_INSTRUCTION[31]; + assign _zz_execute_BranchPlugin_branch_src2_7 = execute_INSTRUCTION[31]; + assign _zz_execute_BranchPlugin_branch_src2_8 = execute_INSTRUCTION[7]; + assign _zz_CsrPlugin_csrMapping_readDataInit_41 = 32'h0; + always @(posedge clk) begin + if(_zz_decode_RegFilePlugin_rs1Data) begin + _zz_RegFilePlugin_regFile_port0 <= RegFilePlugin_regFile[decode_RegFilePlugin_regFileReadAddress1]; + end + end + + always @(posedge clk) begin + if(_zz_decode_RegFilePlugin_rs2Data) begin + _zz_RegFilePlugin_regFile_port1 <= RegFilePlugin_regFile[decode_RegFilePlugin_regFileReadAddress2]; + end + end + + always @(posedge clk) begin + if(_zz_1) begin + RegFilePlugin_regFile[lastStageRegFileWrite_payload_address] <= lastStageRegFileWrite_payload_data; + end + end + + InstructionCache IBusCachedPlugin_cache ( + .io_flush (IBusCachedPlugin_cache_io_flush ), //i + .io_cpu_prefetch_isValid (IBusCachedPlugin_cache_io_cpu_prefetch_isValid ), //i + .io_cpu_prefetch_haltIt (IBusCachedPlugin_cache_io_cpu_prefetch_haltIt ), //o + .io_cpu_prefetch_pc (IBusCachedPlugin_iBusRsp_stages_0_input_payload ), //i + .io_cpu_fetch_isValid (IBusCachedPlugin_cache_io_cpu_fetch_isValid ), //i + .io_cpu_fetch_isStuck (IBusCachedPlugin_cache_io_cpu_fetch_isStuck ), //i + .io_cpu_fetch_isRemoved (IBusCachedPlugin_cache_io_cpu_fetch_isRemoved ), //i + .io_cpu_fetch_pc (IBusCachedPlugin_iBusRsp_stages_1_input_payload ), //i + .io_cpu_fetch_data (IBusCachedPlugin_cache_io_cpu_fetch_data ), //o + .io_cpu_fetch_mmuRsp_physicalAddress (IBusCachedPlugin_mmuBus_rsp_physicalAddress ), //i + .io_cpu_fetch_mmuRsp_isIoAccess (IBusCachedPlugin_mmuBus_rsp_isIoAccess ), //i + .io_cpu_fetch_mmuRsp_isPaging (IBusCachedPlugin_mmuBus_rsp_isPaging ), //i + .io_cpu_fetch_mmuRsp_allowRead (IBusCachedPlugin_mmuBus_rsp_allowRead ), //i + .io_cpu_fetch_mmuRsp_allowWrite (IBusCachedPlugin_mmuBus_rsp_allowWrite ), //i + .io_cpu_fetch_mmuRsp_allowExecute (IBusCachedPlugin_mmuBus_rsp_allowExecute ), //i + .io_cpu_fetch_mmuRsp_exception (IBusCachedPlugin_mmuBus_rsp_exception ), //i + .io_cpu_fetch_mmuRsp_refilling (IBusCachedPlugin_mmuBus_rsp_refilling ), //i + .io_cpu_fetch_mmuRsp_bypassTranslation (IBusCachedPlugin_mmuBus_rsp_bypassTranslation ), //i + .io_cpu_fetch_physicalAddress (IBusCachedPlugin_cache_io_cpu_fetch_physicalAddress ), //o + .io_cpu_decode_isValid (IBusCachedPlugin_cache_io_cpu_decode_isValid ), //i + .io_cpu_decode_isStuck (IBusCachedPlugin_cache_io_cpu_decode_isStuck ), //i + .io_cpu_decode_pc (IBusCachedPlugin_iBusRsp_stages_2_input_payload ), //i + .io_cpu_decode_physicalAddress (IBusCachedPlugin_cache_io_cpu_decode_physicalAddress ), //o + .io_cpu_decode_data (IBusCachedPlugin_cache_io_cpu_decode_data ), //o + .io_cpu_decode_cacheMiss (IBusCachedPlugin_cache_io_cpu_decode_cacheMiss ), //o + .io_cpu_decode_error (IBusCachedPlugin_cache_io_cpu_decode_error ), //o + .io_cpu_decode_mmuRefilling (IBusCachedPlugin_cache_io_cpu_decode_mmuRefilling ), //o + .io_cpu_decode_mmuException (IBusCachedPlugin_cache_io_cpu_decode_mmuException ), //o + .io_cpu_decode_isUser (IBusCachedPlugin_cache_io_cpu_decode_isUser ), //i + .io_cpu_fill_valid (IBusCachedPlugin_cache_io_cpu_fill_valid ), //i + .io_cpu_fill_payload (IBusCachedPlugin_cache_io_cpu_decode_physicalAddress ), //i + .io_mem_cmd_valid (IBusCachedPlugin_cache_io_mem_cmd_valid ), //o + .io_mem_cmd_ready (iBus_cmd_ready ), //i + .io_mem_cmd_payload_address (IBusCachedPlugin_cache_io_mem_cmd_payload_address ), //o + .io_mem_cmd_payload_size (IBusCachedPlugin_cache_io_mem_cmd_payload_size ), //o + .io_mem_rsp_valid (iBus_rsp_valid ), //i + .io_mem_rsp_payload_data (iBus_rsp_payload_data ), //i + .io_mem_rsp_payload_error (iBus_rsp_payload_error ), //i + .clk (clk ), //i + .reset (reset ) //i + ); + DataCache dataCache_1 ( + .io_cpu_execute_isValid (dataCache_1_io_cpu_execute_isValid ), //i + .io_cpu_execute_address (dataCache_1_io_cpu_execute_address ), //i + .io_cpu_execute_haltIt (dataCache_1_io_cpu_execute_haltIt ), //o + .io_cpu_execute_args_wr (execute_MEMORY_WR ), //i + .io_cpu_execute_args_size (execute_DBusCachedPlugin_size ), //i + .io_cpu_execute_args_totalyConsistent (execute_MEMORY_FORCE_CONSTISTENCY ), //i + .io_cpu_execute_refilling (dataCache_1_io_cpu_execute_refilling ), //o + .io_cpu_memory_isValid (dataCache_1_io_cpu_memory_isValid ), //i + .io_cpu_memory_isStuck (memory_arbitration_isStuck ), //i + .io_cpu_memory_isWrite (dataCache_1_io_cpu_memory_isWrite ), //o + .io_cpu_memory_address (dataCache_1_io_cpu_memory_address ), //i + .io_cpu_memory_mmuRsp_physicalAddress (DBusCachedPlugin_mmuBus_rsp_physicalAddress ), //i + .io_cpu_memory_mmuRsp_isIoAccess (dataCache_1_io_cpu_memory_mmuRsp_isIoAccess ), //i + .io_cpu_memory_mmuRsp_isPaging (DBusCachedPlugin_mmuBus_rsp_isPaging ), //i + .io_cpu_memory_mmuRsp_allowRead (DBusCachedPlugin_mmuBus_rsp_allowRead ), //i + .io_cpu_memory_mmuRsp_allowWrite (DBusCachedPlugin_mmuBus_rsp_allowWrite ), //i + .io_cpu_memory_mmuRsp_allowExecute (DBusCachedPlugin_mmuBus_rsp_allowExecute ), //i + .io_cpu_memory_mmuRsp_exception (DBusCachedPlugin_mmuBus_rsp_exception ), //i + .io_cpu_memory_mmuRsp_refilling (DBusCachedPlugin_mmuBus_rsp_refilling ), //i + .io_cpu_memory_mmuRsp_bypassTranslation (DBusCachedPlugin_mmuBus_rsp_bypassTranslation ), //i + .io_cpu_writeBack_isValid (dataCache_1_io_cpu_writeBack_isValid ), //i + .io_cpu_writeBack_isStuck (writeBack_arbitration_isStuck ), //i + .io_cpu_writeBack_isUser (dataCache_1_io_cpu_writeBack_isUser ), //i + .io_cpu_writeBack_haltIt (dataCache_1_io_cpu_writeBack_haltIt ), //o + .io_cpu_writeBack_isWrite (dataCache_1_io_cpu_writeBack_isWrite ), //o + .io_cpu_writeBack_storeData (dataCache_1_io_cpu_writeBack_storeData ), //i + .io_cpu_writeBack_data (dataCache_1_io_cpu_writeBack_data ), //o + .io_cpu_writeBack_address (dataCache_1_io_cpu_writeBack_address ), //i + .io_cpu_writeBack_mmuException (dataCache_1_io_cpu_writeBack_mmuException ), //o + .io_cpu_writeBack_unalignedAccess (dataCache_1_io_cpu_writeBack_unalignedAccess ), //o + .io_cpu_writeBack_accessError (dataCache_1_io_cpu_writeBack_accessError ), //o + .io_cpu_writeBack_keepMemRspData (dataCache_1_io_cpu_writeBack_keepMemRspData ), //o + .io_cpu_writeBack_fence_SW (dataCache_1_io_cpu_writeBack_fence_SW ), //i + .io_cpu_writeBack_fence_SR (dataCache_1_io_cpu_writeBack_fence_SR ), //i + .io_cpu_writeBack_fence_SO (dataCache_1_io_cpu_writeBack_fence_SO ), //i + .io_cpu_writeBack_fence_SI (dataCache_1_io_cpu_writeBack_fence_SI ), //i + .io_cpu_writeBack_fence_PW (dataCache_1_io_cpu_writeBack_fence_PW ), //i + .io_cpu_writeBack_fence_PR (dataCache_1_io_cpu_writeBack_fence_PR ), //i + .io_cpu_writeBack_fence_PO (dataCache_1_io_cpu_writeBack_fence_PO ), //i + .io_cpu_writeBack_fence_PI (dataCache_1_io_cpu_writeBack_fence_PI ), //i + .io_cpu_writeBack_fence_FM (dataCache_1_io_cpu_writeBack_fence_FM ), //i + .io_cpu_writeBack_exclusiveOk (dataCache_1_io_cpu_writeBack_exclusiveOk ), //o + .io_cpu_redo (dataCache_1_io_cpu_redo ), //o + .io_cpu_flush_valid (dataCache_1_io_cpu_flush_valid ), //i + .io_cpu_flush_ready (dataCache_1_io_cpu_flush_ready ), //o + .io_mem_cmd_valid (dataCache_1_io_mem_cmd_valid ), //o + .io_mem_cmd_ready (dataCache_1_io_mem_cmd_ready ), //i + .io_mem_cmd_payload_wr (dataCache_1_io_mem_cmd_payload_wr ), //o + .io_mem_cmd_payload_uncached (dataCache_1_io_mem_cmd_payload_uncached ), //o + .io_mem_cmd_payload_address (dataCache_1_io_mem_cmd_payload_address ), //o + .io_mem_cmd_payload_data (dataCache_1_io_mem_cmd_payload_data ), //o + .io_mem_cmd_payload_mask (dataCache_1_io_mem_cmd_payload_mask ), //o + .io_mem_cmd_payload_size (dataCache_1_io_mem_cmd_payload_size ), //o + .io_mem_cmd_payload_last (dataCache_1_io_mem_cmd_payload_last ), //o + .io_mem_rsp_valid (dBus_rsp_valid ), //i + .io_mem_rsp_payload_last (dBus_rsp_payload_last ), //i + .io_mem_rsp_payload_data (dBus_rsp_payload_data ), //i + .io_mem_rsp_payload_error (dBus_rsp_payload_error ), //i + .clk (clk ), //i + .reset (reset ) //i + ); + always @(*) begin + case(_zz_IBusCachedPlugin_jump_pcLoad_payload_6) + 2'b00 : begin + _zz_IBusCachedPlugin_jump_pcLoad_payload_5 = DBusCachedPlugin_redoBranch_payload; + end + 2'b01 : begin + _zz_IBusCachedPlugin_jump_pcLoad_payload_5 = CsrPlugin_jumpInterface_payload; + end + 2'b10 : begin + _zz_IBusCachedPlugin_jump_pcLoad_payload_5 = BranchPlugin_jumpInterface_payload; + end + default : begin + _zz_IBusCachedPlugin_jump_pcLoad_payload_5 = IBusCachedPlugin_predictionJumpInterface_payload; + end + endcase + end + + always @(*) begin + case(_zz_writeBack_DBusCachedPlugin_rspShifted_1) + 2'b00 : begin + _zz_writeBack_DBusCachedPlugin_rspShifted = writeBack_DBusCachedPlugin_rspSplits_0; + end + 2'b01 : begin + _zz_writeBack_DBusCachedPlugin_rspShifted = writeBack_DBusCachedPlugin_rspSplits_1; + end + 2'b10 : begin + _zz_writeBack_DBusCachedPlugin_rspShifted = writeBack_DBusCachedPlugin_rspSplits_2; + end + default : begin + _zz_writeBack_DBusCachedPlugin_rspShifted = writeBack_DBusCachedPlugin_rspSplits_3; + end + endcase + end + + always @(*) begin + case(_zz_writeBack_DBusCachedPlugin_rspShifted_3) + 1'b0 : begin + _zz_writeBack_DBusCachedPlugin_rspShifted_2 = writeBack_DBusCachedPlugin_rspSplits_1; + end + default : begin + _zz_writeBack_DBusCachedPlugin_rspShifted_2 = writeBack_DBusCachedPlugin_rspSplits_3; + end + endcase + end + + `ifndef SYNTHESIS + always @(*) begin + case(decode_CfuPlugin_CFU_INPUT_2_KIND) + `Input2Kind_binary_sequential_RS : decode_CfuPlugin_CFU_INPUT_2_KIND_string = "RS "; + `Input2Kind_binary_sequential_IMM_I : decode_CfuPlugin_CFU_INPUT_2_KIND_string = "IMM_I"; + default : decode_CfuPlugin_CFU_INPUT_2_KIND_string = "?????"; + endcase + end + always @(*) begin + case(_zz_decode_CfuPlugin_CFU_INPUT_2_KIND) + `Input2Kind_binary_sequential_RS : _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_string = "RS "; + `Input2Kind_binary_sequential_IMM_I : _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_string = "IMM_I"; + default : _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_string = "?????"; + endcase + end + always @(*) begin + case(_zz_decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND) + `Input2Kind_binary_sequential_RS : _zz_decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND_string = "RS "; + `Input2Kind_binary_sequential_IMM_I : _zz_decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND_string = "IMM_I"; + default : _zz_decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND_string = "?????"; + endcase + end + always @(*) begin + case(_zz_decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND_1) + `Input2Kind_binary_sequential_RS : _zz_decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND_1_string = "RS "; + `Input2Kind_binary_sequential_IMM_I : _zz_decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND_1_string = "IMM_I"; + default : _zz_decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND_1_string = "?????"; + endcase + end + always @(*) begin + case(_zz_memory_to_writeBack_ENV_CTRL) + `EnvCtrlEnum_binary_sequential_NONE : _zz_memory_to_writeBack_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : _zz_memory_to_writeBack_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_binary_sequential_WFI : _zz_memory_to_writeBack_ENV_CTRL_string = "WFI "; + `EnvCtrlEnum_binary_sequential_ECALL : _zz_memory_to_writeBack_ENV_CTRL_string = "ECALL"; + default : _zz_memory_to_writeBack_ENV_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(_zz_memory_to_writeBack_ENV_CTRL_1) + `EnvCtrlEnum_binary_sequential_NONE : _zz_memory_to_writeBack_ENV_CTRL_1_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : _zz_memory_to_writeBack_ENV_CTRL_1_string = "XRET "; + `EnvCtrlEnum_binary_sequential_WFI : _zz_memory_to_writeBack_ENV_CTRL_1_string = "WFI "; + `EnvCtrlEnum_binary_sequential_ECALL : _zz_memory_to_writeBack_ENV_CTRL_1_string = "ECALL"; + default : _zz_memory_to_writeBack_ENV_CTRL_1_string = "?????"; + endcase + end + always @(*) begin + case(_zz_execute_to_memory_ENV_CTRL) + `EnvCtrlEnum_binary_sequential_NONE : _zz_execute_to_memory_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : _zz_execute_to_memory_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_binary_sequential_WFI : _zz_execute_to_memory_ENV_CTRL_string = "WFI "; + `EnvCtrlEnum_binary_sequential_ECALL : _zz_execute_to_memory_ENV_CTRL_string = "ECALL"; + default : _zz_execute_to_memory_ENV_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(_zz_execute_to_memory_ENV_CTRL_1) + `EnvCtrlEnum_binary_sequential_NONE : _zz_execute_to_memory_ENV_CTRL_1_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : _zz_execute_to_memory_ENV_CTRL_1_string = "XRET "; + `EnvCtrlEnum_binary_sequential_WFI : _zz_execute_to_memory_ENV_CTRL_1_string = "WFI "; + `EnvCtrlEnum_binary_sequential_ECALL : _zz_execute_to_memory_ENV_CTRL_1_string = "ECALL"; + default : _zz_execute_to_memory_ENV_CTRL_1_string = "?????"; + endcase + end + always @(*) begin + case(decode_ENV_CTRL) + `EnvCtrlEnum_binary_sequential_NONE : decode_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : decode_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_binary_sequential_WFI : decode_ENV_CTRL_string = "WFI "; + `EnvCtrlEnum_binary_sequential_ECALL : decode_ENV_CTRL_string = "ECALL"; + default : decode_ENV_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(_zz_decode_ENV_CTRL) + `EnvCtrlEnum_binary_sequential_NONE : _zz_decode_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : _zz_decode_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_binary_sequential_WFI : _zz_decode_ENV_CTRL_string = "WFI "; + `EnvCtrlEnum_binary_sequential_ECALL : _zz_decode_ENV_CTRL_string = "ECALL"; + default : _zz_decode_ENV_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(_zz_decode_to_execute_ENV_CTRL) + `EnvCtrlEnum_binary_sequential_NONE : _zz_decode_to_execute_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : _zz_decode_to_execute_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_binary_sequential_WFI : _zz_decode_to_execute_ENV_CTRL_string = "WFI "; + `EnvCtrlEnum_binary_sequential_ECALL : _zz_decode_to_execute_ENV_CTRL_string = "ECALL"; + default : _zz_decode_to_execute_ENV_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(_zz_decode_to_execute_ENV_CTRL_1) + `EnvCtrlEnum_binary_sequential_NONE : _zz_decode_to_execute_ENV_CTRL_1_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : _zz_decode_to_execute_ENV_CTRL_1_string = "XRET "; + `EnvCtrlEnum_binary_sequential_WFI : _zz_decode_to_execute_ENV_CTRL_1_string = "WFI "; + `EnvCtrlEnum_binary_sequential_ECALL : _zz_decode_to_execute_ENV_CTRL_1_string = "ECALL"; + default : _zz_decode_to_execute_ENV_CTRL_1_string = "?????"; + endcase + end + always @(*) begin + case(_zz_decode_to_execute_BRANCH_CTRL) + `BranchCtrlEnum_binary_sequential_INC : _zz_decode_to_execute_BRANCH_CTRL_string = "INC "; + `BranchCtrlEnum_binary_sequential_B : _zz_decode_to_execute_BRANCH_CTRL_string = "B "; + `BranchCtrlEnum_binary_sequential_JAL : _zz_decode_to_execute_BRANCH_CTRL_string = "JAL "; + `BranchCtrlEnum_binary_sequential_JALR : _zz_decode_to_execute_BRANCH_CTRL_string = "JALR"; + default : _zz_decode_to_execute_BRANCH_CTRL_string = "????"; + endcase + end + always @(*) begin + case(_zz_decode_to_execute_BRANCH_CTRL_1) + `BranchCtrlEnum_binary_sequential_INC : _zz_decode_to_execute_BRANCH_CTRL_1_string = "INC "; + `BranchCtrlEnum_binary_sequential_B : _zz_decode_to_execute_BRANCH_CTRL_1_string = "B "; + `BranchCtrlEnum_binary_sequential_JAL : _zz_decode_to_execute_BRANCH_CTRL_1_string = "JAL "; + `BranchCtrlEnum_binary_sequential_JALR : _zz_decode_to_execute_BRANCH_CTRL_1_string = "JALR"; + default : _zz_decode_to_execute_BRANCH_CTRL_1_string = "????"; + endcase + end + always @(*) begin + case(_zz_execute_to_memory_SHIFT_CTRL) + `ShiftCtrlEnum_binary_sequential_DISABLE_1 : _zz_execute_to_memory_SHIFT_CTRL_string = "DISABLE_1"; + `ShiftCtrlEnum_binary_sequential_SLL_1 : _zz_execute_to_memory_SHIFT_CTRL_string = "SLL_1 "; + `ShiftCtrlEnum_binary_sequential_SRL_1 : _zz_execute_to_memory_SHIFT_CTRL_string = "SRL_1 "; + `ShiftCtrlEnum_binary_sequential_SRA_1 : _zz_execute_to_memory_SHIFT_CTRL_string = "SRA_1 "; + default : _zz_execute_to_memory_SHIFT_CTRL_string = "?????????"; + endcase + end + always @(*) begin + case(_zz_execute_to_memory_SHIFT_CTRL_1) + `ShiftCtrlEnum_binary_sequential_DISABLE_1 : _zz_execute_to_memory_SHIFT_CTRL_1_string = "DISABLE_1"; + `ShiftCtrlEnum_binary_sequential_SLL_1 : _zz_execute_to_memory_SHIFT_CTRL_1_string = "SLL_1 "; + `ShiftCtrlEnum_binary_sequential_SRL_1 : _zz_execute_to_memory_SHIFT_CTRL_1_string = "SRL_1 "; + `ShiftCtrlEnum_binary_sequential_SRA_1 : _zz_execute_to_memory_SHIFT_CTRL_1_string = "SRA_1 "; + default : _zz_execute_to_memory_SHIFT_CTRL_1_string = "?????????"; + endcase + end + always @(*) begin + case(decode_SHIFT_CTRL) + `ShiftCtrlEnum_binary_sequential_DISABLE_1 : decode_SHIFT_CTRL_string = "DISABLE_1"; + `ShiftCtrlEnum_binary_sequential_SLL_1 : decode_SHIFT_CTRL_string = "SLL_1 "; + `ShiftCtrlEnum_binary_sequential_SRL_1 : decode_SHIFT_CTRL_string = "SRL_1 "; + `ShiftCtrlEnum_binary_sequential_SRA_1 : decode_SHIFT_CTRL_string = "SRA_1 "; + default : decode_SHIFT_CTRL_string = "?????????"; + endcase + end + always @(*) begin + case(_zz_decode_SHIFT_CTRL) + `ShiftCtrlEnum_binary_sequential_DISABLE_1 : _zz_decode_SHIFT_CTRL_string = "DISABLE_1"; + `ShiftCtrlEnum_binary_sequential_SLL_1 : _zz_decode_SHIFT_CTRL_string = "SLL_1 "; + `ShiftCtrlEnum_binary_sequential_SRL_1 : _zz_decode_SHIFT_CTRL_string = "SRL_1 "; + `ShiftCtrlEnum_binary_sequential_SRA_1 : _zz_decode_SHIFT_CTRL_string = "SRA_1 "; + default : _zz_decode_SHIFT_CTRL_string = "?????????"; + endcase + end + always @(*) begin + case(_zz_decode_to_execute_SHIFT_CTRL) + `ShiftCtrlEnum_binary_sequential_DISABLE_1 : _zz_decode_to_execute_SHIFT_CTRL_string = "DISABLE_1"; + `ShiftCtrlEnum_binary_sequential_SLL_1 : _zz_decode_to_execute_SHIFT_CTRL_string = "SLL_1 "; + `ShiftCtrlEnum_binary_sequential_SRL_1 : _zz_decode_to_execute_SHIFT_CTRL_string = "SRL_1 "; + `ShiftCtrlEnum_binary_sequential_SRA_1 : _zz_decode_to_execute_SHIFT_CTRL_string = "SRA_1 "; + default : _zz_decode_to_execute_SHIFT_CTRL_string = "?????????"; + endcase + end + always @(*) begin + case(_zz_decode_to_execute_SHIFT_CTRL_1) + `ShiftCtrlEnum_binary_sequential_DISABLE_1 : _zz_decode_to_execute_SHIFT_CTRL_1_string = "DISABLE_1"; + `ShiftCtrlEnum_binary_sequential_SLL_1 : _zz_decode_to_execute_SHIFT_CTRL_1_string = "SLL_1 "; + `ShiftCtrlEnum_binary_sequential_SRL_1 : _zz_decode_to_execute_SHIFT_CTRL_1_string = "SRL_1 "; + `ShiftCtrlEnum_binary_sequential_SRA_1 : _zz_decode_to_execute_SHIFT_CTRL_1_string = "SRA_1 "; + default : _zz_decode_to_execute_SHIFT_CTRL_1_string = "?????????"; + endcase + end + always @(*) begin + case(decode_ALU_BITWISE_CTRL) + `AluBitwiseCtrlEnum_binary_sequential_XOR_1 : decode_ALU_BITWISE_CTRL_string = "XOR_1"; + `AluBitwiseCtrlEnum_binary_sequential_OR_1 : decode_ALU_BITWISE_CTRL_string = "OR_1 "; + `AluBitwiseCtrlEnum_binary_sequential_AND_1 : decode_ALU_BITWISE_CTRL_string = "AND_1"; + default : decode_ALU_BITWISE_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(_zz_decode_ALU_BITWISE_CTRL) + `AluBitwiseCtrlEnum_binary_sequential_XOR_1 : _zz_decode_ALU_BITWISE_CTRL_string = "XOR_1"; + `AluBitwiseCtrlEnum_binary_sequential_OR_1 : _zz_decode_ALU_BITWISE_CTRL_string = "OR_1 "; + `AluBitwiseCtrlEnum_binary_sequential_AND_1 : _zz_decode_ALU_BITWISE_CTRL_string = "AND_1"; + default : _zz_decode_ALU_BITWISE_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(_zz_decode_to_execute_ALU_BITWISE_CTRL) + `AluBitwiseCtrlEnum_binary_sequential_XOR_1 : _zz_decode_to_execute_ALU_BITWISE_CTRL_string = "XOR_1"; + `AluBitwiseCtrlEnum_binary_sequential_OR_1 : _zz_decode_to_execute_ALU_BITWISE_CTRL_string = "OR_1 "; + `AluBitwiseCtrlEnum_binary_sequential_AND_1 : _zz_decode_to_execute_ALU_BITWISE_CTRL_string = "AND_1"; + default : _zz_decode_to_execute_ALU_BITWISE_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(_zz_decode_to_execute_ALU_BITWISE_CTRL_1) + `AluBitwiseCtrlEnum_binary_sequential_XOR_1 : _zz_decode_to_execute_ALU_BITWISE_CTRL_1_string = "XOR_1"; + `AluBitwiseCtrlEnum_binary_sequential_OR_1 : _zz_decode_to_execute_ALU_BITWISE_CTRL_1_string = "OR_1 "; + `AluBitwiseCtrlEnum_binary_sequential_AND_1 : _zz_decode_to_execute_ALU_BITWISE_CTRL_1_string = "AND_1"; + default : _zz_decode_to_execute_ALU_BITWISE_CTRL_1_string = "?????"; + endcase + end + always @(*) begin + case(decode_SRC2_CTRL) + `Src2CtrlEnum_binary_sequential_RS : decode_SRC2_CTRL_string = "RS "; + `Src2CtrlEnum_binary_sequential_IMI : decode_SRC2_CTRL_string = "IMI"; + `Src2CtrlEnum_binary_sequential_IMS : decode_SRC2_CTRL_string = "IMS"; + `Src2CtrlEnum_binary_sequential_PC : decode_SRC2_CTRL_string = "PC "; + default : decode_SRC2_CTRL_string = "???"; + endcase + end + always @(*) begin + case(_zz_decode_SRC2_CTRL) + `Src2CtrlEnum_binary_sequential_RS : _zz_decode_SRC2_CTRL_string = "RS "; + `Src2CtrlEnum_binary_sequential_IMI : _zz_decode_SRC2_CTRL_string = "IMI"; + `Src2CtrlEnum_binary_sequential_IMS : _zz_decode_SRC2_CTRL_string = "IMS"; + `Src2CtrlEnum_binary_sequential_PC : _zz_decode_SRC2_CTRL_string = "PC "; + default : _zz_decode_SRC2_CTRL_string = "???"; + endcase + end + always @(*) begin + case(_zz_decode_to_execute_SRC2_CTRL) + `Src2CtrlEnum_binary_sequential_RS : _zz_decode_to_execute_SRC2_CTRL_string = "RS "; + `Src2CtrlEnum_binary_sequential_IMI : _zz_decode_to_execute_SRC2_CTRL_string = "IMI"; + `Src2CtrlEnum_binary_sequential_IMS : _zz_decode_to_execute_SRC2_CTRL_string = "IMS"; + `Src2CtrlEnum_binary_sequential_PC : _zz_decode_to_execute_SRC2_CTRL_string = "PC "; + default : _zz_decode_to_execute_SRC2_CTRL_string = "???"; + endcase + end + always @(*) begin + case(_zz_decode_to_execute_SRC2_CTRL_1) + `Src2CtrlEnum_binary_sequential_RS : _zz_decode_to_execute_SRC2_CTRL_1_string = "RS "; + `Src2CtrlEnum_binary_sequential_IMI : _zz_decode_to_execute_SRC2_CTRL_1_string = "IMI"; + `Src2CtrlEnum_binary_sequential_IMS : _zz_decode_to_execute_SRC2_CTRL_1_string = "IMS"; + `Src2CtrlEnum_binary_sequential_PC : _zz_decode_to_execute_SRC2_CTRL_1_string = "PC "; + default : _zz_decode_to_execute_SRC2_CTRL_1_string = "???"; + endcase + end + always @(*) begin + case(decode_ALU_CTRL) + `AluCtrlEnum_binary_sequential_ADD_SUB : decode_ALU_CTRL_string = "ADD_SUB "; + `AluCtrlEnum_binary_sequential_SLT_SLTU : decode_ALU_CTRL_string = "SLT_SLTU"; + `AluCtrlEnum_binary_sequential_BITWISE : decode_ALU_CTRL_string = "BITWISE "; + default : decode_ALU_CTRL_string = "????????"; + endcase + end + always @(*) begin + case(_zz_decode_ALU_CTRL) + `AluCtrlEnum_binary_sequential_ADD_SUB : _zz_decode_ALU_CTRL_string = "ADD_SUB "; + `AluCtrlEnum_binary_sequential_SLT_SLTU : _zz_decode_ALU_CTRL_string = "SLT_SLTU"; + `AluCtrlEnum_binary_sequential_BITWISE : _zz_decode_ALU_CTRL_string = "BITWISE "; + default : _zz_decode_ALU_CTRL_string = "????????"; + endcase + end + always @(*) begin + case(_zz_decode_to_execute_ALU_CTRL) + `AluCtrlEnum_binary_sequential_ADD_SUB : _zz_decode_to_execute_ALU_CTRL_string = "ADD_SUB "; + `AluCtrlEnum_binary_sequential_SLT_SLTU : _zz_decode_to_execute_ALU_CTRL_string = "SLT_SLTU"; + `AluCtrlEnum_binary_sequential_BITWISE : _zz_decode_to_execute_ALU_CTRL_string = "BITWISE "; + default : _zz_decode_to_execute_ALU_CTRL_string = "????????"; + endcase + end + always @(*) begin + case(_zz_decode_to_execute_ALU_CTRL_1) + `AluCtrlEnum_binary_sequential_ADD_SUB : _zz_decode_to_execute_ALU_CTRL_1_string = "ADD_SUB "; + `AluCtrlEnum_binary_sequential_SLT_SLTU : _zz_decode_to_execute_ALU_CTRL_1_string = "SLT_SLTU"; + `AluCtrlEnum_binary_sequential_BITWISE : _zz_decode_to_execute_ALU_CTRL_1_string = "BITWISE "; + default : _zz_decode_to_execute_ALU_CTRL_1_string = "????????"; + endcase + end + always @(*) begin + case(decode_SRC1_CTRL) + `Src1CtrlEnum_binary_sequential_RS : decode_SRC1_CTRL_string = "RS "; + `Src1CtrlEnum_binary_sequential_IMU : decode_SRC1_CTRL_string = "IMU "; + `Src1CtrlEnum_binary_sequential_PC_INCREMENT : decode_SRC1_CTRL_string = "PC_INCREMENT"; + `Src1CtrlEnum_binary_sequential_URS1 : decode_SRC1_CTRL_string = "URS1 "; + default : decode_SRC1_CTRL_string = "????????????"; + endcase + end + always @(*) begin + case(_zz_decode_SRC1_CTRL) + `Src1CtrlEnum_binary_sequential_RS : _zz_decode_SRC1_CTRL_string = "RS "; + `Src1CtrlEnum_binary_sequential_IMU : _zz_decode_SRC1_CTRL_string = "IMU "; + `Src1CtrlEnum_binary_sequential_PC_INCREMENT : _zz_decode_SRC1_CTRL_string = "PC_INCREMENT"; + `Src1CtrlEnum_binary_sequential_URS1 : _zz_decode_SRC1_CTRL_string = "URS1 "; + default : _zz_decode_SRC1_CTRL_string = "????????????"; + endcase + end + always @(*) begin + case(_zz_decode_to_execute_SRC1_CTRL) + `Src1CtrlEnum_binary_sequential_RS : _zz_decode_to_execute_SRC1_CTRL_string = "RS "; + `Src1CtrlEnum_binary_sequential_IMU : _zz_decode_to_execute_SRC1_CTRL_string = "IMU "; + `Src1CtrlEnum_binary_sequential_PC_INCREMENT : _zz_decode_to_execute_SRC1_CTRL_string = "PC_INCREMENT"; + `Src1CtrlEnum_binary_sequential_URS1 : _zz_decode_to_execute_SRC1_CTRL_string = "URS1 "; + default : _zz_decode_to_execute_SRC1_CTRL_string = "????????????"; + endcase + end + always @(*) begin + case(_zz_decode_to_execute_SRC1_CTRL_1) + `Src1CtrlEnum_binary_sequential_RS : _zz_decode_to_execute_SRC1_CTRL_1_string = "RS "; + `Src1CtrlEnum_binary_sequential_IMU : _zz_decode_to_execute_SRC1_CTRL_1_string = "IMU "; + `Src1CtrlEnum_binary_sequential_PC_INCREMENT : _zz_decode_to_execute_SRC1_CTRL_1_string = "PC_INCREMENT"; + `Src1CtrlEnum_binary_sequential_URS1 : _zz_decode_to_execute_SRC1_CTRL_1_string = "URS1 "; + default : _zz_decode_to_execute_SRC1_CTRL_1_string = "????????????"; + endcase + end + always @(*) begin + case(execute_CfuPlugin_CFU_INPUT_2_KIND) + `Input2Kind_binary_sequential_RS : execute_CfuPlugin_CFU_INPUT_2_KIND_string = "RS "; + `Input2Kind_binary_sequential_IMM_I : execute_CfuPlugin_CFU_INPUT_2_KIND_string = "IMM_I"; + default : execute_CfuPlugin_CFU_INPUT_2_KIND_string = "?????"; + endcase + end + always @(*) begin + case(_zz_execute_CfuPlugin_CFU_INPUT_2_KIND) + `Input2Kind_binary_sequential_RS : _zz_execute_CfuPlugin_CFU_INPUT_2_KIND_string = "RS "; + `Input2Kind_binary_sequential_IMM_I : _zz_execute_CfuPlugin_CFU_INPUT_2_KIND_string = "IMM_I"; + default : _zz_execute_CfuPlugin_CFU_INPUT_2_KIND_string = "?????"; + endcase + end + always @(*) begin + case(memory_ENV_CTRL) + `EnvCtrlEnum_binary_sequential_NONE : memory_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : memory_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_binary_sequential_WFI : memory_ENV_CTRL_string = "WFI "; + `EnvCtrlEnum_binary_sequential_ECALL : memory_ENV_CTRL_string = "ECALL"; + default : memory_ENV_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(_zz_memory_ENV_CTRL) + `EnvCtrlEnum_binary_sequential_NONE : _zz_memory_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : _zz_memory_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_binary_sequential_WFI : _zz_memory_ENV_CTRL_string = "WFI "; + `EnvCtrlEnum_binary_sequential_ECALL : _zz_memory_ENV_CTRL_string = "ECALL"; + default : _zz_memory_ENV_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(execute_ENV_CTRL) + `EnvCtrlEnum_binary_sequential_NONE : execute_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : execute_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_binary_sequential_WFI : execute_ENV_CTRL_string = "WFI "; + `EnvCtrlEnum_binary_sequential_ECALL : execute_ENV_CTRL_string = "ECALL"; + default : execute_ENV_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(_zz_execute_ENV_CTRL) + `EnvCtrlEnum_binary_sequential_NONE : _zz_execute_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : _zz_execute_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_binary_sequential_WFI : _zz_execute_ENV_CTRL_string = "WFI "; + `EnvCtrlEnum_binary_sequential_ECALL : _zz_execute_ENV_CTRL_string = "ECALL"; + default : _zz_execute_ENV_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(writeBack_ENV_CTRL) + `EnvCtrlEnum_binary_sequential_NONE : writeBack_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : writeBack_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_binary_sequential_WFI : writeBack_ENV_CTRL_string = "WFI "; + `EnvCtrlEnum_binary_sequential_ECALL : writeBack_ENV_CTRL_string = "ECALL"; + default : writeBack_ENV_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(_zz_writeBack_ENV_CTRL) + `EnvCtrlEnum_binary_sequential_NONE : _zz_writeBack_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : _zz_writeBack_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_binary_sequential_WFI : _zz_writeBack_ENV_CTRL_string = "WFI "; + `EnvCtrlEnum_binary_sequential_ECALL : _zz_writeBack_ENV_CTRL_string = "ECALL"; + default : _zz_writeBack_ENV_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(execute_BRANCH_CTRL) + `BranchCtrlEnum_binary_sequential_INC : execute_BRANCH_CTRL_string = "INC "; + `BranchCtrlEnum_binary_sequential_B : execute_BRANCH_CTRL_string = "B "; + `BranchCtrlEnum_binary_sequential_JAL : execute_BRANCH_CTRL_string = "JAL "; + `BranchCtrlEnum_binary_sequential_JALR : execute_BRANCH_CTRL_string = "JALR"; + default : execute_BRANCH_CTRL_string = "????"; + endcase + end + always @(*) begin + case(_zz_execute_BRANCH_CTRL) + `BranchCtrlEnum_binary_sequential_INC : _zz_execute_BRANCH_CTRL_string = "INC "; + `BranchCtrlEnum_binary_sequential_B : _zz_execute_BRANCH_CTRL_string = "B "; + `BranchCtrlEnum_binary_sequential_JAL : _zz_execute_BRANCH_CTRL_string = "JAL "; + `BranchCtrlEnum_binary_sequential_JALR : _zz_execute_BRANCH_CTRL_string = "JALR"; + default : _zz_execute_BRANCH_CTRL_string = "????"; + endcase + end + always @(*) begin + case(memory_SHIFT_CTRL) + `ShiftCtrlEnum_binary_sequential_DISABLE_1 : memory_SHIFT_CTRL_string = "DISABLE_1"; + `ShiftCtrlEnum_binary_sequential_SLL_1 : memory_SHIFT_CTRL_string = "SLL_1 "; + `ShiftCtrlEnum_binary_sequential_SRL_1 : memory_SHIFT_CTRL_string = "SRL_1 "; + `ShiftCtrlEnum_binary_sequential_SRA_1 : memory_SHIFT_CTRL_string = "SRA_1 "; + default : memory_SHIFT_CTRL_string = "?????????"; + endcase + end + always @(*) begin + case(_zz_memory_SHIFT_CTRL) + `ShiftCtrlEnum_binary_sequential_DISABLE_1 : _zz_memory_SHIFT_CTRL_string = "DISABLE_1"; + `ShiftCtrlEnum_binary_sequential_SLL_1 : _zz_memory_SHIFT_CTRL_string = "SLL_1 "; + `ShiftCtrlEnum_binary_sequential_SRL_1 : _zz_memory_SHIFT_CTRL_string = "SRL_1 "; + `ShiftCtrlEnum_binary_sequential_SRA_1 : _zz_memory_SHIFT_CTRL_string = "SRA_1 "; + default : _zz_memory_SHIFT_CTRL_string = "?????????"; + endcase + end + always @(*) begin + case(execute_SHIFT_CTRL) + `ShiftCtrlEnum_binary_sequential_DISABLE_1 : execute_SHIFT_CTRL_string = "DISABLE_1"; + `ShiftCtrlEnum_binary_sequential_SLL_1 : execute_SHIFT_CTRL_string = "SLL_1 "; + `ShiftCtrlEnum_binary_sequential_SRL_1 : execute_SHIFT_CTRL_string = "SRL_1 "; + `ShiftCtrlEnum_binary_sequential_SRA_1 : execute_SHIFT_CTRL_string = "SRA_1 "; + default : execute_SHIFT_CTRL_string = "?????????"; + endcase + end + always @(*) begin + case(_zz_execute_SHIFT_CTRL) + `ShiftCtrlEnum_binary_sequential_DISABLE_1 : _zz_execute_SHIFT_CTRL_string = "DISABLE_1"; + `ShiftCtrlEnum_binary_sequential_SLL_1 : _zz_execute_SHIFT_CTRL_string = "SLL_1 "; + `ShiftCtrlEnum_binary_sequential_SRL_1 : _zz_execute_SHIFT_CTRL_string = "SRL_1 "; + `ShiftCtrlEnum_binary_sequential_SRA_1 : _zz_execute_SHIFT_CTRL_string = "SRA_1 "; + default : _zz_execute_SHIFT_CTRL_string = "?????????"; + endcase + end + always @(*) begin + case(execute_SRC2_CTRL) + `Src2CtrlEnum_binary_sequential_RS : execute_SRC2_CTRL_string = "RS "; + `Src2CtrlEnum_binary_sequential_IMI : execute_SRC2_CTRL_string = "IMI"; + `Src2CtrlEnum_binary_sequential_IMS : execute_SRC2_CTRL_string = "IMS"; + `Src2CtrlEnum_binary_sequential_PC : execute_SRC2_CTRL_string = "PC "; + default : execute_SRC2_CTRL_string = "???"; + endcase + end + always @(*) begin + case(_zz_execute_SRC2_CTRL) + `Src2CtrlEnum_binary_sequential_RS : _zz_execute_SRC2_CTRL_string = "RS "; + `Src2CtrlEnum_binary_sequential_IMI : _zz_execute_SRC2_CTRL_string = "IMI"; + `Src2CtrlEnum_binary_sequential_IMS : _zz_execute_SRC2_CTRL_string = "IMS"; + `Src2CtrlEnum_binary_sequential_PC : _zz_execute_SRC2_CTRL_string = "PC "; + default : _zz_execute_SRC2_CTRL_string = "???"; + endcase + end + always @(*) begin + case(execute_SRC1_CTRL) + `Src1CtrlEnum_binary_sequential_RS : execute_SRC1_CTRL_string = "RS "; + `Src1CtrlEnum_binary_sequential_IMU : execute_SRC1_CTRL_string = "IMU "; + `Src1CtrlEnum_binary_sequential_PC_INCREMENT : execute_SRC1_CTRL_string = "PC_INCREMENT"; + `Src1CtrlEnum_binary_sequential_URS1 : execute_SRC1_CTRL_string = "URS1 "; + default : execute_SRC1_CTRL_string = "????????????"; + endcase + end + always @(*) begin + case(_zz_execute_SRC1_CTRL) + `Src1CtrlEnum_binary_sequential_RS : _zz_execute_SRC1_CTRL_string = "RS "; + `Src1CtrlEnum_binary_sequential_IMU : _zz_execute_SRC1_CTRL_string = "IMU "; + `Src1CtrlEnum_binary_sequential_PC_INCREMENT : _zz_execute_SRC1_CTRL_string = "PC_INCREMENT"; + `Src1CtrlEnum_binary_sequential_URS1 : _zz_execute_SRC1_CTRL_string = "URS1 "; + default : _zz_execute_SRC1_CTRL_string = "????????????"; + endcase + end + always @(*) begin + case(execute_ALU_CTRL) + `AluCtrlEnum_binary_sequential_ADD_SUB : execute_ALU_CTRL_string = "ADD_SUB "; + `AluCtrlEnum_binary_sequential_SLT_SLTU : execute_ALU_CTRL_string = "SLT_SLTU"; + `AluCtrlEnum_binary_sequential_BITWISE : execute_ALU_CTRL_string = "BITWISE "; + default : execute_ALU_CTRL_string = "????????"; + endcase + end + always @(*) begin + case(_zz_execute_ALU_CTRL) + `AluCtrlEnum_binary_sequential_ADD_SUB : _zz_execute_ALU_CTRL_string = "ADD_SUB "; + `AluCtrlEnum_binary_sequential_SLT_SLTU : _zz_execute_ALU_CTRL_string = "SLT_SLTU"; + `AluCtrlEnum_binary_sequential_BITWISE : _zz_execute_ALU_CTRL_string = "BITWISE "; + default : _zz_execute_ALU_CTRL_string = "????????"; + endcase + end + always @(*) begin + case(execute_ALU_BITWISE_CTRL) + `AluBitwiseCtrlEnum_binary_sequential_XOR_1 : execute_ALU_BITWISE_CTRL_string = "XOR_1"; + `AluBitwiseCtrlEnum_binary_sequential_OR_1 : execute_ALU_BITWISE_CTRL_string = "OR_1 "; + `AluBitwiseCtrlEnum_binary_sequential_AND_1 : execute_ALU_BITWISE_CTRL_string = "AND_1"; + default : execute_ALU_BITWISE_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(_zz_execute_ALU_BITWISE_CTRL) + `AluBitwiseCtrlEnum_binary_sequential_XOR_1 : _zz_execute_ALU_BITWISE_CTRL_string = "XOR_1"; + `AluBitwiseCtrlEnum_binary_sequential_OR_1 : _zz_execute_ALU_BITWISE_CTRL_string = "OR_1 "; + `AluBitwiseCtrlEnum_binary_sequential_AND_1 : _zz_execute_ALU_BITWISE_CTRL_string = "AND_1"; + default : _zz_execute_ALU_BITWISE_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(_zz_decode_CfuPlugin_CFU_INPUT_2_KIND_1) + `Input2Kind_binary_sequential_RS : _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_1_string = "RS "; + `Input2Kind_binary_sequential_IMM_I : _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_1_string = "IMM_I"; + default : _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_1_string = "?????"; + endcase + end + always @(*) begin + case(_zz_decode_ENV_CTRL_1) + `EnvCtrlEnum_binary_sequential_NONE : _zz_decode_ENV_CTRL_1_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : _zz_decode_ENV_CTRL_1_string = "XRET "; + `EnvCtrlEnum_binary_sequential_WFI : _zz_decode_ENV_CTRL_1_string = "WFI "; + `EnvCtrlEnum_binary_sequential_ECALL : _zz_decode_ENV_CTRL_1_string = "ECALL"; + default : _zz_decode_ENV_CTRL_1_string = "?????"; + endcase + end + always @(*) begin + case(_zz_decode_BRANCH_CTRL) + `BranchCtrlEnum_binary_sequential_INC : _zz_decode_BRANCH_CTRL_string = "INC "; + `BranchCtrlEnum_binary_sequential_B : _zz_decode_BRANCH_CTRL_string = "B "; + `BranchCtrlEnum_binary_sequential_JAL : _zz_decode_BRANCH_CTRL_string = "JAL "; + `BranchCtrlEnum_binary_sequential_JALR : _zz_decode_BRANCH_CTRL_string = "JALR"; + default : _zz_decode_BRANCH_CTRL_string = "????"; + endcase + end + always @(*) begin + case(_zz_decode_SHIFT_CTRL_1) + `ShiftCtrlEnum_binary_sequential_DISABLE_1 : _zz_decode_SHIFT_CTRL_1_string = "DISABLE_1"; + `ShiftCtrlEnum_binary_sequential_SLL_1 : _zz_decode_SHIFT_CTRL_1_string = "SLL_1 "; + `ShiftCtrlEnum_binary_sequential_SRL_1 : _zz_decode_SHIFT_CTRL_1_string = "SRL_1 "; + `ShiftCtrlEnum_binary_sequential_SRA_1 : _zz_decode_SHIFT_CTRL_1_string = "SRA_1 "; + default : _zz_decode_SHIFT_CTRL_1_string = "?????????"; + endcase + end + always @(*) begin + case(_zz_decode_ALU_BITWISE_CTRL_1) + `AluBitwiseCtrlEnum_binary_sequential_XOR_1 : _zz_decode_ALU_BITWISE_CTRL_1_string = "XOR_1"; + `AluBitwiseCtrlEnum_binary_sequential_OR_1 : _zz_decode_ALU_BITWISE_CTRL_1_string = "OR_1 "; + `AluBitwiseCtrlEnum_binary_sequential_AND_1 : _zz_decode_ALU_BITWISE_CTRL_1_string = "AND_1"; + default : _zz_decode_ALU_BITWISE_CTRL_1_string = "?????"; + endcase + end + always @(*) begin + case(_zz_decode_SRC2_CTRL_1) + `Src2CtrlEnum_binary_sequential_RS : _zz_decode_SRC2_CTRL_1_string = "RS "; + `Src2CtrlEnum_binary_sequential_IMI : _zz_decode_SRC2_CTRL_1_string = "IMI"; + `Src2CtrlEnum_binary_sequential_IMS : _zz_decode_SRC2_CTRL_1_string = "IMS"; + `Src2CtrlEnum_binary_sequential_PC : _zz_decode_SRC2_CTRL_1_string = "PC "; + default : _zz_decode_SRC2_CTRL_1_string = "???"; + endcase + end + always @(*) begin + case(_zz_decode_ALU_CTRL_1) + `AluCtrlEnum_binary_sequential_ADD_SUB : _zz_decode_ALU_CTRL_1_string = "ADD_SUB "; + `AluCtrlEnum_binary_sequential_SLT_SLTU : _zz_decode_ALU_CTRL_1_string = "SLT_SLTU"; + `AluCtrlEnum_binary_sequential_BITWISE : _zz_decode_ALU_CTRL_1_string = "BITWISE "; + default : _zz_decode_ALU_CTRL_1_string = "????????"; + endcase + end + always @(*) begin + case(_zz_decode_SRC1_CTRL_1) + `Src1CtrlEnum_binary_sequential_RS : _zz_decode_SRC1_CTRL_1_string = "RS "; + `Src1CtrlEnum_binary_sequential_IMU : _zz_decode_SRC1_CTRL_1_string = "IMU "; + `Src1CtrlEnum_binary_sequential_PC_INCREMENT : _zz_decode_SRC1_CTRL_1_string = "PC_INCREMENT"; + `Src1CtrlEnum_binary_sequential_URS1 : _zz_decode_SRC1_CTRL_1_string = "URS1 "; + default : _zz_decode_SRC1_CTRL_1_string = "????????????"; + endcase + end + always @(*) begin + case(decode_BRANCH_CTRL) + `BranchCtrlEnum_binary_sequential_INC : decode_BRANCH_CTRL_string = "INC "; + `BranchCtrlEnum_binary_sequential_B : decode_BRANCH_CTRL_string = "B "; + `BranchCtrlEnum_binary_sequential_JAL : decode_BRANCH_CTRL_string = "JAL "; + `BranchCtrlEnum_binary_sequential_JALR : decode_BRANCH_CTRL_string = "JALR"; + default : decode_BRANCH_CTRL_string = "????"; + endcase + end + always @(*) begin + case(_zz_decode_BRANCH_CTRL_1) + `BranchCtrlEnum_binary_sequential_INC : _zz_decode_BRANCH_CTRL_1_string = "INC "; + `BranchCtrlEnum_binary_sequential_B : _zz_decode_BRANCH_CTRL_1_string = "B "; + `BranchCtrlEnum_binary_sequential_JAL : _zz_decode_BRANCH_CTRL_1_string = "JAL "; + `BranchCtrlEnum_binary_sequential_JALR : _zz_decode_BRANCH_CTRL_1_string = "JALR"; + default : _zz_decode_BRANCH_CTRL_1_string = "????"; + endcase + end + always @(*) begin + case(_zz_decode_SRC1_CTRL_2) + `Src1CtrlEnum_binary_sequential_RS : _zz_decode_SRC1_CTRL_2_string = "RS "; + `Src1CtrlEnum_binary_sequential_IMU : _zz_decode_SRC1_CTRL_2_string = "IMU "; + `Src1CtrlEnum_binary_sequential_PC_INCREMENT : _zz_decode_SRC1_CTRL_2_string = "PC_INCREMENT"; + `Src1CtrlEnum_binary_sequential_URS1 : _zz_decode_SRC1_CTRL_2_string = "URS1 "; + default : _zz_decode_SRC1_CTRL_2_string = "????????????"; + endcase + end + always @(*) begin + case(_zz_decode_ALU_CTRL_2) + `AluCtrlEnum_binary_sequential_ADD_SUB : _zz_decode_ALU_CTRL_2_string = "ADD_SUB "; + `AluCtrlEnum_binary_sequential_SLT_SLTU : _zz_decode_ALU_CTRL_2_string = "SLT_SLTU"; + `AluCtrlEnum_binary_sequential_BITWISE : _zz_decode_ALU_CTRL_2_string = "BITWISE "; + default : _zz_decode_ALU_CTRL_2_string = "????????"; + endcase + end + always @(*) begin + case(_zz_decode_SRC2_CTRL_2) + `Src2CtrlEnum_binary_sequential_RS : _zz_decode_SRC2_CTRL_2_string = "RS "; + `Src2CtrlEnum_binary_sequential_IMI : _zz_decode_SRC2_CTRL_2_string = "IMI"; + `Src2CtrlEnum_binary_sequential_IMS : _zz_decode_SRC2_CTRL_2_string = "IMS"; + `Src2CtrlEnum_binary_sequential_PC : _zz_decode_SRC2_CTRL_2_string = "PC "; + default : _zz_decode_SRC2_CTRL_2_string = "???"; + endcase + end + always @(*) begin + case(_zz_decode_ALU_BITWISE_CTRL_2) + `AluBitwiseCtrlEnum_binary_sequential_XOR_1 : _zz_decode_ALU_BITWISE_CTRL_2_string = "XOR_1"; + `AluBitwiseCtrlEnum_binary_sequential_OR_1 : _zz_decode_ALU_BITWISE_CTRL_2_string = "OR_1 "; + `AluBitwiseCtrlEnum_binary_sequential_AND_1 : _zz_decode_ALU_BITWISE_CTRL_2_string = "AND_1"; + default : _zz_decode_ALU_BITWISE_CTRL_2_string = "?????"; + endcase + end + always @(*) begin + case(_zz_decode_SHIFT_CTRL_2) + `ShiftCtrlEnum_binary_sequential_DISABLE_1 : _zz_decode_SHIFT_CTRL_2_string = "DISABLE_1"; + `ShiftCtrlEnum_binary_sequential_SLL_1 : _zz_decode_SHIFT_CTRL_2_string = "SLL_1 "; + `ShiftCtrlEnum_binary_sequential_SRL_1 : _zz_decode_SHIFT_CTRL_2_string = "SRL_1 "; + `ShiftCtrlEnum_binary_sequential_SRA_1 : _zz_decode_SHIFT_CTRL_2_string = "SRA_1 "; + default : _zz_decode_SHIFT_CTRL_2_string = "?????????"; + endcase + end + always @(*) begin + case(_zz_decode_BRANCH_CTRL_2) + `BranchCtrlEnum_binary_sequential_INC : _zz_decode_BRANCH_CTRL_2_string = "INC "; + `BranchCtrlEnum_binary_sequential_B : _zz_decode_BRANCH_CTRL_2_string = "B "; + `BranchCtrlEnum_binary_sequential_JAL : _zz_decode_BRANCH_CTRL_2_string = "JAL "; + `BranchCtrlEnum_binary_sequential_JALR : _zz_decode_BRANCH_CTRL_2_string = "JALR"; + default : _zz_decode_BRANCH_CTRL_2_string = "????"; + endcase + end + always @(*) begin + case(_zz_decode_ENV_CTRL_2) + `EnvCtrlEnum_binary_sequential_NONE : _zz_decode_ENV_CTRL_2_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : _zz_decode_ENV_CTRL_2_string = "XRET "; + `EnvCtrlEnum_binary_sequential_WFI : _zz_decode_ENV_CTRL_2_string = "WFI "; + `EnvCtrlEnum_binary_sequential_ECALL : _zz_decode_ENV_CTRL_2_string = "ECALL"; + default : _zz_decode_ENV_CTRL_2_string = "?????"; + endcase + end + always @(*) begin + case(_zz_decode_CfuPlugin_CFU_INPUT_2_KIND_8) + `Input2Kind_binary_sequential_RS : _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_8_string = "RS "; + `Input2Kind_binary_sequential_IMM_I : _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_8_string = "IMM_I"; + default : _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_8_string = "?????"; + endcase + end + always @(*) begin + case(decode_to_execute_SRC1_CTRL) + `Src1CtrlEnum_binary_sequential_RS : decode_to_execute_SRC1_CTRL_string = "RS "; + `Src1CtrlEnum_binary_sequential_IMU : decode_to_execute_SRC1_CTRL_string = "IMU "; + `Src1CtrlEnum_binary_sequential_PC_INCREMENT : decode_to_execute_SRC1_CTRL_string = "PC_INCREMENT"; + `Src1CtrlEnum_binary_sequential_URS1 : decode_to_execute_SRC1_CTRL_string = "URS1 "; + default : decode_to_execute_SRC1_CTRL_string = "????????????"; + endcase + end + always @(*) begin + case(decode_to_execute_ALU_CTRL) + `AluCtrlEnum_binary_sequential_ADD_SUB : decode_to_execute_ALU_CTRL_string = "ADD_SUB "; + `AluCtrlEnum_binary_sequential_SLT_SLTU : decode_to_execute_ALU_CTRL_string = "SLT_SLTU"; + `AluCtrlEnum_binary_sequential_BITWISE : decode_to_execute_ALU_CTRL_string = "BITWISE "; + default : decode_to_execute_ALU_CTRL_string = "????????"; + endcase + end + always @(*) begin + case(decode_to_execute_SRC2_CTRL) + `Src2CtrlEnum_binary_sequential_RS : decode_to_execute_SRC2_CTRL_string = "RS "; + `Src2CtrlEnum_binary_sequential_IMI : decode_to_execute_SRC2_CTRL_string = "IMI"; + `Src2CtrlEnum_binary_sequential_IMS : decode_to_execute_SRC2_CTRL_string = "IMS"; + `Src2CtrlEnum_binary_sequential_PC : decode_to_execute_SRC2_CTRL_string = "PC "; + default : decode_to_execute_SRC2_CTRL_string = "???"; + endcase + end + always @(*) begin + case(decode_to_execute_ALU_BITWISE_CTRL) + `AluBitwiseCtrlEnum_binary_sequential_XOR_1 : decode_to_execute_ALU_BITWISE_CTRL_string = "XOR_1"; + `AluBitwiseCtrlEnum_binary_sequential_OR_1 : decode_to_execute_ALU_BITWISE_CTRL_string = "OR_1 "; + `AluBitwiseCtrlEnum_binary_sequential_AND_1 : decode_to_execute_ALU_BITWISE_CTRL_string = "AND_1"; + default : decode_to_execute_ALU_BITWISE_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(decode_to_execute_SHIFT_CTRL) + `ShiftCtrlEnum_binary_sequential_DISABLE_1 : decode_to_execute_SHIFT_CTRL_string = "DISABLE_1"; + `ShiftCtrlEnum_binary_sequential_SLL_1 : decode_to_execute_SHIFT_CTRL_string = "SLL_1 "; + `ShiftCtrlEnum_binary_sequential_SRL_1 : decode_to_execute_SHIFT_CTRL_string = "SRL_1 "; + `ShiftCtrlEnum_binary_sequential_SRA_1 : decode_to_execute_SHIFT_CTRL_string = "SRA_1 "; + default : decode_to_execute_SHIFT_CTRL_string = "?????????"; + endcase + end + always @(*) begin + case(execute_to_memory_SHIFT_CTRL) + `ShiftCtrlEnum_binary_sequential_DISABLE_1 : execute_to_memory_SHIFT_CTRL_string = "DISABLE_1"; + `ShiftCtrlEnum_binary_sequential_SLL_1 : execute_to_memory_SHIFT_CTRL_string = "SLL_1 "; + `ShiftCtrlEnum_binary_sequential_SRL_1 : execute_to_memory_SHIFT_CTRL_string = "SRL_1 "; + `ShiftCtrlEnum_binary_sequential_SRA_1 : execute_to_memory_SHIFT_CTRL_string = "SRA_1 "; + default : execute_to_memory_SHIFT_CTRL_string = "?????????"; + endcase + end + always @(*) begin + case(decode_to_execute_BRANCH_CTRL) + `BranchCtrlEnum_binary_sequential_INC : decode_to_execute_BRANCH_CTRL_string = "INC "; + `BranchCtrlEnum_binary_sequential_B : decode_to_execute_BRANCH_CTRL_string = "B "; + `BranchCtrlEnum_binary_sequential_JAL : decode_to_execute_BRANCH_CTRL_string = "JAL "; + `BranchCtrlEnum_binary_sequential_JALR : decode_to_execute_BRANCH_CTRL_string = "JALR"; + default : decode_to_execute_BRANCH_CTRL_string = "????"; + endcase + end + always @(*) begin + case(decode_to_execute_ENV_CTRL) + `EnvCtrlEnum_binary_sequential_NONE : decode_to_execute_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : decode_to_execute_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_binary_sequential_WFI : decode_to_execute_ENV_CTRL_string = "WFI "; + `EnvCtrlEnum_binary_sequential_ECALL : decode_to_execute_ENV_CTRL_string = "ECALL"; + default : decode_to_execute_ENV_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(execute_to_memory_ENV_CTRL) + `EnvCtrlEnum_binary_sequential_NONE : execute_to_memory_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : execute_to_memory_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_binary_sequential_WFI : execute_to_memory_ENV_CTRL_string = "WFI "; + `EnvCtrlEnum_binary_sequential_ECALL : execute_to_memory_ENV_CTRL_string = "ECALL"; + default : execute_to_memory_ENV_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(memory_to_writeBack_ENV_CTRL) + `EnvCtrlEnum_binary_sequential_NONE : memory_to_writeBack_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : memory_to_writeBack_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_binary_sequential_WFI : memory_to_writeBack_ENV_CTRL_string = "WFI "; + `EnvCtrlEnum_binary_sequential_ECALL : memory_to_writeBack_ENV_CTRL_string = "ECALL"; + default : memory_to_writeBack_ENV_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND) + `Input2Kind_binary_sequential_RS : decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND_string = "RS "; + `Input2Kind_binary_sequential_IMM_I : decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND_string = "IMM_I"; + default : decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND_string = "?????"; + endcase + end + `endif + + assign memory_MUL_LOW = ($signed(_zz_memory_MUL_LOW) + $signed(_zz_memory_MUL_LOW_7)); + assign writeBack_CfuPlugin_CFU_IN_FLIGHT = memory_to_writeBack_CfuPlugin_CFU_IN_FLIGHT; + assign execute_CfuPlugin_CFU_IN_FLIGHT = ((execute_CfuPlugin_schedule || execute_CfuPlugin_hold) || execute_CfuPlugin_fired); + assign memory_MUL_HH = execute_to_memory_MUL_HH; + assign execute_MUL_HH = ($signed(execute_MulPlugin_aHigh) * $signed(execute_MulPlugin_bHigh)); + assign execute_MUL_HL = ($signed(execute_MulPlugin_aHigh) * $signed(execute_MulPlugin_bSLow)); + assign execute_MUL_LH = ($signed(execute_MulPlugin_aSLow) * $signed(execute_MulPlugin_bHigh)); + assign execute_MUL_LL = (execute_MulPlugin_aULow * execute_MulPlugin_bULow); + assign execute_SHIFT_RIGHT = _zz_execute_SHIFT_RIGHT; + assign execute_REGFILE_WRITE_DATA = _zz_execute_REGFILE_WRITE_DATA; + assign memory_MEMORY_STORE_DATA_RF = execute_to_memory_MEMORY_STORE_DATA_RF; + assign execute_MEMORY_STORE_DATA_RF = _zz_execute_MEMORY_STORE_DATA_RF; + assign decode_CSR_READ_OPCODE = (decode_INSTRUCTION[13 : 7] != 7'h20); + assign decode_CSR_WRITE_OPCODE = (! (((decode_INSTRUCTION[14 : 13] == 2'b01) && (decode_INSTRUCTION[19 : 15] == 5'h0)) || ((decode_INSTRUCTION[14 : 13] == 2'b11) && (decode_INSTRUCTION[19 : 15] == 5'h0)))); + assign decode_PREDICTION_HAD_BRANCHED2 = IBusCachedPlugin_decodePrediction_cmd_hadBranch; + assign decode_SRC2_FORCE_ZERO = (decode_SRC_ADD_ZERO && (! decode_SRC_USE_SUB_LESS)); + assign decode_CfuPlugin_CFU_INPUT_2_KIND = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND; + assign _zz_decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND = _zz_decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND_1; + assign decode_CfuPlugin_CFU_ENABLE = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[32]; + assign decode_IS_RS2_SIGNED = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[31]; + assign decode_IS_RS1_SIGNED = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[30]; + assign decode_IS_DIV = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[29]; + assign memory_IS_MUL = execute_to_memory_IS_MUL; + assign execute_IS_MUL = decode_to_execute_IS_MUL; + assign decode_IS_MUL = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[28]; + assign _zz_memory_to_writeBack_ENV_CTRL = _zz_memory_to_writeBack_ENV_CTRL_1; + assign _zz_execute_to_memory_ENV_CTRL = _zz_execute_to_memory_ENV_CTRL_1; + assign decode_ENV_CTRL = _zz_decode_ENV_CTRL; + assign _zz_decode_to_execute_ENV_CTRL = _zz_decode_to_execute_ENV_CTRL_1; + assign decode_IS_CSR = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[25]; + assign _zz_decode_to_execute_BRANCH_CTRL = _zz_decode_to_execute_BRANCH_CTRL_1; + assign _zz_execute_to_memory_SHIFT_CTRL = _zz_execute_to_memory_SHIFT_CTRL_1; + assign decode_SHIFT_CTRL = _zz_decode_SHIFT_CTRL; + assign _zz_decode_to_execute_SHIFT_CTRL = _zz_decode_to_execute_SHIFT_CTRL_1; + assign decode_ALU_BITWISE_CTRL = _zz_decode_ALU_BITWISE_CTRL; + assign _zz_decode_to_execute_ALU_BITWISE_CTRL = _zz_decode_to_execute_ALU_BITWISE_CTRL_1; + assign decode_SRC_LESS_UNSIGNED = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[17]; + assign decode_MEMORY_MANAGMENT = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[16]; + assign memory_MEMORY_WR = execute_to_memory_MEMORY_WR; + assign decode_MEMORY_WR = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[13]; + assign execute_BYPASSABLE_MEMORY_STAGE = decode_to_execute_BYPASSABLE_MEMORY_STAGE; + assign decode_BYPASSABLE_MEMORY_STAGE = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[12]; + assign decode_BYPASSABLE_EXECUTE_STAGE = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[11]; + assign decode_SRC2_CTRL = _zz_decode_SRC2_CTRL; + assign _zz_decode_to_execute_SRC2_CTRL = _zz_decode_to_execute_SRC2_CTRL_1; + assign decode_ALU_CTRL = _zz_decode_ALU_CTRL; + assign _zz_decode_to_execute_ALU_CTRL = _zz_decode_to_execute_ALU_CTRL_1; + assign decode_SRC1_CTRL = _zz_decode_SRC1_CTRL; + assign _zz_decode_to_execute_SRC1_CTRL = _zz_decode_to_execute_SRC1_CTRL_1; + assign decode_MEMORY_FORCE_CONSTISTENCY = 1'b0; + assign writeBack_FORMAL_PC_NEXT = memory_to_writeBack_FORMAL_PC_NEXT; + assign memory_FORMAL_PC_NEXT = execute_to_memory_FORMAL_PC_NEXT; + assign execute_FORMAL_PC_NEXT = decode_to_execute_FORMAL_PC_NEXT; + assign decode_FORMAL_PC_NEXT = (decode_PC + 32'h00000004); + assign memory_PC = execute_to_memory_PC; + always @(*) begin + _zz_memory_to_writeBack_CfuPlugin_CFU_IN_FLIGHT = memory_CfuPlugin_CFU_IN_FLIGHT; + if(memory_arbitration_isStuck) begin + _zz_memory_to_writeBack_CfuPlugin_CFU_IN_FLIGHT = 1'b0; + end + end + + always @(*) begin + _zz_execute_to_memory_CfuPlugin_CFU_IN_FLIGHT = execute_CfuPlugin_CFU_IN_FLIGHT; + if(execute_arbitration_isStuck) begin + _zz_execute_to_memory_CfuPlugin_CFU_IN_FLIGHT = 1'b0; + end + end + + assign memory_CfuPlugin_CFU_IN_FLIGHT = execute_to_memory_CfuPlugin_CFU_IN_FLIGHT; + assign execute_CfuPlugin_CFU_INPUT_2_KIND = _zz_execute_CfuPlugin_CFU_INPUT_2_KIND; + assign execute_CfuPlugin_CFU_ENABLE = decode_to_execute_CfuPlugin_CFU_ENABLE; + assign execute_IS_RS1_SIGNED = decode_to_execute_IS_RS1_SIGNED; + assign execute_IS_DIV = decode_to_execute_IS_DIV; + assign execute_IS_RS2_SIGNED = decode_to_execute_IS_RS2_SIGNED; + assign memory_IS_DIV = execute_to_memory_IS_DIV; + assign writeBack_IS_MUL = memory_to_writeBack_IS_MUL; + assign writeBack_MUL_HH = memory_to_writeBack_MUL_HH; + assign writeBack_MUL_LOW = memory_to_writeBack_MUL_LOW; + assign memory_MUL_HL = execute_to_memory_MUL_HL; + assign memory_MUL_LH = execute_to_memory_MUL_LH; + assign memory_MUL_LL = execute_to_memory_MUL_LL; + assign execute_CSR_READ_OPCODE = decode_to_execute_CSR_READ_OPCODE; + assign execute_CSR_WRITE_OPCODE = decode_to_execute_CSR_WRITE_OPCODE; + assign execute_IS_CSR = decode_to_execute_IS_CSR; + assign memory_ENV_CTRL = _zz_memory_ENV_CTRL; + assign execute_ENV_CTRL = _zz_execute_ENV_CTRL; + assign writeBack_ENV_CTRL = _zz_writeBack_ENV_CTRL; + assign execute_BRANCH_CALC = {execute_BranchPlugin_branchAdder[31 : 1],1'b0}; + assign execute_BRANCH_DO = ((execute_PREDICTION_HAD_BRANCHED2 != execute_BRANCH_COND_RESULT) || execute_BranchPlugin_missAlignedTarget); + assign execute_PC = decode_to_execute_PC; + assign execute_PREDICTION_HAD_BRANCHED2 = decode_to_execute_PREDICTION_HAD_BRANCHED2; + assign execute_RS1 = decode_to_execute_RS1; + assign execute_BRANCH_COND_RESULT = _zz_execute_BRANCH_COND_RESULT_1; + assign execute_BRANCH_CTRL = _zz_execute_BRANCH_CTRL; + assign decode_RS2_USE = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[15]; + assign decode_RS1_USE = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[5]; + always @(*) begin + _zz_decode_RS2 = execute_REGFILE_WRITE_DATA; + if(when_CsrPlugin_l1176) begin + _zz_decode_RS2 = CsrPlugin_csrMapping_readDataSignal; + end + end + + assign execute_REGFILE_WRITE_VALID = decode_to_execute_REGFILE_WRITE_VALID; + assign execute_BYPASSABLE_EXECUTE_STAGE = decode_to_execute_BYPASSABLE_EXECUTE_STAGE; + assign memory_REGFILE_WRITE_VALID = execute_to_memory_REGFILE_WRITE_VALID; + assign memory_INSTRUCTION = execute_to_memory_INSTRUCTION; + assign memory_BYPASSABLE_MEMORY_STAGE = execute_to_memory_BYPASSABLE_MEMORY_STAGE; + assign writeBack_REGFILE_WRITE_VALID = memory_to_writeBack_REGFILE_WRITE_VALID; + always @(*) begin + decode_RS2 = decode_RegFilePlugin_rs2Data; + if(HazardSimplePlugin_writeBackBuffer_valid) begin + if(HazardSimplePlugin_addr1Match) begin + decode_RS2 = HazardSimplePlugin_writeBackBuffer_payload_data; + end + end + if(when_HazardSimplePlugin_l45) begin + if(when_HazardSimplePlugin_l47) begin + if(when_HazardSimplePlugin_l51) begin + decode_RS2 = _zz_decode_RS2_2; + end + end + end + if(when_HazardSimplePlugin_l45_1) begin + if(memory_BYPASSABLE_MEMORY_STAGE) begin + if(when_HazardSimplePlugin_l51_1) begin + decode_RS2 = _zz_decode_RS2_1; + end + end + end + if(when_HazardSimplePlugin_l45_2) begin + if(execute_BYPASSABLE_EXECUTE_STAGE) begin + if(when_HazardSimplePlugin_l51_2) begin + decode_RS2 = _zz_decode_RS2; + end + end + end + end + + always @(*) begin + decode_RS1 = decode_RegFilePlugin_rs1Data; + if(HazardSimplePlugin_writeBackBuffer_valid) begin + if(HazardSimplePlugin_addr0Match) begin + decode_RS1 = HazardSimplePlugin_writeBackBuffer_payload_data; + end + end + if(when_HazardSimplePlugin_l45) begin + if(when_HazardSimplePlugin_l47) begin + if(when_HazardSimplePlugin_l48) begin + decode_RS1 = _zz_decode_RS2_2; + end + end + end + if(when_HazardSimplePlugin_l45_1) begin + if(memory_BYPASSABLE_MEMORY_STAGE) begin + if(when_HazardSimplePlugin_l48_1) begin + decode_RS1 = _zz_decode_RS2_1; + end + end + end + if(when_HazardSimplePlugin_l45_2) begin + if(execute_BYPASSABLE_EXECUTE_STAGE) begin + if(when_HazardSimplePlugin_l48_2) begin + decode_RS1 = _zz_decode_RS2; + end + end + end + end + + assign memory_SHIFT_RIGHT = execute_to_memory_SHIFT_RIGHT; + always @(*) begin + _zz_decode_RS2_1 = memory_REGFILE_WRITE_DATA; + if(memory_arbitration_isValid) begin + case(memory_SHIFT_CTRL) + `ShiftCtrlEnum_binary_sequential_SLL_1 : begin + _zz_decode_RS2_1 = _zz_decode_RS2_3; + end + `ShiftCtrlEnum_binary_sequential_SRL_1, `ShiftCtrlEnum_binary_sequential_SRA_1 : begin + _zz_decode_RS2_1 = memory_SHIFT_RIGHT; + end + default : begin + end + endcase + end + if(when_MulDivIterativePlugin_l128) begin + _zz_decode_RS2_1 = memory_DivPlugin_div_result; + end + if(memory_CfuPlugin_CFU_IN_FLIGHT) begin + _zz_decode_RS2_1 = CfuPlugin_bus_rsp_rsp_payload_outputs_0; + end + end + + assign memory_SHIFT_CTRL = _zz_memory_SHIFT_CTRL; + assign execute_SHIFT_CTRL = _zz_execute_SHIFT_CTRL; + assign execute_SRC_LESS_UNSIGNED = decode_to_execute_SRC_LESS_UNSIGNED; + assign execute_SRC2_FORCE_ZERO = decode_to_execute_SRC2_FORCE_ZERO; + assign execute_SRC_USE_SUB_LESS = decode_to_execute_SRC_USE_SUB_LESS; + assign _zz_execute_SRC2 = execute_PC; + assign execute_SRC2_CTRL = _zz_execute_SRC2_CTRL; + assign execute_SRC1_CTRL = _zz_execute_SRC1_CTRL; + assign decode_SRC_USE_SUB_LESS = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[3]; + assign decode_SRC_ADD_ZERO = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[20]; + assign execute_SRC_ADD_SUB = execute_SrcPlugin_addSub; + assign execute_SRC_LESS = execute_SrcPlugin_less; + assign execute_ALU_CTRL = _zz_execute_ALU_CTRL; + assign execute_SRC2 = _zz_execute_SRC2_5; + assign execute_SRC1 = _zz_execute_SRC1; + assign execute_ALU_BITWISE_CTRL = _zz_execute_ALU_BITWISE_CTRL; + assign _zz_lastStageRegFileWrite_payload_address = writeBack_INSTRUCTION; + assign _zz_lastStageRegFileWrite_valid = writeBack_REGFILE_WRITE_VALID; + always @(*) begin + _zz_1 = 1'b0; + if(lastStageRegFileWrite_valid) begin + _zz_1 = 1'b1; + end + end + + assign decode_INSTRUCTION_ANTICIPATED = (decode_arbitration_isStuck ? decode_INSTRUCTION : IBusCachedPlugin_cache_io_cpu_fetch_data); + always @(*) begin + decode_REGFILE_WRITE_VALID = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[10]; + if(when_RegFilePlugin_l63) begin + decode_REGFILE_WRITE_VALID = 1'b0; + end + end + + assign decode_LEGAL_INSTRUCTION = ({((decode_INSTRUCTION & 32'h0000005f) == 32'h00000017),{((decode_INSTRUCTION & 32'h0000007f) == 32'h0000006f),{((decode_INSTRUCTION & 32'h0000007f) == 32'h0000000b),{((decode_INSTRUCTION & _zz_decode_LEGAL_INSTRUCTION) == 32'h00000003),{(_zz_decode_LEGAL_INSTRUCTION_1 == _zz_decode_LEGAL_INSTRUCTION_2),{_zz_decode_LEGAL_INSTRUCTION_3,{_zz_decode_LEGAL_INSTRUCTION_4,_zz_decode_LEGAL_INSTRUCTION_5}}}}}}} != 22'h0); + always @(*) begin + _zz_decode_RS2_2 = writeBack_REGFILE_WRITE_DATA; + if(when_DBusCachedPlugin_l484) begin + _zz_decode_RS2_2 = writeBack_DBusCachedPlugin_rspFormated; + end + if(when_MulPlugin_l147) begin + case(switch_MulPlugin_l148) + 2'b00 : begin + _zz_decode_RS2_2 = _zz__zz_decode_RS2_2; + end + default : begin + _zz_decode_RS2_2 = _zz__zz_decode_RS2_2_1; + end + endcase + end + end + + assign writeBack_MEMORY_WR = memory_to_writeBack_MEMORY_WR; + assign writeBack_MEMORY_STORE_DATA_RF = memory_to_writeBack_MEMORY_STORE_DATA_RF; + assign writeBack_REGFILE_WRITE_DATA = memory_to_writeBack_REGFILE_WRITE_DATA; + assign writeBack_MEMORY_ENABLE = memory_to_writeBack_MEMORY_ENABLE; + assign memory_REGFILE_WRITE_DATA = execute_to_memory_REGFILE_WRITE_DATA; + assign memory_MEMORY_ENABLE = execute_to_memory_MEMORY_ENABLE; + assign execute_MEMORY_FORCE_CONSTISTENCY = decode_to_execute_MEMORY_FORCE_CONSTISTENCY; + assign execute_MEMORY_MANAGMENT = decode_to_execute_MEMORY_MANAGMENT; + assign execute_RS2 = decode_to_execute_RS2; + assign execute_MEMORY_WR = decode_to_execute_MEMORY_WR; + assign execute_SRC_ADD = execute_SrcPlugin_addSub; + assign execute_MEMORY_ENABLE = decode_to_execute_MEMORY_ENABLE; + assign execute_INSTRUCTION = decode_to_execute_INSTRUCTION; + assign decode_MEMORY_ENABLE = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[4]; + assign decode_FLUSH_ALL = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[0]; + always @(*) begin + IBusCachedPlugin_rsp_issueDetected_4 = IBusCachedPlugin_rsp_issueDetected_3; + if(when_IBusCachedPlugin_l256) begin + IBusCachedPlugin_rsp_issueDetected_4 = 1'b1; + end + end + + always @(*) begin + IBusCachedPlugin_rsp_issueDetected_3 = IBusCachedPlugin_rsp_issueDetected_2; + if(when_IBusCachedPlugin_l250) begin + IBusCachedPlugin_rsp_issueDetected_3 = 1'b1; + end + end + + always @(*) begin + IBusCachedPlugin_rsp_issueDetected_2 = IBusCachedPlugin_rsp_issueDetected_1; + if(when_IBusCachedPlugin_l244) begin + IBusCachedPlugin_rsp_issueDetected_2 = 1'b1; + end + end + + always @(*) begin + IBusCachedPlugin_rsp_issueDetected_1 = IBusCachedPlugin_rsp_issueDetected; + if(when_IBusCachedPlugin_l239) begin + IBusCachedPlugin_rsp_issueDetected_1 = 1'b1; + end + end + + assign decode_BRANCH_CTRL = _zz_decode_BRANCH_CTRL_1; + assign decode_INSTRUCTION = IBusCachedPlugin_iBusRsp_output_payload_rsp_inst; + always @(*) begin + _zz_execute_to_memory_FORMAL_PC_NEXT = execute_FORMAL_PC_NEXT; + if(BranchPlugin_jumpInterface_valid) begin + _zz_execute_to_memory_FORMAL_PC_NEXT = BranchPlugin_jumpInterface_payload; + end + end + + always @(*) begin + _zz_decode_to_execute_FORMAL_PC_NEXT = decode_FORMAL_PC_NEXT; + if(IBusCachedPlugin_predictionJumpInterface_valid) begin + _zz_decode_to_execute_FORMAL_PC_NEXT = IBusCachedPlugin_predictionJumpInterface_payload; + end + end + + assign decode_PC = IBusCachedPlugin_iBusRsp_output_payload_pc; + assign writeBack_PC = memory_to_writeBack_PC; + assign writeBack_INSTRUCTION = memory_to_writeBack_INSTRUCTION; + always @(*) begin + decode_arbitration_haltItself = 1'b0; + if(when_DBusCachedPlugin_l303) begin + decode_arbitration_haltItself = 1'b1; + end + end + + always @(*) begin + decode_arbitration_haltByOther = 1'b0; + if(when_HazardSimplePlugin_l113) begin + decode_arbitration_haltByOther = 1'b1; + end + if(CsrPlugin_pipelineLiberator_active) begin + decode_arbitration_haltByOther = 1'b1; + end + if(when_CsrPlugin_l1116) begin + decode_arbitration_haltByOther = 1'b1; + end + end + + always @(*) begin + decode_arbitration_removeIt = 1'b0; + if(_zz_when) begin + decode_arbitration_removeIt = 1'b1; + end + if(decode_arbitration_isFlushed) begin + decode_arbitration_removeIt = 1'b1; + end + end + + assign decode_arbitration_flushIt = 1'b0; + always @(*) begin + decode_arbitration_flushNext = 1'b0; + if(IBusCachedPlugin_predictionJumpInterface_valid) begin + decode_arbitration_flushNext = 1'b1; + end + if(_zz_when) begin + decode_arbitration_flushNext = 1'b1; + end + end + + always @(*) begin + execute_arbitration_haltItself = 1'b0; + if(when_DBusCachedPlugin_l343) begin + execute_arbitration_haltItself = 1'b1; + end + if(when_CsrPlugin_l1108) begin + if(when_CsrPlugin_l1110) begin + execute_arbitration_haltItself = 1'b1; + end + end + if(when_CsrPlugin_l1180) begin + if(execute_CsrPlugin_blockedBySideEffects) begin + execute_arbitration_haltItself = 1'b1; + end + end + if(when_CfuPlugin_l175) begin + execute_arbitration_haltItself = 1'b1; + end + end + + always @(*) begin + execute_arbitration_haltByOther = 1'b0; + if(when_DBusCachedPlugin_l359) begin + execute_arbitration_haltByOther = 1'b1; + end + end + + always @(*) begin + execute_arbitration_removeIt = 1'b0; + if(_zz_when_1) begin + execute_arbitration_removeIt = 1'b1; + end + if(execute_arbitration_isFlushed) begin + execute_arbitration_removeIt = 1'b1; + end + end + + assign execute_arbitration_flushIt = 1'b0; + always @(*) begin + execute_arbitration_flushNext = 1'b0; + if(BranchPlugin_jumpInterface_valid) begin + execute_arbitration_flushNext = 1'b1; + end + if(_zz_when_1) begin + execute_arbitration_flushNext = 1'b1; + end + end + + always @(*) begin + memory_arbitration_haltItself = 1'b0; + if(when_MulDivIterativePlugin_l128) begin + if(when_MulDivIterativePlugin_l129) begin + memory_arbitration_haltItself = 1'b1; + end + end + if(memory_CfuPlugin_CFU_IN_FLIGHT) begin + if(when_CfuPlugin_l208) begin + memory_arbitration_haltItself = 1'b1; + end + end + end + + assign memory_arbitration_haltByOther = 1'b0; + always @(*) begin + memory_arbitration_removeIt = 1'b0; + if(memory_arbitration_isFlushed) begin + memory_arbitration_removeIt = 1'b1; + end + end + + assign memory_arbitration_flushIt = 1'b0; + assign memory_arbitration_flushNext = 1'b0; + always @(*) begin + writeBack_arbitration_haltItself = 1'b0; + if(when_DBusCachedPlugin_l458) begin + writeBack_arbitration_haltItself = 1'b1; + end + end + + assign writeBack_arbitration_haltByOther = 1'b0; + always @(*) begin + writeBack_arbitration_removeIt = 1'b0; + if(DBusCachedPlugin_exceptionBus_valid) begin + writeBack_arbitration_removeIt = 1'b1; + end + if(writeBack_arbitration_isFlushed) begin + writeBack_arbitration_removeIt = 1'b1; + end + end + + always @(*) begin + writeBack_arbitration_flushIt = 1'b0; + if(DBusCachedPlugin_redoBranch_valid) begin + writeBack_arbitration_flushIt = 1'b1; + end + end + + always @(*) begin + writeBack_arbitration_flushNext = 1'b0; + if(DBusCachedPlugin_redoBranch_valid) begin + writeBack_arbitration_flushNext = 1'b1; + end + if(DBusCachedPlugin_exceptionBus_valid) begin + writeBack_arbitration_flushNext = 1'b1; + end + if(when_CsrPlugin_l1019) begin + writeBack_arbitration_flushNext = 1'b1; + end + if(when_CsrPlugin_l1064) begin + writeBack_arbitration_flushNext = 1'b1; + end + end + + assign lastStageInstruction = writeBack_INSTRUCTION; + assign lastStagePc = writeBack_PC; + assign lastStageIsValid = writeBack_arbitration_isValid; + assign lastStageIsFiring = writeBack_arbitration_isFiring; + always @(*) begin + IBusCachedPlugin_fetcherHalt = 1'b0; + if(when_CsrPlugin_l922) begin + IBusCachedPlugin_fetcherHalt = 1'b1; + end + if(when_CsrPlugin_l1019) begin + IBusCachedPlugin_fetcherHalt = 1'b1; + end + if(when_CsrPlugin_l1064) begin + IBusCachedPlugin_fetcherHalt = 1'b1; + end + end + + always @(*) begin + IBusCachedPlugin_incomingInstruction = 1'b0; + if(when_Fetcher_l240) begin + IBusCachedPlugin_incomingInstruction = 1'b1; + end + end + + assign CsrPlugin_csrMapping_allowCsrSignal = 1'b0; + assign CsrPlugin_csrMapping_readDataSignal = CsrPlugin_csrMapping_readDataInit; + always @(*) begin + CsrPlugin_inWfi = 1'b0; + if(when_CsrPlugin_l1108) begin + CsrPlugin_inWfi = 1'b1; + end + end + + assign CsrPlugin_thirdPartyWake = 1'b0; + always @(*) begin + CsrPlugin_jumpInterface_valid = 1'b0; + if(when_CsrPlugin_l1019) begin + CsrPlugin_jumpInterface_valid = 1'b1; + end + if(when_CsrPlugin_l1064) begin + CsrPlugin_jumpInterface_valid = 1'b1; + end + end + + always @(*) begin + CsrPlugin_jumpInterface_payload = 32'bxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx; + if(when_CsrPlugin_l1019) begin + CsrPlugin_jumpInterface_payload = {CsrPlugin_xtvec_base,2'b00}; + end + if(when_CsrPlugin_l1064) begin + case(switch_CsrPlugin_l1068) + 2'b11 : begin + CsrPlugin_jumpInterface_payload = CsrPlugin_mepc; + end + default : begin + end + endcase + end + end + + assign CsrPlugin_forceMachineWire = 1'b0; + assign CsrPlugin_allowInterrupts = 1'b1; + assign CsrPlugin_allowException = 1'b1; + assign CsrPlugin_allowEbreakException = 1'b1; + assign IBusCachedPlugin_externalFlush = ({writeBack_arbitration_flushNext,{memory_arbitration_flushNext,{execute_arbitration_flushNext,decode_arbitration_flushNext}}} != 4'b0000); + assign IBusCachedPlugin_jump_pcLoad_valid = ({CsrPlugin_jumpInterface_valid,{BranchPlugin_jumpInterface_valid,{DBusCachedPlugin_redoBranch_valid,IBusCachedPlugin_predictionJumpInterface_valid}}} != 4'b0000); + assign _zz_IBusCachedPlugin_jump_pcLoad_payload = {IBusCachedPlugin_predictionJumpInterface_valid,{BranchPlugin_jumpInterface_valid,{CsrPlugin_jumpInterface_valid,DBusCachedPlugin_redoBranch_valid}}}; + assign _zz_IBusCachedPlugin_jump_pcLoad_payload_1 = (_zz_IBusCachedPlugin_jump_pcLoad_payload & (~ _zz__zz_IBusCachedPlugin_jump_pcLoad_payload_1)); + assign _zz_IBusCachedPlugin_jump_pcLoad_payload_2 = _zz_IBusCachedPlugin_jump_pcLoad_payload_1[3]; + assign _zz_IBusCachedPlugin_jump_pcLoad_payload_3 = (_zz_IBusCachedPlugin_jump_pcLoad_payload_1[1] || _zz_IBusCachedPlugin_jump_pcLoad_payload_2); + assign _zz_IBusCachedPlugin_jump_pcLoad_payload_4 = (_zz_IBusCachedPlugin_jump_pcLoad_payload_1[2] || _zz_IBusCachedPlugin_jump_pcLoad_payload_2); + assign IBusCachedPlugin_jump_pcLoad_payload = _zz_IBusCachedPlugin_jump_pcLoad_payload_5; + always @(*) begin + IBusCachedPlugin_fetchPc_correction = 1'b0; + if(IBusCachedPlugin_fetchPc_redo_valid) begin + IBusCachedPlugin_fetchPc_correction = 1'b1; + end + if(IBusCachedPlugin_jump_pcLoad_valid) begin + IBusCachedPlugin_fetchPc_correction = 1'b1; + end + end + + assign IBusCachedPlugin_fetchPc_output_fire = (IBusCachedPlugin_fetchPc_output_valid && IBusCachedPlugin_fetchPc_output_ready); + assign IBusCachedPlugin_fetchPc_corrected = (IBusCachedPlugin_fetchPc_correction || IBusCachedPlugin_fetchPc_correctionReg); + always @(*) begin + IBusCachedPlugin_fetchPc_pcRegPropagate = 1'b0; + if(IBusCachedPlugin_iBusRsp_stages_1_input_ready) begin + IBusCachedPlugin_fetchPc_pcRegPropagate = 1'b1; + end + end + + assign when_Fetcher_l131 = (IBusCachedPlugin_fetchPc_correction || IBusCachedPlugin_fetchPc_pcRegPropagate); + assign IBusCachedPlugin_fetchPc_output_fire_1 = (IBusCachedPlugin_fetchPc_output_valid && IBusCachedPlugin_fetchPc_output_ready); + assign when_Fetcher_l131_1 = ((! IBusCachedPlugin_fetchPc_output_valid) && IBusCachedPlugin_fetchPc_output_ready); + always @(*) begin + IBusCachedPlugin_fetchPc_pc = (IBusCachedPlugin_fetchPc_pcReg + _zz_IBusCachedPlugin_fetchPc_pc); + if(IBusCachedPlugin_fetchPc_redo_valid) begin + IBusCachedPlugin_fetchPc_pc = IBusCachedPlugin_fetchPc_redo_payload; + end + if(IBusCachedPlugin_jump_pcLoad_valid) begin + IBusCachedPlugin_fetchPc_pc = IBusCachedPlugin_jump_pcLoad_payload; + end + IBusCachedPlugin_fetchPc_pc[0] = 1'b0; + IBusCachedPlugin_fetchPc_pc[1] = 1'b0; + end + + always @(*) begin + IBusCachedPlugin_fetchPc_flushed = 1'b0; + if(IBusCachedPlugin_fetchPc_redo_valid) begin + IBusCachedPlugin_fetchPc_flushed = 1'b1; + end + if(IBusCachedPlugin_jump_pcLoad_valid) begin + IBusCachedPlugin_fetchPc_flushed = 1'b1; + end + end + + assign when_Fetcher_l158 = (IBusCachedPlugin_fetchPc_booted && ((IBusCachedPlugin_fetchPc_output_ready || IBusCachedPlugin_fetchPc_correction) || IBusCachedPlugin_fetchPc_pcRegPropagate)); + assign IBusCachedPlugin_fetchPc_output_valid = ((! IBusCachedPlugin_fetcherHalt) && IBusCachedPlugin_fetchPc_booted); + assign IBusCachedPlugin_fetchPc_output_payload = IBusCachedPlugin_fetchPc_pc; + always @(*) begin + IBusCachedPlugin_iBusRsp_redoFetch = 1'b0; + if(IBusCachedPlugin_rsp_redoFetch) begin + IBusCachedPlugin_iBusRsp_redoFetch = 1'b1; + end + end + + assign IBusCachedPlugin_iBusRsp_stages_0_input_valid = IBusCachedPlugin_fetchPc_output_valid; + assign IBusCachedPlugin_fetchPc_output_ready = IBusCachedPlugin_iBusRsp_stages_0_input_ready; + assign IBusCachedPlugin_iBusRsp_stages_0_input_payload = IBusCachedPlugin_fetchPc_output_payload; + always @(*) begin + IBusCachedPlugin_iBusRsp_stages_0_halt = 1'b0; + if(IBusCachedPlugin_cache_io_cpu_prefetch_haltIt) begin + IBusCachedPlugin_iBusRsp_stages_0_halt = 1'b1; + end + end + + assign _zz_IBusCachedPlugin_iBusRsp_stages_0_input_ready = (! IBusCachedPlugin_iBusRsp_stages_0_halt); + assign IBusCachedPlugin_iBusRsp_stages_0_input_ready = (IBusCachedPlugin_iBusRsp_stages_0_output_ready && _zz_IBusCachedPlugin_iBusRsp_stages_0_input_ready); + assign IBusCachedPlugin_iBusRsp_stages_0_output_valid = (IBusCachedPlugin_iBusRsp_stages_0_input_valid && _zz_IBusCachedPlugin_iBusRsp_stages_0_input_ready); + assign IBusCachedPlugin_iBusRsp_stages_0_output_payload = IBusCachedPlugin_iBusRsp_stages_0_input_payload; + always @(*) begin + IBusCachedPlugin_iBusRsp_stages_1_halt = 1'b0; + if(IBusCachedPlugin_mmuBus_busy) begin + IBusCachedPlugin_iBusRsp_stages_1_halt = 1'b1; + end + end + + assign _zz_IBusCachedPlugin_iBusRsp_stages_1_input_ready = (! IBusCachedPlugin_iBusRsp_stages_1_halt); + assign IBusCachedPlugin_iBusRsp_stages_1_input_ready = (IBusCachedPlugin_iBusRsp_stages_1_output_ready && _zz_IBusCachedPlugin_iBusRsp_stages_1_input_ready); + assign IBusCachedPlugin_iBusRsp_stages_1_output_valid = (IBusCachedPlugin_iBusRsp_stages_1_input_valid && _zz_IBusCachedPlugin_iBusRsp_stages_1_input_ready); + assign IBusCachedPlugin_iBusRsp_stages_1_output_payload = IBusCachedPlugin_iBusRsp_stages_1_input_payload; + always @(*) begin + IBusCachedPlugin_iBusRsp_stages_2_halt = 1'b0; + if(when_IBusCachedPlugin_l267) begin + IBusCachedPlugin_iBusRsp_stages_2_halt = 1'b1; + end + end + + assign _zz_IBusCachedPlugin_iBusRsp_stages_2_input_ready = (! IBusCachedPlugin_iBusRsp_stages_2_halt); + assign IBusCachedPlugin_iBusRsp_stages_2_input_ready = (IBusCachedPlugin_iBusRsp_stages_2_output_ready && _zz_IBusCachedPlugin_iBusRsp_stages_2_input_ready); + assign IBusCachedPlugin_iBusRsp_stages_2_output_valid = (IBusCachedPlugin_iBusRsp_stages_2_input_valid && _zz_IBusCachedPlugin_iBusRsp_stages_2_input_ready); + assign IBusCachedPlugin_iBusRsp_stages_2_output_payload = IBusCachedPlugin_iBusRsp_stages_2_input_payload; + assign IBusCachedPlugin_fetchPc_redo_valid = IBusCachedPlugin_iBusRsp_redoFetch; + assign IBusCachedPlugin_fetchPc_redo_payload = IBusCachedPlugin_iBusRsp_stages_2_input_payload; + assign IBusCachedPlugin_iBusRsp_flush = ((decode_arbitration_removeIt || (decode_arbitration_flushNext && (! decode_arbitration_isStuck))) || IBusCachedPlugin_iBusRsp_redoFetch); + assign IBusCachedPlugin_iBusRsp_stages_0_output_ready = _zz_IBusCachedPlugin_iBusRsp_stages_0_output_ready; + assign _zz_IBusCachedPlugin_iBusRsp_stages_0_output_ready = ((1'b0 && (! _zz_IBusCachedPlugin_iBusRsp_stages_0_output_ready_1)) || IBusCachedPlugin_iBusRsp_stages_1_input_ready); + assign _zz_IBusCachedPlugin_iBusRsp_stages_0_output_ready_1 = _zz_IBusCachedPlugin_iBusRsp_stages_0_output_ready_2; + assign IBusCachedPlugin_iBusRsp_stages_1_input_valid = _zz_IBusCachedPlugin_iBusRsp_stages_0_output_ready_1; + assign IBusCachedPlugin_iBusRsp_stages_1_input_payload = IBusCachedPlugin_fetchPc_pcReg; + assign IBusCachedPlugin_iBusRsp_stages_1_output_ready = ((1'b0 && (! IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_valid)) || IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_ready); + assign IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_valid = _zz_IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_valid; + assign IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_payload = _zz_IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_payload; + assign IBusCachedPlugin_iBusRsp_stages_2_input_valid = IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_valid; + assign IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_ready = IBusCachedPlugin_iBusRsp_stages_2_input_ready; + assign IBusCachedPlugin_iBusRsp_stages_2_input_payload = IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_payload; + always @(*) begin + IBusCachedPlugin_iBusRsp_readyForError = 1'b1; + if(when_Fetcher_l320) begin + IBusCachedPlugin_iBusRsp_readyForError = 1'b0; + end + end + + assign when_Fetcher_l240 = (IBusCachedPlugin_iBusRsp_stages_1_input_valid || IBusCachedPlugin_iBusRsp_stages_2_input_valid); + assign when_Fetcher_l320 = (! IBusCachedPlugin_pcValids_0); + assign when_Fetcher_l329 = (! (! IBusCachedPlugin_iBusRsp_stages_1_input_ready)); + assign when_Fetcher_l329_1 = (! (! IBusCachedPlugin_iBusRsp_stages_2_input_ready)); + assign when_Fetcher_l329_2 = (! execute_arbitration_isStuck); + assign when_Fetcher_l329_3 = (! memory_arbitration_isStuck); + assign when_Fetcher_l329_4 = (! writeBack_arbitration_isStuck); + assign IBusCachedPlugin_pcValids_0 = IBusCachedPlugin_injector_nextPcCalc_valids_1; + assign IBusCachedPlugin_pcValids_1 = IBusCachedPlugin_injector_nextPcCalc_valids_2; + assign IBusCachedPlugin_pcValids_2 = IBusCachedPlugin_injector_nextPcCalc_valids_3; + assign IBusCachedPlugin_pcValids_3 = IBusCachedPlugin_injector_nextPcCalc_valids_4; + assign IBusCachedPlugin_iBusRsp_output_ready = (! decode_arbitration_isStuck); + assign decode_arbitration_isValid = IBusCachedPlugin_iBusRsp_output_valid; + assign _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch = _zz__zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch[11]; + always @(*) begin + _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_1[18] = _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch; + _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_1[17] = _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch; + _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_1[16] = _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch; + _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_1[15] = _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch; + _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_1[14] = _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch; + _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_1[13] = _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch; + _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_1[12] = _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch; + _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_1[11] = _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch; + _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_1[10] = _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch; + _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_1[9] = _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch; + _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_1[8] = _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch; + _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_1[7] = _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch; + _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_1[6] = _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch; + _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_1[5] = _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch; + _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_1[4] = _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch; + _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_1[3] = _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch; + _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_1[2] = _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch; + _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_1[1] = _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch; + _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_1[0] = _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch; + end + + always @(*) begin + IBusCachedPlugin_decodePrediction_cmd_hadBranch = ((decode_BRANCH_CTRL == `BranchCtrlEnum_binary_sequential_JAL) || ((decode_BRANCH_CTRL == `BranchCtrlEnum_binary_sequential_B) && _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_2[31])); + if(_zz_6) begin + IBusCachedPlugin_decodePrediction_cmd_hadBranch = 1'b0; + end + end + + assign _zz_2 = _zz__zz_2[19]; + always @(*) begin + _zz_3[10] = _zz_2; + _zz_3[9] = _zz_2; + _zz_3[8] = _zz_2; + _zz_3[7] = _zz_2; + _zz_3[6] = _zz_2; + _zz_3[5] = _zz_2; + _zz_3[4] = _zz_2; + _zz_3[3] = _zz_2; + _zz_3[2] = _zz_2; + _zz_3[1] = _zz_2; + _zz_3[0] = _zz_2; + end + + assign _zz_4 = _zz__zz_4[11]; + always @(*) begin + _zz_5[18] = _zz_4; + _zz_5[17] = _zz_4; + _zz_5[16] = _zz_4; + _zz_5[15] = _zz_4; + _zz_5[14] = _zz_4; + _zz_5[13] = _zz_4; + _zz_5[12] = _zz_4; + _zz_5[11] = _zz_4; + _zz_5[10] = _zz_4; + _zz_5[9] = _zz_4; + _zz_5[8] = _zz_4; + _zz_5[7] = _zz_4; + _zz_5[6] = _zz_4; + _zz_5[5] = _zz_4; + _zz_5[4] = _zz_4; + _zz_5[3] = _zz_4; + _zz_5[2] = _zz_4; + _zz_5[1] = _zz_4; + _zz_5[0] = _zz_4; + end + + always @(*) begin + case(decode_BRANCH_CTRL) + `BranchCtrlEnum_binary_sequential_JAL : begin + _zz_6 = _zz__zz_6[1]; + end + default : begin + _zz_6 = _zz__zz_6_1[1]; + end + endcase + end + + assign IBusCachedPlugin_predictionJumpInterface_valid = (decode_arbitration_isValid && IBusCachedPlugin_decodePrediction_cmd_hadBranch); + assign _zz_IBusCachedPlugin_predictionJumpInterface_payload = _zz__zz_IBusCachedPlugin_predictionJumpInterface_payload[19]; + always @(*) begin + _zz_IBusCachedPlugin_predictionJumpInterface_payload_1[10] = _zz_IBusCachedPlugin_predictionJumpInterface_payload; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_1[9] = _zz_IBusCachedPlugin_predictionJumpInterface_payload; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_1[8] = _zz_IBusCachedPlugin_predictionJumpInterface_payload; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_1[7] = _zz_IBusCachedPlugin_predictionJumpInterface_payload; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_1[6] = _zz_IBusCachedPlugin_predictionJumpInterface_payload; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_1[5] = _zz_IBusCachedPlugin_predictionJumpInterface_payload; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_1[4] = _zz_IBusCachedPlugin_predictionJumpInterface_payload; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_1[3] = _zz_IBusCachedPlugin_predictionJumpInterface_payload; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_1[2] = _zz_IBusCachedPlugin_predictionJumpInterface_payload; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_1[1] = _zz_IBusCachedPlugin_predictionJumpInterface_payload; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_1[0] = _zz_IBusCachedPlugin_predictionJumpInterface_payload; + end + + assign _zz_IBusCachedPlugin_predictionJumpInterface_payload_2 = _zz__zz_IBusCachedPlugin_predictionJumpInterface_payload_2[11]; + always @(*) begin + _zz_IBusCachedPlugin_predictionJumpInterface_payload_3[18] = _zz_IBusCachedPlugin_predictionJumpInterface_payload_2; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_3[17] = _zz_IBusCachedPlugin_predictionJumpInterface_payload_2; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_3[16] = _zz_IBusCachedPlugin_predictionJumpInterface_payload_2; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_3[15] = _zz_IBusCachedPlugin_predictionJumpInterface_payload_2; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_3[14] = _zz_IBusCachedPlugin_predictionJumpInterface_payload_2; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_3[13] = _zz_IBusCachedPlugin_predictionJumpInterface_payload_2; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_3[12] = _zz_IBusCachedPlugin_predictionJumpInterface_payload_2; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_3[11] = _zz_IBusCachedPlugin_predictionJumpInterface_payload_2; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_3[10] = _zz_IBusCachedPlugin_predictionJumpInterface_payload_2; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_3[9] = _zz_IBusCachedPlugin_predictionJumpInterface_payload_2; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_3[8] = _zz_IBusCachedPlugin_predictionJumpInterface_payload_2; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_3[7] = _zz_IBusCachedPlugin_predictionJumpInterface_payload_2; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_3[6] = _zz_IBusCachedPlugin_predictionJumpInterface_payload_2; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_3[5] = _zz_IBusCachedPlugin_predictionJumpInterface_payload_2; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_3[4] = _zz_IBusCachedPlugin_predictionJumpInterface_payload_2; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_3[3] = _zz_IBusCachedPlugin_predictionJumpInterface_payload_2; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_3[2] = _zz_IBusCachedPlugin_predictionJumpInterface_payload_2; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_3[1] = _zz_IBusCachedPlugin_predictionJumpInterface_payload_2; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_3[0] = _zz_IBusCachedPlugin_predictionJumpInterface_payload_2; + end + + assign IBusCachedPlugin_predictionJumpInterface_payload = (decode_PC + ((decode_BRANCH_CTRL == `BranchCtrlEnum_binary_sequential_JAL) ? {{_zz_IBusCachedPlugin_predictionJumpInterface_payload_1,{{{_zz_IBusCachedPlugin_predictionJumpInterface_payload_4,decode_INSTRUCTION[19 : 12]},decode_INSTRUCTION[20]},decode_INSTRUCTION[30 : 21]}},1'b0} : {{_zz_IBusCachedPlugin_predictionJumpInterface_payload_3,{{{_zz_IBusCachedPlugin_predictionJumpInterface_payload_5,_zz_IBusCachedPlugin_predictionJumpInterface_payload_6},decode_INSTRUCTION[30 : 25]},decode_INSTRUCTION[11 : 8]}},1'b0})); + assign iBus_cmd_valid = IBusCachedPlugin_cache_io_mem_cmd_valid; + always @(*) begin + iBus_cmd_payload_address = IBusCachedPlugin_cache_io_mem_cmd_payload_address; + iBus_cmd_payload_address = IBusCachedPlugin_cache_io_mem_cmd_payload_address; + end + + assign iBus_cmd_payload_size = IBusCachedPlugin_cache_io_mem_cmd_payload_size; + assign IBusCachedPlugin_s0_tightlyCoupledHit = 1'b0; + assign IBusCachedPlugin_cache_io_cpu_prefetch_isValid = (IBusCachedPlugin_iBusRsp_stages_0_input_valid && (! IBusCachedPlugin_s0_tightlyCoupledHit)); + assign IBusCachedPlugin_cache_io_cpu_fetch_isValid = (IBusCachedPlugin_iBusRsp_stages_1_input_valid && (! IBusCachedPlugin_s1_tightlyCoupledHit)); + assign IBusCachedPlugin_cache_io_cpu_fetch_isStuck = (! IBusCachedPlugin_iBusRsp_stages_1_input_ready); + assign IBusCachedPlugin_mmuBus_cmd_0_isValid = IBusCachedPlugin_cache_io_cpu_fetch_isValid; + assign IBusCachedPlugin_mmuBus_cmd_0_isStuck = (! IBusCachedPlugin_iBusRsp_stages_1_input_ready); + assign IBusCachedPlugin_mmuBus_cmd_0_virtualAddress = IBusCachedPlugin_iBusRsp_stages_1_input_payload; + assign IBusCachedPlugin_mmuBus_cmd_0_bypassTranslation = 1'b0; + assign IBusCachedPlugin_mmuBus_end = (IBusCachedPlugin_iBusRsp_stages_1_input_ready || IBusCachedPlugin_externalFlush); + assign IBusCachedPlugin_cache_io_cpu_decode_isValid = (IBusCachedPlugin_iBusRsp_stages_2_input_valid && (! IBusCachedPlugin_s2_tightlyCoupledHit)); + assign IBusCachedPlugin_cache_io_cpu_decode_isStuck = (! IBusCachedPlugin_iBusRsp_stages_2_input_ready); + assign IBusCachedPlugin_cache_io_cpu_decode_isUser = (CsrPlugin_privilege == 2'b00); + assign IBusCachedPlugin_rsp_iBusRspOutputHalt = 1'b0; + assign IBusCachedPlugin_rsp_issueDetected = 1'b0; + always @(*) begin + IBusCachedPlugin_rsp_redoFetch = 1'b0; + if(when_IBusCachedPlugin_l239) begin + IBusCachedPlugin_rsp_redoFetch = 1'b1; + end + if(when_IBusCachedPlugin_l250) begin + IBusCachedPlugin_rsp_redoFetch = 1'b1; + end + end + + always @(*) begin + IBusCachedPlugin_cache_io_cpu_fill_valid = (IBusCachedPlugin_rsp_redoFetch && (! IBusCachedPlugin_cache_io_cpu_decode_mmuRefilling)); + if(when_IBusCachedPlugin_l250) begin + IBusCachedPlugin_cache_io_cpu_fill_valid = 1'b1; + end + end + + always @(*) begin + IBusCachedPlugin_decodeExceptionPort_valid = 1'b0; + if(when_IBusCachedPlugin_l244) begin + IBusCachedPlugin_decodeExceptionPort_valid = IBusCachedPlugin_iBusRsp_readyForError; + end + if(when_IBusCachedPlugin_l256) begin + IBusCachedPlugin_decodeExceptionPort_valid = IBusCachedPlugin_iBusRsp_readyForError; + end + end + + always @(*) begin + IBusCachedPlugin_decodeExceptionPort_payload_code = 4'bxxxx; + if(when_IBusCachedPlugin_l244) begin + IBusCachedPlugin_decodeExceptionPort_payload_code = 4'b1100; + end + if(when_IBusCachedPlugin_l256) begin + IBusCachedPlugin_decodeExceptionPort_payload_code = 4'b0001; + end + end + + assign IBusCachedPlugin_decodeExceptionPort_payload_badAddr = {IBusCachedPlugin_iBusRsp_stages_2_input_payload[31 : 2],2'b00}; + assign when_IBusCachedPlugin_l239 = ((IBusCachedPlugin_cache_io_cpu_decode_isValid && IBusCachedPlugin_cache_io_cpu_decode_mmuRefilling) && (! IBusCachedPlugin_rsp_issueDetected)); + assign when_IBusCachedPlugin_l244 = ((IBusCachedPlugin_cache_io_cpu_decode_isValid && IBusCachedPlugin_cache_io_cpu_decode_mmuException) && (! IBusCachedPlugin_rsp_issueDetected_1)); + assign when_IBusCachedPlugin_l250 = ((IBusCachedPlugin_cache_io_cpu_decode_isValid && IBusCachedPlugin_cache_io_cpu_decode_cacheMiss) && (! IBusCachedPlugin_rsp_issueDetected_2)); + assign when_IBusCachedPlugin_l256 = ((IBusCachedPlugin_cache_io_cpu_decode_isValid && IBusCachedPlugin_cache_io_cpu_decode_error) && (! IBusCachedPlugin_rsp_issueDetected_3)); + assign when_IBusCachedPlugin_l267 = (IBusCachedPlugin_rsp_issueDetected_4 || IBusCachedPlugin_rsp_iBusRspOutputHalt); + assign IBusCachedPlugin_iBusRsp_output_valid = IBusCachedPlugin_iBusRsp_stages_2_output_valid; + assign IBusCachedPlugin_iBusRsp_stages_2_output_ready = IBusCachedPlugin_iBusRsp_output_ready; + assign IBusCachedPlugin_iBusRsp_output_payload_rsp_inst = IBusCachedPlugin_cache_io_cpu_decode_data; + assign IBusCachedPlugin_iBusRsp_output_payload_pc = IBusCachedPlugin_iBusRsp_stages_2_output_payload; + assign IBusCachedPlugin_cache_io_flush = (decode_arbitration_isValid && decode_FLUSH_ALL); + assign dataCache_1_io_mem_cmd_ready = (! dataCache_1_io_mem_cmd_rValid); + assign dataCache_1_io_mem_cmd_s2mPipe_valid = (dataCache_1_io_mem_cmd_valid || dataCache_1_io_mem_cmd_rValid); + assign dataCache_1_io_mem_cmd_s2mPipe_payload_wr = (dataCache_1_io_mem_cmd_rValid ? dataCache_1_io_mem_cmd_rData_wr : dataCache_1_io_mem_cmd_payload_wr); + assign dataCache_1_io_mem_cmd_s2mPipe_payload_uncached = (dataCache_1_io_mem_cmd_rValid ? dataCache_1_io_mem_cmd_rData_uncached : dataCache_1_io_mem_cmd_payload_uncached); + assign dataCache_1_io_mem_cmd_s2mPipe_payload_address = (dataCache_1_io_mem_cmd_rValid ? dataCache_1_io_mem_cmd_rData_address : dataCache_1_io_mem_cmd_payload_address); + assign dataCache_1_io_mem_cmd_s2mPipe_payload_data = (dataCache_1_io_mem_cmd_rValid ? dataCache_1_io_mem_cmd_rData_data : dataCache_1_io_mem_cmd_payload_data); + assign dataCache_1_io_mem_cmd_s2mPipe_payload_mask = (dataCache_1_io_mem_cmd_rValid ? dataCache_1_io_mem_cmd_rData_mask : dataCache_1_io_mem_cmd_payload_mask); + assign dataCache_1_io_mem_cmd_s2mPipe_payload_size = (dataCache_1_io_mem_cmd_rValid ? dataCache_1_io_mem_cmd_rData_size : dataCache_1_io_mem_cmd_payload_size); + assign dataCache_1_io_mem_cmd_s2mPipe_payload_last = (dataCache_1_io_mem_cmd_rValid ? dataCache_1_io_mem_cmd_rData_last : dataCache_1_io_mem_cmd_payload_last); + always @(*) begin + dataCache_1_io_mem_cmd_s2mPipe_ready = dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_ready; + if(when_Stream_l342) begin + dataCache_1_io_mem_cmd_s2mPipe_ready = 1'b1; + end + end + + assign when_Stream_l342 = (! dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_valid); + assign dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_valid = dataCache_1_io_mem_cmd_s2mPipe_rValid; + assign dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_payload_wr = dataCache_1_io_mem_cmd_s2mPipe_rData_wr; + assign dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_payload_uncached = dataCache_1_io_mem_cmd_s2mPipe_rData_uncached; + assign dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_payload_address = dataCache_1_io_mem_cmd_s2mPipe_rData_address; + assign dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_payload_data = dataCache_1_io_mem_cmd_s2mPipe_rData_data; + assign dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_payload_mask = dataCache_1_io_mem_cmd_s2mPipe_rData_mask; + assign dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_payload_size = dataCache_1_io_mem_cmd_s2mPipe_rData_size; + assign dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_payload_last = dataCache_1_io_mem_cmd_s2mPipe_rData_last; + assign dBus_cmd_valid = dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_valid; + assign dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_ready = dBus_cmd_ready; + assign dBus_cmd_payload_wr = dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_payload_wr; + assign dBus_cmd_payload_uncached = dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_payload_uncached; + assign dBus_cmd_payload_address = dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_payload_address; + assign dBus_cmd_payload_data = dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_payload_data; + assign dBus_cmd_payload_mask = dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_payload_mask; + assign dBus_cmd_payload_size = dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_payload_size; + assign dBus_cmd_payload_last = dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_payload_last; + assign when_DBusCachedPlugin_l303 = ((DBusCachedPlugin_mmuBus_busy && decode_arbitration_isValid) && decode_MEMORY_ENABLE); + assign execute_DBusCachedPlugin_size = execute_INSTRUCTION[13 : 12]; + assign dataCache_1_io_cpu_execute_isValid = (execute_arbitration_isValid && execute_MEMORY_ENABLE); + assign dataCache_1_io_cpu_execute_address = execute_SRC_ADD; + always @(*) begin + case(execute_DBusCachedPlugin_size) + 2'b00 : begin + _zz_execute_MEMORY_STORE_DATA_RF = {{{execute_RS2[7 : 0],execute_RS2[7 : 0]},execute_RS2[7 : 0]},execute_RS2[7 : 0]}; + end + 2'b01 : begin + _zz_execute_MEMORY_STORE_DATA_RF = {execute_RS2[15 : 0],execute_RS2[15 : 0]}; + end + default : begin + _zz_execute_MEMORY_STORE_DATA_RF = execute_RS2[31 : 0]; + end + endcase + end + + assign dataCache_1_io_cpu_flush_valid = (execute_arbitration_isValid && execute_MEMORY_MANAGMENT); + assign dataCache_1_io_cpu_flush_isStall = (dataCache_1_io_cpu_flush_valid && (! dataCache_1_io_cpu_flush_ready)); + assign when_DBusCachedPlugin_l343 = (dataCache_1_io_cpu_flush_isStall || dataCache_1_io_cpu_execute_haltIt); + assign when_DBusCachedPlugin_l359 = (dataCache_1_io_cpu_execute_refilling && execute_arbitration_isValid); + assign dataCache_1_io_cpu_memory_isValid = (memory_arbitration_isValid && memory_MEMORY_ENABLE); + assign dataCache_1_io_cpu_memory_address = memory_REGFILE_WRITE_DATA; + assign DBusCachedPlugin_mmuBus_cmd_0_isValid = dataCache_1_io_cpu_memory_isValid; + assign DBusCachedPlugin_mmuBus_cmd_0_isStuck = memory_arbitration_isStuck; + assign DBusCachedPlugin_mmuBus_cmd_0_virtualAddress = dataCache_1_io_cpu_memory_address; + assign DBusCachedPlugin_mmuBus_cmd_0_bypassTranslation = 1'b0; + assign DBusCachedPlugin_mmuBus_end = ((! memory_arbitration_isStuck) || memory_arbitration_removeIt); + always @(*) begin + dataCache_1_io_cpu_memory_mmuRsp_isIoAccess = DBusCachedPlugin_mmuBus_rsp_isIoAccess; + if(when_DBusCachedPlugin_l386) begin + dataCache_1_io_cpu_memory_mmuRsp_isIoAccess = 1'b1; + end + end + + assign when_DBusCachedPlugin_l386 = (1'b0 && (! dataCache_1_io_cpu_memory_isWrite)); + always @(*) begin + dataCache_1_io_cpu_writeBack_isValid = (writeBack_arbitration_isValid && writeBack_MEMORY_ENABLE); + if(writeBack_arbitration_haltByOther) begin + dataCache_1_io_cpu_writeBack_isValid = 1'b0; + end + end + + assign dataCache_1_io_cpu_writeBack_isUser = (CsrPlugin_privilege == 2'b00); + assign dataCache_1_io_cpu_writeBack_address = writeBack_REGFILE_WRITE_DATA; + assign dataCache_1_io_cpu_writeBack_storeData[31 : 0] = writeBack_MEMORY_STORE_DATA_RF; + always @(*) begin + DBusCachedPlugin_redoBranch_valid = 1'b0; + if(when_DBusCachedPlugin_l438) begin + if(dataCache_1_io_cpu_redo) begin + DBusCachedPlugin_redoBranch_valid = 1'b1; + end + end + end + + assign DBusCachedPlugin_redoBranch_payload = writeBack_PC; + always @(*) begin + DBusCachedPlugin_exceptionBus_valid = 1'b0; + if(when_DBusCachedPlugin_l438) begin + if(dataCache_1_io_cpu_writeBack_accessError) begin + DBusCachedPlugin_exceptionBus_valid = 1'b1; + end + if(dataCache_1_io_cpu_writeBack_mmuException) begin + DBusCachedPlugin_exceptionBus_valid = 1'b1; + end + if(dataCache_1_io_cpu_writeBack_unalignedAccess) begin + DBusCachedPlugin_exceptionBus_valid = 1'b1; + end + if(dataCache_1_io_cpu_redo) begin + DBusCachedPlugin_exceptionBus_valid = 1'b0; + end + end + end + + assign DBusCachedPlugin_exceptionBus_payload_badAddr = writeBack_REGFILE_WRITE_DATA; + always @(*) begin + DBusCachedPlugin_exceptionBus_payload_code = 4'bxxxx; + if(when_DBusCachedPlugin_l438) begin + if(dataCache_1_io_cpu_writeBack_accessError) begin + DBusCachedPlugin_exceptionBus_payload_code = {1'd0, _zz_DBusCachedPlugin_exceptionBus_payload_code}; + end + if(dataCache_1_io_cpu_writeBack_mmuException) begin + DBusCachedPlugin_exceptionBus_payload_code = (writeBack_MEMORY_WR ? 4'b1111 : 4'b1101); + end + if(dataCache_1_io_cpu_writeBack_unalignedAccess) begin + DBusCachedPlugin_exceptionBus_payload_code = {1'd0, _zz_DBusCachedPlugin_exceptionBus_payload_code_1}; + end + end + end + + assign when_DBusCachedPlugin_l438 = (writeBack_arbitration_isValid && writeBack_MEMORY_ENABLE); + assign when_DBusCachedPlugin_l458 = (dataCache_1_io_cpu_writeBack_isValid && dataCache_1_io_cpu_writeBack_haltIt); + assign writeBack_DBusCachedPlugin_rspSplits_0 = dataCache_1_io_cpu_writeBack_data[7 : 0]; + assign writeBack_DBusCachedPlugin_rspSplits_1 = dataCache_1_io_cpu_writeBack_data[15 : 8]; + assign writeBack_DBusCachedPlugin_rspSplits_2 = dataCache_1_io_cpu_writeBack_data[23 : 16]; + assign writeBack_DBusCachedPlugin_rspSplits_3 = dataCache_1_io_cpu_writeBack_data[31 : 24]; + always @(*) begin + writeBack_DBusCachedPlugin_rspShifted[7 : 0] = _zz_writeBack_DBusCachedPlugin_rspShifted; + writeBack_DBusCachedPlugin_rspShifted[15 : 8] = _zz_writeBack_DBusCachedPlugin_rspShifted_2; + writeBack_DBusCachedPlugin_rspShifted[23 : 16] = writeBack_DBusCachedPlugin_rspSplits_2; + writeBack_DBusCachedPlugin_rspShifted[31 : 24] = writeBack_DBusCachedPlugin_rspSplits_3; + end + + assign writeBack_DBusCachedPlugin_rspRf = writeBack_DBusCachedPlugin_rspShifted[31 : 0]; + assign switch_Misc_l200 = writeBack_INSTRUCTION[13 : 12]; + assign _zz_writeBack_DBusCachedPlugin_rspFormated = (writeBack_DBusCachedPlugin_rspRf[7] && (! writeBack_INSTRUCTION[14])); + always @(*) begin + _zz_writeBack_DBusCachedPlugin_rspFormated_1[31] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[30] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[29] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[28] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[27] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[26] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[25] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[24] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[23] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[22] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[21] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[20] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[19] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[18] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[17] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[16] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[15] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[14] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[13] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[12] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[11] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[10] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[9] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[8] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[7 : 0] = writeBack_DBusCachedPlugin_rspRf[7 : 0]; + end + + assign _zz_writeBack_DBusCachedPlugin_rspFormated_2 = (writeBack_DBusCachedPlugin_rspRf[15] && (! writeBack_INSTRUCTION[14])); + always @(*) begin + _zz_writeBack_DBusCachedPlugin_rspFormated_3[31] = _zz_writeBack_DBusCachedPlugin_rspFormated_2; + _zz_writeBack_DBusCachedPlugin_rspFormated_3[30] = _zz_writeBack_DBusCachedPlugin_rspFormated_2; + _zz_writeBack_DBusCachedPlugin_rspFormated_3[29] = _zz_writeBack_DBusCachedPlugin_rspFormated_2; + _zz_writeBack_DBusCachedPlugin_rspFormated_3[28] = _zz_writeBack_DBusCachedPlugin_rspFormated_2; + _zz_writeBack_DBusCachedPlugin_rspFormated_3[27] = _zz_writeBack_DBusCachedPlugin_rspFormated_2; + _zz_writeBack_DBusCachedPlugin_rspFormated_3[26] = _zz_writeBack_DBusCachedPlugin_rspFormated_2; + _zz_writeBack_DBusCachedPlugin_rspFormated_3[25] = _zz_writeBack_DBusCachedPlugin_rspFormated_2; + _zz_writeBack_DBusCachedPlugin_rspFormated_3[24] = _zz_writeBack_DBusCachedPlugin_rspFormated_2; + _zz_writeBack_DBusCachedPlugin_rspFormated_3[23] = _zz_writeBack_DBusCachedPlugin_rspFormated_2; + _zz_writeBack_DBusCachedPlugin_rspFormated_3[22] = _zz_writeBack_DBusCachedPlugin_rspFormated_2; + _zz_writeBack_DBusCachedPlugin_rspFormated_3[21] = _zz_writeBack_DBusCachedPlugin_rspFormated_2; + _zz_writeBack_DBusCachedPlugin_rspFormated_3[20] = _zz_writeBack_DBusCachedPlugin_rspFormated_2; + _zz_writeBack_DBusCachedPlugin_rspFormated_3[19] = _zz_writeBack_DBusCachedPlugin_rspFormated_2; + _zz_writeBack_DBusCachedPlugin_rspFormated_3[18] = _zz_writeBack_DBusCachedPlugin_rspFormated_2; + _zz_writeBack_DBusCachedPlugin_rspFormated_3[17] = _zz_writeBack_DBusCachedPlugin_rspFormated_2; + _zz_writeBack_DBusCachedPlugin_rspFormated_3[16] = _zz_writeBack_DBusCachedPlugin_rspFormated_2; + _zz_writeBack_DBusCachedPlugin_rspFormated_3[15 : 0] = writeBack_DBusCachedPlugin_rspRf[15 : 0]; + end + + always @(*) begin + case(switch_Misc_l200) + 2'b00 : begin + writeBack_DBusCachedPlugin_rspFormated = _zz_writeBack_DBusCachedPlugin_rspFormated_1; + end + 2'b01 : begin + writeBack_DBusCachedPlugin_rspFormated = _zz_writeBack_DBusCachedPlugin_rspFormated_3; + end + default : begin + writeBack_DBusCachedPlugin_rspFormated = writeBack_DBusCachedPlugin_rspRf; + end + endcase + end + + assign when_DBusCachedPlugin_l484 = (writeBack_arbitration_isValid && writeBack_MEMORY_ENABLE); + assign IBusCachedPlugin_mmuBus_rsp_physicalAddress = IBusCachedPlugin_mmuBus_cmd_0_virtualAddress; + assign IBusCachedPlugin_mmuBus_rsp_allowRead = 1'b1; + assign IBusCachedPlugin_mmuBus_rsp_allowWrite = 1'b1; + assign IBusCachedPlugin_mmuBus_rsp_allowExecute = 1'b1; + assign IBusCachedPlugin_mmuBus_rsp_isIoAccess = IBusCachedPlugin_mmuBus_rsp_physicalAddress[31]; + assign IBusCachedPlugin_mmuBus_rsp_isPaging = 1'b0; + assign IBusCachedPlugin_mmuBus_rsp_exception = 1'b0; + assign IBusCachedPlugin_mmuBus_rsp_refilling = 1'b0; + assign IBusCachedPlugin_mmuBus_busy = 1'b0; + assign DBusCachedPlugin_mmuBus_rsp_physicalAddress = DBusCachedPlugin_mmuBus_cmd_0_virtualAddress; + assign DBusCachedPlugin_mmuBus_rsp_allowRead = 1'b1; + assign DBusCachedPlugin_mmuBus_rsp_allowWrite = 1'b1; + assign DBusCachedPlugin_mmuBus_rsp_allowExecute = 1'b1; + assign DBusCachedPlugin_mmuBus_rsp_isIoAccess = DBusCachedPlugin_mmuBus_rsp_physicalAddress[31]; + assign DBusCachedPlugin_mmuBus_rsp_isPaging = 1'b0; + assign DBusCachedPlugin_mmuBus_rsp_exception = 1'b0; + assign DBusCachedPlugin_mmuBus_rsp_refilling = 1'b0; + assign DBusCachedPlugin_mmuBus_busy = 1'b0; + assign _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_3 = ((decode_INSTRUCTION & 32'h00004050) == 32'h00004050); + assign _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_4 = ((decode_INSTRUCTION & 32'h00000004) == 32'h00000004); + assign _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_5 = ((decode_INSTRUCTION & 32'h00000048) == 32'h00000048); + assign _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_6 = ((decode_INSTRUCTION & 32'h0000000c) == 32'h00000008); + assign _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_7 = ((decode_INSTRUCTION & 32'h00001000) == 32'h0); + assign _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2 = {1'b0,{(_zz_decode_CfuPlugin_CFU_INPUT_2_KIND_6 != 1'b0),{(_zz_decode_CfuPlugin_CFU_INPUT_2_KIND_7 != 1'b0),{(_zz_decode_CfuPlugin_CFU_INPUT_2_KIND_7 != 1'b0),{(_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2 != _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_1),{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_2,{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_4,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_7}}}}}}}; + assign _zz_decode_SRC1_CTRL_2 = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[2 : 1]; + assign _zz_decode_SRC1_CTRL_1 = _zz_decode_SRC1_CTRL_2; + assign _zz_decode_ALU_CTRL_2 = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[7 : 6]; + assign _zz_decode_ALU_CTRL_1 = _zz_decode_ALU_CTRL_2; + assign _zz_decode_SRC2_CTRL_2 = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[9 : 8]; + assign _zz_decode_SRC2_CTRL_1 = _zz_decode_SRC2_CTRL_2; + assign _zz_decode_ALU_BITWISE_CTRL_2 = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[19 : 18]; + assign _zz_decode_ALU_BITWISE_CTRL_1 = _zz_decode_ALU_BITWISE_CTRL_2; + assign _zz_decode_SHIFT_CTRL_2 = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[22 : 21]; + assign _zz_decode_SHIFT_CTRL_1 = _zz_decode_SHIFT_CTRL_2; + assign _zz_decode_BRANCH_CTRL_2 = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[24 : 23]; + assign _zz_decode_BRANCH_CTRL = _zz_decode_BRANCH_CTRL_2; + assign _zz_decode_ENV_CTRL_2 = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[27 : 26]; + assign _zz_decode_ENV_CTRL_1 = _zz_decode_ENV_CTRL_2; + assign _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_8 = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[33 : 33]; + assign _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_1 = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_8; + assign decodeExceptionPort_valid = (decode_arbitration_isValid && (! decode_LEGAL_INSTRUCTION)); + assign decodeExceptionPort_payload_code = 4'b0010; + assign decodeExceptionPort_payload_badAddr = decode_INSTRUCTION; + assign when_RegFilePlugin_l63 = (decode_INSTRUCTION[11 : 7] == 5'h0); + assign decode_RegFilePlugin_regFileReadAddress1 = decode_INSTRUCTION_ANTICIPATED[19 : 15]; + assign decode_RegFilePlugin_regFileReadAddress2 = decode_INSTRUCTION_ANTICIPATED[24 : 20]; + assign decode_RegFilePlugin_rs1Data = _zz_RegFilePlugin_regFile_port0; + assign decode_RegFilePlugin_rs2Data = _zz_RegFilePlugin_regFile_port1; + always @(*) begin + lastStageRegFileWrite_valid = (_zz_lastStageRegFileWrite_valid && writeBack_arbitration_isFiring); + if(_zz_7) begin + lastStageRegFileWrite_valid = 1'b1; + end + end + + always @(*) begin + lastStageRegFileWrite_payload_address = _zz_lastStageRegFileWrite_payload_address[11 : 7]; + if(_zz_7) begin + lastStageRegFileWrite_payload_address = 5'h0; + end + end + + always @(*) begin + lastStageRegFileWrite_payload_data = _zz_decode_RS2_2; + if(_zz_7) begin + lastStageRegFileWrite_payload_data = 32'h0; + end + end + + always @(*) begin + case(execute_ALU_BITWISE_CTRL) + `AluBitwiseCtrlEnum_binary_sequential_AND_1 : begin + execute_IntAluPlugin_bitwise = (execute_SRC1 & execute_SRC2); + end + `AluBitwiseCtrlEnum_binary_sequential_OR_1 : begin + execute_IntAluPlugin_bitwise = (execute_SRC1 | execute_SRC2); + end + default : begin + execute_IntAluPlugin_bitwise = (execute_SRC1 ^ execute_SRC2); + end + endcase + end + + always @(*) begin + case(execute_ALU_CTRL) + `AluCtrlEnum_binary_sequential_BITWISE : begin + _zz_execute_REGFILE_WRITE_DATA = execute_IntAluPlugin_bitwise; + end + `AluCtrlEnum_binary_sequential_SLT_SLTU : begin + _zz_execute_REGFILE_WRITE_DATA = {31'd0, _zz__zz_execute_REGFILE_WRITE_DATA}; + end + default : begin + _zz_execute_REGFILE_WRITE_DATA = execute_SRC_ADD_SUB; + end + endcase + end + + always @(*) begin + case(execute_SRC1_CTRL) + `Src1CtrlEnum_binary_sequential_RS : begin + _zz_execute_SRC1 = execute_RS1; + end + `Src1CtrlEnum_binary_sequential_PC_INCREMENT : begin + _zz_execute_SRC1 = {29'd0, _zz__zz_execute_SRC1}; + end + `Src1CtrlEnum_binary_sequential_IMU : begin + _zz_execute_SRC1 = {execute_INSTRUCTION[31 : 12],12'h0}; + end + default : begin + _zz_execute_SRC1 = {27'd0, _zz__zz_execute_SRC1_1}; + end + endcase + end + + assign _zz_execute_SRC2_1 = execute_INSTRUCTION[31]; + always @(*) begin + _zz_execute_SRC2_2[19] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[18] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[17] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[16] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[15] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[14] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[13] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[12] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[11] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[10] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[9] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[8] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[7] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[6] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[5] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[4] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[3] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[2] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[1] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[0] = _zz_execute_SRC2_1; + end + + assign _zz_execute_SRC2_3 = _zz__zz_execute_SRC2_3[11]; + always @(*) begin + _zz_execute_SRC2_4[19] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[18] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[17] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[16] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[15] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[14] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[13] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[12] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[11] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[10] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[9] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[8] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[7] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[6] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[5] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[4] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[3] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[2] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[1] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[0] = _zz_execute_SRC2_3; + end + + always @(*) begin + case(execute_SRC2_CTRL) + `Src2CtrlEnum_binary_sequential_RS : begin + _zz_execute_SRC2_5 = execute_RS2; + end + `Src2CtrlEnum_binary_sequential_IMI : begin + _zz_execute_SRC2_5 = {_zz_execute_SRC2_2,execute_INSTRUCTION[31 : 20]}; + end + `Src2CtrlEnum_binary_sequential_IMS : begin + _zz_execute_SRC2_5 = {_zz_execute_SRC2_4,{execute_INSTRUCTION[31 : 25],execute_INSTRUCTION[11 : 7]}}; + end + default : begin + _zz_execute_SRC2_5 = _zz_execute_SRC2; + end + endcase + end + + always @(*) begin + execute_SrcPlugin_addSub = _zz_execute_SrcPlugin_addSub; + if(execute_SRC2_FORCE_ZERO) begin + execute_SrcPlugin_addSub = execute_SRC1; + end + end + + assign execute_SrcPlugin_less = ((execute_SRC1[31] == execute_SRC2[31]) ? execute_SrcPlugin_addSub[31] : (execute_SRC_LESS_UNSIGNED ? execute_SRC2[31] : execute_SRC1[31])); + assign execute_FullBarrelShifterPlugin_amplitude = execute_SRC2[4 : 0]; + always @(*) begin + _zz_execute_FullBarrelShifterPlugin_reversed[0] = execute_SRC1[31]; + _zz_execute_FullBarrelShifterPlugin_reversed[1] = execute_SRC1[30]; + _zz_execute_FullBarrelShifterPlugin_reversed[2] = execute_SRC1[29]; + _zz_execute_FullBarrelShifterPlugin_reversed[3] = execute_SRC1[28]; + _zz_execute_FullBarrelShifterPlugin_reversed[4] = execute_SRC1[27]; + _zz_execute_FullBarrelShifterPlugin_reversed[5] = execute_SRC1[26]; + _zz_execute_FullBarrelShifterPlugin_reversed[6] = execute_SRC1[25]; + _zz_execute_FullBarrelShifterPlugin_reversed[7] = execute_SRC1[24]; + _zz_execute_FullBarrelShifterPlugin_reversed[8] = execute_SRC1[23]; + _zz_execute_FullBarrelShifterPlugin_reversed[9] = execute_SRC1[22]; + _zz_execute_FullBarrelShifterPlugin_reversed[10] = execute_SRC1[21]; + _zz_execute_FullBarrelShifterPlugin_reversed[11] = execute_SRC1[20]; + _zz_execute_FullBarrelShifterPlugin_reversed[12] = execute_SRC1[19]; + _zz_execute_FullBarrelShifterPlugin_reversed[13] = execute_SRC1[18]; + _zz_execute_FullBarrelShifterPlugin_reversed[14] = execute_SRC1[17]; + _zz_execute_FullBarrelShifterPlugin_reversed[15] = execute_SRC1[16]; + _zz_execute_FullBarrelShifterPlugin_reversed[16] = execute_SRC1[15]; + _zz_execute_FullBarrelShifterPlugin_reversed[17] = execute_SRC1[14]; + _zz_execute_FullBarrelShifterPlugin_reversed[18] = execute_SRC1[13]; + _zz_execute_FullBarrelShifterPlugin_reversed[19] = execute_SRC1[12]; + _zz_execute_FullBarrelShifterPlugin_reversed[20] = execute_SRC1[11]; + _zz_execute_FullBarrelShifterPlugin_reversed[21] = execute_SRC1[10]; + _zz_execute_FullBarrelShifterPlugin_reversed[22] = execute_SRC1[9]; + _zz_execute_FullBarrelShifterPlugin_reversed[23] = execute_SRC1[8]; + _zz_execute_FullBarrelShifterPlugin_reversed[24] = execute_SRC1[7]; + _zz_execute_FullBarrelShifterPlugin_reversed[25] = execute_SRC1[6]; + _zz_execute_FullBarrelShifterPlugin_reversed[26] = execute_SRC1[5]; + _zz_execute_FullBarrelShifterPlugin_reversed[27] = execute_SRC1[4]; + _zz_execute_FullBarrelShifterPlugin_reversed[28] = execute_SRC1[3]; + _zz_execute_FullBarrelShifterPlugin_reversed[29] = execute_SRC1[2]; + _zz_execute_FullBarrelShifterPlugin_reversed[30] = execute_SRC1[1]; + _zz_execute_FullBarrelShifterPlugin_reversed[31] = execute_SRC1[0]; + end + + assign execute_FullBarrelShifterPlugin_reversed = ((execute_SHIFT_CTRL == `ShiftCtrlEnum_binary_sequential_SLL_1) ? _zz_execute_FullBarrelShifterPlugin_reversed : execute_SRC1); + always @(*) begin + _zz_decode_RS2_3[0] = memory_SHIFT_RIGHT[31]; + _zz_decode_RS2_3[1] = memory_SHIFT_RIGHT[30]; + _zz_decode_RS2_3[2] = memory_SHIFT_RIGHT[29]; + _zz_decode_RS2_3[3] = memory_SHIFT_RIGHT[28]; + _zz_decode_RS2_3[4] = memory_SHIFT_RIGHT[27]; + _zz_decode_RS2_3[5] = memory_SHIFT_RIGHT[26]; + _zz_decode_RS2_3[6] = memory_SHIFT_RIGHT[25]; + _zz_decode_RS2_3[7] = memory_SHIFT_RIGHT[24]; + _zz_decode_RS2_3[8] = memory_SHIFT_RIGHT[23]; + _zz_decode_RS2_3[9] = memory_SHIFT_RIGHT[22]; + _zz_decode_RS2_3[10] = memory_SHIFT_RIGHT[21]; + _zz_decode_RS2_3[11] = memory_SHIFT_RIGHT[20]; + _zz_decode_RS2_3[12] = memory_SHIFT_RIGHT[19]; + _zz_decode_RS2_3[13] = memory_SHIFT_RIGHT[18]; + _zz_decode_RS2_3[14] = memory_SHIFT_RIGHT[17]; + _zz_decode_RS2_3[15] = memory_SHIFT_RIGHT[16]; + _zz_decode_RS2_3[16] = memory_SHIFT_RIGHT[15]; + _zz_decode_RS2_3[17] = memory_SHIFT_RIGHT[14]; + _zz_decode_RS2_3[18] = memory_SHIFT_RIGHT[13]; + _zz_decode_RS2_3[19] = memory_SHIFT_RIGHT[12]; + _zz_decode_RS2_3[20] = memory_SHIFT_RIGHT[11]; + _zz_decode_RS2_3[21] = memory_SHIFT_RIGHT[10]; + _zz_decode_RS2_3[22] = memory_SHIFT_RIGHT[9]; + _zz_decode_RS2_3[23] = memory_SHIFT_RIGHT[8]; + _zz_decode_RS2_3[24] = memory_SHIFT_RIGHT[7]; + _zz_decode_RS2_3[25] = memory_SHIFT_RIGHT[6]; + _zz_decode_RS2_3[26] = memory_SHIFT_RIGHT[5]; + _zz_decode_RS2_3[27] = memory_SHIFT_RIGHT[4]; + _zz_decode_RS2_3[28] = memory_SHIFT_RIGHT[3]; + _zz_decode_RS2_3[29] = memory_SHIFT_RIGHT[2]; + _zz_decode_RS2_3[30] = memory_SHIFT_RIGHT[1]; + _zz_decode_RS2_3[31] = memory_SHIFT_RIGHT[0]; + end + + always @(*) begin + HazardSimplePlugin_src0Hazard = 1'b0; + if(when_HazardSimplePlugin_l57) begin + if(when_HazardSimplePlugin_l58) begin + if(when_HazardSimplePlugin_l48) begin + HazardSimplePlugin_src0Hazard = 1'b1; + end + end + end + if(when_HazardSimplePlugin_l57_1) begin + if(when_HazardSimplePlugin_l58_1) begin + if(when_HazardSimplePlugin_l48_1) begin + HazardSimplePlugin_src0Hazard = 1'b1; + end + end + end + if(when_HazardSimplePlugin_l57_2) begin + if(when_HazardSimplePlugin_l58_2) begin + if(when_HazardSimplePlugin_l48_2) begin + HazardSimplePlugin_src0Hazard = 1'b1; + end + end + end + if(when_HazardSimplePlugin_l105) begin + HazardSimplePlugin_src0Hazard = 1'b0; + end + end + + always @(*) begin + HazardSimplePlugin_src1Hazard = 1'b0; + if(when_HazardSimplePlugin_l57) begin + if(when_HazardSimplePlugin_l58) begin + if(when_HazardSimplePlugin_l51) begin + HazardSimplePlugin_src1Hazard = 1'b1; + end + end + end + if(when_HazardSimplePlugin_l57_1) begin + if(when_HazardSimplePlugin_l58_1) begin + if(when_HazardSimplePlugin_l51_1) begin + HazardSimplePlugin_src1Hazard = 1'b1; + end + end + end + if(when_HazardSimplePlugin_l57_2) begin + if(when_HazardSimplePlugin_l58_2) begin + if(when_HazardSimplePlugin_l51_2) begin + HazardSimplePlugin_src1Hazard = 1'b1; + end + end + end + if(when_HazardSimplePlugin_l108) begin + HazardSimplePlugin_src1Hazard = 1'b0; + end + end + + assign HazardSimplePlugin_writeBackWrites_valid = (_zz_lastStageRegFileWrite_valid && writeBack_arbitration_isFiring); + assign HazardSimplePlugin_writeBackWrites_payload_address = _zz_lastStageRegFileWrite_payload_address[11 : 7]; + assign HazardSimplePlugin_writeBackWrites_payload_data = _zz_decode_RS2_2; + assign HazardSimplePlugin_addr0Match = (HazardSimplePlugin_writeBackBuffer_payload_address == decode_INSTRUCTION[19 : 15]); + assign HazardSimplePlugin_addr1Match = (HazardSimplePlugin_writeBackBuffer_payload_address == decode_INSTRUCTION[24 : 20]); + assign when_HazardSimplePlugin_l47 = 1'b1; + assign when_HazardSimplePlugin_l48 = (writeBack_INSTRUCTION[11 : 7] == decode_INSTRUCTION[19 : 15]); + assign when_HazardSimplePlugin_l51 = (writeBack_INSTRUCTION[11 : 7] == decode_INSTRUCTION[24 : 20]); + assign when_HazardSimplePlugin_l45 = (writeBack_arbitration_isValid && writeBack_REGFILE_WRITE_VALID); + assign when_HazardSimplePlugin_l57 = (writeBack_arbitration_isValid && writeBack_REGFILE_WRITE_VALID); + assign when_HazardSimplePlugin_l58 = (1'b0 || (! when_HazardSimplePlugin_l47)); + assign when_HazardSimplePlugin_l48_1 = (memory_INSTRUCTION[11 : 7] == decode_INSTRUCTION[19 : 15]); + assign when_HazardSimplePlugin_l51_1 = (memory_INSTRUCTION[11 : 7] == decode_INSTRUCTION[24 : 20]); + assign when_HazardSimplePlugin_l45_1 = (memory_arbitration_isValid && memory_REGFILE_WRITE_VALID); + assign when_HazardSimplePlugin_l57_1 = (memory_arbitration_isValid && memory_REGFILE_WRITE_VALID); + assign when_HazardSimplePlugin_l58_1 = (1'b0 || (! memory_BYPASSABLE_MEMORY_STAGE)); + assign when_HazardSimplePlugin_l48_2 = (execute_INSTRUCTION[11 : 7] == decode_INSTRUCTION[19 : 15]); + assign when_HazardSimplePlugin_l51_2 = (execute_INSTRUCTION[11 : 7] == decode_INSTRUCTION[24 : 20]); + assign when_HazardSimplePlugin_l45_2 = (execute_arbitration_isValid && execute_REGFILE_WRITE_VALID); + assign when_HazardSimplePlugin_l57_2 = (execute_arbitration_isValid && execute_REGFILE_WRITE_VALID); + assign when_HazardSimplePlugin_l58_2 = (1'b0 || (! execute_BYPASSABLE_EXECUTE_STAGE)); + assign when_HazardSimplePlugin_l105 = (! decode_RS1_USE); + assign when_HazardSimplePlugin_l108 = (! decode_RS2_USE); + assign when_HazardSimplePlugin_l113 = (decode_arbitration_isValid && (HazardSimplePlugin_src0Hazard || HazardSimplePlugin_src1Hazard)); + assign execute_BranchPlugin_eq = (execute_SRC1 == execute_SRC2); + assign switch_Misc_l200_1 = execute_INSTRUCTION[14 : 12]; + always @(*) begin + casez(switch_Misc_l200_1) + 3'b000 : begin + _zz_execute_BRANCH_COND_RESULT = execute_BranchPlugin_eq; + end + 3'b001 : begin + _zz_execute_BRANCH_COND_RESULT = (! execute_BranchPlugin_eq); + end + 3'b1?1 : begin + _zz_execute_BRANCH_COND_RESULT = (! execute_SRC_LESS); + end + default : begin + _zz_execute_BRANCH_COND_RESULT = execute_SRC_LESS; + end + endcase + end + + always @(*) begin + case(execute_BRANCH_CTRL) + `BranchCtrlEnum_binary_sequential_INC : begin + _zz_execute_BRANCH_COND_RESULT_1 = 1'b0; + end + `BranchCtrlEnum_binary_sequential_JAL : begin + _zz_execute_BRANCH_COND_RESULT_1 = 1'b1; + end + `BranchCtrlEnum_binary_sequential_JALR : begin + _zz_execute_BRANCH_COND_RESULT_1 = 1'b1; + end + default : begin + _zz_execute_BRANCH_COND_RESULT_1 = _zz_execute_BRANCH_COND_RESULT; + end + endcase + end + + assign _zz_execute_BranchPlugin_missAlignedTarget = execute_INSTRUCTION[31]; + always @(*) begin + _zz_execute_BranchPlugin_missAlignedTarget_1[19] = _zz_execute_BranchPlugin_missAlignedTarget; + _zz_execute_BranchPlugin_missAlignedTarget_1[18] = _zz_execute_BranchPlugin_missAlignedTarget; + _zz_execute_BranchPlugin_missAlignedTarget_1[17] = _zz_execute_BranchPlugin_missAlignedTarget; + _zz_execute_BranchPlugin_missAlignedTarget_1[16] = _zz_execute_BranchPlugin_missAlignedTarget; + _zz_execute_BranchPlugin_missAlignedTarget_1[15] = _zz_execute_BranchPlugin_missAlignedTarget; + _zz_execute_BranchPlugin_missAlignedTarget_1[14] = _zz_execute_BranchPlugin_missAlignedTarget; + _zz_execute_BranchPlugin_missAlignedTarget_1[13] = _zz_execute_BranchPlugin_missAlignedTarget; + _zz_execute_BranchPlugin_missAlignedTarget_1[12] = _zz_execute_BranchPlugin_missAlignedTarget; + _zz_execute_BranchPlugin_missAlignedTarget_1[11] = _zz_execute_BranchPlugin_missAlignedTarget; + _zz_execute_BranchPlugin_missAlignedTarget_1[10] = _zz_execute_BranchPlugin_missAlignedTarget; + _zz_execute_BranchPlugin_missAlignedTarget_1[9] = _zz_execute_BranchPlugin_missAlignedTarget; + _zz_execute_BranchPlugin_missAlignedTarget_1[8] = _zz_execute_BranchPlugin_missAlignedTarget; + _zz_execute_BranchPlugin_missAlignedTarget_1[7] = _zz_execute_BranchPlugin_missAlignedTarget; + _zz_execute_BranchPlugin_missAlignedTarget_1[6] = _zz_execute_BranchPlugin_missAlignedTarget; + _zz_execute_BranchPlugin_missAlignedTarget_1[5] = _zz_execute_BranchPlugin_missAlignedTarget; + _zz_execute_BranchPlugin_missAlignedTarget_1[4] = _zz_execute_BranchPlugin_missAlignedTarget; + _zz_execute_BranchPlugin_missAlignedTarget_1[3] = _zz_execute_BranchPlugin_missAlignedTarget; + _zz_execute_BranchPlugin_missAlignedTarget_1[2] = _zz_execute_BranchPlugin_missAlignedTarget; + _zz_execute_BranchPlugin_missAlignedTarget_1[1] = _zz_execute_BranchPlugin_missAlignedTarget; + _zz_execute_BranchPlugin_missAlignedTarget_1[0] = _zz_execute_BranchPlugin_missAlignedTarget; + end + + assign _zz_execute_BranchPlugin_missAlignedTarget_2 = _zz__zz_execute_BranchPlugin_missAlignedTarget_2[19]; + always @(*) begin + _zz_execute_BranchPlugin_missAlignedTarget_3[10] = _zz_execute_BranchPlugin_missAlignedTarget_2; + _zz_execute_BranchPlugin_missAlignedTarget_3[9] = _zz_execute_BranchPlugin_missAlignedTarget_2; + _zz_execute_BranchPlugin_missAlignedTarget_3[8] = _zz_execute_BranchPlugin_missAlignedTarget_2; + _zz_execute_BranchPlugin_missAlignedTarget_3[7] = _zz_execute_BranchPlugin_missAlignedTarget_2; + _zz_execute_BranchPlugin_missAlignedTarget_3[6] = _zz_execute_BranchPlugin_missAlignedTarget_2; + _zz_execute_BranchPlugin_missAlignedTarget_3[5] = _zz_execute_BranchPlugin_missAlignedTarget_2; + _zz_execute_BranchPlugin_missAlignedTarget_3[4] = _zz_execute_BranchPlugin_missAlignedTarget_2; + _zz_execute_BranchPlugin_missAlignedTarget_3[3] = _zz_execute_BranchPlugin_missAlignedTarget_2; + _zz_execute_BranchPlugin_missAlignedTarget_3[2] = _zz_execute_BranchPlugin_missAlignedTarget_2; + _zz_execute_BranchPlugin_missAlignedTarget_3[1] = _zz_execute_BranchPlugin_missAlignedTarget_2; + _zz_execute_BranchPlugin_missAlignedTarget_3[0] = _zz_execute_BranchPlugin_missAlignedTarget_2; + end + + assign _zz_execute_BranchPlugin_missAlignedTarget_4 = _zz__zz_execute_BranchPlugin_missAlignedTarget_4[11]; + always @(*) begin + _zz_execute_BranchPlugin_missAlignedTarget_5[18] = _zz_execute_BranchPlugin_missAlignedTarget_4; + _zz_execute_BranchPlugin_missAlignedTarget_5[17] = _zz_execute_BranchPlugin_missAlignedTarget_4; + _zz_execute_BranchPlugin_missAlignedTarget_5[16] = _zz_execute_BranchPlugin_missAlignedTarget_4; + _zz_execute_BranchPlugin_missAlignedTarget_5[15] = _zz_execute_BranchPlugin_missAlignedTarget_4; + _zz_execute_BranchPlugin_missAlignedTarget_5[14] = _zz_execute_BranchPlugin_missAlignedTarget_4; + _zz_execute_BranchPlugin_missAlignedTarget_5[13] = _zz_execute_BranchPlugin_missAlignedTarget_4; + _zz_execute_BranchPlugin_missAlignedTarget_5[12] = _zz_execute_BranchPlugin_missAlignedTarget_4; + _zz_execute_BranchPlugin_missAlignedTarget_5[11] = _zz_execute_BranchPlugin_missAlignedTarget_4; + _zz_execute_BranchPlugin_missAlignedTarget_5[10] = _zz_execute_BranchPlugin_missAlignedTarget_4; + _zz_execute_BranchPlugin_missAlignedTarget_5[9] = _zz_execute_BranchPlugin_missAlignedTarget_4; + _zz_execute_BranchPlugin_missAlignedTarget_5[8] = _zz_execute_BranchPlugin_missAlignedTarget_4; + _zz_execute_BranchPlugin_missAlignedTarget_5[7] = _zz_execute_BranchPlugin_missAlignedTarget_4; + _zz_execute_BranchPlugin_missAlignedTarget_5[6] = _zz_execute_BranchPlugin_missAlignedTarget_4; + _zz_execute_BranchPlugin_missAlignedTarget_5[5] = _zz_execute_BranchPlugin_missAlignedTarget_4; + _zz_execute_BranchPlugin_missAlignedTarget_5[4] = _zz_execute_BranchPlugin_missAlignedTarget_4; + _zz_execute_BranchPlugin_missAlignedTarget_5[3] = _zz_execute_BranchPlugin_missAlignedTarget_4; + _zz_execute_BranchPlugin_missAlignedTarget_5[2] = _zz_execute_BranchPlugin_missAlignedTarget_4; + _zz_execute_BranchPlugin_missAlignedTarget_5[1] = _zz_execute_BranchPlugin_missAlignedTarget_4; + _zz_execute_BranchPlugin_missAlignedTarget_5[0] = _zz_execute_BranchPlugin_missAlignedTarget_4; + end + + always @(*) begin + case(execute_BRANCH_CTRL) + `BranchCtrlEnum_binary_sequential_JALR : begin + _zz_execute_BranchPlugin_missAlignedTarget_6 = (_zz__zz_execute_BranchPlugin_missAlignedTarget_6[1] ^ execute_RS1[1]); + end + `BranchCtrlEnum_binary_sequential_JAL : begin + _zz_execute_BranchPlugin_missAlignedTarget_6 = _zz__zz_execute_BranchPlugin_missAlignedTarget_6_1[1]; + end + default : begin + _zz_execute_BranchPlugin_missAlignedTarget_6 = _zz__zz_execute_BranchPlugin_missAlignedTarget_6_2[1]; + end + endcase + end + + assign execute_BranchPlugin_missAlignedTarget = (execute_BRANCH_COND_RESULT && _zz_execute_BranchPlugin_missAlignedTarget_6); + always @(*) begin + case(execute_BRANCH_CTRL) + `BranchCtrlEnum_binary_sequential_JALR : begin + execute_BranchPlugin_branch_src1 = execute_RS1; + end + default : begin + execute_BranchPlugin_branch_src1 = execute_PC; + end + endcase + end + + assign _zz_execute_BranchPlugin_branch_src2 = execute_INSTRUCTION[31]; + always @(*) begin + _zz_execute_BranchPlugin_branch_src2_1[19] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[18] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[17] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[16] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[15] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[14] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[13] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[12] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[11] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[10] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[9] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[8] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[7] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[6] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[5] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[4] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[3] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[2] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[1] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[0] = _zz_execute_BranchPlugin_branch_src2; + end + + always @(*) begin + case(execute_BRANCH_CTRL) + `BranchCtrlEnum_binary_sequential_JALR : begin + execute_BranchPlugin_branch_src2 = {_zz_execute_BranchPlugin_branch_src2_1,execute_INSTRUCTION[31 : 20]}; + end + default : begin + execute_BranchPlugin_branch_src2 = ((execute_BRANCH_CTRL == `BranchCtrlEnum_binary_sequential_JAL) ? {{_zz_execute_BranchPlugin_branch_src2_3,{{{_zz_execute_BranchPlugin_branch_src2_6,execute_INSTRUCTION[19 : 12]},execute_INSTRUCTION[20]},execute_INSTRUCTION[30 : 21]}},1'b0} : {{_zz_execute_BranchPlugin_branch_src2_5,{{{_zz_execute_BranchPlugin_branch_src2_7,_zz_execute_BranchPlugin_branch_src2_8},execute_INSTRUCTION[30 : 25]},execute_INSTRUCTION[11 : 8]}},1'b0}); + if(execute_PREDICTION_HAD_BRANCHED2) begin + execute_BranchPlugin_branch_src2 = {29'd0, _zz_execute_BranchPlugin_branch_src2_9}; + end + end + endcase + end + + assign _zz_execute_BranchPlugin_branch_src2_2 = _zz__zz_execute_BranchPlugin_branch_src2_2[19]; + always @(*) begin + _zz_execute_BranchPlugin_branch_src2_3[10] = _zz_execute_BranchPlugin_branch_src2_2; + _zz_execute_BranchPlugin_branch_src2_3[9] = _zz_execute_BranchPlugin_branch_src2_2; + _zz_execute_BranchPlugin_branch_src2_3[8] = _zz_execute_BranchPlugin_branch_src2_2; + _zz_execute_BranchPlugin_branch_src2_3[7] = _zz_execute_BranchPlugin_branch_src2_2; + _zz_execute_BranchPlugin_branch_src2_3[6] = _zz_execute_BranchPlugin_branch_src2_2; + _zz_execute_BranchPlugin_branch_src2_3[5] = _zz_execute_BranchPlugin_branch_src2_2; + _zz_execute_BranchPlugin_branch_src2_3[4] = _zz_execute_BranchPlugin_branch_src2_2; + _zz_execute_BranchPlugin_branch_src2_3[3] = _zz_execute_BranchPlugin_branch_src2_2; + _zz_execute_BranchPlugin_branch_src2_3[2] = _zz_execute_BranchPlugin_branch_src2_2; + _zz_execute_BranchPlugin_branch_src2_3[1] = _zz_execute_BranchPlugin_branch_src2_2; + _zz_execute_BranchPlugin_branch_src2_3[0] = _zz_execute_BranchPlugin_branch_src2_2; + end + + assign _zz_execute_BranchPlugin_branch_src2_4 = _zz__zz_execute_BranchPlugin_branch_src2_4[11]; + always @(*) begin + _zz_execute_BranchPlugin_branch_src2_5[18] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[17] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[16] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[15] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[14] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[13] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[12] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[11] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[10] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[9] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[8] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[7] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[6] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[5] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[4] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[3] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[2] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[1] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[0] = _zz_execute_BranchPlugin_branch_src2_4; + end + + assign execute_BranchPlugin_branchAdder = (execute_BranchPlugin_branch_src1 + execute_BranchPlugin_branch_src2); + assign BranchPlugin_jumpInterface_valid = ((execute_arbitration_isValid && execute_BRANCH_DO) && (! 1'b0)); + assign BranchPlugin_jumpInterface_payload = execute_BRANCH_CALC; + always @(*) begin + BranchPlugin_branchExceptionPort_valid = (execute_arbitration_isValid && (execute_BRANCH_DO && execute_BRANCH_CALC[1])); + if(when_BranchPlugin_l296) begin + BranchPlugin_branchExceptionPort_valid = 1'b0; + end + end + + assign BranchPlugin_branchExceptionPort_payload_code = 4'b0000; + assign BranchPlugin_branchExceptionPort_payload_badAddr = execute_BRANCH_CALC; + assign when_BranchPlugin_l296 = 1'b0; + assign IBusCachedPlugin_decodePrediction_rsp_wasWrong = BranchPlugin_jumpInterface_valid; + always @(*) begin + CsrPlugin_privilege = 2'b11; + if(CsrPlugin_forceMachineWire) begin + CsrPlugin_privilege = 2'b11; + end + end + + assign _zz_when_CsrPlugin_l952 = (CsrPlugin_mip_MTIP && CsrPlugin_mie_MTIE); + assign _zz_when_CsrPlugin_l952_1 = (CsrPlugin_mip_MSIP && CsrPlugin_mie_MSIE); + assign _zz_when_CsrPlugin_l952_2 = (CsrPlugin_mip_MEIP && CsrPlugin_mie_MEIE); + assign CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilegeUncapped = 2'b11; + assign CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilege = ((CsrPlugin_privilege < CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilegeUncapped) ? CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilegeUncapped : CsrPlugin_privilege); + assign _zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code = {decodeExceptionPort_valid,IBusCachedPlugin_decodeExceptionPort_valid}; + assign _zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_1 = _zz__zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_1[0]; + assign _zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_2 = {CsrPlugin_selfException_valid,BranchPlugin_branchExceptionPort_valid}; + assign _zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_3 = _zz__zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_3[0]; + always @(*) begin + CsrPlugin_exceptionPortCtrl_exceptionValids_decode = CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_decode; + if(_zz_when) begin + CsrPlugin_exceptionPortCtrl_exceptionValids_decode = 1'b1; + end + if(decode_arbitration_isFlushed) begin + CsrPlugin_exceptionPortCtrl_exceptionValids_decode = 1'b0; + end + end + + always @(*) begin + CsrPlugin_exceptionPortCtrl_exceptionValids_execute = CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_execute; + if(_zz_when_1) begin + CsrPlugin_exceptionPortCtrl_exceptionValids_execute = 1'b1; + end + if(execute_arbitration_isFlushed) begin + CsrPlugin_exceptionPortCtrl_exceptionValids_execute = 1'b0; + end + end + + always @(*) begin + CsrPlugin_exceptionPortCtrl_exceptionValids_memory = CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_memory; + if(memory_arbitration_isFlushed) begin + CsrPlugin_exceptionPortCtrl_exceptionValids_memory = 1'b0; + end + end + + always @(*) begin + CsrPlugin_exceptionPortCtrl_exceptionValids_writeBack = CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_writeBack; + if(DBusCachedPlugin_exceptionBus_valid) begin + CsrPlugin_exceptionPortCtrl_exceptionValids_writeBack = 1'b1; + end + if(writeBack_arbitration_isFlushed) begin + CsrPlugin_exceptionPortCtrl_exceptionValids_writeBack = 1'b0; + end + end + + assign when_CsrPlugin_l909 = (! decode_arbitration_isStuck); + assign when_CsrPlugin_l909_1 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l909_2 = (! memory_arbitration_isStuck); + assign when_CsrPlugin_l909_3 = (! writeBack_arbitration_isStuck); + assign when_CsrPlugin_l922 = ({CsrPlugin_exceptionPortCtrl_exceptionValids_writeBack,{CsrPlugin_exceptionPortCtrl_exceptionValids_memory,{CsrPlugin_exceptionPortCtrl_exceptionValids_execute,CsrPlugin_exceptionPortCtrl_exceptionValids_decode}}} != 4'b0000); + assign CsrPlugin_exceptionPendings_0 = CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_decode; + assign CsrPlugin_exceptionPendings_1 = CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_execute; + assign CsrPlugin_exceptionPendings_2 = CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_memory; + assign CsrPlugin_exceptionPendings_3 = CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_writeBack; + assign when_CsrPlugin_l946 = (CsrPlugin_mstatus_MIE || (CsrPlugin_privilege < 2'b11)); + assign when_CsrPlugin_l952 = ((_zz_when_CsrPlugin_l952 && 1'b1) && (! 1'b0)); + assign when_CsrPlugin_l952_1 = ((_zz_when_CsrPlugin_l952_1 && 1'b1) && (! 1'b0)); + assign when_CsrPlugin_l952_2 = ((_zz_when_CsrPlugin_l952_2 && 1'b1) && (! 1'b0)); + assign CsrPlugin_exception = (CsrPlugin_exceptionPortCtrl_exceptionValids_writeBack && CsrPlugin_allowException); + assign CsrPlugin_pipelineLiberator_active = ((CsrPlugin_interrupt_valid && CsrPlugin_allowInterrupts) && decode_arbitration_isValid); + assign when_CsrPlugin_l980 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l980_1 = (! memory_arbitration_isStuck); + assign when_CsrPlugin_l980_2 = (! writeBack_arbitration_isStuck); + assign when_CsrPlugin_l985 = ((! CsrPlugin_pipelineLiberator_active) || decode_arbitration_removeIt); + always @(*) begin + CsrPlugin_pipelineLiberator_done = CsrPlugin_pipelineLiberator_pcValids_2; + if(when_CsrPlugin_l991) begin + CsrPlugin_pipelineLiberator_done = 1'b0; + end + if(CsrPlugin_hadException) begin + CsrPlugin_pipelineLiberator_done = 1'b0; + end + end + + assign when_CsrPlugin_l991 = ({CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_writeBack,{CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_memory,CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_execute}} != 3'b000); + assign CsrPlugin_interruptJump = ((CsrPlugin_interrupt_valid && CsrPlugin_pipelineLiberator_done) && CsrPlugin_allowInterrupts); + always @(*) begin + CsrPlugin_targetPrivilege = CsrPlugin_interrupt_targetPrivilege; + if(CsrPlugin_hadException) begin + CsrPlugin_targetPrivilege = CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilege; + end + end + + always @(*) begin + CsrPlugin_trapCause = CsrPlugin_interrupt_code; + if(CsrPlugin_hadException) begin + CsrPlugin_trapCause = CsrPlugin_exceptionPortCtrl_exceptionContext_code; + end + end + + always @(*) begin + CsrPlugin_xtvec_mode = 2'bxx; + case(CsrPlugin_targetPrivilege) + 2'b11 : begin + CsrPlugin_xtvec_mode = CsrPlugin_mtvec_mode; + end + default : begin + end + endcase + end + + always @(*) begin + CsrPlugin_xtvec_base = 30'bxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx; + case(CsrPlugin_targetPrivilege) + 2'b11 : begin + CsrPlugin_xtvec_base = CsrPlugin_mtvec_base; + end + default : begin + end + endcase + end + + assign when_CsrPlugin_l1019 = (CsrPlugin_hadException || CsrPlugin_interruptJump); + assign when_CsrPlugin_l1064 = (writeBack_arbitration_isValid && (writeBack_ENV_CTRL == `EnvCtrlEnum_binary_sequential_XRET)); + assign switch_CsrPlugin_l1068 = writeBack_INSTRUCTION[29 : 28]; + assign contextSwitching = CsrPlugin_jumpInterface_valid; + assign when_CsrPlugin_l1108 = (execute_arbitration_isValid && (execute_ENV_CTRL == `EnvCtrlEnum_binary_sequential_WFI)); + assign when_CsrPlugin_l1110 = (! execute_CsrPlugin_wfiWake); + assign when_CsrPlugin_l1116 = ({(writeBack_arbitration_isValid && (writeBack_ENV_CTRL == `EnvCtrlEnum_binary_sequential_XRET)),{(memory_arbitration_isValid && (memory_ENV_CTRL == `EnvCtrlEnum_binary_sequential_XRET)),(execute_arbitration_isValid && (execute_ENV_CTRL == `EnvCtrlEnum_binary_sequential_XRET))}} != 3'b000); + assign execute_CsrPlugin_blockedBySideEffects = (({writeBack_arbitration_isValid,memory_arbitration_isValid} != 2'b00) || 1'b0); + always @(*) begin + execute_CsrPlugin_illegalAccess = 1'b1; + if(execute_CsrPlugin_csr_3264) begin + if(execute_CSR_READ_OPCODE) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + end + if(execute_CsrPlugin_csr_3857) begin + if(execute_CSR_READ_OPCODE) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + end + if(execute_CsrPlugin_csr_3858) begin + if(execute_CSR_READ_OPCODE) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + end + if(execute_CsrPlugin_csr_3859) begin + if(execute_CSR_READ_OPCODE) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + end + if(execute_CsrPlugin_csr_3860) begin + if(execute_CSR_READ_OPCODE) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + end + if(execute_CsrPlugin_csr_769) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(execute_CsrPlugin_csr_768) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(execute_CsrPlugin_csr_836) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(execute_CsrPlugin_csr_772) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(execute_CsrPlugin_csr_773) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(execute_CsrPlugin_csr_833) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(execute_CsrPlugin_csr_832) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(execute_CsrPlugin_csr_834) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(execute_CsrPlugin_csr_835) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(execute_CsrPlugin_csr_2816) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(execute_CsrPlugin_csr_2944) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(execute_CsrPlugin_csr_2818) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(execute_CsrPlugin_csr_2946) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(execute_CsrPlugin_csr_3072) begin + if(execute_CSR_READ_OPCODE) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + end + if(execute_CsrPlugin_csr_3200) begin + if(execute_CSR_READ_OPCODE) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + end + if(execute_CsrPlugin_csr_3074) begin + if(execute_CSR_READ_OPCODE) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + end + if(execute_CsrPlugin_csr_3202) begin + if(execute_CSR_READ_OPCODE) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + end + if(execute_CsrPlugin_csr_3008) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(execute_CsrPlugin_csr_4032) begin + if(execute_CSR_READ_OPCODE) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + end + if(execute_CsrPlugin_csr_2820) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(execute_CsrPlugin_csr_2821) begin + if(execute_CSR_WRITE_OPCODE) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + end + if(execute_CsrPlugin_csr_2822) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(execute_CsrPlugin_csr_2823) begin + if(execute_CSR_WRITE_OPCODE) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + end + if(execute_CsrPlugin_csr_2824) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(execute_CsrPlugin_csr_2825) begin + if(execute_CSR_WRITE_OPCODE) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + end + if(execute_CsrPlugin_csr_2826) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(execute_CsrPlugin_csr_2827) begin + if(execute_CSR_WRITE_OPCODE) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + end + if(execute_CsrPlugin_csr_2828) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(execute_CsrPlugin_csr_2829) begin + if(execute_CSR_WRITE_OPCODE) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + end + if(execute_CsrPlugin_csr_2830) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(execute_CsrPlugin_csr_2831) begin + if(execute_CSR_WRITE_OPCODE) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + end + if(execute_CsrPlugin_csr_2832) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(execute_CsrPlugin_csr_2833) begin + if(execute_CSR_WRITE_OPCODE) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + end + if(execute_CsrPlugin_csr_2834) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(execute_CsrPlugin_csr_2835) begin + if(execute_CSR_WRITE_OPCODE) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + end + if(CsrPlugin_csrMapping_allowCsrSignal) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(when_CsrPlugin_l1297) begin + execute_CsrPlugin_illegalAccess = 1'b1; + end + if(when_CsrPlugin_l1302) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + end + + always @(*) begin + execute_CsrPlugin_illegalInstruction = 1'b0; + if(when_CsrPlugin_l1136) begin + if(when_CsrPlugin_l1137) begin + execute_CsrPlugin_illegalInstruction = 1'b1; + end + end + end + + always @(*) begin + CsrPlugin_selfException_valid = 1'b0; + if(when_CsrPlugin_l1129) begin + CsrPlugin_selfException_valid = 1'b1; + end + if(when_CsrPlugin_l1144) begin + CsrPlugin_selfException_valid = 1'b1; + end + end + + always @(*) begin + CsrPlugin_selfException_payload_code = 4'bxxxx; + if(when_CsrPlugin_l1129) begin + CsrPlugin_selfException_payload_code = 4'b0010; + end + if(when_CsrPlugin_l1144) begin + case(CsrPlugin_privilege) + 2'b00 : begin + CsrPlugin_selfException_payload_code = 4'b1000; + end + default : begin + CsrPlugin_selfException_payload_code = 4'b1011; + end + endcase + end + end + + assign CsrPlugin_selfException_payload_badAddr = execute_INSTRUCTION; + assign when_CsrPlugin_l1129 = (execute_CsrPlugin_illegalAccess || execute_CsrPlugin_illegalInstruction); + assign when_CsrPlugin_l1136 = (execute_arbitration_isValid && (execute_ENV_CTRL == `EnvCtrlEnum_binary_sequential_XRET)); + assign when_CsrPlugin_l1137 = (CsrPlugin_privilege < execute_INSTRUCTION[29 : 28]); + assign when_CsrPlugin_l1144 = (execute_arbitration_isValid && (execute_ENV_CTRL == `EnvCtrlEnum_binary_sequential_ECALL)); + always @(*) begin + execute_CsrPlugin_writeInstruction = ((execute_arbitration_isValid && execute_IS_CSR) && execute_CSR_WRITE_OPCODE); + if(when_CsrPlugin_l1297) begin + execute_CsrPlugin_writeInstruction = 1'b0; + end + end + + always @(*) begin + execute_CsrPlugin_readInstruction = ((execute_arbitration_isValid && execute_IS_CSR) && execute_CSR_READ_OPCODE); + if(when_CsrPlugin_l1297) begin + execute_CsrPlugin_readInstruction = 1'b0; + end + end + + assign execute_CsrPlugin_writeEnable = (execute_CsrPlugin_writeInstruction && (! execute_arbitration_isStuck)); + assign execute_CsrPlugin_readEnable = (execute_CsrPlugin_readInstruction && (! execute_arbitration_isStuck)); + assign CsrPlugin_csrMapping_hazardFree = (! execute_CsrPlugin_blockedBySideEffects); + assign execute_CsrPlugin_readToWriteData = CsrPlugin_csrMapping_readDataSignal; + assign switch_Misc_l200_2 = execute_INSTRUCTION[13]; + always @(*) begin + case(switch_Misc_l200_2) + 1'b0 : begin + _zz_CsrPlugin_csrMapping_writeDataSignal = execute_SRC1; + end + default : begin + _zz_CsrPlugin_csrMapping_writeDataSignal = (execute_INSTRUCTION[12] ? (execute_CsrPlugin_readToWriteData & (~ execute_SRC1)) : (execute_CsrPlugin_readToWriteData | execute_SRC1)); + end + endcase + end + + assign CsrPlugin_csrMapping_writeDataSignal = _zz_CsrPlugin_csrMapping_writeDataSignal; + assign when_CsrPlugin_l1176 = (execute_arbitration_isValid && execute_IS_CSR); + assign when_CsrPlugin_l1180 = (execute_arbitration_isValid && (execute_IS_CSR || 1'b0)); + assign execute_CsrPlugin_csrAddress = execute_INSTRUCTION[31 : 20]; + assign execute_MulPlugin_a = execute_RS1; + assign execute_MulPlugin_b = execute_RS2; + assign switch_MulPlugin_l87 = execute_INSTRUCTION[13 : 12]; + always @(*) begin + case(switch_MulPlugin_l87) + 2'b01 : begin + execute_MulPlugin_aSigned = 1'b1; + end + 2'b10 : begin + execute_MulPlugin_aSigned = 1'b1; + end + default : begin + execute_MulPlugin_aSigned = 1'b0; + end + endcase + end + + always @(*) begin + case(switch_MulPlugin_l87) + 2'b01 : begin + execute_MulPlugin_bSigned = 1'b1; + end + 2'b10 : begin + execute_MulPlugin_bSigned = 1'b0; + end + default : begin + execute_MulPlugin_bSigned = 1'b0; + end + endcase + end + + assign execute_MulPlugin_aULow = execute_MulPlugin_a[15 : 0]; + assign execute_MulPlugin_bULow = execute_MulPlugin_b[15 : 0]; + assign execute_MulPlugin_aSLow = {1'b0,execute_MulPlugin_a[15 : 0]}; + assign execute_MulPlugin_bSLow = {1'b0,execute_MulPlugin_b[15 : 0]}; + assign execute_MulPlugin_aHigh = {(execute_MulPlugin_aSigned && execute_MulPlugin_a[31]),execute_MulPlugin_a[31 : 16]}; + assign execute_MulPlugin_bHigh = {(execute_MulPlugin_bSigned && execute_MulPlugin_b[31]),execute_MulPlugin_b[31 : 16]}; + assign writeBack_MulPlugin_result = ($signed(_zz_writeBack_MulPlugin_result) + $signed(_zz_writeBack_MulPlugin_result_1)); + assign when_MulPlugin_l147 = (writeBack_arbitration_isValid && writeBack_IS_MUL); + assign switch_MulPlugin_l148 = writeBack_INSTRUCTION[13 : 12]; + assign memory_DivPlugin_frontendOk = 1'b1; + always @(*) begin + memory_DivPlugin_div_counter_willIncrement = 1'b0; + if(when_MulDivIterativePlugin_l128) begin + if(when_MulDivIterativePlugin_l132) begin + memory_DivPlugin_div_counter_willIncrement = 1'b1; + end + end + end + + always @(*) begin + memory_DivPlugin_div_counter_willClear = 1'b0; + if(when_MulDivIterativePlugin_l162) begin + memory_DivPlugin_div_counter_willClear = 1'b1; + end + end + + assign memory_DivPlugin_div_counter_willOverflowIfInc = (memory_DivPlugin_div_counter_value == 6'h21); + assign memory_DivPlugin_div_counter_willOverflow = (memory_DivPlugin_div_counter_willOverflowIfInc && memory_DivPlugin_div_counter_willIncrement); + always @(*) begin + if(memory_DivPlugin_div_counter_willOverflow) begin + memory_DivPlugin_div_counter_valueNext = 6'h0; + end else begin + memory_DivPlugin_div_counter_valueNext = (memory_DivPlugin_div_counter_value + _zz_memory_DivPlugin_div_counter_valueNext); + end + if(memory_DivPlugin_div_counter_willClear) begin + memory_DivPlugin_div_counter_valueNext = 6'h0; + end + end + + assign when_MulDivIterativePlugin_l126 = (memory_DivPlugin_div_counter_value == 6'h20); + assign when_MulDivIterativePlugin_l126_1 = (! memory_arbitration_isStuck); + assign when_MulDivIterativePlugin_l128 = (memory_arbitration_isValid && memory_IS_DIV); + assign when_MulDivIterativePlugin_l129 = ((! memory_DivPlugin_frontendOk) || (! memory_DivPlugin_div_done)); + assign when_MulDivIterativePlugin_l132 = (memory_DivPlugin_frontendOk && (! memory_DivPlugin_div_done)); + assign _zz_memory_DivPlugin_div_stage_0_remainderShifted = memory_DivPlugin_rs1[31 : 0]; + assign memory_DivPlugin_div_stage_0_remainderShifted = {memory_DivPlugin_accumulator[31 : 0],_zz_memory_DivPlugin_div_stage_0_remainderShifted[31]}; + assign memory_DivPlugin_div_stage_0_remainderMinusDenominator = (memory_DivPlugin_div_stage_0_remainderShifted - _zz_memory_DivPlugin_div_stage_0_remainderMinusDenominator); + assign memory_DivPlugin_div_stage_0_outRemainder = ((! memory_DivPlugin_div_stage_0_remainderMinusDenominator[32]) ? _zz_memory_DivPlugin_div_stage_0_outRemainder : _zz_memory_DivPlugin_div_stage_0_outRemainder_1); + assign memory_DivPlugin_div_stage_0_outNumerator = _zz_memory_DivPlugin_div_stage_0_outNumerator[31:0]; + assign when_MulDivIterativePlugin_l151 = (memory_DivPlugin_div_counter_value == 6'h20); + assign _zz_memory_DivPlugin_div_result = (memory_INSTRUCTION[13] ? memory_DivPlugin_accumulator[31 : 0] : memory_DivPlugin_rs1[31 : 0]); + assign when_MulDivIterativePlugin_l162 = (! memory_arbitration_isStuck); + assign _zz_memory_DivPlugin_rs2 = (execute_RS2[31] && execute_IS_RS2_SIGNED); + assign _zz_memory_DivPlugin_rs1 = (1'b0 || ((execute_IS_DIV && execute_RS1[31]) && execute_IS_RS1_SIGNED)); + always @(*) begin + _zz_memory_DivPlugin_rs1_1[32] = (execute_IS_RS1_SIGNED && execute_RS1[31]); + _zz_memory_DivPlugin_rs1_1[31 : 0] = execute_RS1; + end + + assign _zz_CsrPlugin_csrMapping_readDataInit_1 = (_zz_CsrPlugin_csrMapping_readDataInit & externalInterruptArray_regNext); + assign externalInterrupt = (_zz_CsrPlugin_csrMapping_readDataInit_1 != 32'h0); + assign execute_CfuPlugin_schedule = (execute_arbitration_isValid && execute_CfuPlugin_CFU_ENABLE); + assign CfuPlugin_bus_cmd_fire = (CfuPlugin_bus_cmd_valid && CfuPlugin_bus_cmd_ready); + assign when_CfuPlugin_l171 = (! execute_arbitration_isStuckByOthers); + assign CfuPlugin_bus_cmd_valid = ((execute_CfuPlugin_schedule || execute_CfuPlugin_hold) && (! execute_CfuPlugin_fired)); + assign when_CfuPlugin_l175 = (CfuPlugin_bus_cmd_valid && (! CfuPlugin_bus_cmd_ready)); + assign execute_CfuPlugin_functionsIds_0 = _zz_execute_CfuPlugin_functionsIds_0; + assign CfuPlugin_bus_cmd_payload_function_id = execute_CfuPlugin_functionsIds_0; + assign CfuPlugin_bus_cmd_payload_inputs_0 = execute_RS1; + assign _zz_CfuPlugin_bus_cmd_payload_inputs_1 = execute_INSTRUCTION[31]; + always @(*) begin + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[23] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[22] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[21] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[20] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[19] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[18] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[17] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[16] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[15] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[14] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[13] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[12] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[11] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[10] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[9] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[8] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[7] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[6] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[5] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[4] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[3] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[2] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[1] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[0] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + end + + always @(*) begin + case(execute_CfuPlugin_CFU_INPUT_2_KIND) + `Input2Kind_binary_sequential_RS : begin + _zz_CfuPlugin_bus_cmd_payload_inputs_1_2 = execute_RS2; + end + default : begin + _zz_CfuPlugin_bus_cmd_payload_inputs_1_2 = {_zz_CfuPlugin_bus_cmd_payload_inputs_1_1,execute_INSTRUCTION[31 : 24]}; + end + endcase + end + + assign CfuPlugin_bus_cmd_payload_inputs_1 = _zz_CfuPlugin_bus_cmd_payload_inputs_1_2; + assign CfuPlugin_bus_rsp_ready = (! CfuPlugin_bus_rsp_rValid); + assign CfuPlugin_bus_rsp_rsp_valid = (CfuPlugin_bus_rsp_valid || CfuPlugin_bus_rsp_rValid); + assign CfuPlugin_bus_rsp_rsp_payload_outputs_0 = (CfuPlugin_bus_rsp_rValid ? CfuPlugin_bus_rsp_rData_outputs_0 : CfuPlugin_bus_rsp_payload_outputs_0); + always @(*) begin + CfuPlugin_bus_rsp_rsp_ready = 1'b0; + if(memory_CfuPlugin_CFU_IN_FLIGHT) begin + CfuPlugin_bus_rsp_rsp_ready = (! memory_arbitration_isStuckByOthers); + end + end + + assign when_CfuPlugin_l208 = (! CfuPlugin_bus_rsp_rsp_valid); + assign when_GenCoreDefault_l367 = _zz_when_GenCoreDefault_l367[0]; + assign when_GenCoreDefault_l367_1 = _zz_when_GenCoreDefault_l367_1[0]; + assign when_GenCoreDefault_l367_2 = _zz_when_GenCoreDefault_l367_2[0]; + assign when_GenCoreDefault_l367_3 = _zz_when_GenCoreDefault_l367_3[0]; + assign when_GenCoreDefault_l367_4 = _zz_when_GenCoreDefault_l367_4[0]; + assign when_GenCoreDefault_l367_5 = _zz_when_GenCoreDefault_l367_5[0]; + assign when_GenCoreDefault_l367_6 = _zz_when_GenCoreDefault_l367_6[0]; + assign when_GenCoreDefault_l367_7 = _zz_when_GenCoreDefault_l367_7[0]; + assign when_Pipeline_l124 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_1 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_2 = ((! writeBack_arbitration_isStuck) && (! CsrPlugin_exceptionPortCtrl_exceptionValids_writeBack)); + assign when_Pipeline_l124_3 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_4 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_5 = (! writeBack_arbitration_isStuck); + assign when_Pipeline_l124_6 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_7 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_8 = (! writeBack_arbitration_isStuck); + assign when_Pipeline_l124_9 = (! execute_arbitration_isStuck); + assign _zz_decode_to_execute_SRC1_CTRL_1 = decode_SRC1_CTRL; + assign _zz_decode_SRC1_CTRL = _zz_decode_SRC1_CTRL_1; + assign when_Pipeline_l124_10 = (! execute_arbitration_isStuck); + assign _zz_execute_SRC1_CTRL = decode_to_execute_SRC1_CTRL; + assign when_Pipeline_l124_11 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_12 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_13 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_14 = (! writeBack_arbitration_isStuck); + assign _zz_decode_to_execute_ALU_CTRL_1 = decode_ALU_CTRL; + assign _zz_decode_ALU_CTRL = _zz_decode_ALU_CTRL_1; + assign when_Pipeline_l124_15 = (! execute_arbitration_isStuck); + assign _zz_execute_ALU_CTRL = decode_to_execute_ALU_CTRL; + assign _zz_decode_to_execute_SRC2_CTRL_1 = decode_SRC2_CTRL; + assign _zz_decode_SRC2_CTRL = _zz_decode_SRC2_CTRL_1; + assign when_Pipeline_l124_16 = (! execute_arbitration_isStuck); + assign _zz_execute_SRC2_CTRL = decode_to_execute_SRC2_CTRL; + assign when_Pipeline_l124_17 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_18 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_19 = (! writeBack_arbitration_isStuck); + assign when_Pipeline_l124_20 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_21 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_22 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_23 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_24 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_25 = (! writeBack_arbitration_isStuck); + assign when_Pipeline_l124_26 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_27 = (! execute_arbitration_isStuck); + assign _zz_decode_to_execute_ALU_BITWISE_CTRL_1 = decode_ALU_BITWISE_CTRL; + assign _zz_decode_ALU_BITWISE_CTRL = _zz_decode_ALU_BITWISE_CTRL_1; + assign when_Pipeline_l124_28 = (! execute_arbitration_isStuck); + assign _zz_execute_ALU_BITWISE_CTRL = decode_to_execute_ALU_BITWISE_CTRL; + assign _zz_decode_to_execute_SHIFT_CTRL_1 = decode_SHIFT_CTRL; + assign _zz_execute_to_memory_SHIFT_CTRL_1 = execute_SHIFT_CTRL; + assign _zz_decode_SHIFT_CTRL = _zz_decode_SHIFT_CTRL_1; + assign when_Pipeline_l124_29 = (! execute_arbitration_isStuck); + assign _zz_execute_SHIFT_CTRL = decode_to_execute_SHIFT_CTRL; + assign when_Pipeline_l124_30 = (! memory_arbitration_isStuck); + assign _zz_memory_SHIFT_CTRL = execute_to_memory_SHIFT_CTRL; + assign _zz_decode_to_execute_BRANCH_CTRL_1 = decode_BRANCH_CTRL; + assign _zz_decode_BRANCH_CTRL_1 = _zz_decode_BRANCH_CTRL; + assign when_Pipeline_l124_31 = (! execute_arbitration_isStuck); + assign _zz_execute_BRANCH_CTRL = decode_to_execute_BRANCH_CTRL; + assign when_Pipeline_l124_32 = (! execute_arbitration_isStuck); + assign _zz_decode_to_execute_ENV_CTRL_1 = decode_ENV_CTRL; + assign _zz_execute_to_memory_ENV_CTRL_1 = execute_ENV_CTRL; + assign _zz_memory_to_writeBack_ENV_CTRL_1 = memory_ENV_CTRL; + assign _zz_decode_ENV_CTRL = _zz_decode_ENV_CTRL_1; + assign when_Pipeline_l124_33 = (! execute_arbitration_isStuck); + assign _zz_execute_ENV_CTRL = decode_to_execute_ENV_CTRL; + assign when_Pipeline_l124_34 = (! memory_arbitration_isStuck); + assign _zz_memory_ENV_CTRL = execute_to_memory_ENV_CTRL; + assign when_Pipeline_l124_35 = (! writeBack_arbitration_isStuck); + assign _zz_writeBack_ENV_CTRL = memory_to_writeBack_ENV_CTRL; + assign when_Pipeline_l124_36 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_37 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_38 = (! writeBack_arbitration_isStuck); + assign when_Pipeline_l124_39 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_40 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_41 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_42 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_43 = (! execute_arbitration_isStuck); + assign _zz_decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND_1 = decode_CfuPlugin_CFU_INPUT_2_KIND; + assign _zz_decode_CfuPlugin_CFU_INPUT_2_KIND = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_1; + assign when_Pipeline_l124_44 = (! execute_arbitration_isStuck); + assign _zz_execute_CfuPlugin_CFU_INPUT_2_KIND = decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND; + assign when_Pipeline_l124_45 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_46 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_47 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_48 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_49 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_50 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_51 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_52 = (! writeBack_arbitration_isStuck); + assign when_Pipeline_l124_53 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_54 = (! writeBack_arbitration_isStuck); + assign when_Pipeline_l124_55 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_56 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_57 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_58 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_59 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_60 = (! writeBack_arbitration_isStuck); + assign when_Pipeline_l124_61 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_62 = (! writeBack_arbitration_isStuck); + assign when_Pipeline_l124_63 = (! writeBack_arbitration_isStuck); + assign decode_arbitration_isFlushed = (({writeBack_arbitration_flushNext,{memory_arbitration_flushNext,execute_arbitration_flushNext}} != 3'b000) || ({writeBack_arbitration_flushIt,{memory_arbitration_flushIt,{execute_arbitration_flushIt,decode_arbitration_flushIt}}} != 4'b0000)); + assign execute_arbitration_isFlushed = (({writeBack_arbitration_flushNext,memory_arbitration_flushNext} != 2'b00) || ({writeBack_arbitration_flushIt,{memory_arbitration_flushIt,execute_arbitration_flushIt}} != 3'b000)); + assign memory_arbitration_isFlushed = ((writeBack_arbitration_flushNext != 1'b0) || ({writeBack_arbitration_flushIt,memory_arbitration_flushIt} != 2'b00)); + assign writeBack_arbitration_isFlushed = (1'b0 || (writeBack_arbitration_flushIt != 1'b0)); + assign decode_arbitration_isStuckByOthers = (decode_arbitration_haltByOther || (((1'b0 || execute_arbitration_isStuck) || memory_arbitration_isStuck) || writeBack_arbitration_isStuck)); + assign decode_arbitration_isStuck = (decode_arbitration_haltItself || decode_arbitration_isStuckByOthers); + assign decode_arbitration_isMoving = ((! decode_arbitration_isStuck) && (! decode_arbitration_removeIt)); + assign decode_arbitration_isFiring = ((decode_arbitration_isValid && (! decode_arbitration_isStuck)) && (! decode_arbitration_removeIt)); + assign execute_arbitration_isStuckByOthers = (execute_arbitration_haltByOther || ((1'b0 || memory_arbitration_isStuck) || writeBack_arbitration_isStuck)); + assign execute_arbitration_isStuck = (execute_arbitration_haltItself || execute_arbitration_isStuckByOthers); + assign execute_arbitration_isMoving = ((! execute_arbitration_isStuck) && (! execute_arbitration_removeIt)); + assign execute_arbitration_isFiring = ((execute_arbitration_isValid && (! execute_arbitration_isStuck)) && (! execute_arbitration_removeIt)); + assign memory_arbitration_isStuckByOthers = (memory_arbitration_haltByOther || (1'b0 || writeBack_arbitration_isStuck)); + assign memory_arbitration_isStuck = (memory_arbitration_haltItself || memory_arbitration_isStuckByOthers); + assign memory_arbitration_isMoving = ((! memory_arbitration_isStuck) && (! memory_arbitration_removeIt)); + assign memory_arbitration_isFiring = ((memory_arbitration_isValid && (! memory_arbitration_isStuck)) && (! memory_arbitration_removeIt)); + assign writeBack_arbitration_isStuckByOthers = (writeBack_arbitration_haltByOther || 1'b0); + assign writeBack_arbitration_isStuck = (writeBack_arbitration_haltItself || writeBack_arbitration_isStuckByOthers); + assign writeBack_arbitration_isMoving = ((! writeBack_arbitration_isStuck) && (! writeBack_arbitration_removeIt)); + assign writeBack_arbitration_isFiring = ((writeBack_arbitration_isValid && (! writeBack_arbitration_isStuck)) && (! writeBack_arbitration_removeIt)); + assign when_Pipeline_l151 = ((! execute_arbitration_isStuck) || execute_arbitration_removeIt); + assign when_Pipeline_l154 = ((! decode_arbitration_isStuck) && (! decode_arbitration_removeIt)); + assign when_Pipeline_l151_1 = ((! memory_arbitration_isStuck) || memory_arbitration_removeIt); + assign when_Pipeline_l154_1 = ((! execute_arbitration_isStuck) && (! execute_arbitration_removeIt)); + assign when_Pipeline_l151_2 = ((! writeBack_arbitration_isStuck) || writeBack_arbitration_removeIt); + assign when_Pipeline_l154_2 = ((! memory_arbitration_isStuck) && (! memory_arbitration_removeIt)); + assign when_CsrPlugin_l1264 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_1 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_2 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_3 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_4 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_5 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_6 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_7 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_8 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_9 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_10 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_11 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_12 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_13 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_14 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_15 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_16 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_17 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_18 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_19 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_20 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_21 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_22 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_23 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_24 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_25 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_26 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_27 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_28 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_29 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_30 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_31 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_32 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_33 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_34 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_35 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_36 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_37 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_38 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_39 = (! execute_arbitration_isStuck); + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_10 = 32'h0; + if(execute_CsrPlugin_csr_3264) begin + _zz_CsrPlugin_csrMapping_readDataInit_10[12 : 0] = 13'h1000; + _zz_CsrPlugin_csrMapping_readDataInit_10[25 : 20] = 6'h20; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_11 = 32'h0; + if(execute_CsrPlugin_csr_3857) begin + _zz_CsrPlugin_csrMapping_readDataInit_11[3 : 0] = 4'b1011; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_12 = 32'h0; + if(execute_CsrPlugin_csr_3858) begin + _zz_CsrPlugin_csrMapping_readDataInit_12[4 : 0] = 5'h16; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_13 = 32'h0; + if(execute_CsrPlugin_csr_3859) begin + _zz_CsrPlugin_csrMapping_readDataInit_13[5 : 0] = 6'h21; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_14 = 32'h0; + if(execute_CsrPlugin_csr_769) begin + _zz_CsrPlugin_csrMapping_readDataInit_14[31 : 30] = CsrPlugin_misa_base; + _zz_CsrPlugin_csrMapping_readDataInit_14[25 : 0] = CsrPlugin_misa_extensions; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_15 = 32'h0; + if(execute_CsrPlugin_csr_768) begin + _zz_CsrPlugin_csrMapping_readDataInit_15[12 : 11] = CsrPlugin_mstatus_MPP; + _zz_CsrPlugin_csrMapping_readDataInit_15[7 : 7] = CsrPlugin_mstatus_MPIE; + _zz_CsrPlugin_csrMapping_readDataInit_15[3 : 3] = CsrPlugin_mstatus_MIE; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_16 = 32'h0; + if(execute_CsrPlugin_csr_836) begin + _zz_CsrPlugin_csrMapping_readDataInit_16[11 : 11] = CsrPlugin_mip_MEIP; + _zz_CsrPlugin_csrMapping_readDataInit_16[7 : 7] = CsrPlugin_mip_MTIP; + _zz_CsrPlugin_csrMapping_readDataInit_16[3 : 3] = CsrPlugin_mip_MSIP; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_17 = 32'h0; + if(execute_CsrPlugin_csr_772) begin + _zz_CsrPlugin_csrMapping_readDataInit_17[11 : 11] = CsrPlugin_mie_MEIE; + _zz_CsrPlugin_csrMapping_readDataInit_17[7 : 7] = CsrPlugin_mie_MTIE; + _zz_CsrPlugin_csrMapping_readDataInit_17[3 : 3] = CsrPlugin_mie_MSIE; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_18 = 32'h0; + if(execute_CsrPlugin_csr_773) begin + _zz_CsrPlugin_csrMapping_readDataInit_18[31 : 2] = CsrPlugin_mtvec_base; + _zz_CsrPlugin_csrMapping_readDataInit_18[1 : 0] = CsrPlugin_mtvec_mode; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_19 = 32'h0; + if(execute_CsrPlugin_csr_833) begin + _zz_CsrPlugin_csrMapping_readDataInit_19[31 : 0] = CsrPlugin_mepc; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_20 = 32'h0; + if(execute_CsrPlugin_csr_832) begin + _zz_CsrPlugin_csrMapping_readDataInit_20[31 : 0] = CsrPlugin_mscratch; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_21 = 32'h0; + if(execute_CsrPlugin_csr_834) begin + _zz_CsrPlugin_csrMapping_readDataInit_21[31 : 31] = CsrPlugin_mcause_interrupt; + _zz_CsrPlugin_csrMapping_readDataInit_21[3 : 0] = CsrPlugin_mcause_exceptionCode; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_22 = 32'h0; + if(execute_CsrPlugin_csr_835) begin + _zz_CsrPlugin_csrMapping_readDataInit_22[31 : 0] = CsrPlugin_mtval; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_23 = 32'h0; + if(execute_CsrPlugin_csr_2816) begin + _zz_CsrPlugin_csrMapping_readDataInit_23[31 : 0] = CsrPlugin_mcycle[31 : 0]; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_24 = 32'h0; + if(execute_CsrPlugin_csr_2944) begin + _zz_CsrPlugin_csrMapping_readDataInit_24[31 : 0] = CsrPlugin_mcycle[63 : 32]; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_25 = 32'h0; + if(execute_CsrPlugin_csr_2818) begin + _zz_CsrPlugin_csrMapping_readDataInit_25[31 : 0] = CsrPlugin_minstret[31 : 0]; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_26 = 32'h0; + if(execute_CsrPlugin_csr_2946) begin + _zz_CsrPlugin_csrMapping_readDataInit_26[31 : 0] = CsrPlugin_minstret[63 : 32]; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_27 = 32'h0; + if(execute_CsrPlugin_csr_3072) begin + _zz_CsrPlugin_csrMapping_readDataInit_27[31 : 0] = CsrPlugin_mcycle[31 : 0]; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_28 = 32'h0; + if(execute_CsrPlugin_csr_3200) begin + _zz_CsrPlugin_csrMapping_readDataInit_28[31 : 0] = CsrPlugin_mcycle[63 : 32]; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_29 = 32'h0; + if(execute_CsrPlugin_csr_3074) begin + _zz_CsrPlugin_csrMapping_readDataInit_29[31 : 0] = CsrPlugin_minstret[31 : 0]; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_30 = 32'h0; + if(execute_CsrPlugin_csr_3202) begin + _zz_CsrPlugin_csrMapping_readDataInit_30[31 : 0] = CsrPlugin_minstret[63 : 32]; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_31 = 32'h0; + if(execute_CsrPlugin_csr_3008) begin + _zz_CsrPlugin_csrMapping_readDataInit_31[31 : 0] = _zz_CsrPlugin_csrMapping_readDataInit; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_32 = 32'h0; + if(execute_CsrPlugin_csr_4032) begin + _zz_CsrPlugin_csrMapping_readDataInit_32[31 : 0] = _zz_CsrPlugin_csrMapping_readDataInit_1; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_33 = 32'h0; + if(execute_CsrPlugin_csr_2820) begin + _zz_CsrPlugin_csrMapping_readDataInit_33[31 : 0] = _zz_CsrPlugin_csrMapping_readDataInit_2; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_34 = 32'h0; + if(execute_CsrPlugin_csr_2822) begin + _zz_CsrPlugin_csrMapping_readDataInit_34[31 : 0] = _zz_CsrPlugin_csrMapping_readDataInit_3; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_35 = 32'h0; + if(execute_CsrPlugin_csr_2824) begin + _zz_CsrPlugin_csrMapping_readDataInit_35[31 : 0] = _zz_CsrPlugin_csrMapping_readDataInit_4; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_36 = 32'h0; + if(execute_CsrPlugin_csr_2826) begin + _zz_CsrPlugin_csrMapping_readDataInit_36[31 : 0] = _zz_CsrPlugin_csrMapping_readDataInit_5; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_37 = 32'h0; + if(execute_CsrPlugin_csr_2828) begin + _zz_CsrPlugin_csrMapping_readDataInit_37[31 : 0] = _zz_CsrPlugin_csrMapping_readDataInit_6; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_38 = 32'h0; + if(execute_CsrPlugin_csr_2830) begin + _zz_CsrPlugin_csrMapping_readDataInit_38[31 : 0] = _zz_CsrPlugin_csrMapping_readDataInit_7; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_39 = 32'h0; + if(execute_CsrPlugin_csr_2832) begin + _zz_CsrPlugin_csrMapping_readDataInit_39[31 : 0] = _zz_CsrPlugin_csrMapping_readDataInit_8; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_40 = 32'h0; + if(execute_CsrPlugin_csr_2834) begin + _zz_CsrPlugin_csrMapping_readDataInit_40[31 : 0] = _zz_CsrPlugin_csrMapping_readDataInit_9; + end + end + + assign CsrPlugin_csrMapping_readDataInit = (((((_zz_CsrPlugin_csrMapping_readDataInit_10 | _zz_CsrPlugin_csrMapping_readDataInit_11) | (_zz_CsrPlugin_csrMapping_readDataInit_12 | _zz_CsrPlugin_csrMapping_readDataInit_13)) | ((_zz_CsrPlugin_csrMapping_readDataInit_41 | _zz_CsrPlugin_csrMapping_readDataInit_14) | (_zz_CsrPlugin_csrMapping_readDataInit_15 | _zz_CsrPlugin_csrMapping_readDataInit_16))) | (((_zz_CsrPlugin_csrMapping_readDataInit_17 | _zz_CsrPlugin_csrMapping_readDataInit_18) | (_zz_CsrPlugin_csrMapping_readDataInit_19 | _zz_CsrPlugin_csrMapping_readDataInit_20)) | ((_zz_CsrPlugin_csrMapping_readDataInit_21 | _zz_CsrPlugin_csrMapping_readDataInit_22) | (_zz_CsrPlugin_csrMapping_readDataInit_23 | _zz_CsrPlugin_csrMapping_readDataInit_24)))) | ((((_zz_CsrPlugin_csrMapping_readDataInit_25 | _zz_CsrPlugin_csrMapping_readDataInit_26) | (_zz_CsrPlugin_csrMapping_readDataInit_27 | _zz_CsrPlugin_csrMapping_readDataInit_28)) | ((_zz_CsrPlugin_csrMapping_readDataInit_29 | _zz_CsrPlugin_csrMapping_readDataInit_30) | (_zz_CsrPlugin_csrMapping_readDataInit_31 | _zz_CsrPlugin_csrMapping_readDataInit_32))) | (((_zz_CsrPlugin_csrMapping_readDataInit_33 | _zz_CsrPlugin_csrMapping_readDataInit_34) | (_zz_CsrPlugin_csrMapping_readDataInit_35 | _zz_CsrPlugin_csrMapping_readDataInit_36)) | ((_zz_CsrPlugin_csrMapping_readDataInit_37 | _zz_CsrPlugin_csrMapping_readDataInit_38) | (_zz_CsrPlugin_csrMapping_readDataInit_39 | _zz_CsrPlugin_csrMapping_readDataInit_40))))); + assign when_CsrPlugin_l1297 = (CsrPlugin_privilege < execute_CsrPlugin_csrAddress[9 : 8]); + assign when_CsrPlugin_l1302 = ((! execute_arbitration_isValid) || (! execute_IS_CSR)); + assign iBusWishbone_ADR = {_zz_iBusWishbone_ADR_1,_zz_iBusWishbone_ADR}; + assign iBusWishbone_CTI = ((_zz_iBusWishbone_ADR == 3'b111) ? 3'b111 : 3'b010); + assign iBusWishbone_BTE = 2'b00; + assign iBusWishbone_SEL = 4'b1111; + assign iBusWishbone_WE = 1'b0; + assign iBusWishbone_DAT_MOSI = 32'bxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx; + always @(*) begin + iBusWishbone_CYC = 1'b0; + if(when_InstructionCache_l239) begin + iBusWishbone_CYC = 1'b1; + end + end + + always @(*) begin + iBusWishbone_STB = 1'b0; + if(when_InstructionCache_l239) begin + iBusWishbone_STB = 1'b1; + end + end + + assign when_InstructionCache_l239 = (iBus_cmd_valid || (_zz_iBusWishbone_ADR != 3'b000)); + assign iBus_cmd_ready = (iBus_cmd_valid && iBusWishbone_ACK); + assign iBus_rsp_valid = _zz_iBus_rsp_valid; + assign iBus_rsp_payload_data = iBusWishbone_DAT_MISO_regNext; + assign iBus_rsp_payload_error = 1'b0; + assign _zz_dBus_cmd_ready_5 = (dBus_cmd_payload_size == 3'b101); + assign _zz_dBus_cmd_ready_1 = dBus_cmd_valid; + assign _zz_dBus_cmd_ready_3 = dBus_cmd_payload_wr; + assign _zz_dBus_cmd_ready_4 = ((! _zz_dBus_cmd_ready_5) || (_zz_dBus_cmd_ready == 3'b111)); + assign dBus_cmd_ready = (_zz_dBus_cmd_ready_2 && (_zz_dBus_cmd_ready_3 || _zz_dBus_cmd_ready_4)); + assign dBusWishbone_ADR = ((_zz_dBus_cmd_ready_5 ? {{dBus_cmd_payload_address[31 : 5],_zz_dBus_cmd_ready},2'b00} : {dBus_cmd_payload_address[31 : 2],2'b00}) >>> 2); + assign dBusWishbone_CTI = (_zz_dBus_cmd_ready_5 ? (_zz_dBus_cmd_ready_4 ? 3'b111 : 3'b010) : 3'b000); + assign dBusWishbone_BTE = 2'b00; + assign dBusWishbone_SEL = (_zz_dBus_cmd_ready_3 ? dBus_cmd_payload_mask : 4'b1111); + assign dBusWishbone_WE = _zz_dBus_cmd_ready_3; + assign dBusWishbone_DAT_MOSI = dBus_cmd_payload_data; + assign _zz_dBus_cmd_ready_2 = (_zz_dBus_cmd_ready_1 && dBusWishbone_ACK); + assign dBusWishbone_CYC = _zz_dBus_cmd_ready_1; + assign dBusWishbone_STB = _zz_dBus_cmd_ready_1; + assign dBus_rsp_valid = _zz_dBus_rsp_valid; + assign dBus_rsp_payload_data = dBusWishbone_DAT_MISO_regNext; + assign dBus_rsp_payload_error = 1'b0; + always @(posedge clk) begin + if(reset) begin + IBusCachedPlugin_fetchPc_pcReg <= externalResetVector; + IBusCachedPlugin_fetchPc_correctionReg <= 1'b0; + IBusCachedPlugin_fetchPc_booted <= 1'b0; + IBusCachedPlugin_fetchPc_inc <= 1'b0; + _zz_IBusCachedPlugin_iBusRsp_stages_0_output_ready_2 <= 1'b0; + _zz_IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_valid <= 1'b0; + IBusCachedPlugin_injector_nextPcCalc_valids_0 <= 1'b0; + IBusCachedPlugin_injector_nextPcCalc_valids_1 <= 1'b0; + IBusCachedPlugin_injector_nextPcCalc_valids_2 <= 1'b0; + IBusCachedPlugin_injector_nextPcCalc_valids_3 <= 1'b0; + IBusCachedPlugin_injector_nextPcCalc_valids_4 <= 1'b0; + IBusCachedPlugin_rspCounter <= _zz_IBusCachedPlugin_rspCounter; + IBusCachedPlugin_rspCounter <= 32'h0; + dataCache_1_io_mem_cmd_rValid <= 1'b0; + dataCache_1_io_mem_cmd_s2mPipe_rValid <= 1'b0; + DBusCachedPlugin_rspCounter <= _zz_DBusCachedPlugin_rspCounter; + DBusCachedPlugin_rspCounter <= 32'h0; + _zz_7 <= 1'b1; + HazardSimplePlugin_writeBackBuffer_valid <= 1'b0; + CsrPlugin_misa_base <= 2'b01; + CsrPlugin_misa_extensions <= 26'h0000042; + CsrPlugin_mstatus_MIE <= 1'b0; + CsrPlugin_mstatus_MPIE <= 1'b0; + CsrPlugin_mstatus_MPP <= 2'b11; + CsrPlugin_mie_MEIE <= 1'b0; + CsrPlugin_mie_MTIE <= 1'b0; + CsrPlugin_mie_MSIE <= 1'b0; + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_decode <= 1'b0; + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_execute <= 1'b0; + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_memory <= 1'b0; + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_writeBack <= 1'b0; + CsrPlugin_interrupt_valid <= 1'b0; + CsrPlugin_lastStageWasWfi <= 1'b0; + CsrPlugin_pipelineLiberator_pcValids_0 <= 1'b0; + CsrPlugin_pipelineLiberator_pcValids_1 <= 1'b0; + CsrPlugin_pipelineLiberator_pcValids_2 <= 1'b0; + CsrPlugin_hadException <= 1'b0; + execute_CsrPlugin_wfiWake <= 1'b0; + memory_DivPlugin_div_counter_value <= 6'h0; + _zz_CsrPlugin_csrMapping_readDataInit <= 32'h0; + execute_CfuPlugin_hold <= 1'b0; + execute_CfuPlugin_fired <= 1'b0; + CfuPlugin_bus_rsp_rValid <= 1'b0; + execute_arbitration_isValid <= 1'b0; + memory_arbitration_isValid <= 1'b0; + writeBack_arbitration_isValid <= 1'b0; + execute_to_memory_CfuPlugin_CFU_IN_FLIGHT <= 1'b0; + _zz_iBusWishbone_ADR <= 3'b000; + _zz_iBus_rsp_valid <= 1'b0; + _zz_dBus_cmd_ready <= 3'b000; + _zz_dBus_rsp_valid <= 1'b0; + end else begin + if(IBusCachedPlugin_fetchPc_correction) begin + IBusCachedPlugin_fetchPc_correctionReg <= 1'b1; + end + if(IBusCachedPlugin_fetchPc_output_fire) begin + IBusCachedPlugin_fetchPc_correctionReg <= 1'b0; + end + IBusCachedPlugin_fetchPc_booted <= 1'b1; + if(when_Fetcher_l131) begin + IBusCachedPlugin_fetchPc_inc <= 1'b0; + end + if(IBusCachedPlugin_fetchPc_output_fire_1) begin + IBusCachedPlugin_fetchPc_inc <= 1'b1; + end + if(when_Fetcher_l131_1) begin + IBusCachedPlugin_fetchPc_inc <= 1'b0; + end + if(when_Fetcher_l158) begin + IBusCachedPlugin_fetchPc_pcReg <= IBusCachedPlugin_fetchPc_pc; + end + if(IBusCachedPlugin_iBusRsp_flush) begin + _zz_IBusCachedPlugin_iBusRsp_stages_0_output_ready_2 <= 1'b0; + end + if(_zz_IBusCachedPlugin_iBusRsp_stages_0_output_ready) begin + _zz_IBusCachedPlugin_iBusRsp_stages_0_output_ready_2 <= (IBusCachedPlugin_iBusRsp_stages_0_output_valid && (! 1'b0)); + end + if(IBusCachedPlugin_iBusRsp_flush) begin + _zz_IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_valid <= 1'b0; + end + if(IBusCachedPlugin_iBusRsp_stages_1_output_ready) begin + _zz_IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_valid <= (IBusCachedPlugin_iBusRsp_stages_1_output_valid && (! IBusCachedPlugin_iBusRsp_flush)); + end + if(IBusCachedPlugin_fetchPc_flushed) begin + IBusCachedPlugin_injector_nextPcCalc_valids_0 <= 1'b0; + end + if(when_Fetcher_l329) begin + IBusCachedPlugin_injector_nextPcCalc_valids_0 <= 1'b1; + end + if(IBusCachedPlugin_fetchPc_flushed) begin + IBusCachedPlugin_injector_nextPcCalc_valids_1 <= 1'b0; + end + if(when_Fetcher_l329_1) begin + IBusCachedPlugin_injector_nextPcCalc_valids_1 <= IBusCachedPlugin_injector_nextPcCalc_valids_0; + end + if(IBusCachedPlugin_fetchPc_flushed) begin + IBusCachedPlugin_injector_nextPcCalc_valids_1 <= 1'b0; + end + if(IBusCachedPlugin_fetchPc_flushed) begin + IBusCachedPlugin_injector_nextPcCalc_valids_2 <= 1'b0; + end + if(when_Fetcher_l329_2) begin + IBusCachedPlugin_injector_nextPcCalc_valids_2 <= IBusCachedPlugin_injector_nextPcCalc_valids_1; + end + if(IBusCachedPlugin_fetchPc_flushed) begin + IBusCachedPlugin_injector_nextPcCalc_valids_2 <= 1'b0; + end + if(IBusCachedPlugin_fetchPc_flushed) begin + IBusCachedPlugin_injector_nextPcCalc_valids_3 <= 1'b0; + end + if(when_Fetcher_l329_3) begin + IBusCachedPlugin_injector_nextPcCalc_valids_3 <= IBusCachedPlugin_injector_nextPcCalc_valids_2; + end + if(IBusCachedPlugin_fetchPc_flushed) begin + IBusCachedPlugin_injector_nextPcCalc_valids_3 <= 1'b0; + end + if(IBusCachedPlugin_fetchPc_flushed) begin + IBusCachedPlugin_injector_nextPcCalc_valids_4 <= 1'b0; + end + if(when_Fetcher_l329_4) begin + IBusCachedPlugin_injector_nextPcCalc_valids_4 <= IBusCachedPlugin_injector_nextPcCalc_valids_3; + end + if(IBusCachedPlugin_fetchPc_flushed) begin + IBusCachedPlugin_injector_nextPcCalc_valids_4 <= 1'b0; + end + if(iBus_rsp_valid) begin + IBusCachedPlugin_rspCounter <= (IBusCachedPlugin_rspCounter + 32'h00000001); + end + if(dataCache_1_io_mem_cmd_valid) begin + dataCache_1_io_mem_cmd_rValid <= 1'b1; + end + if(dataCache_1_io_mem_cmd_s2mPipe_ready) begin + dataCache_1_io_mem_cmd_rValid <= 1'b0; + end + if(dataCache_1_io_mem_cmd_s2mPipe_ready) begin + dataCache_1_io_mem_cmd_s2mPipe_rValid <= dataCache_1_io_mem_cmd_s2mPipe_valid; + end + if(dBus_rsp_valid) begin + DBusCachedPlugin_rspCounter <= (DBusCachedPlugin_rspCounter + 32'h00000001); + end + _zz_7 <= 1'b0; + HazardSimplePlugin_writeBackBuffer_valid <= HazardSimplePlugin_writeBackWrites_valid; + if(when_CsrPlugin_l909) begin + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_decode <= 1'b0; + end else begin + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_decode <= CsrPlugin_exceptionPortCtrl_exceptionValids_decode; + end + if(when_CsrPlugin_l909_1) begin + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_execute <= (CsrPlugin_exceptionPortCtrl_exceptionValids_decode && (! decode_arbitration_isStuck)); + end else begin + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_execute <= CsrPlugin_exceptionPortCtrl_exceptionValids_execute; + end + if(when_CsrPlugin_l909_2) begin + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_memory <= (CsrPlugin_exceptionPortCtrl_exceptionValids_execute && (! execute_arbitration_isStuck)); + end else begin + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_memory <= CsrPlugin_exceptionPortCtrl_exceptionValids_memory; + end + if(when_CsrPlugin_l909_3) begin + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_writeBack <= (CsrPlugin_exceptionPortCtrl_exceptionValids_memory && (! memory_arbitration_isStuck)); + end else begin + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_writeBack <= 1'b0; + end + CsrPlugin_interrupt_valid <= 1'b0; + if(when_CsrPlugin_l946) begin + if(when_CsrPlugin_l952) begin + CsrPlugin_interrupt_valid <= 1'b1; + end + if(when_CsrPlugin_l952_1) begin + CsrPlugin_interrupt_valid <= 1'b1; + end + if(when_CsrPlugin_l952_2) begin + CsrPlugin_interrupt_valid <= 1'b1; + end + end + CsrPlugin_lastStageWasWfi <= (writeBack_arbitration_isFiring && (writeBack_ENV_CTRL == `EnvCtrlEnum_binary_sequential_WFI)); + if(CsrPlugin_pipelineLiberator_active) begin + if(when_CsrPlugin_l980) begin + CsrPlugin_pipelineLiberator_pcValids_0 <= 1'b1; + end + if(when_CsrPlugin_l980_1) begin + CsrPlugin_pipelineLiberator_pcValids_1 <= CsrPlugin_pipelineLiberator_pcValids_0; + end + if(when_CsrPlugin_l980_2) begin + CsrPlugin_pipelineLiberator_pcValids_2 <= CsrPlugin_pipelineLiberator_pcValids_1; + end + end + if(when_CsrPlugin_l985) begin + CsrPlugin_pipelineLiberator_pcValids_0 <= 1'b0; + CsrPlugin_pipelineLiberator_pcValids_1 <= 1'b0; + CsrPlugin_pipelineLiberator_pcValids_2 <= 1'b0; + end + if(CsrPlugin_interruptJump) begin + CsrPlugin_interrupt_valid <= 1'b0; + end + CsrPlugin_hadException <= CsrPlugin_exception; + if(when_CsrPlugin_l1019) begin + case(CsrPlugin_targetPrivilege) + 2'b11 : begin + CsrPlugin_mstatus_MIE <= 1'b0; + CsrPlugin_mstatus_MPIE <= CsrPlugin_mstatus_MIE; + CsrPlugin_mstatus_MPP <= CsrPlugin_privilege; + end + default : begin + end + endcase + end + if(when_CsrPlugin_l1064) begin + case(switch_CsrPlugin_l1068) + 2'b11 : begin + CsrPlugin_mstatus_MPP <= 2'b00; + CsrPlugin_mstatus_MIE <= CsrPlugin_mstatus_MPIE; + CsrPlugin_mstatus_MPIE <= 1'b1; + end + default : begin + end + endcase + end + execute_CsrPlugin_wfiWake <= (({_zz_when_CsrPlugin_l952_2,{_zz_when_CsrPlugin_l952_1,_zz_when_CsrPlugin_l952}} != 3'b000) || CsrPlugin_thirdPartyWake); + memory_DivPlugin_div_counter_value <= memory_DivPlugin_div_counter_valueNext; + if(execute_CfuPlugin_schedule) begin + execute_CfuPlugin_hold <= 1'b1; + end + if(CfuPlugin_bus_cmd_ready) begin + execute_CfuPlugin_hold <= 1'b0; + end + if(CfuPlugin_bus_cmd_fire) begin + execute_CfuPlugin_fired <= 1'b1; + end + if(when_CfuPlugin_l171) begin + execute_CfuPlugin_fired <= 1'b0; + end + if(CfuPlugin_bus_rsp_valid) begin + CfuPlugin_bus_rsp_rValid <= 1'b1; + end + if(CfuPlugin_bus_rsp_rsp_ready) begin + CfuPlugin_bus_rsp_rValid <= 1'b0; + end + if(when_Pipeline_l124_61) begin + execute_to_memory_CfuPlugin_CFU_IN_FLIGHT <= _zz_execute_to_memory_CfuPlugin_CFU_IN_FLIGHT; + end + if(when_Pipeline_l151) begin + execute_arbitration_isValid <= 1'b0; + end + if(when_Pipeline_l154) begin + execute_arbitration_isValid <= decode_arbitration_isValid; + end + if(when_Pipeline_l151_1) begin + memory_arbitration_isValid <= 1'b0; + end + if(when_Pipeline_l154_1) begin + memory_arbitration_isValid <= execute_arbitration_isValid; + end + if(when_Pipeline_l151_2) begin + writeBack_arbitration_isValid <= 1'b0; + end + if(when_Pipeline_l154_2) begin + writeBack_arbitration_isValid <= memory_arbitration_isValid; + end + if(execute_CsrPlugin_csr_769) begin + if(execute_CsrPlugin_writeEnable) begin + CsrPlugin_misa_base <= CsrPlugin_csrMapping_writeDataSignal[31 : 30]; + CsrPlugin_misa_extensions <= CsrPlugin_csrMapping_writeDataSignal[25 : 0]; + end + end + if(execute_CsrPlugin_csr_768) begin + if(execute_CsrPlugin_writeEnable) begin + CsrPlugin_mstatus_MPP <= CsrPlugin_csrMapping_writeDataSignal[12 : 11]; + CsrPlugin_mstatus_MPIE <= CsrPlugin_csrMapping_writeDataSignal[7]; + CsrPlugin_mstatus_MIE <= CsrPlugin_csrMapping_writeDataSignal[3]; + end + end + if(execute_CsrPlugin_csr_772) begin + if(execute_CsrPlugin_writeEnable) begin + CsrPlugin_mie_MEIE <= CsrPlugin_csrMapping_writeDataSignal[11]; + CsrPlugin_mie_MTIE <= CsrPlugin_csrMapping_writeDataSignal[7]; + CsrPlugin_mie_MSIE <= CsrPlugin_csrMapping_writeDataSignal[3]; + end + end + if(execute_CsrPlugin_csr_3008) begin + if(execute_CsrPlugin_writeEnable) begin + _zz_CsrPlugin_csrMapping_readDataInit <= CsrPlugin_csrMapping_writeDataSignal[31 : 0]; + end + end + if(when_InstructionCache_l239) begin + if(iBusWishbone_ACK) begin + _zz_iBusWishbone_ADR <= (_zz_iBusWishbone_ADR + 3'b001); + end + end + _zz_iBus_rsp_valid <= (iBusWishbone_CYC && iBusWishbone_ACK); + if((_zz_dBus_cmd_ready_1 && _zz_dBus_cmd_ready_2)) begin + _zz_dBus_cmd_ready <= (_zz_dBus_cmd_ready + 3'b001); + if(_zz_dBus_cmd_ready_4) begin + _zz_dBus_cmd_ready <= 3'b000; + end + end + _zz_dBus_rsp_valid <= ((_zz_dBus_cmd_ready_1 && (! dBusWishbone_WE)) && dBusWishbone_ACK); + end + end + + always @(posedge clk) begin + if(IBusCachedPlugin_iBusRsp_stages_1_output_ready) begin + _zz_IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_payload <= IBusCachedPlugin_iBusRsp_stages_1_output_payload; + end + if(IBusCachedPlugin_iBusRsp_stages_1_input_ready) begin + IBusCachedPlugin_s1_tightlyCoupledHit <= IBusCachedPlugin_s0_tightlyCoupledHit; + end + if(IBusCachedPlugin_iBusRsp_stages_2_input_ready) begin + IBusCachedPlugin_s2_tightlyCoupledHit <= IBusCachedPlugin_s1_tightlyCoupledHit; + end + if(dataCache_1_io_mem_cmd_ready) begin + dataCache_1_io_mem_cmd_rData_wr <= dataCache_1_io_mem_cmd_payload_wr; + dataCache_1_io_mem_cmd_rData_uncached <= dataCache_1_io_mem_cmd_payload_uncached; + dataCache_1_io_mem_cmd_rData_address <= dataCache_1_io_mem_cmd_payload_address; + dataCache_1_io_mem_cmd_rData_data <= dataCache_1_io_mem_cmd_payload_data; + dataCache_1_io_mem_cmd_rData_mask <= dataCache_1_io_mem_cmd_payload_mask; + dataCache_1_io_mem_cmd_rData_size <= dataCache_1_io_mem_cmd_payload_size; + dataCache_1_io_mem_cmd_rData_last <= dataCache_1_io_mem_cmd_payload_last; + end + if(dataCache_1_io_mem_cmd_s2mPipe_ready) begin + dataCache_1_io_mem_cmd_s2mPipe_rData_wr <= dataCache_1_io_mem_cmd_s2mPipe_payload_wr; + dataCache_1_io_mem_cmd_s2mPipe_rData_uncached <= dataCache_1_io_mem_cmd_s2mPipe_payload_uncached; + dataCache_1_io_mem_cmd_s2mPipe_rData_address <= dataCache_1_io_mem_cmd_s2mPipe_payload_address; + dataCache_1_io_mem_cmd_s2mPipe_rData_data <= dataCache_1_io_mem_cmd_s2mPipe_payload_data; + dataCache_1_io_mem_cmd_s2mPipe_rData_mask <= dataCache_1_io_mem_cmd_s2mPipe_payload_mask; + dataCache_1_io_mem_cmd_s2mPipe_rData_size <= dataCache_1_io_mem_cmd_s2mPipe_payload_size; + dataCache_1_io_mem_cmd_s2mPipe_rData_last <= dataCache_1_io_mem_cmd_s2mPipe_payload_last; + end + HazardSimplePlugin_writeBackBuffer_payload_address <= HazardSimplePlugin_writeBackWrites_payload_address; + HazardSimplePlugin_writeBackBuffer_payload_data <= HazardSimplePlugin_writeBackWrites_payload_data; + CsrPlugin_mip_MEIP <= externalInterrupt; + CsrPlugin_mip_MTIP <= timerInterrupt; + CsrPlugin_mip_MSIP <= softwareInterrupt; + CsrPlugin_mcycle <= (CsrPlugin_mcycle + 64'h0000000000000001); + if(writeBack_arbitration_isFiring) begin + CsrPlugin_minstret <= (CsrPlugin_minstret + 64'h0000000000000001); + end + if(_zz_when) begin + CsrPlugin_exceptionPortCtrl_exceptionContext_code <= (_zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_1 ? IBusCachedPlugin_decodeExceptionPort_payload_code : decodeExceptionPort_payload_code); + CsrPlugin_exceptionPortCtrl_exceptionContext_badAddr <= (_zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_1 ? IBusCachedPlugin_decodeExceptionPort_payload_badAddr : decodeExceptionPort_payload_badAddr); + end + if(_zz_when_1) begin + CsrPlugin_exceptionPortCtrl_exceptionContext_code <= (_zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_3 ? BranchPlugin_branchExceptionPort_payload_code : CsrPlugin_selfException_payload_code); + CsrPlugin_exceptionPortCtrl_exceptionContext_badAddr <= (_zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_3 ? BranchPlugin_branchExceptionPort_payload_badAddr : CsrPlugin_selfException_payload_badAddr); + end + if(DBusCachedPlugin_exceptionBus_valid) begin + CsrPlugin_exceptionPortCtrl_exceptionContext_code <= DBusCachedPlugin_exceptionBus_payload_code; + CsrPlugin_exceptionPortCtrl_exceptionContext_badAddr <= DBusCachedPlugin_exceptionBus_payload_badAddr; + end + if(when_CsrPlugin_l946) begin + if(when_CsrPlugin_l952) begin + CsrPlugin_interrupt_code <= 4'b0111; + CsrPlugin_interrupt_targetPrivilege <= 2'b11; + end + if(when_CsrPlugin_l952_1) begin + CsrPlugin_interrupt_code <= 4'b0011; + CsrPlugin_interrupt_targetPrivilege <= 2'b11; + end + if(when_CsrPlugin_l952_2) begin + CsrPlugin_interrupt_code <= 4'b1011; + CsrPlugin_interrupt_targetPrivilege <= 2'b11; + end + end + if(when_CsrPlugin_l1019) begin + case(CsrPlugin_targetPrivilege) + 2'b11 : begin + CsrPlugin_mcause_interrupt <= (! CsrPlugin_hadException); + CsrPlugin_mcause_exceptionCode <= CsrPlugin_trapCause; + CsrPlugin_mepc <= writeBack_PC; + if(CsrPlugin_hadException) begin + CsrPlugin_mtval <= CsrPlugin_exceptionPortCtrl_exceptionContext_badAddr; + end + end + default : begin + end + endcase + end + if(when_MulDivIterativePlugin_l126) begin + memory_DivPlugin_div_done <= 1'b1; + end + if(when_MulDivIterativePlugin_l126_1) begin + memory_DivPlugin_div_done <= 1'b0; + end + if(when_MulDivIterativePlugin_l128) begin + if(when_MulDivIterativePlugin_l132) begin + memory_DivPlugin_rs1[31 : 0] <= memory_DivPlugin_div_stage_0_outNumerator; + memory_DivPlugin_accumulator[31 : 0] <= memory_DivPlugin_div_stage_0_outRemainder; + if(when_MulDivIterativePlugin_l151) begin + memory_DivPlugin_div_result <= _zz_memory_DivPlugin_div_result_1[31:0]; + end + end + end + if(when_MulDivIterativePlugin_l162) begin + memory_DivPlugin_accumulator <= 65'h0; + memory_DivPlugin_rs1 <= ((_zz_memory_DivPlugin_rs1 ? (~ _zz_memory_DivPlugin_rs1_1) : _zz_memory_DivPlugin_rs1_1) + _zz_memory_DivPlugin_rs1_2); + memory_DivPlugin_rs2 <= ((_zz_memory_DivPlugin_rs2 ? (~ execute_RS2) : execute_RS2) + _zz_memory_DivPlugin_rs2_1); + memory_DivPlugin_div_needRevert <= ((_zz_memory_DivPlugin_rs1 ^ (_zz_memory_DivPlugin_rs2 && (! execute_INSTRUCTION[13]))) && (! (((execute_RS2 == 32'h0) && execute_IS_RS2_SIGNED) && (! execute_INSTRUCTION[13])))); + end + externalInterruptArray_regNext <= externalInterruptArray; + if(CfuPlugin_bus_rsp_ready) begin + CfuPlugin_bus_rsp_rData_outputs_0 <= CfuPlugin_bus_rsp_payload_outputs_0; + end + if(when_GenCoreDefault_l367) begin + _zz_CsrPlugin_csrMapping_readDataInit_2 <= (_zz_CsrPlugin_csrMapping_readDataInit_2 + 32'h00000001); + end + if(when_GenCoreDefault_l367_1) begin + _zz_CsrPlugin_csrMapping_readDataInit_3 <= (_zz_CsrPlugin_csrMapping_readDataInit_3 + 32'h00000001); + end + if(when_GenCoreDefault_l367_2) begin + _zz_CsrPlugin_csrMapping_readDataInit_4 <= (_zz_CsrPlugin_csrMapping_readDataInit_4 + 32'h00000001); + end + if(when_GenCoreDefault_l367_3) begin + _zz_CsrPlugin_csrMapping_readDataInit_5 <= (_zz_CsrPlugin_csrMapping_readDataInit_5 + 32'h00000001); + end + if(when_GenCoreDefault_l367_4) begin + _zz_CsrPlugin_csrMapping_readDataInit_6 <= (_zz_CsrPlugin_csrMapping_readDataInit_6 + 32'h00000001); + end + if(when_GenCoreDefault_l367_5) begin + _zz_CsrPlugin_csrMapping_readDataInit_7 <= (_zz_CsrPlugin_csrMapping_readDataInit_7 + 32'h00000001); + end + if(when_GenCoreDefault_l367_6) begin + _zz_CsrPlugin_csrMapping_readDataInit_8 <= (_zz_CsrPlugin_csrMapping_readDataInit_8 + 32'h00000001); + end + if(when_GenCoreDefault_l367_7) begin + _zz_CsrPlugin_csrMapping_readDataInit_9 <= (_zz_CsrPlugin_csrMapping_readDataInit_9 + 32'h00000001); + end + if(when_Pipeline_l124) begin + decode_to_execute_PC <= decode_PC; + end + if(when_Pipeline_l124_1) begin + execute_to_memory_PC <= _zz_execute_SRC2; + end + if(when_Pipeline_l124_2) begin + memory_to_writeBack_PC <= memory_PC; + end + if(when_Pipeline_l124_3) begin + decode_to_execute_INSTRUCTION <= decode_INSTRUCTION; + end + if(when_Pipeline_l124_4) begin + execute_to_memory_INSTRUCTION <= execute_INSTRUCTION; + end + if(when_Pipeline_l124_5) begin + memory_to_writeBack_INSTRUCTION <= memory_INSTRUCTION; + end + if(when_Pipeline_l124_6) begin + decode_to_execute_FORMAL_PC_NEXT <= _zz_decode_to_execute_FORMAL_PC_NEXT; + end + if(when_Pipeline_l124_7) begin + execute_to_memory_FORMAL_PC_NEXT <= _zz_execute_to_memory_FORMAL_PC_NEXT; + end + if(when_Pipeline_l124_8) begin + memory_to_writeBack_FORMAL_PC_NEXT <= memory_FORMAL_PC_NEXT; + end + if(when_Pipeline_l124_9) begin + decode_to_execute_MEMORY_FORCE_CONSTISTENCY <= decode_MEMORY_FORCE_CONSTISTENCY; + end + if(when_Pipeline_l124_10) begin + decode_to_execute_SRC1_CTRL <= _zz_decode_to_execute_SRC1_CTRL; + end + if(when_Pipeline_l124_11) begin + decode_to_execute_SRC_USE_SUB_LESS <= decode_SRC_USE_SUB_LESS; + end + if(when_Pipeline_l124_12) begin + decode_to_execute_MEMORY_ENABLE <= decode_MEMORY_ENABLE; + end + if(when_Pipeline_l124_13) begin + execute_to_memory_MEMORY_ENABLE <= execute_MEMORY_ENABLE; + end + if(when_Pipeline_l124_14) begin + memory_to_writeBack_MEMORY_ENABLE <= memory_MEMORY_ENABLE; + end + if(when_Pipeline_l124_15) begin + decode_to_execute_ALU_CTRL <= _zz_decode_to_execute_ALU_CTRL; + end + if(when_Pipeline_l124_16) begin + decode_to_execute_SRC2_CTRL <= _zz_decode_to_execute_SRC2_CTRL; + end + if(when_Pipeline_l124_17) begin + decode_to_execute_REGFILE_WRITE_VALID <= decode_REGFILE_WRITE_VALID; + end + if(when_Pipeline_l124_18) begin + execute_to_memory_REGFILE_WRITE_VALID <= execute_REGFILE_WRITE_VALID; + end + if(when_Pipeline_l124_19) begin + memory_to_writeBack_REGFILE_WRITE_VALID <= memory_REGFILE_WRITE_VALID; + end + if(when_Pipeline_l124_20) begin + decode_to_execute_BYPASSABLE_EXECUTE_STAGE <= decode_BYPASSABLE_EXECUTE_STAGE; + end + if(when_Pipeline_l124_21) begin + decode_to_execute_BYPASSABLE_MEMORY_STAGE <= decode_BYPASSABLE_MEMORY_STAGE; + end + if(when_Pipeline_l124_22) begin + execute_to_memory_BYPASSABLE_MEMORY_STAGE <= execute_BYPASSABLE_MEMORY_STAGE; + end + if(when_Pipeline_l124_23) begin + decode_to_execute_MEMORY_WR <= decode_MEMORY_WR; + end + if(when_Pipeline_l124_24) begin + execute_to_memory_MEMORY_WR <= execute_MEMORY_WR; + end + if(when_Pipeline_l124_25) begin + memory_to_writeBack_MEMORY_WR <= memory_MEMORY_WR; + end + if(when_Pipeline_l124_26) begin + decode_to_execute_MEMORY_MANAGMENT <= decode_MEMORY_MANAGMENT; + end + if(when_Pipeline_l124_27) begin + decode_to_execute_SRC_LESS_UNSIGNED <= decode_SRC_LESS_UNSIGNED; + end + if(when_Pipeline_l124_28) begin + decode_to_execute_ALU_BITWISE_CTRL <= _zz_decode_to_execute_ALU_BITWISE_CTRL; + end + if(when_Pipeline_l124_29) begin + decode_to_execute_SHIFT_CTRL <= _zz_decode_to_execute_SHIFT_CTRL; + end + if(when_Pipeline_l124_30) begin + execute_to_memory_SHIFT_CTRL <= _zz_execute_to_memory_SHIFT_CTRL; + end + if(when_Pipeline_l124_31) begin + decode_to_execute_BRANCH_CTRL <= _zz_decode_to_execute_BRANCH_CTRL; + end + if(when_Pipeline_l124_32) begin + decode_to_execute_IS_CSR <= decode_IS_CSR; + end + if(when_Pipeline_l124_33) begin + decode_to_execute_ENV_CTRL <= _zz_decode_to_execute_ENV_CTRL; + end + if(when_Pipeline_l124_34) begin + execute_to_memory_ENV_CTRL <= _zz_execute_to_memory_ENV_CTRL; + end + if(when_Pipeline_l124_35) begin + memory_to_writeBack_ENV_CTRL <= _zz_memory_to_writeBack_ENV_CTRL; + end + if(when_Pipeline_l124_36) begin + decode_to_execute_IS_MUL <= decode_IS_MUL; + end + if(when_Pipeline_l124_37) begin + execute_to_memory_IS_MUL <= execute_IS_MUL; + end + if(when_Pipeline_l124_38) begin + memory_to_writeBack_IS_MUL <= memory_IS_MUL; + end + if(when_Pipeline_l124_39) begin + decode_to_execute_IS_DIV <= decode_IS_DIV; + end + if(when_Pipeline_l124_40) begin + execute_to_memory_IS_DIV <= execute_IS_DIV; + end + if(when_Pipeline_l124_41) begin + decode_to_execute_IS_RS1_SIGNED <= decode_IS_RS1_SIGNED; + end + if(when_Pipeline_l124_42) begin + decode_to_execute_IS_RS2_SIGNED <= decode_IS_RS2_SIGNED; + end + if(when_Pipeline_l124_43) begin + decode_to_execute_CfuPlugin_CFU_ENABLE <= decode_CfuPlugin_CFU_ENABLE; + end + if(when_Pipeline_l124_44) begin + decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND <= _zz_decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND; + end + if(when_Pipeline_l124_45) begin + decode_to_execute_RS1 <= decode_RS1; + end + if(when_Pipeline_l124_46) begin + decode_to_execute_RS2 <= decode_RS2; + end + if(when_Pipeline_l124_47) begin + decode_to_execute_SRC2_FORCE_ZERO <= decode_SRC2_FORCE_ZERO; + end + if(when_Pipeline_l124_48) begin + decode_to_execute_PREDICTION_HAD_BRANCHED2 <= decode_PREDICTION_HAD_BRANCHED2; + end + if(when_Pipeline_l124_49) begin + decode_to_execute_CSR_WRITE_OPCODE <= decode_CSR_WRITE_OPCODE; + end + if(when_Pipeline_l124_50) begin + decode_to_execute_CSR_READ_OPCODE <= decode_CSR_READ_OPCODE; + end + if(when_Pipeline_l124_51) begin + execute_to_memory_MEMORY_STORE_DATA_RF <= execute_MEMORY_STORE_DATA_RF; + end + if(when_Pipeline_l124_52) begin + memory_to_writeBack_MEMORY_STORE_DATA_RF <= memory_MEMORY_STORE_DATA_RF; + end + if(when_Pipeline_l124_53) begin + execute_to_memory_REGFILE_WRITE_DATA <= _zz_decode_RS2; + end + if(when_Pipeline_l124_54) begin + memory_to_writeBack_REGFILE_WRITE_DATA <= _zz_decode_RS2_1; + end + if(when_Pipeline_l124_55) begin + execute_to_memory_SHIFT_RIGHT <= execute_SHIFT_RIGHT; + end + if(when_Pipeline_l124_56) begin + execute_to_memory_MUL_LL <= execute_MUL_LL; + end + if(when_Pipeline_l124_57) begin + execute_to_memory_MUL_LH <= execute_MUL_LH; + end + if(when_Pipeline_l124_58) begin + execute_to_memory_MUL_HL <= execute_MUL_HL; + end + if(when_Pipeline_l124_59) begin + execute_to_memory_MUL_HH <= execute_MUL_HH; + end + if(when_Pipeline_l124_60) begin + memory_to_writeBack_MUL_HH <= memory_MUL_HH; + end + if(when_Pipeline_l124_62) begin + memory_to_writeBack_CfuPlugin_CFU_IN_FLIGHT <= _zz_memory_to_writeBack_CfuPlugin_CFU_IN_FLIGHT; + end + if(when_Pipeline_l124_63) begin + memory_to_writeBack_MUL_LOW <= memory_MUL_LOW; + end + if(when_CsrPlugin_l1264) begin + execute_CsrPlugin_csr_3264 <= (decode_INSTRUCTION[31 : 20] == 12'hcc0); + end + if(when_CsrPlugin_l1264_1) begin + execute_CsrPlugin_csr_3857 <= (decode_INSTRUCTION[31 : 20] == 12'hf11); + end + if(when_CsrPlugin_l1264_2) begin + execute_CsrPlugin_csr_3858 <= (decode_INSTRUCTION[31 : 20] == 12'hf12); + end + if(when_CsrPlugin_l1264_3) begin + execute_CsrPlugin_csr_3859 <= (decode_INSTRUCTION[31 : 20] == 12'hf13); + end + if(when_CsrPlugin_l1264_4) begin + execute_CsrPlugin_csr_3860 <= (decode_INSTRUCTION[31 : 20] == 12'hf14); + end + if(when_CsrPlugin_l1264_5) begin + execute_CsrPlugin_csr_769 <= (decode_INSTRUCTION[31 : 20] == 12'h301); + end + if(when_CsrPlugin_l1264_6) begin + execute_CsrPlugin_csr_768 <= (decode_INSTRUCTION[31 : 20] == 12'h300); + end + if(when_CsrPlugin_l1264_7) begin + execute_CsrPlugin_csr_836 <= (decode_INSTRUCTION[31 : 20] == 12'h344); + end + if(when_CsrPlugin_l1264_8) begin + execute_CsrPlugin_csr_772 <= (decode_INSTRUCTION[31 : 20] == 12'h304); + end + if(when_CsrPlugin_l1264_9) begin + execute_CsrPlugin_csr_773 <= (decode_INSTRUCTION[31 : 20] == 12'h305); + end + if(when_CsrPlugin_l1264_10) begin + execute_CsrPlugin_csr_833 <= (decode_INSTRUCTION[31 : 20] == 12'h341); + end + if(when_CsrPlugin_l1264_11) begin + execute_CsrPlugin_csr_832 <= (decode_INSTRUCTION[31 : 20] == 12'h340); + end + if(when_CsrPlugin_l1264_12) begin + execute_CsrPlugin_csr_834 <= (decode_INSTRUCTION[31 : 20] == 12'h342); + end + if(when_CsrPlugin_l1264_13) begin + execute_CsrPlugin_csr_835 <= (decode_INSTRUCTION[31 : 20] == 12'h343); + end + if(when_CsrPlugin_l1264_14) begin + execute_CsrPlugin_csr_2816 <= (decode_INSTRUCTION[31 : 20] == 12'hb00); + end + if(when_CsrPlugin_l1264_15) begin + execute_CsrPlugin_csr_2944 <= (decode_INSTRUCTION[31 : 20] == 12'hb80); + end + if(when_CsrPlugin_l1264_16) begin + execute_CsrPlugin_csr_2818 <= (decode_INSTRUCTION[31 : 20] == 12'hb02); + end + if(when_CsrPlugin_l1264_17) begin + execute_CsrPlugin_csr_2946 <= (decode_INSTRUCTION[31 : 20] == 12'hb82); + end + if(when_CsrPlugin_l1264_18) begin + execute_CsrPlugin_csr_3072 <= (decode_INSTRUCTION[31 : 20] == 12'hc00); + end + if(when_CsrPlugin_l1264_19) begin + execute_CsrPlugin_csr_3200 <= (decode_INSTRUCTION[31 : 20] == 12'hc80); + end + if(when_CsrPlugin_l1264_20) begin + execute_CsrPlugin_csr_3074 <= (decode_INSTRUCTION[31 : 20] == 12'hc02); + end + if(when_CsrPlugin_l1264_21) begin + execute_CsrPlugin_csr_3202 <= (decode_INSTRUCTION[31 : 20] == 12'hc82); + end + if(when_CsrPlugin_l1264_22) begin + execute_CsrPlugin_csr_3008 <= (decode_INSTRUCTION[31 : 20] == 12'hbc0); + end + if(when_CsrPlugin_l1264_23) begin + execute_CsrPlugin_csr_4032 <= (decode_INSTRUCTION[31 : 20] == 12'hfc0); + end + if(when_CsrPlugin_l1264_24) begin + execute_CsrPlugin_csr_2820 <= (decode_INSTRUCTION[31 : 20] == 12'hb04); + end + if(when_CsrPlugin_l1264_25) begin + execute_CsrPlugin_csr_2821 <= (decode_INSTRUCTION[31 : 20] == 12'hb05); + end + if(when_CsrPlugin_l1264_26) begin + execute_CsrPlugin_csr_2822 <= (decode_INSTRUCTION[31 : 20] == 12'hb06); + end + if(when_CsrPlugin_l1264_27) begin + execute_CsrPlugin_csr_2823 <= (decode_INSTRUCTION[31 : 20] == 12'hb07); + end + if(when_CsrPlugin_l1264_28) begin + execute_CsrPlugin_csr_2824 <= (decode_INSTRUCTION[31 : 20] == 12'hb08); + end + if(when_CsrPlugin_l1264_29) begin + execute_CsrPlugin_csr_2825 <= (decode_INSTRUCTION[31 : 20] == 12'hb09); + end + if(when_CsrPlugin_l1264_30) begin + execute_CsrPlugin_csr_2826 <= (decode_INSTRUCTION[31 : 20] == 12'hb0a); + end + if(when_CsrPlugin_l1264_31) begin + execute_CsrPlugin_csr_2827 <= (decode_INSTRUCTION[31 : 20] == 12'hb0b); + end + if(when_CsrPlugin_l1264_32) begin + execute_CsrPlugin_csr_2828 <= (decode_INSTRUCTION[31 : 20] == 12'hb0c); + end + if(when_CsrPlugin_l1264_33) begin + execute_CsrPlugin_csr_2829 <= (decode_INSTRUCTION[31 : 20] == 12'hb0d); + end + if(when_CsrPlugin_l1264_34) begin + execute_CsrPlugin_csr_2830 <= (decode_INSTRUCTION[31 : 20] == 12'hb0e); + end + if(when_CsrPlugin_l1264_35) begin + execute_CsrPlugin_csr_2831 <= (decode_INSTRUCTION[31 : 20] == 12'hb0f); + end + if(when_CsrPlugin_l1264_36) begin + execute_CsrPlugin_csr_2832 <= (decode_INSTRUCTION[31 : 20] == 12'hb10); + end + if(when_CsrPlugin_l1264_37) begin + execute_CsrPlugin_csr_2833 <= (decode_INSTRUCTION[31 : 20] == 12'hb11); + end + if(when_CsrPlugin_l1264_38) begin + execute_CsrPlugin_csr_2834 <= (decode_INSTRUCTION[31 : 20] == 12'hb12); + end + if(when_CsrPlugin_l1264_39) begin + execute_CsrPlugin_csr_2835 <= (decode_INSTRUCTION[31 : 20] == 12'hb13); + end + if(execute_CsrPlugin_csr_836) begin + if(execute_CsrPlugin_writeEnable) begin + CsrPlugin_mip_MSIP <= CsrPlugin_csrMapping_writeDataSignal[3]; + end + end + if(execute_CsrPlugin_csr_773) begin + if(execute_CsrPlugin_writeEnable) begin + CsrPlugin_mtvec_base <= CsrPlugin_csrMapping_writeDataSignal[31 : 2]; + CsrPlugin_mtvec_mode <= CsrPlugin_csrMapping_writeDataSignal[1 : 0]; + end + end + if(execute_CsrPlugin_csr_833) begin + if(execute_CsrPlugin_writeEnable) begin + CsrPlugin_mepc <= CsrPlugin_csrMapping_writeDataSignal[31 : 0]; + end + end + if(execute_CsrPlugin_csr_832) begin + if(execute_CsrPlugin_writeEnable) begin + CsrPlugin_mscratch <= CsrPlugin_csrMapping_writeDataSignal[31 : 0]; + end + end + if(execute_CsrPlugin_csr_834) begin + if(execute_CsrPlugin_writeEnable) begin + CsrPlugin_mcause_interrupt <= CsrPlugin_csrMapping_writeDataSignal[31]; + CsrPlugin_mcause_exceptionCode <= CsrPlugin_csrMapping_writeDataSignal[3 : 0]; + end + end + if(execute_CsrPlugin_csr_835) begin + if(execute_CsrPlugin_writeEnable) begin + CsrPlugin_mtval <= CsrPlugin_csrMapping_writeDataSignal[31 : 0]; + end + end + if(execute_CsrPlugin_csr_2816) begin + if(execute_CsrPlugin_writeEnable) begin + CsrPlugin_mcycle[31 : 0] <= CsrPlugin_csrMapping_writeDataSignal[31 : 0]; + end + end + if(execute_CsrPlugin_csr_2944) begin + if(execute_CsrPlugin_writeEnable) begin + CsrPlugin_mcycle[63 : 32] <= CsrPlugin_csrMapping_writeDataSignal[31 : 0]; + end + end + if(execute_CsrPlugin_csr_2818) begin + if(execute_CsrPlugin_writeEnable) begin + CsrPlugin_minstret[31 : 0] <= CsrPlugin_csrMapping_writeDataSignal[31 : 0]; + end + end + if(execute_CsrPlugin_csr_2946) begin + if(execute_CsrPlugin_writeEnable) begin + CsrPlugin_minstret[63 : 32] <= CsrPlugin_csrMapping_writeDataSignal[31 : 0]; + end + end + if(execute_CsrPlugin_csr_2820) begin + if(execute_CsrPlugin_writeEnable) begin + _zz_CsrPlugin_csrMapping_readDataInit_2 <= CsrPlugin_csrMapping_writeDataSignal[31 : 0]; + end + end + if(execute_CsrPlugin_csr_2821) begin + if(execute_CsrPlugin_writeEnable) begin + _zz_when_GenCoreDefault_l367 <= CsrPlugin_csrMapping_writeDataSignal[31 : 0]; + end + end + if(execute_CsrPlugin_csr_2822) begin + if(execute_CsrPlugin_writeEnable) begin + _zz_CsrPlugin_csrMapping_readDataInit_3 <= CsrPlugin_csrMapping_writeDataSignal[31 : 0]; + end + end + if(execute_CsrPlugin_csr_2823) begin + if(execute_CsrPlugin_writeEnable) begin + _zz_when_GenCoreDefault_l367_1 <= CsrPlugin_csrMapping_writeDataSignal[31 : 0]; + end + end + if(execute_CsrPlugin_csr_2824) begin + if(execute_CsrPlugin_writeEnable) begin + _zz_CsrPlugin_csrMapping_readDataInit_4 <= CsrPlugin_csrMapping_writeDataSignal[31 : 0]; + end + end + if(execute_CsrPlugin_csr_2825) begin + if(execute_CsrPlugin_writeEnable) begin + _zz_when_GenCoreDefault_l367_2 <= CsrPlugin_csrMapping_writeDataSignal[31 : 0]; + end + end + if(execute_CsrPlugin_csr_2826) begin + if(execute_CsrPlugin_writeEnable) begin + _zz_CsrPlugin_csrMapping_readDataInit_5 <= CsrPlugin_csrMapping_writeDataSignal[31 : 0]; + end + end + if(execute_CsrPlugin_csr_2827) begin + if(execute_CsrPlugin_writeEnable) begin + _zz_when_GenCoreDefault_l367_3 <= CsrPlugin_csrMapping_writeDataSignal[31 : 0]; + end + end + if(execute_CsrPlugin_csr_2828) begin + if(execute_CsrPlugin_writeEnable) begin + _zz_CsrPlugin_csrMapping_readDataInit_6 <= CsrPlugin_csrMapping_writeDataSignal[31 : 0]; + end + end + if(execute_CsrPlugin_csr_2829) begin + if(execute_CsrPlugin_writeEnable) begin + _zz_when_GenCoreDefault_l367_4 <= CsrPlugin_csrMapping_writeDataSignal[31 : 0]; + end + end + if(execute_CsrPlugin_csr_2830) begin + if(execute_CsrPlugin_writeEnable) begin + _zz_CsrPlugin_csrMapping_readDataInit_7 <= CsrPlugin_csrMapping_writeDataSignal[31 : 0]; + end + end + if(execute_CsrPlugin_csr_2831) begin + if(execute_CsrPlugin_writeEnable) begin + _zz_when_GenCoreDefault_l367_5 <= CsrPlugin_csrMapping_writeDataSignal[31 : 0]; + end + end + if(execute_CsrPlugin_csr_2832) begin + if(execute_CsrPlugin_writeEnable) begin + _zz_CsrPlugin_csrMapping_readDataInit_8 <= CsrPlugin_csrMapping_writeDataSignal[31 : 0]; + end + end + if(execute_CsrPlugin_csr_2833) begin + if(execute_CsrPlugin_writeEnable) begin + _zz_when_GenCoreDefault_l367_6 <= CsrPlugin_csrMapping_writeDataSignal[31 : 0]; + end + end + if(execute_CsrPlugin_csr_2834) begin + if(execute_CsrPlugin_writeEnable) begin + _zz_CsrPlugin_csrMapping_readDataInit_9 <= CsrPlugin_csrMapping_writeDataSignal[31 : 0]; + end + end + if(execute_CsrPlugin_csr_2835) begin + if(execute_CsrPlugin_writeEnable) begin + _zz_when_GenCoreDefault_l367_7 <= CsrPlugin_csrMapping_writeDataSignal[31 : 0]; + end + end + iBusWishbone_DAT_MISO_regNext <= iBusWishbone_DAT_MISO; + dBusWishbone_DAT_MISO_regNext <= dBusWishbone_DAT_MISO; + end + + +endmodule + +module DataCache ( + input io_cpu_execute_isValid, + input [31:0] io_cpu_execute_address, + output reg io_cpu_execute_haltIt, + input io_cpu_execute_args_wr, + input [1:0] io_cpu_execute_args_size, + input io_cpu_execute_args_totalyConsistent, + output io_cpu_execute_refilling, + input io_cpu_memory_isValid, + input io_cpu_memory_isStuck, + output io_cpu_memory_isWrite, + input [31:0] io_cpu_memory_address, + input [31:0] io_cpu_memory_mmuRsp_physicalAddress, + input io_cpu_memory_mmuRsp_isIoAccess, + input io_cpu_memory_mmuRsp_isPaging, + input io_cpu_memory_mmuRsp_allowRead, + input io_cpu_memory_mmuRsp_allowWrite, + input io_cpu_memory_mmuRsp_allowExecute, + input io_cpu_memory_mmuRsp_exception, + input io_cpu_memory_mmuRsp_refilling, + input io_cpu_memory_mmuRsp_bypassTranslation, + input io_cpu_writeBack_isValid, + input io_cpu_writeBack_isStuck, + input io_cpu_writeBack_isUser, + output reg io_cpu_writeBack_haltIt, + output io_cpu_writeBack_isWrite, + input [31:0] io_cpu_writeBack_storeData, + output reg [31:0] io_cpu_writeBack_data, + input [31:0] io_cpu_writeBack_address, + output io_cpu_writeBack_mmuException, + output io_cpu_writeBack_unalignedAccess, + output reg io_cpu_writeBack_accessError, + output io_cpu_writeBack_keepMemRspData, + input io_cpu_writeBack_fence_SW, + input io_cpu_writeBack_fence_SR, + input io_cpu_writeBack_fence_SO, + input io_cpu_writeBack_fence_SI, + input io_cpu_writeBack_fence_PW, + input io_cpu_writeBack_fence_PR, + input io_cpu_writeBack_fence_PO, + input io_cpu_writeBack_fence_PI, + input [3:0] io_cpu_writeBack_fence_FM, + output io_cpu_writeBack_exclusiveOk, + output reg io_cpu_redo, + input io_cpu_flush_valid, + output io_cpu_flush_ready, + output reg io_mem_cmd_valid, + input io_mem_cmd_ready, + output reg io_mem_cmd_payload_wr, + output io_mem_cmd_payload_uncached, + output reg [31:0] io_mem_cmd_payload_address, + output [31:0] io_mem_cmd_payload_data, + output [3:0] io_mem_cmd_payload_mask, + output reg [2:0] io_mem_cmd_payload_size, + output io_mem_cmd_payload_last, + input io_mem_rsp_valid, + input io_mem_rsp_payload_last, + input [31:0] io_mem_rsp_payload_data, + input io_mem_rsp_payload_error, + input clk, + input reset +); + reg [21:0] _zz_ways_0_tags_port0; + reg [31:0] _zz_ways_0_data_port0; + wire [21:0] _zz_ways_0_tags_port; + wire [9:0] _zz_stage0_dataColisions; + wire [9:0] _zz__zz_stageA_dataColisions; + wire [0:0] _zz_when; + wire [2:0] _zz_loader_counter_valueNext; + wire [0:0] _zz_loader_counter_valueNext_1; + wire [1:0] _zz_loader_waysAllocator; + reg _zz_1; + reg _zz_2; + wire haltCpu; + reg tagsReadCmd_valid; + reg [6:0] tagsReadCmd_payload; + reg tagsWriteCmd_valid; + reg [0:0] tagsWriteCmd_payload_way; + reg [6:0] tagsWriteCmd_payload_address; + reg tagsWriteCmd_payload_data_valid; + reg tagsWriteCmd_payload_data_error; + reg [19:0] tagsWriteCmd_payload_data_address; + reg tagsWriteLastCmd_valid; + reg [0:0] tagsWriteLastCmd_payload_way; + reg [6:0] tagsWriteLastCmd_payload_address; + reg tagsWriteLastCmd_payload_data_valid; + reg tagsWriteLastCmd_payload_data_error; + reg [19:0] tagsWriteLastCmd_payload_data_address; + reg dataReadCmd_valid; + reg [9:0] dataReadCmd_payload; + reg dataWriteCmd_valid; + reg [0:0] dataWriteCmd_payload_way; + reg [9:0] dataWriteCmd_payload_address; + reg [31:0] dataWriteCmd_payload_data; + reg [3:0] dataWriteCmd_payload_mask; + wire _zz_ways_0_tagsReadRsp_valid; + wire ways_0_tagsReadRsp_valid; + wire ways_0_tagsReadRsp_error; + wire [19:0] ways_0_tagsReadRsp_address; + wire [21:0] _zz_ways_0_tagsReadRsp_valid_1; + wire _zz_ways_0_dataReadRspMem; + wire [31:0] ways_0_dataReadRspMem; + wire [31:0] ways_0_dataReadRsp; + wire when_DataCache_l634; + wire when_DataCache_l637; + wire when_DataCache_l656; + wire rspSync; + wire rspLast; + reg memCmdSent; + wire io_mem_cmd_fire; + wire when_DataCache_l678; + reg [3:0] _zz_stage0_mask; + wire [3:0] stage0_mask; + wire [0:0] stage0_dataColisions; + wire [0:0] stage0_wayInvalidate; + wire stage0_isAmo; + wire when_DataCache_l763; + reg stageA_request_wr; + reg [1:0] stageA_request_size; + reg stageA_request_totalyConsistent; + wire when_DataCache_l763_1; + reg [3:0] stageA_mask; + wire stageA_isAmo; + wire stageA_isLrsc; + wire [0:0] stageA_wayHits; + wire when_DataCache_l763_2; + reg [0:0] stageA_wayInvalidate; + wire when_DataCache_l763_3; + reg [0:0] stage0_dataColisions_regNextWhen; + wire [0:0] _zz_stageA_dataColisions; + wire [0:0] stageA_dataColisions; + wire when_DataCache_l814; + reg stageB_request_wr; + reg [1:0] stageB_request_size; + reg stageB_request_totalyConsistent; + reg stageB_mmuRspFreeze; + wire when_DataCache_l816; + reg [31:0] stageB_mmuRsp_physicalAddress; + reg stageB_mmuRsp_isIoAccess; + reg stageB_mmuRsp_isPaging; + reg stageB_mmuRsp_allowRead; + reg stageB_mmuRsp_allowWrite; + reg stageB_mmuRsp_allowExecute; + reg stageB_mmuRsp_exception; + reg stageB_mmuRsp_refilling; + reg stageB_mmuRsp_bypassTranslation; + wire when_DataCache_l813; + reg stageB_tagsReadRsp_0_valid; + reg stageB_tagsReadRsp_0_error; + reg [19:0] stageB_tagsReadRsp_0_address; + wire when_DataCache_l813_1; + reg [31:0] stageB_dataReadRsp_0; + wire when_DataCache_l812; + reg [0:0] stageB_wayInvalidate; + wire stageB_consistancyHazard; + wire when_DataCache_l812_1; + reg [0:0] stageB_dataColisions; + wire when_DataCache_l812_2; + reg stageB_unaligned; + wire when_DataCache_l812_3; + reg [0:0] stageB_waysHitsBeforeInvalidate; + wire [0:0] stageB_waysHits; + wire stageB_waysHit; + wire [31:0] stageB_dataMux; + wire when_DataCache_l812_4; + reg [3:0] stageB_mask; + reg stageB_loaderValid; + wire [31:0] stageB_ioMemRspMuxed; + reg stageB_flusher_waitDone; + wire stageB_flusher_hold; + reg [7:0] stageB_flusher_counter; + wire when_DataCache_l842; + wire when_DataCache_l848; + reg stageB_flusher_start; + wire stageB_isAmo; + wire stageB_isAmoCached; + wire stageB_isExternalLsrc; + wire stageB_isExternalAmo; + wire [31:0] stageB_requestDataBypass; + reg stageB_cpuWriteToCache; + wire when_DataCache_l911; + wire stageB_badPermissions; + wire stageB_loadStoreFault; + wire stageB_bypassCache; + wire when_DataCache_l980; + wire when_DataCache_l989; + wire when_DataCache_l994; + wire when_DataCache_l1005; + wire when_DataCache_l1017; + wire when_DataCache_l976; + wire when_DataCache_l1051; + wire when_DataCache_l1060; + reg loader_valid; + reg loader_counter_willIncrement; + wire loader_counter_willClear; + reg [2:0] loader_counter_valueNext; + reg [2:0] loader_counter_value; + wire loader_counter_willOverflowIfInc; + wire loader_counter_willOverflow; + reg [0:0] loader_waysAllocator; + reg loader_error; + wire loader_kill; + reg loader_killReg; + wire when_DataCache_l1075; + wire loader_done; + wire when_DataCache_l1103; + reg loader_valid_regNext; + wire when_DataCache_l1107; + wire when_DataCache_l1110; + (* ram_style = "block" *) reg [21:0] ways_0_tags [0:127]; + (* ram_style = "block" *) reg [7:0] ways_0_data_symbol0 [0:1023]; + (* ram_style = "block" *) reg [7:0] ways_0_data_symbol1 [0:1023]; + (* ram_style = "block" *) reg [7:0] ways_0_data_symbol2 [0:1023]; + (* ram_style = "block" *) reg [7:0] ways_0_data_symbol3 [0:1023]; + reg [7:0] _zz_ways_0_datasymbol_read; + reg [7:0] _zz_ways_0_datasymbol_read_1; + reg [7:0] _zz_ways_0_datasymbol_read_2; + reg [7:0] _zz_ways_0_datasymbol_read_3; + + assign _zz_stage0_dataColisions = (io_cpu_execute_address[11 : 2] >>> 0); + assign _zz__zz_stageA_dataColisions = (io_cpu_memory_address[11 : 2] >>> 0); + assign _zz_when = 1'b1; + assign _zz_loader_counter_valueNext_1 = loader_counter_willIncrement; + assign _zz_loader_counter_valueNext = {2'd0, _zz_loader_counter_valueNext_1}; + assign _zz_loader_waysAllocator = {loader_waysAllocator,loader_waysAllocator[0]}; + assign _zz_ways_0_tags_port = {tagsWriteCmd_payload_data_address,{tagsWriteCmd_payload_data_error,tagsWriteCmd_payload_data_valid}}; + always @(posedge clk) begin + if(_zz_ways_0_tagsReadRsp_valid) begin + _zz_ways_0_tags_port0 <= ways_0_tags[tagsReadCmd_payload]; + end + end + + always @(posedge clk) begin + if(_zz_2) begin + ways_0_tags[tagsWriteCmd_payload_address] <= _zz_ways_0_tags_port; + end + end + + always @(*) begin + _zz_ways_0_data_port0 = {_zz_ways_0_datasymbol_read_3, _zz_ways_0_datasymbol_read_2, _zz_ways_0_datasymbol_read_1, _zz_ways_0_datasymbol_read}; + end + always @(posedge clk) begin + if(_zz_ways_0_dataReadRspMem) begin + _zz_ways_0_datasymbol_read <= ways_0_data_symbol0[dataReadCmd_payload]; + _zz_ways_0_datasymbol_read_1 <= ways_0_data_symbol1[dataReadCmd_payload]; + _zz_ways_0_datasymbol_read_2 <= ways_0_data_symbol2[dataReadCmd_payload]; + _zz_ways_0_datasymbol_read_3 <= ways_0_data_symbol3[dataReadCmd_payload]; + end + end + + always @(posedge clk) begin + if(dataWriteCmd_payload_mask[0] && _zz_1) begin + ways_0_data_symbol0[dataWriteCmd_payload_address] <= dataWriteCmd_payload_data[7 : 0]; + end + if(dataWriteCmd_payload_mask[1] && _zz_1) begin + ways_0_data_symbol1[dataWriteCmd_payload_address] <= dataWriteCmd_payload_data[15 : 8]; + end + if(dataWriteCmd_payload_mask[2] && _zz_1) begin + ways_0_data_symbol2[dataWriteCmd_payload_address] <= dataWriteCmd_payload_data[23 : 16]; + end + if(dataWriteCmd_payload_mask[3] && _zz_1) begin + ways_0_data_symbol3[dataWriteCmd_payload_address] <= dataWriteCmd_payload_data[31 : 24]; + end + end + + always @(*) begin + _zz_1 = 1'b0; + if(when_DataCache_l637) begin + _zz_1 = 1'b1; + end + end + + always @(*) begin + _zz_2 = 1'b0; + if(when_DataCache_l634) begin + _zz_2 = 1'b1; + end + end + + assign haltCpu = 1'b0; + assign _zz_ways_0_tagsReadRsp_valid = (tagsReadCmd_valid && (! io_cpu_memory_isStuck)); + assign _zz_ways_0_tagsReadRsp_valid_1 = _zz_ways_0_tags_port0; + assign ways_0_tagsReadRsp_valid = _zz_ways_0_tagsReadRsp_valid_1[0]; + assign ways_0_tagsReadRsp_error = _zz_ways_0_tagsReadRsp_valid_1[1]; + assign ways_0_tagsReadRsp_address = _zz_ways_0_tagsReadRsp_valid_1[21 : 2]; + assign _zz_ways_0_dataReadRspMem = (dataReadCmd_valid && (! io_cpu_memory_isStuck)); + assign ways_0_dataReadRspMem = _zz_ways_0_data_port0; + assign ways_0_dataReadRsp = ways_0_dataReadRspMem[31 : 0]; + assign when_DataCache_l634 = (tagsWriteCmd_valid && tagsWriteCmd_payload_way[0]); + assign when_DataCache_l637 = (dataWriteCmd_valid && dataWriteCmd_payload_way[0]); + always @(*) begin + tagsReadCmd_valid = 1'b0; + if(when_DataCache_l656) begin + tagsReadCmd_valid = 1'b1; + end + end + + always @(*) begin + tagsReadCmd_payload = 7'bxxxxxxx; + if(when_DataCache_l656) begin + tagsReadCmd_payload = io_cpu_execute_address[11 : 5]; + end + end + + always @(*) begin + dataReadCmd_valid = 1'b0; + if(when_DataCache_l656) begin + dataReadCmd_valid = 1'b1; + end + end + + always @(*) begin + dataReadCmd_payload = 10'bxxxxxxxxxx; + if(when_DataCache_l656) begin + dataReadCmd_payload = io_cpu_execute_address[11 : 2]; + end + end + + always @(*) begin + tagsWriteCmd_valid = 1'b0; + if(when_DataCache_l842) begin + tagsWriteCmd_valid = 1'b1; + end + if(when_DataCache_l1051) begin + tagsWriteCmd_valid = 1'b0; + end + if(loader_done) begin + tagsWriteCmd_valid = 1'b1; + end + end + + always @(*) begin + tagsWriteCmd_payload_way = 1'bx; + if(when_DataCache_l842) begin + tagsWriteCmd_payload_way = 1'b1; + end + if(loader_done) begin + tagsWriteCmd_payload_way = loader_waysAllocator; + end + end + + always @(*) begin + tagsWriteCmd_payload_address = 7'bxxxxxxx; + if(when_DataCache_l842) begin + tagsWriteCmd_payload_address = stageB_flusher_counter[6:0]; + end + if(loader_done) begin + tagsWriteCmd_payload_address = stageB_mmuRsp_physicalAddress[11 : 5]; + end + end + + always @(*) begin + tagsWriteCmd_payload_data_valid = 1'bx; + if(when_DataCache_l842) begin + tagsWriteCmd_payload_data_valid = 1'b0; + end + if(loader_done) begin + tagsWriteCmd_payload_data_valid = (! (loader_kill || loader_killReg)); + end + end + + always @(*) begin + tagsWriteCmd_payload_data_error = 1'bx; + if(loader_done) begin + tagsWriteCmd_payload_data_error = (loader_error || (io_mem_rsp_valid && io_mem_rsp_payload_error)); + end + end + + always @(*) begin + tagsWriteCmd_payload_data_address = 20'bxxxxxxxxxxxxxxxxxxxx; + if(loader_done) begin + tagsWriteCmd_payload_data_address = stageB_mmuRsp_physicalAddress[31 : 12]; + end + end + + always @(*) begin + dataWriteCmd_valid = 1'b0; + if(stageB_cpuWriteToCache) begin + if(when_DataCache_l911) begin + dataWriteCmd_valid = 1'b1; + end + end + if(when_DataCache_l1051) begin + dataWriteCmd_valid = 1'b0; + end + if(when_DataCache_l1075) begin + dataWriteCmd_valid = 1'b1; + end + end + + always @(*) begin + dataWriteCmd_payload_way = 1'bx; + if(stageB_cpuWriteToCache) begin + dataWriteCmd_payload_way = stageB_waysHits; + end + if(when_DataCache_l1075) begin + dataWriteCmd_payload_way = loader_waysAllocator; + end + end + + always @(*) begin + dataWriteCmd_payload_address = 10'bxxxxxxxxxx; + if(stageB_cpuWriteToCache) begin + dataWriteCmd_payload_address = stageB_mmuRsp_physicalAddress[11 : 2]; + end + if(when_DataCache_l1075) begin + dataWriteCmd_payload_address = {stageB_mmuRsp_physicalAddress[11 : 5],loader_counter_value}; + end + end + + always @(*) begin + dataWriteCmd_payload_data = 32'bxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx; + if(stageB_cpuWriteToCache) begin + dataWriteCmd_payload_data[31 : 0] = stageB_requestDataBypass; + end + if(when_DataCache_l1075) begin + dataWriteCmd_payload_data = io_mem_rsp_payload_data; + end + end + + always @(*) begin + dataWriteCmd_payload_mask = 4'bxxxx; + if(stageB_cpuWriteToCache) begin + dataWriteCmd_payload_mask = 4'b0000; + if(_zz_when[0]) begin + dataWriteCmd_payload_mask[3 : 0] = stageB_mask; + end + end + if(when_DataCache_l1075) begin + dataWriteCmd_payload_mask = 4'b1111; + end + end + + assign when_DataCache_l656 = (io_cpu_execute_isValid && (! io_cpu_memory_isStuck)); + always @(*) begin + io_cpu_execute_haltIt = 1'b0; + if(when_DataCache_l842) begin + io_cpu_execute_haltIt = 1'b1; + end + end + + assign rspSync = 1'b1; + assign rspLast = 1'b1; + assign io_mem_cmd_fire = (io_mem_cmd_valid && io_mem_cmd_ready); + assign when_DataCache_l678 = (! io_cpu_writeBack_isStuck); + always @(*) begin + _zz_stage0_mask = 4'bxxxx; + case(io_cpu_execute_args_size) + 2'b00 : begin + _zz_stage0_mask = 4'b0001; + end + 2'b01 : begin + _zz_stage0_mask = 4'b0011; + end + 2'b10 : begin + _zz_stage0_mask = 4'b1111; + end + default : begin + end + endcase + end + + assign stage0_mask = (_zz_stage0_mask <<< io_cpu_execute_address[1 : 0]); + assign stage0_dataColisions[0] = (((dataWriteCmd_valid && dataWriteCmd_payload_way[0]) && (dataWriteCmd_payload_address == _zz_stage0_dataColisions)) && ((stage0_mask & dataWriteCmd_payload_mask[3 : 0]) != 4'b0000)); + assign stage0_wayInvalidate = 1'b0; + assign stage0_isAmo = 1'b0; + assign when_DataCache_l763 = (! io_cpu_memory_isStuck); + assign when_DataCache_l763_1 = (! io_cpu_memory_isStuck); + assign io_cpu_memory_isWrite = stageA_request_wr; + assign stageA_isAmo = 1'b0; + assign stageA_isLrsc = 1'b0; + assign stageA_wayHits = ((io_cpu_memory_mmuRsp_physicalAddress[31 : 12] == ways_0_tagsReadRsp_address) && ways_0_tagsReadRsp_valid); + assign when_DataCache_l763_2 = (! io_cpu_memory_isStuck); + assign when_DataCache_l763_3 = (! io_cpu_memory_isStuck); + assign _zz_stageA_dataColisions[0] = (((dataWriteCmd_valid && dataWriteCmd_payload_way[0]) && (dataWriteCmd_payload_address == _zz__zz_stageA_dataColisions)) && ((stageA_mask & dataWriteCmd_payload_mask[3 : 0]) != 4'b0000)); + assign stageA_dataColisions = (stage0_dataColisions_regNextWhen | _zz_stageA_dataColisions); + assign when_DataCache_l814 = (! io_cpu_writeBack_isStuck); + always @(*) begin + stageB_mmuRspFreeze = 1'b0; + if(when_DataCache_l1110) begin + stageB_mmuRspFreeze = 1'b1; + end + end + + assign when_DataCache_l816 = ((! io_cpu_writeBack_isStuck) && (! stageB_mmuRspFreeze)); + assign when_DataCache_l813 = (! io_cpu_writeBack_isStuck); + assign when_DataCache_l813_1 = (! io_cpu_writeBack_isStuck); + assign when_DataCache_l812 = (! io_cpu_writeBack_isStuck); + assign stageB_consistancyHazard = 1'b0; + assign when_DataCache_l812_1 = (! io_cpu_writeBack_isStuck); + assign when_DataCache_l812_2 = (! io_cpu_writeBack_isStuck); + assign when_DataCache_l812_3 = (! io_cpu_writeBack_isStuck); + assign stageB_waysHits = (stageB_waysHitsBeforeInvalidate & (~ stageB_wayInvalidate)); + assign stageB_waysHit = (stageB_waysHits != 1'b0); + assign stageB_dataMux = stageB_dataReadRsp_0; + assign when_DataCache_l812_4 = (! io_cpu_writeBack_isStuck); + always @(*) begin + stageB_loaderValid = 1'b0; + if(io_cpu_writeBack_isValid) begin + if(!stageB_isExternalAmo) begin + if(!when_DataCache_l976) begin + if(!when_DataCache_l989) begin + if(io_mem_cmd_ready) begin + stageB_loaderValid = 1'b1; + end + end + end + end + end + if(when_DataCache_l1051) begin + stageB_loaderValid = 1'b0; + end + end + + assign stageB_ioMemRspMuxed = io_mem_rsp_payload_data[31 : 0]; + always @(*) begin + io_cpu_writeBack_haltIt = 1'b1; + if(io_cpu_writeBack_isValid) begin + if(!stageB_isExternalAmo) begin + if(when_DataCache_l976) begin + if(when_DataCache_l980) begin + io_cpu_writeBack_haltIt = 1'b0; + end + end else begin + if(when_DataCache_l989) begin + if(when_DataCache_l994) begin + io_cpu_writeBack_haltIt = 1'b0; + end + end + end + end + end + if(when_DataCache_l1051) begin + io_cpu_writeBack_haltIt = 1'b0; + end + end + + assign stageB_flusher_hold = 1'b0; + assign when_DataCache_l842 = (! stageB_flusher_counter[7]); + assign when_DataCache_l848 = (! stageB_flusher_hold); + assign io_cpu_flush_ready = (stageB_flusher_waitDone && stageB_flusher_counter[7]); + assign stageB_isAmo = 1'b0; + assign stageB_isAmoCached = 1'b0; + assign stageB_isExternalLsrc = 1'b0; + assign stageB_isExternalAmo = 1'b0; + assign stageB_requestDataBypass = io_cpu_writeBack_storeData; + always @(*) begin + stageB_cpuWriteToCache = 1'b0; + if(io_cpu_writeBack_isValid) begin + if(!stageB_isExternalAmo) begin + if(!when_DataCache_l976) begin + if(when_DataCache_l989) begin + stageB_cpuWriteToCache = 1'b1; + end + end + end + end + end + + assign when_DataCache_l911 = (stageB_request_wr && stageB_waysHit); + assign stageB_badPermissions = (((! stageB_mmuRsp_allowWrite) && stageB_request_wr) || ((! stageB_mmuRsp_allowRead) && ((! stageB_request_wr) || stageB_isAmo))); + assign stageB_loadStoreFault = (io_cpu_writeBack_isValid && (stageB_mmuRsp_exception || stageB_badPermissions)); + always @(*) begin + io_cpu_redo = 1'b0; + if(io_cpu_writeBack_isValid) begin + if(!stageB_isExternalAmo) begin + if(!when_DataCache_l976) begin + if(when_DataCache_l989) begin + if(when_DataCache_l1005) begin + io_cpu_redo = 1'b1; + end + end + end + end + end + if(when_DataCache_l1060) begin + io_cpu_redo = 1'b1; + end + if(when_DataCache_l1107) begin + io_cpu_redo = 1'b1; + end + end + + always @(*) begin + io_cpu_writeBack_accessError = 1'b0; + if(stageB_bypassCache) begin + io_cpu_writeBack_accessError = ((((! stageB_request_wr) && 1'b1) && io_mem_rsp_valid) && io_mem_rsp_payload_error); + end else begin + io_cpu_writeBack_accessError = (((stageB_waysHits & stageB_tagsReadRsp_0_error) != 1'b0) || (stageB_loadStoreFault && (! stageB_mmuRsp_isPaging))); + end + end + + assign io_cpu_writeBack_mmuException = (stageB_loadStoreFault && stageB_mmuRsp_isPaging); + assign io_cpu_writeBack_unalignedAccess = (io_cpu_writeBack_isValid && stageB_unaligned); + assign io_cpu_writeBack_isWrite = stageB_request_wr; + always @(*) begin + io_mem_cmd_valid = 1'b0; + if(io_cpu_writeBack_isValid) begin + if(!stageB_isExternalAmo) begin + if(when_DataCache_l976) begin + io_mem_cmd_valid = (! memCmdSent); + end else begin + if(when_DataCache_l989) begin + if(stageB_request_wr) begin + io_mem_cmd_valid = 1'b1; + end + end else begin + if(when_DataCache_l1017) begin + io_mem_cmd_valid = 1'b1; + end + end + end + end + end + if(when_DataCache_l1051) begin + io_mem_cmd_valid = 1'b0; + end + end + + always @(*) begin + io_mem_cmd_payload_address = stageB_mmuRsp_physicalAddress; + if(io_cpu_writeBack_isValid) begin + if(!stageB_isExternalAmo) begin + if(!when_DataCache_l976) begin + if(!when_DataCache_l989) begin + io_mem_cmd_payload_address[4 : 0] = 5'h0; + end + end + end + end + end + + assign io_mem_cmd_payload_last = 1'b1; + always @(*) begin + io_mem_cmd_payload_wr = stageB_request_wr; + if(io_cpu_writeBack_isValid) begin + if(!stageB_isExternalAmo) begin + if(!when_DataCache_l976) begin + if(!when_DataCache_l989) begin + io_mem_cmd_payload_wr = 1'b0; + end + end + end + end + end + + assign io_mem_cmd_payload_mask = stageB_mask; + assign io_mem_cmd_payload_data = stageB_requestDataBypass; + assign io_mem_cmd_payload_uncached = stageB_mmuRsp_isIoAccess; + always @(*) begin + io_mem_cmd_payload_size = {1'd0, stageB_request_size}; + if(io_cpu_writeBack_isValid) begin + if(!stageB_isExternalAmo) begin + if(!when_DataCache_l976) begin + if(!when_DataCache_l989) begin + io_mem_cmd_payload_size = 3'b101; + end + end + end + end + end + + assign stageB_bypassCache = ((stageB_mmuRsp_isIoAccess || stageB_isExternalLsrc) || stageB_isExternalAmo); + assign io_cpu_writeBack_keepMemRspData = 1'b0; + assign when_DataCache_l980 = ((! stageB_request_wr) ? (io_mem_rsp_valid && rspSync) : io_mem_cmd_ready); + assign when_DataCache_l989 = (stageB_waysHit || (stageB_request_wr && (! stageB_isAmoCached))); + assign when_DataCache_l994 = ((! stageB_request_wr) || io_mem_cmd_ready); + assign when_DataCache_l1005 = (((! stageB_request_wr) || stageB_isAmoCached) && ((stageB_dataColisions & stageB_waysHits) != 1'b0)); + assign when_DataCache_l1017 = (! memCmdSent); + assign when_DataCache_l976 = (stageB_mmuRsp_isIoAccess || stageB_isExternalLsrc); + always @(*) begin + if(stageB_bypassCache) begin + io_cpu_writeBack_data = stageB_ioMemRspMuxed; + end else begin + io_cpu_writeBack_data = stageB_dataMux; + end + end + + assign when_DataCache_l1051 = ((((stageB_consistancyHazard || stageB_mmuRsp_refilling) || io_cpu_writeBack_accessError) || io_cpu_writeBack_mmuException) || io_cpu_writeBack_unalignedAccess); + assign when_DataCache_l1060 = (io_cpu_writeBack_isValid && (stageB_mmuRsp_refilling || stageB_consistancyHazard)); + always @(*) begin + loader_counter_willIncrement = 1'b0; + if(when_DataCache_l1075) begin + loader_counter_willIncrement = 1'b1; + end + end + + assign loader_counter_willClear = 1'b0; + assign loader_counter_willOverflowIfInc = (loader_counter_value == 3'b111); + assign loader_counter_willOverflow = (loader_counter_willOverflowIfInc && loader_counter_willIncrement); + always @(*) begin + loader_counter_valueNext = (loader_counter_value + _zz_loader_counter_valueNext); + if(loader_counter_willClear) begin + loader_counter_valueNext = 3'b000; + end + end + + assign loader_kill = 1'b0; + assign when_DataCache_l1075 = ((loader_valid && io_mem_rsp_valid) && rspLast); + assign loader_done = loader_counter_willOverflow; + assign when_DataCache_l1103 = (! loader_valid); + assign when_DataCache_l1107 = (loader_valid && (! loader_valid_regNext)); + assign io_cpu_execute_refilling = loader_valid; + assign when_DataCache_l1110 = (stageB_loaderValid || loader_valid); + always @(posedge clk) begin + tagsWriteLastCmd_valid <= tagsWriteCmd_valid; + tagsWriteLastCmd_payload_way <= tagsWriteCmd_payload_way; + tagsWriteLastCmd_payload_address <= tagsWriteCmd_payload_address; + tagsWriteLastCmd_payload_data_valid <= tagsWriteCmd_payload_data_valid; + tagsWriteLastCmd_payload_data_error <= tagsWriteCmd_payload_data_error; + tagsWriteLastCmd_payload_data_address <= tagsWriteCmd_payload_data_address; + if(when_DataCache_l763) begin + stageA_request_wr <= io_cpu_execute_args_wr; + stageA_request_size <= io_cpu_execute_args_size; + stageA_request_totalyConsistent <= io_cpu_execute_args_totalyConsistent; + end + if(when_DataCache_l763_1) begin + stageA_mask <= stage0_mask; + end + if(when_DataCache_l763_2) begin + stageA_wayInvalidate <= stage0_wayInvalidate; + end + if(when_DataCache_l763_3) begin + stage0_dataColisions_regNextWhen <= stage0_dataColisions; + end + if(when_DataCache_l814) begin + stageB_request_wr <= stageA_request_wr; + stageB_request_size <= stageA_request_size; + stageB_request_totalyConsistent <= stageA_request_totalyConsistent; + end + if(when_DataCache_l816) begin + stageB_mmuRsp_physicalAddress <= io_cpu_memory_mmuRsp_physicalAddress; + stageB_mmuRsp_isIoAccess <= io_cpu_memory_mmuRsp_isIoAccess; + stageB_mmuRsp_isPaging <= io_cpu_memory_mmuRsp_isPaging; + stageB_mmuRsp_allowRead <= io_cpu_memory_mmuRsp_allowRead; + stageB_mmuRsp_allowWrite <= io_cpu_memory_mmuRsp_allowWrite; + stageB_mmuRsp_allowExecute <= io_cpu_memory_mmuRsp_allowExecute; + stageB_mmuRsp_exception <= io_cpu_memory_mmuRsp_exception; + stageB_mmuRsp_refilling <= io_cpu_memory_mmuRsp_refilling; + stageB_mmuRsp_bypassTranslation <= io_cpu_memory_mmuRsp_bypassTranslation; + end + if(when_DataCache_l813) begin + stageB_tagsReadRsp_0_valid <= ways_0_tagsReadRsp_valid; + stageB_tagsReadRsp_0_error <= ways_0_tagsReadRsp_error; + stageB_tagsReadRsp_0_address <= ways_0_tagsReadRsp_address; + end + if(when_DataCache_l813_1) begin + stageB_dataReadRsp_0 <= ways_0_dataReadRsp; + end + if(when_DataCache_l812) begin + stageB_wayInvalidate <= stageA_wayInvalidate; + end + if(when_DataCache_l812_1) begin + stageB_dataColisions <= stageA_dataColisions; + end + if(when_DataCache_l812_2) begin + stageB_unaligned <= ({((stageA_request_size == 2'b10) && (io_cpu_memory_address[1 : 0] != 2'b00)),((stageA_request_size == 2'b01) && (io_cpu_memory_address[0 : 0] != 1'b0))} != 2'b00); + end + if(when_DataCache_l812_3) begin + stageB_waysHitsBeforeInvalidate <= stageA_wayHits; + end + if(when_DataCache_l812_4) begin + stageB_mask <= stageA_mask; + end + loader_valid_regNext <= loader_valid; + end + + always @(posedge clk) begin + if(reset) begin + memCmdSent <= 1'b0; + stageB_flusher_waitDone <= 1'b0; + stageB_flusher_counter <= 8'h0; + stageB_flusher_start <= 1'b1; + loader_valid <= 1'b0; + loader_counter_value <= 3'b000; + loader_waysAllocator <= 1'b1; + loader_error <= 1'b0; + loader_killReg <= 1'b0; + end else begin + if(io_mem_cmd_fire) begin + memCmdSent <= 1'b1; + end + if(when_DataCache_l678) begin + memCmdSent <= 1'b0; + end + if(io_cpu_flush_ready) begin + stageB_flusher_waitDone <= 1'b0; + end + if(when_DataCache_l842) begin + if(when_DataCache_l848) begin + stageB_flusher_counter <= (stageB_flusher_counter + 8'h01); + end + end + stageB_flusher_start <= (((((((! stageB_flusher_waitDone) && (! stageB_flusher_start)) && io_cpu_flush_valid) && (! io_cpu_execute_isValid)) && (! io_cpu_memory_isValid)) && (! io_cpu_writeBack_isValid)) && (! io_cpu_redo)); + if(stageB_flusher_start) begin + stageB_flusher_waitDone <= 1'b1; + stageB_flusher_counter <= 8'h0; + end + `ifndef SYNTHESIS + `ifdef FORMAL + assert((! ((io_cpu_writeBack_isValid && (! io_cpu_writeBack_haltIt)) && io_cpu_writeBack_isStuck))); + `else + if(!(! ((io_cpu_writeBack_isValid && (! io_cpu_writeBack_haltIt)) && io_cpu_writeBack_isStuck))) begin + $display("ERROR writeBack stuck by another plugin is not allowed"); + end + `endif + `endif + if(stageB_loaderValid) begin + loader_valid <= 1'b1; + end + loader_counter_value <= loader_counter_valueNext; + if(loader_kill) begin + loader_killReg <= 1'b1; + end + if(when_DataCache_l1075) begin + loader_error <= (loader_error || io_mem_rsp_payload_error); + end + if(loader_done) begin + loader_valid <= 1'b0; + loader_error <= 1'b0; + loader_killReg <= 1'b0; + end + if(when_DataCache_l1103) begin + loader_waysAllocator <= _zz_loader_waysAllocator[0:0]; + end + end + end + + +endmodule + +module InstructionCache ( + input io_flush, + input io_cpu_prefetch_isValid, + output reg io_cpu_prefetch_haltIt, + input [31:0] io_cpu_prefetch_pc, + input io_cpu_fetch_isValid, + input io_cpu_fetch_isStuck, + input io_cpu_fetch_isRemoved, + input [31:0] io_cpu_fetch_pc, + output [31:0] io_cpu_fetch_data, + input [31:0] io_cpu_fetch_mmuRsp_physicalAddress, + input io_cpu_fetch_mmuRsp_isIoAccess, + input io_cpu_fetch_mmuRsp_isPaging, + input io_cpu_fetch_mmuRsp_allowRead, + input io_cpu_fetch_mmuRsp_allowWrite, + input io_cpu_fetch_mmuRsp_allowExecute, + input io_cpu_fetch_mmuRsp_exception, + input io_cpu_fetch_mmuRsp_refilling, + input io_cpu_fetch_mmuRsp_bypassTranslation, + output [31:0] io_cpu_fetch_physicalAddress, + input io_cpu_decode_isValid, + input io_cpu_decode_isStuck, + input [31:0] io_cpu_decode_pc, + output [31:0] io_cpu_decode_physicalAddress, + output [31:0] io_cpu_decode_data, + output io_cpu_decode_cacheMiss, + output io_cpu_decode_error, + output io_cpu_decode_mmuRefilling, + output io_cpu_decode_mmuException, + input io_cpu_decode_isUser, + input io_cpu_fill_valid, + input [31:0] io_cpu_fill_payload, + output io_mem_cmd_valid, + input io_mem_cmd_ready, + output [31:0] io_mem_cmd_payload_address, + output [2:0] io_mem_cmd_payload_size, + input io_mem_rsp_valid, + input [31:0] io_mem_rsp_payload_data, + input io_mem_rsp_payload_error, + input clk, + input reset +); + reg [31:0] _zz_banks_0_port1; + reg [22:0] _zz_ways_0_tags_port1; + wire [22:0] _zz_ways_0_tags_port; + reg _zz_1; + reg _zz_2; + reg lineLoader_fire; + reg lineLoader_valid; + (* keep , syn_keep *) reg [31:0] lineLoader_address /* synthesis syn_keep = 1 */ ; + reg lineLoader_hadError; + reg lineLoader_flushPending; + reg [6:0] lineLoader_flushCounter; + wire when_InstructionCache_l338; + reg _zz_when_InstructionCache_l342; + wire when_InstructionCache_l342; + wire when_InstructionCache_l351; + reg lineLoader_cmdSent; + wire io_mem_cmd_fire; + wire when_Utils_l357; + reg lineLoader_wayToAllocate_willIncrement; + wire lineLoader_wayToAllocate_willClear; + wire lineLoader_wayToAllocate_willOverflowIfInc; + wire lineLoader_wayToAllocate_willOverflow; + (* keep , syn_keep *) reg [2:0] lineLoader_wordIndex /* synthesis syn_keep = 1 */ ; + wire lineLoader_write_tag_0_valid; + wire [5:0] lineLoader_write_tag_0_payload_address; + wire lineLoader_write_tag_0_payload_data_valid; + wire lineLoader_write_tag_0_payload_data_error; + wire [20:0] lineLoader_write_tag_0_payload_data_address; + wire lineLoader_write_data_0_valid; + wire [8:0] lineLoader_write_data_0_payload_address; + wire [31:0] lineLoader_write_data_0_payload_data; + wire when_InstructionCache_l401; + wire [8:0] _zz_fetchStage_read_banksValue_0_dataMem; + wire _zz_fetchStage_read_banksValue_0_dataMem_1; + wire [31:0] fetchStage_read_banksValue_0_dataMem; + wire [31:0] fetchStage_read_banksValue_0_data; + wire [5:0] _zz_fetchStage_read_waysValues_0_tag_valid; + wire _zz_fetchStage_read_waysValues_0_tag_valid_1; + wire fetchStage_read_waysValues_0_tag_valid; + wire fetchStage_read_waysValues_0_tag_error; + wire [20:0] fetchStage_read_waysValues_0_tag_address; + wire [22:0] _zz_fetchStage_read_waysValues_0_tag_valid_2; + wire fetchStage_hit_hits_0; + wire fetchStage_hit_valid; + wire fetchStage_hit_error; + wire [31:0] fetchStage_hit_data; + wire [31:0] fetchStage_hit_word; + wire when_InstructionCache_l435; + reg [31:0] io_cpu_fetch_data_regNextWhen; + wire when_InstructionCache_l459; + reg [31:0] decodeStage_mmuRsp_physicalAddress; + reg decodeStage_mmuRsp_isIoAccess; + reg decodeStage_mmuRsp_isPaging; + reg decodeStage_mmuRsp_allowRead; + reg decodeStage_mmuRsp_allowWrite; + reg decodeStage_mmuRsp_allowExecute; + reg decodeStage_mmuRsp_exception; + reg decodeStage_mmuRsp_refilling; + reg decodeStage_mmuRsp_bypassTranslation; + wire when_InstructionCache_l459_1; + reg decodeStage_hit_valid; + wire when_InstructionCache_l459_2; + reg decodeStage_hit_error; + (* ram_style = "block" *) reg [31:0] banks_0 [0:511]; + (* ram_style = "block" *) reg [22:0] ways_0_tags [0:63]; + + assign _zz_ways_0_tags_port = {lineLoader_write_tag_0_payload_data_address,{lineLoader_write_tag_0_payload_data_error,lineLoader_write_tag_0_payload_data_valid}}; + always @(posedge clk) begin + if(_zz_1) begin + banks_0[lineLoader_write_data_0_payload_address] <= lineLoader_write_data_0_payload_data; + end + end + + always @(posedge clk) begin + if(_zz_fetchStage_read_banksValue_0_dataMem_1) begin + _zz_banks_0_port1 <= banks_0[_zz_fetchStage_read_banksValue_0_dataMem]; + end + end + + always @(posedge clk) begin + if(_zz_2) begin + ways_0_tags[lineLoader_write_tag_0_payload_address] <= _zz_ways_0_tags_port; + end + end + + always @(posedge clk) begin + if(_zz_fetchStage_read_waysValues_0_tag_valid_1) begin + _zz_ways_0_tags_port1 <= ways_0_tags[_zz_fetchStage_read_waysValues_0_tag_valid]; + end + end + + always @(*) begin + _zz_1 = 1'b0; + if(lineLoader_write_data_0_valid) begin + _zz_1 = 1'b1; + end + end + + always @(*) begin + _zz_2 = 1'b0; + if(lineLoader_write_tag_0_valid) begin + _zz_2 = 1'b1; + end + end + + always @(*) begin + lineLoader_fire = 1'b0; + if(io_mem_rsp_valid) begin + if(when_InstructionCache_l401) begin + lineLoader_fire = 1'b1; + end + end + end + + always @(*) begin + io_cpu_prefetch_haltIt = (lineLoader_valid || lineLoader_flushPending); + if(when_InstructionCache_l338) begin + io_cpu_prefetch_haltIt = 1'b1; + end + if(when_InstructionCache_l342) begin + io_cpu_prefetch_haltIt = 1'b1; + end + if(io_flush) begin + io_cpu_prefetch_haltIt = 1'b1; + end + end + + assign when_InstructionCache_l338 = (! lineLoader_flushCounter[6]); + assign when_InstructionCache_l342 = (! _zz_when_InstructionCache_l342); + assign when_InstructionCache_l351 = (lineLoader_flushPending && (! (lineLoader_valid || io_cpu_fetch_isValid))); + assign io_mem_cmd_fire = (io_mem_cmd_valid && io_mem_cmd_ready); + assign io_mem_cmd_valid = (lineLoader_valid && (! lineLoader_cmdSent)); + assign io_mem_cmd_payload_address = {lineLoader_address[31 : 5],5'h0}; + assign io_mem_cmd_payload_size = 3'b101; + assign when_Utils_l357 = (! lineLoader_valid); + always @(*) begin + lineLoader_wayToAllocate_willIncrement = 1'b0; + if(when_Utils_l357) begin + lineLoader_wayToAllocate_willIncrement = 1'b1; + end + end + + assign lineLoader_wayToAllocate_willClear = 1'b0; + assign lineLoader_wayToAllocate_willOverflowIfInc = 1'b1; + assign lineLoader_wayToAllocate_willOverflow = (lineLoader_wayToAllocate_willOverflowIfInc && lineLoader_wayToAllocate_willIncrement); + assign lineLoader_write_tag_0_valid = ((1'b1 && lineLoader_fire) || (! lineLoader_flushCounter[6])); + assign lineLoader_write_tag_0_payload_address = (lineLoader_flushCounter[6] ? lineLoader_address[10 : 5] : lineLoader_flushCounter[5 : 0]); + assign lineLoader_write_tag_0_payload_data_valid = lineLoader_flushCounter[6]; + assign lineLoader_write_tag_0_payload_data_error = (lineLoader_hadError || io_mem_rsp_payload_error); + assign lineLoader_write_tag_0_payload_data_address = lineLoader_address[31 : 11]; + assign lineLoader_write_data_0_valid = (io_mem_rsp_valid && 1'b1); + assign lineLoader_write_data_0_payload_address = {lineLoader_address[10 : 5],lineLoader_wordIndex}; + assign lineLoader_write_data_0_payload_data = io_mem_rsp_payload_data; + assign when_InstructionCache_l401 = (lineLoader_wordIndex == 3'b111); + assign _zz_fetchStage_read_banksValue_0_dataMem = io_cpu_prefetch_pc[10 : 2]; + assign _zz_fetchStage_read_banksValue_0_dataMem_1 = (! io_cpu_fetch_isStuck); + assign fetchStage_read_banksValue_0_dataMem = _zz_banks_0_port1; + assign fetchStage_read_banksValue_0_data = fetchStage_read_banksValue_0_dataMem[31 : 0]; + assign _zz_fetchStage_read_waysValues_0_tag_valid = io_cpu_prefetch_pc[10 : 5]; + assign _zz_fetchStage_read_waysValues_0_tag_valid_1 = (! io_cpu_fetch_isStuck); + assign _zz_fetchStage_read_waysValues_0_tag_valid_2 = _zz_ways_0_tags_port1; + assign fetchStage_read_waysValues_0_tag_valid = _zz_fetchStage_read_waysValues_0_tag_valid_2[0]; + assign fetchStage_read_waysValues_0_tag_error = _zz_fetchStage_read_waysValues_0_tag_valid_2[1]; + assign fetchStage_read_waysValues_0_tag_address = _zz_fetchStage_read_waysValues_0_tag_valid_2[22 : 2]; + assign fetchStage_hit_hits_0 = (fetchStage_read_waysValues_0_tag_valid && (fetchStage_read_waysValues_0_tag_address == io_cpu_fetch_mmuRsp_physicalAddress[31 : 11])); + assign fetchStage_hit_valid = (fetchStage_hit_hits_0 != 1'b0); + assign fetchStage_hit_error = fetchStage_read_waysValues_0_tag_error; + assign fetchStage_hit_data = fetchStage_read_banksValue_0_data; + assign fetchStage_hit_word = fetchStage_hit_data; + assign io_cpu_fetch_data = fetchStage_hit_word; + assign when_InstructionCache_l435 = (! io_cpu_decode_isStuck); + assign io_cpu_decode_data = io_cpu_fetch_data_regNextWhen; + assign io_cpu_fetch_physicalAddress = io_cpu_fetch_mmuRsp_physicalAddress; + assign when_InstructionCache_l459 = (! io_cpu_decode_isStuck); + assign when_InstructionCache_l459_1 = (! io_cpu_decode_isStuck); + assign when_InstructionCache_l459_2 = (! io_cpu_decode_isStuck); + assign io_cpu_decode_cacheMiss = (! decodeStage_hit_valid); + assign io_cpu_decode_error = (decodeStage_hit_error || ((! decodeStage_mmuRsp_isPaging) && (decodeStage_mmuRsp_exception || (! decodeStage_mmuRsp_allowExecute)))); + assign io_cpu_decode_mmuRefilling = decodeStage_mmuRsp_refilling; + assign io_cpu_decode_mmuException = (((! decodeStage_mmuRsp_refilling) && decodeStage_mmuRsp_isPaging) && (decodeStage_mmuRsp_exception || (! decodeStage_mmuRsp_allowExecute))); + assign io_cpu_decode_physicalAddress = decodeStage_mmuRsp_physicalAddress; + always @(posedge clk) begin + if(reset) begin + lineLoader_valid <= 1'b0; + lineLoader_hadError <= 1'b0; + lineLoader_flushPending <= 1'b1; + lineLoader_cmdSent <= 1'b0; + lineLoader_wordIndex <= 3'b000; + end else begin + if(lineLoader_fire) begin + lineLoader_valid <= 1'b0; + end + if(lineLoader_fire) begin + lineLoader_hadError <= 1'b0; + end + if(io_cpu_fill_valid) begin + lineLoader_valid <= 1'b1; + end + if(io_flush) begin + lineLoader_flushPending <= 1'b1; + end + if(when_InstructionCache_l351) begin + lineLoader_flushPending <= 1'b0; + end + if(io_mem_cmd_fire) begin + lineLoader_cmdSent <= 1'b1; + end + if(lineLoader_fire) begin + lineLoader_cmdSent <= 1'b0; + end + if(io_mem_rsp_valid) begin + lineLoader_wordIndex <= (lineLoader_wordIndex + 3'b001); + if(io_mem_rsp_payload_error) begin + lineLoader_hadError <= 1'b1; + end + end + end + end + + always @(posedge clk) begin + if(io_cpu_fill_valid) begin + lineLoader_address <= io_cpu_fill_payload; + end + if(when_InstructionCache_l338) begin + lineLoader_flushCounter <= (lineLoader_flushCounter + 7'h01); + end + _zz_when_InstructionCache_l342 <= lineLoader_flushCounter[6]; + if(when_InstructionCache_l351) begin + lineLoader_flushCounter <= 7'h0; + end + if(when_InstructionCache_l435) begin + io_cpu_fetch_data_regNextWhen <= io_cpu_fetch_data; + end + if(when_InstructionCache_l459) begin + decodeStage_mmuRsp_physicalAddress <= io_cpu_fetch_mmuRsp_physicalAddress; + decodeStage_mmuRsp_isIoAccess <= io_cpu_fetch_mmuRsp_isIoAccess; + decodeStage_mmuRsp_isPaging <= io_cpu_fetch_mmuRsp_isPaging; + decodeStage_mmuRsp_allowRead <= io_cpu_fetch_mmuRsp_allowRead; + decodeStage_mmuRsp_allowWrite <= io_cpu_fetch_mmuRsp_allowWrite; + decodeStage_mmuRsp_allowExecute <= io_cpu_fetch_mmuRsp_allowExecute; + decodeStage_mmuRsp_exception <= io_cpu_fetch_mmuRsp_exception; + decodeStage_mmuRsp_refilling <= io_cpu_fetch_mmuRsp_refilling; + decodeStage_mmuRsp_bypassTranslation <= io_cpu_fetch_mmuRsp_bypassTranslation; + end + if(when_InstructionCache_l459_1) begin + decodeStage_hit_valid <= fetchStage_hit_valid; + end + if(when_InstructionCache_l459_2) begin + decodeStage_hit_error <= fetchStage_hit_error; + end + end + + +endmodule diff --git a/pythondata_cpu_vexriscv/verilog/VexRiscv_SlimPerfCfu.yaml b/pythondata_cpu_vexriscv/verilog/VexRiscv_SlimPerfCfu.yaml new file mode 100644 index 0000000..b55f8e5 --- /dev/null +++ b/pythondata_cpu_vexriscv/verilog/VexRiscv_SlimPerfCfu.yaml @@ -0,0 +1,4 @@ +iBus: !!vexriscv.BusReport + flushInstructions: [4111, 19, 19, 19] + info: !!vexriscv.CacheReport {bytePerLine: 32, size: 2048} + kind: cached diff --git a/pythondata_cpu_vexriscv/verilog/VexRiscv_SlimPerfCfuDebug.v b/pythondata_cpu_vexriscv/verilog/VexRiscv_SlimPerfCfuDebug.v new file mode 100644 index 0000000..1f7837a --- /dev/null +++ b/pythondata_cpu_vexriscv/verilog/VexRiscv_SlimPerfCfuDebug.v @@ -0,0 +1,7617 @@ +// Generator : SpinalHDL v1.6.0 git head : 73c8d8e2b86b45646e9d0b2e729291f2b65e6be3 +// Component : VexRiscv +// Git hash : 593e180abf5ba39e7fa33d4f371646453f84496a + + +`define Input2Kind_binary_sequential_type [0:0] +`define Input2Kind_binary_sequential_RS 1'b0 +`define Input2Kind_binary_sequential_IMM_I 1'b1 + +`define EnvCtrlEnum_binary_sequential_type [1:0] +`define EnvCtrlEnum_binary_sequential_NONE 2'b00 +`define EnvCtrlEnum_binary_sequential_XRET 2'b01 +`define EnvCtrlEnum_binary_sequential_WFI 2'b10 +`define EnvCtrlEnum_binary_sequential_ECALL 2'b11 + +`define BranchCtrlEnum_binary_sequential_type [1:0] +`define BranchCtrlEnum_binary_sequential_INC 2'b00 +`define BranchCtrlEnum_binary_sequential_B 2'b01 +`define BranchCtrlEnum_binary_sequential_JAL 2'b10 +`define BranchCtrlEnum_binary_sequential_JALR 2'b11 + +`define ShiftCtrlEnum_binary_sequential_type [1:0] +`define ShiftCtrlEnum_binary_sequential_DISABLE_1 2'b00 +`define ShiftCtrlEnum_binary_sequential_SLL_1 2'b01 +`define ShiftCtrlEnum_binary_sequential_SRL_1 2'b10 +`define ShiftCtrlEnum_binary_sequential_SRA_1 2'b11 + +`define AluBitwiseCtrlEnum_binary_sequential_type [1:0] +`define AluBitwiseCtrlEnum_binary_sequential_XOR_1 2'b00 +`define AluBitwiseCtrlEnum_binary_sequential_OR_1 2'b01 +`define AluBitwiseCtrlEnum_binary_sequential_AND_1 2'b10 + +`define Src2CtrlEnum_binary_sequential_type [1:0] +`define Src2CtrlEnum_binary_sequential_RS 2'b00 +`define Src2CtrlEnum_binary_sequential_IMI 2'b01 +`define Src2CtrlEnum_binary_sequential_IMS 2'b10 +`define Src2CtrlEnum_binary_sequential_PC 2'b11 + +`define AluCtrlEnum_binary_sequential_type [1:0] +`define AluCtrlEnum_binary_sequential_ADD_SUB 2'b00 +`define AluCtrlEnum_binary_sequential_SLT_SLTU 2'b01 +`define AluCtrlEnum_binary_sequential_BITWISE 2'b10 + +`define Src1CtrlEnum_binary_sequential_type [1:0] +`define Src1CtrlEnum_binary_sequential_RS 2'b00 +`define Src1CtrlEnum_binary_sequential_IMU 2'b01 +`define Src1CtrlEnum_binary_sequential_PC_INCREMENT 2'b10 +`define Src1CtrlEnum_binary_sequential_URS1 2'b11 + + +module VexRiscv ( + input [31:0] externalResetVector, + input timerInterrupt, + input softwareInterrupt, + input [31:0] externalInterruptArray, + input debug_bus_cmd_valid, + output reg debug_bus_cmd_ready, + input debug_bus_cmd_payload_wr, + input [7:0] debug_bus_cmd_payload_address, + input [31:0] debug_bus_cmd_payload_data, + output reg [31:0] debug_bus_rsp_data, + output debug_resetOut, + output CfuPlugin_bus_cmd_valid, + input CfuPlugin_bus_cmd_ready, + output [9:0] CfuPlugin_bus_cmd_payload_function_id, + output [31:0] CfuPlugin_bus_cmd_payload_inputs_0, + output [31:0] CfuPlugin_bus_cmd_payload_inputs_1, + input CfuPlugin_bus_rsp_valid, + output CfuPlugin_bus_rsp_ready, + input [31:0] CfuPlugin_bus_rsp_payload_outputs_0, + output reg iBusWishbone_CYC, + output reg iBusWishbone_STB, + input iBusWishbone_ACK, + output iBusWishbone_WE, + output [29:0] iBusWishbone_ADR, + input [31:0] iBusWishbone_DAT_MISO, + output [31:0] iBusWishbone_DAT_MOSI, + output [3:0] iBusWishbone_SEL, + input iBusWishbone_ERR, + output [2:0] iBusWishbone_CTI, + output [1:0] iBusWishbone_BTE, + output dBusWishbone_CYC, + output dBusWishbone_STB, + input dBusWishbone_ACK, + output dBusWishbone_WE, + output [29:0] dBusWishbone_ADR, + input [31:0] dBusWishbone_DAT_MISO, + output [31:0] dBusWishbone_DAT_MOSI, + output [3:0] dBusWishbone_SEL, + input dBusWishbone_ERR, + output [2:0] dBusWishbone_CTI, + output [1:0] dBusWishbone_BTE, + input clk, + input reset, + input debugReset +); + wire IBusCachedPlugin_cache_io_flush; + wire IBusCachedPlugin_cache_io_cpu_prefetch_isValid; + wire IBusCachedPlugin_cache_io_cpu_fetch_isValid; + wire IBusCachedPlugin_cache_io_cpu_fetch_isStuck; + wire IBusCachedPlugin_cache_io_cpu_fetch_isRemoved; + wire IBusCachedPlugin_cache_io_cpu_decode_isValid; + wire IBusCachedPlugin_cache_io_cpu_decode_isStuck; + wire IBusCachedPlugin_cache_io_cpu_decode_isUser; + reg IBusCachedPlugin_cache_io_cpu_fill_valid; + wire dataCache_1_io_cpu_execute_isValid; + wire [31:0] dataCache_1_io_cpu_execute_address; + wire dataCache_1_io_cpu_memory_isValid; + wire [31:0] dataCache_1_io_cpu_memory_address; + reg dataCache_1_io_cpu_memory_mmuRsp_isIoAccess; + reg dataCache_1_io_cpu_writeBack_isValid; + wire dataCache_1_io_cpu_writeBack_isUser; + wire [31:0] dataCache_1_io_cpu_writeBack_storeData; + wire [31:0] dataCache_1_io_cpu_writeBack_address; + wire dataCache_1_io_cpu_writeBack_fence_SW; + wire dataCache_1_io_cpu_writeBack_fence_SR; + wire dataCache_1_io_cpu_writeBack_fence_SO; + wire dataCache_1_io_cpu_writeBack_fence_SI; + wire dataCache_1_io_cpu_writeBack_fence_PW; + wire dataCache_1_io_cpu_writeBack_fence_PR; + wire dataCache_1_io_cpu_writeBack_fence_PO; + wire dataCache_1_io_cpu_writeBack_fence_PI; + wire [3:0] dataCache_1_io_cpu_writeBack_fence_FM; + wire dataCache_1_io_cpu_flush_valid; + wire dataCache_1_io_mem_cmd_ready; + reg [31:0] _zz_RegFilePlugin_regFile_port0; + reg [31:0] _zz_RegFilePlugin_regFile_port1; + wire IBusCachedPlugin_cache_io_cpu_prefetch_haltIt; + wire [31:0] IBusCachedPlugin_cache_io_cpu_fetch_data; + wire [31:0] IBusCachedPlugin_cache_io_cpu_fetch_physicalAddress; + wire IBusCachedPlugin_cache_io_cpu_decode_error; + wire IBusCachedPlugin_cache_io_cpu_decode_mmuRefilling; + wire IBusCachedPlugin_cache_io_cpu_decode_mmuException; + wire [31:0] IBusCachedPlugin_cache_io_cpu_decode_data; + wire IBusCachedPlugin_cache_io_cpu_decode_cacheMiss; + wire [31:0] IBusCachedPlugin_cache_io_cpu_decode_physicalAddress; + wire IBusCachedPlugin_cache_io_mem_cmd_valid; + wire [31:0] IBusCachedPlugin_cache_io_mem_cmd_payload_address; + wire [2:0] IBusCachedPlugin_cache_io_mem_cmd_payload_size; + wire dataCache_1_io_cpu_execute_haltIt; + wire dataCache_1_io_cpu_execute_refilling; + wire dataCache_1_io_cpu_memory_isWrite; + wire dataCache_1_io_cpu_writeBack_haltIt; + wire [31:0] dataCache_1_io_cpu_writeBack_data; + wire dataCache_1_io_cpu_writeBack_mmuException; + wire dataCache_1_io_cpu_writeBack_unalignedAccess; + wire dataCache_1_io_cpu_writeBack_accessError; + wire dataCache_1_io_cpu_writeBack_isWrite; + wire dataCache_1_io_cpu_writeBack_keepMemRspData; + wire dataCache_1_io_cpu_writeBack_exclusiveOk; + wire dataCache_1_io_cpu_flush_ready; + wire dataCache_1_io_cpu_redo; + wire dataCache_1_io_mem_cmd_valid; + wire dataCache_1_io_mem_cmd_payload_wr; + wire dataCache_1_io_mem_cmd_payload_uncached; + wire [31:0] dataCache_1_io_mem_cmd_payload_address; + wire [31:0] dataCache_1_io_mem_cmd_payload_data; + wire [3:0] dataCache_1_io_mem_cmd_payload_mask; + wire [2:0] dataCache_1_io_mem_cmd_payload_size; + wire dataCache_1_io_mem_cmd_payload_last; + wire [51:0] _zz_memory_MUL_LOW; + wire [51:0] _zz_memory_MUL_LOW_1; + wire [51:0] _zz_memory_MUL_LOW_2; + wire [51:0] _zz_memory_MUL_LOW_3; + wire [32:0] _zz_memory_MUL_LOW_4; + wire [51:0] _zz_memory_MUL_LOW_5; + wire [49:0] _zz_memory_MUL_LOW_6; + wire [51:0] _zz_memory_MUL_LOW_7; + wire [49:0] _zz_memory_MUL_LOW_8; + wire [31:0] _zz_execute_SHIFT_RIGHT; + wire [32:0] _zz_execute_SHIFT_RIGHT_1; + wire [32:0] _zz_execute_SHIFT_RIGHT_2; + wire [31:0] _zz_decode_LEGAL_INSTRUCTION; + wire [31:0] _zz_decode_LEGAL_INSTRUCTION_1; + wire [31:0] _zz_decode_LEGAL_INSTRUCTION_2; + wire _zz_decode_LEGAL_INSTRUCTION_3; + wire [0:0] _zz_decode_LEGAL_INSTRUCTION_4; + wire [14:0] _zz_decode_LEGAL_INSTRUCTION_5; + wire [31:0] _zz_decode_LEGAL_INSTRUCTION_6; + wire [31:0] _zz_decode_LEGAL_INSTRUCTION_7; + wire [31:0] _zz_decode_LEGAL_INSTRUCTION_8; + wire _zz_decode_LEGAL_INSTRUCTION_9; + wire [0:0] _zz_decode_LEGAL_INSTRUCTION_10; + wire [8:0] _zz_decode_LEGAL_INSTRUCTION_11; + wire [31:0] _zz_decode_LEGAL_INSTRUCTION_12; + wire [31:0] _zz_decode_LEGAL_INSTRUCTION_13; + wire [31:0] _zz_decode_LEGAL_INSTRUCTION_14; + wire _zz_decode_LEGAL_INSTRUCTION_15; + wire [0:0] _zz_decode_LEGAL_INSTRUCTION_16; + wire [2:0] _zz_decode_LEGAL_INSTRUCTION_17; + wire [3:0] _zz__zz_IBusCachedPlugin_jump_pcLoad_payload_1; + reg [31:0] _zz_IBusCachedPlugin_jump_pcLoad_payload_5; + wire [1:0] _zz_IBusCachedPlugin_jump_pcLoad_payload_6; + wire [31:0] _zz_IBusCachedPlugin_fetchPc_pc; + wire [2:0] _zz_IBusCachedPlugin_fetchPc_pc_1; + wire [11:0] _zz__zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch; + wire [31:0] _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_2; + wire [19:0] _zz__zz_2; + wire [11:0] _zz__zz_4; + wire [31:0] _zz__zz_6; + wire [31:0] _zz__zz_6_1; + wire [19:0] _zz__zz_IBusCachedPlugin_predictionJumpInterface_payload; + wire [11:0] _zz__zz_IBusCachedPlugin_predictionJumpInterface_payload_2; + wire _zz_IBusCachedPlugin_predictionJumpInterface_payload_4; + wire _zz_IBusCachedPlugin_predictionJumpInterface_payload_5; + wire _zz_IBusCachedPlugin_predictionJumpInterface_payload_6; + wire [2:0] _zz_DBusCachedPlugin_exceptionBus_payload_code; + wire [2:0] _zz_DBusCachedPlugin_exceptionBus_payload_code_1; + reg [7:0] _zz_writeBack_DBusCachedPlugin_rspShifted; + wire [1:0] _zz_writeBack_DBusCachedPlugin_rspShifted_1; + reg [7:0] _zz_writeBack_DBusCachedPlugin_rspShifted_2; + wire [0:0] _zz_writeBack_DBusCachedPlugin_rspShifted_3; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_1; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_2; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_3; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_4; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_5; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_6; + wire [27:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_7; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_8; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_9; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_10; + wire [1:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_11; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_12; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_13; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_14; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_15; + wire [1:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_16; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_17; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_18; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_19; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_20; + wire [22:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_21; + wire [1:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_22; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_23; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_24; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_25; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_26; + wire [1:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_27; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_28; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_29; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_30; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_31; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_32; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_33; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_34; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_35; + wire [19:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_36; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_37; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_38; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_39; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_40; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_41; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_42; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_43; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_44; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_45; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_46; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_47; + wire [16:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_48; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_49; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_50; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_51; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_52; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_53; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_54; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_55; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_56; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_57; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_58; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_59; + wire [3:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_60; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_61; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_62; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_63; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_64; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_65; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_66; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_67; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_68; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_69; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_70; + wire [13:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_71; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_72; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_73; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_74; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_75; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_76; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_77; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_78; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_79; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_80; + wire [3:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_81; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_82; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_83; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_84; + wire [1:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_85; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_86; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_87; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_88; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_89; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_90; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_91; + wire [3:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_92; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_93; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_94; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_95; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_96; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_97; + wire [1:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_98; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_99; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_100; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_101; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_102; + wire [10:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_103; + wire [5:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_104; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_105; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_106; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_107; + wire [3:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_108; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_109; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_110; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_111; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_112; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_113; + wire [1:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_114; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_115; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_116; + wire [5:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_117; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_118; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_119; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_120; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_121; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_122; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_123; + wire [1:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_124; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_125; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_126; + wire [1:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_127; + wire [7:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_128; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_129; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_130; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_131; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_132; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_133; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_134; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_135; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_136; + wire [5:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_137; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_138; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_139; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_140; + wire [2:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_141; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_142; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_143; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_144; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_145; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_146; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_147; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_148; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_149; + wire [3:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_150; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_151; + wire _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_152; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_153; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_154; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_155; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_156; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_157; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_158; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_159; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_160; + wire [1:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_161; + wire [1:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_162; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_163; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_164; + wire [1:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_165; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_166; + wire [31:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_167; + wire [0:0] _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_168; + wire _zz_RegFilePlugin_regFile_port; + wire _zz_decode_RegFilePlugin_rs1Data; + wire _zz_RegFilePlugin_regFile_port_1; + wire _zz_decode_RegFilePlugin_rs2Data; + wire [0:0] _zz__zz_execute_REGFILE_WRITE_DATA; + wire [2:0] _zz__zz_execute_SRC1; + wire [4:0] _zz__zz_execute_SRC1_1; + wire [11:0] _zz__zz_execute_SRC2_3; + wire [31:0] _zz_execute_SrcPlugin_addSub; + wire [31:0] _zz_execute_SrcPlugin_addSub_1; + wire [31:0] _zz_execute_SrcPlugin_addSub_2; + wire [31:0] _zz_execute_SrcPlugin_addSub_3; + wire [31:0] _zz_execute_SrcPlugin_addSub_4; + wire [31:0] _zz_execute_SrcPlugin_addSub_5; + wire [31:0] _zz_execute_SrcPlugin_addSub_6; + wire [19:0] _zz__zz_execute_BranchPlugin_missAlignedTarget_2; + wire [11:0] _zz__zz_execute_BranchPlugin_missAlignedTarget_4; + wire [31:0] _zz__zz_execute_BranchPlugin_missAlignedTarget_6; + wire [31:0] _zz__zz_execute_BranchPlugin_missAlignedTarget_6_1; + wire [31:0] _zz__zz_execute_BranchPlugin_missAlignedTarget_6_2; + wire [19:0] _zz__zz_execute_BranchPlugin_branch_src2_2; + wire [11:0] _zz__zz_execute_BranchPlugin_branch_src2_4; + wire _zz_execute_BranchPlugin_branch_src2_6; + wire _zz_execute_BranchPlugin_branch_src2_7; + wire _zz_execute_BranchPlugin_branch_src2_8; + wire [2:0] _zz_execute_BranchPlugin_branch_src2_9; + wire [1:0] _zz__zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_1; + wire [1:0] _zz__zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_1_1; + wire [1:0] _zz__zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_3; + wire [1:0] _zz__zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_3_1; + wire _zz_when; + wire _zz_when_1; + wire [65:0] _zz_writeBack_MulPlugin_result; + wire [65:0] _zz_writeBack_MulPlugin_result_1; + wire [31:0] _zz__zz_decode_RS2_2; + wire [31:0] _zz__zz_decode_RS2_2_1; + wire [5:0] _zz_memory_DivPlugin_div_counter_valueNext; + wire [0:0] _zz_memory_DivPlugin_div_counter_valueNext_1; + wire [32:0] _zz_memory_DivPlugin_div_stage_0_remainderMinusDenominator; + wire [31:0] _zz_memory_DivPlugin_div_stage_0_outRemainder; + wire [31:0] _zz_memory_DivPlugin_div_stage_0_outRemainder_1; + wire [32:0] _zz_memory_DivPlugin_div_stage_0_outNumerator; + wire [32:0] _zz_memory_DivPlugin_div_result_1; + wire [32:0] _zz_memory_DivPlugin_div_result_2; + wire [32:0] _zz_memory_DivPlugin_div_result_3; + wire [32:0] _zz_memory_DivPlugin_div_result_4; + wire [0:0] _zz_memory_DivPlugin_div_result_5; + wire [32:0] _zz_memory_DivPlugin_rs1_2; + wire [0:0] _zz_memory_DivPlugin_rs1_3; + wire [31:0] _zz_memory_DivPlugin_rs2_1; + wire [0:0] _zz_memory_DivPlugin_rs2_2; + wire [9:0] _zz_execute_CfuPlugin_functionsIds_0; + wire [31:0] _zz_CsrPlugin_csrMapping_readDataInit_41; + wire [26:0] _zz_iBusWishbone_ADR_1; + wire [51:0] memory_MUL_LOW; + wire writeBack_CfuPlugin_CFU_IN_FLIGHT; + wire execute_CfuPlugin_CFU_IN_FLIGHT; + wire [33:0] memory_MUL_HH; + wire [33:0] execute_MUL_HH; + wire [33:0] execute_MUL_HL; + wire [33:0] execute_MUL_LH; + wire [31:0] execute_MUL_LL; + wire [31:0] execute_SHIFT_RIGHT; + wire [31:0] execute_REGFILE_WRITE_DATA; + wire [31:0] memory_MEMORY_STORE_DATA_RF; + wire [31:0] execute_MEMORY_STORE_DATA_RF; + wire decode_DO_EBREAK; + wire decode_CSR_READ_OPCODE; + wire decode_CSR_WRITE_OPCODE; + wire decode_PREDICTION_HAD_BRANCHED2; + wire decode_SRC2_FORCE_ZERO; + wire `Input2Kind_binary_sequential_type decode_CfuPlugin_CFU_INPUT_2_KIND; + wire `Input2Kind_binary_sequential_type _zz_decode_CfuPlugin_CFU_INPUT_2_KIND; + wire `Input2Kind_binary_sequential_type _zz_decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND; + wire `Input2Kind_binary_sequential_type _zz_decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND_1; + wire decode_CfuPlugin_CFU_ENABLE; + wire decode_IS_RS2_SIGNED; + wire decode_IS_RS1_SIGNED; + wire decode_IS_DIV; + wire memory_IS_MUL; + wire execute_IS_MUL; + wire decode_IS_MUL; + wire `EnvCtrlEnum_binary_sequential_type _zz_memory_to_writeBack_ENV_CTRL; + wire `EnvCtrlEnum_binary_sequential_type _zz_memory_to_writeBack_ENV_CTRL_1; + wire `EnvCtrlEnum_binary_sequential_type _zz_execute_to_memory_ENV_CTRL; + wire `EnvCtrlEnum_binary_sequential_type _zz_execute_to_memory_ENV_CTRL_1; + wire `EnvCtrlEnum_binary_sequential_type decode_ENV_CTRL; + wire `EnvCtrlEnum_binary_sequential_type _zz_decode_ENV_CTRL; + wire `EnvCtrlEnum_binary_sequential_type _zz_decode_to_execute_ENV_CTRL; + wire `EnvCtrlEnum_binary_sequential_type _zz_decode_to_execute_ENV_CTRL_1; + wire decode_IS_CSR; + wire `BranchCtrlEnum_binary_sequential_type _zz_decode_to_execute_BRANCH_CTRL; + wire `BranchCtrlEnum_binary_sequential_type _zz_decode_to_execute_BRANCH_CTRL_1; + wire `ShiftCtrlEnum_binary_sequential_type _zz_execute_to_memory_SHIFT_CTRL; + wire `ShiftCtrlEnum_binary_sequential_type _zz_execute_to_memory_SHIFT_CTRL_1; + wire `ShiftCtrlEnum_binary_sequential_type decode_SHIFT_CTRL; + wire `ShiftCtrlEnum_binary_sequential_type _zz_decode_SHIFT_CTRL; + wire `ShiftCtrlEnum_binary_sequential_type _zz_decode_to_execute_SHIFT_CTRL; + wire `ShiftCtrlEnum_binary_sequential_type _zz_decode_to_execute_SHIFT_CTRL_1; + wire `AluBitwiseCtrlEnum_binary_sequential_type decode_ALU_BITWISE_CTRL; + wire `AluBitwiseCtrlEnum_binary_sequential_type _zz_decode_ALU_BITWISE_CTRL; + wire `AluBitwiseCtrlEnum_binary_sequential_type _zz_decode_to_execute_ALU_BITWISE_CTRL; + wire `AluBitwiseCtrlEnum_binary_sequential_type _zz_decode_to_execute_ALU_BITWISE_CTRL_1; + wire decode_SRC_LESS_UNSIGNED; + wire decode_MEMORY_MANAGMENT; + wire memory_MEMORY_WR; + wire decode_MEMORY_WR; + wire execute_BYPASSABLE_MEMORY_STAGE; + wire decode_BYPASSABLE_MEMORY_STAGE; + wire decode_BYPASSABLE_EXECUTE_STAGE; + wire `Src2CtrlEnum_binary_sequential_type decode_SRC2_CTRL; + wire `Src2CtrlEnum_binary_sequential_type _zz_decode_SRC2_CTRL; + wire `Src2CtrlEnum_binary_sequential_type _zz_decode_to_execute_SRC2_CTRL; + wire `Src2CtrlEnum_binary_sequential_type _zz_decode_to_execute_SRC2_CTRL_1; + wire `AluCtrlEnum_binary_sequential_type decode_ALU_CTRL; + wire `AluCtrlEnum_binary_sequential_type _zz_decode_ALU_CTRL; + wire `AluCtrlEnum_binary_sequential_type _zz_decode_to_execute_ALU_CTRL; + wire `AluCtrlEnum_binary_sequential_type _zz_decode_to_execute_ALU_CTRL_1; + wire `Src1CtrlEnum_binary_sequential_type decode_SRC1_CTRL; + wire `Src1CtrlEnum_binary_sequential_type _zz_decode_SRC1_CTRL; + wire `Src1CtrlEnum_binary_sequential_type _zz_decode_to_execute_SRC1_CTRL; + wire `Src1CtrlEnum_binary_sequential_type _zz_decode_to_execute_SRC1_CTRL_1; + wire decode_MEMORY_FORCE_CONSTISTENCY; + wire [31:0] writeBack_FORMAL_PC_NEXT; + wire [31:0] memory_FORMAL_PC_NEXT; + wire [31:0] execute_FORMAL_PC_NEXT; + wire [31:0] decode_FORMAL_PC_NEXT; + wire [31:0] memory_PC; + reg _zz_memory_to_writeBack_CfuPlugin_CFU_IN_FLIGHT; + reg _zz_execute_to_memory_CfuPlugin_CFU_IN_FLIGHT; + wire memory_CfuPlugin_CFU_IN_FLIGHT; + wire `Input2Kind_binary_sequential_type execute_CfuPlugin_CFU_INPUT_2_KIND; + wire `Input2Kind_binary_sequential_type _zz_execute_CfuPlugin_CFU_INPUT_2_KIND; + wire execute_CfuPlugin_CFU_ENABLE; + wire execute_DO_EBREAK; + wire decode_IS_EBREAK; + wire execute_IS_RS1_SIGNED; + wire execute_IS_DIV; + wire execute_IS_RS2_SIGNED; + wire memory_IS_DIV; + wire writeBack_IS_MUL; + wire [33:0] writeBack_MUL_HH; + wire [51:0] writeBack_MUL_LOW; + wire [33:0] memory_MUL_HL; + wire [33:0] memory_MUL_LH; + wire [31:0] memory_MUL_LL; + wire execute_CSR_READ_OPCODE; + wire execute_CSR_WRITE_OPCODE; + wire execute_IS_CSR; + wire `EnvCtrlEnum_binary_sequential_type memory_ENV_CTRL; + wire `EnvCtrlEnum_binary_sequential_type _zz_memory_ENV_CTRL; + wire `EnvCtrlEnum_binary_sequential_type execute_ENV_CTRL; + wire `EnvCtrlEnum_binary_sequential_type _zz_execute_ENV_CTRL; + wire `EnvCtrlEnum_binary_sequential_type writeBack_ENV_CTRL; + wire `EnvCtrlEnum_binary_sequential_type _zz_writeBack_ENV_CTRL; + wire [31:0] execute_BRANCH_CALC; + wire execute_BRANCH_DO; + wire [31:0] execute_PC; + wire execute_PREDICTION_HAD_BRANCHED2; + (* keep , syn_keep *) wire [31:0] execute_RS1 /* synthesis syn_keep = 1 */ ; + wire execute_BRANCH_COND_RESULT; + wire `BranchCtrlEnum_binary_sequential_type execute_BRANCH_CTRL; + wire `BranchCtrlEnum_binary_sequential_type _zz_execute_BRANCH_CTRL; + wire decode_RS2_USE; + wire decode_RS1_USE; + reg [31:0] _zz_decode_RS2; + wire execute_REGFILE_WRITE_VALID; + wire execute_BYPASSABLE_EXECUTE_STAGE; + wire memory_REGFILE_WRITE_VALID; + wire [31:0] memory_INSTRUCTION; + wire memory_BYPASSABLE_MEMORY_STAGE; + wire writeBack_REGFILE_WRITE_VALID; + reg [31:0] decode_RS2; + reg [31:0] decode_RS1; + wire [31:0] memory_SHIFT_RIGHT; + reg [31:0] _zz_decode_RS2_1; + wire `ShiftCtrlEnum_binary_sequential_type memory_SHIFT_CTRL; + wire `ShiftCtrlEnum_binary_sequential_type _zz_memory_SHIFT_CTRL; + wire `ShiftCtrlEnum_binary_sequential_type execute_SHIFT_CTRL; + wire `ShiftCtrlEnum_binary_sequential_type _zz_execute_SHIFT_CTRL; + wire execute_SRC_LESS_UNSIGNED; + wire execute_SRC2_FORCE_ZERO; + wire execute_SRC_USE_SUB_LESS; + wire [31:0] _zz_execute_SRC2; + wire `Src2CtrlEnum_binary_sequential_type execute_SRC2_CTRL; + wire `Src2CtrlEnum_binary_sequential_type _zz_execute_SRC2_CTRL; + wire `Src1CtrlEnum_binary_sequential_type execute_SRC1_CTRL; + wire `Src1CtrlEnum_binary_sequential_type _zz_execute_SRC1_CTRL; + wire decode_SRC_USE_SUB_LESS; + wire decode_SRC_ADD_ZERO; + wire [31:0] execute_SRC_ADD_SUB; + wire execute_SRC_LESS; + wire `AluCtrlEnum_binary_sequential_type execute_ALU_CTRL; + wire `AluCtrlEnum_binary_sequential_type _zz_execute_ALU_CTRL; + wire [31:0] execute_SRC2; + wire [31:0] execute_SRC1; + wire `AluBitwiseCtrlEnum_binary_sequential_type execute_ALU_BITWISE_CTRL; + wire `AluBitwiseCtrlEnum_binary_sequential_type _zz_execute_ALU_BITWISE_CTRL; + wire [31:0] _zz_lastStageRegFileWrite_payload_address; + wire _zz_lastStageRegFileWrite_valid; + reg _zz_1; + wire [31:0] decode_INSTRUCTION_ANTICIPATED; + reg decode_REGFILE_WRITE_VALID; + wire decode_LEGAL_INSTRUCTION; + wire `Input2Kind_binary_sequential_type _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_1; + wire `EnvCtrlEnum_binary_sequential_type _zz_decode_ENV_CTRL_1; + wire `BranchCtrlEnum_binary_sequential_type _zz_decode_BRANCH_CTRL; + wire `ShiftCtrlEnum_binary_sequential_type _zz_decode_SHIFT_CTRL_1; + wire `AluBitwiseCtrlEnum_binary_sequential_type _zz_decode_ALU_BITWISE_CTRL_1; + wire `Src2CtrlEnum_binary_sequential_type _zz_decode_SRC2_CTRL_1; + wire `AluCtrlEnum_binary_sequential_type _zz_decode_ALU_CTRL_1; + wire `Src1CtrlEnum_binary_sequential_type _zz_decode_SRC1_CTRL_1; + reg [31:0] _zz_decode_RS2_2; + wire writeBack_MEMORY_WR; + wire [31:0] writeBack_MEMORY_STORE_DATA_RF; + wire [31:0] writeBack_REGFILE_WRITE_DATA; + wire writeBack_MEMORY_ENABLE; + wire [31:0] memory_REGFILE_WRITE_DATA; + wire memory_MEMORY_ENABLE; + wire execute_MEMORY_FORCE_CONSTISTENCY; + wire execute_MEMORY_MANAGMENT; + (* keep , syn_keep *) wire [31:0] execute_RS2 /* synthesis syn_keep = 1 */ ; + wire execute_MEMORY_WR; + wire [31:0] execute_SRC_ADD; + wire execute_MEMORY_ENABLE; + wire [31:0] execute_INSTRUCTION; + wire decode_MEMORY_ENABLE; + wire decode_FLUSH_ALL; + reg IBusCachedPlugin_rsp_issueDetected_4; + reg IBusCachedPlugin_rsp_issueDetected_3; + reg IBusCachedPlugin_rsp_issueDetected_2; + reg IBusCachedPlugin_rsp_issueDetected_1; + wire `BranchCtrlEnum_binary_sequential_type decode_BRANCH_CTRL; + wire `BranchCtrlEnum_binary_sequential_type _zz_decode_BRANCH_CTRL_1; + wire [31:0] decode_INSTRUCTION; + reg [31:0] _zz_execute_to_memory_FORMAL_PC_NEXT; + reg [31:0] _zz_decode_to_execute_FORMAL_PC_NEXT; + wire [31:0] decode_PC; + wire [31:0] writeBack_PC; + wire [31:0] writeBack_INSTRUCTION; + reg decode_arbitration_haltItself; + reg decode_arbitration_haltByOther; + reg decode_arbitration_removeIt; + wire decode_arbitration_flushIt; + reg decode_arbitration_flushNext; + reg decode_arbitration_isValid; + wire decode_arbitration_isStuck; + wire decode_arbitration_isStuckByOthers; + wire decode_arbitration_isFlushed; + wire decode_arbitration_isMoving; + wire decode_arbitration_isFiring; + reg execute_arbitration_haltItself; + reg execute_arbitration_haltByOther; + reg execute_arbitration_removeIt; + reg execute_arbitration_flushIt; + reg execute_arbitration_flushNext; + reg execute_arbitration_isValid; + wire execute_arbitration_isStuck; + wire execute_arbitration_isStuckByOthers; + wire execute_arbitration_isFlushed; + wire execute_arbitration_isMoving; + wire execute_arbitration_isFiring; + reg memory_arbitration_haltItself; + wire memory_arbitration_haltByOther; + reg memory_arbitration_removeIt; + wire memory_arbitration_flushIt; + wire memory_arbitration_flushNext; + reg memory_arbitration_isValid; + wire memory_arbitration_isStuck; + wire memory_arbitration_isStuckByOthers; + wire memory_arbitration_isFlushed; + wire memory_arbitration_isMoving; + wire memory_arbitration_isFiring; + reg writeBack_arbitration_haltItself; + wire writeBack_arbitration_haltByOther; + reg writeBack_arbitration_removeIt; + reg writeBack_arbitration_flushIt; + reg writeBack_arbitration_flushNext; + reg writeBack_arbitration_isValid; + wire writeBack_arbitration_isStuck; + wire writeBack_arbitration_isStuckByOthers; + wire writeBack_arbitration_isFlushed; + wire writeBack_arbitration_isMoving; + wire writeBack_arbitration_isFiring; + wire [31:0] lastStageInstruction /* verilator public */ ; + wire [31:0] lastStagePc /* verilator public */ ; + wire lastStageIsValid /* verilator public */ ; + wire lastStageIsFiring /* verilator public */ ; + reg IBusCachedPlugin_fetcherHalt; + reg IBusCachedPlugin_incomingInstruction; + wire IBusCachedPlugin_predictionJumpInterface_valid; + (* keep , syn_keep *) wire [31:0] IBusCachedPlugin_predictionJumpInterface_payload /* synthesis syn_keep = 1 */ ; + reg IBusCachedPlugin_decodePrediction_cmd_hadBranch; + wire IBusCachedPlugin_decodePrediction_rsp_wasWrong; + wire IBusCachedPlugin_pcValids_0; + wire IBusCachedPlugin_pcValids_1; + wire IBusCachedPlugin_pcValids_2; + wire IBusCachedPlugin_pcValids_3; + reg IBusCachedPlugin_decodeExceptionPort_valid; + reg [3:0] IBusCachedPlugin_decodeExceptionPort_payload_code; + wire [31:0] IBusCachedPlugin_decodeExceptionPort_payload_badAddr; + wire IBusCachedPlugin_mmuBus_cmd_0_isValid; + wire IBusCachedPlugin_mmuBus_cmd_0_isStuck; + wire [31:0] IBusCachedPlugin_mmuBus_cmd_0_virtualAddress; + wire IBusCachedPlugin_mmuBus_cmd_0_bypassTranslation; + wire [31:0] IBusCachedPlugin_mmuBus_rsp_physicalAddress; + wire IBusCachedPlugin_mmuBus_rsp_isIoAccess; + wire IBusCachedPlugin_mmuBus_rsp_isPaging; + wire IBusCachedPlugin_mmuBus_rsp_allowRead; + wire IBusCachedPlugin_mmuBus_rsp_allowWrite; + wire IBusCachedPlugin_mmuBus_rsp_allowExecute; + wire IBusCachedPlugin_mmuBus_rsp_exception; + wire IBusCachedPlugin_mmuBus_rsp_refilling; + wire IBusCachedPlugin_mmuBus_rsp_bypassTranslation; + wire IBusCachedPlugin_mmuBus_end; + wire IBusCachedPlugin_mmuBus_busy; + wire dBus_cmd_valid; + wire dBus_cmd_ready; + wire dBus_cmd_payload_wr; + wire dBus_cmd_payload_uncached; + wire [31:0] dBus_cmd_payload_address; + wire [31:0] dBus_cmd_payload_data; + wire [3:0] dBus_cmd_payload_mask; + wire [2:0] dBus_cmd_payload_size; + wire dBus_cmd_payload_last; + wire dBus_rsp_valid; + wire dBus_rsp_payload_last; + wire [31:0] dBus_rsp_payload_data; + wire dBus_rsp_payload_error; + wire DBusCachedPlugin_mmuBus_cmd_0_isValid; + wire DBusCachedPlugin_mmuBus_cmd_0_isStuck; + wire [31:0] DBusCachedPlugin_mmuBus_cmd_0_virtualAddress; + wire DBusCachedPlugin_mmuBus_cmd_0_bypassTranslation; + wire [31:0] DBusCachedPlugin_mmuBus_rsp_physicalAddress; + wire DBusCachedPlugin_mmuBus_rsp_isIoAccess; + wire DBusCachedPlugin_mmuBus_rsp_isPaging; + wire DBusCachedPlugin_mmuBus_rsp_allowRead; + wire DBusCachedPlugin_mmuBus_rsp_allowWrite; + wire DBusCachedPlugin_mmuBus_rsp_allowExecute; + wire DBusCachedPlugin_mmuBus_rsp_exception; + wire DBusCachedPlugin_mmuBus_rsp_refilling; + wire DBusCachedPlugin_mmuBus_rsp_bypassTranslation; + wire DBusCachedPlugin_mmuBus_end; + wire DBusCachedPlugin_mmuBus_busy; + reg DBusCachedPlugin_redoBranch_valid; + wire [31:0] DBusCachedPlugin_redoBranch_payload; + reg DBusCachedPlugin_exceptionBus_valid; + reg [3:0] DBusCachedPlugin_exceptionBus_payload_code; + wire [31:0] DBusCachedPlugin_exceptionBus_payload_badAddr; + reg _zz_when_DBusCachedPlugin_l386; + wire decodeExceptionPort_valid; + wire [3:0] decodeExceptionPort_payload_code; + wire [31:0] decodeExceptionPort_payload_badAddr; + wire BranchPlugin_jumpInterface_valid; + wire [31:0] BranchPlugin_jumpInterface_payload; + reg BranchPlugin_branchExceptionPort_valid; + wire [3:0] BranchPlugin_branchExceptionPort_payload_code; + wire [31:0] BranchPlugin_branchExceptionPort_payload_badAddr; + wire [31:0] CsrPlugin_csrMapping_readDataSignal; + wire [31:0] CsrPlugin_csrMapping_readDataInit; + wire [31:0] CsrPlugin_csrMapping_writeDataSignal; + wire CsrPlugin_csrMapping_allowCsrSignal; + wire CsrPlugin_csrMapping_hazardFree; + reg CsrPlugin_inWfi /* verilator public */ ; + reg CsrPlugin_thirdPartyWake; + reg CsrPlugin_jumpInterface_valid; + reg [31:0] CsrPlugin_jumpInterface_payload; + wire CsrPlugin_exceptionPendings_0; + wire CsrPlugin_exceptionPendings_1; + wire CsrPlugin_exceptionPendings_2; + wire CsrPlugin_exceptionPendings_3; + wire externalInterrupt; + wire contextSwitching; + reg [1:0] CsrPlugin_privilege; + reg CsrPlugin_forceMachineWire; + reg CsrPlugin_selfException_valid; + reg [3:0] CsrPlugin_selfException_payload_code; + wire [31:0] CsrPlugin_selfException_payload_badAddr; + reg CsrPlugin_allowInterrupts; + reg CsrPlugin_allowException; + reg CsrPlugin_allowEbreakException; + reg IBusCachedPlugin_injectionPort_valid; + reg IBusCachedPlugin_injectionPort_ready; + wire [31:0] IBusCachedPlugin_injectionPort_payload; + wire IBusCachedPlugin_externalFlush; + wire IBusCachedPlugin_jump_pcLoad_valid; + wire [31:0] IBusCachedPlugin_jump_pcLoad_payload; + wire [3:0] _zz_IBusCachedPlugin_jump_pcLoad_payload; + wire [3:0] _zz_IBusCachedPlugin_jump_pcLoad_payload_1; + wire _zz_IBusCachedPlugin_jump_pcLoad_payload_2; + wire _zz_IBusCachedPlugin_jump_pcLoad_payload_3; + wire _zz_IBusCachedPlugin_jump_pcLoad_payload_4; + wire IBusCachedPlugin_fetchPc_output_valid; + wire IBusCachedPlugin_fetchPc_output_ready; + wire [31:0] IBusCachedPlugin_fetchPc_output_payload; + reg [31:0] IBusCachedPlugin_fetchPc_pcReg /* verilator public */ ; + reg IBusCachedPlugin_fetchPc_correction; + reg IBusCachedPlugin_fetchPc_correctionReg; + wire IBusCachedPlugin_fetchPc_output_fire; + wire IBusCachedPlugin_fetchPc_corrected; + reg IBusCachedPlugin_fetchPc_pcRegPropagate; + reg IBusCachedPlugin_fetchPc_booted; + reg IBusCachedPlugin_fetchPc_inc; + wire when_Fetcher_l131; + wire IBusCachedPlugin_fetchPc_output_fire_1; + wire when_Fetcher_l131_1; + reg [31:0] IBusCachedPlugin_fetchPc_pc; + wire IBusCachedPlugin_fetchPc_redo_valid; + wire [31:0] IBusCachedPlugin_fetchPc_redo_payload; + reg IBusCachedPlugin_fetchPc_flushed; + wire when_Fetcher_l158; + reg IBusCachedPlugin_iBusRsp_redoFetch; + wire IBusCachedPlugin_iBusRsp_stages_0_input_valid; + wire IBusCachedPlugin_iBusRsp_stages_0_input_ready; + wire [31:0] IBusCachedPlugin_iBusRsp_stages_0_input_payload; + wire IBusCachedPlugin_iBusRsp_stages_0_output_valid; + wire IBusCachedPlugin_iBusRsp_stages_0_output_ready; + wire [31:0] IBusCachedPlugin_iBusRsp_stages_0_output_payload; + reg IBusCachedPlugin_iBusRsp_stages_0_halt; + wire IBusCachedPlugin_iBusRsp_stages_1_input_valid; + wire IBusCachedPlugin_iBusRsp_stages_1_input_ready; + wire [31:0] IBusCachedPlugin_iBusRsp_stages_1_input_payload; + wire IBusCachedPlugin_iBusRsp_stages_1_output_valid; + wire IBusCachedPlugin_iBusRsp_stages_1_output_ready; + wire [31:0] IBusCachedPlugin_iBusRsp_stages_1_output_payload; + reg IBusCachedPlugin_iBusRsp_stages_1_halt; + wire IBusCachedPlugin_iBusRsp_stages_2_input_valid; + wire IBusCachedPlugin_iBusRsp_stages_2_input_ready; + wire [31:0] IBusCachedPlugin_iBusRsp_stages_2_input_payload; + wire IBusCachedPlugin_iBusRsp_stages_2_output_valid; + wire IBusCachedPlugin_iBusRsp_stages_2_output_ready; + wire [31:0] IBusCachedPlugin_iBusRsp_stages_2_output_payload; + reg IBusCachedPlugin_iBusRsp_stages_2_halt; + wire _zz_IBusCachedPlugin_iBusRsp_stages_0_input_ready; + wire _zz_IBusCachedPlugin_iBusRsp_stages_1_input_ready; + wire _zz_IBusCachedPlugin_iBusRsp_stages_2_input_ready; + wire IBusCachedPlugin_iBusRsp_flush; + wire _zz_IBusCachedPlugin_iBusRsp_stages_0_output_ready; + wire _zz_IBusCachedPlugin_iBusRsp_stages_0_output_ready_1; + reg _zz_IBusCachedPlugin_iBusRsp_stages_0_output_ready_2; + wire IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_valid; + wire IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_ready; + wire [31:0] IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_payload; + reg _zz_IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_valid; + reg [31:0] _zz_IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_payload; + reg IBusCachedPlugin_iBusRsp_readyForError; + wire IBusCachedPlugin_iBusRsp_output_valid; + wire IBusCachedPlugin_iBusRsp_output_ready; + wire [31:0] IBusCachedPlugin_iBusRsp_output_payload_pc; + wire IBusCachedPlugin_iBusRsp_output_payload_rsp_error; + wire [31:0] IBusCachedPlugin_iBusRsp_output_payload_rsp_inst; + wire IBusCachedPlugin_iBusRsp_output_payload_isRvc; + wire when_Fetcher_l240; + wire when_Fetcher_l320; + reg IBusCachedPlugin_injector_nextPcCalc_valids_0; + wire when_Fetcher_l329; + reg IBusCachedPlugin_injector_nextPcCalc_valids_1; + wire when_Fetcher_l329_1; + reg IBusCachedPlugin_injector_nextPcCalc_valids_2; + wire when_Fetcher_l329_2; + reg IBusCachedPlugin_injector_nextPcCalc_valids_3; + wire when_Fetcher_l329_3; + reg IBusCachedPlugin_injector_nextPcCalc_valids_4; + wire when_Fetcher_l329_4; + wire _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch; + reg [18:0] _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_1; + wire _zz_2; + reg [10:0] _zz_3; + wire _zz_4; + reg [18:0] _zz_5; + reg _zz_6; + wire _zz_IBusCachedPlugin_predictionJumpInterface_payload; + reg [10:0] _zz_IBusCachedPlugin_predictionJumpInterface_payload_1; + wire _zz_IBusCachedPlugin_predictionJumpInterface_payload_2; + reg [18:0] _zz_IBusCachedPlugin_predictionJumpInterface_payload_3; + wire iBus_cmd_valid; + wire iBus_cmd_ready; + reg [31:0] iBus_cmd_payload_address; + wire [2:0] iBus_cmd_payload_size; + wire iBus_rsp_valid; + wire [31:0] iBus_rsp_payload_data; + wire iBus_rsp_payload_error; + wire [31:0] _zz_IBusCachedPlugin_rspCounter; + reg [31:0] IBusCachedPlugin_rspCounter; + wire IBusCachedPlugin_s0_tightlyCoupledHit; + reg IBusCachedPlugin_s1_tightlyCoupledHit; + reg IBusCachedPlugin_s2_tightlyCoupledHit; + wire IBusCachedPlugin_rsp_iBusRspOutputHalt; + wire IBusCachedPlugin_rsp_issueDetected; + reg IBusCachedPlugin_rsp_redoFetch; + wire when_IBusCachedPlugin_l239; + wire when_IBusCachedPlugin_l244; + wire when_IBusCachedPlugin_l250; + wire when_IBusCachedPlugin_l256; + wire when_IBusCachedPlugin_l267; + wire dataCache_1_io_mem_cmd_s2mPipe_valid; + reg dataCache_1_io_mem_cmd_s2mPipe_ready; + wire dataCache_1_io_mem_cmd_s2mPipe_payload_wr; + wire dataCache_1_io_mem_cmd_s2mPipe_payload_uncached; + wire [31:0] dataCache_1_io_mem_cmd_s2mPipe_payload_address; + wire [31:0] dataCache_1_io_mem_cmd_s2mPipe_payload_data; + wire [3:0] dataCache_1_io_mem_cmd_s2mPipe_payload_mask; + wire [2:0] dataCache_1_io_mem_cmd_s2mPipe_payload_size; + wire dataCache_1_io_mem_cmd_s2mPipe_payload_last; + reg dataCache_1_io_mem_cmd_rValid; + reg dataCache_1_io_mem_cmd_rData_wr; + reg dataCache_1_io_mem_cmd_rData_uncached; + reg [31:0] dataCache_1_io_mem_cmd_rData_address; + reg [31:0] dataCache_1_io_mem_cmd_rData_data; + reg [3:0] dataCache_1_io_mem_cmd_rData_mask; + reg [2:0] dataCache_1_io_mem_cmd_rData_size; + reg dataCache_1_io_mem_cmd_rData_last; + wire dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_valid; + wire dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_ready; + wire dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_payload_wr; + wire dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_payload_uncached; + wire [31:0] dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_payload_address; + wire [31:0] dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_payload_data; + wire [3:0] dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_payload_mask; + wire [2:0] dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_payload_size; + wire dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_payload_last; + reg dataCache_1_io_mem_cmd_s2mPipe_rValid; + reg dataCache_1_io_mem_cmd_s2mPipe_rData_wr; + reg dataCache_1_io_mem_cmd_s2mPipe_rData_uncached; + reg [31:0] dataCache_1_io_mem_cmd_s2mPipe_rData_address; + reg [31:0] dataCache_1_io_mem_cmd_s2mPipe_rData_data; + reg [3:0] dataCache_1_io_mem_cmd_s2mPipe_rData_mask; + reg [2:0] dataCache_1_io_mem_cmd_s2mPipe_rData_size; + reg dataCache_1_io_mem_cmd_s2mPipe_rData_last; + wire when_Stream_l342; + wire [31:0] _zz_DBusCachedPlugin_rspCounter; + reg [31:0] DBusCachedPlugin_rspCounter; + wire when_DBusCachedPlugin_l303; + wire [1:0] execute_DBusCachedPlugin_size; + reg [31:0] _zz_execute_MEMORY_STORE_DATA_RF; + wire dataCache_1_io_cpu_flush_isStall; + wire when_DBusCachedPlugin_l343; + wire when_DBusCachedPlugin_l359; + wire when_DBusCachedPlugin_l386; + wire when_DBusCachedPlugin_l438; + wire when_DBusCachedPlugin_l458; + wire [7:0] writeBack_DBusCachedPlugin_rspSplits_0; + wire [7:0] writeBack_DBusCachedPlugin_rspSplits_1; + wire [7:0] writeBack_DBusCachedPlugin_rspSplits_2; + wire [7:0] writeBack_DBusCachedPlugin_rspSplits_3; + reg [31:0] writeBack_DBusCachedPlugin_rspShifted; + wire [31:0] writeBack_DBusCachedPlugin_rspRf; + wire [1:0] switch_Misc_l200; + wire _zz_writeBack_DBusCachedPlugin_rspFormated; + reg [31:0] _zz_writeBack_DBusCachedPlugin_rspFormated_1; + wire _zz_writeBack_DBusCachedPlugin_rspFormated_2; + reg [31:0] _zz_writeBack_DBusCachedPlugin_rspFormated_3; + reg [31:0] writeBack_DBusCachedPlugin_rspFormated; + wire when_DBusCachedPlugin_l484; + wire [34:0] _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2; + wire _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_3; + wire _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_4; + wire _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_5; + wire _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_6; + wire _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_7; + wire `Src1CtrlEnum_binary_sequential_type _zz_decode_SRC1_CTRL_2; + wire `AluCtrlEnum_binary_sequential_type _zz_decode_ALU_CTRL_2; + wire `Src2CtrlEnum_binary_sequential_type _zz_decode_SRC2_CTRL_2; + wire `AluBitwiseCtrlEnum_binary_sequential_type _zz_decode_ALU_BITWISE_CTRL_2; + wire `ShiftCtrlEnum_binary_sequential_type _zz_decode_SHIFT_CTRL_2; + wire `BranchCtrlEnum_binary_sequential_type _zz_decode_BRANCH_CTRL_2; + wire `EnvCtrlEnum_binary_sequential_type _zz_decode_ENV_CTRL_2; + wire `Input2Kind_binary_sequential_type _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_8; + wire when_RegFilePlugin_l63; + wire [4:0] decode_RegFilePlugin_regFileReadAddress1; + wire [4:0] decode_RegFilePlugin_regFileReadAddress2; + wire [31:0] decode_RegFilePlugin_rs1Data; + wire [31:0] decode_RegFilePlugin_rs2Data; + reg lastStageRegFileWrite_valid /* verilator public */ ; + reg [4:0] lastStageRegFileWrite_payload_address /* verilator public */ ; + reg [31:0] lastStageRegFileWrite_payload_data /* verilator public */ ; + reg _zz_7; + reg [31:0] execute_IntAluPlugin_bitwise; + reg [31:0] _zz_execute_REGFILE_WRITE_DATA; + reg [31:0] _zz_execute_SRC1; + wire _zz_execute_SRC2_1; + reg [19:0] _zz_execute_SRC2_2; + wire _zz_execute_SRC2_3; + reg [19:0] _zz_execute_SRC2_4; + reg [31:0] _zz_execute_SRC2_5; + reg [31:0] execute_SrcPlugin_addSub; + wire execute_SrcPlugin_less; + wire [4:0] execute_FullBarrelShifterPlugin_amplitude; + reg [31:0] _zz_execute_FullBarrelShifterPlugin_reversed; + wire [31:0] execute_FullBarrelShifterPlugin_reversed; + reg [31:0] _zz_decode_RS2_3; + reg HazardSimplePlugin_src0Hazard; + reg HazardSimplePlugin_src1Hazard; + wire HazardSimplePlugin_writeBackWrites_valid; + wire [4:0] HazardSimplePlugin_writeBackWrites_payload_address; + wire [31:0] HazardSimplePlugin_writeBackWrites_payload_data; + reg HazardSimplePlugin_writeBackBuffer_valid; + reg [4:0] HazardSimplePlugin_writeBackBuffer_payload_address; + reg [31:0] HazardSimplePlugin_writeBackBuffer_payload_data; + wire HazardSimplePlugin_addr0Match; + wire HazardSimplePlugin_addr1Match; + wire when_HazardSimplePlugin_l47; + wire when_HazardSimplePlugin_l48; + wire when_HazardSimplePlugin_l51; + wire when_HazardSimplePlugin_l45; + wire when_HazardSimplePlugin_l57; + wire when_HazardSimplePlugin_l58; + wire when_HazardSimplePlugin_l48_1; + wire when_HazardSimplePlugin_l51_1; + wire when_HazardSimplePlugin_l45_1; + wire when_HazardSimplePlugin_l57_1; + wire when_HazardSimplePlugin_l58_1; + wire when_HazardSimplePlugin_l48_2; + wire when_HazardSimplePlugin_l51_2; + wire when_HazardSimplePlugin_l45_2; + wire when_HazardSimplePlugin_l57_2; + wire when_HazardSimplePlugin_l58_2; + wire when_HazardSimplePlugin_l105; + wire when_HazardSimplePlugin_l108; + wire when_HazardSimplePlugin_l113; + wire execute_BranchPlugin_eq; + wire [2:0] switch_Misc_l200_1; + reg _zz_execute_BRANCH_COND_RESULT; + reg _zz_execute_BRANCH_COND_RESULT_1; + wire _zz_execute_BranchPlugin_missAlignedTarget; + reg [19:0] _zz_execute_BranchPlugin_missAlignedTarget_1; + wire _zz_execute_BranchPlugin_missAlignedTarget_2; + reg [10:0] _zz_execute_BranchPlugin_missAlignedTarget_3; + wire _zz_execute_BranchPlugin_missAlignedTarget_4; + reg [18:0] _zz_execute_BranchPlugin_missAlignedTarget_5; + reg _zz_execute_BranchPlugin_missAlignedTarget_6; + wire execute_BranchPlugin_missAlignedTarget; + reg [31:0] execute_BranchPlugin_branch_src1; + reg [31:0] execute_BranchPlugin_branch_src2; + wire _zz_execute_BranchPlugin_branch_src2; + reg [19:0] _zz_execute_BranchPlugin_branch_src2_1; + wire _zz_execute_BranchPlugin_branch_src2_2; + reg [10:0] _zz_execute_BranchPlugin_branch_src2_3; + wire _zz_execute_BranchPlugin_branch_src2_4; + reg [18:0] _zz_execute_BranchPlugin_branch_src2_5; + wire [31:0] execute_BranchPlugin_branchAdder; + wire when_BranchPlugin_l296; + reg [1:0] CsrPlugin_misa_base; + reg [25:0] CsrPlugin_misa_extensions; + reg [1:0] CsrPlugin_mtvec_mode; + reg [29:0] CsrPlugin_mtvec_base; + reg [31:0] CsrPlugin_mepc; + reg CsrPlugin_mstatus_MIE; + reg CsrPlugin_mstatus_MPIE; + reg [1:0] CsrPlugin_mstatus_MPP; + reg CsrPlugin_mip_MEIP; + reg CsrPlugin_mip_MTIP; + reg CsrPlugin_mip_MSIP; + reg CsrPlugin_mie_MEIE; + reg CsrPlugin_mie_MTIE; + reg CsrPlugin_mie_MSIE; + reg [31:0] CsrPlugin_mscratch; + reg CsrPlugin_mcause_interrupt; + reg [3:0] CsrPlugin_mcause_exceptionCode; + reg [31:0] CsrPlugin_mtval; + reg [63:0] CsrPlugin_mcycle = 64'b0000000000000000000000000000000000000000000000000000000000000000; + reg [63:0] CsrPlugin_minstret = 64'b0000000000000000000000000000000000000000000000000000000000000000; + wire _zz_when_CsrPlugin_l952; + wire _zz_when_CsrPlugin_l952_1; + wire _zz_when_CsrPlugin_l952_2; + reg CsrPlugin_exceptionPortCtrl_exceptionValids_decode; + reg CsrPlugin_exceptionPortCtrl_exceptionValids_execute; + reg CsrPlugin_exceptionPortCtrl_exceptionValids_memory; + reg CsrPlugin_exceptionPortCtrl_exceptionValids_writeBack; + reg CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_decode; + reg CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_execute; + reg CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_memory; + reg CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_writeBack; + reg [3:0] CsrPlugin_exceptionPortCtrl_exceptionContext_code; + reg [31:0] CsrPlugin_exceptionPortCtrl_exceptionContext_badAddr; + wire [1:0] CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilegeUncapped; + wire [1:0] CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilege; + wire [1:0] _zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code; + wire _zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_1; + wire [1:0] _zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_2; + wire _zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_3; + wire when_CsrPlugin_l909; + wire when_CsrPlugin_l909_1; + wire when_CsrPlugin_l909_2; + wire when_CsrPlugin_l909_3; + wire when_CsrPlugin_l922; + reg CsrPlugin_interrupt_valid; + reg [3:0] CsrPlugin_interrupt_code /* verilator public */ ; + reg [1:0] CsrPlugin_interrupt_targetPrivilege; + wire when_CsrPlugin_l946; + wire when_CsrPlugin_l952; + wire when_CsrPlugin_l952_1; + wire when_CsrPlugin_l952_2; + wire CsrPlugin_exception; + reg CsrPlugin_lastStageWasWfi; + reg CsrPlugin_pipelineLiberator_pcValids_0; + reg CsrPlugin_pipelineLiberator_pcValids_1; + reg CsrPlugin_pipelineLiberator_pcValids_2; + wire CsrPlugin_pipelineLiberator_active; + wire when_CsrPlugin_l980; + wire when_CsrPlugin_l980_1; + wire when_CsrPlugin_l980_2; + wire when_CsrPlugin_l985; + reg CsrPlugin_pipelineLiberator_done; + wire when_CsrPlugin_l991; + wire CsrPlugin_interruptJump /* verilator public */ ; + reg CsrPlugin_hadException /* verilator public */ ; + reg [1:0] CsrPlugin_targetPrivilege; + reg [3:0] CsrPlugin_trapCause; + reg [1:0] CsrPlugin_xtvec_mode; + reg [29:0] CsrPlugin_xtvec_base; + wire when_CsrPlugin_l1019; + wire when_CsrPlugin_l1064; + wire [1:0] switch_CsrPlugin_l1068; + reg execute_CsrPlugin_wfiWake; + wire when_CsrPlugin_l1108; + wire when_CsrPlugin_l1110; + wire when_CsrPlugin_l1116; + wire execute_CsrPlugin_blockedBySideEffects; + reg execute_CsrPlugin_illegalAccess; + reg execute_CsrPlugin_illegalInstruction; + wire when_CsrPlugin_l1129; + wire when_CsrPlugin_l1136; + wire when_CsrPlugin_l1137; + wire when_CsrPlugin_l1144; + reg execute_CsrPlugin_writeInstruction; + reg execute_CsrPlugin_readInstruction; + wire execute_CsrPlugin_writeEnable; + wire execute_CsrPlugin_readEnable; + wire [31:0] execute_CsrPlugin_readToWriteData; + wire switch_Misc_l200_2; + reg [31:0] _zz_CsrPlugin_csrMapping_writeDataSignal; + wire when_CsrPlugin_l1176; + wire when_CsrPlugin_l1180; + wire [11:0] execute_CsrPlugin_csrAddress; + reg execute_MulPlugin_aSigned; + reg execute_MulPlugin_bSigned; + wire [31:0] execute_MulPlugin_a; + wire [31:0] execute_MulPlugin_b; + wire [1:0] switch_MulPlugin_l87; + wire [15:0] execute_MulPlugin_aULow; + wire [15:0] execute_MulPlugin_bULow; + wire [16:0] execute_MulPlugin_aSLow; + wire [16:0] execute_MulPlugin_bSLow; + wire [16:0] execute_MulPlugin_aHigh; + wire [16:0] execute_MulPlugin_bHigh; + wire [65:0] writeBack_MulPlugin_result; + wire when_MulPlugin_l147; + wire [1:0] switch_MulPlugin_l148; + reg [32:0] memory_DivPlugin_rs1; + reg [31:0] memory_DivPlugin_rs2; + reg [64:0] memory_DivPlugin_accumulator; + wire memory_DivPlugin_frontendOk; + reg memory_DivPlugin_div_needRevert; + reg memory_DivPlugin_div_counter_willIncrement; + reg memory_DivPlugin_div_counter_willClear; + reg [5:0] memory_DivPlugin_div_counter_valueNext; + reg [5:0] memory_DivPlugin_div_counter_value; + wire memory_DivPlugin_div_counter_willOverflowIfInc; + wire memory_DivPlugin_div_counter_willOverflow; + reg memory_DivPlugin_div_done; + wire when_MulDivIterativePlugin_l126; + wire when_MulDivIterativePlugin_l126_1; + reg [31:0] memory_DivPlugin_div_result; + wire when_MulDivIterativePlugin_l128; + wire when_MulDivIterativePlugin_l129; + wire when_MulDivIterativePlugin_l132; + wire [31:0] _zz_memory_DivPlugin_div_stage_0_remainderShifted; + wire [32:0] memory_DivPlugin_div_stage_0_remainderShifted; + wire [32:0] memory_DivPlugin_div_stage_0_remainderMinusDenominator; + wire [31:0] memory_DivPlugin_div_stage_0_outRemainder; + wire [31:0] memory_DivPlugin_div_stage_0_outNumerator; + wire when_MulDivIterativePlugin_l151; + wire [31:0] _zz_memory_DivPlugin_div_result; + wire when_MulDivIterativePlugin_l162; + wire _zz_memory_DivPlugin_rs2; + wire _zz_memory_DivPlugin_rs1; + reg [32:0] _zz_memory_DivPlugin_rs1_1; + reg [31:0] externalInterruptArray_regNext; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit; + wire [31:0] _zz_CsrPlugin_csrMapping_readDataInit_1; + reg DebugPlugin_firstCycle; + reg DebugPlugin_secondCycle; + reg DebugPlugin_resetIt; + reg DebugPlugin_haltIt; + reg DebugPlugin_stepIt; + reg DebugPlugin_isPipBusy; + reg DebugPlugin_godmode; + wire when_DebugPlugin_l225; + reg DebugPlugin_haltedByBreak; + reg DebugPlugin_debugUsed /* verilator public */ ; + reg DebugPlugin_disableEbreak; + wire DebugPlugin_allowEBreak; + reg [31:0] DebugPlugin_busReadDataReg; + reg _zz_when_DebugPlugin_l244; + wire when_DebugPlugin_l244; + wire [5:0] switch_DebugPlugin_l256; + wire when_DebugPlugin_l260; + wire when_DebugPlugin_l260_1; + wire when_DebugPlugin_l261; + wire when_DebugPlugin_l261_1; + wire when_DebugPlugin_l262; + wire when_DebugPlugin_l263; + wire when_DebugPlugin_l264; + wire when_DebugPlugin_l264_1; + wire when_DebugPlugin_l284; + wire when_DebugPlugin_l287; + wire when_DebugPlugin_l300; + reg DebugPlugin_resetIt_regNext; + wire when_DebugPlugin_l316; + wire execute_CfuPlugin_schedule; + reg execute_CfuPlugin_hold; + reg execute_CfuPlugin_fired; + wire CfuPlugin_bus_cmd_fire; + wire when_CfuPlugin_l171; + wire when_CfuPlugin_l175; + wire [9:0] execute_CfuPlugin_functionsIds_0; + wire _zz_CfuPlugin_bus_cmd_payload_inputs_1; + reg [23:0] _zz_CfuPlugin_bus_cmd_payload_inputs_1_1; + reg [31:0] _zz_CfuPlugin_bus_cmd_payload_inputs_1_2; + wire CfuPlugin_bus_rsp_rsp_valid; + reg CfuPlugin_bus_rsp_rsp_ready; + wire [31:0] CfuPlugin_bus_rsp_rsp_payload_outputs_0; + reg CfuPlugin_bus_rsp_rValid; + reg [31:0] CfuPlugin_bus_rsp_rData_outputs_0; + wire when_CfuPlugin_l208; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_2; + reg [31:0] _zz_when_GenCoreDefault_l367; + wire when_GenCoreDefault_l367; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_3; + reg [31:0] _zz_when_GenCoreDefault_l367_1; + wire when_GenCoreDefault_l367_1; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_4; + reg [31:0] _zz_when_GenCoreDefault_l367_2; + wire when_GenCoreDefault_l367_2; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_5; + reg [31:0] _zz_when_GenCoreDefault_l367_3; + wire when_GenCoreDefault_l367_3; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_6; + reg [31:0] _zz_when_GenCoreDefault_l367_4; + wire when_GenCoreDefault_l367_4; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_7; + reg [31:0] _zz_when_GenCoreDefault_l367_5; + wire when_GenCoreDefault_l367_5; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_8; + reg [31:0] _zz_when_GenCoreDefault_l367_6; + wire when_GenCoreDefault_l367_6; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_9; + reg [31:0] _zz_when_GenCoreDefault_l367_7; + wire when_GenCoreDefault_l367_7; + wire when_Pipeline_l124; + reg [31:0] decode_to_execute_PC; + wire when_Pipeline_l124_1; + reg [31:0] execute_to_memory_PC; + wire when_Pipeline_l124_2; + reg [31:0] memory_to_writeBack_PC; + wire when_Pipeline_l124_3; + reg [31:0] decode_to_execute_INSTRUCTION; + wire when_Pipeline_l124_4; + reg [31:0] execute_to_memory_INSTRUCTION; + wire when_Pipeline_l124_5; + reg [31:0] memory_to_writeBack_INSTRUCTION; + wire when_Pipeline_l124_6; + reg [31:0] decode_to_execute_FORMAL_PC_NEXT; + wire when_Pipeline_l124_7; + reg [31:0] execute_to_memory_FORMAL_PC_NEXT; + wire when_Pipeline_l124_8; + reg [31:0] memory_to_writeBack_FORMAL_PC_NEXT; + wire when_Pipeline_l124_9; + reg decode_to_execute_MEMORY_FORCE_CONSTISTENCY; + wire when_Pipeline_l124_10; + reg `Src1CtrlEnum_binary_sequential_type decode_to_execute_SRC1_CTRL; + wire when_Pipeline_l124_11; + reg decode_to_execute_SRC_USE_SUB_LESS; + wire when_Pipeline_l124_12; + reg decode_to_execute_MEMORY_ENABLE; + wire when_Pipeline_l124_13; + reg execute_to_memory_MEMORY_ENABLE; + wire when_Pipeline_l124_14; + reg memory_to_writeBack_MEMORY_ENABLE; + wire when_Pipeline_l124_15; + reg `AluCtrlEnum_binary_sequential_type decode_to_execute_ALU_CTRL; + wire when_Pipeline_l124_16; + reg `Src2CtrlEnum_binary_sequential_type decode_to_execute_SRC2_CTRL; + wire when_Pipeline_l124_17; + reg decode_to_execute_REGFILE_WRITE_VALID; + wire when_Pipeline_l124_18; + reg execute_to_memory_REGFILE_WRITE_VALID; + wire when_Pipeline_l124_19; + reg memory_to_writeBack_REGFILE_WRITE_VALID; + wire when_Pipeline_l124_20; + reg decode_to_execute_BYPASSABLE_EXECUTE_STAGE; + wire when_Pipeline_l124_21; + reg decode_to_execute_BYPASSABLE_MEMORY_STAGE; + wire when_Pipeline_l124_22; + reg execute_to_memory_BYPASSABLE_MEMORY_STAGE; + wire when_Pipeline_l124_23; + reg decode_to_execute_MEMORY_WR; + wire when_Pipeline_l124_24; + reg execute_to_memory_MEMORY_WR; + wire when_Pipeline_l124_25; + reg memory_to_writeBack_MEMORY_WR; + wire when_Pipeline_l124_26; + reg decode_to_execute_MEMORY_MANAGMENT; + wire when_Pipeline_l124_27; + reg decode_to_execute_SRC_LESS_UNSIGNED; + wire when_Pipeline_l124_28; + reg `AluBitwiseCtrlEnum_binary_sequential_type decode_to_execute_ALU_BITWISE_CTRL; + wire when_Pipeline_l124_29; + reg `ShiftCtrlEnum_binary_sequential_type decode_to_execute_SHIFT_CTRL; + wire when_Pipeline_l124_30; + reg `ShiftCtrlEnum_binary_sequential_type execute_to_memory_SHIFT_CTRL; + wire when_Pipeline_l124_31; + reg `BranchCtrlEnum_binary_sequential_type decode_to_execute_BRANCH_CTRL; + wire when_Pipeline_l124_32; + reg decode_to_execute_IS_CSR; + wire when_Pipeline_l124_33; + reg `EnvCtrlEnum_binary_sequential_type decode_to_execute_ENV_CTRL; + wire when_Pipeline_l124_34; + reg `EnvCtrlEnum_binary_sequential_type execute_to_memory_ENV_CTRL; + wire when_Pipeline_l124_35; + reg `EnvCtrlEnum_binary_sequential_type memory_to_writeBack_ENV_CTRL; + wire when_Pipeline_l124_36; + reg decode_to_execute_IS_MUL; + wire when_Pipeline_l124_37; + reg execute_to_memory_IS_MUL; + wire when_Pipeline_l124_38; + reg memory_to_writeBack_IS_MUL; + wire when_Pipeline_l124_39; + reg decode_to_execute_IS_DIV; + wire when_Pipeline_l124_40; + reg execute_to_memory_IS_DIV; + wire when_Pipeline_l124_41; + reg decode_to_execute_IS_RS1_SIGNED; + wire when_Pipeline_l124_42; + reg decode_to_execute_IS_RS2_SIGNED; + wire when_Pipeline_l124_43; + reg decode_to_execute_CfuPlugin_CFU_ENABLE; + wire when_Pipeline_l124_44; + reg `Input2Kind_binary_sequential_type decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND; + wire when_Pipeline_l124_45; + reg [31:0] decode_to_execute_RS1; + wire when_Pipeline_l124_46; + reg [31:0] decode_to_execute_RS2; + wire when_Pipeline_l124_47; + reg decode_to_execute_SRC2_FORCE_ZERO; + wire when_Pipeline_l124_48; + reg decode_to_execute_PREDICTION_HAD_BRANCHED2; + wire when_Pipeline_l124_49; + reg decode_to_execute_CSR_WRITE_OPCODE; + wire when_Pipeline_l124_50; + reg decode_to_execute_CSR_READ_OPCODE; + wire when_Pipeline_l124_51; + reg decode_to_execute_DO_EBREAK; + wire when_Pipeline_l124_52; + reg [31:0] execute_to_memory_MEMORY_STORE_DATA_RF; + wire when_Pipeline_l124_53; + reg [31:0] memory_to_writeBack_MEMORY_STORE_DATA_RF; + wire when_Pipeline_l124_54; + reg [31:0] execute_to_memory_REGFILE_WRITE_DATA; + wire when_Pipeline_l124_55; + reg [31:0] memory_to_writeBack_REGFILE_WRITE_DATA; + wire when_Pipeline_l124_56; + reg [31:0] execute_to_memory_SHIFT_RIGHT; + wire when_Pipeline_l124_57; + reg [31:0] execute_to_memory_MUL_LL; + wire when_Pipeline_l124_58; + reg [33:0] execute_to_memory_MUL_LH; + wire when_Pipeline_l124_59; + reg [33:0] execute_to_memory_MUL_HL; + wire when_Pipeline_l124_60; + reg [33:0] execute_to_memory_MUL_HH; + wire when_Pipeline_l124_61; + reg [33:0] memory_to_writeBack_MUL_HH; + wire when_Pipeline_l124_62; + reg execute_to_memory_CfuPlugin_CFU_IN_FLIGHT; + wire when_Pipeline_l124_63; + reg memory_to_writeBack_CfuPlugin_CFU_IN_FLIGHT; + wire when_Pipeline_l124_64; + reg [51:0] memory_to_writeBack_MUL_LOW; + wire when_Pipeline_l151; + wire when_Pipeline_l154; + wire when_Pipeline_l151_1; + wire when_Pipeline_l154_1; + wire when_Pipeline_l151_2; + wire when_Pipeline_l154_2; + reg [2:0] switch_Fetcher_l362; + wire when_Fetcher_l378; + wire when_CsrPlugin_l1264; + reg execute_CsrPlugin_csr_3264; + wire when_CsrPlugin_l1264_1; + reg execute_CsrPlugin_csr_3857; + wire when_CsrPlugin_l1264_2; + reg execute_CsrPlugin_csr_3858; + wire when_CsrPlugin_l1264_3; + reg execute_CsrPlugin_csr_3859; + wire when_CsrPlugin_l1264_4; + reg execute_CsrPlugin_csr_3860; + wire when_CsrPlugin_l1264_5; + reg execute_CsrPlugin_csr_769; + wire when_CsrPlugin_l1264_6; + reg execute_CsrPlugin_csr_768; + wire when_CsrPlugin_l1264_7; + reg execute_CsrPlugin_csr_836; + wire when_CsrPlugin_l1264_8; + reg execute_CsrPlugin_csr_772; + wire when_CsrPlugin_l1264_9; + reg execute_CsrPlugin_csr_773; + wire when_CsrPlugin_l1264_10; + reg execute_CsrPlugin_csr_833; + wire when_CsrPlugin_l1264_11; + reg execute_CsrPlugin_csr_832; + wire when_CsrPlugin_l1264_12; + reg execute_CsrPlugin_csr_834; + wire when_CsrPlugin_l1264_13; + reg execute_CsrPlugin_csr_835; + wire when_CsrPlugin_l1264_14; + reg execute_CsrPlugin_csr_2816; + wire when_CsrPlugin_l1264_15; + reg execute_CsrPlugin_csr_2944; + wire when_CsrPlugin_l1264_16; + reg execute_CsrPlugin_csr_2818; + wire when_CsrPlugin_l1264_17; + reg execute_CsrPlugin_csr_2946; + wire when_CsrPlugin_l1264_18; + reg execute_CsrPlugin_csr_3072; + wire when_CsrPlugin_l1264_19; + reg execute_CsrPlugin_csr_3200; + wire when_CsrPlugin_l1264_20; + reg execute_CsrPlugin_csr_3074; + wire when_CsrPlugin_l1264_21; + reg execute_CsrPlugin_csr_3202; + wire when_CsrPlugin_l1264_22; + reg execute_CsrPlugin_csr_3008; + wire when_CsrPlugin_l1264_23; + reg execute_CsrPlugin_csr_4032; + wire when_CsrPlugin_l1264_24; + reg execute_CsrPlugin_csr_2820; + wire when_CsrPlugin_l1264_25; + reg execute_CsrPlugin_csr_2821; + wire when_CsrPlugin_l1264_26; + reg execute_CsrPlugin_csr_2822; + wire when_CsrPlugin_l1264_27; + reg execute_CsrPlugin_csr_2823; + wire when_CsrPlugin_l1264_28; + reg execute_CsrPlugin_csr_2824; + wire when_CsrPlugin_l1264_29; + reg execute_CsrPlugin_csr_2825; + wire when_CsrPlugin_l1264_30; + reg execute_CsrPlugin_csr_2826; + wire when_CsrPlugin_l1264_31; + reg execute_CsrPlugin_csr_2827; + wire when_CsrPlugin_l1264_32; + reg execute_CsrPlugin_csr_2828; + wire when_CsrPlugin_l1264_33; + reg execute_CsrPlugin_csr_2829; + wire when_CsrPlugin_l1264_34; + reg execute_CsrPlugin_csr_2830; + wire when_CsrPlugin_l1264_35; + reg execute_CsrPlugin_csr_2831; + wire when_CsrPlugin_l1264_36; + reg execute_CsrPlugin_csr_2832; + wire when_CsrPlugin_l1264_37; + reg execute_CsrPlugin_csr_2833; + wire when_CsrPlugin_l1264_38; + reg execute_CsrPlugin_csr_2834; + wire when_CsrPlugin_l1264_39; + reg execute_CsrPlugin_csr_2835; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_10; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_11; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_12; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_13; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_14; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_15; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_16; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_17; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_18; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_19; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_20; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_21; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_22; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_23; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_24; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_25; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_26; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_27; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_28; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_29; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_30; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_31; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_32; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_33; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_34; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_35; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_36; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_37; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_38; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_39; + reg [31:0] _zz_CsrPlugin_csrMapping_readDataInit_40; + wire when_CsrPlugin_l1297; + wire when_CsrPlugin_l1302; + reg [2:0] _zz_iBusWishbone_ADR; + wire when_InstructionCache_l239; + reg _zz_iBus_rsp_valid; + reg [31:0] iBusWishbone_DAT_MISO_regNext; + reg [2:0] _zz_dBus_cmd_ready; + wire _zz_dBus_cmd_ready_1; + wire _zz_dBus_cmd_ready_2; + wire _zz_dBus_cmd_ready_3; + wire _zz_dBus_cmd_ready_4; + wire _zz_dBus_cmd_ready_5; + reg _zz_dBus_rsp_valid; + reg [31:0] dBusWishbone_DAT_MISO_regNext; + `ifndef SYNTHESIS + reg [39:0] decode_CfuPlugin_CFU_INPUT_2_KIND_string; + reg [39:0] _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_string; + reg [39:0] _zz_decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND_string; + reg [39:0] _zz_decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND_1_string; + reg [39:0] _zz_memory_to_writeBack_ENV_CTRL_string; + reg [39:0] _zz_memory_to_writeBack_ENV_CTRL_1_string; + reg [39:0] _zz_execute_to_memory_ENV_CTRL_string; + reg [39:0] _zz_execute_to_memory_ENV_CTRL_1_string; + reg [39:0] decode_ENV_CTRL_string; + reg [39:0] _zz_decode_ENV_CTRL_string; + reg [39:0] _zz_decode_to_execute_ENV_CTRL_string; + reg [39:0] _zz_decode_to_execute_ENV_CTRL_1_string; + reg [31:0] _zz_decode_to_execute_BRANCH_CTRL_string; + reg [31:0] _zz_decode_to_execute_BRANCH_CTRL_1_string; + reg [71:0] _zz_execute_to_memory_SHIFT_CTRL_string; + reg [71:0] _zz_execute_to_memory_SHIFT_CTRL_1_string; + reg [71:0] decode_SHIFT_CTRL_string; + reg [71:0] _zz_decode_SHIFT_CTRL_string; + reg [71:0] _zz_decode_to_execute_SHIFT_CTRL_string; + reg [71:0] _zz_decode_to_execute_SHIFT_CTRL_1_string; + reg [39:0] decode_ALU_BITWISE_CTRL_string; + reg [39:0] _zz_decode_ALU_BITWISE_CTRL_string; + reg [39:0] _zz_decode_to_execute_ALU_BITWISE_CTRL_string; + reg [39:0] _zz_decode_to_execute_ALU_BITWISE_CTRL_1_string; + reg [23:0] decode_SRC2_CTRL_string; + reg [23:0] _zz_decode_SRC2_CTRL_string; + reg [23:0] _zz_decode_to_execute_SRC2_CTRL_string; + reg [23:0] _zz_decode_to_execute_SRC2_CTRL_1_string; + reg [63:0] decode_ALU_CTRL_string; + reg [63:0] _zz_decode_ALU_CTRL_string; + reg [63:0] _zz_decode_to_execute_ALU_CTRL_string; + reg [63:0] _zz_decode_to_execute_ALU_CTRL_1_string; + reg [95:0] decode_SRC1_CTRL_string; + reg [95:0] _zz_decode_SRC1_CTRL_string; + reg [95:0] _zz_decode_to_execute_SRC1_CTRL_string; + reg [95:0] _zz_decode_to_execute_SRC1_CTRL_1_string; + reg [39:0] execute_CfuPlugin_CFU_INPUT_2_KIND_string; + reg [39:0] _zz_execute_CfuPlugin_CFU_INPUT_2_KIND_string; + reg [39:0] memory_ENV_CTRL_string; + reg [39:0] _zz_memory_ENV_CTRL_string; + reg [39:0] execute_ENV_CTRL_string; + reg [39:0] _zz_execute_ENV_CTRL_string; + reg [39:0] writeBack_ENV_CTRL_string; + reg [39:0] _zz_writeBack_ENV_CTRL_string; + reg [31:0] execute_BRANCH_CTRL_string; + reg [31:0] _zz_execute_BRANCH_CTRL_string; + reg [71:0] memory_SHIFT_CTRL_string; + reg [71:0] _zz_memory_SHIFT_CTRL_string; + reg [71:0] execute_SHIFT_CTRL_string; + reg [71:0] _zz_execute_SHIFT_CTRL_string; + reg [23:0] execute_SRC2_CTRL_string; + reg [23:0] _zz_execute_SRC2_CTRL_string; + reg [95:0] execute_SRC1_CTRL_string; + reg [95:0] _zz_execute_SRC1_CTRL_string; + reg [63:0] execute_ALU_CTRL_string; + reg [63:0] _zz_execute_ALU_CTRL_string; + reg [39:0] execute_ALU_BITWISE_CTRL_string; + reg [39:0] _zz_execute_ALU_BITWISE_CTRL_string; + reg [39:0] _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_1_string; + reg [39:0] _zz_decode_ENV_CTRL_1_string; + reg [31:0] _zz_decode_BRANCH_CTRL_string; + reg [71:0] _zz_decode_SHIFT_CTRL_1_string; + reg [39:0] _zz_decode_ALU_BITWISE_CTRL_1_string; + reg [23:0] _zz_decode_SRC2_CTRL_1_string; + reg [63:0] _zz_decode_ALU_CTRL_1_string; + reg [95:0] _zz_decode_SRC1_CTRL_1_string; + reg [31:0] decode_BRANCH_CTRL_string; + reg [31:0] _zz_decode_BRANCH_CTRL_1_string; + reg [95:0] _zz_decode_SRC1_CTRL_2_string; + reg [63:0] _zz_decode_ALU_CTRL_2_string; + reg [23:0] _zz_decode_SRC2_CTRL_2_string; + reg [39:0] _zz_decode_ALU_BITWISE_CTRL_2_string; + reg [71:0] _zz_decode_SHIFT_CTRL_2_string; + reg [31:0] _zz_decode_BRANCH_CTRL_2_string; + reg [39:0] _zz_decode_ENV_CTRL_2_string; + reg [39:0] _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_8_string; + reg [95:0] decode_to_execute_SRC1_CTRL_string; + reg [63:0] decode_to_execute_ALU_CTRL_string; + reg [23:0] decode_to_execute_SRC2_CTRL_string; + reg [39:0] decode_to_execute_ALU_BITWISE_CTRL_string; + reg [71:0] decode_to_execute_SHIFT_CTRL_string; + reg [71:0] execute_to_memory_SHIFT_CTRL_string; + reg [31:0] decode_to_execute_BRANCH_CTRL_string; + reg [39:0] decode_to_execute_ENV_CTRL_string; + reg [39:0] execute_to_memory_ENV_CTRL_string; + reg [39:0] memory_to_writeBack_ENV_CTRL_string; + reg [39:0] decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND_string; + `endif + + (* ram_style = "block" *) reg [31:0] RegFilePlugin_regFile [0:31] /* verilator public */ ; + + assign _zz_when = ({decodeExceptionPort_valid,IBusCachedPlugin_decodeExceptionPort_valid} != 2'b00); + assign _zz_when_1 = ({CsrPlugin_selfException_valid,BranchPlugin_branchExceptionPort_valid} != 2'b00); + assign _zz_memory_MUL_LOW = ($signed(_zz_memory_MUL_LOW_1) + $signed(_zz_memory_MUL_LOW_5)); + assign _zz_memory_MUL_LOW_1 = ($signed(_zz_memory_MUL_LOW_2) + $signed(_zz_memory_MUL_LOW_3)); + assign _zz_memory_MUL_LOW_2 = 52'h0; + assign _zz_memory_MUL_LOW_4 = {1'b0,memory_MUL_LL}; + assign _zz_memory_MUL_LOW_3 = {{19{_zz_memory_MUL_LOW_4[32]}}, _zz_memory_MUL_LOW_4}; + assign _zz_memory_MUL_LOW_6 = ({16'd0,memory_MUL_LH} <<< 16); + assign _zz_memory_MUL_LOW_5 = {{2{_zz_memory_MUL_LOW_6[49]}}, _zz_memory_MUL_LOW_6}; + assign _zz_memory_MUL_LOW_8 = ({16'd0,memory_MUL_HL} <<< 16); + assign _zz_memory_MUL_LOW_7 = {{2{_zz_memory_MUL_LOW_8[49]}}, _zz_memory_MUL_LOW_8}; + assign _zz_execute_SHIFT_RIGHT_1 = ($signed(_zz_execute_SHIFT_RIGHT_2) >>> execute_FullBarrelShifterPlugin_amplitude); + assign _zz_execute_SHIFT_RIGHT = _zz_execute_SHIFT_RIGHT_1[31 : 0]; + assign _zz_execute_SHIFT_RIGHT_2 = {((execute_SHIFT_CTRL == `ShiftCtrlEnum_binary_sequential_SRA_1) && execute_FullBarrelShifterPlugin_reversed[31]),execute_FullBarrelShifterPlugin_reversed}; + assign _zz__zz_IBusCachedPlugin_jump_pcLoad_payload_1 = (_zz_IBusCachedPlugin_jump_pcLoad_payload - 4'b0001); + assign _zz_IBusCachedPlugin_fetchPc_pc_1 = {IBusCachedPlugin_fetchPc_inc,2'b00}; + assign _zz_IBusCachedPlugin_fetchPc_pc = {29'd0, _zz_IBusCachedPlugin_fetchPc_pc_1}; + assign _zz__zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch = {{{decode_INSTRUCTION[31],decode_INSTRUCTION[7]},decode_INSTRUCTION[30 : 25]},decode_INSTRUCTION[11 : 8]}; + assign _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_2 = {{_zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_1,{{{decode_INSTRUCTION[31],decode_INSTRUCTION[7]},decode_INSTRUCTION[30 : 25]},decode_INSTRUCTION[11 : 8]}},1'b0}; + assign _zz__zz_2 = {{{decode_INSTRUCTION[31],decode_INSTRUCTION[19 : 12]},decode_INSTRUCTION[20]},decode_INSTRUCTION[30 : 21]}; + assign _zz__zz_4 = {{{decode_INSTRUCTION[31],decode_INSTRUCTION[7]},decode_INSTRUCTION[30 : 25]},decode_INSTRUCTION[11 : 8]}; + assign _zz__zz_6 = {{_zz_3,{{{decode_INSTRUCTION[31],decode_INSTRUCTION[19 : 12]},decode_INSTRUCTION[20]},decode_INSTRUCTION[30 : 21]}},1'b0}; + assign _zz__zz_6_1 = {{_zz_5,{{{decode_INSTRUCTION[31],decode_INSTRUCTION[7]},decode_INSTRUCTION[30 : 25]},decode_INSTRUCTION[11 : 8]}},1'b0}; + assign _zz__zz_IBusCachedPlugin_predictionJumpInterface_payload = {{{decode_INSTRUCTION[31],decode_INSTRUCTION[19 : 12]},decode_INSTRUCTION[20]},decode_INSTRUCTION[30 : 21]}; + assign _zz__zz_IBusCachedPlugin_predictionJumpInterface_payload_2 = {{{decode_INSTRUCTION[31],decode_INSTRUCTION[7]},decode_INSTRUCTION[30 : 25]},decode_INSTRUCTION[11 : 8]}; + assign _zz_DBusCachedPlugin_exceptionBus_payload_code = (writeBack_MEMORY_WR ? 3'b111 : 3'b101); + assign _zz_DBusCachedPlugin_exceptionBus_payload_code_1 = (writeBack_MEMORY_WR ? 3'b110 : 3'b100); + assign _zz__zz_execute_REGFILE_WRITE_DATA = execute_SRC_LESS; + assign _zz__zz_execute_SRC1 = 3'b100; + assign _zz__zz_execute_SRC1_1 = execute_INSTRUCTION[19 : 15]; + assign _zz__zz_execute_SRC2_3 = {execute_INSTRUCTION[31 : 25],execute_INSTRUCTION[11 : 7]}; + assign _zz_execute_SrcPlugin_addSub = ($signed(_zz_execute_SrcPlugin_addSub_1) + $signed(_zz_execute_SrcPlugin_addSub_4)); + assign _zz_execute_SrcPlugin_addSub_1 = ($signed(_zz_execute_SrcPlugin_addSub_2) + $signed(_zz_execute_SrcPlugin_addSub_3)); + assign _zz_execute_SrcPlugin_addSub_2 = execute_SRC1; + assign _zz_execute_SrcPlugin_addSub_3 = (execute_SRC_USE_SUB_LESS ? (~ execute_SRC2) : execute_SRC2); + assign _zz_execute_SrcPlugin_addSub_4 = (execute_SRC_USE_SUB_LESS ? _zz_execute_SrcPlugin_addSub_5 : _zz_execute_SrcPlugin_addSub_6); + assign _zz_execute_SrcPlugin_addSub_5 = 32'h00000001; + assign _zz_execute_SrcPlugin_addSub_6 = 32'h0; + assign _zz__zz_execute_BranchPlugin_missAlignedTarget_2 = {{{execute_INSTRUCTION[31],execute_INSTRUCTION[19 : 12]},execute_INSTRUCTION[20]},execute_INSTRUCTION[30 : 21]}; + assign _zz__zz_execute_BranchPlugin_missAlignedTarget_4 = {{{execute_INSTRUCTION[31],execute_INSTRUCTION[7]},execute_INSTRUCTION[30 : 25]},execute_INSTRUCTION[11 : 8]}; + assign _zz__zz_execute_BranchPlugin_missAlignedTarget_6 = {_zz_execute_BranchPlugin_missAlignedTarget_1,execute_INSTRUCTION[31 : 20]}; + assign _zz__zz_execute_BranchPlugin_missAlignedTarget_6_1 = {{_zz_execute_BranchPlugin_missAlignedTarget_3,{{{execute_INSTRUCTION[31],execute_INSTRUCTION[19 : 12]},execute_INSTRUCTION[20]},execute_INSTRUCTION[30 : 21]}},1'b0}; + assign _zz__zz_execute_BranchPlugin_missAlignedTarget_6_2 = {{_zz_execute_BranchPlugin_missAlignedTarget_5,{{{execute_INSTRUCTION[31],execute_INSTRUCTION[7]},execute_INSTRUCTION[30 : 25]},execute_INSTRUCTION[11 : 8]}},1'b0}; + assign _zz__zz_execute_BranchPlugin_branch_src2_2 = {{{execute_INSTRUCTION[31],execute_INSTRUCTION[19 : 12]},execute_INSTRUCTION[20]},execute_INSTRUCTION[30 : 21]}; + assign _zz__zz_execute_BranchPlugin_branch_src2_4 = {{{execute_INSTRUCTION[31],execute_INSTRUCTION[7]},execute_INSTRUCTION[30 : 25]},execute_INSTRUCTION[11 : 8]}; + assign _zz_execute_BranchPlugin_branch_src2_9 = 3'b100; + assign _zz__zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_1 = (_zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code & (~ _zz__zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_1_1)); + assign _zz__zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_1_1 = (_zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code - 2'b01); + assign _zz__zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_3 = (_zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_2 & (~ _zz__zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_3_1)); + assign _zz__zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_3_1 = (_zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_2 - 2'b01); + assign _zz_writeBack_MulPlugin_result = {{14{writeBack_MUL_LOW[51]}}, writeBack_MUL_LOW}; + assign _zz_writeBack_MulPlugin_result_1 = ({32'd0,writeBack_MUL_HH} <<< 32); + assign _zz__zz_decode_RS2_2 = writeBack_MUL_LOW[31 : 0]; + assign _zz__zz_decode_RS2_2_1 = writeBack_MulPlugin_result[63 : 32]; + assign _zz_memory_DivPlugin_div_counter_valueNext_1 = memory_DivPlugin_div_counter_willIncrement; + assign _zz_memory_DivPlugin_div_counter_valueNext = {5'd0, _zz_memory_DivPlugin_div_counter_valueNext_1}; + assign _zz_memory_DivPlugin_div_stage_0_remainderMinusDenominator = {1'd0, memory_DivPlugin_rs2}; + assign _zz_memory_DivPlugin_div_stage_0_outRemainder = memory_DivPlugin_div_stage_0_remainderMinusDenominator[31:0]; + assign _zz_memory_DivPlugin_div_stage_0_outRemainder_1 = memory_DivPlugin_div_stage_0_remainderShifted[31:0]; + assign _zz_memory_DivPlugin_div_stage_0_outNumerator = {_zz_memory_DivPlugin_div_stage_0_remainderShifted,(! memory_DivPlugin_div_stage_0_remainderMinusDenominator[32])}; + assign _zz_memory_DivPlugin_div_result_1 = _zz_memory_DivPlugin_div_result_2; + assign _zz_memory_DivPlugin_div_result_2 = _zz_memory_DivPlugin_div_result_3; + assign _zz_memory_DivPlugin_div_result_3 = ({memory_DivPlugin_div_needRevert,(memory_DivPlugin_div_needRevert ? (~ _zz_memory_DivPlugin_div_result) : _zz_memory_DivPlugin_div_result)} + _zz_memory_DivPlugin_div_result_4); + assign _zz_memory_DivPlugin_div_result_5 = memory_DivPlugin_div_needRevert; + assign _zz_memory_DivPlugin_div_result_4 = {32'd0, _zz_memory_DivPlugin_div_result_5}; + assign _zz_memory_DivPlugin_rs1_3 = _zz_memory_DivPlugin_rs1; + assign _zz_memory_DivPlugin_rs1_2 = {32'd0, _zz_memory_DivPlugin_rs1_3}; + assign _zz_memory_DivPlugin_rs2_2 = _zz_memory_DivPlugin_rs2; + assign _zz_memory_DivPlugin_rs2_1 = {31'd0, _zz_memory_DivPlugin_rs2_2}; + assign _zz_execute_CfuPlugin_functionsIds_0 = {execute_INSTRUCTION[31 : 25],execute_INSTRUCTION[14 : 12]}; + assign _zz_iBusWishbone_ADR_1 = (iBus_cmd_payload_address >>> 5); + assign _zz_decode_RegFilePlugin_rs1Data = 1'b1; + assign _zz_decode_RegFilePlugin_rs2Data = 1'b1; + assign _zz_IBusCachedPlugin_jump_pcLoad_payload_6 = {_zz_IBusCachedPlugin_jump_pcLoad_payload_4,_zz_IBusCachedPlugin_jump_pcLoad_payload_3}; + assign _zz_writeBack_DBusCachedPlugin_rspShifted_1 = dataCache_1_io_cpu_writeBack_address[1 : 0]; + assign _zz_writeBack_DBusCachedPlugin_rspShifted_3 = dataCache_1_io_cpu_writeBack_address[1 : 1]; + assign _zz_decode_LEGAL_INSTRUCTION = 32'h0000106f; + assign _zz_decode_LEGAL_INSTRUCTION_1 = (decode_INSTRUCTION & 32'h0000107f); + assign _zz_decode_LEGAL_INSTRUCTION_2 = 32'h00001073; + assign _zz_decode_LEGAL_INSTRUCTION_3 = ((decode_INSTRUCTION & 32'h0000207f) == 32'h00002073); + assign _zz_decode_LEGAL_INSTRUCTION_4 = ((decode_INSTRUCTION & 32'h0000407f) == 32'h00004063); + assign _zz_decode_LEGAL_INSTRUCTION_5 = {((decode_INSTRUCTION & 32'h0000207f) == 32'h00002013),{((decode_INSTRUCTION & 32'h0000603f) == 32'h00000023),{((decode_INSTRUCTION & _zz_decode_LEGAL_INSTRUCTION_6) == 32'h00000003),{(_zz_decode_LEGAL_INSTRUCTION_7 == _zz_decode_LEGAL_INSTRUCTION_8),{_zz_decode_LEGAL_INSTRUCTION_9,{_zz_decode_LEGAL_INSTRUCTION_10,_zz_decode_LEGAL_INSTRUCTION_11}}}}}}; + assign _zz_decode_LEGAL_INSTRUCTION_6 = 32'h0000207f; + assign _zz_decode_LEGAL_INSTRUCTION_7 = (decode_INSTRUCTION & 32'h0000505f); + assign _zz_decode_LEGAL_INSTRUCTION_8 = 32'h00000003; + assign _zz_decode_LEGAL_INSTRUCTION_9 = ((decode_INSTRUCTION & 32'h0000707b) == 32'h00000063); + assign _zz_decode_LEGAL_INSTRUCTION_10 = ((decode_INSTRUCTION & 32'h0000607f) == 32'h0000000f); + assign _zz_decode_LEGAL_INSTRUCTION_11 = {((decode_INSTRUCTION & 32'hfc00007f) == 32'h00000033),{((decode_INSTRUCTION & 32'h01f0707f) == 32'h0000500f),{((decode_INSTRUCTION & _zz_decode_LEGAL_INSTRUCTION_12) == 32'h00005013),{(_zz_decode_LEGAL_INSTRUCTION_13 == _zz_decode_LEGAL_INSTRUCTION_14),{_zz_decode_LEGAL_INSTRUCTION_15,{_zz_decode_LEGAL_INSTRUCTION_16,_zz_decode_LEGAL_INSTRUCTION_17}}}}}}; + assign _zz_decode_LEGAL_INSTRUCTION_12 = 32'hbc00707f; + assign _zz_decode_LEGAL_INSTRUCTION_13 = (decode_INSTRUCTION & 32'hfc00307f); + assign _zz_decode_LEGAL_INSTRUCTION_14 = 32'h00001013; + assign _zz_decode_LEGAL_INSTRUCTION_15 = ((decode_INSTRUCTION & 32'hbe00707f) == 32'h00005033); + assign _zz_decode_LEGAL_INSTRUCTION_16 = ((decode_INSTRUCTION & 32'hbe00707f) == 32'h00000033); + assign _zz_decode_LEGAL_INSTRUCTION_17 = {((decode_INSTRUCTION & 32'hdfffffff) == 32'h10200073),{((decode_INSTRUCTION & 32'hffefffff) == 32'h00000073),((decode_INSTRUCTION & 32'hffffffff) == 32'h10500073)}}; + assign _zz_IBusCachedPlugin_predictionJumpInterface_payload_4 = decode_INSTRUCTION[31]; + assign _zz_IBusCachedPlugin_predictionJumpInterface_payload_5 = decode_INSTRUCTION[31]; + assign _zz_IBusCachedPlugin_predictionJumpInterface_payload_6 = decode_INSTRUCTION[7]; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2 = (decode_INSTRUCTION & 32'h10103050); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_1 = 32'h00100050; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_2 = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_7; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_3 = 1'b0; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_4 = (((decode_INSTRUCTION & 32'h02004064) == 32'h02004020) != 1'b0); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_5 = (((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_6) == 32'h02000030) != 1'b0); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_7 = {({_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_8,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_9} != 2'b00),{(_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_10 != 1'b0),{(_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_11 != _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_16),{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_17,{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_19,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_21}}}}}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_6 = 32'h02004074; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_8 = ((decode_INSTRUCTION & 32'h10203050) == 32'h10000050); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_9 = ((decode_INSTRUCTION & 32'h10103050) == 32'h00000050); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_10 = ((decode_INSTRUCTION & 32'h00103050) == 32'h00000050); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_11 = {(_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_12 == _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_13),(_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_14 == _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_15)}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_16 = 2'b00; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_17 = ({_zz_decode_CfuPlugin_CFU_INPUT_2_KIND_5,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_18} != 2'b00); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_19 = (_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_20 != 1'b0); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_21 = {(_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_22 != _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_27),{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_28,{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_34,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_36}}}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_12 = (decode_INSTRUCTION & 32'h00001050); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_13 = 32'h00001050; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_14 = (decode_INSTRUCTION & 32'h00002050); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_15 = 32'h00002050; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_18 = ((decode_INSTRUCTION & 32'h0000001c) == 32'h00000004); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_20 = ((decode_INSTRUCTION & 32'h00000058) == 32'h00000040); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_22 = {(_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_23 == _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_24),(_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_25 == _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_26)}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_27 = 2'b00; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_28 = ({_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_29,{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_30,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_32}} != 3'b000); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_34 = (_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_35 != 1'b0); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_36 = {(_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_37 != _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_39),{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_40,{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_43,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_48}}}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_23 = (decode_INSTRUCTION & 32'h00007034); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_24 = 32'h00005010; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_25 = (decode_INSTRUCTION & 32'h02007064); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_26 = 32'h00005020; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_29 = ((decode_INSTRUCTION & 32'h40003054) == 32'h40001010); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_30 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_31) == 32'h00001010); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_32 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_33) == 32'h00001010); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_35 = ((decode_INSTRUCTION & 32'h00000064) == 32'h00000024); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_37 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_38) == 32'h00001000); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_39 = 1'b0; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_40 = ((_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_41 == _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_42) != 1'b0); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_43 = ({_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_44,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_46} != 2'b00); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_48 = {(_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_49 != _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_51),{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_52,{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_57,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_71}}}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_31 = 32'h00007034; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_33 = 32'h02007054; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_38 = 32'h00001000; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_41 = (decode_INSTRUCTION & 32'h00003000); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_42 = 32'h00002000; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_44 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_45) == 32'h00002000); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_46 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_47) == 32'h00001000); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_49 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_50) == 32'h00004004); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_51 = 1'b0; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_52 = ({_zz_decode_CfuPlugin_CFU_INPUT_2_KIND_6,{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_53,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_55}} != 3'b000); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_57 = ({_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_58,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_60} != 5'h0); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_71 = {(_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_72 != _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_74),{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_75,{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_90,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_103}}}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_45 = 32'h00002010; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_47 = 32'h00005000; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_50 = 32'h00004054; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_53 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_54) == 32'h00000020); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_55 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_56) == 32'h00000020); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_58 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_59) == 32'h00002040); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_60 = {(_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_61 == _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_62),{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_63,{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_65,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_68}}}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_72 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_73) == 32'h00000020); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_74 = 1'b0; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_75 = ({_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_76,{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_78,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_81}} != 6'h0); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_90 = ({_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_91,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_92} != 5'h0); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_103 = {(_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_104 != _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_117),{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_118,{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_123,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_128}}}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_54 = 32'h00000034; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_56 = 32'h00000064; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_59 = 32'h00002040; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_61 = (decode_INSTRUCTION & 32'h00001040); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_62 = 32'h00001040; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_63 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_64) == 32'h00000040); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_65 = (_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_66 == _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_67); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_68 = (_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_69 == _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_70); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_73 = 32'h00000020; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_76 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_77) == 32'h00000008); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_78 = (_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_79 == _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_80); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_81 = {_zz_decode_CfuPlugin_CFU_INPUT_2_KIND_4,{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_82,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_85}}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_91 = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_4; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_92 = {_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_93,{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_95,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_98}}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_104 = {_zz_decode_CfuPlugin_CFU_INPUT_2_KIND_5,{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_105,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_108}}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_117 = 6'h0; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_118 = ({_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_119,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_120} != 2'b00); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_123 = (_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_124 != _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_127); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_128 = {_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_129,{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_132,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_137}}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_64 = 32'h00100040; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_66 = (decode_INSTRUCTION & 32'h00000050); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_67 = 32'h00000040; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_69 = (decode_INSTRUCTION & 32'h00000038); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_70 = 32'h0; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_77 = 32'h00000008; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_79 = (decode_INSTRUCTION & 32'h00000040); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_80 = 32'h00000040; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_82 = (_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_83 == _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_84); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_85 = {_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_86,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_88}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_93 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_94) == 32'h00002010); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_95 = (_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_96 == _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_97); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_98 = {_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_99,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_101}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_105 = (_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_106 == _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_107); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_108 = {_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_109,{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_111,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_114}}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_119 = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_4; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_120 = (_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_121 == _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_122); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_124 = {_zz_decode_CfuPlugin_CFU_INPUT_2_KIND_4,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_125}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_127 = 2'b00; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_129 = (_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_130 != 1'b0); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_132 = (_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_133 != _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_136); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_137 = {_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_138,{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_146,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_150}}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_83 = (decode_INSTRUCTION & 32'h00004020); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_84 = 32'h00004020; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_86 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_87) == 32'h00000010); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_88 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_89) == 32'h00000020); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_94 = 32'h00002030; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_96 = (decode_INSTRUCTION & 32'h00001030); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_97 = 32'h00000010; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_99 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_100) == 32'h00002020); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_101 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_102) == 32'h00000020); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_106 = (decode_INSTRUCTION & 32'h00001010); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_107 = 32'h00001010; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_109 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_110) == 32'h00002010); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_111 = (_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_112 == _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_113); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_114 = {_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_115,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_116}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_121 = (decode_INSTRUCTION & 32'h00000070); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_122 = 32'h00000020; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_125 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_126) == 32'h0); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_130 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_131) == 32'h00004010); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_133 = (_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_134 == _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_135); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_136 = 1'b0; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_138 = ({_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_139,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_141} != 4'b0000); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_146 = (_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_147 != _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_149); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_150 = {_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_151,{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_157,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_161}}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_87 = 32'h00000030; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_89 = 32'h02000020; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_100 = 32'h02002060; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_102 = 32'h02003020; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_110 = 32'h00002010; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_112 = (decode_INSTRUCTION & 32'h00000050); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_113 = 32'h00000010; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_115 = ((decode_INSTRUCTION & 32'h0000000c) == 32'h00000004); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_116 = ((decode_INSTRUCTION & 32'h00000024) == 32'h0); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_126 = 32'h00000020; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_131 = 32'h00004014; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_134 = (decode_INSTRUCTION & 32'h00006014); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_135 = 32'h00002010; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_139 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_140) == 32'h0); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_141 = {(_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_142 == _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_143),{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_144,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_145}}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_147 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_148) == 32'h0); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_149 = 1'b0; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_151 = ({_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_152,{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_153,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_155}} != 3'b000); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_157 = ({_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_158,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_160} != 2'b00); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_161 = {(_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_162 != _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_165),(_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_166 != _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_168)}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_140 = 32'h00000044; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_142 = (decode_INSTRUCTION & 32'h00000018); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_143 = 32'h0; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_144 = ((decode_INSTRUCTION & 32'h00006004) == 32'h00002000); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_145 = ((decode_INSTRUCTION & 32'h00005004) == 32'h00001000); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_148 = 32'h00000058; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_152 = ((decode_INSTRUCTION & 32'h00000044) == 32'h00000040); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_153 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_154) == 32'h00002010); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_155 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_156) == 32'h40000030); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_158 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_159) == 32'h00000004); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_160 = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_3; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_162 = {(_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_163 == _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_164),_zz_decode_CfuPlugin_CFU_INPUT_2_KIND_3}; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_165 = 2'b00; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_166 = ((decode_INSTRUCTION & _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_167) == 32'h00001004); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_168 = 1'b0; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_154 = 32'h00002014; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_156 = 32'h40000034; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_159 = 32'h00000014; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_163 = (decode_INSTRUCTION & 32'h00000044); + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_164 = 32'h00000004; + assign _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_167 = 32'h00005054; + assign _zz_execute_BranchPlugin_branch_src2_6 = execute_INSTRUCTION[31]; + assign _zz_execute_BranchPlugin_branch_src2_7 = execute_INSTRUCTION[31]; + assign _zz_execute_BranchPlugin_branch_src2_8 = execute_INSTRUCTION[7]; + assign _zz_CsrPlugin_csrMapping_readDataInit_41 = 32'h0; + always @(posedge clk) begin + if(_zz_decode_RegFilePlugin_rs1Data) begin + _zz_RegFilePlugin_regFile_port0 <= RegFilePlugin_regFile[decode_RegFilePlugin_regFileReadAddress1]; + end + end + + always @(posedge clk) begin + if(_zz_decode_RegFilePlugin_rs2Data) begin + _zz_RegFilePlugin_regFile_port1 <= RegFilePlugin_regFile[decode_RegFilePlugin_regFileReadAddress2]; + end + end + + always @(posedge clk) begin + if(_zz_1) begin + RegFilePlugin_regFile[lastStageRegFileWrite_payload_address] <= lastStageRegFileWrite_payload_data; + end + end + + InstructionCache IBusCachedPlugin_cache ( + .io_flush (IBusCachedPlugin_cache_io_flush ), //i + .io_cpu_prefetch_isValid (IBusCachedPlugin_cache_io_cpu_prefetch_isValid ), //i + .io_cpu_prefetch_haltIt (IBusCachedPlugin_cache_io_cpu_prefetch_haltIt ), //o + .io_cpu_prefetch_pc (IBusCachedPlugin_iBusRsp_stages_0_input_payload ), //i + .io_cpu_fetch_isValid (IBusCachedPlugin_cache_io_cpu_fetch_isValid ), //i + .io_cpu_fetch_isStuck (IBusCachedPlugin_cache_io_cpu_fetch_isStuck ), //i + .io_cpu_fetch_isRemoved (IBusCachedPlugin_cache_io_cpu_fetch_isRemoved ), //i + .io_cpu_fetch_pc (IBusCachedPlugin_iBusRsp_stages_1_input_payload ), //i + .io_cpu_fetch_data (IBusCachedPlugin_cache_io_cpu_fetch_data ), //o + .io_cpu_fetch_mmuRsp_physicalAddress (IBusCachedPlugin_mmuBus_rsp_physicalAddress ), //i + .io_cpu_fetch_mmuRsp_isIoAccess (IBusCachedPlugin_mmuBus_rsp_isIoAccess ), //i + .io_cpu_fetch_mmuRsp_isPaging (IBusCachedPlugin_mmuBus_rsp_isPaging ), //i + .io_cpu_fetch_mmuRsp_allowRead (IBusCachedPlugin_mmuBus_rsp_allowRead ), //i + .io_cpu_fetch_mmuRsp_allowWrite (IBusCachedPlugin_mmuBus_rsp_allowWrite ), //i + .io_cpu_fetch_mmuRsp_allowExecute (IBusCachedPlugin_mmuBus_rsp_allowExecute ), //i + .io_cpu_fetch_mmuRsp_exception (IBusCachedPlugin_mmuBus_rsp_exception ), //i + .io_cpu_fetch_mmuRsp_refilling (IBusCachedPlugin_mmuBus_rsp_refilling ), //i + .io_cpu_fetch_mmuRsp_bypassTranslation (IBusCachedPlugin_mmuBus_rsp_bypassTranslation ), //i + .io_cpu_fetch_physicalAddress (IBusCachedPlugin_cache_io_cpu_fetch_physicalAddress ), //o + .io_cpu_decode_isValid (IBusCachedPlugin_cache_io_cpu_decode_isValid ), //i + .io_cpu_decode_isStuck (IBusCachedPlugin_cache_io_cpu_decode_isStuck ), //i + .io_cpu_decode_pc (IBusCachedPlugin_iBusRsp_stages_2_input_payload ), //i + .io_cpu_decode_physicalAddress (IBusCachedPlugin_cache_io_cpu_decode_physicalAddress ), //o + .io_cpu_decode_data (IBusCachedPlugin_cache_io_cpu_decode_data ), //o + .io_cpu_decode_cacheMiss (IBusCachedPlugin_cache_io_cpu_decode_cacheMiss ), //o + .io_cpu_decode_error (IBusCachedPlugin_cache_io_cpu_decode_error ), //o + .io_cpu_decode_mmuRefilling (IBusCachedPlugin_cache_io_cpu_decode_mmuRefilling ), //o + .io_cpu_decode_mmuException (IBusCachedPlugin_cache_io_cpu_decode_mmuException ), //o + .io_cpu_decode_isUser (IBusCachedPlugin_cache_io_cpu_decode_isUser ), //i + .io_cpu_fill_valid (IBusCachedPlugin_cache_io_cpu_fill_valid ), //i + .io_cpu_fill_payload (IBusCachedPlugin_cache_io_cpu_decode_physicalAddress ), //i + .io_mem_cmd_valid (IBusCachedPlugin_cache_io_mem_cmd_valid ), //o + .io_mem_cmd_ready (iBus_cmd_ready ), //i + .io_mem_cmd_payload_address (IBusCachedPlugin_cache_io_mem_cmd_payload_address ), //o + .io_mem_cmd_payload_size (IBusCachedPlugin_cache_io_mem_cmd_payload_size ), //o + .io_mem_rsp_valid (iBus_rsp_valid ), //i + .io_mem_rsp_payload_data (iBus_rsp_payload_data ), //i + .io_mem_rsp_payload_error (iBus_rsp_payload_error ), //i + ._zz_when_Fetcher_l398 (switch_Fetcher_l362 ), //i + ._zz_io_cpu_fetch_data_regNextWhen (IBusCachedPlugin_injectionPort_payload ), //i + .clk (clk ), //i + .reset (reset ) //i + ); + DataCache dataCache_1 ( + .io_cpu_execute_isValid (dataCache_1_io_cpu_execute_isValid ), //i + .io_cpu_execute_address (dataCache_1_io_cpu_execute_address ), //i + .io_cpu_execute_haltIt (dataCache_1_io_cpu_execute_haltIt ), //o + .io_cpu_execute_args_wr (execute_MEMORY_WR ), //i + .io_cpu_execute_args_size (execute_DBusCachedPlugin_size ), //i + .io_cpu_execute_args_totalyConsistent (execute_MEMORY_FORCE_CONSTISTENCY ), //i + .io_cpu_execute_refilling (dataCache_1_io_cpu_execute_refilling ), //o + .io_cpu_memory_isValid (dataCache_1_io_cpu_memory_isValid ), //i + .io_cpu_memory_isStuck (memory_arbitration_isStuck ), //i + .io_cpu_memory_isWrite (dataCache_1_io_cpu_memory_isWrite ), //o + .io_cpu_memory_address (dataCache_1_io_cpu_memory_address ), //i + .io_cpu_memory_mmuRsp_physicalAddress (DBusCachedPlugin_mmuBus_rsp_physicalAddress ), //i + .io_cpu_memory_mmuRsp_isIoAccess (dataCache_1_io_cpu_memory_mmuRsp_isIoAccess ), //i + .io_cpu_memory_mmuRsp_isPaging (DBusCachedPlugin_mmuBus_rsp_isPaging ), //i + .io_cpu_memory_mmuRsp_allowRead (DBusCachedPlugin_mmuBus_rsp_allowRead ), //i + .io_cpu_memory_mmuRsp_allowWrite (DBusCachedPlugin_mmuBus_rsp_allowWrite ), //i + .io_cpu_memory_mmuRsp_allowExecute (DBusCachedPlugin_mmuBus_rsp_allowExecute ), //i + .io_cpu_memory_mmuRsp_exception (DBusCachedPlugin_mmuBus_rsp_exception ), //i + .io_cpu_memory_mmuRsp_refilling (DBusCachedPlugin_mmuBus_rsp_refilling ), //i + .io_cpu_memory_mmuRsp_bypassTranslation (DBusCachedPlugin_mmuBus_rsp_bypassTranslation ), //i + .io_cpu_writeBack_isValid (dataCache_1_io_cpu_writeBack_isValid ), //i + .io_cpu_writeBack_isStuck (writeBack_arbitration_isStuck ), //i + .io_cpu_writeBack_isUser (dataCache_1_io_cpu_writeBack_isUser ), //i + .io_cpu_writeBack_haltIt (dataCache_1_io_cpu_writeBack_haltIt ), //o + .io_cpu_writeBack_isWrite (dataCache_1_io_cpu_writeBack_isWrite ), //o + .io_cpu_writeBack_storeData (dataCache_1_io_cpu_writeBack_storeData ), //i + .io_cpu_writeBack_data (dataCache_1_io_cpu_writeBack_data ), //o + .io_cpu_writeBack_address (dataCache_1_io_cpu_writeBack_address ), //i + .io_cpu_writeBack_mmuException (dataCache_1_io_cpu_writeBack_mmuException ), //o + .io_cpu_writeBack_unalignedAccess (dataCache_1_io_cpu_writeBack_unalignedAccess ), //o + .io_cpu_writeBack_accessError (dataCache_1_io_cpu_writeBack_accessError ), //o + .io_cpu_writeBack_keepMemRspData (dataCache_1_io_cpu_writeBack_keepMemRspData ), //o + .io_cpu_writeBack_fence_SW (dataCache_1_io_cpu_writeBack_fence_SW ), //i + .io_cpu_writeBack_fence_SR (dataCache_1_io_cpu_writeBack_fence_SR ), //i + .io_cpu_writeBack_fence_SO (dataCache_1_io_cpu_writeBack_fence_SO ), //i + .io_cpu_writeBack_fence_SI (dataCache_1_io_cpu_writeBack_fence_SI ), //i + .io_cpu_writeBack_fence_PW (dataCache_1_io_cpu_writeBack_fence_PW ), //i + .io_cpu_writeBack_fence_PR (dataCache_1_io_cpu_writeBack_fence_PR ), //i + .io_cpu_writeBack_fence_PO (dataCache_1_io_cpu_writeBack_fence_PO ), //i + .io_cpu_writeBack_fence_PI (dataCache_1_io_cpu_writeBack_fence_PI ), //i + .io_cpu_writeBack_fence_FM (dataCache_1_io_cpu_writeBack_fence_FM ), //i + .io_cpu_writeBack_exclusiveOk (dataCache_1_io_cpu_writeBack_exclusiveOk ), //o + .io_cpu_redo (dataCache_1_io_cpu_redo ), //o + .io_cpu_flush_valid (dataCache_1_io_cpu_flush_valid ), //i + .io_cpu_flush_ready (dataCache_1_io_cpu_flush_ready ), //o + .io_mem_cmd_valid (dataCache_1_io_mem_cmd_valid ), //o + .io_mem_cmd_ready (dataCache_1_io_mem_cmd_ready ), //i + .io_mem_cmd_payload_wr (dataCache_1_io_mem_cmd_payload_wr ), //o + .io_mem_cmd_payload_uncached (dataCache_1_io_mem_cmd_payload_uncached ), //o + .io_mem_cmd_payload_address (dataCache_1_io_mem_cmd_payload_address ), //o + .io_mem_cmd_payload_data (dataCache_1_io_mem_cmd_payload_data ), //o + .io_mem_cmd_payload_mask (dataCache_1_io_mem_cmd_payload_mask ), //o + .io_mem_cmd_payload_size (dataCache_1_io_mem_cmd_payload_size ), //o + .io_mem_cmd_payload_last (dataCache_1_io_mem_cmd_payload_last ), //o + .io_mem_rsp_valid (dBus_rsp_valid ), //i + .io_mem_rsp_payload_last (dBus_rsp_payload_last ), //i + .io_mem_rsp_payload_data (dBus_rsp_payload_data ), //i + .io_mem_rsp_payload_error (dBus_rsp_payload_error ), //i + .clk (clk ), //i + .reset (reset ) //i + ); + always @(*) begin + case(_zz_IBusCachedPlugin_jump_pcLoad_payload_6) + 2'b00 : begin + _zz_IBusCachedPlugin_jump_pcLoad_payload_5 = DBusCachedPlugin_redoBranch_payload; + end + 2'b01 : begin + _zz_IBusCachedPlugin_jump_pcLoad_payload_5 = CsrPlugin_jumpInterface_payload; + end + 2'b10 : begin + _zz_IBusCachedPlugin_jump_pcLoad_payload_5 = BranchPlugin_jumpInterface_payload; + end + default : begin + _zz_IBusCachedPlugin_jump_pcLoad_payload_5 = IBusCachedPlugin_predictionJumpInterface_payload; + end + endcase + end + + always @(*) begin + case(_zz_writeBack_DBusCachedPlugin_rspShifted_1) + 2'b00 : begin + _zz_writeBack_DBusCachedPlugin_rspShifted = writeBack_DBusCachedPlugin_rspSplits_0; + end + 2'b01 : begin + _zz_writeBack_DBusCachedPlugin_rspShifted = writeBack_DBusCachedPlugin_rspSplits_1; + end + 2'b10 : begin + _zz_writeBack_DBusCachedPlugin_rspShifted = writeBack_DBusCachedPlugin_rspSplits_2; + end + default : begin + _zz_writeBack_DBusCachedPlugin_rspShifted = writeBack_DBusCachedPlugin_rspSplits_3; + end + endcase + end + + always @(*) begin + case(_zz_writeBack_DBusCachedPlugin_rspShifted_3) + 1'b0 : begin + _zz_writeBack_DBusCachedPlugin_rspShifted_2 = writeBack_DBusCachedPlugin_rspSplits_1; + end + default : begin + _zz_writeBack_DBusCachedPlugin_rspShifted_2 = writeBack_DBusCachedPlugin_rspSplits_3; + end + endcase + end + + `ifndef SYNTHESIS + always @(*) begin + case(decode_CfuPlugin_CFU_INPUT_2_KIND) + `Input2Kind_binary_sequential_RS : decode_CfuPlugin_CFU_INPUT_2_KIND_string = "RS "; + `Input2Kind_binary_sequential_IMM_I : decode_CfuPlugin_CFU_INPUT_2_KIND_string = "IMM_I"; + default : decode_CfuPlugin_CFU_INPUT_2_KIND_string = "?????"; + endcase + end + always @(*) begin + case(_zz_decode_CfuPlugin_CFU_INPUT_2_KIND) + `Input2Kind_binary_sequential_RS : _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_string = "RS "; + `Input2Kind_binary_sequential_IMM_I : _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_string = "IMM_I"; + default : _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_string = "?????"; + endcase + end + always @(*) begin + case(_zz_decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND) + `Input2Kind_binary_sequential_RS : _zz_decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND_string = "RS "; + `Input2Kind_binary_sequential_IMM_I : _zz_decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND_string = "IMM_I"; + default : _zz_decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND_string = "?????"; + endcase + end + always @(*) begin + case(_zz_decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND_1) + `Input2Kind_binary_sequential_RS : _zz_decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND_1_string = "RS "; + `Input2Kind_binary_sequential_IMM_I : _zz_decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND_1_string = "IMM_I"; + default : _zz_decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND_1_string = "?????"; + endcase + end + always @(*) begin + case(_zz_memory_to_writeBack_ENV_CTRL) + `EnvCtrlEnum_binary_sequential_NONE : _zz_memory_to_writeBack_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : _zz_memory_to_writeBack_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_binary_sequential_WFI : _zz_memory_to_writeBack_ENV_CTRL_string = "WFI "; + `EnvCtrlEnum_binary_sequential_ECALL : _zz_memory_to_writeBack_ENV_CTRL_string = "ECALL"; + default : _zz_memory_to_writeBack_ENV_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(_zz_memory_to_writeBack_ENV_CTRL_1) + `EnvCtrlEnum_binary_sequential_NONE : _zz_memory_to_writeBack_ENV_CTRL_1_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : _zz_memory_to_writeBack_ENV_CTRL_1_string = "XRET "; + `EnvCtrlEnum_binary_sequential_WFI : _zz_memory_to_writeBack_ENV_CTRL_1_string = "WFI "; + `EnvCtrlEnum_binary_sequential_ECALL : _zz_memory_to_writeBack_ENV_CTRL_1_string = "ECALL"; + default : _zz_memory_to_writeBack_ENV_CTRL_1_string = "?????"; + endcase + end + always @(*) begin + case(_zz_execute_to_memory_ENV_CTRL) + `EnvCtrlEnum_binary_sequential_NONE : _zz_execute_to_memory_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : _zz_execute_to_memory_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_binary_sequential_WFI : _zz_execute_to_memory_ENV_CTRL_string = "WFI "; + `EnvCtrlEnum_binary_sequential_ECALL : _zz_execute_to_memory_ENV_CTRL_string = "ECALL"; + default : _zz_execute_to_memory_ENV_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(_zz_execute_to_memory_ENV_CTRL_1) + `EnvCtrlEnum_binary_sequential_NONE : _zz_execute_to_memory_ENV_CTRL_1_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : _zz_execute_to_memory_ENV_CTRL_1_string = "XRET "; + `EnvCtrlEnum_binary_sequential_WFI : _zz_execute_to_memory_ENV_CTRL_1_string = "WFI "; + `EnvCtrlEnum_binary_sequential_ECALL : _zz_execute_to_memory_ENV_CTRL_1_string = "ECALL"; + default : _zz_execute_to_memory_ENV_CTRL_1_string = "?????"; + endcase + end + always @(*) begin + case(decode_ENV_CTRL) + `EnvCtrlEnum_binary_sequential_NONE : decode_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : decode_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_binary_sequential_WFI : decode_ENV_CTRL_string = "WFI "; + `EnvCtrlEnum_binary_sequential_ECALL : decode_ENV_CTRL_string = "ECALL"; + default : decode_ENV_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(_zz_decode_ENV_CTRL) + `EnvCtrlEnum_binary_sequential_NONE : _zz_decode_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : _zz_decode_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_binary_sequential_WFI : _zz_decode_ENV_CTRL_string = "WFI "; + `EnvCtrlEnum_binary_sequential_ECALL : _zz_decode_ENV_CTRL_string = "ECALL"; + default : _zz_decode_ENV_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(_zz_decode_to_execute_ENV_CTRL) + `EnvCtrlEnum_binary_sequential_NONE : _zz_decode_to_execute_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : _zz_decode_to_execute_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_binary_sequential_WFI : _zz_decode_to_execute_ENV_CTRL_string = "WFI "; + `EnvCtrlEnum_binary_sequential_ECALL : _zz_decode_to_execute_ENV_CTRL_string = "ECALL"; + default : _zz_decode_to_execute_ENV_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(_zz_decode_to_execute_ENV_CTRL_1) + `EnvCtrlEnum_binary_sequential_NONE : _zz_decode_to_execute_ENV_CTRL_1_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : _zz_decode_to_execute_ENV_CTRL_1_string = "XRET "; + `EnvCtrlEnum_binary_sequential_WFI : _zz_decode_to_execute_ENV_CTRL_1_string = "WFI "; + `EnvCtrlEnum_binary_sequential_ECALL : _zz_decode_to_execute_ENV_CTRL_1_string = "ECALL"; + default : _zz_decode_to_execute_ENV_CTRL_1_string = "?????"; + endcase + end + always @(*) begin + case(_zz_decode_to_execute_BRANCH_CTRL) + `BranchCtrlEnum_binary_sequential_INC : _zz_decode_to_execute_BRANCH_CTRL_string = "INC "; + `BranchCtrlEnum_binary_sequential_B : _zz_decode_to_execute_BRANCH_CTRL_string = "B "; + `BranchCtrlEnum_binary_sequential_JAL : _zz_decode_to_execute_BRANCH_CTRL_string = "JAL "; + `BranchCtrlEnum_binary_sequential_JALR : _zz_decode_to_execute_BRANCH_CTRL_string = "JALR"; + default : _zz_decode_to_execute_BRANCH_CTRL_string = "????"; + endcase + end + always @(*) begin + case(_zz_decode_to_execute_BRANCH_CTRL_1) + `BranchCtrlEnum_binary_sequential_INC : _zz_decode_to_execute_BRANCH_CTRL_1_string = "INC "; + `BranchCtrlEnum_binary_sequential_B : _zz_decode_to_execute_BRANCH_CTRL_1_string = "B "; + `BranchCtrlEnum_binary_sequential_JAL : _zz_decode_to_execute_BRANCH_CTRL_1_string = "JAL "; + `BranchCtrlEnum_binary_sequential_JALR : _zz_decode_to_execute_BRANCH_CTRL_1_string = "JALR"; + default : _zz_decode_to_execute_BRANCH_CTRL_1_string = "????"; + endcase + end + always @(*) begin + case(_zz_execute_to_memory_SHIFT_CTRL) + `ShiftCtrlEnum_binary_sequential_DISABLE_1 : _zz_execute_to_memory_SHIFT_CTRL_string = "DISABLE_1"; + `ShiftCtrlEnum_binary_sequential_SLL_1 : _zz_execute_to_memory_SHIFT_CTRL_string = "SLL_1 "; + `ShiftCtrlEnum_binary_sequential_SRL_1 : _zz_execute_to_memory_SHIFT_CTRL_string = "SRL_1 "; + `ShiftCtrlEnum_binary_sequential_SRA_1 : _zz_execute_to_memory_SHIFT_CTRL_string = "SRA_1 "; + default : _zz_execute_to_memory_SHIFT_CTRL_string = "?????????"; + endcase + end + always @(*) begin + case(_zz_execute_to_memory_SHIFT_CTRL_1) + `ShiftCtrlEnum_binary_sequential_DISABLE_1 : _zz_execute_to_memory_SHIFT_CTRL_1_string = "DISABLE_1"; + `ShiftCtrlEnum_binary_sequential_SLL_1 : _zz_execute_to_memory_SHIFT_CTRL_1_string = "SLL_1 "; + `ShiftCtrlEnum_binary_sequential_SRL_1 : _zz_execute_to_memory_SHIFT_CTRL_1_string = "SRL_1 "; + `ShiftCtrlEnum_binary_sequential_SRA_1 : _zz_execute_to_memory_SHIFT_CTRL_1_string = "SRA_1 "; + default : _zz_execute_to_memory_SHIFT_CTRL_1_string = "?????????"; + endcase + end + always @(*) begin + case(decode_SHIFT_CTRL) + `ShiftCtrlEnum_binary_sequential_DISABLE_1 : decode_SHIFT_CTRL_string = "DISABLE_1"; + `ShiftCtrlEnum_binary_sequential_SLL_1 : decode_SHIFT_CTRL_string = "SLL_1 "; + `ShiftCtrlEnum_binary_sequential_SRL_1 : decode_SHIFT_CTRL_string = "SRL_1 "; + `ShiftCtrlEnum_binary_sequential_SRA_1 : decode_SHIFT_CTRL_string = "SRA_1 "; + default : decode_SHIFT_CTRL_string = "?????????"; + endcase + end + always @(*) begin + case(_zz_decode_SHIFT_CTRL) + `ShiftCtrlEnum_binary_sequential_DISABLE_1 : _zz_decode_SHIFT_CTRL_string = "DISABLE_1"; + `ShiftCtrlEnum_binary_sequential_SLL_1 : _zz_decode_SHIFT_CTRL_string = "SLL_1 "; + `ShiftCtrlEnum_binary_sequential_SRL_1 : _zz_decode_SHIFT_CTRL_string = "SRL_1 "; + `ShiftCtrlEnum_binary_sequential_SRA_1 : _zz_decode_SHIFT_CTRL_string = "SRA_1 "; + default : _zz_decode_SHIFT_CTRL_string = "?????????"; + endcase + end + always @(*) begin + case(_zz_decode_to_execute_SHIFT_CTRL) + `ShiftCtrlEnum_binary_sequential_DISABLE_1 : _zz_decode_to_execute_SHIFT_CTRL_string = "DISABLE_1"; + `ShiftCtrlEnum_binary_sequential_SLL_1 : _zz_decode_to_execute_SHIFT_CTRL_string = "SLL_1 "; + `ShiftCtrlEnum_binary_sequential_SRL_1 : _zz_decode_to_execute_SHIFT_CTRL_string = "SRL_1 "; + `ShiftCtrlEnum_binary_sequential_SRA_1 : _zz_decode_to_execute_SHIFT_CTRL_string = "SRA_1 "; + default : _zz_decode_to_execute_SHIFT_CTRL_string = "?????????"; + endcase + end + always @(*) begin + case(_zz_decode_to_execute_SHIFT_CTRL_1) + `ShiftCtrlEnum_binary_sequential_DISABLE_1 : _zz_decode_to_execute_SHIFT_CTRL_1_string = "DISABLE_1"; + `ShiftCtrlEnum_binary_sequential_SLL_1 : _zz_decode_to_execute_SHIFT_CTRL_1_string = "SLL_1 "; + `ShiftCtrlEnum_binary_sequential_SRL_1 : _zz_decode_to_execute_SHIFT_CTRL_1_string = "SRL_1 "; + `ShiftCtrlEnum_binary_sequential_SRA_1 : _zz_decode_to_execute_SHIFT_CTRL_1_string = "SRA_1 "; + default : _zz_decode_to_execute_SHIFT_CTRL_1_string = "?????????"; + endcase + end + always @(*) begin + case(decode_ALU_BITWISE_CTRL) + `AluBitwiseCtrlEnum_binary_sequential_XOR_1 : decode_ALU_BITWISE_CTRL_string = "XOR_1"; + `AluBitwiseCtrlEnum_binary_sequential_OR_1 : decode_ALU_BITWISE_CTRL_string = "OR_1 "; + `AluBitwiseCtrlEnum_binary_sequential_AND_1 : decode_ALU_BITWISE_CTRL_string = "AND_1"; + default : decode_ALU_BITWISE_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(_zz_decode_ALU_BITWISE_CTRL) + `AluBitwiseCtrlEnum_binary_sequential_XOR_1 : _zz_decode_ALU_BITWISE_CTRL_string = "XOR_1"; + `AluBitwiseCtrlEnum_binary_sequential_OR_1 : _zz_decode_ALU_BITWISE_CTRL_string = "OR_1 "; + `AluBitwiseCtrlEnum_binary_sequential_AND_1 : _zz_decode_ALU_BITWISE_CTRL_string = "AND_1"; + default : _zz_decode_ALU_BITWISE_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(_zz_decode_to_execute_ALU_BITWISE_CTRL) + `AluBitwiseCtrlEnum_binary_sequential_XOR_1 : _zz_decode_to_execute_ALU_BITWISE_CTRL_string = "XOR_1"; + `AluBitwiseCtrlEnum_binary_sequential_OR_1 : _zz_decode_to_execute_ALU_BITWISE_CTRL_string = "OR_1 "; + `AluBitwiseCtrlEnum_binary_sequential_AND_1 : _zz_decode_to_execute_ALU_BITWISE_CTRL_string = "AND_1"; + default : _zz_decode_to_execute_ALU_BITWISE_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(_zz_decode_to_execute_ALU_BITWISE_CTRL_1) + `AluBitwiseCtrlEnum_binary_sequential_XOR_1 : _zz_decode_to_execute_ALU_BITWISE_CTRL_1_string = "XOR_1"; + `AluBitwiseCtrlEnum_binary_sequential_OR_1 : _zz_decode_to_execute_ALU_BITWISE_CTRL_1_string = "OR_1 "; + `AluBitwiseCtrlEnum_binary_sequential_AND_1 : _zz_decode_to_execute_ALU_BITWISE_CTRL_1_string = "AND_1"; + default : _zz_decode_to_execute_ALU_BITWISE_CTRL_1_string = "?????"; + endcase + end + always @(*) begin + case(decode_SRC2_CTRL) + `Src2CtrlEnum_binary_sequential_RS : decode_SRC2_CTRL_string = "RS "; + `Src2CtrlEnum_binary_sequential_IMI : decode_SRC2_CTRL_string = "IMI"; + `Src2CtrlEnum_binary_sequential_IMS : decode_SRC2_CTRL_string = "IMS"; + `Src2CtrlEnum_binary_sequential_PC : decode_SRC2_CTRL_string = "PC "; + default : decode_SRC2_CTRL_string = "???"; + endcase + end + always @(*) begin + case(_zz_decode_SRC2_CTRL) + `Src2CtrlEnum_binary_sequential_RS : _zz_decode_SRC2_CTRL_string = "RS "; + `Src2CtrlEnum_binary_sequential_IMI : _zz_decode_SRC2_CTRL_string = "IMI"; + `Src2CtrlEnum_binary_sequential_IMS : _zz_decode_SRC2_CTRL_string = "IMS"; + `Src2CtrlEnum_binary_sequential_PC : _zz_decode_SRC2_CTRL_string = "PC "; + default : _zz_decode_SRC2_CTRL_string = "???"; + endcase + end + always @(*) begin + case(_zz_decode_to_execute_SRC2_CTRL) + `Src2CtrlEnum_binary_sequential_RS : _zz_decode_to_execute_SRC2_CTRL_string = "RS "; + `Src2CtrlEnum_binary_sequential_IMI : _zz_decode_to_execute_SRC2_CTRL_string = "IMI"; + `Src2CtrlEnum_binary_sequential_IMS : _zz_decode_to_execute_SRC2_CTRL_string = "IMS"; + `Src2CtrlEnum_binary_sequential_PC : _zz_decode_to_execute_SRC2_CTRL_string = "PC "; + default : _zz_decode_to_execute_SRC2_CTRL_string = "???"; + endcase + end + always @(*) begin + case(_zz_decode_to_execute_SRC2_CTRL_1) + `Src2CtrlEnum_binary_sequential_RS : _zz_decode_to_execute_SRC2_CTRL_1_string = "RS "; + `Src2CtrlEnum_binary_sequential_IMI : _zz_decode_to_execute_SRC2_CTRL_1_string = "IMI"; + `Src2CtrlEnum_binary_sequential_IMS : _zz_decode_to_execute_SRC2_CTRL_1_string = "IMS"; + `Src2CtrlEnum_binary_sequential_PC : _zz_decode_to_execute_SRC2_CTRL_1_string = "PC "; + default : _zz_decode_to_execute_SRC2_CTRL_1_string = "???"; + endcase + end + always @(*) begin + case(decode_ALU_CTRL) + `AluCtrlEnum_binary_sequential_ADD_SUB : decode_ALU_CTRL_string = "ADD_SUB "; + `AluCtrlEnum_binary_sequential_SLT_SLTU : decode_ALU_CTRL_string = "SLT_SLTU"; + `AluCtrlEnum_binary_sequential_BITWISE : decode_ALU_CTRL_string = "BITWISE "; + default : decode_ALU_CTRL_string = "????????"; + endcase + end + always @(*) begin + case(_zz_decode_ALU_CTRL) + `AluCtrlEnum_binary_sequential_ADD_SUB : _zz_decode_ALU_CTRL_string = "ADD_SUB "; + `AluCtrlEnum_binary_sequential_SLT_SLTU : _zz_decode_ALU_CTRL_string = "SLT_SLTU"; + `AluCtrlEnum_binary_sequential_BITWISE : _zz_decode_ALU_CTRL_string = "BITWISE "; + default : _zz_decode_ALU_CTRL_string = "????????"; + endcase + end + always @(*) begin + case(_zz_decode_to_execute_ALU_CTRL) + `AluCtrlEnum_binary_sequential_ADD_SUB : _zz_decode_to_execute_ALU_CTRL_string = "ADD_SUB "; + `AluCtrlEnum_binary_sequential_SLT_SLTU : _zz_decode_to_execute_ALU_CTRL_string = "SLT_SLTU"; + `AluCtrlEnum_binary_sequential_BITWISE : _zz_decode_to_execute_ALU_CTRL_string = "BITWISE "; + default : _zz_decode_to_execute_ALU_CTRL_string = "????????"; + endcase + end + always @(*) begin + case(_zz_decode_to_execute_ALU_CTRL_1) + `AluCtrlEnum_binary_sequential_ADD_SUB : _zz_decode_to_execute_ALU_CTRL_1_string = "ADD_SUB "; + `AluCtrlEnum_binary_sequential_SLT_SLTU : _zz_decode_to_execute_ALU_CTRL_1_string = "SLT_SLTU"; + `AluCtrlEnum_binary_sequential_BITWISE : _zz_decode_to_execute_ALU_CTRL_1_string = "BITWISE "; + default : _zz_decode_to_execute_ALU_CTRL_1_string = "????????"; + endcase + end + always @(*) begin + case(decode_SRC1_CTRL) + `Src1CtrlEnum_binary_sequential_RS : decode_SRC1_CTRL_string = "RS "; + `Src1CtrlEnum_binary_sequential_IMU : decode_SRC1_CTRL_string = "IMU "; + `Src1CtrlEnum_binary_sequential_PC_INCREMENT : decode_SRC1_CTRL_string = "PC_INCREMENT"; + `Src1CtrlEnum_binary_sequential_URS1 : decode_SRC1_CTRL_string = "URS1 "; + default : decode_SRC1_CTRL_string = "????????????"; + endcase + end + always @(*) begin + case(_zz_decode_SRC1_CTRL) + `Src1CtrlEnum_binary_sequential_RS : _zz_decode_SRC1_CTRL_string = "RS "; + `Src1CtrlEnum_binary_sequential_IMU : _zz_decode_SRC1_CTRL_string = "IMU "; + `Src1CtrlEnum_binary_sequential_PC_INCREMENT : _zz_decode_SRC1_CTRL_string = "PC_INCREMENT"; + `Src1CtrlEnum_binary_sequential_URS1 : _zz_decode_SRC1_CTRL_string = "URS1 "; + default : _zz_decode_SRC1_CTRL_string = "????????????"; + endcase + end + always @(*) begin + case(_zz_decode_to_execute_SRC1_CTRL) + `Src1CtrlEnum_binary_sequential_RS : _zz_decode_to_execute_SRC1_CTRL_string = "RS "; + `Src1CtrlEnum_binary_sequential_IMU : _zz_decode_to_execute_SRC1_CTRL_string = "IMU "; + `Src1CtrlEnum_binary_sequential_PC_INCREMENT : _zz_decode_to_execute_SRC1_CTRL_string = "PC_INCREMENT"; + `Src1CtrlEnum_binary_sequential_URS1 : _zz_decode_to_execute_SRC1_CTRL_string = "URS1 "; + default : _zz_decode_to_execute_SRC1_CTRL_string = "????????????"; + endcase + end + always @(*) begin + case(_zz_decode_to_execute_SRC1_CTRL_1) + `Src1CtrlEnum_binary_sequential_RS : _zz_decode_to_execute_SRC1_CTRL_1_string = "RS "; + `Src1CtrlEnum_binary_sequential_IMU : _zz_decode_to_execute_SRC1_CTRL_1_string = "IMU "; + `Src1CtrlEnum_binary_sequential_PC_INCREMENT : _zz_decode_to_execute_SRC1_CTRL_1_string = "PC_INCREMENT"; + `Src1CtrlEnum_binary_sequential_URS1 : _zz_decode_to_execute_SRC1_CTRL_1_string = "URS1 "; + default : _zz_decode_to_execute_SRC1_CTRL_1_string = "????????????"; + endcase + end + always @(*) begin + case(execute_CfuPlugin_CFU_INPUT_2_KIND) + `Input2Kind_binary_sequential_RS : execute_CfuPlugin_CFU_INPUT_2_KIND_string = "RS "; + `Input2Kind_binary_sequential_IMM_I : execute_CfuPlugin_CFU_INPUT_2_KIND_string = "IMM_I"; + default : execute_CfuPlugin_CFU_INPUT_2_KIND_string = "?????"; + endcase + end + always @(*) begin + case(_zz_execute_CfuPlugin_CFU_INPUT_2_KIND) + `Input2Kind_binary_sequential_RS : _zz_execute_CfuPlugin_CFU_INPUT_2_KIND_string = "RS "; + `Input2Kind_binary_sequential_IMM_I : _zz_execute_CfuPlugin_CFU_INPUT_2_KIND_string = "IMM_I"; + default : _zz_execute_CfuPlugin_CFU_INPUT_2_KIND_string = "?????"; + endcase + end + always @(*) begin + case(memory_ENV_CTRL) + `EnvCtrlEnum_binary_sequential_NONE : memory_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : memory_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_binary_sequential_WFI : memory_ENV_CTRL_string = "WFI "; + `EnvCtrlEnum_binary_sequential_ECALL : memory_ENV_CTRL_string = "ECALL"; + default : memory_ENV_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(_zz_memory_ENV_CTRL) + `EnvCtrlEnum_binary_sequential_NONE : _zz_memory_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : _zz_memory_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_binary_sequential_WFI : _zz_memory_ENV_CTRL_string = "WFI "; + `EnvCtrlEnum_binary_sequential_ECALL : _zz_memory_ENV_CTRL_string = "ECALL"; + default : _zz_memory_ENV_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(execute_ENV_CTRL) + `EnvCtrlEnum_binary_sequential_NONE : execute_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : execute_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_binary_sequential_WFI : execute_ENV_CTRL_string = "WFI "; + `EnvCtrlEnum_binary_sequential_ECALL : execute_ENV_CTRL_string = "ECALL"; + default : execute_ENV_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(_zz_execute_ENV_CTRL) + `EnvCtrlEnum_binary_sequential_NONE : _zz_execute_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : _zz_execute_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_binary_sequential_WFI : _zz_execute_ENV_CTRL_string = "WFI "; + `EnvCtrlEnum_binary_sequential_ECALL : _zz_execute_ENV_CTRL_string = "ECALL"; + default : _zz_execute_ENV_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(writeBack_ENV_CTRL) + `EnvCtrlEnum_binary_sequential_NONE : writeBack_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : writeBack_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_binary_sequential_WFI : writeBack_ENV_CTRL_string = "WFI "; + `EnvCtrlEnum_binary_sequential_ECALL : writeBack_ENV_CTRL_string = "ECALL"; + default : writeBack_ENV_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(_zz_writeBack_ENV_CTRL) + `EnvCtrlEnum_binary_sequential_NONE : _zz_writeBack_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : _zz_writeBack_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_binary_sequential_WFI : _zz_writeBack_ENV_CTRL_string = "WFI "; + `EnvCtrlEnum_binary_sequential_ECALL : _zz_writeBack_ENV_CTRL_string = "ECALL"; + default : _zz_writeBack_ENV_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(execute_BRANCH_CTRL) + `BranchCtrlEnum_binary_sequential_INC : execute_BRANCH_CTRL_string = "INC "; + `BranchCtrlEnum_binary_sequential_B : execute_BRANCH_CTRL_string = "B "; + `BranchCtrlEnum_binary_sequential_JAL : execute_BRANCH_CTRL_string = "JAL "; + `BranchCtrlEnum_binary_sequential_JALR : execute_BRANCH_CTRL_string = "JALR"; + default : execute_BRANCH_CTRL_string = "????"; + endcase + end + always @(*) begin + case(_zz_execute_BRANCH_CTRL) + `BranchCtrlEnum_binary_sequential_INC : _zz_execute_BRANCH_CTRL_string = "INC "; + `BranchCtrlEnum_binary_sequential_B : _zz_execute_BRANCH_CTRL_string = "B "; + `BranchCtrlEnum_binary_sequential_JAL : _zz_execute_BRANCH_CTRL_string = "JAL "; + `BranchCtrlEnum_binary_sequential_JALR : _zz_execute_BRANCH_CTRL_string = "JALR"; + default : _zz_execute_BRANCH_CTRL_string = "????"; + endcase + end + always @(*) begin + case(memory_SHIFT_CTRL) + `ShiftCtrlEnum_binary_sequential_DISABLE_1 : memory_SHIFT_CTRL_string = "DISABLE_1"; + `ShiftCtrlEnum_binary_sequential_SLL_1 : memory_SHIFT_CTRL_string = "SLL_1 "; + `ShiftCtrlEnum_binary_sequential_SRL_1 : memory_SHIFT_CTRL_string = "SRL_1 "; + `ShiftCtrlEnum_binary_sequential_SRA_1 : memory_SHIFT_CTRL_string = "SRA_1 "; + default : memory_SHIFT_CTRL_string = "?????????"; + endcase + end + always @(*) begin + case(_zz_memory_SHIFT_CTRL) + `ShiftCtrlEnum_binary_sequential_DISABLE_1 : _zz_memory_SHIFT_CTRL_string = "DISABLE_1"; + `ShiftCtrlEnum_binary_sequential_SLL_1 : _zz_memory_SHIFT_CTRL_string = "SLL_1 "; + `ShiftCtrlEnum_binary_sequential_SRL_1 : _zz_memory_SHIFT_CTRL_string = "SRL_1 "; + `ShiftCtrlEnum_binary_sequential_SRA_1 : _zz_memory_SHIFT_CTRL_string = "SRA_1 "; + default : _zz_memory_SHIFT_CTRL_string = "?????????"; + endcase + end + always @(*) begin + case(execute_SHIFT_CTRL) + `ShiftCtrlEnum_binary_sequential_DISABLE_1 : execute_SHIFT_CTRL_string = "DISABLE_1"; + `ShiftCtrlEnum_binary_sequential_SLL_1 : execute_SHIFT_CTRL_string = "SLL_1 "; + `ShiftCtrlEnum_binary_sequential_SRL_1 : execute_SHIFT_CTRL_string = "SRL_1 "; + `ShiftCtrlEnum_binary_sequential_SRA_1 : execute_SHIFT_CTRL_string = "SRA_1 "; + default : execute_SHIFT_CTRL_string = "?????????"; + endcase + end + always @(*) begin + case(_zz_execute_SHIFT_CTRL) + `ShiftCtrlEnum_binary_sequential_DISABLE_1 : _zz_execute_SHIFT_CTRL_string = "DISABLE_1"; + `ShiftCtrlEnum_binary_sequential_SLL_1 : _zz_execute_SHIFT_CTRL_string = "SLL_1 "; + `ShiftCtrlEnum_binary_sequential_SRL_1 : _zz_execute_SHIFT_CTRL_string = "SRL_1 "; + `ShiftCtrlEnum_binary_sequential_SRA_1 : _zz_execute_SHIFT_CTRL_string = "SRA_1 "; + default : _zz_execute_SHIFT_CTRL_string = "?????????"; + endcase + end + always @(*) begin + case(execute_SRC2_CTRL) + `Src2CtrlEnum_binary_sequential_RS : execute_SRC2_CTRL_string = "RS "; + `Src2CtrlEnum_binary_sequential_IMI : execute_SRC2_CTRL_string = "IMI"; + `Src2CtrlEnum_binary_sequential_IMS : execute_SRC2_CTRL_string = "IMS"; + `Src2CtrlEnum_binary_sequential_PC : execute_SRC2_CTRL_string = "PC "; + default : execute_SRC2_CTRL_string = "???"; + endcase + end + always @(*) begin + case(_zz_execute_SRC2_CTRL) + `Src2CtrlEnum_binary_sequential_RS : _zz_execute_SRC2_CTRL_string = "RS "; + `Src2CtrlEnum_binary_sequential_IMI : _zz_execute_SRC2_CTRL_string = "IMI"; + `Src2CtrlEnum_binary_sequential_IMS : _zz_execute_SRC2_CTRL_string = "IMS"; + `Src2CtrlEnum_binary_sequential_PC : _zz_execute_SRC2_CTRL_string = "PC "; + default : _zz_execute_SRC2_CTRL_string = "???"; + endcase + end + always @(*) begin + case(execute_SRC1_CTRL) + `Src1CtrlEnum_binary_sequential_RS : execute_SRC1_CTRL_string = "RS "; + `Src1CtrlEnum_binary_sequential_IMU : execute_SRC1_CTRL_string = "IMU "; + `Src1CtrlEnum_binary_sequential_PC_INCREMENT : execute_SRC1_CTRL_string = "PC_INCREMENT"; + `Src1CtrlEnum_binary_sequential_URS1 : execute_SRC1_CTRL_string = "URS1 "; + default : execute_SRC1_CTRL_string = "????????????"; + endcase + end + always @(*) begin + case(_zz_execute_SRC1_CTRL) + `Src1CtrlEnum_binary_sequential_RS : _zz_execute_SRC1_CTRL_string = "RS "; + `Src1CtrlEnum_binary_sequential_IMU : _zz_execute_SRC1_CTRL_string = "IMU "; + `Src1CtrlEnum_binary_sequential_PC_INCREMENT : _zz_execute_SRC1_CTRL_string = "PC_INCREMENT"; + `Src1CtrlEnum_binary_sequential_URS1 : _zz_execute_SRC1_CTRL_string = "URS1 "; + default : _zz_execute_SRC1_CTRL_string = "????????????"; + endcase + end + always @(*) begin + case(execute_ALU_CTRL) + `AluCtrlEnum_binary_sequential_ADD_SUB : execute_ALU_CTRL_string = "ADD_SUB "; + `AluCtrlEnum_binary_sequential_SLT_SLTU : execute_ALU_CTRL_string = "SLT_SLTU"; + `AluCtrlEnum_binary_sequential_BITWISE : execute_ALU_CTRL_string = "BITWISE "; + default : execute_ALU_CTRL_string = "????????"; + endcase + end + always @(*) begin + case(_zz_execute_ALU_CTRL) + `AluCtrlEnum_binary_sequential_ADD_SUB : _zz_execute_ALU_CTRL_string = "ADD_SUB "; + `AluCtrlEnum_binary_sequential_SLT_SLTU : _zz_execute_ALU_CTRL_string = "SLT_SLTU"; + `AluCtrlEnum_binary_sequential_BITWISE : _zz_execute_ALU_CTRL_string = "BITWISE "; + default : _zz_execute_ALU_CTRL_string = "????????"; + endcase + end + always @(*) begin + case(execute_ALU_BITWISE_CTRL) + `AluBitwiseCtrlEnum_binary_sequential_XOR_1 : execute_ALU_BITWISE_CTRL_string = "XOR_1"; + `AluBitwiseCtrlEnum_binary_sequential_OR_1 : execute_ALU_BITWISE_CTRL_string = "OR_1 "; + `AluBitwiseCtrlEnum_binary_sequential_AND_1 : execute_ALU_BITWISE_CTRL_string = "AND_1"; + default : execute_ALU_BITWISE_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(_zz_execute_ALU_BITWISE_CTRL) + `AluBitwiseCtrlEnum_binary_sequential_XOR_1 : _zz_execute_ALU_BITWISE_CTRL_string = "XOR_1"; + `AluBitwiseCtrlEnum_binary_sequential_OR_1 : _zz_execute_ALU_BITWISE_CTRL_string = "OR_1 "; + `AluBitwiseCtrlEnum_binary_sequential_AND_1 : _zz_execute_ALU_BITWISE_CTRL_string = "AND_1"; + default : _zz_execute_ALU_BITWISE_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(_zz_decode_CfuPlugin_CFU_INPUT_2_KIND_1) + `Input2Kind_binary_sequential_RS : _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_1_string = "RS "; + `Input2Kind_binary_sequential_IMM_I : _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_1_string = "IMM_I"; + default : _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_1_string = "?????"; + endcase + end + always @(*) begin + case(_zz_decode_ENV_CTRL_1) + `EnvCtrlEnum_binary_sequential_NONE : _zz_decode_ENV_CTRL_1_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : _zz_decode_ENV_CTRL_1_string = "XRET "; + `EnvCtrlEnum_binary_sequential_WFI : _zz_decode_ENV_CTRL_1_string = "WFI "; + `EnvCtrlEnum_binary_sequential_ECALL : _zz_decode_ENV_CTRL_1_string = "ECALL"; + default : _zz_decode_ENV_CTRL_1_string = "?????"; + endcase + end + always @(*) begin + case(_zz_decode_BRANCH_CTRL) + `BranchCtrlEnum_binary_sequential_INC : _zz_decode_BRANCH_CTRL_string = "INC "; + `BranchCtrlEnum_binary_sequential_B : _zz_decode_BRANCH_CTRL_string = "B "; + `BranchCtrlEnum_binary_sequential_JAL : _zz_decode_BRANCH_CTRL_string = "JAL "; + `BranchCtrlEnum_binary_sequential_JALR : _zz_decode_BRANCH_CTRL_string = "JALR"; + default : _zz_decode_BRANCH_CTRL_string = "????"; + endcase + end + always @(*) begin + case(_zz_decode_SHIFT_CTRL_1) + `ShiftCtrlEnum_binary_sequential_DISABLE_1 : _zz_decode_SHIFT_CTRL_1_string = "DISABLE_1"; + `ShiftCtrlEnum_binary_sequential_SLL_1 : _zz_decode_SHIFT_CTRL_1_string = "SLL_1 "; + `ShiftCtrlEnum_binary_sequential_SRL_1 : _zz_decode_SHIFT_CTRL_1_string = "SRL_1 "; + `ShiftCtrlEnum_binary_sequential_SRA_1 : _zz_decode_SHIFT_CTRL_1_string = "SRA_1 "; + default : _zz_decode_SHIFT_CTRL_1_string = "?????????"; + endcase + end + always @(*) begin + case(_zz_decode_ALU_BITWISE_CTRL_1) + `AluBitwiseCtrlEnum_binary_sequential_XOR_1 : _zz_decode_ALU_BITWISE_CTRL_1_string = "XOR_1"; + `AluBitwiseCtrlEnum_binary_sequential_OR_1 : _zz_decode_ALU_BITWISE_CTRL_1_string = "OR_1 "; + `AluBitwiseCtrlEnum_binary_sequential_AND_1 : _zz_decode_ALU_BITWISE_CTRL_1_string = "AND_1"; + default : _zz_decode_ALU_BITWISE_CTRL_1_string = "?????"; + endcase + end + always @(*) begin + case(_zz_decode_SRC2_CTRL_1) + `Src2CtrlEnum_binary_sequential_RS : _zz_decode_SRC2_CTRL_1_string = "RS "; + `Src2CtrlEnum_binary_sequential_IMI : _zz_decode_SRC2_CTRL_1_string = "IMI"; + `Src2CtrlEnum_binary_sequential_IMS : _zz_decode_SRC2_CTRL_1_string = "IMS"; + `Src2CtrlEnum_binary_sequential_PC : _zz_decode_SRC2_CTRL_1_string = "PC "; + default : _zz_decode_SRC2_CTRL_1_string = "???"; + endcase + end + always @(*) begin + case(_zz_decode_ALU_CTRL_1) + `AluCtrlEnum_binary_sequential_ADD_SUB : _zz_decode_ALU_CTRL_1_string = "ADD_SUB "; + `AluCtrlEnum_binary_sequential_SLT_SLTU : _zz_decode_ALU_CTRL_1_string = "SLT_SLTU"; + `AluCtrlEnum_binary_sequential_BITWISE : _zz_decode_ALU_CTRL_1_string = "BITWISE "; + default : _zz_decode_ALU_CTRL_1_string = "????????"; + endcase + end + always @(*) begin + case(_zz_decode_SRC1_CTRL_1) + `Src1CtrlEnum_binary_sequential_RS : _zz_decode_SRC1_CTRL_1_string = "RS "; + `Src1CtrlEnum_binary_sequential_IMU : _zz_decode_SRC1_CTRL_1_string = "IMU "; + `Src1CtrlEnum_binary_sequential_PC_INCREMENT : _zz_decode_SRC1_CTRL_1_string = "PC_INCREMENT"; + `Src1CtrlEnum_binary_sequential_URS1 : _zz_decode_SRC1_CTRL_1_string = "URS1 "; + default : _zz_decode_SRC1_CTRL_1_string = "????????????"; + endcase + end + always @(*) begin + case(decode_BRANCH_CTRL) + `BranchCtrlEnum_binary_sequential_INC : decode_BRANCH_CTRL_string = "INC "; + `BranchCtrlEnum_binary_sequential_B : decode_BRANCH_CTRL_string = "B "; + `BranchCtrlEnum_binary_sequential_JAL : decode_BRANCH_CTRL_string = "JAL "; + `BranchCtrlEnum_binary_sequential_JALR : decode_BRANCH_CTRL_string = "JALR"; + default : decode_BRANCH_CTRL_string = "????"; + endcase + end + always @(*) begin + case(_zz_decode_BRANCH_CTRL_1) + `BranchCtrlEnum_binary_sequential_INC : _zz_decode_BRANCH_CTRL_1_string = "INC "; + `BranchCtrlEnum_binary_sequential_B : _zz_decode_BRANCH_CTRL_1_string = "B "; + `BranchCtrlEnum_binary_sequential_JAL : _zz_decode_BRANCH_CTRL_1_string = "JAL "; + `BranchCtrlEnum_binary_sequential_JALR : _zz_decode_BRANCH_CTRL_1_string = "JALR"; + default : _zz_decode_BRANCH_CTRL_1_string = "????"; + endcase + end + always @(*) begin + case(_zz_decode_SRC1_CTRL_2) + `Src1CtrlEnum_binary_sequential_RS : _zz_decode_SRC1_CTRL_2_string = "RS "; + `Src1CtrlEnum_binary_sequential_IMU : _zz_decode_SRC1_CTRL_2_string = "IMU "; + `Src1CtrlEnum_binary_sequential_PC_INCREMENT : _zz_decode_SRC1_CTRL_2_string = "PC_INCREMENT"; + `Src1CtrlEnum_binary_sequential_URS1 : _zz_decode_SRC1_CTRL_2_string = "URS1 "; + default : _zz_decode_SRC1_CTRL_2_string = "????????????"; + endcase + end + always @(*) begin + case(_zz_decode_ALU_CTRL_2) + `AluCtrlEnum_binary_sequential_ADD_SUB : _zz_decode_ALU_CTRL_2_string = "ADD_SUB "; + `AluCtrlEnum_binary_sequential_SLT_SLTU : _zz_decode_ALU_CTRL_2_string = "SLT_SLTU"; + `AluCtrlEnum_binary_sequential_BITWISE : _zz_decode_ALU_CTRL_2_string = "BITWISE "; + default : _zz_decode_ALU_CTRL_2_string = "????????"; + endcase + end + always @(*) begin + case(_zz_decode_SRC2_CTRL_2) + `Src2CtrlEnum_binary_sequential_RS : _zz_decode_SRC2_CTRL_2_string = "RS "; + `Src2CtrlEnum_binary_sequential_IMI : _zz_decode_SRC2_CTRL_2_string = "IMI"; + `Src2CtrlEnum_binary_sequential_IMS : _zz_decode_SRC2_CTRL_2_string = "IMS"; + `Src2CtrlEnum_binary_sequential_PC : _zz_decode_SRC2_CTRL_2_string = "PC "; + default : _zz_decode_SRC2_CTRL_2_string = "???"; + endcase + end + always @(*) begin + case(_zz_decode_ALU_BITWISE_CTRL_2) + `AluBitwiseCtrlEnum_binary_sequential_XOR_1 : _zz_decode_ALU_BITWISE_CTRL_2_string = "XOR_1"; + `AluBitwiseCtrlEnum_binary_sequential_OR_1 : _zz_decode_ALU_BITWISE_CTRL_2_string = "OR_1 "; + `AluBitwiseCtrlEnum_binary_sequential_AND_1 : _zz_decode_ALU_BITWISE_CTRL_2_string = "AND_1"; + default : _zz_decode_ALU_BITWISE_CTRL_2_string = "?????"; + endcase + end + always @(*) begin + case(_zz_decode_SHIFT_CTRL_2) + `ShiftCtrlEnum_binary_sequential_DISABLE_1 : _zz_decode_SHIFT_CTRL_2_string = "DISABLE_1"; + `ShiftCtrlEnum_binary_sequential_SLL_1 : _zz_decode_SHIFT_CTRL_2_string = "SLL_1 "; + `ShiftCtrlEnum_binary_sequential_SRL_1 : _zz_decode_SHIFT_CTRL_2_string = "SRL_1 "; + `ShiftCtrlEnum_binary_sequential_SRA_1 : _zz_decode_SHIFT_CTRL_2_string = "SRA_1 "; + default : _zz_decode_SHIFT_CTRL_2_string = "?????????"; + endcase + end + always @(*) begin + case(_zz_decode_BRANCH_CTRL_2) + `BranchCtrlEnum_binary_sequential_INC : _zz_decode_BRANCH_CTRL_2_string = "INC "; + `BranchCtrlEnum_binary_sequential_B : _zz_decode_BRANCH_CTRL_2_string = "B "; + `BranchCtrlEnum_binary_sequential_JAL : _zz_decode_BRANCH_CTRL_2_string = "JAL "; + `BranchCtrlEnum_binary_sequential_JALR : _zz_decode_BRANCH_CTRL_2_string = "JALR"; + default : _zz_decode_BRANCH_CTRL_2_string = "????"; + endcase + end + always @(*) begin + case(_zz_decode_ENV_CTRL_2) + `EnvCtrlEnum_binary_sequential_NONE : _zz_decode_ENV_CTRL_2_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : _zz_decode_ENV_CTRL_2_string = "XRET "; + `EnvCtrlEnum_binary_sequential_WFI : _zz_decode_ENV_CTRL_2_string = "WFI "; + `EnvCtrlEnum_binary_sequential_ECALL : _zz_decode_ENV_CTRL_2_string = "ECALL"; + default : _zz_decode_ENV_CTRL_2_string = "?????"; + endcase + end + always @(*) begin + case(_zz_decode_CfuPlugin_CFU_INPUT_2_KIND_8) + `Input2Kind_binary_sequential_RS : _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_8_string = "RS "; + `Input2Kind_binary_sequential_IMM_I : _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_8_string = "IMM_I"; + default : _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_8_string = "?????"; + endcase + end + always @(*) begin + case(decode_to_execute_SRC1_CTRL) + `Src1CtrlEnum_binary_sequential_RS : decode_to_execute_SRC1_CTRL_string = "RS "; + `Src1CtrlEnum_binary_sequential_IMU : decode_to_execute_SRC1_CTRL_string = "IMU "; + `Src1CtrlEnum_binary_sequential_PC_INCREMENT : decode_to_execute_SRC1_CTRL_string = "PC_INCREMENT"; + `Src1CtrlEnum_binary_sequential_URS1 : decode_to_execute_SRC1_CTRL_string = "URS1 "; + default : decode_to_execute_SRC1_CTRL_string = "????????????"; + endcase + end + always @(*) begin + case(decode_to_execute_ALU_CTRL) + `AluCtrlEnum_binary_sequential_ADD_SUB : decode_to_execute_ALU_CTRL_string = "ADD_SUB "; + `AluCtrlEnum_binary_sequential_SLT_SLTU : decode_to_execute_ALU_CTRL_string = "SLT_SLTU"; + `AluCtrlEnum_binary_sequential_BITWISE : decode_to_execute_ALU_CTRL_string = "BITWISE "; + default : decode_to_execute_ALU_CTRL_string = "????????"; + endcase + end + always @(*) begin + case(decode_to_execute_SRC2_CTRL) + `Src2CtrlEnum_binary_sequential_RS : decode_to_execute_SRC2_CTRL_string = "RS "; + `Src2CtrlEnum_binary_sequential_IMI : decode_to_execute_SRC2_CTRL_string = "IMI"; + `Src2CtrlEnum_binary_sequential_IMS : decode_to_execute_SRC2_CTRL_string = "IMS"; + `Src2CtrlEnum_binary_sequential_PC : decode_to_execute_SRC2_CTRL_string = "PC "; + default : decode_to_execute_SRC2_CTRL_string = "???"; + endcase + end + always @(*) begin + case(decode_to_execute_ALU_BITWISE_CTRL) + `AluBitwiseCtrlEnum_binary_sequential_XOR_1 : decode_to_execute_ALU_BITWISE_CTRL_string = "XOR_1"; + `AluBitwiseCtrlEnum_binary_sequential_OR_1 : decode_to_execute_ALU_BITWISE_CTRL_string = "OR_1 "; + `AluBitwiseCtrlEnum_binary_sequential_AND_1 : decode_to_execute_ALU_BITWISE_CTRL_string = "AND_1"; + default : decode_to_execute_ALU_BITWISE_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(decode_to_execute_SHIFT_CTRL) + `ShiftCtrlEnum_binary_sequential_DISABLE_1 : decode_to_execute_SHIFT_CTRL_string = "DISABLE_1"; + `ShiftCtrlEnum_binary_sequential_SLL_1 : decode_to_execute_SHIFT_CTRL_string = "SLL_1 "; + `ShiftCtrlEnum_binary_sequential_SRL_1 : decode_to_execute_SHIFT_CTRL_string = "SRL_1 "; + `ShiftCtrlEnum_binary_sequential_SRA_1 : decode_to_execute_SHIFT_CTRL_string = "SRA_1 "; + default : decode_to_execute_SHIFT_CTRL_string = "?????????"; + endcase + end + always @(*) begin + case(execute_to_memory_SHIFT_CTRL) + `ShiftCtrlEnum_binary_sequential_DISABLE_1 : execute_to_memory_SHIFT_CTRL_string = "DISABLE_1"; + `ShiftCtrlEnum_binary_sequential_SLL_1 : execute_to_memory_SHIFT_CTRL_string = "SLL_1 "; + `ShiftCtrlEnum_binary_sequential_SRL_1 : execute_to_memory_SHIFT_CTRL_string = "SRL_1 "; + `ShiftCtrlEnum_binary_sequential_SRA_1 : execute_to_memory_SHIFT_CTRL_string = "SRA_1 "; + default : execute_to_memory_SHIFT_CTRL_string = "?????????"; + endcase + end + always @(*) begin + case(decode_to_execute_BRANCH_CTRL) + `BranchCtrlEnum_binary_sequential_INC : decode_to_execute_BRANCH_CTRL_string = "INC "; + `BranchCtrlEnum_binary_sequential_B : decode_to_execute_BRANCH_CTRL_string = "B "; + `BranchCtrlEnum_binary_sequential_JAL : decode_to_execute_BRANCH_CTRL_string = "JAL "; + `BranchCtrlEnum_binary_sequential_JALR : decode_to_execute_BRANCH_CTRL_string = "JALR"; + default : decode_to_execute_BRANCH_CTRL_string = "????"; + endcase + end + always @(*) begin + case(decode_to_execute_ENV_CTRL) + `EnvCtrlEnum_binary_sequential_NONE : decode_to_execute_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : decode_to_execute_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_binary_sequential_WFI : decode_to_execute_ENV_CTRL_string = "WFI "; + `EnvCtrlEnum_binary_sequential_ECALL : decode_to_execute_ENV_CTRL_string = "ECALL"; + default : decode_to_execute_ENV_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(execute_to_memory_ENV_CTRL) + `EnvCtrlEnum_binary_sequential_NONE : execute_to_memory_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : execute_to_memory_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_binary_sequential_WFI : execute_to_memory_ENV_CTRL_string = "WFI "; + `EnvCtrlEnum_binary_sequential_ECALL : execute_to_memory_ENV_CTRL_string = "ECALL"; + default : execute_to_memory_ENV_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(memory_to_writeBack_ENV_CTRL) + `EnvCtrlEnum_binary_sequential_NONE : memory_to_writeBack_ENV_CTRL_string = "NONE "; + `EnvCtrlEnum_binary_sequential_XRET : memory_to_writeBack_ENV_CTRL_string = "XRET "; + `EnvCtrlEnum_binary_sequential_WFI : memory_to_writeBack_ENV_CTRL_string = "WFI "; + `EnvCtrlEnum_binary_sequential_ECALL : memory_to_writeBack_ENV_CTRL_string = "ECALL"; + default : memory_to_writeBack_ENV_CTRL_string = "?????"; + endcase + end + always @(*) begin + case(decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND) + `Input2Kind_binary_sequential_RS : decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND_string = "RS "; + `Input2Kind_binary_sequential_IMM_I : decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND_string = "IMM_I"; + default : decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND_string = "?????"; + endcase + end + `endif + + assign memory_MUL_LOW = ($signed(_zz_memory_MUL_LOW) + $signed(_zz_memory_MUL_LOW_7)); + assign writeBack_CfuPlugin_CFU_IN_FLIGHT = memory_to_writeBack_CfuPlugin_CFU_IN_FLIGHT; + assign execute_CfuPlugin_CFU_IN_FLIGHT = ((execute_CfuPlugin_schedule || execute_CfuPlugin_hold) || execute_CfuPlugin_fired); + assign memory_MUL_HH = execute_to_memory_MUL_HH; + assign execute_MUL_HH = ($signed(execute_MulPlugin_aHigh) * $signed(execute_MulPlugin_bHigh)); + assign execute_MUL_HL = ($signed(execute_MulPlugin_aHigh) * $signed(execute_MulPlugin_bSLow)); + assign execute_MUL_LH = ($signed(execute_MulPlugin_aSLow) * $signed(execute_MulPlugin_bHigh)); + assign execute_MUL_LL = (execute_MulPlugin_aULow * execute_MulPlugin_bULow); + assign execute_SHIFT_RIGHT = _zz_execute_SHIFT_RIGHT; + assign execute_REGFILE_WRITE_DATA = _zz_execute_REGFILE_WRITE_DATA; + assign memory_MEMORY_STORE_DATA_RF = execute_to_memory_MEMORY_STORE_DATA_RF; + assign execute_MEMORY_STORE_DATA_RF = _zz_execute_MEMORY_STORE_DATA_RF; + assign decode_DO_EBREAK = (((! DebugPlugin_haltIt) && (decode_IS_EBREAK || 1'b0)) && DebugPlugin_allowEBreak); + assign decode_CSR_READ_OPCODE = (decode_INSTRUCTION[13 : 7] != 7'h20); + assign decode_CSR_WRITE_OPCODE = (! (((decode_INSTRUCTION[14 : 13] == 2'b01) && (decode_INSTRUCTION[19 : 15] == 5'h0)) || ((decode_INSTRUCTION[14 : 13] == 2'b11) && (decode_INSTRUCTION[19 : 15] == 5'h0)))); + assign decode_PREDICTION_HAD_BRANCHED2 = IBusCachedPlugin_decodePrediction_cmd_hadBranch; + assign decode_SRC2_FORCE_ZERO = (decode_SRC_ADD_ZERO && (! decode_SRC_USE_SUB_LESS)); + assign decode_CfuPlugin_CFU_INPUT_2_KIND = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND; + assign _zz_decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND = _zz_decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND_1; + assign decode_CfuPlugin_CFU_ENABLE = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[33]; + assign decode_IS_RS2_SIGNED = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[31]; + assign decode_IS_RS1_SIGNED = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[30]; + assign decode_IS_DIV = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[29]; + assign memory_IS_MUL = execute_to_memory_IS_MUL; + assign execute_IS_MUL = decode_to_execute_IS_MUL; + assign decode_IS_MUL = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[28]; + assign _zz_memory_to_writeBack_ENV_CTRL = _zz_memory_to_writeBack_ENV_CTRL_1; + assign _zz_execute_to_memory_ENV_CTRL = _zz_execute_to_memory_ENV_CTRL_1; + assign decode_ENV_CTRL = _zz_decode_ENV_CTRL; + assign _zz_decode_to_execute_ENV_CTRL = _zz_decode_to_execute_ENV_CTRL_1; + assign decode_IS_CSR = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[25]; + assign _zz_decode_to_execute_BRANCH_CTRL = _zz_decode_to_execute_BRANCH_CTRL_1; + assign _zz_execute_to_memory_SHIFT_CTRL = _zz_execute_to_memory_SHIFT_CTRL_1; + assign decode_SHIFT_CTRL = _zz_decode_SHIFT_CTRL; + assign _zz_decode_to_execute_SHIFT_CTRL = _zz_decode_to_execute_SHIFT_CTRL_1; + assign decode_ALU_BITWISE_CTRL = _zz_decode_ALU_BITWISE_CTRL; + assign _zz_decode_to_execute_ALU_BITWISE_CTRL = _zz_decode_to_execute_ALU_BITWISE_CTRL_1; + assign decode_SRC_LESS_UNSIGNED = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[17]; + assign decode_MEMORY_MANAGMENT = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[16]; + assign memory_MEMORY_WR = execute_to_memory_MEMORY_WR; + assign decode_MEMORY_WR = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[13]; + assign execute_BYPASSABLE_MEMORY_STAGE = decode_to_execute_BYPASSABLE_MEMORY_STAGE; + assign decode_BYPASSABLE_MEMORY_STAGE = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[12]; + assign decode_BYPASSABLE_EXECUTE_STAGE = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[11]; + assign decode_SRC2_CTRL = _zz_decode_SRC2_CTRL; + assign _zz_decode_to_execute_SRC2_CTRL = _zz_decode_to_execute_SRC2_CTRL_1; + assign decode_ALU_CTRL = _zz_decode_ALU_CTRL; + assign _zz_decode_to_execute_ALU_CTRL = _zz_decode_to_execute_ALU_CTRL_1; + assign decode_SRC1_CTRL = _zz_decode_SRC1_CTRL; + assign _zz_decode_to_execute_SRC1_CTRL = _zz_decode_to_execute_SRC1_CTRL_1; + assign decode_MEMORY_FORCE_CONSTISTENCY = 1'b0; + assign writeBack_FORMAL_PC_NEXT = memory_to_writeBack_FORMAL_PC_NEXT; + assign memory_FORMAL_PC_NEXT = execute_to_memory_FORMAL_PC_NEXT; + assign execute_FORMAL_PC_NEXT = decode_to_execute_FORMAL_PC_NEXT; + assign decode_FORMAL_PC_NEXT = (decode_PC + 32'h00000004); + assign memory_PC = execute_to_memory_PC; + always @(*) begin + _zz_memory_to_writeBack_CfuPlugin_CFU_IN_FLIGHT = memory_CfuPlugin_CFU_IN_FLIGHT; + if(memory_arbitration_isStuck) begin + _zz_memory_to_writeBack_CfuPlugin_CFU_IN_FLIGHT = 1'b0; + end + end + + always @(*) begin + _zz_execute_to_memory_CfuPlugin_CFU_IN_FLIGHT = execute_CfuPlugin_CFU_IN_FLIGHT; + if(execute_arbitration_isStuck) begin + _zz_execute_to_memory_CfuPlugin_CFU_IN_FLIGHT = 1'b0; + end + end + + assign memory_CfuPlugin_CFU_IN_FLIGHT = execute_to_memory_CfuPlugin_CFU_IN_FLIGHT; + assign execute_CfuPlugin_CFU_INPUT_2_KIND = _zz_execute_CfuPlugin_CFU_INPUT_2_KIND; + assign execute_CfuPlugin_CFU_ENABLE = decode_to_execute_CfuPlugin_CFU_ENABLE; + assign execute_DO_EBREAK = decode_to_execute_DO_EBREAK; + assign decode_IS_EBREAK = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[32]; + assign execute_IS_RS1_SIGNED = decode_to_execute_IS_RS1_SIGNED; + assign execute_IS_DIV = decode_to_execute_IS_DIV; + assign execute_IS_RS2_SIGNED = decode_to_execute_IS_RS2_SIGNED; + assign memory_IS_DIV = execute_to_memory_IS_DIV; + assign writeBack_IS_MUL = memory_to_writeBack_IS_MUL; + assign writeBack_MUL_HH = memory_to_writeBack_MUL_HH; + assign writeBack_MUL_LOW = memory_to_writeBack_MUL_LOW; + assign memory_MUL_HL = execute_to_memory_MUL_HL; + assign memory_MUL_LH = execute_to_memory_MUL_LH; + assign memory_MUL_LL = execute_to_memory_MUL_LL; + assign execute_CSR_READ_OPCODE = decode_to_execute_CSR_READ_OPCODE; + assign execute_CSR_WRITE_OPCODE = decode_to_execute_CSR_WRITE_OPCODE; + assign execute_IS_CSR = decode_to_execute_IS_CSR; + assign memory_ENV_CTRL = _zz_memory_ENV_CTRL; + assign execute_ENV_CTRL = _zz_execute_ENV_CTRL; + assign writeBack_ENV_CTRL = _zz_writeBack_ENV_CTRL; + assign execute_BRANCH_CALC = {execute_BranchPlugin_branchAdder[31 : 1],1'b0}; + assign execute_BRANCH_DO = ((execute_PREDICTION_HAD_BRANCHED2 != execute_BRANCH_COND_RESULT) || execute_BranchPlugin_missAlignedTarget); + assign execute_PC = decode_to_execute_PC; + assign execute_PREDICTION_HAD_BRANCHED2 = decode_to_execute_PREDICTION_HAD_BRANCHED2; + assign execute_RS1 = decode_to_execute_RS1; + assign execute_BRANCH_COND_RESULT = _zz_execute_BRANCH_COND_RESULT_1; + assign execute_BRANCH_CTRL = _zz_execute_BRANCH_CTRL; + assign decode_RS2_USE = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[15]; + assign decode_RS1_USE = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[5]; + always @(*) begin + _zz_decode_RS2 = execute_REGFILE_WRITE_DATA; + if(when_CsrPlugin_l1176) begin + _zz_decode_RS2 = CsrPlugin_csrMapping_readDataSignal; + end + end + + assign execute_REGFILE_WRITE_VALID = decode_to_execute_REGFILE_WRITE_VALID; + assign execute_BYPASSABLE_EXECUTE_STAGE = decode_to_execute_BYPASSABLE_EXECUTE_STAGE; + assign memory_REGFILE_WRITE_VALID = execute_to_memory_REGFILE_WRITE_VALID; + assign memory_INSTRUCTION = execute_to_memory_INSTRUCTION; + assign memory_BYPASSABLE_MEMORY_STAGE = execute_to_memory_BYPASSABLE_MEMORY_STAGE; + assign writeBack_REGFILE_WRITE_VALID = memory_to_writeBack_REGFILE_WRITE_VALID; + always @(*) begin + decode_RS2 = decode_RegFilePlugin_rs2Data; + if(HazardSimplePlugin_writeBackBuffer_valid) begin + if(HazardSimplePlugin_addr1Match) begin + decode_RS2 = HazardSimplePlugin_writeBackBuffer_payload_data; + end + end + if(when_HazardSimplePlugin_l45) begin + if(when_HazardSimplePlugin_l47) begin + if(when_HazardSimplePlugin_l51) begin + decode_RS2 = _zz_decode_RS2_2; + end + end + end + if(when_HazardSimplePlugin_l45_1) begin + if(memory_BYPASSABLE_MEMORY_STAGE) begin + if(when_HazardSimplePlugin_l51_1) begin + decode_RS2 = _zz_decode_RS2_1; + end + end + end + if(when_HazardSimplePlugin_l45_2) begin + if(execute_BYPASSABLE_EXECUTE_STAGE) begin + if(when_HazardSimplePlugin_l51_2) begin + decode_RS2 = _zz_decode_RS2; + end + end + end + end + + always @(*) begin + decode_RS1 = decode_RegFilePlugin_rs1Data; + if(HazardSimplePlugin_writeBackBuffer_valid) begin + if(HazardSimplePlugin_addr0Match) begin + decode_RS1 = HazardSimplePlugin_writeBackBuffer_payload_data; + end + end + if(when_HazardSimplePlugin_l45) begin + if(when_HazardSimplePlugin_l47) begin + if(when_HazardSimplePlugin_l48) begin + decode_RS1 = _zz_decode_RS2_2; + end + end + end + if(when_HazardSimplePlugin_l45_1) begin + if(memory_BYPASSABLE_MEMORY_STAGE) begin + if(when_HazardSimplePlugin_l48_1) begin + decode_RS1 = _zz_decode_RS2_1; + end + end + end + if(when_HazardSimplePlugin_l45_2) begin + if(execute_BYPASSABLE_EXECUTE_STAGE) begin + if(when_HazardSimplePlugin_l48_2) begin + decode_RS1 = _zz_decode_RS2; + end + end + end + end + + assign memory_SHIFT_RIGHT = execute_to_memory_SHIFT_RIGHT; + always @(*) begin + _zz_decode_RS2_1 = memory_REGFILE_WRITE_DATA; + if(memory_arbitration_isValid) begin + case(memory_SHIFT_CTRL) + `ShiftCtrlEnum_binary_sequential_SLL_1 : begin + _zz_decode_RS2_1 = _zz_decode_RS2_3; + end + `ShiftCtrlEnum_binary_sequential_SRL_1, `ShiftCtrlEnum_binary_sequential_SRA_1 : begin + _zz_decode_RS2_1 = memory_SHIFT_RIGHT; + end + default : begin + end + endcase + end + if(when_MulDivIterativePlugin_l128) begin + _zz_decode_RS2_1 = memory_DivPlugin_div_result; + end + if(memory_CfuPlugin_CFU_IN_FLIGHT) begin + _zz_decode_RS2_1 = CfuPlugin_bus_rsp_rsp_payload_outputs_0; + end + end + + assign memory_SHIFT_CTRL = _zz_memory_SHIFT_CTRL; + assign execute_SHIFT_CTRL = _zz_execute_SHIFT_CTRL; + assign execute_SRC_LESS_UNSIGNED = decode_to_execute_SRC_LESS_UNSIGNED; + assign execute_SRC2_FORCE_ZERO = decode_to_execute_SRC2_FORCE_ZERO; + assign execute_SRC_USE_SUB_LESS = decode_to_execute_SRC_USE_SUB_LESS; + assign _zz_execute_SRC2 = execute_PC; + assign execute_SRC2_CTRL = _zz_execute_SRC2_CTRL; + assign execute_SRC1_CTRL = _zz_execute_SRC1_CTRL; + assign decode_SRC_USE_SUB_LESS = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[3]; + assign decode_SRC_ADD_ZERO = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[20]; + assign execute_SRC_ADD_SUB = execute_SrcPlugin_addSub; + assign execute_SRC_LESS = execute_SrcPlugin_less; + assign execute_ALU_CTRL = _zz_execute_ALU_CTRL; + assign execute_SRC2 = _zz_execute_SRC2_5; + assign execute_SRC1 = _zz_execute_SRC1; + assign execute_ALU_BITWISE_CTRL = _zz_execute_ALU_BITWISE_CTRL; + assign _zz_lastStageRegFileWrite_payload_address = writeBack_INSTRUCTION; + assign _zz_lastStageRegFileWrite_valid = writeBack_REGFILE_WRITE_VALID; + always @(*) begin + _zz_1 = 1'b0; + if(lastStageRegFileWrite_valid) begin + _zz_1 = 1'b1; + end + end + + assign decode_INSTRUCTION_ANTICIPATED = (decode_arbitration_isStuck ? decode_INSTRUCTION : IBusCachedPlugin_cache_io_cpu_fetch_data); + always @(*) begin + decode_REGFILE_WRITE_VALID = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[10]; + if(when_RegFilePlugin_l63) begin + decode_REGFILE_WRITE_VALID = 1'b0; + end + end + + assign decode_LEGAL_INSTRUCTION = ({((decode_INSTRUCTION & 32'h0000005f) == 32'h00000017),{((decode_INSTRUCTION & 32'h0000007f) == 32'h0000006f),{((decode_INSTRUCTION & 32'h0000007f) == 32'h0000000b),{((decode_INSTRUCTION & _zz_decode_LEGAL_INSTRUCTION) == 32'h00000003),{(_zz_decode_LEGAL_INSTRUCTION_1 == _zz_decode_LEGAL_INSTRUCTION_2),{_zz_decode_LEGAL_INSTRUCTION_3,{_zz_decode_LEGAL_INSTRUCTION_4,_zz_decode_LEGAL_INSTRUCTION_5}}}}}}} != 22'h0); + always @(*) begin + _zz_decode_RS2_2 = writeBack_REGFILE_WRITE_DATA; + if(when_DBusCachedPlugin_l484) begin + _zz_decode_RS2_2 = writeBack_DBusCachedPlugin_rspFormated; + end + if(when_MulPlugin_l147) begin + case(switch_MulPlugin_l148) + 2'b00 : begin + _zz_decode_RS2_2 = _zz__zz_decode_RS2_2; + end + default : begin + _zz_decode_RS2_2 = _zz__zz_decode_RS2_2_1; + end + endcase + end + end + + assign writeBack_MEMORY_WR = memory_to_writeBack_MEMORY_WR; + assign writeBack_MEMORY_STORE_DATA_RF = memory_to_writeBack_MEMORY_STORE_DATA_RF; + assign writeBack_REGFILE_WRITE_DATA = memory_to_writeBack_REGFILE_WRITE_DATA; + assign writeBack_MEMORY_ENABLE = memory_to_writeBack_MEMORY_ENABLE; + assign memory_REGFILE_WRITE_DATA = execute_to_memory_REGFILE_WRITE_DATA; + assign memory_MEMORY_ENABLE = execute_to_memory_MEMORY_ENABLE; + assign execute_MEMORY_FORCE_CONSTISTENCY = decode_to_execute_MEMORY_FORCE_CONSTISTENCY; + assign execute_MEMORY_MANAGMENT = decode_to_execute_MEMORY_MANAGMENT; + assign execute_RS2 = decode_to_execute_RS2; + assign execute_MEMORY_WR = decode_to_execute_MEMORY_WR; + assign execute_SRC_ADD = execute_SrcPlugin_addSub; + assign execute_MEMORY_ENABLE = decode_to_execute_MEMORY_ENABLE; + assign execute_INSTRUCTION = decode_to_execute_INSTRUCTION; + assign decode_MEMORY_ENABLE = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[4]; + assign decode_FLUSH_ALL = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[0]; + always @(*) begin + IBusCachedPlugin_rsp_issueDetected_4 = IBusCachedPlugin_rsp_issueDetected_3; + if(when_IBusCachedPlugin_l256) begin + IBusCachedPlugin_rsp_issueDetected_4 = 1'b1; + end + end + + always @(*) begin + IBusCachedPlugin_rsp_issueDetected_3 = IBusCachedPlugin_rsp_issueDetected_2; + if(when_IBusCachedPlugin_l250) begin + IBusCachedPlugin_rsp_issueDetected_3 = 1'b1; + end + end + + always @(*) begin + IBusCachedPlugin_rsp_issueDetected_2 = IBusCachedPlugin_rsp_issueDetected_1; + if(when_IBusCachedPlugin_l244) begin + IBusCachedPlugin_rsp_issueDetected_2 = 1'b1; + end + end + + always @(*) begin + IBusCachedPlugin_rsp_issueDetected_1 = IBusCachedPlugin_rsp_issueDetected; + if(when_IBusCachedPlugin_l239) begin + IBusCachedPlugin_rsp_issueDetected_1 = 1'b1; + end + end + + assign decode_BRANCH_CTRL = _zz_decode_BRANCH_CTRL_1; + assign decode_INSTRUCTION = IBusCachedPlugin_iBusRsp_output_payload_rsp_inst; + always @(*) begin + _zz_execute_to_memory_FORMAL_PC_NEXT = execute_FORMAL_PC_NEXT; + if(BranchPlugin_jumpInterface_valid) begin + _zz_execute_to_memory_FORMAL_PC_NEXT = BranchPlugin_jumpInterface_payload; + end + end + + always @(*) begin + _zz_decode_to_execute_FORMAL_PC_NEXT = decode_FORMAL_PC_NEXT; + if(IBusCachedPlugin_predictionJumpInterface_valid) begin + _zz_decode_to_execute_FORMAL_PC_NEXT = IBusCachedPlugin_predictionJumpInterface_payload; + end + end + + assign decode_PC = IBusCachedPlugin_iBusRsp_output_payload_pc; + assign writeBack_PC = memory_to_writeBack_PC; + assign writeBack_INSTRUCTION = memory_to_writeBack_INSTRUCTION; + always @(*) begin + decode_arbitration_haltItself = 1'b0; + if(when_DBusCachedPlugin_l303) begin + decode_arbitration_haltItself = 1'b1; + end + case(switch_Fetcher_l362) + 3'b010 : begin + decode_arbitration_haltItself = 1'b1; + end + default : begin + end + endcase + end + + always @(*) begin + decode_arbitration_haltByOther = 1'b0; + if(when_HazardSimplePlugin_l113) begin + decode_arbitration_haltByOther = 1'b1; + end + if(CsrPlugin_pipelineLiberator_active) begin + decode_arbitration_haltByOther = 1'b1; + end + if(when_CsrPlugin_l1116) begin + decode_arbitration_haltByOther = 1'b1; + end + end + + always @(*) begin + decode_arbitration_removeIt = 1'b0; + if(_zz_when) begin + decode_arbitration_removeIt = 1'b1; + end + if(decode_arbitration_isFlushed) begin + decode_arbitration_removeIt = 1'b1; + end + end + + assign decode_arbitration_flushIt = 1'b0; + always @(*) begin + decode_arbitration_flushNext = 1'b0; + if(IBusCachedPlugin_predictionJumpInterface_valid) begin + decode_arbitration_flushNext = 1'b1; + end + if(_zz_when) begin + decode_arbitration_flushNext = 1'b1; + end + end + + always @(*) begin + execute_arbitration_haltItself = 1'b0; + if(when_DBusCachedPlugin_l343) begin + execute_arbitration_haltItself = 1'b1; + end + if(when_CsrPlugin_l1108) begin + if(when_CsrPlugin_l1110) begin + execute_arbitration_haltItself = 1'b1; + end + end + if(when_CsrPlugin_l1180) begin + if(execute_CsrPlugin_blockedBySideEffects) begin + execute_arbitration_haltItself = 1'b1; + end + end + if(when_CfuPlugin_l175) begin + execute_arbitration_haltItself = 1'b1; + end + end + + always @(*) begin + execute_arbitration_haltByOther = 1'b0; + if(when_DBusCachedPlugin_l359) begin + execute_arbitration_haltByOther = 1'b1; + end + if(when_DebugPlugin_l284) begin + execute_arbitration_haltByOther = 1'b1; + end + end + + always @(*) begin + execute_arbitration_removeIt = 1'b0; + if(_zz_when_1) begin + execute_arbitration_removeIt = 1'b1; + end + if(execute_arbitration_isFlushed) begin + execute_arbitration_removeIt = 1'b1; + end + end + + always @(*) begin + execute_arbitration_flushIt = 1'b0; + if(when_DebugPlugin_l284) begin + if(when_DebugPlugin_l287) begin + execute_arbitration_flushIt = 1'b1; + end + end + end + + always @(*) begin + execute_arbitration_flushNext = 1'b0; + if(BranchPlugin_jumpInterface_valid) begin + execute_arbitration_flushNext = 1'b1; + end + if(_zz_when_1) begin + execute_arbitration_flushNext = 1'b1; + end + if(when_DebugPlugin_l284) begin + if(when_DebugPlugin_l287) begin + execute_arbitration_flushNext = 1'b1; + end + end + end + + always @(*) begin + memory_arbitration_haltItself = 1'b0; + if(when_MulDivIterativePlugin_l128) begin + if(when_MulDivIterativePlugin_l129) begin + memory_arbitration_haltItself = 1'b1; + end + end + if(memory_CfuPlugin_CFU_IN_FLIGHT) begin + if(when_CfuPlugin_l208) begin + memory_arbitration_haltItself = 1'b1; + end + end + end + + assign memory_arbitration_haltByOther = 1'b0; + always @(*) begin + memory_arbitration_removeIt = 1'b0; + if(memory_arbitration_isFlushed) begin + memory_arbitration_removeIt = 1'b1; + end + end + + assign memory_arbitration_flushIt = 1'b0; + assign memory_arbitration_flushNext = 1'b0; + always @(*) begin + writeBack_arbitration_haltItself = 1'b0; + if(when_DBusCachedPlugin_l458) begin + writeBack_arbitration_haltItself = 1'b1; + end + end + + assign writeBack_arbitration_haltByOther = 1'b0; + always @(*) begin + writeBack_arbitration_removeIt = 1'b0; + if(DBusCachedPlugin_exceptionBus_valid) begin + writeBack_arbitration_removeIt = 1'b1; + end + if(writeBack_arbitration_isFlushed) begin + writeBack_arbitration_removeIt = 1'b1; + end + end + + always @(*) begin + writeBack_arbitration_flushIt = 1'b0; + if(DBusCachedPlugin_redoBranch_valid) begin + writeBack_arbitration_flushIt = 1'b1; + end + end + + always @(*) begin + writeBack_arbitration_flushNext = 1'b0; + if(DBusCachedPlugin_redoBranch_valid) begin + writeBack_arbitration_flushNext = 1'b1; + end + if(DBusCachedPlugin_exceptionBus_valid) begin + writeBack_arbitration_flushNext = 1'b1; + end + if(when_CsrPlugin_l1019) begin + writeBack_arbitration_flushNext = 1'b1; + end + if(when_CsrPlugin_l1064) begin + writeBack_arbitration_flushNext = 1'b1; + end + end + + assign lastStageInstruction = writeBack_INSTRUCTION; + assign lastStagePc = writeBack_PC; + assign lastStageIsValid = writeBack_arbitration_isValid; + assign lastStageIsFiring = writeBack_arbitration_isFiring; + always @(*) begin + IBusCachedPlugin_fetcherHalt = 1'b0; + if(when_CsrPlugin_l922) begin + IBusCachedPlugin_fetcherHalt = 1'b1; + end + if(when_CsrPlugin_l1019) begin + IBusCachedPlugin_fetcherHalt = 1'b1; + end + if(when_CsrPlugin_l1064) begin + IBusCachedPlugin_fetcherHalt = 1'b1; + end + if(when_DebugPlugin_l284) begin + if(when_DebugPlugin_l287) begin + IBusCachedPlugin_fetcherHalt = 1'b1; + end + end + if(DebugPlugin_haltIt) begin + IBusCachedPlugin_fetcherHalt = 1'b1; + end + if(when_DebugPlugin_l300) begin + IBusCachedPlugin_fetcherHalt = 1'b1; + end + end + + always @(*) begin + IBusCachedPlugin_incomingInstruction = 1'b0; + if(when_Fetcher_l240) begin + IBusCachedPlugin_incomingInstruction = 1'b1; + end + end + + always @(*) begin + _zz_when_DBusCachedPlugin_l386 = 1'b0; + if(DebugPlugin_godmode) begin + _zz_when_DBusCachedPlugin_l386 = 1'b1; + end + end + + assign CsrPlugin_csrMapping_allowCsrSignal = 1'b0; + assign CsrPlugin_csrMapping_readDataSignal = CsrPlugin_csrMapping_readDataInit; + always @(*) begin + CsrPlugin_inWfi = 1'b0; + if(when_CsrPlugin_l1108) begin + CsrPlugin_inWfi = 1'b1; + end + end + + always @(*) begin + CsrPlugin_thirdPartyWake = 1'b0; + if(DebugPlugin_haltIt) begin + CsrPlugin_thirdPartyWake = 1'b1; + end + end + + always @(*) begin + CsrPlugin_jumpInterface_valid = 1'b0; + if(when_CsrPlugin_l1019) begin + CsrPlugin_jumpInterface_valid = 1'b1; + end + if(when_CsrPlugin_l1064) begin + CsrPlugin_jumpInterface_valid = 1'b1; + end + end + + always @(*) begin + CsrPlugin_jumpInterface_payload = 32'bxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx; + if(when_CsrPlugin_l1019) begin + CsrPlugin_jumpInterface_payload = {CsrPlugin_xtvec_base,2'b00}; + end + if(when_CsrPlugin_l1064) begin + case(switch_CsrPlugin_l1068) + 2'b11 : begin + CsrPlugin_jumpInterface_payload = CsrPlugin_mepc; + end + default : begin + end + endcase + end + end + + always @(*) begin + CsrPlugin_forceMachineWire = 1'b0; + if(DebugPlugin_godmode) begin + CsrPlugin_forceMachineWire = 1'b1; + end + end + + always @(*) begin + CsrPlugin_allowInterrupts = 1'b1; + if(when_DebugPlugin_l316) begin + CsrPlugin_allowInterrupts = 1'b0; + end + end + + always @(*) begin + CsrPlugin_allowException = 1'b1; + if(DebugPlugin_godmode) begin + CsrPlugin_allowException = 1'b0; + end + end + + always @(*) begin + CsrPlugin_allowEbreakException = 1'b1; + if(DebugPlugin_allowEBreak) begin + CsrPlugin_allowEbreakException = 1'b0; + end + end + + assign IBusCachedPlugin_externalFlush = ({writeBack_arbitration_flushNext,{memory_arbitration_flushNext,{execute_arbitration_flushNext,decode_arbitration_flushNext}}} != 4'b0000); + assign IBusCachedPlugin_jump_pcLoad_valid = ({CsrPlugin_jumpInterface_valid,{BranchPlugin_jumpInterface_valid,{DBusCachedPlugin_redoBranch_valid,IBusCachedPlugin_predictionJumpInterface_valid}}} != 4'b0000); + assign _zz_IBusCachedPlugin_jump_pcLoad_payload = {IBusCachedPlugin_predictionJumpInterface_valid,{BranchPlugin_jumpInterface_valid,{CsrPlugin_jumpInterface_valid,DBusCachedPlugin_redoBranch_valid}}}; + assign _zz_IBusCachedPlugin_jump_pcLoad_payload_1 = (_zz_IBusCachedPlugin_jump_pcLoad_payload & (~ _zz__zz_IBusCachedPlugin_jump_pcLoad_payload_1)); + assign _zz_IBusCachedPlugin_jump_pcLoad_payload_2 = _zz_IBusCachedPlugin_jump_pcLoad_payload_1[3]; + assign _zz_IBusCachedPlugin_jump_pcLoad_payload_3 = (_zz_IBusCachedPlugin_jump_pcLoad_payload_1[1] || _zz_IBusCachedPlugin_jump_pcLoad_payload_2); + assign _zz_IBusCachedPlugin_jump_pcLoad_payload_4 = (_zz_IBusCachedPlugin_jump_pcLoad_payload_1[2] || _zz_IBusCachedPlugin_jump_pcLoad_payload_2); + assign IBusCachedPlugin_jump_pcLoad_payload = _zz_IBusCachedPlugin_jump_pcLoad_payload_5; + always @(*) begin + IBusCachedPlugin_fetchPc_correction = 1'b0; + if(IBusCachedPlugin_fetchPc_redo_valid) begin + IBusCachedPlugin_fetchPc_correction = 1'b1; + end + if(IBusCachedPlugin_jump_pcLoad_valid) begin + IBusCachedPlugin_fetchPc_correction = 1'b1; + end + end + + assign IBusCachedPlugin_fetchPc_output_fire = (IBusCachedPlugin_fetchPc_output_valid && IBusCachedPlugin_fetchPc_output_ready); + assign IBusCachedPlugin_fetchPc_corrected = (IBusCachedPlugin_fetchPc_correction || IBusCachedPlugin_fetchPc_correctionReg); + always @(*) begin + IBusCachedPlugin_fetchPc_pcRegPropagate = 1'b0; + if(IBusCachedPlugin_iBusRsp_stages_1_input_ready) begin + IBusCachedPlugin_fetchPc_pcRegPropagate = 1'b1; + end + end + + assign when_Fetcher_l131 = (IBusCachedPlugin_fetchPc_correction || IBusCachedPlugin_fetchPc_pcRegPropagate); + assign IBusCachedPlugin_fetchPc_output_fire_1 = (IBusCachedPlugin_fetchPc_output_valid && IBusCachedPlugin_fetchPc_output_ready); + assign when_Fetcher_l131_1 = ((! IBusCachedPlugin_fetchPc_output_valid) && IBusCachedPlugin_fetchPc_output_ready); + always @(*) begin + IBusCachedPlugin_fetchPc_pc = (IBusCachedPlugin_fetchPc_pcReg + _zz_IBusCachedPlugin_fetchPc_pc); + if(IBusCachedPlugin_fetchPc_redo_valid) begin + IBusCachedPlugin_fetchPc_pc = IBusCachedPlugin_fetchPc_redo_payload; + end + if(IBusCachedPlugin_jump_pcLoad_valid) begin + IBusCachedPlugin_fetchPc_pc = IBusCachedPlugin_jump_pcLoad_payload; + end + IBusCachedPlugin_fetchPc_pc[0] = 1'b0; + IBusCachedPlugin_fetchPc_pc[1] = 1'b0; + end + + always @(*) begin + IBusCachedPlugin_fetchPc_flushed = 1'b0; + if(IBusCachedPlugin_fetchPc_redo_valid) begin + IBusCachedPlugin_fetchPc_flushed = 1'b1; + end + if(IBusCachedPlugin_jump_pcLoad_valid) begin + IBusCachedPlugin_fetchPc_flushed = 1'b1; + end + end + + assign when_Fetcher_l158 = (IBusCachedPlugin_fetchPc_booted && ((IBusCachedPlugin_fetchPc_output_ready || IBusCachedPlugin_fetchPc_correction) || IBusCachedPlugin_fetchPc_pcRegPropagate)); + assign IBusCachedPlugin_fetchPc_output_valid = ((! IBusCachedPlugin_fetcherHalt) && IBusCachedPlugin_fetchPc_booted); + assign IBusCachedPlugin_fetchPc_output_payload = IBusCachedPlugin_fetchPc_pc; + always @(*) begin + IBusCachedPlugin_iBusRsp_redoFetch = 1'b0; + if(IBusCachedPlugin_rsp_redoFetch) begin + IBusCachedPlugin_iBusRsp_redoFetch = 1'b1; + end + end + + assign IBusCachedPlugin_iBusRsp_stages_0_input_valid = IBusCachedPlugin_fetchPc_output_valid; + assign IBusCachedPlugin_fetchPc_output_ready = IBusCachedPlugin_iBusRsp_stages_0_input_ready; + assign IBusCachedPlugin_iBusRsp_stages_0_input_payload = IBusCachedPlugin_fetchPc_output_payload; + always @(*) begin + IBusCachedPlugin_iBusRsp_stages_0_halt = 1'b0; + if(IBusCachedPlugin_cache_io_cpu_prefetch_haltIt) begin + IBusCachedPlugin_iBusRsp_stages_0_halt = 1'b1; + end + end + + assign _zz_IBusCachedPlugin_iBusRsp_stages_0_input_ready = (! IBusCachedPlugin_iBusRsp_stages_0_halt); + assign IBusCachedPlugin_iBusRsp_stages_0_input_ready = (IBusCachedPlugin_iBusRsp_stages_0_output_ready && _zz_IBusCachedPlugin_iBusRsp_stages_0_input_ready); + assign IBusCachedPlugin_iBusRsp_stages_0_output_valid = (IBusCachedPlugin_iBusRsp_stages_0_input_valid && _zz_IBusCachedPlugin_iBusRsp_stages_0_input_ready); + assign IBusCachedPlugin_iBusRsp_stages_0_output_payload = IBusCachedPlugin_iBusRsp_stages_0_input_payload; + always @(*) begin + IBusCachedPlugin_iBusRsp_stages_1_halt = 1'b0; + if(IBusCachedPlugin_mmuBus_busy) begin + IBusCachedPlugin_iBusRsp_stages_1_halt = 1'b1; + end + end + + assign _zz_IBusCachedPlugin_iBusRsp_stages_1_input_ready = (! IBusCachedPlugin_iBusRsp_stages_1_halt); + assign IBusCachedPlugin_iBusRsp_stages_1_input_ready = (IBusCachedPlugin_iBusRsp_stages_1_output_ready && _zz_IBusCachedPlugin_iBusRsp_stages_1_input_ready); + assign IBusCachedPlugin_iBusRsp_stages_1_output_valid = (IBusCachedPlugin_iBusRsp_stages_1_input_valid && _zz_IBusCachedPlugin_iBusRsp_stages_1_input_ready); + assign IBusCachedPlugin_iBusRsp_stages_1_output_payload = IBusCachedPlugin_iBusRsp_stages_1_input_payload; + always @(*) begin + IBusCachedPlugin_iBusRsp_stages_2_halt = 1'b0; + if(when_IBusCachedPlugin_l267) begin + IBusCachedPlugin_iBusRsp_stages_2_halt = 1'b1; + end + end + + assign _zz_IBusCachedPlugin_iBusRsp_stages_2_input_ready = (! IBusCachedPlugin_iBusRsp_stages_2_halt); + assign IBusCachedPlugin_iBusRsp_stages_2_input_ready = (IBusCachedPlugin_iBusRsp_stages_2_output_ready && _zz_IBusCachedPlugin_iBusRsp_stages_2_input_ready); + assign IBusCachedPlugin_iBusRsp_stages_2_output_valid = (IBusCachedPlugin_iBusRsp_stages_2_input_valid && _zz_IBusCachedPlugin_iBusRsp_stages_2_input_ready); + assign IBusCachedPlugin_iBusRsp_stages_2_output_payload = IBusCachedPlugin_iBusRsp_stages_2_input_payload; + assign IBusCachedPlugin_fetchPc_redo_valid = IBusCachedPlugin_iBusRsp_redoFetch; + assign IBusCachedPlugin_fetchPc_redo_payload = IBusCachedPlugin_iBusRsp_stages_2_input_payload; + assign IBusCachedPlugin_iBusRsp_flush = ((decode_arbitration_removeIt || (decode_arbitration_flushNext && (! decode_arbitration_isStuck))) || IBusCachedPlugin_iBusRsp_redoFetch); + assign IBusCachedPlugin_iBusRsp_stages_0_output_ready = _zz_IBusCachedPlugin_iBusRsp_stages_0_output_ready; + assign _zz_IBusCachedPlugin_iBusRsp_stages_0_output_ready = ((1'b0 && (! _zz_IBusCachedPlugin_iBusRsp_stages_0_output_ready_1)) || IBusCachedPlugin_iBusRsp_stages_1_input_ready); + assign _zz_IBusCachedPlugin_iBusRsp_stages_0_output_ready_1 = _zz_IBusCachedPlugin_iBusRsp_stages_0_output_ready_2; + assign IBusCachedPlugin_iBusRsp_stages_1_input_valid = _zz_IBusCachedPlugin_iBusRsp_stages_0_output_ready_1; + assign IBusCachedPlugin_iBusRsp_stages_1_input_payload = IBusCachedPlugin_fetchPc_pcReg; + assign IBusCachedPlugin_iBusRsp_stages_1_output_ready = ((1'b0 && (! IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_valid)) || IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_ready); + assign IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_valid = _zz_IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_valid; + assign IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_payload = _zz_IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_payload; + assign IBusCachedPlugin_iBusRsp_stages_2_input_valid = IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_valid; + assign IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_ready = IBusCachedPlugin_iBusRsp_stages_2_input_ready; + assign IBusCachedPlugin_iBusRsp_stages_2_input_payload = IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_payload; + always @(*) begin + IBusCachedPlugin_iBusRsp_readyForError = 1'b1; + if(when_Fetcher_l320) begin + IBusCachedPlugin_iBusRsp_readyForError = 1'b0; + end + end + + assign when_Fetcher_l240 = (IBusCachedPlugin_iBusRsp_stages_1_input_valid || IBusCachedPlugin_iBusRsp_stages_2_input_valid); + assign when_Fetcher_l320 = (! IBusCachedPlugin_pcValids_0); + assign when_Fetcher_l329 = (! (! IBusCachedPlugin_iBusRsp_stages_1_input_ready)); + assign when_Fetcher_l329_1 = (! (! IBusCachedPlugin_iBusRsp_stages_2_input_ready)); + assign when_Fetcher_l329_2 = (! execute_arbitration_isStuck); + assign when_Fetcher_l329_3 = (! memory_arbitration_isStuck); + assign when_Fetcher_l329_4 = (! writeBack_arbitration_isStuck); + assign IBusCachedPlugin_pcValids_0 = IBusCachedPlugin_injector_nextPcCalc_valids_1; + assign IBusCachedPlugin_pcValids_1 = IBusCachedPlugin_injector_nextPcCalc_valids_2; + assign IBusCachedPlugin_pcValids_2 = IBusCachedPlugin_injector_nextPcCalc_valids_3; + assign IBusCachedPlugin_pcValids_3 = IBusCachedPlugin_injector_nextPcCalc_valids_4; + assign IBusCachedPlugin_iBusRsp_output_ready = (! decode_arbitration_isStuck); + always @(*) begin + decode_arbitration_isValid = IBusCachedPlugin_iBusRsp_output_valid; + case(switch_Fetcher_l362) + 3'b010 : begin + decode_arbitration_isValid = 1'b1; + end + 3'b011 : begin + decode_arbitration_isValid = 1'b1; + end + default : begin + end + endcase + end + + assign _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch = _zz__zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch[11]; + always @(*) begin + _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_1[18] = _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch; + _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_1[17] = _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch; + _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_1[16] = _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch; + _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_1[15] = _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch; + _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_1[14] = _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch; + _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_1[13] = _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch; + _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_1[12] = _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch; + _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_1[11] = _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch; + _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_1[10] = _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch; + _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_1[9] = _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch; + _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_1[8] = _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch; + _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_1[7] = _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch; + _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_1[6] = _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch; + _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_1[5] = _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch; + _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_1[4] = _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch; + _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_1[3] = _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch; + _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_1[2] = _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch; + _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_1[1] = _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch; + _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_1[0] = _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch; + end + + always @(*) begin + IBusCachedPlugin_decodePrediction_cmd_hadBranch = ((decode_BRANCH_CTRL == `BranchCtrlEnum_binary_sequential_JAL) || ((decode_BRANCH_CTRL == `BranchCtrlEnum_binary_sequential_B) && _zz_IBusCachedPlugin_decodePrediction_cmd_hadBranch_2[31])); + if(_zz_6) begin + IBusCachedPlugin_decodePrediction_cmd_hadBranch = 1'b0; + end + end + + assign _zz_2 = _zz__zz_2[19]; + always @(*) begin + _zz_3[10] = _zz_2; + _zz_3[9] = _zz_2; + _zz_3[8] = _zz_2; + _zz_3[7] = _zz_2; + _zz_3[6] = _zz_2; + _zz_3[5] = _zz_2; + _zz_3[4] = _zz_2; + _zz_3[3] = _zz_2; + _zz_3[2] = _zz_2; + _zz_3[1] = _zz_2; + _zz_3[0] = _zz_2; + end + + assign _zz_4 = _zz__zz_4[11]; + always @(*) begin + _zz_5[18] = _zz_4; + _zz_5[17] = _zz_4; + _zz_5[16] = _zz_4; + _zz_5[15] = _zz_4; + _zz_5[14] = _zz_4; + _zz_5[13] = _zz_4; + _zz_5[12] = _zz_4; + _zz_5[11] = _zz_4; + _zz_5[10] = _zz_4; + _zz_5[9] = _zz_4; + _zz_5[8] = _zz_4; + _zz_5[7] = _zz_4; + _zz_5[6] = _zz_4; + _zz_5[5] = _zz_4; + _zz_5[4] = _zz_4; + _zz_5[3] = _zz_4; + _zz_5[2] = _zz_4; + _zz_5[1] = _zz_4; + _zz_5[0] = _zz_4; + end + + always @(*) begin + case(decode_BRANCH_CTRL) + `BranchCtrlEnum_binary_sequential_JAL : begin + _zz_6 = _zz__zz_6[1]; + end + default : begin + _zz_6 = _zz__zz_6_1[1]; + end + endcase + end + + assign IBusCachedPlugin_predictionJumpInterface_valid = (decode_arbitration_isValid && IBusCachedPlugin_decodePrediction_cmd_hadBranch); + assign _zz_IBusCachedPlugin_predictionJumpInterface_payload = _zz__zz_IBusCachedPlugin_predictionJumpInterface_payload[19]; + always @(*) begin + _zz_IBusCachedPlugin_predictionJumpInterface_payload_1[10] = _zz_IBusCachedPlugin_predictionJumpInterface_payload; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_1[9] = _zz_IBusCachedPlugin_predictionJumpInterface_payload; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_1[8] = _zz_IBusCachedPlugin_predictionJumpInterface_payload; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_1[7] = _zz_IBusCachedPlugin_predictionJumpInterface_payload; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_1[6] = _zz_IBusCachedPlugin_predictionJumpInterface_payload; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_1[5] = _zz_IBusCachedPlugin_predictionJumpInterface_payload; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_1[4] = _zz_IBusCachedPlugin_predictionJumpInterface_payload; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_1[3] = _zz_IBusCachedPlugin_predictionJumpInterface_payload; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_1[2] = _zz_IBusCachedPlugin_predictionJumpInterface_payload; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_1[1] = _zz_IBusCachedPlugin_predictionJumpInterface_payload; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_1[0] = _zz_IBusCachedPlugin_predictionJumpInterface_payload; + end + + assign _zz_IBusCachedPlugin_predictionJumpInterface_payload_2 = _zz__zz_IBusCachedPlugin_predictionJumpInterface_payload_2[11]; + always @(*) begin + _zz_IBusCachedPlugin_predictionJumpInterface_payload_3[18] = _zz_IBusCachedPlugin_predictionJumpInterface_payload_2; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_3[17] = _zz_IBusCachedPlugin_predictionJumpInterface_payload_2; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_3[16] = _zz_IBusCachedPlugin_predictionJumpInterface_payload_2; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_3[15] = _zz_IBusCachedPlugin_predictionJumpInterface_payload_2; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_3[14] = _zz_IBusCachedPlugin_predictionJumpInterface_payload_2; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_3[13] = _zz_IBusCachedPlugin_predictionJumpInterface_payload_2; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_3[12] = _zz_IBusCachedPlugin_predictionJumpInterface_payload_2; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_3[11] = _zz_IBusCachedPlugin_predictionJumpInterface_payload_2; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_3[10] = _zz_IBusCachedPlugin_predictionJumpInterface_payload_2; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_3[9] = _zz_IBusCachedPlugin_predictionJumpInterface_payload_2; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_3[8] = _zz_IBusCachedPlugin_predictionJumpInterface_payload_2; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_3[7] = _zz_IBusCachedPlugin_predictionJumpInterface_payload_2; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_3[6] = _zz_IBusCachedPlugin_predictionJumpInterface_payload_2; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_3[5] = _zz_IBusCachedPlugin_predictionJumpInterface_payload_2; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_3[4] = _zz_IBusCachedPlugin_predictionJumpInterface_payload_2; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_3[3] = _zz_IBusCachedPlugin_predictionJumpInterface_payload_2; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_3[2] = _zz_IBusCachedPlugin_predictionJumpInterface_payload_2; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_3[1] = _zz_IBusCachedPlugin_predictionJumpInterface_payload_2; + _zz_IBusCachedPlugin_predictionJumpInterface_payload_3[0] = _zz_IBusCachedPlugin_predictionJumpInterface_payload_2; + end + + assign IBusCachedPlugin_predictionJumpInterface_payload = (decode_PC + ((decode_BRANCH_CTRL == `BranchCtrlEnum_binary_sequential_JAL) ? {{_zz_IBusCachedPlugin_predictionJumpInterface_payload_1,{{{_zz_IBusCachedPlugin_predictionJumpInterface_payload_4,decode_INSTRUCTION[19 : 12]},decode_INSTRUCTION[20]},decode_INSTRUCTION[30 : 21]}},1'b0} : {{_zz_IBusCachedPlugin_predictionJumpInterface_payload_3,{{{_zz_IBusCachedPlugin_predictionJumpInterface_payload_5,_zz_IBusCachedPlugin_predictionJumpInterface_payload_6},decode_INSTRUCTION[30 : 25]},decode_INSTRUCTION[11 : 8]}},1'b0})); + assign iBus_cmd_valid = IBusCachedPlugin_cache_io_mem_cmd_valid; + always @(*) begin + iBus_cmd_payload_address = IBusCachedPlugin_cache_io_mem_cmd_payload_address; + iBus_cmd_payload_address = IBusCachedPlugin_cache_io_mem_cmd_payload_address; + end + + assign iBus_cmd_payload_size = IBusCachedPlugin_cache_io_mem_cmd_payload_size; + assign IBusCachedPlugin_s0_tightlyCoupledHit = 1'b0; + assign IBusCachedPlugin_cache_io_cpu_prefetch_isValid = (IBusCachedPlugin_iBusRsp_stages_0_input_valid && (! IBusCachedPlugin_s0_tightlyCoupledHit)); + assign IBusCachedPlugin_cache_io_cpu_fetch_isValid = (IBusCachedPlugin_iBusRsp_stages_1_input_valid && (! IBusCachedPlugin_s1_tightlyCoupledHit)); + assign IBusCachedPlugin_cache_io_cpu_fetch_isStuck = (! IBusCachedPlugin_iBusRsp_stages_1_input_ready); + assign IBusCachedPlugin_mmuBus_cmd_0_isValid = IBusCachedPlugin_cache_io_cpu_fetch_isValid; + assign IBusCachedPlugin_mmuBus_cmd_0_isStuck = (! IBusCachedPlugin_iBusRsp_stages_1_input_ready); + assign IBusCachedPlugin_mmuBus_cmd_0_virtualAddress = IBusCachedPlugin_iBusRsp_stages_1_input_payload; + assign IBusCachedPlugin_mmuBus_cmd_0_bypassTranslation = 1'b0; + assign IBusCachedPlugin_mmuBus_end = (IBusCachedPlugin_iBusRsp_stages_1_input_ready || IBusCachedPlugin_externalFlush); + assign IBusCachedPlugin_cache_io_cpu_decode_isValid = (IBusCachedPlugin_iBusRsp_stages_2_input_valid && (! IBusCachedPlugin_s2_tightlyCoupledHit)); + assign IBusCachedPlugin_cache_io_cpu_decode_isStuck = (! IBusCachedPlugin_iBusRsp_stages_2_input_ready); + assign IBusCachedPlugin_cache_io_cpu_decode_isUser = (CsrPlugin_privilege == 2'b00); + assign IBusCachedPlugin_rsp_iBusRspOutputHalt = 1'b0; + assign IBusCachedPlugin_rsp_issueDetected = 1'b0; + always @(*) begin + IBusCachedPlugin_rsp_redoFetch = 1'b0; + if(when_IBusCachedPlugin_l239) begin + IBusCachedPlugin_rsp_redoFetch = 1'b1; + end + if(when_IBusCachedPlugin_l250) begin + IBusCachedPlugin_rsp_redoFetch = 1'b1; + end + end + + always @(*) begin + IBusCachedPlugin_cache_io_cpu_fill_valid = (IBusCachedPlugin_rsp_redoFetch && (! IBusCachedPlugin_cache_io_cpu_decode_mmuRefilling)); + if(when_IBusCachedPlugin_l250) begin + IBusCachedPlugin_cache_io_cpu_fill_valid = 1'b1; + end + end + + always @(*) begin + IBusCachedPlugin_decodeExceptionPort_valid = 1'b0; + if(when_IBusCachedPlugin_l244) begin + IBusCachedPlugin_decodeExceptionPort_valid = IBusCachedPlugin_iBusRsp_readyForError; + end + if(when_IBusCachedPlugin_l256) begin + IBusCachedPlugin_decodeExceptionPort_valid = IBusCachedPlugin_iBusRsp_readyForError; + end + end + + always @(*) begin + IBusCachedPlugin_decodeExceptionPort_payload_code = 4'bxxxx; + if(when_IBusCachedPlugin_l244) begin + IBusCachedPlugin_decodeExceptionPort_payload_code = 4'b1100; + end + if(when_IBusCachedPlugin_l256) begin + IBusCachedPlugin_decodeExceptionPort_payload_code = 4'b0001; + end + end + + assign IBusCachedPlugin_decodeExceptionPort_payload_badAddr = {IBusCachedPlugin_iBusRsp_stages_2_input_payload[31 : 2],2'b00}; + assign when_IBusCachedPlugin_l239 = ((IBusCachedPlugin_cache_io_cpu_decode_isValid && IBusCachedPlugin_cache_io_cpu_decode_mmuRefilling) && (! IBusCachedPlugin_rsp_issueDetected)); + assign when_IBusCachedPlugin_l244 = ((IBusCachedPlugin_cache_io_cpu_decode_isValid && IBusCachedPlugin_cache_io_cpu_decode_mmuException) && (! IBusCachedPlugin_rsp_issueDetected_1)); + assign when_IBusCachedPlugin_l250 = ((IBusCachedPlugin_cache_io_cpu_decode_isValid && IBusCachedPlugin_cache_io_cpu_decode_cacheMiss) && (! IBusCachedPlugin_rsp_issueDetected_2)); + assign when_IBusCachedPlugin_l256 = ((IBusCachedPlugin_cache_io_cpu_decode_isValid && IBusCachedPlugin_cache_io_cpu_decode_error) && (! IBusCachedPlugin_rsp_issueDetected_3)); + assign when_IBusCachedPlugin_l267 = (IBusCachedPlugin_rsp_issueDetected_4 || IBusCachedPlugin_rsp_iBusRspOutputHalt); + assign IBusCachedPlugin_iBusRsp_output_valid = IBusCachedPlugin_iBusRsp_stages_2_output_valid; + assign IBusCachedPlugin_iBusRsp_stages_2_output_ready = IBusCachedPlugin_iBusRsp_output_ready; + assign IBusCachedPlugin_iBusRsp_output_payload_rsp_inst = IBusCachedPlugin_cache_io_cpu_decode_data; + assign IBusCachedPlugin_iBusRsp_output_payload_pc = IBusCachedPlugin_iBusRsp_stages_2_output_payload; + assign IBusCachedPlugin_cache_io_flush = (decode_arbitration_isValid && decode_FLUSH_ALL); + assign dataCache_1_io_mem_cmd_ready = (! dataCache_1_io_mem_cmd_rValid); + assign dataCache_1_io_mem_cmd_s2mPipe_valid = (dataCache_1_io_mem_cmd_valid || dataCache_1_io_mem_cmd_rValid); + assign dataCache_1_io_mem_cmd_s2mPipe_payload_wr = (dataCache_1_io_mem_cmd_rValid ? dataCache_1_io_mem_cmd_rData_wr : dataCache_1_io_mem_cmd_payload_wr); + assign dataCache_1_io_mem_cmd_s2mPipe_payload_uncached = (dataCache_1_io_mem_cmd_rValid ? dataCache_1_io_mem_cmd_rData_uncached : dataCache_1_io_mem_cmd_payload_uncached); + assign dataCache_1_io_mem_cmd_s2mPipe_payload_address = (dataCache_1_io_mem_cmd_rValid ? dataCache_1_io_mem_cmd_rData_address : dataCache_1_io_mem_cmd_payload_address); + assign dataCache_1_io_mem_cmd_s2mPipe_payload_data = (dataCache_1_io_mem_cmd_rValid ? dataCache_1_io_mem_cmd_rData_data : dataCache_1_io_mem_cmd_payload_data); + assign dataCache_1_io_mem_cmd_s2mPipe_payload_mask = (dataCache_1_io_mem_cmd_rValid ? dataCache_1_io_mem_cmd_rData_mask : dataCache_1_io_mem_cmd_payload_mask); + assign dataCache_1_io_mem_cmd_s2mPipe_payload_size = (dataCache_1_io_mem_cmd_rValid ? dataCache_1_io_mem_cmd_rData_size : dataCache_1_io_mem_cmd_payload_size); + assign dataCache_1_io_mem_cmd_s2mPipe_payload_last = (dataCache_1_io_mem_cmd_rValid ? dataCache_1_io_mem_cmd_rData_last : dataCache_1_io_mem_cmd_payload_last); + always @(*) begin + dataCache_1_io_mem_cmd_s2mPipe_ready = dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_ready; + if(when_Stream_l342) begin + dataCache_1_io_mem_cmd_s2mPipe_ready = 1'b1; + end + end + + assign when_Stream_l342 = (! dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_valid); + assign dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_valid = dataCache_1_io_mem_cmd_s2mPipe_rValid; + assign dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_payload_wr = dataCache_1_io_mem_cmd_s2mPipe_rData_wr; + assign dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_payload_uncached = dataCache_1_io_mem_cmd_s2mPipe_rData_uncached; + assign dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_payload_address = dataCache_1_io_mem_cmd_s2mPipe_rData_address; + assign dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_payload_data = dataCache_1_io_mem_cmd_s2mPipe_rData_data; + assign dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_payload_mask = dataCache_1_io_mem_cmd_s2mPipe_rData_mask; + assign dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_payload_size = dataCache_1_io_mem_cmd_s2mPipe_rData_size; + assign dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_payload_last = dataCache_1_io_mem_cmd_s2mPipe_rData_last; + assign dBus_cmd_valid = dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_valid; + assign dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_ready = dBus_cmd_ready; + assign dBus_cmd_payload_wr = dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_payload_wr; + assign dBus_cmd_payload_uncached = dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_payload_uncached; + assign dBus_cmd_payload_address = dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_payload_address; + assign dBus_cmd_payload_data = dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_payload_data; + assign dBus_cmd_payload_mask = dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_payload_mask; + assign dBus_cmd_payload_size = dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_payload_size; + assign dBus_cmd_payload_last = dataCache_1_io_mem_cmd_s2mPipe_m2sPipe_payload_last; + assign when_DBusCachedPlugin_l303 = ((DBusCachedPlugin_mmuBus_busy && decode_arbitration_isValid) && decode_MEMORY_ENABLE); + assign execute_DBusCachedPlugin_size = execute_INSTRUCTION[13 : 12]; + assign dataCache_1_io_cpu_execute_isValid = (execute_arbitration_isValid && execute_MEMORY_ENABLE); + assign dataCache_1_io_cpu_execute_address = execute_SRC_ADD; + always @(*) begin + case(execute_DBusCachedPlugin_size) + 2'b00 : begin + _zz_execute_MEMORY_STORE_DATA_RF = {{{execute_RS2[7 : 0],execute_RS2[7 : 0]},execute_RS2[7 : 0]},execute_RS2[7 : 0]}; + end + 2'b01 : begin + _zz_execute_MEMORY_STORE_DATA_RF = {execute_RS2[15 : 0],execute_RS2[15 : 0]}; + end + default : begin + _zz_execute_MEMORY_STORE_DATA_RF = execute_RS2[31 : 0]; + end + endcase + end + + assign dataCache_1_io_cpu_flush_valid = (execute_arbitration_isValid && execute_MEMORY_MANAGMENT); + assign dataCache_1_io_cpu_flush_isStall = (dataCache_1_io_cpu_flush_valid && (! dataCache_1_io_cpu_flush_ready)); + assign when_DBusCachedPlugin_l343 = (dataCache_1_io_cpu_flush_isStall || dataCache_1_io_cpu_execute_haltIt); + assign when_DBusCachedPlugin_l359 = (dataCache_1_io_cpu_execute_refilling && execute_arbitration_isValid); + assign dataCache_1_io_cpu_memory_isValid = (memory_arbitration_isValid && memory_MEMORY_ENABLE); + assign dataCache_1_io_cpu_memory_address = memory_REGFILE_WRITE_DATA; + assign DBusCachedPlugin_mmuBus_cmd_0_isValid = dataCache_1_io_cpu_memory_isValid; + assign DBusCachedPlugin_mmuBus_cmd_0_isStuck = memory_arbitration_isStuck; + assign DBusCachedPlugin_mmuBus_cmd_0_virtualAddress = dataCache_1_io_cpu_memory_address; + assign DBusCachedPlugin_mmuBus_cmd_0_bypassTranslation = 1'b0; + assign DBusCachedPlugin_mmuBus_end = ((! memory_arbitration_isStuck) || memory_arbitration_removeIt); + always @(*) begin + dataCache_1_io_cpu_memory_mmuRsp_isIoAccess = DBusCachedPlugin_mmuBus_rsp_isIoAccess; + if(when_DBusCachedPlugin_l386) begin + dataCache_1_io_cpu_memory_mmuRsp_isIoAccess = 1'b1; + end + end + + assign when_DBusCachedPlugin_l386 = (_zz_when_DBusCachedPlugin_l386 && (! dataCache_1_io_cpu_memory_isWrite)); + always @(*) begin + dataCache_1_io_cpu_writeBack_isValid = (writeBack_arbitration_isValid && writeBack_MEMORY_ENABLE); + if(writeBack_arbitration_haltByOther) begin + dataCache_1_io_cpu_writeBack_isValid = 1'b0; + end + end + + assign dataCache_1_io_cpu_writeBack_isUser = (CsrPlugin_privilege == 2'b00); + assign dataCache_1_io_cpu_writeBack_address = writeBack_REGFILE_WRITE_DATA; + assign dataCache_1_io_cpu_writeBack_storeData[31 : 0] = writeBack_MEMORY_STORE_DATA_RF; + always @(*) begin + DBusCachedPlugin_redoBranch_valid = 1'b0; + if(when_DBusCachedPlugin_l438) begin + if(dataCache_1_io_cpu_redo) begin + DBusCachedPlugin_redoBranch_valid = 1'b1; + end + end + end + + assign DBusCachedPlugin_redoBranch_payload = writeBack_PC; + always @(*) begin + DBusCachedPlugin_exceptionBus_valid = 1'b0; + if(when_DBusCachedPlugin_l438) begin + if(dataCache_1_io_cpu_writeBack_accessError) begin + DBusCachedPlugin_exceptionBus_valid = 1'b1; + end + if(dataCache_1_io_cpu_writeBack_mmuException) begin + DBusCachedPlugin_exceptionBus_valid = 1'b1; + end + if(dataCache_1_io_cpu_writeBack_unalignedAccess) begin + DBusCachedPlugin_exceptionBus_valid = 1'b1; + end + if(dataCache_1_io_cpu_redo) begin + DBusCachedPlugin_exceptionBus_valid = 1'b0; + end + end + end + + assign DBusCachedPlugin_exceptionBus_payload_badAddr = writeBack_REGFILE_WRITE_DATA; + always @(*) begin + DBusCachedPlugin_exceptionBus_payload_code = 4'bxxxx; + if(when_DBusCachedPlugin_l438) begin + if(dataCache_1_io_cpu_writeBack_accessError) begin + DBusCachedPlugin_exceptionBus_payload_code = {1'd0, _zz_DBusCachedPlugin_exceptionBus_payload_code}; + end + if(dataCache_1_io_cpu_writeBack_mmuException) begin + DBusCachedPlugin_exceptionBus_payload_code = (writeBack_MEMORY_WR ? 4'b1111 : 4'b1101); + end + if(dataCache_1_io_cpu_writeBack_unalignedAccess) begin + DBusCachedPlugin_exceptionBus_payload_code = {1'd0, _zz_DBusCachedPlugin_exceptionBus_payload_code_1}; + end + end + end + + assign when_DBusCachedPlugin_l438 = (writeBack_arbitration_isValid && writeBack_MEMORY_ENABLE); + assign when_DBusCachedPlugin_l458 = (dataCache_1_io_cpu_writeBack_isValid && dataCache_1_io_cpu_writeBack_haltIt); + assign writeBack_DBusCachedPlugin_rspSplits_0 = dataCache_1_io_cpu_writeBack_data[7 : 0]; + assign writeBack_DBusCachedPlugin_rspSplits_1 = dataCache_1_io_cpu_writeBack_data[15 : 8]; + assign writeBack_DBusCachedPlugin_rspSplits_2 = dataCache_1_io_cpu_writeBack_data[23 : 16]; + assign writeBack_DBusCachedPlugin_rspSplits_3 = dataCache_1_io_cpu_writeBack_data[31 : 24]; + always @(*) begin + writeBack_DBusCachedPlugin_rspShifted[7 : 0] = _zz_writeBack_DBusCachedPlugin_rspShifted; + writeBack_DBusCachedPlugin_rspShifted[15 : 8] = _zz_writeBack_DBusCachedPlugin_rspShifted_2; + writeBack_DBusCachedPlugin_rspShifted[23 : 16] = writeBack_DBusCachedPlugin_rspSplits_2; + writeBack_DBusCachedPlugin_rspShifted[31 : 24] = writeBack_DBusCachedPlugin_rspSplits_3; + end + + assign writeBack_DBusCachedPlugin_rspRf = writeBack_DBusCachedPlugin_rspShifted[31 : 0]; + assign switch_Misc_l200 = writeBack_INSTRUCTION[13 : 12]; + assign _zz_writeBack_DBusCachedPlugin_rspFormated = (writeBack_DBusCachedPlugin_rspRf[7] && (! writeBack_INSTRUCTION[14])); + always @(*) begin + _zz_writeBack_DBusCachedPlugin_rspFormated_1[31] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[30] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[29] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[28] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[27] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[26] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[25] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[24] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[23] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[22] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[21] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[20] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[19] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[18] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[17] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[16] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[15] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[14] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[13] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[12] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[11] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[10] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[9] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[8] = _zz_writeBack_DBusCachedPlugin_rspFormated; + _zz_writeBack_DBusCachedPlugin_rspFormated_1[7 : 0] = writeBack_DBusCachedPlugin_rspRf[7 : 0]; + end + + assign _zz_writeBack_DBusCachedPlugin_rspFormated_2 = (writeBack_DBusCachedPlugin_rspRf[15] && (! writeBack_INSTRUCTION[14])); + always @(*) begin + _zz_writeBack_DBusCachedPlugin_rspFormated_3[31] = _zz_writeBack_DBusCachedPlugin_rspFormated_2; + _zz_writeBack_DBusCachedPlugin_rspFormated_3[30] = _zz_writeBack_DBusCachedPlugin_rspFormated_2; + _zz_writeBack_DBusCachedPlugin_rspFormated_3[29] = _zz_writeBack_DBusCachedPlugin_rspFormated_2; + _zz_writeBack_DBusCachedPlugin_rspFormated_3[28] = _zz_writeBack_DBusCachedPlugin_rspFormated_2; + _zz_writeBack_DBusCachedPlugin_rspFormated_3[27] = _zz_writeBack_DBusCachedPlugin_rspFormated_2; + _zz_writeBack_DBusCachedPlugin_rspFormated_3[26] = _zz_writeBack_DBusCachedPlugin_rspFormated_2; + _zz_writeBack_DBusCachedPlugin_rspFormated_3[25] = _zz_writeBack_DBusCachedPlugin_rspFormated_2; + _zz_writeBack_DBusCachedPlugin_rspFormated_3[24] = _zz_writeBack_DBusCachedPlugin_rspFormated_2; + _zz_writeBack_DBusCachedPlugin_rspFormated_3[23] = _zz_writeBack_DBusCachedPlugin_rspFormated_2; + _zz_writeBack_DBusCachedPlugin_rspFormated_3[22] = _zz_writeBack_DBusCachedPlugin_rspFormated_2; + _zz_writeBack_DBusCachedPlugin_rspFormated_3[21] = _zz_writeBack_DBusCachedPlugin_rspFormated_2; + _zz_writeBack_DBusCachedPlugin_rspFormated_3[20] = _zz_writeBack_DBusCachedPlugin_rspFormated_2; + _zz_writeBack_DBusCachedPlugin_rspFormated_3[19] = _zz_writeBack_DBusCachedPlugin_rspFormated_2; + _zz_writeBack_DBusCachedPlugin_rspFormated_3[18] = _zz_writeBack_DBusCachedPlugin_rspFormated_2; + _zz_writeBack_DBusCachedPlugin_rspFormated_3[17] = _zz_writeBack_DBusCachedPlugin_rspFormated_2; + _zz_writeBack_DBusCachedPlugin_rspFormated_3[16] = _zz_writeBack_DBusCachedPlugin_rspFormated_2; + _zz_writeBack_DBusCachedPlugin_rspFormated_3[15 : 0] = writeBack_DBusCachedPlugin_rspRf[15 : 0]; + end + + always @(*) begin + case(switch_Misc_l200) + 2'b00 : begin + writeBack_DBusCachedPlugin_rspFormated = _zz_writeBack_DBusCachedPlugin_rspFormated_1; + end + 2'b01 : begin + writeBack_DBusCachedPlugin_rspFormated = _zz_writeBack_DBusCachedPlugin_rspFormated_3; + end + default : begin + writeBack_DBusCachedPlugin_rspFormated = writeBack_DBusCachedPlugin_rspRf; + end + endcase + end + + assign when_DBusCachedPlugin_l484 = (writeBack_arbitration_isValid && writeBack_MEMORY_ENABLE); + assign IBusCachedPlugin_mmuBus_rsp_physicalAddress = IBusCachedPlugin_mmuBus_cmd_0_virtualAddress; + assign IBusCachedPlugin_mmuBus_rsp_allowRead = 1'b1; + assign IBusCachedPlugin_mmuBus_rsp_allowWrite = 1'b1; + assign IBusCachedPlugin_mmuBus_rsp_allowExecute = 1'b1; + assign IBusCachedPlugin_mmuBus_rsp_isIoAccess = IBusCachedPlugin_mmuBus_rsp_physicalAddress[31]; + assign IBusCachedPlugin_mmuBus_rsp_isPaging = 1'b0; + assign IBusCachedPlugin_mmuBus_rsp_exception = 1'b0; + assign IBusCachedPlugin_mmuBus_rsp_refilling = 1'b0; + assign IBusCachedPlugin_mmuBus_busy = 1'b0; + assign DBusCachedPlugin_mmuBus_rsp_physicalAddress = DBusCachedPlugin_mmuBus_cmd_0_virtualAddress; + assign DBusCachedPlugin_mmuBus_rsp_allowRead = 1'b1; + assign DBusCachedPlugin_mmuBus_rsp_allowWrite = 1'b1; + assign DBusCachedPlugin_mmuBus_rsp_allowExecute = 1'b1; + assign DBusCachedPlugin_mmuBus_rsp_isIoAccess = DBusCachedPlugin_mmuBus_rsp_physicalAddress[31]; + assign DBusCachedPlugin_mmuBus_rsp_isPaging = 1'b0; + assign DBusCachedPlugin_mmuBus_rsp_exception = 1'b0; + assign DBusCachedPlugin_mmuBus_rsp_refilling = 1'b0; + assign DBusCachedPlugin_mmuBus_busy = 1'b0; + assign _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_3 = ((decode_INSTRUCTION & 32'h00004050) == 32'h00004050); + assign _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_4 = ((decode_INSTRUCTION & 32'h00000004) == 32'h00000004); + assign _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_5 = ((decode_INSTRUCTION & 32'h00000048) == 32'h00000048); + assign _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_6 = ((decode_INSTRUCTION & 32'h0000000c) == 32'h00000008); + assign _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_7 = ((decode_INSTRUCTION & 32'h00001000) == 32'h0); + assign _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2 = {1'b0,{(_zz_decode_CfuPlugin_CFU_INPUT_2_KIND_6 != 1'b0),{((_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2 == _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_1) != 1'b0),{(_zz_decode_CfuPlugin_CFU_INPUT_2_KIND_7 != 1'b0),{(_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_2 != _zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_3),{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_4,{_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_5,_zz__zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2_7}}}}}}}; + assign _zz_decode_SRC1_CTRL_2 = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[2 : 1]; + assign _zz_decode_SRC1_CTRL_1 = _zz_decode_SRC1_CTRL_2; + assign _zz_decode_ALU_CTRL_2 = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[7 : 6]; + assign _zz_decode_ALU_CTRL_1 = _zz_decode_ALU_CTRL_2; + assign _zz_decode_SRC2_CTRL_2 = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[9 : 8]; + assign _zz_decode_SRC2_CTRL_1 = _zz_decode_SRC2_CTRL_2; + assign _zz_decode_ALU_BITWISE_CTRL_2 = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[19 : 18]; + assign _zz_decode_ALU_BITWISE_CTRL_1 = _zz_decode_ALU_BITWISE_CTRL_2; + assign _zz_decode_SHIFT_CTRL_2 = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[22 : 21]; + assign _zz_decode_SHIFT_CTRL_1 = _zz_decode_SHIFT_CTRL_2; + assign _zz_decode_BRANCH_CTRL_2 = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[24 : 23]; + assign _zz_decode_BRANCH_CTRL = _zz_decode_BRANCH_CTRL_2; + assign _zz_decode_ENV_CTRL_2 = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[27 : 26]; + assign _zz_decode_ENV_CTRL_1 = _zz_decode_ENV_CTRL_2; + assign _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_8 = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_2[34 : 34]; + assign _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_1 = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_8; + assign decodeExceptionPort_valid = (decode_arbitration_isValid && (! decode_LEGAL_INSTRUCTION)); + assign decodeExceptionPort_payload_code = 4'b0010; + assign decodeExceptionPort_payload_badAddr = decode_INSTRUCTION; + assign when_RegFilePlugin_l63 = (decode_INSTRUCTION[11 : 7] == 5'h0); + assign decode_RegFilePlugin_regFileReadAddress1 = decode_INSTRUCTION_ANTICIPATED[19 : 15]; + assign decode_RegFilePlugin_regFileReadAddress2 = decode_INSTRUCTION_ANTICIPATED[24 : 20]; + assign decode_RegFilePlugin_rs1Data = _zz_RegFilePlugin_regFile_port0; + assign decode_RegFilePlugin_rs2Data = _zz_RegFilePlugin_regFile_port1; + always @(*) begin + lastStageRegFileWrite_valid = (_zz_lastStageRegFileWrite_valid && writeBack_arbitration_isFiring); + if(_zz_7) begin + lastStageRegFileWrite_valid = 1'b1; + end + end + + always @(*) begin + lastStageRegFileWrite_payload_address = _zz_lastStageRegFileWrite_payload_address[11 : 7]; + if(_zz_7) begin + lastStageRegFileWrite_payload_address = 5'h0; + end + end + + always @(*) begin + lastStageRegFileWrite_payload_data = _zz_decode_RS2_2; + if(_zz_7) begin + lastStageRegFileWrite_payload_data = 32'h0; + end + end + + always @(*) begin + case(execute_ALU_BITWISE_CTRL) + `AluBitwiseCtrlEnum_binary_sequential_AND_1 : begin + execute_IntAluPlugin_bitwise = (execute_SRC1 & execute_SRC2); + end + `AluBitwiseCtrlEnum_binary_sequential_OR_1 : begin + execute_IntAluPlugin_bitwise = (execute_SRC1 | execute_SRC2); + end + default : begin + execute_IntAluPlugin_bitwise = (execute_SRC1 ^ execute_SRC2); + end + endcase + end + + always @(*) begin + case(execute_ALU_CTRL) + `AluCtrlEnum_binary_sequential_BITWISE : begin + _zz_execute_REGFILE_WRITE_DATA = execute_IntAluPlugin_bitwise; + end + `AluCtrlEnum_binary_sequential_SLT_SLTU : begin + _zz_execute_REGFILE_WRITE_DATA = {31'd0, _zz__zz_execute_REGFILE_WRITE_DATA}; + end + default : begin + _zz_execute_REGFILE_WRITE_DATA = execute_SRC_ADD_SUB; + end + endcase + end + + always @(*) begin + case(execute_SRC1_CTRL) + `Src1CtrlEnum_binary_sequential_RS : begin + _zz_execute_SRC1 = execute_RS1; + end + `Src1CtrlEnum_binary_sequential_PC_INCREMENT : begin + _zz_execute_SRC1 = {29'd0, _zz__zz_execute_SRC1}; + end + `Src1CtrlEnum_binary_sequential_IMU : begin + _zz_execute_SRC1 = {execute_INSTRUCTION[31 : 12],12'h0}; + end + default : begin + _zz_execute_SRC1 = {27'd0, _zz__zz_execute_SRC1_1}; + end + endcase + end + + assign _zz_execute_SRC2_1 = execute_INSTRUCTION[31]; + always @(*) begin + _zz_execute_SRC2_2[19] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[18] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[17] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[16] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[15] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[14] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[13] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[12] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[11] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[10] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[9] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[8] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[7] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[6] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[5] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[4] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[3] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[2] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[1] = _zz_execute_SRC2_1; + _zz_execute_SRC2_2[0] = _zz_execute_SRC2_1; + end + + assign _zz_execute_SRC2_3 = _zz__zz_execute_SRC2_3[11]; + always @(*) begin + _zz_execute_SRC2_4[19] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[18] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[17] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[16] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[15] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[14] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[13] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[12] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[11] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[10] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[9] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[8] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[7] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[6] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[5] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[4] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[3] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[2] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[1] = _zz_execute_SRC2_3; + _zz_execute_SRC2_4[0] = _zz_execute_SRC2_3; + end + + always @(*) begin + case(execute_SRC2_CTRL) + `Src2CtrlEnum_binary_sequential_RS : begin + _zz_execute_SRC2_5 = execute_RS2; + end + `Src2CtrlEnum_binary_sequential_IMI : begin + _zz_execute_SRC2_5 = {_zz_execute_SRC2_2,execute_INSTRUCTION[31 : 20]}; + end + `Src2CtrlEnum_binary_sequential_IMS : begin + _zz_execute_SRC2_5 = {_zz_execute_SRC2_4,{execute_INSTRUCTION[31 : 25],execute_INSTRUCTION[11 : 7]}}; + end + default : begin + _zz_execute_SRC2_5 = _zz_execute_SRC2; + end + endcase + end + + always @(*) begin + execute_SrcPlugin_addSub = _zz_execute_SrcPlugin_addSub; + if(execute_SRC2_FORCE_ZERO) begin + execute_SrcPlugin_addSub = execute_SRC1; + end + end + + assign execute_SrcPlugin_less = ((execute_SRC1[31] == execute_SRC2[31]) ? execute_SrcPlugin_addSub[31] : (execute_SRC_LESS_UNSIGNED ? execute_SRC2[31] : execute_SRC1[31])); + assign execute_FullBarrelShifterPlugin_amplitude = execute_SRC2[4 : 0]; + always @(*) begin + _zz_execute_FullBarrelShifterPlugin_reversed[0] = execute_SRC1[31]; + _zz_execute_FullBarrelShifterPlugin_reversed[1] = execute_SRC1[30]; + _zz_execute_FullBarrelShifterPlugin_reversed[2] = execute_SRC1[29]; + _zz_execute_FullBarrelShifterPlugin_reversed[3] = execute_SRC1[28]; + _zz_execute_FullBarrelShifterPlugin_reversed[4] = execute_SRC1[27]; + _zz_execute_FullBarrelShifterPlugin_reversed[5] = execute_SRC1[26]; + _zz_execute_FullBarrelShifterPlugin_reversed[6] = execute_SRC1[25]; + _zz_execute_FullBarrelShifterPlugin_reversed[7] = execute_SRC1[24]; + _zz_execute_FullBarrelShifterPlugin_reversed[8] = execute_SRC1[23]; + _zz_execute_FullBarrelShifterPlugin_reversed[9] = execute_SRC1[22]; + _zz_execute_FullBarrelShifterPlugin_reversed[10] = execute_SRC1[21]; + _zz_execute_FullBarrelShifterPlugin_reversed[11] = execute_SRC1[20]; + _zz_execute_FullBarrelShifterPlugin_reversed[12] = execute_SRC1[19]; + _zz_execute_FullBarrelShifterPlugin_reversed[13] = execute_SRC1[18]; + _zz_execute_FullBarrelShifterPlugin_reversed[14] = execute_SRC1[17]; + _zz_execute_FullBarrelShifterPlugin_reversed[15] = execute_SRC1[16]; + _zz_execute_FullBarrelShifterPlugin_reversed[16] = execute_SRC1[15]; + _zz_execute_FullBarrelShifterPlugin_reversed[17] = execute_SRC1[14]; + _zz_execute_FullBarrelShifterPlugin_reversed[18] = execute_SRC1[13]; + _zz_execute_FullBarrelShifterPlugin_reversed[19] = execute_SRC1[12]; + _zz_execute_FullBarrelShifterPlugin_reversed[20] = execute_SRC1[11]; + _zz_execute_FullBarrelShifterPlugin_reversed[21] = execute_SRC1[10]; + _zz_execute_FullBarrelShifterPlugin_reversed[22] = execute_SRC1[9]; + _zz_execute_FullBarrelShifterPlugin_reversed[23] = execute_SRC1[8]; + _zz_execute_FullBarrelShifterPlugin_reversed[24] = execute_SRC1[7]; + _zz_execute_FullBarrelShifterPlugin_reversed[25] = execute_SRC1[6]; + _zz_execute_FullBarrelShifterPlugin_reversed[26] = execute_SRC1[5]; + _zz_execute_FullBarrelShifterPlugin_reversed[27] = execute_SRC1[4]; + _zz_execute_FullBarrelShifterPlugin_reversed[28] = execute_SRC1[3]; + _zz_execute_FullBarrelShifterPlugin_reversed[29] = execute_SRC1[2]; + _zz_execute_FullBarrelShifterPlugin_reversed[30] = execute_SRC1[1]; + _zz_execute_FullBarrelShifterPlugin_reversed[31] = execute_SRC1[0]; + end + + assign execute_FullBarrelShifterPlugin_reversed = ((execute_SHIFT_CTRL == `ShiftCtrlEnum_binary_sequential_SLL_1) ? _zz_execute_FullBarrelShifterPlugin_reversed : execute_SRC1); + always @(*) begin + _zz_decode_RS2_3[0] = memory_SHIFT_RIGHT[31]; + _zz_decode_RS2_3[1] = memory_SHIFT_RIGHT[30]; + _zz_decode_RS2_3[2] = memory_SHIFT_RIGHT[29]; + _zz_decode_RS2_3[3] = memory_SHIFT_RIGHT[28]; + _zz_decode_RS2_3[4] = memory_SHIFT_RIGHT[27]; + _zz_decode_RS2_3[5] = memory_SHIFT_RIGHT[26]; + _zz_decode_RS2_3[6] = memory_SHIFT_RIGHT[25]; + _zz_decode_RS2_3[7] = memory_SHIFT_RIGHT[24]; + _zz_decode_RS2_3[8] = memory_SHIFT_RIGHT[23]; + _zz_decode_RS2_3[9] = memory_SHIFT_RIGHT[22]; + _zz_decode_RS2_3[10] = memory_SHIFT_RIGHT[21]; + _zz_decode_RS2_3[11] = memory_SHIFT_RIGHT[20]; + _zz_decode_RS2_3[12] = memory_SHIFT_RIGHT[19]; + _zz_decode_RS2_3[13] = memory_SHIFT_RIGHT[18]; + _zz_decode_RS2_3[14] = memory_SHIFT_RIGHT[17]; + _zz_decode_RS2_3[15] = memory_SHIFT_RIGHT[16]; + _zz_decode_RS2_3[16] = memory_SHIFT_RIGHT[15]; + _zz_decode_RS2_3[17] = memory_SHIFT_RIGHT[14]; + _zz_decode_RS2_3[18] = memory_SHIFT_RIGHT[13]; + _zz_decode_RS2_3[19] = memory_SHIFT_RIGHT[12]; + _zz_decode_RS2_3[20] = memory_SHIFT_RIGHT[11]; + _zz_decode_RS2_3[21] = memory_SHIFT_RIGHT[10]; + _zz_decode_RS2_3[22] = memory_SHIFT_RIGHT[9]; + _zz_decode_RS2_3[23] = memory_SHIFT_RIGHT[8]; + _zz_decode_RS2_3[24] = memory_SHIFT_RIGHT[7]; + _zz_decode_RS2_3[25] = memory_SHIFT_RIGHT[6]; + _zz_decode_RS2_3[26] = memory_SHIFT_RIGHT[5]; + _zz_decode_RS2_3[27] = memory_SHIFT_RIGHT[4]; + _zz_decode_RS2_3[28] = memory_SHIFT_RIGHT[3]; + _zz_decode_RS2_3[29] = memory_SHIFT_RIGHT[2]; + _zz_decode_RS2_3[30] = memory_SHIFT_RIGHT[1]; + _zz_decode_RS2_3[31] = memory_SHIFT_RIGHT[0]; + end + + always @(*) begin + HazardSimplePlugin_src0Hazard = 1'b0; + if(when_HazardSimplePlugin_l57) begin + if(when_HazardSimplePlugin_l58) begin + if(when_HazardSimplePlugin_l48) begin + HazardSimplePlugin_src0Hazard = 1'b1; + end + end + end + if(when_HazardSimplePlugin_l57_1) begin + if(when_HazardSimplePlugin_l58_1) begin + if(when_HazardSimplePlugin_l48_1) begin + HazardSimplePlugin_src0Hazard = 1'b1; + end + end + end + if(when_HazardSimplePlugin_l57_2) begin + if(when_HazardSimplePlugin_l58_2) begin + if(when_HazardSimplePlugin_l48_2) begin + HazardSimplePlugin_src0Hazard = 1'b1; + end + end + end + if(when_HazardSimplePlugin_l105) begin + HazardSimplePlugin_src0Hazard = 1'b0; + end + end + + always @(*) begin + HazardSimplePlugin_src1Hazard = 1'b0; + if(when_HazardSimplePlugin_l57) begin + if(when_HazardSimplePlugin_l58) begin + if(when_HazardSimplePlugin_l51) begin + HazardSimplePlugin_src1Hazard = 1'b1; + end + end + end + if(when_HazardSimplePlugin_l57_1) begin + if(when_HazardSimplePlugin_l58_1) begin + if(when_HazardSimplePlugin_l51_1) begin + HazardSimplePlugin_src1Hazard = 1'b1; + end + end + end + if(when_HazardSimplePlugin_l57_2) begin + if(when_HazardSimplePlugin_l58_2) begin + if(when_HazardSimplePlugin_l51_2) begin + HazardSimplePlugin_src1Hazard = 1'b1; + end + end + end + if(when_HazardSimplePlugin_l108) begin + HazardSimplePlugin_src1Hazard = 1'b0; + end + end + + assign HazardSimplePlugin_writeBackWrites_valid = (_zz_lastStageRegFileWrite_valid && writeBack_arbitration_isFiring); + assign HazardSimplePlugin_writeBackWrites_payload_address = _zz_lastStageRegFileWrite_payload_address[11 : 7]; + assign HazardSimplePlugin_writeBackWrites_payload_data = _zz_decode_RS2_2; + assign HazardSimplePlugin_addr0Match = (HazardSimplePlugin_writeBackBuffer_payload_address == decode_INSTRUCTION[19 : 15]); + assign HazardSimplePlugin_addr1Match = (HazardSimplePlugin_writeBackBuffer_payload_address == decode_INSTRUCTION[24 : 20]); + assign when_HazardSimplePlugin_l47 = 1'b1; + assign when_HazardSimplePlugin_l48 = (writeBack_INSTRUCTION[11 : 7] == decode_INSTRUCTION[19 : 15]); + assign when_HazardSimplePlugin_l51 = (writeBack_INSTRUCTION[11 : 7] == decode_INSTRUCTION[24 : 20]); + assign when_HazardSimplePlugin_l45 = (writeBack_arbitration_isValid && writeBack_REGFILE_WRITE_VALID); + assign when_HazardSimplePlugin_l57 = (writeBack_arbitration_isValid && writeBack_REGFILE_WRITE_VALID); + assign when_HazardSimplePlugin_l58 = (1'b0 || (! when_HazardSimplePlugin_l47)); + assign when_HazardSimplePlugin_l48_1 = (memory_INSTRUCTION[11 : 7] == decode_INSTRUCTION[19 : 15]); + assign when_HazardSimplePlugin_l51_1 = (memory_INSTRUCTION[11 : 7] == decode_INSTRUCTION[24 : 20]); + assign when_HazardSimplePlugin_l45_1 = (memory_arbitration_isValid && memory_REGFILE_WRITE_VALID); + assign when_HazardSimplePlugin_l57_1 = (memory_arbitration_isValid && memory_REGFILE_WRITE_VALID); + assign when_HazardSimplePlugin_l58_1 = (1'b0 || (! memory_BYPASSABLE_MEMORY_STAGE)); + assign when_HazardSimplePlugin_l48_2 = (execute_INSTRUCTION[11 : 7] == decode_INSTRUCTION[19 : 15]); + assign when_HazardSimplePlugin_l51_2 = (execute_INSTRUCTION[11 : 7] == decode_INSTRUCTION[24 : 20]); + assign when_HazardSimplePlugin_l45_2 = (execute_arbitration_isValid && execute_REGFILE_WRITE_VALID); + assign when_HazardSimplePlugin_l57_2 = (execute_arbitration_isValid && execute_REGFILE_WRITE_VALID); + assign when_HazardSimplePlugin_l58_2 = (1'b0 || (! execute_BYPASSABLE_EXECUTE_STAGE)); + assign when_HazardSimplePlugin_l105 = (! decode_RS1_USE); + assign when_HazardSimplePlugin_l108 = (! decode_RS2_USE); + assign when_HazardSimplePlugin_l113 = (decode_arbitration_isValid && (HazardSimplePlugin_src0Hazard || HazardSimplePlugin_src1Hazard)); + assign execute_BranchPlugin_eq = (execute_SRC1 == execute_SRC2); + assign switch_Misc_l200_1 = execute_INSTRUCTION[14 : 12]; + always @(*) begin + casez(switch_Misc_l200_1) + 3'b000 : begin + _zz_execute_BRANCH_COND_RESULT = execute_BranchPlugin_eq; + end + 3'b001 : begin + _zz_execute_BRANCH_COND_RESULT = (! execute_BranchPlugin_eq); + end + 3'b1?1 : begin + _zz_execute_BRANCH_COND_RESULT = (! execute_SRC_LESS); + end + default : begin + _zz_execute_BRANCH_COND_RESULT = execute_SRC_LESS; + end + endcase + end + + always @(*) begin + case(execute_BRANCH_CTRL) + `BranchCtrlEnum_binary_sequential_INC : begin + _zz_execute_BRANCH_COND_RESULT_1 = 1'b0; + end + `BranchCtrlEnum_binary_sequential_JAL : begin + _zz_execute_BRANCH_COND_RESULT_1 = 1'b1; + end + `BranchCtrlEnum_binary_sequential_JALR : begin + _zz_execute_BRANCH_COND_RESULT_1 = 1'b1; + end + default : begin + _zz_execute_BRANCH_COND_RESULT_1 = _zz_execute_BRANCH_COND_RESULT; + end + endcase + end + + assign _zz_execute_BranchPlugin_missAlignedTarget = execute_INSTRUCTION[31]; + always @(*) begin + _zz_execute_BranchPlugin_missAlignedTarget_1[19] = _zz_execute_BranchPlugin_missAlignedTarget; + _zz_execute_BranchPlugin_missAlignedTarget_1[18] = _zz_execute_BranchPlugin_missAlignedTarget; + _zz_execute_BranchPlugin_missAlignedTarget_1[17] = _zz_execute_BranchPlugin_missAlignedTarget; + _zz_execute_BranchPlugin_missAlignedTarget_1[16] = _zz_execute_BranchPlugin_missAlignedTarget; + _zz_execute_BranchPlugin_missAlignedTarget_1[15] = _zz_execute_BranchPlugin_missAlignedTarget; + _zz_execute_BranchPlugin_missAlignedTarget_1[14] = _zz_execute_BranchPlugin_missAlignedTarget; + _zz_execute_BranchPlugin_missAlignedTarget_1[13] = _zz_execute_BranchPlugin_missAlignedTarget; + _zz_execute_BranchPlugin_missAlignedTarget_1[12] = _zz_execute_BranchPlugin_missAlignedTarget; + _zz_execute_BranchPlugin_missAlignedTarget_1[11] = _zz_execute_BranchPlugin_missAlignedTarget; + _zz_execute_BranchPlugin_missAlignedTarget_1[10] = _zz_execute_BranchPlugin_missAlignedTarget; + _zz_execute_BranchPlugin_missAlignedTarget_1[9] = _zz_execute_BranchPlugin_missAlignedTarget; + _zz_execute_BranchPlugin_missAlignedTarget_1[8] = _zz_execute_BranchPlugin_missAlignedTarget; + _zz_execute_BranchPlugin_missAlignedTarget_1[7] = _zz_execute_BranchPlugin_missAlignedTarget; + _zz_execute_BranchPlugin_missAlignedTarget_1[6] = _zz_execute_BranchPlugin_missAlignedTarget; + _zz_execute_BranchPlugin_missAlignedTarget_1[5] = _zz_execute_BranchPlugin_missAlignedTarget; + _zz_execute_BranchPlugin_missAlignedTarget_1[4] = _zz_execute_BranchPlugin_missAlignedTarget; + _zz_execute_BranchPlugin_missAlignedTarget_1[3] = _zz_execute_BranchPlugin_missAlignedTarget; + _zz_execute_BranchPlugin_missAlignedTarget_1[2] = _zz_execute_BranchPlugin_missAlignedTarget; + _zz_execute_BranchPlugin_missAlignedTarget_1[1] = _zz_execute_BranchPlugin_missAlignedTarget; + _zz_execute_BranchPlugin_missAlignedTarget_1[0] = _zz_execute_BranchPlugin_missAlignedTarget; + end + + assign _zz_execute_BranchPlugin_missAlignedTarget_2 = _zz__zz_execute_BranchPlugin_missAlignedTarget_2[19]; + always @(*) begin + _zz_execute_BranchPlugin_missAlignedTarget_3[10] = _zz_execute_BranchPlugin_missAlignedTarget_2; + _zz_execute_BranchPlugin_missAlignedTarget_3[9] = _zz_execute_BranchPlugin_missAlignedTarget_2; + _zz_execute_BranchPlugin_missAlignedTarget_3[8] = _zz_execute_BranchPlugin_missAlignedTarget_2; + _zz_execute_BranchPlugin_missAlignedTarget_3[7] = _zz_execute_BranchPlugin_missAlignedTarget_2; + _zz_execute_BranchPlugin_missAlignedTarget_3[6] = _zz_execute_BranchPlugin_missAlignedTarget_2; + _zz_execute_BranchPlugin_missAlignedTarget_3[5] = _zz_execute_BranchPlugin_missAlignedTarget_2; + _zz_execute_BranchPlugin_missAlignedTarget_3[4] = _zz_execute_BranchPlugin_missAlignedTarget_2; + _zz_execute_BranchPlugin_missAlignedTarget_3[3] = _zz_execute_BranchPlugin_missAlignedTarget_2; + _zz_execute_BranchPlugin_missAlignedTarget_3[2] = _zz_execute_BranchPlugin_missAlignedTarget_2; + _zz_execute_BranchPlugin_missAlignedTarget_3[1] = _zz_execute_BranchPlugin_missAlignedTarget_2; + _zz_execute_BranchPlugin_missAlignedTarget_3[0] = _zz_execute_BranchPlugin_missAlignedTarget_2; + end + + assign _zz_execute_BranchPlugin_missAlignedTarget_4 = _zz__zz_execute_BranchPlugin_missAlignedTarget_4[11]; + always @(*) begin + _zz_execute_BranchPlugin_missAlignedTarget_5[18] = _zz_execute_BranchPlugin_missAlignedTarget_4; + _zz_execute_BranchPlugin_missAlignedTarget_5[17] = _zz_execute_BranchPlugin_missAlignedTarget_4; + _zz_execute_BranchPlugin_missAlignedTarget_5[16] = _zz_execute_BranchPlugin_missAlignedTarget_4; + _zz_execute_BranchPlugin_missAlignedTarget_5[15] = _zz_execute_BranchPlugin_missAlignedTarget_4; + _zz_execute_BranchPlugin_missAlignedTarget_5[14] = _zz_execute_BranchPlugin_missAlignedTarget_4; + _zz_execute_BranchPlugin_missAlignedTarget_5[13] = _zz_execute_BranchPlugin_missAlignedTarget_4; + _zz_execute_BranchPlugin_missAlignedTarget_5[12] = _zz_execute_BranchPlugin_missAlignedTarget_4; + _zz_execute_BranchPlugin_missAlignedTarget_5[11] = _zz_execute_BranchPlugin_missAlignedTarget_4; + _zz_execute_BranchPlugin_missAlignedTarget_5[10] = _zz_execute_BranchPlugin_missAlignedTarget_4; + _zz_execute_BranchPlugin_missAlignedTarget_5[9] = _zz_execute_BranchPlugin_missAlignedTarget_4; + _zz_execute_BranchPlugin_missAlignedTarget_5[8] = _zz_execute_BranchPlugin_missAlignedTarget_4; + _zz_execute_BranchPlugin_missAlignedTarget_5[7] = _zz_execute_BranchPlugin_missAlignedTarget_4; + _zz_execute_BranchPlugin_missAlignedTarget_5[6] = _zz_execute_BranchPlugin_missAlignedTarget_4; + _zz_execute_BranchPlugin_missAlignedTarget_5[5] = _zz_execute_BranchPlugin_missAlignedTarget_4; + _zz_execute_BranchPlugin_missAlignedTarget_5[4] = _zz_execute_BranchPlugin_missAlignedTarget_4; + _zz_execute_BranchPlugin_missAlignedTarget_5[3] = _zz_execute_BranchPlugin_missAlignedTarget_4; + _zz_execute_BranchPlugin_missAlignedTarget_5[2] = _zz_execute_BranchPlugin_missAlignedTarget_4; + _zz_execute_BranchPlugin_missAlignedTarget_5[1] = _zz_execute_BranchPlugin_missAlignedTarget_4; + _zz_execute_BranchPlugin_missAlignedTarget_5[0] = _zz_execute_BranchPlugin_missAlignedTarget_4; + end + + always @(*) begin + case(execute_BRANCH_CTRL) + `BranchCtrlEnum_binary_sequential_JALR : begin + _zz_execute_BranchPlugin_missAlignedTarget_6 = (_zz__zz_execute_BranchPlugin_missAlignedTarget_6[1] ^ execute_RS1[1]); + end + `BranchCtrlEnum_binary_sequential_JAL : begin + _zz_execute_BranchPlugin_missAlignedTarget_6 = _zz__zz_execute_BranchPlugin_missAlignedTarget_6_1[1]; + end + default : begin + _zz_execute_BranchPlugin_missAlignedTarget_6 = _zz__zz_execute_BranchPlugin_missAlignedTarget_6_2[1]; + end + endcase + end + + assign execute_BranchPlugin_missAlignedTarget = (execute_BRANCH_COND_RESULT && _zz_execute_BranchPlugin_missAlignedTarget_6); + always @(*) begin + case(execute_BRANCH_CTRL) + `BranchCtrlEnum_binary_sequential_JALR : begin + execute_BranchPlugin_branch_src1 = execute_RS1; + end + default : begin + execute_BranchPlugin_branch_src1 = execute_PC; + end + endcase + end + + assign _zz_execute_BranchPlugin_branch_src2 = execute_INSTRUCTION[31]; + always @(*) begin + _zz_execute_BranchPlugin_branch_src2_1[19] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[18] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[17] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[16] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[15] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[14] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[13] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[12] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[11] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[10] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[9] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[8] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[7] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[6] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[5] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[4] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[3] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[2] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[1] = _zz_execute_BranchPlugin_branch_src2; + _zz_execute_BranchPlugin_branch_src2_1[0] = _zz_execute_BranchPlugin_branch_src2; + end + + always @(*) begin + case(execute_BRANCH_CTRL) + `BranchCtrlEnum_binary_sequential_JALR : begin + execute_BranchPlugin_branch_src2 = {_zz_execute_BranchPlugin_branch_src2_1,execute_INSTRUCTION[31 : 20]}; + end + default : begin + execute_BranchPlugin_branch_src2 = ((execute_BRANCH_CTRL == `BranchCtrlEnum_binary_sequential_JAL) ? {{_zz_execute_BranchPlugin_branch_src2_3,{{{_zz_execute_BranchPlugin_branch_src2_6,execute_INSTRUCTION[19 : 12]},execute_INSTRUCTION[20]},execute_INSTRUCTION[30 : 21]}},1'b0} : {{_zz_execute_BranchPlugin_branch_src2_5,{{{_zz_execute_BranchPlugin_branch_src2_7,_zz_execute_BranchPlugin_branch_src2_8},execute_INSTRUCTION[30 : 25]},execute_INSTRUCTION[11 : 8]}},1'b0}); + if(execute_PREDICTION_HAD_BRANCHED2) begin + execute_BranchPlugin_branch_src2 = {29'd0, _zz_execute_BranchPlugin_branch_src2_9}; + end + end + endcase + end + + assign _zz_execute_BranchPlugin_branch_src2_2 = _zz__zz_execute_BranchPlugin_branch_src2_2[19]; + always @(*) begin + _zz_execute_BranchPlugin_branch_src2_3[10] = _zz_execute_BranchPlugin_branch_src2_2; + _zz_execute_BranchPlugin_branch_src2_3[9] = _zz_execute_BranchPlugin_branch_src2_2; + _zz_execute_BranchPlugin_branch_src2_3[8] = _zz_execute_BranchPlugin_branch_src2_2; + _zz_execute_BranchPlugin_branch_src2_3[7] = _zz_execute_BranchPlugin_branch_src2_2; + _zz_execute_BranchPlugin_branch_src2_3[6] = _zz_execute_BranchPlugin_branch_src2_2; + _zz_execute_BranchPlugin_branch_src2_3[5] = _zz_execute_BranchPlugin_branch_src2_2; + _zz_execute_BranchPlugin_branch_src2_3[4] = _zz_execute_BranchPlugin_branch_src2_2; + _zz_execute_BranchPlugin_branch_src2_3[3] = _zz_execute_BranchPlugin_branch_src2_2; + _zz_execute_BranchPlugin_branch_src2_3[2] = _zz_execute_BranchPlugin_branch_src2_2; + _zz_execute_BranchPlugin_branch_src2_3[1] = _zz_execute_BranchPlugin_branch_src2_2; + _zz_execute_BranchPlugin_branch_src2_3[0] = _zz_execute_BranchPlugin_branch_src2_2; + end + + assign _zz_execute_BranchPlugin_branch_src2_4 = _zz__zz_execute_BranchPlugin_branch_src2_4[11]; + always @(*) begin + _zz_execute_BranchPlugin_branch_src2_5[18] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[17] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[16] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[15] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[14] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[13] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[12] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[11] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[10] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[9] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[8] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[7] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[6] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[5] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[4] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[3] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[2] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[1] = _zz_execute_BranchPlugin_branch_src2_4; + _zz_execute_BranchPlugin_branch_src2_5[0] = _zz_execute_BranchPlugin_branch_src2_4; + end + + assign execute_BranchPlugin_branchAdder = (execute_BranchPlugin_branch_src1 + execute_BranchPlugin_branch_src2); + assign BranchPlugin_jumpInterface_valid = ((execute_arbitration_isValid && execute_BRANCH_DO) && (! 1'b0)); + assign BranchPlugin_jumpInterface_payload = execute_BRANCH_CALC; + always @(*) begin + BranchPlugin_branchExceptionPort_valid = (execute_arbitration_isValid && (execute_BRANCH_DO && execute_BRANCH_CALC[1])); + if(when_BranchPlugin_l296) begin + BranchPlugin_branchExceptionPort_valid = 1'b0; + end + end + + assign BranchPlugin_branchExceptionPort_payload_code = 4'b0000; + assign BranchPlugin_branchExceptionPort_payload_badAddr = execute_BRANCH_CALC; + assign when_BranchPlugin_l296 = 1'b0; + assign IBusCachedPlugin_decodePrediction_rsp_wasWrong = BranchPlugin_jumpInterface_valid; + always @(*) begin + CsrPlugin_privilege = 2'b11; + if(CsrPlugin_forceMachineWire) begin + CsrPlugin_privilege = 2'b11; + end + end + + assign _zz_when_CsrPlugin_l952 = (CsrPlugin_mip_MTIP && CsrPlugin_mie_MTIE); + assign _zz_when_CsrPlugin_l952_1 = (CsrPlugin_mip_MSIP && CsrPlugin_mie_MSIE); + assign _zz_when_CsrPlugin_l952_2 = (CsrPlugin_mip_MEIP && CsrPlugin_mie_MEIE); + assign CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilegeUncapped = 2'b11; + assign CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilege = ((CsrPlugin_privilege < CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilegeUncapped) ? CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilegeUncapped : CsrPlugin_privilege); + assign _zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code = {decodeExceptionPort_valid,IBusCachedPlugin_decodeExceptionPort_valid}; + assign _zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_1 = _zz__zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_1[0]; + assign _zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_2 = {CsrPlugin_selfException_valid,BranchPlugin_branchExceptionPort_valid}; + assign _zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_3 = _zz__zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_3[0]; + always @(*) begin + CsrPlugin_exceptionPortCtrl_exceptionValids_decode = CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_decode; + if(_zz_when) begin + CsrPlugin_exceptionPortCtrl_exceptionValids_decode = 1'b1; + end + if(decode_arbitration_isFlushed) begin + CsrPlugin_exceptionPortCtrl_exceptionValids_decode = 1'b0; + end + end + + always @(*) begin + CsrPlugin_exceptionPortCtrl_exceptionValids_execute = CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_execute; + if(_zz_when_1) begin + CsrPlugin_exceptionPortCtrl_exceptionValids_execute = 1'b1; + end + if(execute_arbitration_isFlushed) begin + CsrPlugin_exceptionPortCtrl_exceptionValids_execute = 1'b0; + end + end + + always @(*) begin + CsrPlugin_exceptionPortCtrl_exceptionValids_memory = CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_memory; + if(memory_arbitration_isFlushed) begin + CsrPlugin_exceptionPortCtrl_exceptionValids_memory = 1'b0; + end + end + + always @(*) begin + CsrPlugin_exceptionPortCtrl_exceptionValids_writeBack = CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_writeBack; + if(DBusCachedPlugin_exceptionBus_valid) begin + CsrPlugin_exceptionPortCtrl_exceptionValids_writeBack = 1'b1; + end + if(writeBack_arbitration_isFlushed) begin + CsrPlugin_exceptionPortCtrl_exceptionValids_writeBack = 1'b0; + end + end + + assign when_CsrPlugin_l909 = (! decode_arbitration_isStuck); + assign when_CsrPlugin_l909_1 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l909_2 = (! memory_arbitration_isStuck); + assign when_CsrPlugin_l909_3 = (! writeBack_arbitration_isStuck); + assign when_CsrPlugin_l922 = ({CsrPlugin_exceptionPortCtrl_exceptionValids_writeBack,{CsrPlugin_exceptionPortCtrl_exceptionValids_memory,{CsrPlugin_exceptionPortCtrl_exceptionValids_execute,CsrPlugin_exceptionPortCtrl_exceptionValids_decode}}} != 4'b0000); + assign CsrPlugin_exceptionPendings_0 = CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_decode; + assign CsrPlugin_exceptionPendings_1 = CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_execute; + assign CsrPlugin_exceptionPendings_2 = CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_memory; + assign CsrPlugin_exceptionPendings_3 = CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_writeBack; + assign when_CsrPlugin_l946 = (CsrPlugin_mstatus_MIE || (CsrPlugin_privilege < 2'b11)); + assign when_CsrPlugin_l952 = ((_zz_when_CsrPlugin_l952 && 1'b1) && (! 1'b0)); + assign when_CsrPlugin_l952_1 = ((_zz_when_CsrPlugin_l952_1 && 1'b1) && (! 1'b0)); + assign when_CsrPlugin_l952_2 = ((_zz_when_CsrPlugin_l952_2 && 1'b1) && (! 1'b0)); + assign CsrPlugin_exception = (CsrPlugin_exceptionPortCtrl_exceptionValids_writeBack && CsrPlugin_allowException); + assign CsrPlugin_pipelineLiberator_active = ((CsrPlugin_interrupt_valid && CsrPlugin_allowInterrupts) && decode_arbitration_isValid); + assign when_CsrPlugin_l980 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l980_1 = (! memory_arbitration_isStuck); + assign when_CsrPlugin_l980_2 = (! writeBack_arbitration_isStuck); + assign when_CsrPlugin_l985 = ((! CsrPlugin_pipelineLiberator_active) || decode_arbitration_removeIt); + always @(*) begin + CsrPlugin_pipelineLiberator_done = CsrPlugin_pipelineLiberator_pcValids_2; + if(when_CsrPlugin_l991) begin + CsrPlugin_pipelineLiberator_done = 1'b0; + end + if(CsrPlugin_hadException) begin + CsrPlugin_pipelineLiberator_done = 1'b0; + end + end + + assign when_CsrPlugin_l991 = ({CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_writeBack,{CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_memory,CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_execute}} != 3'b000); + assign CsrPlugin_interruptJump = ((CsrPlugin_interrupt_valid && CsrPlugin_pipelineLiberator_done) && CsrPlugin_allowInterrupts); + always @(*) begin + CsrPlugin_targetPrivilege = CsrPlugin_interrupt_targetPrivilege; + if(CsrPlugin_hadException) begin + CsrPlugin_targetPrivilege = CsrPlugin_exceptionPortCtrl_exceptionTargetPrivilege; + end + end + + always @(*) begin + CsrPlugin_trapCause = CsrPlugin_interrupt_code; + if(CsrPlugin_hadException) begin + CsrPlugin_trapCause = CsrPlugin_exceptionPortCtrl_exceptionContext_code; + end + end + + always @(*) begin + CsrPlugin_xtvec_mode = 2'bxx; + case(CsrPlugin_targetPrivilege) + 2'b11 : begin + CsrPlugin_xtvec_mode = CsrPlugin_mtvec_mode; + end + default : begin + end + endcase + end + + always @(*) begin + CsrPlugin_xtvec_base = 30'bxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx; + case(CsrPlugin_targetPrivilege) + 2'b11 : begin + CsrPlugin_xtvec_base = CsrPlugin_mtvec_base; + end + default : begin + end + endcase + end + + assign when_CsrPlugin_l1019 = (CsrPlugin_hadException || CsrPlugin_interruptJump); + assign when_CsrPlugin_l1064 = (writeBack_arbitration_isValid && (writeBack_ENV_CTRL == `EnvCtrlEnum_binary_sequential_XRET)); + assign switch_CsrPlugin_l1068 = writeBack_INSTRUCTION[29 : 28]; + assign contextSwitching = CsrPlugin_jumpInterface_valid; + assign when_CsrPlugin_l1108 = (execute_arbitration_isValid && (execute_ENV_CTRL == `EnvCtrlEnum_binary_sequential_WFI)); + assign when_CsrPlugin_l1110 = (! execute_CsrPlugin_wfiWake); + assign when_CsrPlugin_l1116 = ({(writeBack_arbitration_isValid && (writeBack_ENV_CTRL == `EnvCtrlEnum_binary_sequential_XRET)),{(memory_arbitration_isValid && (memory_ENV_CTRL == `EnvCtrlEnum_binary_sequential_XRET)),(execute_arbitration_isValid && (execute_ENV_CTRL == `EnvCtrlEnum_binary_sequential_XRET))}} != 3'b000); + assign execute_CsrPlugin_blockedBySideEffects = (({writeBack_arbitration_isValid,memory_arbitration_isValid} != 2'b00) || 1'b0); + always @(*) begin + execute_CsrPlugin_illegalAccess = 1'b1; + if(execute_CsrPlugin_csr_3264) begin + if(execute_CSR_READ_OPCODE) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + end + if(execute_CsrPlugin_csr_3857) begin + if(execute_CSR_READ_OPCODE) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + end + if(execute_CsrPlugin_csr_3858) begin + if(execute_CSR_READ_OPCODE) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + end + if(execute_CsrPlugin_csr_3859) begin + if(execute_CSR_READ_OPCODE) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + end + if(execute_CsrPlugin_csr_3860) begin + if(execute_CSR_READ_OPCODE) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + end + if(execute_CsrPlugin_csr_769) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(execute_CsrPlugin_csr_768) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(execute_CsrPlugin_csr_836) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(execute_CsrPlugin_csr_772) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(execute_CsrPlugin_csr_773) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(execute_CsrPlugin_csr_833) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(execute_CsrPlugin_csr_832) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(execute_CsrPlugin_csr_834) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(execute_CsrPlugin_csr_835) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(execute_CsrPlugin_csr_2816) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(execute_CsrPlugin_csr_2944) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(execute_CsrPlugin_csr_2818) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(execute_CsrPlugin_csr_2946) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(execute_CsrPlugin_csr_3072) begin + if(execute_CSR_READ_OPCODE) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + end + if(execute_CsrPlugin_csr_3200) begin + if(execute_CSR_READ_OPCODE) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + end + if(execute_CsrPlugin_csr_3074) begin + if(execute_CSR_READ_OPCODE) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + end + if(execute_CsrPlugin_csr_3202) begin + if(execute_CSR_READ_OPCODE) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + end + if(execute_CsrPlugin_csr_3008) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(execute_CsrPlugin_csr_4032) begin + if(execute_CSR_READ_OPCODE) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + end + if(execute_CsrPlugin_csr_2820) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(execute_CsrPlugin_csr_2821) begin + if(execute_CSR_WRITE_OPCODE) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + end + if(execute_CsrPlugin_csr_2822) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(execute_CsrPlugin_csr_2823) begin + if(execute_CSR_WRITE_OPCODE) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + end + if(execute_CsrPlugin_csr_2824) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(execute_CsrPlugin_csr_2825) begin + if(execute_CSR_WRITE_OPCODE) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + end + if(execute_CsrPlugin_csr_2826) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(execute_CsrPlugin_csr_2827) begin + if(execute_CSR_WRITE_OPCODE) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + end + if(execute_CsrPlugin_csr_2828) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(execute_CsrPlugin_csr_2829) begin + if(execute_CSR_WRITE_OPCODE) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + end + if(execute_CsrPlugin_csr_2830) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(execute_CsrPlugin_csr_2831) begin + if(execute_CSR_WRITE_OPCODE) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + end + if(execute_CsrPlugin_csr_2832) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(execute_CsrPlugin_csr_2833) begin + if(execute_CSR_WRITE_OPCODE) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + end + if(execute_CsrPlugin_csr_2834) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(execute_CsrPlugin_csr_2835) begin + if(execute_CSR_WRITE_OPCODE) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + end + if(CsrPlugin_csrMapping_allowCsrSignal) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + if(when_CsrPlugin_l1297) begin + execute_CsrPlugin_illegalAccess = 1'b1; + end + if(when_CsrPlugin_l1302) begin + execute_CsrPlugin_illegalAccess = 1'b0; + end + end + + always @(*) begin + execute_CsrPlugin_illegalInstruction = 1'b0; + if(when_CsrPlugin_l1136) begin + if(when_CsrPlugin_l1137) begin + execute_CsrPlugin_illegalInstruction = 1'b1; + end + end + end + + always @(*) begin + CsrPlugin_selfException_valid = 1'b0; + if(when_CsrPlugin_l1129) begin + CsrPlugin_selfException_valid = 1'b1; + end + if(when_CsrPlugin_l1144) begin + CsrPlugin_selfException_valid = 1'b1; + end + end + + always @(*) begin + CsrPlugin_selfException_payload_code = 4'bxxxx; + if(when_CsrPlugin_l1129) begin + CsrPlugin_selfException_payload_code = 4'b0010; + end + if(when_CsrPlugin_l1144) begin + case(CsrPlugin_privilege) + 2'b00 : begin + CsrPlugin_selfException_payload_code = 4'b1000; + end + default : begin + CsrPlugin_selfException_payload_code = 4'b1011; + end + endcase + end + end + + assign CsrPlugin_selfException_payload_badAddr = execute_INSTRUCTION; + assign when_CsrPlugin_l1129 = (execute_CsrPlugin_illegalAccess || execute_CsrPlugin_illegalInstruction); + assign when_CsrPlugin_l1136 = (execute_arbitration_isValid && (execute_ENV_CTRL == `EnvCtrlEnum_binary_sequential_XRET)); + assign when_CsrPlugin_l1137 = (CsrPlugin_privilege < execute_INSTRUCTION[29 : 28]); + assign when_CsrPlugin_l1144 = (execute_arbitration_isValid && (execute_ENV_CTRL == `EnvCtrlEnum_binary_sequential_ECALL)); + always @(*) begin + execute_CsrPlugin_writeInstruction = ((execute_arbitration_isValid && execute_IS_CSR) && execute_CSR_WRITE_OPCODE); + if(when_CsrPlugin_l1297) begin + execute_CsrPlugin_writeInstruction = 1'b0; + end + end + + always @(*) begin + execute_CsrPlugin_readInstruction = ((execute_arbitration_isValid && execute_IS_CSR) && execute_CSR_READ_OPCODE); + if(when_CsrPlugin_l1297) begin + execute_CsrPlugin_readInstruction = 1'b0; + end + end + + assign execute_CsrPlugin_writeEnable = (execute_CsrPlugin_writeInstruction && (! execute_arbitration_isStuck)); + assign execute_CsrPlugin_readEnable = (execute_CsrPlugin_readInstruction && (! execute_arbitration_isStuck)); + assign CsrPlugin_csrMapping_hazardFree = (! execute_CsrPlugin_blockedBySideEffects); + assign execute_CsrPlugin_readToWriteData = CsrPlugin_csrMapping_readDataSignal; + assign switch_Misc_l200_2 = execute_INSTRUCTION[13]; + always @(*) begin + case(switch_Misc_l200_2) + 1'b0 : begin + _zz_CsrPlugin_csrMapping_writeDataSignal = execute_SRC1; + end + default : begin + _zz_CsrPlugin_csrMapping_writeDataSignal = (execute_INSTRUCTION[12] ? (execute_CsrPlugin_readToWriteData & (~ execute_SRC1)) : (execute_CsrPlugin_readToWriteData | execute_SRC1)); + end + endcase + end + + assign CsrPlugin_csrMapping_writeDataSignal = _zz_CsrPlugin_csrMapping_writeDataSignal; + assign when_CsrPlugin_l1176 = (execute_arbitration_isValid && execute_IS_CSR); + assign when_CsrPlugin_l1180 = (execute_arbitration_isValid && (execute_IS_CSR || 1'b0)); + assign execute_CsrPlugin_csrAddress = execute_INSTRUCTION[31 : 20]; + assign execute_MulPlugin_a = execute_RS1; + assign execute_MulPlugin_b = execute_RS2; + assign switch_MulPlugin_l87 = execute_INSTRUCTION[13 : 12]; + always @(*) begin + case(switch_MulPlugin_l87) + 2'b01 : begin + execute_MulPlugin_aSigned = 1'b1; + end + 2'b10 : begin + execute_MulPlugin_aSigned = 1'b1; + end + default : begin + execute_MulPlugin_aSigned = 1'b0; + end + endcase + end + + always @(*) begin + case(switch_MulPlugin_l87) + 2'b01 : begin + execute_MulPlugin_bSigned = 1'b1; + end + 2'b10 : begin + execute_MulPlugin_bSigned = 1'b0; + end + default : begin + execute_MulPlugin_bSigned = 1'b0; + end + endcase + end + + assign execute_MulPlugin_aULow = execute_MulPlugin_a[15 : 0]; + assign execute_MulPlugin_bULow = execute_MulPlugin_b[15 : 0]; + assign execute_MulPlugin_aSLow = {1'b0,execute_MulPlugin_a[15 : 0]}; + assign execute_MulPlugin_bSLow = {1'b0,execute_MulPlugin_b[15 : 0]}; + assign execute_MulPlugin_aHigh = {(execute_MulPlugin_aSigned && execute_MulPlugin_a[31]),execute_MulPlugin_a[31 : 16]}; + assign execute_MulPlugin_bHigh = {(execute_MulPlugin_bSigned && execute_MulPlugin_b[31]),execute_MulPlugin_b[31 : 16]}; + assign writeBack_MulPlugin_result = ($signed(_zz_writeBack_MulPlugin_result) + $signed(_zz_writeBack_MulPlugin_result_1)); + assign when_MulPlugin_l147 = (writeBack_arbitration_isValid && writeBack_IS_MUL); + assign switch_MulPlugin_l148 = writeBack_INSTRUCTION[13 : 12]; + assign memory_DivPlugin_frontendOk = 1'b1; + always @(*) begin + memory_DivPlugin_div_counter_willIncrement = 1'b0; + if(when_MulDivIterativePlugin_l128) begin + if(when_MulDivIterativePlugin_l132) begin + memory_DivPlugin_div_counter_willIncrement = 1'b1; + end + end + end + + always @(*) begin + memory_DivPlugin_div_counter_willClear = 1'b0; + if(when_MulDivIterativePlugin_l162) begin + memory_DivPlugin_div_counter_willClear = 1'b1; + end + end + + assign memory_DivPlugin_div_counter_willOverflowIfInc = (memory_DivPlugin_div_counter_value == 6'h21); + assign memory_DivPlugin_div_counter_willOverflow = (memory_DivPlugin_div_counter_willOverflowIfInc && memory_DivPlugin_div_counter_willIncrement); + always @(*) begin + if(memory_DivPlugin_div_counter_willOverflow) begin + memory_DivPlugin_div_counter_valueNext = 6'h0; + end else begin + memory_DivPlugin_div_counter_valueNext = (memory_DivPlugin_div_counter_value + _zz_memory_DivPlugin_div_counter_valueNext); + end + if(memory_DivPlugin_div_counter_willClear) begin + memory_DivPlugin_div_counter_valueNext = 6'h0; + end + end + + assign when_MulDivIterativePlugin_l126 = (memory_DivPlugin_div_counter_value == 6'h20); + assign when_MulDivIterativePlugin_l126_1 = (! memory_arbitration_isStuck); + assign when_MulDivIterativePlugin_l128 = (memory_arbitration_isValid && memory_IS_DIV); + assign when_MulDivIterativePlugin_l129 = ((! memory_DivPlugin_frontendOk) || (! memory_DivPlugin_div_done)); + assign when_MulDivIterativePlugin_l132 = (memory_DivPlugin_frontendOk && (! memory_DivPlugin_div_done)); + assign _zz_memory_DivPlugin_div_stage_0_remainderShifted = memory_DivPlugin_rs1[31 : 0]; + assign memory_DivPlugin_div_stage_0_remainderShifted = {memory_DivPlugin_accumulator[31 : 0],_zz_memory_DivPlugin_div_stage_0_remainderShifted[31]}; + assign memory_DivPlugin_div_stage_0_remainderMinusDenominator = (memory_DivPlugin_div_stage_0_remainderShifted - _zz_memory_DivPlugin_div_stage_0_remainderMinusDenominator); + assign memory_DivPlugin_div_stage_0_outRemainder = ((! memory_DivPlugin_div_stage_0_remainderMinusDenominator[32]) ? _zz_memory_DivPlugin_div_stage_0_outRemainder : _zz_memory_DivPlugin_div_stage_0_outRemainder_1); + assign memory_DivPlugin_div_stage_0_outNumerator = _zz_memory_DivPlugin_div_stage_0_outNumerator[31:0]; + assign when_MulDivIterativePlugin_l151 = (memory_DivPlugin_div_counter_value == 6'h20); + assign _zz_memory_DivPlugin_div_result = (memory_INSTRUCTION[13] ? memory_DivPlugin_accumulator[31 : 0] : memory_DivPlugin_rs1[31 : 0]); + assign when_MulDivIterativePlugin_l162 = (! memory_arbitration_isStuck); + assign _zz_memory_DivPlugin_rs2 = (execute_RS2[31] && execute_IS_RS2_SIGNED); + assign _zz_memory_DivPlugin_rs1 = (1'b0 || ((execute_IS_DIV && execute_RS1[31]) && execute_IS_RS1_SIGNED)); + always @(*) begin + _zz_memory_DivPlugin_rs1_1[32] = (execute_IS_RS1_SIGNED && execute_RS1[31]); + _zz_memory_DivPlugin_rs1_1[31 : 0] = execute_RS1; + end + + assign _zz_CsrPlugin_csrMapping_readDataInit_1 = (_zz_CsrPlugin_csrMapping_readDataInit & externalInterruptArray_regNext); + assign externalInterrupt = (_zz_CsrPlugin_csrMapping_readDataInit_1 != 32'h0); + assign when_DebugPlugin_l225 = (DebugPlugin_haltIt && (! DebugPlugin_isPipBusy)); + assign DebugPlugin_allowEBreak = (DebugPlugin_debugUsed && (! DebugPlugin_disableEbreak)); + always @(*) begin + debug_bus_cmd_ready = 1'b1; + if(debug_bus_cmd_valid) begin + case(switch_DebugPlugin_l256) + 6'h01 : begin + if(debug_bus_cmd_payload_wr) begin + debug_bus_cmd_ready = IBusCachedPlugin_injectionPort_ready; + end + end + default : begin + end + endcase + end + end + + always @(*) begin + debug_bus_rsp_data = DebugPlugin_busReadDataReg; + if(when_DebugPlugin_l244) begin + debug_bus_rsp_data[0] = DebugPlugin_resetIt; + debug_bus_rsp_data[1] = DebugPlugin_haltIt; + debug_bus_rsp_data[2] = DebugPlugin_isPipBusy; + debug_bus_rsp_data[3] = DebugPlugin_haltedByBreak; + debug_bus_rsp_data[4] = DebugPlugin_stepIt; + end + end + + assign when_DebugPlugin_l244 = (! _zz_when_DebugPlugin_l244); + always @(*) begin + IBusCachedPlugin_injectionPort_valid = 1'b0; + if(debug_bus_cmd_valid) begin + case(switch_DebugPlugin_l256) + 6'h01 : begin + if(debug_bus_cmd_payload_wr) begin + IBusCachedPlugin_injectionPort_valid = 1'b1; + end + end + default : begin + end + endcase + end + end + + assign IBusCachedPlugin_injectionPort_payload = debug_bus_cmd_payload_data; + assign switch_DebugPlugin_l256 = debug_bus_cmd_payload_address[7 : 2]; + assign when_DebugPlugin_l260 = debug_bus_cmd_payload_data[16]; + assign when_DebugPlugin_l260_1 = debug_bus_cmd_payload_data[24]; + assign when_DebugPlugin_l261 = debug_bus_cmd_payload_data[17]; + assign when_DebugPlugin_l261_1 = debug_bus_cmd_payload_data[25]; + assign when_DebugPlugin_l262 = debug_bus_cmd_payload_data[25]; + assign when_DebugPlugin_l263 = debug_bus_cmd_payload_data[25]; + assign when_DebugPlugin_l264 = debug_bus_cmd_payload_data[18]; + assign when_DebugPlugin_l264_1 = debug_bus_cmd_payload_data[26]; + assign when_DebugPlugin_l284 = (execute_arbitration_isValid && execute_DO_EBREAK); + assign when_DebugPlugin_l287 = (({writeBack_arbitration_isValid,memory_arbitration_isValid} != 2'b00) == 1'b0); + assign when_DebugPlugin_l300 = (DebugPlugin_stepIt && IBusCachedPlugin_incomingInstruction); + assign debug_resetOut = DebugPlugin_resetIt_regNext; + assign when_DebugPlugin_l316 = (DebugPlugin_haltIt || DebugPlugin_stepIt); + assign execute_CfuPlugin_schedule = (execute_arbitration_isValid && execute_CfuPlugin_CFU_ENABLE); + assign CfuPlugin_bus_cmd_fire = (CfuPlugin_bus_cmd_valid && CfuPlugin_bus_cmd_ready); + assign when_CfuPlugin_l171 = (! execute_arbitration_isStuckByOthers); + assign CfuPlugin_bus_cmd_valid = ((execute_CfuPlugin_schedule || execute_CfuPlugin_hold) && (! execute_CfuPlugin_fired)); + assign when_CfuPlugin_l175 = (CfuPlugin_bus_cmd_valid && (! CfuPlugin_bus_cmd_ready)); + assign execute_CfuPlugin_functionsIds_0 = _zz_execute_CfuPlugin_functionsIds_0; + assign CfuPlugin_bus_cmd_payload_function_id = execute_CfuPlugin_functionsIds_0; + assign CfuPlugin_bus_cmd_payload_inputs_0 = execute_RS1; + assign _zz_CfuPlugin_bus_cmd_payload_inputs_1 = execute_INSTRUCTION[31]; + always @(*) begin + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[23] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[22] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[21] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[20] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[19] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[18] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[17] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[16] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[15] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[14] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[13] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[12] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[11] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[10] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[9] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[8] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[7] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[6] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[5] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[4] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[3] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[2] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[1] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + _zz_CfuPlugin_bus_cmd_payload_inputs_1_1[0] = _zz_CfuPlugin_bus_cmd_payload_inputs_1; + end + + always @(*) begin + case(execute_CfuPlugin_CFU_INPUT_2_KIND) + `Input2Kind_binary_sequential_RS : begin + _zz_CfuPlugin_bus_cmd_payload_inputs_1_2 = execute_RS2; + end + default : begin + _zz_CfuPlugin_bus_cmd_payload_inputs_1_2 = {_zz_CfuPlugin_bus_cmd_payload_inputs_1_1,execute_INSTRUCTION[31 : 24]}; + end + endcase + end + + assign CfuPlugin_bus_cmd_payload_inputs_1 = _zz_CfuPlugin_bus_cmd_payload_inputs_1_2; + assign CfuPlugin_bus_rsp_ready = (! CfuPlugin_bus_rsp_rValid); + assign CfuPlugin_bus_rsp_rsp_valid = (CfuPlugin_bus_rsp_valid || CfuPlugin_bus_rsp_rValid); + assign CfuPlugin_bus_rsp_rsp_payload_outputs_0 = (CfuPlugin_bus_rsp_rValid ? CfuPlugin_bus_rsp_rData_outputs_0 : CfuPlugin_bus_rsp_payload_outputs_0); + always @(*) begin + CfuPlugin_bus_rsp_rsp_ready = 1'b0; + if(memory_CfuPlugin_CFU_IN_FLIGHT) begin + CfuPlugin_bus_rsp_rsp_ready = (! memory_arbitration_isStuckByOthers); + end + end + + assign when_CfuPlugin_l208 = (! CfuPlugin_bus_rsp_rsp_valid); + assign when_GenCoreDefault_l367 = _zz_when_GenCoreDefault_l367[0]; + assign when_GenCoreDefault_l367_1 = _zz_when_GenCoreDefault_l367_1[0]; + assign when_GenCoreDefault_l367_2 = _zz_when_GenCoreDefault_l367_2[0]; + assign when_GenCoreDefault_l367_3 = _zz_when_GenCoreDefault_l367_3[0]; + assign when_GenCoreDefault_l367_4 = _zz_when_GenCoreDefault_l367_4[0]; + assign when_GenCoreDefault_l367_5 = _zz_when_GenCoreDefault_l367_5[0]; + assign when_GenCoreDefault_l367_6 = _zz_when_GenCoreDefault_l367_6[0]; + assign when_GenCoreDefault_l367_7 = _zz_when_GenCoreDefault_l367_7[0]; + assign when_Pipeline_l124 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_1 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_2 = ((! writeBack_arbitration_isStuck) && (! CsrPlugin_exceptionPortCtrl_exceptionValids_writeBack)); + assign when_Pipeline_l124_3 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_4 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_5 = (! writeBack_arbitration_isStuck); + assign when_Pipeline_l124_6 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_7 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_8 = (! writeBack_arbitration_isStuck); + assign when_Pipeline_l124_9 = (! execute_arbitration_isStuck); + assign _zz_decode_to_execute_SRC1_CTRL_1 = decode_SRC1_CTRL; + assign _zz_decode_SRC1_CTRL = _zz_decode_SRC1_CTRL_1; + assign when_Pipeline_l124_10 = (! execute_arbitration_isStuck); + assign _zz_execute_SRC1_CTRL = decode_to_execute_SRC1_CTRL; + assign when_Pipeline_l124_11 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_12 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_13 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_14 = (! writeBack_arbitration_isStuck); + assign _zz_decode_to_execute_ALU_CTRL_1 = decode_ALU_CTRL; + assign _zz_decode_ALU_CTRL = _zz_decode_ALU_CTRL_1; + assign when_Pipeline_l124_15 = (! execute_arbitration_isStuck); + assign _zz_execute_ALU_CTRL = decode_to_execute_ALU_CTRL; + assign _zz_decode_to_execute_SRC2_CTRL_1 = decode_SRC2_CTRL; + assign _zz_decode_SRC2_CTRL = _zz_decode_SRC2_CTRL_1; + assign when_Pipeline_l124_16 = (! execute_arbitration_isStuck); + assign _zz_execute_SRC2_CTRL = decode_to_execute_SRC2_CTRL; + assign when_Pipeline_l124_17 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_18 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_19 = (! writeBack_arbitration_isStuck); + assign when_Pipeline_l124_20 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_21 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_22 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_23 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_24 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_25 = (! writeBack_arbitration_isStuck); + assign when_Pipeline_l124_26 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_27 = (! execute_arbitration_isStuck); + assign _zz_decode_to_execute_ALU_BITWISE_CTRL_1 = decode_ALU_BITWISE_CTRL; + assign _zz_decode_ALU_BITWISE_CTRL = _zz_decode_ALU_BITWISE_CTRL_1; + assign when_Pipeline_l124_28 = (! execute_arbitration_isStuck); + assign _zz_execute_ALU_BITWISE_CTRL = decode_to_execute_ALU_BITWISE_CTRL; + assign _zz_decode_to_execute_SHIFT_CTRL_1 = decode_SHIFT_CTRL; + assign _zz_execute_to_memory_SHIFT_CTRL_1 = execute_SHIFT_CTRL; + assign _zz_decode_SHIFT_CTRL = _zz_decode_SHIFT_CTRL_1; + assign when_Pipeline_l124_29 = (! execute_arbitration_isStuck); + assign _zz_execute_SHIFT_CTRL = decode_to_execute_SHIFT_CTRL; + assign when_Pipeline_l124_30 = (! memory_arbitration_isStuck); + assign _zz_memory_SHIFT_CTRL = execute_to_memory_SHIFT_CTRL; + assign _zz_decode_to_execute_BRANCH_CTRL_1 = decode_BRANCH_CTRL; + assign _zz_decode_BRANCH_CTRL_1 = _zz_decode_BRANCH_CTRL; + assign when_Pipeline_l124_31 = (! execute_arbitration_isStuck); + assign _zz_execute_BRANCH_CTRL = decode_to_execute_BRANCH_CTRL; + assign when_Pipeline_l124_32 = (! execute_arbitration_isStuck); + assign _zz_decode_to_execute_ENV_CTRL_1 = decode_ENV_CTRL; + assign _zz_execute_to_memory_ENV_CTRL_1 = execute_ENV_CTRL; + assign _zz_memory_to_writeBack_ENV_CTRL_1 = memory_ENV_CTRL; + assign _zz_decode_ENV_CTRL = _zz_decode_ENV_CTRL_1; + assign when_Pipeline_l124_33 = (! execute_arbitration_isStuck); + assign _zz_execute_ENV_CTRL = decode_to_execute_ENV_CTRL; + assign when_Pipeline_l124_34 = (! memory_arbitration_isStuck); + assign _zz_memory_ENV_CTRL = execute_to_memory_ENV_CTRL; + assign when_Pipeline_l124_35 = (! writeBack_arbitration_isStuck); + assign _zz_writeBack_ENV_CTRL = memory_to_writeBack_ENV_CTRL; + assign when_Pipeline_l124_36 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_37 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_38 = (! writeBack_arbitration_isStuck); + assign when_Pipeline_l124_39 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_40 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_41 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_42 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_43 = (! execute_arbitration_isStuck); + assign _zz_decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND_1 = decode_CfuPlugin_CFU_INPUT_2_KIND; + assign _zz_decode_CfuPlugin_CFU_INPUT_2_KIND = _zz_decode_CfuPlugin_CFU_INPUT_2_KIND_1; + assign when_Pipeline_l124_44 = (! execute_arbitration_isStuck); + assign _zz_execute_CfuPlugin_CFU_INPUT_2_KIND = decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND; + assign when_Pipeline_l124_45 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_46 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_47 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_48 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_49 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_50 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_51 = (! execute_arbitration_isStuck); + assign when_Pipeline_l124_52 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_53 = (! writeBack_arbitration_isStuck); + assign when_Pipeline_l124_54 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_55 = (! writeBack_arbitration_isStuck); + assign when_Pipeline_l124_56 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_57 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_58 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_59 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_60 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_61 = (! writeBack_arbitration_isStuck); + assign when_Pipeline_l124_62 = (! memory_arbitration_isStuck); + assign when_Pipeline_l124_63 = (! writeBack_arbitration_isStuck); + assign when_Pipeline_l124_64 = (! writeBack_arbitration_isStuck); + assign decode_arbitration_isFlushed = (({writeBack_arbitration_flushNext,{memory_arbitration_flushNext,execute_arbitration_flushNext}} != 3'b000) || ({writeBack_arbitration_flushIt,{memory_arbitration_flushIt,{execute_arbitration_flushIt,decode_arbitration_flushIt}}} != 4'b0000)); + assign execute_arbitration_isFlushed = (({writeBack_arbitration_flushNext,memory_arbitration_flushNext} != 2'b00) || ({writeBack_arbitration_flushIt,{memory_arbitration_flushIt,execute_arbitration_flushIt}} != 3'b000)); + assign memory_arbitration_isFlushed = ((writeBack_arbitration_flushNext != 1'b0) || ({writeBack_arbitration_flushIt,memory_arbitration_flushIt} != 2'b00)); + assign writeBack_arbitration_isFlushed = (1'b0 || (writeBack_arbitration_flushIt != 1'b0)); + assign decode_arbitration_isStuckByOthers = (decode_arbitration_haltByOther || (((1'b0 || execute_arbitration_isStuck) || memory_arbitration_isStuck) || writeBack_arbitration_isStuck)); + assign decode_arbitration_isStuck = (decode_arbitration_haltItself || decode_arbitration_isStuckByOthers); + assign decode_arbitration_isMoving = ((! decode_arbitration_isStuck) && (! decode_arbitration_removeIt)); + assign decode_arbitration_isFiring = ((decode_arbitration_isValid && (! decode_arbitration_isStuck)) && (! decode_arbitration_removeIt)); + assign execute_arbitration_isStuckByOthers = (execute_arbitration_haltByOther || ((1'b0 || memory_arbitration_isStuck) || writeBack_arbitration_isStuck)); + assign execute_arbitration_isStuck = (execute_arbitration_haltItself || execute_arbitration_isStuckByOthers); + assign execute_arbitration_isMoving = ((! execute_arbitration_isStuck) && (! execute_arbitration_removeIt)); + assign execute_arbitration_isFiring = ((execute_arbitration_isValid && (! execute_arbitration_isStuck)) && (! execute_arbitration_removeIt)); + assign memory_arbitration_isStuckByOthers = (memory_arbitration_haltByOther || (1'b0 || writeBack_arbitration_isStuck)); + assign memory_arbitration_isStuck = (memory_arbitration_haltItself || memory_arbitration_isStuckByOthers); + assign memory_arbitration_isMoving = ((! memory_arbitration_isStuck) && (! memory_arbitration_removeIt)); + assign memory_arbitration_isFiring = ((memory_arbitration_isValid && (! memory_arbitration_isStuck)) && (! memory_arbitration_removeIt)); + assign writeBack_arbitration_isStuckByOthers = (writeBack_arbitration_haltByOther || 1'b0); + assign writeBack_arbitration_isStuck = (writeBack_arbitration_haltItself || writeBack_arbitration_isStuckByOthers); + assign writeBack_arbitration_isMoving = ((! writeBack_arbitration_isStuck) && (! writeBack_arbitration_removeIt)); + assign writeBack_arbitration_isFiring = ((writeBack_arbitration_isValid && (! writeBack_arbitration_isStuck)) && (! writeBack_arbitration_removeIt)); + assign when_Pipeline_l151 = ((! execute_arbitration_isStuck) || execute_arbitration_removeIt); + assign when_Pipeline_l154 = ((! decode_arbitration_isStuck) && (! decode_arbitration_removeIt)); + assign when_Pipeline_l151_1 = ((! memory_arbitration_isStuck) || memory_arbitration_removeIt); + assign when_Pipeline_l154_1 = ((! execute_arbitration_isStuck) && (! execute_arbitration_removeIt)); + assign when_Pipeline_l151_2 = ((! writeBack_arbitration_isStuck) || writeBack_arbitration_removeIt); + assign when_Pipeline_l154_2 = ((! memory_arbitration_isStuck) && (! memory_arbitration_removeIt)); + always @(*) begin + IBusCachedPlugin_injectionPort_ready = 1'b0; + case(switch_Fetcher_l362) + 3'b100 : begin + IBusCachedPlugin_injectionPort_ready = 1'b1; + end + default : begin + end + endcase + end + + assign when_Fetcher_l378 = (! decode_arbitration_isStuck); + assign when_CsrPlugin_l1264 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_1 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_2 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_3 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_4 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_5 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_6 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_7 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_8 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_9 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_10 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_11 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_12 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_13 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_14 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_15 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_16 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_17 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_18 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_19 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_20 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_21 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_22 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_23 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_24 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_25 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_26 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_27 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_28 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_29 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_30 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_31 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_32 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_33 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_34 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_35 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_36 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_37 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_38 = (! execute_arbitration_isStuck); + assign when_CsrPlugin_l1264_39 = (! execute_arbitration_isStuck); + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_10 = 32'h0; + if(execute_CsrPlugin_csr_3264) begin + _zz_CsrPlugin_csrMapping_readDataInit_10[12 : 0] = 13'h1000; + _zz_CsrPlugin_csrMapping_readDataInit_10[25 : 20] = 6'h20; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_11 = 32'h0; + if(execute_CsrPlugin_csr_3857) begin + _zz_CsrPlugin_csrMapping_readDataInit_11[3 : 0] = 4'b1011; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_12 = 32'h0; + if(execute_CsrPlugin_csr_3858) begin + _zz_CsrPlugin_csrMapping_readDataInit_12[4 : 0] = 5'h16; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_13 = 32'h0; + if(execute_CsrPlugin_csr_3859) begin + _zz_CsrPlugin_csrMapping_readDataInit_13[5 : 0] = 6'h21; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_14 = 32'h0; + if(execute_CsrPlugin_csr_769) begin + _zz_CsrPlugin_csrMapping_readDataInit_14[31 : 30] = CsrPlugin_misa_base; + _zz_CsrPlugin_csrMapping_readDataInit_14[25 : 0] = CsrPlugin_misa_extensions; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_15 = 32'h0; + if(execute_CsrPlugin_csr_768) begin + _zz_CsrPlugin_csrMapping_readDataInit_15[12 : 11] = CsrPlugin_mstatus_MPP; + _zz_CsrPlugin_csrMapping_readDataInit_15[7 : 7] = CsrPlugin_mstatus_MPIE; + _zz_CsrPlugin_csrMapping_readDataInit_15[3 : 3] = CsrPlugin_mstatus_MIE; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_16 = 32'h0; + if(execute_CsrPlugin_csr_836) begin + _zz_CsrPlugin_csrMapping_readDataInit_16[11 : 11] = CsrPlugin_mip_MEIP; + _zz_CsrPlugin_csrMapping_readDataInit_16[7 : 7] = CsrPlugin_mip_MTIP; + _zz_CsrPlugin_csrMapping_readDataInit_16[3 : 3] = CsrPlugin_mip_MSIP; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_17 = 32'h0; + if(execute_CsrPlugin_csr_772) begin + _zz_CsrPlugin_csrMapping_readDataInit_17[11 : 11] = CsrPlugin_mie_MEIE; + _zz_CsrPlugin_csrMapping_readDataInit_17[7 : 7] = CsrPlugin_mie_MTIE; + _zz_CsrPlugin_csrMapping_readDataInit_17[3 : 3] = CsrPlugin_mie_MSIE; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_18 = 32'h0; + if(execute_CsrPlugin_csr_773) begin + _zz_CsrPlugin_csrMapping_readDataInit_18[31 : 2] = CsrPlugin_mtvec_base; + _zz_CsrPlugin_csrMapping_readDataInit_18[1 : 0] = CsrPlugin_mtvec_mode; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_19 = 32'h0; + if(execute_CsrPlugin_csr_833) begin + _zz_CsrPlugin_csrMapping_readDataInit_19[31 : 0] = CsrPlugin_mepc; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_20 = 32'h0; + if(execute_CsrPlugin_csr_832) begin + _zz_CsrPlugin_csrMapping_readDataInit_20[31 : 0] = CsrPlugin_mscratch; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_21 = 32'h0; + if(execute_CsrPlugin_csr_834) begin + _zz_CsrPlugin_csrMapping_readDataInit_21[31 : 31] = CsrPlugin_mcause_interrupt; + _zz_CsrPlugin_csrMapping_readDataInit_21[3 : 0] = CsrPlugin_mcause_exceptionCode; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_22 = 32'h0; + if(execute_CsrPlugin_csr_835) begin + _zz_CsrPlugin_csrMapping_readDataInit_22[31 : 0] = CsrPlugin_mtval; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_23 = 32'h0; + if(execute_CsrPlugin_csr_2816) begin + _zz_CsrPlugin_csrMapping_readDataInit_23[31 : 0] = CsrPlugin_mcycle[31 : 0]; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_24 = 32'h0; + if(execute_CsrPlugin_csr_2944) begin + _zz_CsrPlugin_csrMapping_readDataInit_24[31 : 0] = CsrPlugin_mcycle[63 : 32]; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_25 = 32'h0; + if(execute_CsrPlugin_csr_2818) begin + _zz_CsrPlugin_csrMapping_readDataInit_25[31 : 0] = CsrPlugin_minstret[31 : 0]; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_26 = 32'h0; + if(execute_CsrPlugin_csr_2946) begin + _zz_CsrPlugin_csrMapping_readDataInit_26[31 : 0] = CsrPlugin_minstret[63 : 32]; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_27 = 32'h0; + if(execute_CsrPlugin_csr_3072) begin + _zz_CsrPlugin_csrMapping_readDataInit_27[31 : 0] = CsrPlugin_mcycle[31 : 0]; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_28 = 32'h0; + if(execute_CsrPlugin_csr_3200) begin + _zz_CsrPlugin_csrMapping_readDataInit_28[31 : 0] = CsrPlugin_mcycle[63 : 32]; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_29 = 32'h0; + if(execute_CsrPlugin_csr_3074) begin + _zz_CsrPlugin_csrMapping_readDataInit_29[31 : 0] = CsrPlugin_minstret[31 : 0]; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_30 = 32'h0; + if(execute_CsrPlugin_csr_3202) begin + _zz_CsrPlugin_csrMapping_readDataInit_30[31 : 0] = CsrPlugin_minstret[63 : 32]; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_31 = 32'h0; + if(execute_CsrPlugin_csr_3008) begin + _zz_CsrPlugin_csrMapping_readDataInit_31[31 : 0] = _zz_CsrPlugin_csrMapping_readDataInit; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_32 = 32'h0; + if(execute_CsrPlugin_csr_4032) begin + _zz_CsrPlugin_csrMapping_readDataInit_32[31 : 0] = _zz_CsrPlugin_csrMapping_readDataInit_1; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_33 = 32'h0; + if(execute_CsrPlugin_csr_2820) begin + _zz_CsrPlugin_csrMapping_readDataInit_33[31 : 0] = _zz_CsrPlugin_csrMapping_readDataInit_2; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_34 = 32'h0; + if(execute_CsrPlugin_csr_2822) begin + _zz_CsrPlugin_csrMapping_readDataInit_34[31 : 0] = _zz_CsrPlugin_csrMapping_readDataInit_3; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_35 = 32'h0; + if(execute_CsrPlugin_csr_2824) begin + _zz_CsrPlugin_csrMapping_readDataInit_35[31 : 0] = _zz_CsrPlugin_csrMapping_readDataInit_4; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_36 = 32'h0; + if(execute_CsrPlugin_csr_2826) begin + _zz_CsrPlugin_csrMapping_readDataInit_36[31 : 0] = _zz_CsrPlugin_csrMapping_readDataInit_5; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_37 = 32'h0; + if(execute_CsrPlugin_csr_2828) begin + _zz_CsrPlugin_csrMapping_readDataInit_37[31 : 0] = _zz_CsrPlugin_csrMapping_readDataInit_6; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_38 = 32'h0; + if(execute_CsrPlugin_csr_2830) begin + _zz_CsrPlugin_csrMapping_readDataInit_38[31 : 0] = _zz_CsrPlugin_csrMapping_readDataInit_7; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_39 = 32'h0; + if(execute_CsrPlugin_csr_2832) begin + _zz_CsrPlugin_csrMapping_readDataInit_39[31 : 0] = _zz_CsrPlugin_csrMapping_readDataInit_8; + end + end + + always @(*) begin + _zz_CsrPlugin_csrMapping_readDataInit_40 = 32'h0; + if(execute_CsrPlugin_csr_2834) begin + _zz_CsrPlugin_csrMapping_readDataInit_40[31 : 0] = _zz_CsrPlugin_csrMapping_readDataInit_9; + end + end + + assign CsrPlugin_csrMapping_readDataInit = (((((_zz_CsrPlugin_csrMapping_readDataInit_10 | _zz_CsrPlugin_csrMapping_readDataInit_11) | (_zz_CsrPlugin_csrMapping_readDataInit_12 | _zz_CsrPlugin_csrMapping_readDataInit_13)) | ((_zz_CsrPlugin_csrMapping_readDataInit_41 | _zz_CsrPlugin_csrMapping_readDataInit_14) | (_zz_CsrPlugin_csrMapping_readDataInit_15 | _zz_CsrPlugin_csrMapping_readDataInit_16))) | (((_zz_CsrPlugin_csrMapping_readDataInit_17 | _zz_CsrPlugin_csrMapping_readDataInit_18) | (_zz_CsrPlugin_csrMapping_readDataInit_19 | _zz_CsrPlugin_csrMapping_readDataInit_20)) | ((_zz_CsrPlugin_csrMapping_readDataInit_21 | _zz_CsrPlugin_csrMapping_readDataInit_22) | (_zz_CsrPlugin_csrMapping_readDataInit_23 | _zz_CsrPlugin_csrMapping_readDataInit_24)))) | ((((_zz_CsrPlugin_csrMapping_readDataInit_25 | _zz_CsrPlugin_csrMapping_readDataInit_26) | (_zz_CsrPlugin_csrMapping_readDataInit_27 | _zz_CsrPlugin_csrMapping_readDataInit_28)) | ((_zz_CsrPlugin_csrMapping_readDataInit_29 | _zz_CsrPlugin_csrMapping_readDataInit_30) | (_zz_CsrPlugin_csrMapping_readDataInit_31 | _zz_CsrPlugin_csrMapping_readDataInit_32))) | (((_zz_CsrPlugin_csrMapping_readDataInit_33 | _zz_CsrPlugin_csrMapping_readDataInit_34) | (_zz_CsrPlugin_csrMapping_readDataInit_35 | _zz_CsrPlugin_csrMapping_readDataInit_36)) | ((_zz_CsrPlugin_csrMapping_readDataInit_37 | _zz_CsrPlugin_csrMapping_readDataInit_38) | (_zz_CsrPlugin_csrMapping_readDataInit_39 | _zz_CsrPlugin_csrMapping_readDataInit_40))))); + assign when_CsrPlugin_l1297 = (CsrPlugin_privilege < execute_CsrPlugin_csrAddress[9 : 8]); + assign when_CsrPlugin_l1302 = ((! execute_arbitration_isValid) || (! execute_IS_CSR)); + assign iBusWishbone_ADR = {_zz_iBusWishbone_ADR_1,_zz_iBusWishbone_ADR}; + assign iBusWishbone_CTI = ((_zz_iBusWishbone_ADR == 3'b111) ? 3'b111 : 3'b010); + assign iBusWishbone_BTE = 2'b00; + assign iBusWishbone_SEL = 4'b1111; + assign iBusWishbone_WE = 1'b0; + assign iBusWishbone_DAT_MOSI = 32'bxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx; + always @(*) begin + iBusWishbone_CYC = 1'b0; + if(when_InstructionCache_l239) begin + iBusWishbone_CYC = 1'b1; + end + end + + always @(*) begin + iBusWishbone_STB = 1'b0; + if(when_InstructionCache_l239) begin + iBusWishbone_STB = 1'b1; + end + end + + assign when_InstructionCache_l239 = (iBus_cmd_valid || (_zz_iBusWishbone_ADR != 3'b000)); + assign iBus_cmd_ready = (iBus_cmd_valid && iBusWishbone_ACK); + assign iBus_rsp_valid = _zz_iBus_rsp_valid; + assign iBus_rsp_payload_data = iBusWishbone_DAT_MISO_regNext; + assign iBus_rsp_payload_error = 1'b0; + assign _zz_dBus_cmd_ready_5 = (dBus_cmd_payload_size == 3'b101); + assign _zz_dBus_cmd_ready_1 = dBus_cmd_valid; + assign _zz_dBus_cmd_ready_3 = dBus_cmd_payload_wr; + assign _zz_dBus_cmd_ready_4 = ((! _zz_dBus_cmd_ready_5) || (_zz_dBus_cmd_ready == 3'b111)); + assign dBus_cmd_ready = (_zz_dBus_cmd_ready_2 && (_zz_dBus_cmd_ready_3 || _zz_dBus_cmd_ready_4)); + assign dBusWishbone_ADR = ((_zz_dBus_cmd_ready_5 ? {{dBus_cmd_payload_address[31 : 5],_zz_dBus_cmd_ready},2'b00} : {dBus_cmd_payload_address[31 : 2],2'b00}) >>> 2); + assign dBusWishbone_CTI = (_zz_dBus_cmd_ready_5 ? (_zz_dBus_cmd_ready_4 ? 3'b111 : 3'b010) : 3'b000); + assign dBusWishbone_BTE = 2'b00; + assign dBusWishbone_SEL = (_zz_dBus_cmd_ready_3 ? dBus_cmd_payload_mask : 4'b1111); + assign dBusWishbone_WE = _zz_dBus_cmd_ready_3; + assign dBusWishbone_DAT_MOSI = dBus_cmd_payload_data; + assign _zz_dBus_cmd_ready_2 = (_zz_dBus_cmd_ready_1 && dBusWishbone_ACK); + assign dBusWishbone_CYC = _zz_dBus_cmd_ready_1; + assign dBusWishbone_STB = _zz_dBus_cmd_ready_1; + assign dBus_rsp_valid = _zz_dBus_rsp_valid; + assign dBus_rsp_payload_data = dBusWishbone_DAT_MISO_regNext; + assign dBus_rsp_payload_error = 1'b0; + always @(posedge clk) begin + if(reset) begin + IBusCachedPlugin_fetchPc_pcReg <= externalResetVector; + IBusCachedPlugin_fetchPc_correctionReg <= 1'b0; + IBusCachedPlugin_fetchPc_booted <= 1'b0; + IBusCachedPlugin_fetchPc_inc <= 1'b0; + _zz_IBusCachedPlugin_iBusRsp_stages_0_output_ready_2 <= 1'b0; + _zz_IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_valid <= 1'b0; + IBusCachedPlugin_injector_nextPcCalc_valids_0 <= 1'b0; + IBusCachedPlugin_injector_nextPcCalc_valids_1 <= 1'b0; + IBusCachedPlugin_injector_nextPcCalc_valids_2 <= 1'b0; + IBusCachedPlugin_injector_nextPcCalc_valids_3 <= 1'b0; + IBusCachedPlugin_injector_nextPcCalc_valids_4 <= 1'b0; + IBusCachedPlugin_rspCounter <= _zz_IBusCachedPlugin_rspCounter; + IBusCachedPlugin_rspCounter <= 32'h0; + dataCache_1_io_mem_cmd_rValid <= 1'b0; + dataCache_1_io_mem_cmd_s2mPipe_rValid <= 1'b0; + DBusCachedPlugin_rspCounter <= _zz_DBusCachedPlugin_rspCounter; + DBusCachedPlugin_rspCounter <= 32'h0; + _zz_7 <= 1'b1; + HazardSimplePlugin_writeBackBuffer_valid <= 1'b0; + CsrPlugin_misa_base <= 2'b01; + CsrPlugin_misa_extensions <= 26'h0000042; + CsrPlugin_mstatus_MIE <= 1'b0; + CsrPlugin_mstatus_MPIE <= 1'b0; + CsrPlugin_mstatus_MPP <= 2'b11; + CsrPlugin_mie_MEIE <= 1'b0; + CsrPlugin_mie_MTIE <= 1'b0; + CsrPlugin_mie_MSIE <= 1'b0; + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_decode <= 1'b0; + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_execute <= 1'b0; + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_memory <= 1'b0; + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_writeBack <= 1'b0; + CsrPlugin_interrupt_valid <= 1'b0; + CsrPlugin_lastStageWasWfi <= 1'b0; + CsrPlugin_pipelineLiberator_pcValids_0 <= 1'b0; + CsrPlugin_pipelineLiberator_pcValids_1 <= 1'b0; + CsrPlugin_pipelineLiberator_pcValids_2 <= 1'b0; + CsrPlugin_hadException <= 1'b0; + execute_CsrPlugin_wfiWake <= 1'b0; + memory_DivPlugin_div_counter_value <= 6'h0; + _zz_CsrPlugin_csrMapping_readDataInit <= 32'h0; + execute_CfuPlugin_hold <= 1'b0; + execute_CfuPlugin_fired <= 1'b0; + CfuPlugin_bus_rsp_rValid <= 1'b0; + execute_arbitration_isValid <= 1'b0; + memory_arbitration_isValid <= 1'b0; + writeBack_arbitration_isValid <= 1'b0; + switch_Fetcher_l362 <= 3'b000; + execute_to_memory_CfuPlugin_CFU_IN_FLIGHT <= 1'b0; + _zz_iBusWishbone_ADR <= 3'b000; + _zz_iBus_rsp_valid <= 1'b0; + _zz_dBus_cmd_ready <= 3'b000; + _zz_dBus_rsp_valid <= 1'b0; + end else begin + if(IBusCachedPlugin_fetchPc_correction) begin + IBusCachedPlugin_fetchPc_correctionReg <= 1'b1; + end + if(IBusCachedPlugin_fetchPc_output_fire) begin + IBusCachedPlugin_fetchPc_correctionReg <= 1'b0; + end + IBusCachedPlugin_fetchPc_booted <= 1'b1; + if(when_Fetcher_l131) begin + IBusCachedPlugin_fetchPc_inc <= 1'b0; + end + if(IBusCachedPlugin_fetchPc_output_fire_1) begin + IBusCachedPlugin_fetchPc_inc <= 1'b1; + end + if(when_Fetcher_l131_1) begin + IBusCachedPlugin_fetchPc_inc <= 1'b0; + end + if(when_Fetcher_l158) begin + IBusCachedPlugin_fetchPc_pcReg <= IBusCachedPlugin_fetchPc_pc; + end + if(IBusCachedPlugin_iBusRsp_flush) begin + _zz_IBusCachedPlugin_iBusRsp_stages_0_output_ready_2 <= 1'b0; + end + if(_zz_IBusCachedPlugin_iBusRsp_stages_0_output_ready) begin + _zz_IBusCachedPlugin_iBusRsp_stages_0_output_ready_2 <= (IBusCachedPlugin_iBusRsp_stages_0_output_valid && (! 1'b0)); + end + if(IBusCachedPlugin_iBusRsp_flush) begin + _zz_IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_valid <= 1'b0; + end + if(IBusCachedPlugin_iBusRsp_stages_1_output_ready) begin + _zz_IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_valid <= (IBusCachedPlugin_iBusRsp_stages_1_output_valid && (! IBusCachedPlugin_iBusRsp_flush)); + end + if(IBusCachedPlugin_fetchPc_flushed) begin + IBusCachedPlugin_injector_nextPcCalc_valids_0 <= 1'b0; + end + if(when_Fetcher_l329) begin + IBusCachedPlugin_injector_nextPcCalc_valids_0 <= 1'b1; + end + if(IBusCachedPlugin_fetchPc_flushed) begin + IBusCachedPlugin_injector_nextPcCalc_valids_1 <= 1'b0; + end + if(when_Fetcher_l329_1) begin + IBusCachedPlugin_injector_nextPcCalc_valids_1 <= IBusCachedPlugin_injector_nextPcCalc_valids_0; + end + if(IBusCachedPlugin_fetchPc_flushed) begin + IBusCachedPlugin_injector_nextPcCalc_valids_1 <= 1'b0; + end + if(IBusCachedPlugin_fetchPc_flushed) begin + IBusCachedPlugin_injector_nextPcCalc_valids_2 <= 1'b0; + end + if(when_Fetcher_l329_2) begin + IBusCachedPlugin_injector_nextPcCalc_valids_2 <= IBusCachedPlugin_injector_nextPcCalc_valids_1; + end + if(IBusCachedPlugin_fetchPc_flushed) begin + IBusCachedPlugin_injector_nextPcCalc_valids_2 <= 1'b0; + end + if(IBusCachedPlugin_fetchPc_flushed) begin + IBusCachedPlugin_injector_nextPcCalc_valids_3 <= 1'b0; + end + if(when_Fetcher_l329_3) begin + IBusCachedPlugin_injector_nextPcCalc_valids_3 <= IBusCachedPlugin_injector_nextPcCalc_valids_2; + end + if(IBusCachedPlugin_fetchPc_flushed) begin + IBusCachedPlugin_injector_nextPcCalc_valids_3 <= 1'b0; + end + if(IBusCachedPlugin_fetchPc_flushed) begin + IBusCachedPlugin_injector_nextPcCalc_valids_4 <= 1'b0; + end + if(when_Fetcher_l329_4) begin + IBusCachedPlugin_injector_nextPcCalc_valids_4 <= IBusCachedPlugin_injector_nextPcCalc_valids_3; + end + if(IBusCachedPlugin_fetchPc_flushed) begin + IBusCachedPlugin_injector_nextPcCalc_valids_4 <= 1'b0; + end + if(iBus_rsp_valid) begin + IBusCachedPlugin_rspCounter <= (IBusCachedPlugin_rspCounter + 32'h00000001); + end + if(dataCache_1_io_mem_cmd_valid) begin + dataCache_1_io_mem_cmd_rValid <= 1'b1; + end + if(dataCache_1_io_mem_cmd_s2mPipe_ready) begin + dataCache_1_io_mem_cmd_rValid <= 1'b0; + end + if(dataCache_1_io_mem_cmd_s2mPipe_ready) begin + dataCache_1_io_mem_cmd_s2mPipe_rValid <= dataCache_1_io_mem_cmd_s2mPipe_valid; + end + if(dBus_rsp_valid) begin + DBusCachedPlugin_rspCounter <= (DBusCachedPlugin_rspCounter + 32'h00000001); + end + _zz_7 <= 1'b0; + HazardSimplePlugin_writeBackBuffer_valid <= HazardSimplePlugin_writeBackWrites_valid; + if(when_CsrPlugin_l909) begin + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_decode <= 1'b0; + end else begin + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_decode <= CsrPlugin_exceptionPortCtrl_exceptionValids_decode; + end + if(when_CsrPlugin_l909_1) begin + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_execute <= (CsrPlugin_exceptionPortCtrl_exceptionValids_decode && (! decode_arbitration_isStuck)); + end else begin + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_execute <= CsrPlugin_exceptionPortCtrl_exceptionValids_execute; + end + if(when_CsrPlugin_l909_2) begin + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_memory <= (CsrPlugin_exceptionPortCtrl_exceptionValids_execute && (! execute_arbitration_isStuck)); + end else begin + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_memory <= CsrPlugin_exceptionPortCtrl_exceptionValids_memory; + end + if(when_CsrPlugin_l909_3) begin + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_writeBack <= (CsrPlugin_exceptionPortCtrl_exceptionValids_memory && (! memory_arbitration_isStuck)); + end else begin + CsrPlugin_exceptionPortCtrl_exceptionValidsRegs_writeBack <= 1'b0; + end + CsrPlugin_interrupt_valid <= 1'b0; + if(when_CsrPlugin_l946) begin + if(when_CsrPlugin_l952) begin + CsrPlugin_interrupt_valid <= 1'b1; + end + if(when_CsrPlugin_l952_1) begin + CsrPlugin_interrupt_valid <= 1'b1; + end + if(when_CsrPlugin_l952_2) begin + CsrPlugin_interrupt_valid <= 1'b1; + end + end + CsrPlugin_lastStageWasWfi <= (writeBack_arbitration_isFiring && (writeBack_ENV_CTRL == `EnvCtrlEnum_binary_sequential_WFI)); + if(CsrPlugin_pipelineLiberator_active) begin + if(when_CsrPlugin_l980) begin + CsrPlugin_pipelineLiberator_pcValids_0 <= 1'b1; + end + if(when_CsrPlugin_l980_1) begin + CsrPlugin_pipelineLiberator_pcValids_1 <= CsrPlugin_pipelineLiberator_pcValids_0; + end + if(when_CsrPlugin_l980_2) begin + CsrPlugin_pipelineLiberator_pcValids_2 <= CsrPlugin_pipelineLiberator_pcValids_1; + end + end + if(when_CsrPlugin_l985) begin + CsrPlugin_pipelineLiberator_pcValids_0 <= 1'b0; + CsrPlugin_pipelineLiberator_pcValids_1 <= 1'b0; + CsrPlugin_pipelineLiberator_pcValids_2 <= 1'b0; + end + if(CsrPlugin_interruptJump) begin + CsrPlugin_interrupt_valid <= 1'b0; + end + CsrPlugin_hadException <= CsrPlugin_exception; + if(when_CsrPlugin_l1019) begin + case(CsrPlugin_targetPrivilege) + 2'b11 : begin + CsrPlugin_mstatus_MIE <= 1'b0; + CsrPlugin_mstatus_MPIE <= CsrPlugin_mstatus_MIE; + CsrPlugin_mstatus_MPP <= CsrPlugin_privilege; + end + default : begin + end + endcase + end + if(when_CsrPlugin_l1064) begin + case(switch_CsrPlugin_l1068) + 2'b11 : begin + CsrPlugin_mstatus_MPP <= 2'b00; + CsrPlugin_mstatus_MIE <= CsrPlugin_mstatus_MPIE; + CsrPlugin_mstatus_MPIE <= 1'b1; + end + default : begin + end + endcase + end + execute_CsrPlugin_wfiWake <= (({_zz_when_CsrPlugin_l952_2,{_zz_when_CsrPlugin_l952_1,_zz_when_CsrPlugin_l952}} != 3'b000) || CsrPlugin_thirdPartyWake); + memory_DivPlugin_div_counter_value <= memory_DivPlugin_div_counter_valueNext; + if(execute_CfuPlugin_schedule) begin + execute_CfuPlugin_hold <= 1'b1; + end + if(CfuPlugin_bus_cmd_ready) begin + execute_CfuPlugin_hold <= 1'b0; + end + if(CfuPlugin_bus_cmd_fire) begin + execute_CfuPlugin_fired <= 1'b1; + end + if(when_CfuPlugin_l171) begin + execute_CfuPlugin_fired <= 1'b0; + end + if(CfuPlugin_bus_rsp_valid) begin + CfuPlugin_bus_rsp_rValid <= 1'b1; + end + if(CfuPlugin_bus_rsp_rsp_ready) begin + CfuPlugin_bus_rsp_rValid <= 1'b0; + end + if(when_Pipeline_l124_62) begin + execute_to_memory_CfuPlugin_CFU_IN_FLIGHT <= _zz_execute_to_memory_CfuPlugin_CFU_IN_FLIGHT; + end + if(when_Pipeline_l151) begin + execute_arbitration_isValid <= 1'b0; + end + if(when_Pipeline_l154) begin + execute_arbitration_isValid <= decode_arbitration_isValid; + end + if(when_Pipeline_l151_1) begin + memory_arbitration_isValid <= 1'b0; + end + if(when_Pipeline_l154_1) begin + memory_arbitration_isValid <= execute_arbitration_isValid; + end + if(when_Pipeline_l151_2) begin + writeBack_arbitration_isValid <= 1'b0; + end + if(when_Pipeline_l154_2) begin + writeBack_arbitration_isValid <= memory_arbitration_isValid; + end + case(switch_Fetcher_l362) + 3'b000 : begin + if(IBusCachedPlugin_injectionPort_valid) begin + switch_Fetcher_l362 <= 3'b001; + end + end + 3'b001 : begin + switch_Fetcher_l362 <= 3'b010; + end + 3'b010 : begin + switch_Fetcher_l362 <= 3'b011; + end + 3'b011 : begin + if(when_Fetcher_l378) begin + switch_Fetcher_l362 <= 3'b100; + end + end + 3'b100 : begin + switch_Fetcher_l362 <= 3'b000; + end + default : begin + end + endcase + if(execute_CsrPlugin_csr_769) begin + if(execute_CsrPlugin_writeEnable) begin + CsrPlugin_misa_base <= CsrPlugin_csrMapping_writeDataSignal[31 : 30]; + CsrPlugin_misa_extensions <= CsrPlugin_csrMapping_writeDataSignal[25 : 0]; + end + end + if(execute_CsrPlugin_csr_768) begin + if(execute_CsrPlugin_writeEnable) begin + CsrPlugin_mstatus_MPP <= CsrPlugin_csrMapping_writeDataSignal[12 : 11]; + CsrPlugin_mstatus_MPIE <= CsrPlugin_csrMapping_writeDataSignal[7]; + CsrPlugin_mstatus_MIE <= CsrPlugin_csrMapping_writeDataSignal[3]; + end + end + if(execute_CsrPlugin_csr_772) begin + if(execute_CsrPlugin_writeEnable) begin + CsrPlugin_mie_MEIE <= CsrPlugin_csrMapping_writeDataSignal[11]; + CsrPlugin_mie_MTIE <= CsrPlugin_csrMapping_writeDataSignal[7]; + CsrPlugin_mie_MSIE <= CsrPlugin_csrMapping_writeDataSignal[3]; + end + end + if(execute_CsrPlugin_csr_3008) begin + if(execute_CsrPlugin_writeEnable) begin + _zz_CsrPlugin_csrMapping_readDataInit <= CsrPlugin_csrMapping_writeDataSignal[31 : 0]; + end + end + if(when_InstructionCache_l239) begin + if(iBusWishbone_ACK) begin + _zz_iBusWishbone_ADR <= (_zz_iBusWishbone_ADR + 3'b001); + end + end + _zz_iBus_rsp_valid <= (iBusWishbone_CYC && iBusWishbone_ACK); + if((_zz_dBus_cmd_ready_1 && _zz_dBus_cmd_ready_2)) begin + _zz_dBus_cmd_ready <= (_zz_dBus_cmd_ready + 3'b001); + if(_zz_dBus_cmd_ready_4) begin + _zz_dBus_cmd_ready <= 3'b000; + end + end + _zz_dBus_rsp_valid <= ((_zz_dBus_cmd_ready_1 && (! dBusWishbone_WE)) && dBusWishbone_ACK); + end + end + + always @(posedge clk) begin + if(IBusCachedPlugin_iBusRsp_stages_1_output_ready) begin + _zz_IBusCachedPlugin_iBusRsp_stages_1_output_m2sPipe_payload <= IBusCachedPlugin_iBusRsp_stages_1_output_payload; + end + if(IBusCachedPlugin_iBusRsp_stages_1_input_ready) begin + IBusCachedPlugin_s1_tightlyCoupledHit <= IBusCachedPlugin_s0_tightlyCoupledHit; + end + if(IBusCachedPlugin_iBusRsp_stages_2_input_ready) begin + IBusCachedPlugin_s2_tightlyCoupledHit <= IBusCachedPlugin_s1_tightlyCoupledHit; + end + if(dataCache_1_io_mem_cmd_ready) begin + dataCache_1_io_mem_cmd_rData_wr <= dataCache_1_io_mem_cmd_payload_wr; + dataCache_1_io_mem_cmd_rData_uncached <= dataCache_1_io_mem_cmd_payload_uncached; + dataCache_1_io_mem_cmd_rData_address <= dataCache_1_io_mem_cmd_payload_address; + dataCache_1_io_mem_cmd_rData_data <= dataCache_1_io_mem_cmd_payload_data; + dataCache_1_io_mem_cmd_rData_mask <= dataCache_1_io_mem_cmd_payload_mask; + dataCache_1_io_mem_cmd_rData_size <= dataCache_1_io_mem_cmd_payload_size; + dataCache_1_io_mem_cmd_rData_last <= dataCache_1_io_mem_cmd_payload_last; + end + if(dataCache_1_io_mem_cmd_s2mPipe_ready) begin + dataCache_1_io_mem_cmd_s2mPipe_rData_wr <= dataCache_1_io_mem_cmd_s2mPipe_payload_wr; + dataCache_1_io_mem_cmd_s2mPipe_rData_uncached <= dataCache_1_io_mem_cmd_s2mPipe_payload_uncached; + dataCache_1_io_mem_cmd_s2mPipe_rData_address <= dataCache_1_io_mem_cmd_s2mPipe_payload_address; + dataCache_1_io_mem_cmd_s2mPipe_rData_data <= dataCache_1_io_mem_cmd_s2mPipe_payload_data; + dataCache_1_io_mem_cmd_s2mPipe_rData_mask <= dataCache_1_io_mem_cmd_s2mPipe_payload_mask; + dataCache_1_io_mem_cmd_s2mPipe_rData_size <= dataCache_1_io_mem_cmd_s2mPipe_payload_size; + dataCache_1_io_mem_cmd_s2mPipe_rData_last <= dataCache_1_io_mem_cmd_s2mPipe_payload_last; + end + HazardSimplePlugin_writeBackBuffer_payload_address <= HazardSimplePlugin_writeBackWrites_payload_address; + HazardSimplePlugin_writeBackBuffer_payload_data <= HazardSimplePlugin_writeBackWrites_payload_data; + CsrPlugin_mip_MEIP <= externalInterrupt; + CsrPlugin_mip_MTIP <= timerInterrupt; + CsrPlugin_mip_MSIP <= softwareInterrupt; + CsrPlugin_mcycle <= (CsrPlugin_mcycle + 64'h0000000000000001); + if(writeBack_arbitration_isFiring) begin + CsrPlugin_minstret <= (CsrPlugin_minstret + 64'h0000000000000001); + end + if(_zz_when) begin + CsrPlugin_exceptionPortCtrl_exceptionContext_code <= (_zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_1 ? IBusCachedPlugin_decodeExceptionPort_payload_code : decodeExceptionPort_payload_code); + CsrPlugin_exceptionPortCtrl_exceptionContext_badAddr <= (_zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_1 ? IBusCachedPlugin_decodeExceptionPort_payload_badAddr : decodeExceptionPort_payload_badAddr); + end + if(_zz_when_1) begin + CsrPlugin_exceptionPortCtrl_exceptionContext_code <= (_zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_3 ? BranchPlugin_branchExceptionPort_payload_code : CsrPlugin_selfException_payload_code); + CsrPlugin_exceptionPortCtrl_exceptionContext_badAddr <= (_zz_CsrPlugin_exceptionPortCtrl_exceptionContext_code_3 ? BranchPlugin_branchExceptionPort_payload_badAddr : CsrPlugin_selfException_payload_badAddr); + end + if(DBusCachedPlugin_exceptionBus_valid) begin + CsrPlugin_exceptionPortCtrl_exceptionContext_code <= DBusCachedPlugin_exceptionBus_payload_code; + CsrPlugin_exceptionPortCtrl_exceptionContext_badAddr <= DBusCachedPlugin_exceptionBus_payload_badAddr; + end + if(when_CsrPlugin_l946) begin + if(when_CsrPlugin_l952) begin + CsrPlugin_interrupt_code <= 4'b0111; + CsrPlugin_interrupt_targetPrivilege <= 2'b11; + end + if(when_CsrPlugin_l952_1) begin + CsrPlugin_interrupt_code <= 4'b0011; + CsrPlugin_interrupt_targetPrivilege <= 2'b11; + end + if(when_CsrPlugin_l952_2) begin + CsrPlugin_interrupt_code <= 4'b1011; + CsrPlugin_interrupt_targetPrivilege <= 2'b11; + end + end + if(when_CsrPlugin_l1019) begin + case(CsrPlugin_targetPrivilege) + 2'b11 : begin + CsrPlugin_mcause_interrupt <= (! CsrPlugin_hadException); + CsrPlugin_mcause_exceptionCode <= CsrPlugin_trapCause; + CsrPlugin_mepc <= writeBack_PC; + if(CsrPlugin_hadException) begin + CsrPlugin_mtval <= CsrPlugin_exceptionPortCtrl_exceptionContext_badAddr; + end + end + default : begin + end + endcase + end + if(when_MulDivIterativePlugin_l126) begin + memory_DivPlugin_div_done <= 1'b1; + end + if(when_MulDivIterativePlugin_l126_1) begin + memory_DivPlugin_div_done <= 1'b0; + end + if(when_MulDivIterativePlugin_l128) begin + if(when_MulDivIterativePlugin_l132) begin + memory_DivPlugin_rs1[31 : 0] <= memory_DivPlugin_div_stage_0_outNumerator; + memory_DivPlugin_accumulator[31 : 0] <= memory_DivPlugin_div_stage_0_outRemainder; + if(when_MulDivIterativePlugin_l151) begin + memory_DivPlugin_div_result <= _zz_memory_DivPlugin_div_result_1[31:0]; + end + end + end + if(when_MulDivIterativePlugin_l162) begin + memory_DivPlugin_accumulator <= 65'h0; + memory_DivPlugin_rs1 <= ((_zz_memory_DivPlugin_rs1 ? (~ _zz_memory_DivPlugin_rs1_1) : _zz_memory_DivPlugin_rs1_1) + _zz_memory_DivPlugin_rs1_2); + memory_DivPlugin_rs2 <= ((_zz_memory_DivPlugin_rs2 ? (~ execute_RS2) : execute_RS2) + _zz_memory_DivPlugin_rs2_1); + memory_DivPlugin_div_needRevert <= ((_zz_memory_DivPlugin_rs1 ^ (_zz_memory_DivPlugin_rs2 && (! execute_INSTRUCTION[13]))) && (! (((execute_RS2 == 32'h0) && execute_IS_RS2_SIGNED) && (! execute_INSTRUCTION[13])))); + end + externalInterruptArray_regNext <= externalInterruptArray; + if(CfuPlugin_bus_rsp_ready) begin + CfuPlugin_bus_rsp_rData_outputs_0 <= CfuPlugin_bus_rsp_payload_outputs_0; + end + if(when_GenCoreDefault_l367) begin + _zz_CsrPlugin_csrMapping_readDataInit_2 <= (_zz_CsrPlugin_csrMapping_readDataInit_2 + 32'h00000001); + end + if(when_GenCoreDefault_l367_1) begin + _zz_CsrPlugin_csrMapping_readDataInit_3 <= (_zz_CsrPlugin_csrMapping_readDataInit_3 + 32'h00000001); + end + if(when_GenCoreDefault_l367_2) begin + _zz_CsrPlugin_csrMapping_readDataInit_4 <= (_zz_CsrPlugin_csrMapping_readDataInit_4 + 32'h00000001); + end + if(when_GenCoreDefault_l367_3) begin + _zz_CsrPlugin_csrMapping_readDataInit_5 <= (_zz_CsrPlugin_csrMapping_readDataInit_5 + 32'h00000001); + end + if(when_GenCoreDefault_l367_4) begin + _zz_CsrPlugin_csrMapping_readDataInit_6 <= (_zz_CsrPlugin_csrMapping_readDataInit_6 + 32'h00000001); + end + if(when_GenCoreDefault_l367_5) begin + _zz_CsrPlugin_csrMapping_readDataInit_7 <= (_zz_CsrPlugin_csrMapping_readDataInit_7 + 32'h00000001); + end + if(when_GenCoreDefault_l367_6) begin + _zz_CsrPlugin_csrMapping_readDataInit_8 <= (_zz_CsrPlugin_csrMapping_readDataInit_8 + 32'h00000001); + end + if(when_GenCoreDefault_l367_7) begin + _zz_CsrPlugin_csrMapping_readDataInit_9 <= (_zz_CsrPlugin_csrMapping_readDataInit_9 + 32'h00000001); + end + if(when_Pipeline_l124) begin + decode_to_execute_PC <= decode_PC; + end + if(when_Pipeline_l124_1) begin + execute_to_memory_PC <= _zz_execute_SRC2; + end + if(when_Pipeline_l124_2) begin + memory_to_writeBack_PC <= memory_PC; + end + if(when_Pipeline_l124_3) begin + decode_to_execute_INSTRUCTION <= decode_INSTRUCTION; + end + if(when_Pipeline_l124_4) begin + execute_to_memory_INSTRUCTION <= execute_INSTRUCTION; + end + if(when_Pipeline_l124_5) begin + memory_to_writeBack_INSTRUCTION <= memory_INSTRUCTION; + end + if(when_Pipeline_l124_6) begin + decode_to_execute_FORMAL_PC_NEXT <= _zz_decode_to_execute_FORMAL_PC_NEXT; + end + if(when_Pipeline_l124_7) begin + execute_to_memory_FORMAL_PC_NEXT <= _zz_execute_to_memory_FORMAL_PC_NEXT; + end + if(when_Pipeline_l124_8) begin + memory_to_writeBack_FORMAL_PC_NEXT <= memory_FORMAL_PC_NEXT; + end + if(when_Pipeline_l124_9) begin + decode_to_execute_MEMORY_FORCE_CONSTISTENCY <= decode_MEMORY_FORCE_CONSTISTENCY; + end + if(when_Pipeline_l124_10) begin + decode_to_execute_SRC1_CTRL <= _zz_decode_to_execute_SRC1_CTRL; + end + if(when_Pipeline_l124_11) begin + decode_to_execute_SRC_USE_SUB_LESS <= decode_SRC_USE_SUB_LESS; + end + if(when_Pipeline_l124_12) begin + decode_to_execute_MEMORY_ENABLE <= decode_MEMORY_ENABLE; + end + if(when_Pipeline_l124_13) begin + execute_to_memory_MEMORY_ENABLE <= execute_MEMORY_ENABLE; + end + if(when_Pipeline_l124_14) begin + memory_to_writeBack_MEMORY_ENABLE <= memory_MEMORY_ENABLE; + end + if(when_Pipeline_l124_15) begin + decode_to_execute_ALU_CTRL <= _zz_decode_to_execute_ALU_CTRL; + end + if(when_Pipeline_l124_16) begin + decode_to_execute_SRC2_CTRL <= _zz_decode_to_execute_SRC2_CTRL; + end + if(when_Pipeline_l124_17) begin + decode_to_execute_REGFILE_WRITE_VALID <= decode_REGFILE_WRITE_VALID; + end + if(when_Pipeline_l124_18) begin + execute_to_memory_REGFILE_WRITE_VALID <= execute_REGFILE_WRITE_VALID; + end + if(when_Pipeline_l124_19) begin + memory_to_writeBack_REGFILE_WRITE_VALID <= memory_REGFILE_WRITE_VALID; + end + if(when_Pipeline_l124_20) begin + decode_to_execute_BYPASSABLE_EXECUTE_STAGE <= decode_BYPASSABLE_EXECUTE_STAGE; + end + if(when_Pipeline_l124_21) begin + decode_to_execute_BYPASSABLE_MEMORY_STAGE <= decode_BYPASSABLE_MEMORY_STAGE; + end + if(when_Pipeline_l124_22) begin + execute_to_memory_BYPASSABLE_MEMORY_STAGE <= execute_BYPASSABLE_MEMORY_STAGE; + end + if(when_Pipeline_l124_23) begin + decode_to_execute_MEMORY_WR <= decode_MEMORY_WR; + end + if(when_Pipeline_l124_24) begin + execute_to_memory_MEMORY_WR <= execute_MEMORY_WR; + end + if(when_Pipeline_l124_25) begin + memory_to_writeBack_MEMORY_WR <= memory_MEMORY_WR; + end + if(when_Pipeline_l124_26) begin + decode_to_execute_MEMORY_MANAGMENT <= decode_MEMORY_MANAGMENT; + end + if(when_Pipeline_l124_27) begin + decode_to_execute_SRC_LESS_UNSIGNED <= decode_SRC_LESS_UNSIGNED; + end + if(when_Pipeline_l124_28) begin + decode_to_execute_ALU_BITWISE_CTRL <= _zz_decode_to_execute_ALU_BITWISE_CTRL; + end + if(when_Pipeline_l124_29) begin + decode_to_execute_SHIFT_CTRL <= _zz_decode_to_execute_SHIFT_CTRL; + end + if(when_Pipeline_l124_30) begin + execute_to_memory_SHIFT_CTRL <= _zz_execute_to_memory_SHIFT_CTRL; + end + if(when_Pipeline_l124_31) begin + decode_to_execute_BRANCH_CTRL <= _zz_decode_to_execute_BRANCH_CTRL; + end + if(when_Pipeline_l124_32) begin + decode_to_execute_IS_CSR <= decode_IS_CSR; + end + if(when_Pipeline_l124_33) begin + decode_to_execute_ENV_CTRL <= _zz_decode_to_execute_ENV_CTRL; + end + if(when_Pipeline_l124_34) begin + execute_to_memory_ENV_CTRL <= _zz_execute_to_memory_ENV_CTRL; + end + if(when_Pipeline_l124_35) begin + memory_to_writeBack_ENV_CTRL <= _zz_memory_to_writeBack_ENV_CTRL; + end + if(when_Pipeline_l124_36) begin + decode_to_execute_IS_MUL <= decode_IS_MUL; + end + if(when_Pipeline_l124_37) begin + execute_to_memory_IS_MUL <= execute_IS_MUL; + end + if(when_Pipeline_l124_38) begin + memory_to_writeBack_IS_MUL <= memory_IS_MUL; + end + if(when_Pipeline_l124_39) begin + decode_to_execute_IS_DIV <= decode_IS_DIV; + end + if(when_Pipeline_l124_40) begin + execute_to_memory_IS_DIV <= execute_IS_DIV; + end + if(when_Pipeline_l124_41) begin + decode_to_execute_IS_RS1_SIGNED <= decode_IS_RS1_SIGNED; + end + if(when_Pipeline_l124_42) begin + decode_to_execute_IS_RS2_SIGNED <= decode_IS_RS2_SIGNED; + end + if(when_Pipeline_l124_43) begin + decode_to_execute_CfuPlugin_CFU_ENABLE <= decode_CfuPlugin_CFU_ENABLE; + end + if(when_Pipeline_l124_44) begin + decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND <= _zz_decode_to_execute_CfuPlugin_CFU_INPUT_2_KIND; + end + if(when_Pipeline_l124_45) begin + decode_to_execute_RS1 <= decode_RS1; + end + if(when_Pipeline_l124_46) begin + decode_to_execute_RS2 <= decode_RS2; + end + if(when_Pipeline_l124_47) begin + decode_to_execute_SRC2_FORCE_ZERO <= decode_SRC2_FORCE_ZERO; + end + if(when_Pipeline_l124_48) begin + decode_to_execute_PREDICTION_HAD_BRANCHED2 <= decode_PREDICTION_HAD_BRANCHED2; + end + if(when_Pipeline_l124_49) begin + decode_to_execute_CSR_WRITE_OPCODE <= decode_CSR_WRITE_OPCODE; + end + if(when_Pipeline_l124_50) begin + decode_to_execute_CSR_READ_OPCODE <= decode_CSR_READ_OPCODE; + end + if(when_Pipeline_l124_51) begin + decode_to_execute_DO_EBREAK <= decode_DO_EBREAK; + end + if(when_Pipeline_l124_52) begin + execute_to_memory_MEMORY_STORE_DATA_RF <= execute_MEMORY_STORE_DATA_RF; + end + if(when_Pipeline_l124_53) begin + memory_to_writeBack_MEMORY_STORE_DATA_RF <= memory_MEMORY_STORE_DATA_RF; + end + if(when_Pipeline_l124_54) begin + execute_to_memory_REGFILE_WRITE_DATA <= _zz_decode_RS2; + end + if(when_Pipeline_l124_55) begin + memory_to_writeBack_REGFILE_WRITE_DATA <= _zz_decode_RS2_1; + end + if(when_Pipeline_l124_56) begin + execute_to_memory_SHIFT_RIGHT <= execute_SHIFT_RIGHT; + end + if(when_Pipeline_l124_57) begin + execute_to_memory_MUL_LL <= execute_MUL_LL; + end + if(when_Pipeline_l124_58) begin + execute_to_memory_MUL_LH <= execute_MUL_LH; + end + if(when_Pipeline_l124_59) begin + execute_to_memory_MUL_HL <= execute_MUL_HL; + end + if(when_Pipeline_l124_60) begin + execute_to_memory_MUL_HH <= execute_MUL_HH; + end + if(when_Pipeline_l124_61) begin + memory_to_writeBack_MUL_HH <= memory_MUL_HH; + end + if(when_Pipeline_l124_63) begin + memory_to_writeBack_CfuPlugin_CFU_IN_FLIGHT <= _zz_memory_to_writeBack_CfuPlugin_CFU_IN_FLIGHT; + end + if(when_Pipeline_l124_64) begin + memory_to_writeBack_MUL_LOW <= memory_MUL_LOW; + end + if(when_CsrPlugin_l1264) begin + execute_CsrPlugin_csr_3264 <= (decode_INSTRUCTION[31 : 20] == 12'hcc0); + end + if(when_CsrPlugin_l1264_1) begin + execute_CsrPlugin_csr_3857 <= (decode_INSTRUCTION[31 : 20] == 12'hf11); + end + if(when_CsrPlugin_l1264_2) begin + execute_CsrPlugin_csr_3858 <= (decode_INSTRUCTION[31 : 20] == 12'hf12); + end + if(when_CsrPlugin_l1264_3) begin + execute_CsrPlugin_csr_3859 <= (decode_INSTRUCTION[31 : 20] == 12'hf13); + end + if(when_CsrPlugin_l1264_4) begin + execute_CsrPlugin_csr_3860 <= (decode_INSTRUCTION[31 : 20] == 12'hf14); + end + if(when_CsrPlugin_l1264_5) begin + execute_CsrPlugin_csr_769 <= (decode_INSTRUCTION[31 : 20] == 12'h301); + end + if(when_CsrPlugin_l1264_6) begin + execute_CsrPlugin_csr_768 <= (decode_INSTRUCTION[31 : 20] == 12'h300); + end + if(when_CsrPlugin_l1264_7) begin + execute_CsrPlugin_csr_836 <= (decode_INSTRUCTION[31 : 20] == 12'h344); + end + if(when_CsrPlugin_l1264_8) begin + execute_CsrPlugin_csr_772 <= (decode_INSTRUCTION[31 : 20] == 12'h304); + end + if(when_CsrPlugin_l1264_9) begin + execute_CsrPlugin_csr_773 <= (decode_INSTRUCTION[31 : 20] == 12'h305); + end + if(when_CsrPlugin_l1264_10) begin + execute_CsrPlugin_csr_833 <= (decode_INSTRUCTION[31 : 20] == 12'h341); + end + if(when_CsrPlugin_l1264_11) begin + execute_CsrPlugin_csr_832 <= (decode_INSTRUCTION[31 : 20] == 12'h340); + end + if(when_CsrPlugin_l1264_12) begin + execute_CsrPlugin_csr_834 <= (decode_INSTRUCTION[31 : 20] == 12'h342); + end + if(when_CsrPlugin_l1264_13) begin + execute_CsrPlugin_csr_835 <= (decode_INSTRUCTION[31 : 20] == 12'h343); + end + if(when_CsrPlugin_l1264_14) begin + execute_CsrPlugin_csr_2816 <= (decode_INSTRUCTION[31 : 20] == 12'hb00); + end + if(when_CsrPlugin_l1264_15) begin + execute_CsrPlugin_csr_2944 <= (decode_INSTRUCTION[31 : 20] == 12'hb80); + end + if(when_CsrPlugin_l1264_16) begin + execute_CsrPlugin_csr_2818 <= (decode_INSTRUCTION[31 : 20] == 12'hb02); + end + if(when_CsrPlugin_l1264_17) begin + execute_CsrPlugin_csr_2946 <= (decode_INSTRUCTION[31 : 20] == 12'hb82); + end + if(when_CsrPlugin_l1264_18) begin + execute_CsrPlugin_csr_3072 <= (decode_INSTRUCTION[31 : 20] == 12'hc00); + end + if(when_CsrPlugin_l1264_19) begin + execute_CsrPlugin_csr_3200 <= (decode_INSTRUCTION[31 : 20] == 12'hc80); + end + if(when_CsrPlugin_l1264_20) begin + execute_CsrPlugin_csr_3074 <= (decode_INSTRUCTION[31 : 20] == 12'hc02); + end + if(when_CsrPlugin_l1264_21) begin + execute_CsrPlugin_csr_3202 <= (decode_INSTRUCTION[31 : 20] == 12'hc82); + end + if(when_CsrPlugin_l1264_22) begin + execute_CsrPlugin_csr_3008 <= (decode_INSTRUCTION[31 : 20] == 12'hbc0); + end + if(when_CsrPlugin_l1264_23) begin + execute_CsrPlugin_csr_4032 <= (decode_INSTRUCTION[31 : 20] == 12'hfc0); + end + if(when_CsrPlugin_l1264_24) begin + execute_CsrPlugin_csr_2820 <= (decode_INSTRUCTION[31 : 20] == 12'hb04); + end + if(when_CsrPlugin_l1264_25) begin + execute_CsrPlugin_csr_2821 <= (decode_INSTRUCTION[31 : 20] == 12'hb05); + end + if(when_CsrPlugin_l1264_26) begin + execute_CsrPlugin_csr_2822 <= (decode_INSTRUCTION[31 : 20] == 12'hb06); + end + if(when_CsrPlugin_l1264_27) begin + execute_CsrPlugin_csr_2823 <= (decode_INSTRUCTION[31 : 20] == 12'hb07); + end + if(when_CsrPlugin_l1264_28) begin + execute_CsrPlugin_csr_2824 <= (decode_INSTRUCTION[31 : 20] == 12'hb08); + end + if(when_CsrPlugin_l1264_29) begin + execute_CsrPlugin_csr_2825 <= (decode_INSTRUCTION[31 : 20] == 12'hb09); + end + if(when_CsrPlugin_l1264_30) begin + execute_CsrPlugin_csr_2826 <= (decode_INSTRUCTION[31 : 20] == 12'hb0a); + end + if(when_CsrPlugin_l1264_31) begin + execute_CsrPlugin_csr_2827 <= (decode_INSTRUCTION[31 : 20] == 12'hb0b); + end + if(when_CsrPlugin_l1264_32) begin + execute_CsrPlugin_csr_2828 <= (decode_INSTRUCTION[31 : 20] == 12'hb0c); + end + if(when_CsrPlugin_l1264_33) begin + execute_CsrPlugin_csr_2829 <= (decode_INSTRUCTION[31 : 20] == 12'hb0d); + end + if(when_CsrPlugin_l1264_34) begin + execute_CsrPlugin_csr_2830 <= (decode_INSTRUCTION[31 : 20] == 12'hb0e); + end + if(when_CsrPlugin_l1264_35) begin + execute_CsrPlugin_csr_2831 <= (decode_INSTRUCTION[31 : 20] == 12'hb0f); + end + if(when_CsrPlugin_l1264_36) begin + execute_CsrPlugin_csr_2832 <= (decode_INSTRUCTION[31 : 20] == 12'hb10); + end + if(when_CsrPlugin_l1264_37) begin + execute_CsrPlugin_csr_2833 <= (decode_INSTRUCTION[31 : 20] == 12'hb11); + end + if(when_CsrPlugin_l1264_38) begin + execute_CsrPlugin_csr_2834 <= (decode_INSTRUCTION[31 : 20] == 12'hb12); + end + if(when_CsrPlugin_l1264_39) begin + execute_CsrPlugin_csr_2835 <= (decode_INSTRUCTION[31 : 20] == 12'hb13); + end + if(execute_CsrPlugin_csr_836) begin + if(execute_CsrPlugin_writeEnable) begin + CsrPlugin_mip_MSIP <= CsrPlugin_csrMapping_writeDataSignal[3]; + end + end + if(execute_CsrPlugin_csr_773) begin + if(execute_CsrPlugin_writeEnable) begin + CsrPlugin_mtvec_base <= CsrPlugin_csrMapping_writeDataSignal[31 : 2]; + CsrPlugin_mtvec_mode <= CsrPlugin_csrMapping_writeDataSignal[1 : 0]; + end + end + if(execute_CsrPlugin_csr_833) begin + if(execute_CsrPlugin_writeEnable) begin + CsrPlugin_mepc <= CsrPlugin_csrMapping_writeDataSignal[31 : 0]; + end + end + if(execute_CsrPlugin_csr_832) begin + if(execute_CsrPlugin_writeEnable) begin + CsrPlugin_mscratch <= CsrPlugin_csrMapping_writeDataSignal[31 : 0]; + end + end + if(execute_CsrPlugin_csr_834) begin + if(execute_CsrPlugin_writeEnable) begin + CsrPlugin_mcause_interrupt <= CsrPlugin_csrMapping_writeDataSignal[31]; + CsrPlugin_mcause_exceptionCode <= CsrPlugin_csrMapping_writeDataSignal[3 : 0]; + end + end + if(execute_CsrPlugin_csr_835) begin + if(execute_CsrPlugin_writeEnable) begin + CsrPlugin_mtval <= CsrPlugin_csrMapping_writeDataSignal[31 : 0]; + end + end + if(execute_CsrPlugin_csr_2816) begin + if(execute_CsrPlugin_writeEnable) begin + CsrPlugin_mcycle[31 : 0] <= CsrPlugin_csrMapping_writeDataSignal[31 : 0]; + end + end + if(execute_CsrPlugin_csr_2944) begin + if(execute_CsrPlugin_writeEnable) begin + CsrPlugin_mcycle[63 : 32] <= CsrPlugin_csrMapping_writeDataSignal[31 : 0]; + end + end + if(execute_CsrPlugin_csr_2818) begin + if(execute_CsrPlugin_writeEnable) begin + CsrPlugin_minstret[31 : 0] <= CsrPlugin_csrMapping_writeDataSignal[31 : 0]; + end + end + if(execute_CsrPlugin_csr_2946) begin + if(execute_CsrPlugin_writeEnable) begin + CsrPlugin_minstret[63 : 32] <= CsrPlugin_csrMapping_writeDataSignal[31 : 0]; + end + end + if(execute_CsrPlugin_csr_2820) begin + if(execute_CsrPlugin_writeEnable) begin + _zz_CsrPlugin_csrMapping_readDataInit_2 <= CsrPlugin_csrMapping_writeDataSignal[31 : 0]; + end + end + if(execute_CsrPlugin_csr_2821) begin + if(execute_CsrPlugin_writeEnable) begin + _zz_when_GenCoreDefault_l367 <= CsrPlugin_csrMapping_writeDataSignal[31 : 0]; + end + end + if(execute_CsrPlugin_csr_2822) begin + if(execute_CsrPlugin_writeEnable) begin + _zz_CsrPlugin_csrMapping_readDataInit_3 <= CsrPlugin_csrMapping_writeDataSignal[31 : 0]; + end + end + if(execute_CsrPlugin_csr_2823) begin + if(execute_CsrPlugin_writeEnable) begin + _zz_when_GenCoreDefault_l367_1 <= CsrPlugin_csrMapping_writeDataSignal[31 : 0]; + end + end + if(execute_CsrPlugin_csr_2824) begin + if(execute_CsrPlugin_writeEnable) begin + _zz_CsrPlugin_csrMapping_readDataInit_4 <= CsrPlugin_csrMapping_writeDataSignal[31 : 0]; + end + end + if(execute_CsrPlugin_csr_2825) begin + if(execute_CsrPlugin_writeEnable) begin + _zz_when_GenCoreDefault_l367_2 <= CsrPlugin_csrMapping_writeDataSignal[31 : 0]; + end + end + if(execute_CsrPlugin_csr_2826) begin + if(execute_CsrPlugin_writeEnable) begin + _zz_CsrPlugin_csrMapping_readDataInit_5 <= CsrPlugin_csrMapping_writeDataSignal[31 : 0]; + end + end + if(execute_CsrPlugin_csr_2827) begin + if(execute_CsrPlugin_writeEnable) begin + _zz_when_GenCoreDefault_l367_3 <= CsrPlugin_csrMapping_writeDataSignal[31 : 0]; + end + end + if(execute_CsrPlugin_csr_2828) begin + if(execute_CsrPlugin_writeEnable) begin + _zz_CsrPlugin_csrMapping_readDataInit_6 <= CsrPlugin_csrMapping_writeDataSignal[31 : 0]; + end + end + if(execute_CsrPlugin_csr_2829) begin + if(execute_CsrPlugin_writeEnable) begin + _zz_when_GenCoreDefault_l367_4 <= CsrPlugin_csrMapping_writeDataSignal[31 : 0]; + end + end + if(execute_CsrPlugin_csr_2830) begin + if(execute_CsrPlugin_writeEnable) begin + _zz_CsrPlugin_csrMapping_readDataInit_7 <= CsrPlugin_csrMapping_writeDataSignal[31 : 0]; + end + end + if(execute_CsrPlugin_csr_2831) begin + if(execute_CsrPlugin_writeEnable) begin + _zz_when_GenCoreDefault_l367_5 <= CsrPlugin_csrMapping_writeDataSignal[31 : 0]; + end + end + if(execute_CsrPlugin_csr_2832) begin + if(execute_CsrPlugin_writeEnable) begin + _zz_CsrPlugin_csrMapping_readDataInit_8 <= CsrPlugin_csrMapping_writeDataSignal[31 : 0]; + end + end + if(execute_CsrPlugin_csr_2833) begin + if(execute_CsrPlugin_writeEnable) begin + _zz_when_GenCoreDefault_l367_6 <= CsrPlugin_csrMapping_writeDataSignal[31 : 0]; + end + end + if(execute_CsrPlugin_csr_2834) begin + if(execute_CsrPlugin_writeEnable) begin + _zz_CsrPlugin_csrMapping_readDataInit_9 <= CsrPlugin_csrMapping_writeDataSignal[31 : 0]; + end + end + if(execute_CsrPlugin_csr_2835) begin + if(execute_CsrPlugin_writeEnable) begin + _zz_when_GenCoreDefault_l367_7 <= CsrPlugin_csrMapping_writeDataSignal[31 : 0]; + end + end + iBusWishbone_DAT_MISO_regNext <= iBusWishbone_DAT_MISO; + dBusWishbone_DAT_MISO_regNext <= dBusWishbone_DAT_MISO; + end + + always @(posedge clk) begin + DebugPlugin_firstCycle <= 1'b0; + if(debug_bus_cmd_ready) begin + DebugPlugin_firstCycle <= 1'b1; + end + DebugPlugin_secondCycle <= DebugPlugin_firstCycle; + DebugPlugin_isPipBusy <= (({writeBack_arbitration_isValid,{memory_arbitration_isValid,{execute_arbitration_isValid,decode_arbitration_isValid}}} != 4'b0000) || IBusCachedPlugin_incomingInstruction); + if(writeBack_arbitration_isValid) begin + DebugPlugin_busReadDataReg <= _zz_decode_RS2_2; + end + _zz_when_DebugPlugin_l244 <= debug_bus_cmd_payload_address[2]; + if(when_DebugPlugin_l284) begin + DebugPlugin_busReadDataReg <= execute_PC; + end + DebugPlugin_resetIt_regNext <= DebugPlugin_resetIt; + end + + always @(posedge clk) begin + if(debugReset) begin + DebugPlugin_resetIt <= 1'b0; + DebugPlugin_haltIt <= 1'b0; + DebugPlugin_stepIt <= 1'b0; + DebugPlugin_godmode <= 1'b0; + DebugPlugin_haltedByBreak <= 1'b0; + DebugPlugin_debugUsed <= 1'b0; + DebugPlugin_disableEbreak <= 1'b0; + end else begin + if(when_DebugPlugin_l225) begin + DebugPlugin_godmode <= 1'b1; + end + if(debug_bus_cmd_valid) begin + DebugPlugin_debugUsed <= 1'b1; + end + if(debug_bus_cmd_valid) begin + case(switch_DebugPlugin_l256) + 6'h0 : begin + if(debug_bus_cmd_payload_wr) begin + DebugPlugin_stepIt <= debug_bus_cmd_payload_data[4]; + if(when_DebugPlugin_l260) begin + DebugPlugin_resetIt <= 1'b1; + end + if(when_DebugPlugin_l260_1) begin + DebugPlugin_resetIt <= 1'b0; + end + if(when_DebugPlugin_l261) begin + DebugPlugin_haltIt <= 1'b1; + end + if(when_DebugPlugin_l261_1) begin + DebugPlugin_haltIt <= 1'b0; + end + if(when_DebugPlugin_l262) begin + DebugPlugin_haltedByBreak <= 1'b0; + end + if(when_DebugPlugin_l263) begin + DebugPlugin_godmode <= 1'b0; + end + if(when_DebugPlugin_l264) begin + DebugPlugin_disableEbreak <= 1'b1; + end + if(when_DebugPlugin_l264_1) begin + DebugPlugin_disableEbreak <= 1'b0; + end + end + end + default : begin + end + endcase + end + if(when_DebugPlugin_l284) begin + if(when_DebugPlugin_l287) begin + DebugPlugin_haltIt <= 1'b1; + DebugPlugin_haltedByBreak <= 1'b1; + end + end + if(when_DebugPlugin_l300) begin + if(decode_arbitration_isValid) begin + DebugPlugin_haltIt <= 1'b1; + end + end + end + end + + +endmodule + +module DataCache ( + input io_cpu_execute_isValid, + input [31:0] io_cpu_execute_address, + output reg io_cpu_execute_haltIt, + input io_cpu_execute_args_wr, + input [1:0] io_cpu_execute_args_size, + input io_cpu_execute_args_totalyConsistent, + output io_cpu_execute_refilling, + input io_cpu_memory_isValid, + input io_cpu_memory_isStuck, + output io_cpu_memory_isWrite, + input [31:0] io_cpu_memory_address, + input [31:0] io_cpu_memory_mmuRsp_physicalAddress, + input io_cpu_memory_mmuRsp_isIoAccess, + input io_cpu_memory_mmuRsp_isPaging, + input io_cpu_memory_mmuRsp_allowRead, + input io_cpu_memory_mmuRsp_allowWrite, + input io_cpu_memory_mmuRsp_allowExecute, + input io_cpu_memory_mmuRsp_exception, + input io_cpu_memory_mmuRsp_refilling, + input io_cpu_memory_mmuRsp_bypassTranslation, + input io_cpu_writeBack_isValid, + input io_cpu_writeBack_isStuck, + input io_cpu_writeBack_isUser, + output reg io_cpu_writeBack_haltIt, + output io_cpu_writeBack_isWrite, + input [31:0] io_cpu_writeBack_storeData, + output reg [31:0] io_cpu_writeBack_data, + input [31:0] io_cpu_writeBack_address, + output io_cpu_writeBack_mmuException, + output io_cpu_writeBack_unalignedAccess, + output reg io_cpu_writeBack_accessError, + output io_cpu_writeBack_keepMemRspData, + input io_cpu_writeBack_fence_SW, + input io_cpu_writeBack_fence_SR, + input io_cpu_writeBack_fence_SO, + input io_cpu_writeBack_fence_SI, + input io_cpu_writeBack_fence_PW, + input io_cpu_writeBack_fence_PR, + input io_cpu_writeBack_fence_PO, + input io_cpu_writeBack_fence_PI, + input [3:0] io_cpu_writeBack_fence_FM, + output io_cpu_writeBack_exclusiveOk, + output reg io_cpu_redo, + input io_cpu_flush_valid, + output io_cpu_flush_ready, + output reg io_mem_cmd_valid, + input io_mem_cmd_ready, + output reg io_mem_cmd_payload_wr, + output io_mem_cmd_payload_uncached, + output reg [31:0] io_mem_cmd_payload_address, + output [31:0] io_mem_cmd_payload_data, + output [3:0] io_mem_cmd_payload_mask, + output reg [2:0] io_mem_cmd_payload_size, + output io_mem_cmd_payload_last, + input io_mem_rsp_valid, + input io_mem_rsp_payload_last, + input [31:0] io_mem_rsp_payload_data, + input io_mem_rsp_payload_error, + input clk, + input reset +); + reg [21:0] _zz_ways_0_tags_port0; + reg [31:0] _zz_ways_0_data_port0; + wire [21:0] _zz_ways_0_tags_port; + wire [9:0] _zz_stage0_dataColisions; + wire [9:0] _zz__zz_stageA_dataColisions; + wire [0:0] _zz_when; + wire [2:0] _zz_loader_counter_valueNext; + wire [0:0] _zz_loader_counter_valueNext_1; + wire [1:0] _zz_loader_waysAllocator; + reg _zz_1; + reg _zz_2; + wire haltCpu; + reg tagsReadCmd_valid; + reg [6:0] tagsReadCmd_payload; + reg tagsWriteCmd_valid; + reg [0:0] tagsWriteCmd_payload_way; + reg [6:0] tagsWriteCmd_payload_address; + reg tagsWriteCmd_payload_data_valid; + reg tagsWriteCmd_payload_data_error; + reg [19:0] tagsWriteCmd_payload_data_address; + reg tagsWriteLastCmd_valid; + reg [0:0] tagsWriteLastCmd_payload_way; + reg [6:0] tagsWriteLastCmd_payload_address; + reg tagsWriteLastCmd_payload_data_valid; + reg tagsWriteLastCmd_payload_data_error; + reg [19:0] tagsWriteLastCmd_payload_data_address; + reg dataReadCmd_valid; + reg [9:0] dataReadCmd_payload; + reg dataWriteCmd_valid; + reg [0:0] dataWriteCmd_payload_way; + reg [9:0] dataWriteCmd_payload_address; + reg [31:0] dataWriteCmd_payload_data; + reg [3:0] dataWriteCmd_payload_mask; + wire _zz_ways_0_tagsReadRsp_valid; + wire ways_0_tagsReadRsp_valid; + wire ways_0_tagsReadRsp_error; + wire [19:0] ways_0_tagsReadRsp_address; + wire [21:0] _zz_ways_0_tagsReadRsp_valid_1; + wire _zz_ways_0_dataReadRspMem; + wire [31:0] ways_0_dataReadRspMem; + wire [31:0] ways_0_dataReadRsp; + wire when_DataCache_l634; + wire when_DataCache_l637; + wire when_DataCache_l656; + wire rspSync; + wire rspLast; + reg memCmdSent; + wire io_mem_cmd_fire; + wire when_DataCache_l678; + reg [3:0] _zz_stage0_mask; + wire [3:0] stage0_mask; + wire [0:0] stage0_dataColisions; + wire [0:0] stage0_wayInvalidate; + wire stage0_isAmo; + wire when_DataCache_l763; + reg stageA_request_wr; + reg [1:0] stageA_request_size; + reg stageA_request_totalyConsistent; + wire when_DataCache_l763_1; + reg [3:0] stageA_mask; + wire stageA_isAmo; + wire stageA_isLrsc; + wire [0:0] stageA_wayHits; + wire when_DataCache_l763_2; + reg [0:0] stageA_wayInvalidate; + wire when_DataCache_l763_3; + reg [0:0] stage0_dataColisions_regNextWhen; + wire [0:0] _zz_stageA_dataColisions; + wire [0:0] stageA_dataColisions; + wire when_DataCache_l814; + reg stageB_request_wr; + reg [1:0] stageB_request_size; + reg stageB_request_totalyConsistent; + reg stageB_mmuRspFreeze; + wire when_DataCache_l816; + reg [31:0] stageB_mmuRsp_physicalAddress; + reg stageB_mmuRsp_isIoAccess; + reg stageB_mmuRsp_isPaging; + reg stageB_mmuRsp_allowRead; + reg stageB_mmuRsp_allowWrite; + reg stageB_mmuRsp_allowExecute; + reg stageB_mmuRsp_exception; + reg stageB_mmuRsp_refilling; + reg stageB_mmuRsp_bypassTranslation; + wire when_DataCache_l813; + reg stageB_tagsReadRsp_0_valid; + reg stageB_tagsReadRsp_0_error; + reg [19:0] stageB_tagsReadRsp_0_address; + wire when_DataCache_l813_1; + reg [31:0] stageB_dataReadRsp_0; + wire when_DataCache_l812; + reg [0:0] stageB_wayInvalidate; + wire stageB_consistancyHazard; + wire when_DataCache_l812_1; + reg [0:0] stageB_dataColisions; + wire when_DataCache_l812_2; + reg stageB_unaligned; + wire when_DataCache_l812_3; + reg [0:0] stageB_waysHitsBeforeInvalidate; + wire [0:0] stageB_waysHits; + wire stageB_waysHit; + wire [31:0] stageB_dataMux; + wire when_DataCache_l812_4; + reg [3:0] stageB_mask; + reg stageB_loaderValid; + wire [31:0] stageB_ioMemRspMuxed; + reg stageB_flusher_waitDone; + wire stageB_flusher_hold; + reg [7:0] stageB_flusher_counter; + wire when_DataCache_l842; + wire when_DataCache_l848; + reg stageB_flusher_start; + wire stageB_isAmo; + wire stageB_isAmoCached; + wire stageB_isExternalLsrc; + wire stageB_isExternalAmo; + wire [31:0] stageB_requestDataBypass; + reg stageB_cpuWriteToCache; + wire when_DataCache_l911; + wire stageB_badPermissions; + wire stageB_loadStoreFault; + wire stageB_bypassCache; + wire when_DataCache_l980; + wire when_DataCache_l989; + wire when_DataCache_l994; + wire when_DataCache_l1005; + wire when_DataCache_l1017; + wire when_DataCache_l976; + wire when_DataCache_l1051; + wire when_DataCache_l1060; + reg loader_valid; + reg loader_counter_willIncrement; + wire loader_counter_willClear; + reg [2:0] loader_counter_valueNext; + reg [2:0] loader_counter_value; + wire loader_counter_willOverflowIfInc; + wire loader_counter_willOverflow; + reg [0:0] loader_waysAllocator; + reg loader_error; + wire loader_kill; + reg loader_killReg; + wire when_DataCache_l1075; + wire loader_done; + wire when_DataCache_l1103; + reg loader_valid_regNext; + wire when_DataCache_l1107; + wire when_DataCache_l1110; + (* ram_style = "block" *) reg [21:0] ways_0_tags [0:127]; + (* ram_style = "block" *) reg [7:0] ways_0_data_symbol0 [0:1023]; + (* ram_style = "block" *) reg [7:0] ways_0_data_symbol1 [0:1023]; + (* ram_style = "block" *) reg [7:0] ways_0_data_symbol2 [0:1023]; + (* ram_style = "block" *) reg [7:0] ways_0_data_symbol3 [0:1023]; + reg [7:0] _zz_ways_0_datasymbol_read; + reg [7:0] _zz_ways_0_datasymbol_read_1; + reg [7:0] _zz_ways_0_datasymbol_read_2; + reg [7:0] _zz_ways_0_datasymbol_read_3; + + assign _zz_stage0_dataColisions = (io_cpu_execute_address[11 : 2] >>> 0); + assign _zz__zz_stageA_dataColisions = (io_cpu_memory_address[11 : 2] >>> 0); + assign _zz_when = 1'b1; + assign _zz_loader_counter_valueNext_1 = loader_counter_willIncrement; + assign _zz_loader_counter_valueNext = {2'd0, _zz_loader_counter_valueNext_1}; + assign _zz_loader_waysAllocator = {loader_waysAllocator,loader_waysAllocator[0]}; + assign _zz_ways_0_tags_port = {tagsWriteCmd_payload_data_address,{tagsWriteCmd_payload_data_error,tagsWriteCmd_payload_data_valid}}; + always @(posedge clk) begin + if(_zz_ways_0_tagsReadRsp_valid) begin + _zz_ways_0_tags_port0 <= ways_0_tags[tagsReadCmd_payload]; + end + end + + always @(posedge clk) begin + if(_zz_2) begin + ways_0_tags[tagsWriteCmd_payload_address] <= _zz_ways_0_tags_port; + end + end + + always @(*) begin + _zz_ways_0_data_port0 = {_zz_ways_0_datasymbol_read_3, _zz_ways_0_datasymbol_read_2, _zz_ways_0_datasymbol_read_1, _zz_ways_0_datasymbol_read}; + end + always @(posedge clk) begin + if(_zz_ways_0_dataReadRspMem) begin + _zz_ways_0_datasymbol_read <= ways_0_data_symbol0[dataReadCmd_payload]; + _zz_ways_0_datasymbol_read_1 <= ways_0_data_symbol1[dataReadCmd_payload]; + _zz_ways_0_datasymbol_read_2 <= ways_0_data_symbol2[dataReadCmd_payload]; + _zz_ways_0_datasymbol_read_3 <= ways_0_data_symbol3[dataReadCmd_payload]; + end + end + + always @(posedge clk) begin + if(dataWriteCmd_payload_mask[0] && _zz_1) begin + ways_0_data_symbol0[dataWriteCmd_payload_address] <= dataWriteCmd_payload_data[7 : 0]; + end + if(dataWriteCmd_payload_mask[1] && _zz_1) begin + ways_0_data_symbol1[dataWriteCmd_payload_address] <= dataWriteCmd_payload_data[15 : 8]; + end + if(dataWriteCmd_payload_mask[2] && _zz_1) begin + ways_0_data_symbol2[dataWriteCmd_payload_address] <= dataWriteCmd_payload_data[23 : 16]; + end + if(dataWriteCmd_payload_mask[3] && _zz_1) begin + ways_0_data_symbol3[dataWriteCmd_payload_address] <= dataWriteCmd_payload_data[31 : 24]; + end + end + + always @(*) begin + _zz_1 = 1'b0; + if(when_DataCache_l637) begin + _zz_1 = 1'b1; + end + end + + always @(*) begin + _zz_2 = 1'b0; + if(when_DataCache_l634) begin + _zz_2 = 1'b1; + end + end + + assign haltCpu = 1'b0; + assign _zz_ways_0_tagsReadRsp_valid = (tagsReadCmd_valid && (! io_cpu_memory_isStuck)); + assign _zz_ways_0_tagsReadRsp_valid_1 = _zz_ways_0_tags_port0; + assign ways_0_tagsReadRsp_valid = _zz_ways_0_tagsReadRsp_valid_1[0]; + assign ways_0_tagsReadRsp_error = _zz_ways_0_tagsReadRsp_valid_1[1]; + assign ways_0_tagsReadRsp_address = _zz_ways_0_tagsReadRsp_valid_1[21 : 2]; + assign _zz_ways_0_dataReadRspMem = (dataReadCmd_valid && (! io_cpu_memory_isStuck)); + assign ways_0_dataReadRspMem = _zz_ways_0_data_port0; + assign ways_0_dataReadRsp = ways_0_dataReadRspMem[31 : 0]; + assign when_DataCache_l634 = (tagsWriteCmd_valid && tagsWriteCmd_payload_way[0]); + assign when_DataCache_l637 = (dataWriteCmd_valid && dataWriteCmd_payload_way[0]); + always @(*) begin + tagsReadCmd_valid = 1'b0; + if(when_DataCache_l656) begin + tagsReadCmd_valid = 1'b1; + end + end + + always @(*) begin + tagsReadCmd_payload = 7'bxxxxxxx; + if(when_DataCache_l656) begin + tagsReadCmd_payload = io_cpu_execute_address[11 : 5]; + end + end + + always @(*) begin + dataReadCmd_valid = 1'b0; + if(when_DataCache_l656) begin + dataReadCmd_valid = 1'b1; + end + end + + always @(*) begin + dataReadCmd_payload = 10'bxxxxxxxxxx; + if(when_DataCache_l656) begin + dataReadCmd_payload = io_cpu_execute_address[11 : 2]; + end + end + + always @(*) begin + tagsWriteCmd_valid = 1'b0; + if(when_DataCache_l842) begin + tagsWriteCmd_valid = 1'b1; + end + if(when_DataCache_l1051) begin + tagsWriteCmd_valid = 1'b0; + end + if(loader_done) begin + tagsWriteCmd_valid = 1'b1; + end + end + + always @(*) begin + tagsWriteCmd_payload_way = 1'bx; + if(when_DataCache_l842) begin + tagsWriteCmd_payload_way = 1'b1; + end + if(loader_done) begin + tagsWriteCmd_payload_way = loader_waysAllocator; + end + end + + always @(*) begin + tagsWriteCmd_payload_address = 7'bxxxxxxx; + if(when_DataCache_l842) begin + tagsWriteCmd_payload_address = stageB_flusher_counter[6:0]; + end + if(loader_done) begin + tagsWriteCmd_payload_address = stageB_mmuRsp_physicalAddress[11 : 5]; + end + end + + always @(*) begin + tagsWriteCmd_payload_data_valid = 1'bx; + if(when_DataCache_l842) begin + tagsWriteCmd_payload_data_valid = 1'b0; + end + if(loader_done) begin + tagsWriteCmd_payload_data_valid = (! (loader_kill || loader_killReg)); + end + end + + always @(*) begin + tagsWriteCmd_payload_data_error = 1'bx; + if(loader_done) begin + tagsWriteCmd_payload_data_error = (loader_error || (io_mem_rsp_valid && io_mem_rsp_payload_error)); + end + end + + always @(*) begin + tagsWriteCmd_payload_data_address = 20'bxxxxxxxxxxxxxxxxxxxx; + if(loader_done) begin + tagsWriteCmd_payload_data_address = stageB_mmuRsp_physicalAddress[31 : 12]; + end + end + + always @(*) begin + dataWriteCmd_valid = 1'b0; + if(stageB_cpuWriteToCache) begin + if(when_DataCache_l911) begin + dataWriteCmd_valid = 1'b1; + end + end + if(when_DataCache_l1051) begin + dataWriteCmd_valid = 1'b0; + end + if(when_DataCache_l1075) begin + dataWriteCmd_valid = 1'b1; + end + end + + always @(*) begin + dataWriteCmd_payload_way = 1'bx; + if(stageB_cpuWriteToCache) begin + dataWriteCmd_payload_way = stageB_waysHits; + end + if(when_DataCache_l1075) begin + dataWriteCmd_payload_way = loader_waysAllocator; + end + end + + always @(*) begin + dataWriteCmd_payload_address = 10'bxxxxxxxxxx; + if(stageB_cpuWriteToCache) begin + dataWriteCmd_payload_address = stageB_mmuRsp_physicalAddress[11 : 2]; + end + if(when_DataCache_l1075) begin + dataWriteCmd_payload_address = {stageB_mmuRsp_physicalAddress[11 : 5],loader_counter_value}; + end + end + + always @(*) begin + dataWriteCmd_payload_data = 32'bxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx; + if(stageB_cpuWriteToCache) begin + dataWriteCmd_payload_data[31 : 0] = stageB_requestDataBypass; + end + if(when_DataCache_l1075) begin + dataWriteCmd_payload_data = io_mem_rsp_payload_data; + end + end + + always @(*) begin + dataWriteCmd_payload_mask = 4'bxxxx; + if(stageB_cpuWriteToCache) begin + dataWriteCmd_payload_mask = 4'b0000; + if(_zz_when[0]) begin + dataWriteCmd_payload_mask[3 : 0] = stageB_mask; + end + end + if(when_DataCache_l1075) begin + dataWriteCmd_payload_mask = 4'b1111; + end + end + + assign when_DataCache_l656 = (io_cpu_execute_isValid && (! io_cpu_memory_isStuck)); + always @(*) begin + io_cpu_execute_haltIt = 1'b0; + if(when_DataCache_l842) begin + io_cpu_execute_haltIt = 1'b1; + end + end + + assign rspSync = 1'b1; + assign rspLast = 1'b1; + assign io_mem_cmd_fire = (io_mem_cmd_valid && io_mem_cmd_ready); + assign when_DataCache_l678 = (! io_cpu_writeBack_isStuck); + always @(*) begin + _zz_stage0_mask = 4'bxxxx; + case(io_cpu_execute_args_size) + 2'b00 : begin + _zz_stage0_mask = 4'b0001; + end + 2'b01 : begin + _zz_stage0_mask = 4'b0011; + end + 2'b10 : begin + _zz_stage0_mask = 4'b1111; + end + default : begin + end + endcase + end + + assign stage0_mask = (_zz_stage0_mask <<< io_cpu_execute_address[1 : 0]); + assign stage0_dataColisions[0] = (((dataWriteCmd_valid && dataWriteCmd_payload_way[0]) && (dataWriteCmd_payload_address == _zz_stage0_dataColisions)) && ((stage0_mask & dataWriteCmd_payload_mask[3 : 0]) != 4'b0000)); + assign stage0_wayInvalidate = 1'b0; + assign stage0_isAmo = 1'b0; + assign when_DataCache_l763 = (! io_cpu_memory_isStuck); + assign when_DataCache_l763_1 = (! io_cpu_memory_isStuck); + assign io_cpu_memory_isWrite = stageA_request_wr; + assign stageA_isAmo = 1'b0; + assign stageA_isLrsc = 1'b0; + assign stageA_wayHits = ((io_cpu_memory_mmuRsp_physicalAddress[31 : 12] == ways_0_tagsReadRsp_address) && ways_0_tagsReadRsp_valid); + assign when_DataCache_l763_2 = (! io_cpu_memory_isStuck); + assign when_DataCache_l763_3 = (! io_cpu_memory_isStuck); + assign _zz_stageA_dataColisions[0] = (((dataWriteCmd_valid && dataWriteCmd_payload_way[0]) && (dataWriteCmd_payload_address == _zz__zz_stageA_dataColisions)) && ((stageA_mask & dataWriteCmd_payload_mask[3 : 0]) != 4'b0000)); + assign stageA_dataColisions = (stage0_dataColisions_regNextWhen | _zz_stageA_dataColisions); + assign when_DataCache_l814 = (! io_cpu_writeBack_isStuck); + always @(*) begin + stageB_mmuRspFreeze = 1'b0; + if(when_DataCache_l1110) begin + stageB_mmuRspFreeze = 1'b1; + end + end + + assign when_DataCache_l816 = ((! io_cpu_writeBack_isStuck) && (! stageB_mmuRspFreeze)); + assign when_DataCache_l813 = (! io_cpu_writeBack_isStuck); + assign when_DataCache_l813_1 = (! io_cpu_writeBack_isStuck); + assign when_DataCache_l812 = (! io_cpu_writeBack_isStuck); + assign stageB_consistancyHazard = 1'b0; + assign when_DataCache_l812_1 = (! io_cpu_writeBack_isStuck); + assign when_DataCache_l812_2 = (! io_cpu_writeBack_isStuck); + assign when_DataCache_l812_3 = (! io_cpu_writeBack_isStuck); + assign stageB_waysHits = (stageB_waysHitsBeforeInvalidate & (~ stageB_wayInvalidate)); + assign stageB_waysHit = (stageB_waysHits != 1'b0); + assign stageB_dataMux = stageB_dataReadRsp_0; + assign when_DataCache_l812_4 = (! io_cpu_writeBack_isStuck); + always @(*) begin + stageB_loaderValid = 1'b0; + if(io_cpu_writeBack_isValid) begin + if(!stageB_isExternalAmo) begin + if(!when_DataCache_l976) begin + if(!when_DataCache_l989) begin + if(io_mem_cmd_ready) begin + stageB_loaderValid = 1'b1; + end + end + end + end + end + if(when_DataCache_l1051) begin + stageB_loaderValid = 1'b0; + end + end + + assign stageB_ioMemRspMuxed = io_mem_rsp_payload_data[31 : 0]; + always @(*) begin + io_cpu_writeBack_haltIt = 1'b1; + if(io_cpu_writeBack_isValid) begin + if(!stageB_isExternalAmo) begin + if(when_DataCache_l976) begin + if(when_DataCache_l980) begin + io_cpu_writeBack_haltIt = 1'b0; + end + end else begin + if(when_DataCache_l989) begin + if(when_DataCache_l994) begin + io_cpu_writeBack_haltIt = 1'b0; + end + end + end + end + end + if(when_DataCache_l1051) begin + io_cpu_writeBack_haltIt = 1'b0; + end + end + + assign stageB_flusher_hold = 1'b0; + assign when_DataCache_l842 = (! stageB_flusher_counter[7]); + assign when_DataCache_l848 = (! stageB_flusher_hold); + assign io_cpu_flush_ready = (stageB_flusher_waitDone && stageB_flusher_counter[7]); + assign stageB_isAmo = 1'b0; + assign stageB_isAmoCached = 1'b0; + assign stageB_isExternalLsrc = 1'b0; + assign stageB_isExternalAmo = 1'b0; + assign stageB_requestDataBypass = io_cpu_writeBack_storeData; + always @(*) begin + stageB_cpuWriteToCache = 1'b0; + if(io_cpu_writeBack_isValid) begin + if(!stageB_isExternalAmo) begin + if(!when_DataCache_l976) begin + if(when_DataCache_l989) begin + stageB_cpuWriteToCache = 1'b1; + end + end + end + end + end + + assign when_DataCache_l911 = (stageB_request_wr && stageB_waysHit); + assign stageB_badPermissions = (((! stageB_mmuRsp_allowWrite) && stageB_request_wr) || ((! stageB_mmuRsp_allowRead) && ((! stageB_request_wr) || stageB_isAmo))); + assign stageB_loadStoreFault = (io_cpu_writeBack_isValid && (stageB_mmuRsp_exception || stageB_badPermissions)); + always @(*) begin + io_cpu_redo = 1'b0; + if(io_cpu_writeBack_isValid) begin + if(!stageB_isExternalAmo) begin + if(!when_DataCache_l976) begin + if(when_DataCache_l989) begin + if(when_DataCache_l1005) begin + io_cpu_redo = 1'b1; + end + end + end + end + end + if(when_DataCache_l1060) begin + io_cpu_redo = 1'b1; + end + if(when_DataCache_l1107) begin + io_cpu_redo = 1'b1; + end + end + + always @(*) begin + io_cpu_writeBack_accessError = 1'b0; + if(stageB_bypassCache) begin + io_cpu_writeBack_accessError = ((((! stageB_request_wr) && 1'b1) && io_mem_rsp_valid) && io_mem_rsp_payload_error); + end else begin + io_cpu_writeBack_accessError = (((stageB_waysHits & stageB_tagsReadRsp_0_error) != 1'b0) || (stageB_loadStoreFault && (! stageB_mmuRsp_isPaging))); + end + end + + assign io_cpu_writeBack_mmuException = (stageB_loadStoreFault && stageB_mmuRsp_isPaging); + assign io_cpu_writeBack_unalignedAccess = (io_cpu_writeBack_isValid && stageB_unaligned); + assign io_cpu_writeBack_isWrite = stageB_request_wr; + always @(*) begin + io_mem_cmd_valid = 1'b0; + if(io_cpu_writeBack_isValid) begin + if(!stageB_isExternalAmo) begin + if(when_DataCache_l976) begin + io_mem_cmd_valid = (! memCmdSent); + end else begin + if(when_DataCache_l989) begin + if(stageB_request_wr) begin + io_mem_cmd_valid = 1'b1; + end + end else begin + if(when_DataCache_l1017) begin + io_mem_cmd_valid = 1'b1; + end + end + end + end + end + if(when_DataCache_l1051) begin + io_mem_cmd_valid = 1'b0; + end + end + + always @(*) begin + io_mem_cmd_payload_address = stageB_mmuRsp_physicalAddress; + if(io_cpu_writeBack_isValid) begin + if(!stageB_isExternalAmo) begin + if(!when_DataCache_l976) begin + if(!when_DataCache_l989) begin + io_mem_cmd_payload_address[4 : 0] = 5'h0; + end + end + end + end + end + + assign io_mem_cmd_payload_last = 1'b1; + always @(*) begin + io_mem_cmd_payload_wr = stageB_request_wr; + if(io_cpu_writeBack_isValid) begin + if(!stageB_isExternalAmo) begin + if(!when_DataCache_l976) begin + if(!when_DataCache_l989) begin + io_mem_cmd_payload_wr = 1'b0; + end + end + end + end + end + + assign io_mem_cmd_payload_mask = stageB_mask; + assign io_mem_cmd_payload_data = stageB_requestDataBypass; + assign io_mem_cmd_payload_uncached = stageB_mmuRsp_isIoAccess; + always @(*) begin + io_mem_cmd_payload_size = {1'd0, stageB_request_size}; + if(io_cpu_writeBack_isValid) begin + if(!stageB_isExternalAmo) begin + if(!when_DataCache_l976) begin + if(!when_DataCache_l989) begin + io_mem_cmd_payload_size = 3'b101; + end + end + end + end + end + + assign stageB_bypassCache = ((stageB_mmuRsp_isIoAccess || stageB_isExternalLsrc) || stageB_isExternalAmo); + assign io_cpu_writeBack_keepMemRspData = 1'b0; + assign when_DataCache_l980 = ((! stageB_request_wr) ? (io_mem_rsp_valid && rspSync) : io_mem_cmd_ready); + assign when_DataCache_l989 = (stageB_waysHit || (stageB_request_wr && (! stageB_isAmoCached))); + assign when_DataCache_l994 = ((! stageB_request_wr) || io_mem_cmd_ready); + assign when_DataCache_l1005 = (((! stageB_request_wr) || stageB_isAmoCached) && ((stageB_dataColisions & stageB_waysHits) != 1'b0)); + assign when_DataCache_l1017 = (! memCmdSent); + assign when_DataCache_l976 = (stageB_mmuRsp_isIoAccess || stageB_isExternalLsrc); + always @(*) begin + if(stageB_bypassCache) begin + io_cpu_writeBack_data = stageB_ioMemRspMuxed; + end else begin + io_cpu_writeBack_data = stageB_dataMux; + end + end + + assign when_DataCache_l1051 = ((((stageB_consistancyHazard || stageB_mmuRsp_refilling) || io_cpu_writeBack_accessError) || io_cpu_writeBack_mmuException) || io_cpu_writeBack_unalignedAccess); + assign when_DataCache_l1060 = (io_cpu_writeBack_isValid && (stageB_mmuRsp_refilling || stageB_consistancyHazard)); + always @(*) begin + loader_counter_willIncrement = 1'b0; + if(when_DataCache_l1075) begin + loader_counter_willIncrement = 1'b1; + end + end + + assign loader_counter_willClear = 1'b0; + assign loader_counter_willOverflowIfInc = (loader_counter_value == 3'b111); + assign loader_counter_willOverflow = (loader_counter_willOverflowIfInc && loader_counter_willIncrement); + always @(*) begin + loader_counter_valueNext = (loader_counter_value + _zz_loader_counter_valueNext); + if(loader_counter_willClear) begin + loader_counter_valueNext = 3'b000; + end + end + + assign loader_kill = 1'b0; + assign when_DataCache_l1075 = ((loader_valid && io_mem_rsp_valid) && rspLast); + assign loader_done = loader_counter_willOverflow; + assign when_DataCache_l1103 = (! loader_valid); + assign when_DataCache_l1107 = (loader_valid && (! loader_valid_regNext)); + assign io_cpu_execute_refilling = loader_valid; + assign when_DataCache_l1110 = (stageB_loaderValid || loader_valid); + always @(posedge clk) begin + tagsWriteLastCmd_valid <= tagsWriteCmd_valid; + tagsWriteLastCmd_payload_way <= tagsWriteCmd_payload_way; + tagsWriteLastCmd_payload_address <= tagsWriteCmd_payload_address; + tagsWriteLastCmd_payload_data_valid <= tagsWriteCmd_payload_data_valid; + tagsWriteLastCmd_payload_data_error <= tagsWriteCmd_payload_data_error; + tagsWriteLastCmd_payload_data_address <= tagsWriteCmd_payload_data_address; + if(when_DataCache_l763) begin + stageA_request_wr <= io_cpu_execute_args_wr; + stageA_request_size <= io_cpu_execute_args_size; + stageA_request_totalyConsistent <= io_cpu_execute_args_totalyConsistent; + end + if(when_DataCache_l763_1) begin + stageA_mask <= stage0_mask; + end + if(when_DataCache_l763_2) begin + stageA_wayInvalidate <= stage0_wayInvalidate; + end + if(when_DataCache_l763_3) begin + stage0_dataColisions_regNextWhen <= stage0_dataColisions; + end + if(when_DataCache_l814) begin + stageB_request_wr <= stageA_request_wr; + stageB_request_size <= stageA_request_size; + stageB_request_totalyConsistent <= stageA_request_totalyConsistent; + end + if(when_DataCache_l816) begin + stageB_mmuRsp_physicalAddress <= io_cpu_memory_mmuRsp_physicalAddress; + stageB_mmuRsp_isIoAccess <= io_cpu_memory_mmuRsp_isIoAccess; + stageB_mmuRsp_isPaging <= io_cpu_memory_mmuRsp_isPaging; + stageB_mmuRsp_allowRead <= io_cpu_memory_mmuRsp_allowRead; + stageB_mmuRsp_allowWrite <= io_cpu_memory_mmuRsp_allowWrite; + stageB_mmuRsp_allowExecute <= io_cpu_memory_mmuRsp_allowExecute; + stageB_mmuRsp_exception <= io_cpu_memory_mmuRsp_exception; + stageB_mmuRsp_refilling <= io_cpu_memory_mmuRsp_refilling; + stageB_mmuRsp_bypassTranslation <= io_cpu_memory_mmuRsp_bypassTranslation; + end + if(when_DataCache_l813) begin + stageB_tagsReadRsp_0_valid <= ways_0_tagsReadRsp_valid; + stageB_tagsReadRsp_0_error <= ways_0_tagsReadRsp_error; + stageB_tagsReadRsp_0_address <= ways_0_tagsReadRsp_address; + end + if(when_DataCache_l813_1) begin + stageB_dataReadRsp_0 <= ways_0_dataReadRsp; + end + if(when_DataCache_l812) begin + stageB_wayInvalidate <= stageA_wayInvalidate; + end + if(when_DataCache_l812_1) begin + stageB_dataColisions <= stageA_dataColisions; + end + if(when_DataCache_l812_2) begin + stageB_unaligned <= ({((stageA_request_size == 2'b10) && (io_cpu_memory_address[1 : 0] != 2'b00)),((stageA_request_size == 2'b01) && (io_cpu_memory_address[0 : 0] != 1'b0))} != 2'b00); + end + if(when_DataCache_l812_3) begin + stageB_waysHitsBeforeInvalidate <= stageA_wayHits; + end + if(when_DataCache_l812_4) begin + stageB_mask <= stageA_mask; + end + loader_valid_regNext <= loader_valid; + end + + always @(posedge clk) begin + if(reset) begin + memCmdSent <= 1'b0; + stageB_flusher_waitDone <= 1'b0; + stageB_flusher_counter <= 8'h0; + stageB_flusher_start <= 1'b1; + loader_valid <= 1'b0; + loader_counter_value <= 3'b000; + loader_waysAllocator <= 1'b1; + loader_error <= 1'b0; + loader_killReg <= 1'b0; + end else begin + if(io_mem_cmd_fire) begin + memCmdSent <= 1'b1; + end + if(when_DataCache_l678) begin + memCmdSent <= 1'b0; + end + if(io_cpu_flush_ready) begin + stageB_flusher_waitDone <= 1'b0; + end + if(when_DataCache_l842) begin + if(when_DataCache_l848) begin + stageB_flusher_counter <= (stageB_flusher_counter + 8'h01); + end + end + stageB_flusher_start <= (((((((! stageB_flusher_waitDone) && (! stageB_flusher_start)) && io_cpu_flush_valid) && (! io_cpu_execute_isValid)) && (! io_cpu_memory_isValid)) && (! io_cpu_writeBack_isValid)) && (! io_cpu_redo)); + if(stageB_flusher_start) begin + stageB_flusher_waitDone <= 1'b1; + stageB_flusher_counter <= 8'h0; + end + `ifndef SYNTHESIS + `ifdef FORMAL + assert((! ((io_cpu_writeBack_isValid && (! io_cpu_writeBack_haltIt)) && io_cpu_writeBack_isStuck))); + `else + if(!(! ((io_cpu_writeBack_isValid && (! io_cpu_writeBack_haltIt)) && io_cpu_writeBack_isStuck))) begin + $display("ERROR writeBack stuck by another plugin is not allowed"); + end + `endif + `endif + if(stageB_loaderValid) begin + loader_valid <= 1'b1; + end + loader_counter_value <= loader_counter_valueNext; + if(loader_kill) begin + loader_killReg <= 1'b1; + end + if(when_DataCache_l1075) begin + loader_error <= (loader_error || io_mem_rsp_payload_error); + end + if(loader_done) begin + loader_valid <= 1'b0; + loader_error <= 1'b0; + loader_killReg <= 1'b0; + end + if(when_DataCache_l1103) begin + loader_waysAllocator <= _zz_loader_waysAllocator[0:0]; + end + end + end + + +endmodule + +module InstructionCache ( + input io_flush, + input io_cpu_prefetch_isValid, + output reg io_cpu_prefetch_haltIt, + input [31:0] io_cpu_prefetch_pc, + input io_cpu_fetch_isValid, + input io_cpu_fetch_isStuck, + input io_cpu_fetch_isRemoved, + input [31:0] io_cpu_fetch_pc, + output [31:0] io_cpu_fetch_data, + input [31:0] io_cpu_fetch_mmuRsp_physicalAddress, + input io_cpu_fetch_mmuRsp_isIoAccess, + input io_cpu_fetch_mmuRsp_isPaging, + input io_cpu_fetch_mmuRsp_allowRead, + input io_cpu_fetch_mmuRsp_allowWrite, + input io_cpu_fetch_mmuRsp_allowExecute, + input io_cpu_fetch_mmuRsp_exception, + input io_cpu_fetch_mmuRsp_refilling, + input io_cpu_fetch_mmuRsp_bypassTranslation, + output [31:0] io_cpu_fetch_physicalAddress, + input io_cpu_decode_isValid, + input io_cpu_decode_isStuck, + input [31:0] io_cpu_decode_pc, + output [31:0] io_cpu_decode_physicalAddress, + output [31:0] io_cpu_decode_data, + output io_cpu_decode_cacheMiss, + output io_cpu_decode_error, + output io_cpu_decode_mmuRefilling, + output io_cpu_decode_mmuException, + input io_cpu_decode_isUser, + input io_cpu_fill_valid, + input [31:0] io_cpu_fill_payload, + output io_mem_cmd_valid, + input io_mem_cmd_ready, + output [31:0] io_mem_cmd_payload_address, + output [2:0] io_mem_cmd_payload_size, + input io_mem_rsp_valid, + input [31:0] io_mem_rsp_payload_data, + input io_mem_rsp_payload_error, + input [2:0] _zz_when_Fetcher_l398, + input [31:0] _zz_io_cpu_fetch_data_regNextWhen, + input clk, + input reset +); + reg [31:0] _zz_banks_0_port1; + reg [22:0] _zz_ways_0_tags_port1; + wire [22:0] _zz_ways_0_tags_port; + reg _zz_1; + reg _zz_2; + reg lineLoader_fire; + reg lineLoader_valid; + (* keep , syn_keep *) reg [31:0] lineLoader_address /* synthesis syn_keep = 1 */ ; + reg lineLoader_hadError; + reg lineLoader_flushPending; + reg [6:0] lineLoader_flushCounter; + wire when_InstructionCache_l338; + reg _zz_when_InstructionCache_l342; + wire when_InstructionCache_l342; + wire when_InstructionCache_l351; + reg lineLoader_cmdSent; + wire io_mem_cmd_fire; + wire when_Utils_l357; + reg lineLoader_wayToAllocate_willIncrement; + wire lineLoader_wayToAllocate_willClear; + wire lineLoader_wayToAllocate_willOverflowIfInc; + wire lineLoader_wayToAllocate_willOverflow; + (* keep , syn_keep *) reg [2:0] lineLoader_wordIndex /* synthesis syn_keep = 1 */ ; + wire lineLoader_write_tag_0_valid; + wire [5:0] lineLoader_write_tag_0_payload_address; + wire lineLoader_write_tag_0_payload_data_valid; + wire lineLoader_write_tag_0_payload_data_error; + wire [20:0] lineLoader_write_tag_0_payload_data_address; + wire lineLoader_write_data_0_valid; + wire [8:0] lineLoader_write_data_0_payload_address; + wire [31:0] lineLoader_write_data_0_payload_data; + wire when_InstructionCache_l401; + wire [8:0] _zz_fetchStage_read_banksValue_0_dataMem; + wire _zz_fetchStage_read_banksValue_0_dataMem_1; + wire [31:0] fetchStage_read_banksValue_0_dataMem; + wire [31:0] fetchStage_read_banksValue_0_data; + wire [5:0] _zz_fetchStage_read_waysValues_0_tag_valid; + wire _zz_fetchStage_read_waysValues_0_tag_valid_1; + wire fetchStage_read_waysValues_0_tag_valid; + wire fetchStage_read_waysValues_0_tag_error; + wire [20:0] fetchStage_read_waysValues_0_tag_address; + wire [22:0] _zz_fetchStage_read_waysValues_0_tag_valid_2; + wire fetchStage_hit_hits_0; + wire fetchStage_hit_valid; + wire fetchStage_hit_error; + wire [31:0] fetchStage_hit_data; + wire [31:0] fetchStage_hit_word; + wire when_InstructionCache_l435; + reg [31:0] io_cpu_fetch_data_regNextWhen; + wire when_InstructionCache_l459; + reg [31:0] decodeStage_mmuRsp_physicalAddress; + reg decodeStage_mmuRsp_isIoAccess; + reg decodeStage_mmuRsp_isPaging; + reg decodeStage_mmuRsp_allowRead; + reg decodeStage_mmuRsp_allowWrite; + reg decodeStage_mmuRsp_allowExecute; + reg decodeStage_mmuRsp_exception; + reg decodeStage_mmuRsp_refilling; + reg decodeStage_mmuRsp_bypassTranslation; + wire when_InstructionCache_l459_1; + reg decodeStage_hit_valid; + wire when_InstructionCache_l459_2; + reg decodeStage_hit_error; + wire when_Fetcher_l398; + (* ram_style = "block" *) reg [31:0] banks_0 [0:511]; + (* ram_style = "block" *) reg [22:0] ways_0_tags [0:63]; + + assign _zz_ways_0_tags_port = {lineLoader_write_tag_0_payload_data_address,{lineLoader_write_tag_0_payload_data_error,lineLoader_write_tag_0_payload_data_valid}}; + always @(posedge clk) begin + if(_zz_1) begin + banks_0[lineLoader_write_data_0_payload_address] <= lineLoader_write_data_0_payload_data; + end + end + + always @(posedge clk) begin + if(_zz_fetchStage_read_banksValue_0_dataMem_1) begin + _zz_banks_0_port1 <= banks_0[_zz_fetchStage_read_banksValue_0_dataMem]; + end + end + + always @(posedge clk) begin + if(_zz_2) begin + ways_0_tags[lineLoader_write_tag_0_payload_address] <= _zz_ways_0_tags_port; + end + end + + always @(posedge clk) begin + if(_zz_fetchStage_read_waysValues_0_tag_valid_1) begin + _zz_ways_0_tags_port1 <= ways_0_tags[_zz_fetchStage_read_waysValues_0_tag_valid]; + end + end + + always @(*) begin + _zz_1 = 1'b0; + if(lineLoader_write_data_0_valid) begin + _zz_1 = 1'b1; + end + end + + always @(*) begin + _zz_2 = 1'b0; + if(lineLoader_write_tag_0_valid) begin + _zz_2 = 1'b1; + end + end + + always @(*) begin + lineLoader_fire = 1'b0; + if(io_mem_rsp_valid) begin + if(when_InstructionCache_l401) begin + lineLoader_fire = 1'b1; + end + end + end + + always @(*) begin + io_cpu_prefetch_haltIt = (lineLoader_valid || lineLoader_flushPending); + if(when_InstructionCache_l338) begin + io_cpu_prefetch_haltIt = 1'b1; + end + if(when_InstructionCache_l342) begin + io_cpu_prefetch_haltIt = 1'b1; + end + if(io_flush) begin + io_cpu_prefetch_haltIt = 1'b1; + end + end + + assign when_InstructionCache_l338 = (! lineLoader_flushCounter[6]); + assign when_InstructionCache_l342 = (! _zz_when_InstructionCache_l342); + assign when_InstructionCache_l351 = (lineLoader_flushPending && (! (lineLoader_valid || io_cpu_fetch_isValid))); + assign io_mem_cmd_fire = (io_mem_cmd_valid && io_mem_cmd_ready); + assign io_mem_cmd_valid = (lineLoader_valid && (! lineLoader_cmdSent)); + assign io_mem_cmd_payload_address = {lineLoader_address[31 : 5],5'h0}; + assign io_mem_cmd_payload_size = 3'b101; + assign when_Utils_l357 = (! lineLoader_valid); + always @(*) begin + lineLoader_wayToAllocate_willIncrement = 1'b0; + if(when_Utils_l357) begin + lineLoader_wayToAllocate_willIncrement = 1'b1; + end + end + + assign lineLoader_wayToAllocate_willClear = 1'b0; + assign lineLoader_wayToAllocate_willOverflowIfInc = 1'b1; + assign lineLoader_wayToAllocate_willOverflow = (lineLoader_wayToAllocate_willOverflowIfInc && lineLoader_wayToAllocate_willIncrement); + assign lineLoader_write_tag_0_valid = ((1'b1 && lineLoader_fire) || (! lineLoader_flushCounter[6])); + assign lineLoader_write_tag_0_payload_address = (lineLoader_flushCounter[6] ? lineLoader_address[10 : 5] : lineLoader_flushCounter[5 : 0]); + assign lineLoader_write_tag_0_payload_data_valid = lineLoader_flushCounter[6]; + assign lineLoader_write_tag_0_payload_data_error = (lineLoader_hadError || io_mem_rsp_payload_error); + assign lineLoader_write_tag_0_payload_data_address = lineLoader_address[31 : 11]; + assign lineLoader_write_data_0_valid = (io_mem_rsp_valid && 1'b1); + assign lineLoader_write_data_0_payload_address = {lineLoader_address[10 : 5],lineLoader_wordIndex}; + assign lineLoader_write_data_0_payload_data = io_mem_rsp_payload_data; + assign when_InstructionCache_l401 = (lineLoader_wordIndex == 3'b111); + assign _zz_fetchStage_read_banksValue_0_dataMem = io_cpu_prefetch_pc[10 : 2]; + assign _zz_fetchStage_read_banksValue_0_dataMem_1 = (! io_cpu_fetch_isStuck); + assign fetchStage_read_banksValue_0_dataMem = _zz_banks_0_port1; + assign fetchStage_read_banksValue_0_data = fetchStage_read_banksValue_0_dataMem[31 : 0]; + assign _zz_fetchStage_read_waysValues_0_tag_valid = io_cpu_prefetch_pc[10 : 5]; + assign _zz_fetchStage_read_waysValues_0_tag_valid_1 = (! io_cpu_fetch_isStuck); + assign _zz_fetchStage_read_waysValues_0_tag_valid_2 = _zz_ways_0_tags_port1; + assign fetchStage_read_waysValues_0_tag_valid = _zz_fetchStage_read_waysValues_0_tag_valid_2[0]; + assign fetchStage_read_waysValues_0_tag_error = _zz_fetchStage_read_waysValues_0_tag_valid_2[1]; + assign fetchStage_read_waysValues_0_tag_address = _zz_fetchStage_read_waysValues_0_tag_valid_2[22 : 2]; + assign fetchStage_hit_hits_0 = (fetchStage_read_waysValues_0_tag_valid && (fetchStage_read_waysValues_0_tag_address == io_cpu_fetch_mmuRsp_physicalAddress[31 : 11])); + assign fetchStage_hit_valid = (fetchStage_hit_hits_0 != 1'b0); + assign fetchStage_hit_error = fetchStage_read_waysValues_0_tag_error; + assign fetchStage_hit_data = fetchStage_read_banksValue_0_data; + assign fetchStage_hit_word = fetchStage_hit_data; + assign io_cpu_fetch_data = fetchStage_hit_word; + assign when_InstructionCache_l435 = (! io_cpu_decode_isStuck); + assign io_cpu_decode_data = io_cpu_fetch_data_regNextWhen; + assign io_cpu_fetch_physicalAddress = io_cpu_fetch_mmuRsp_physicalAddress; + assign when_InstructionCache_l459 = (! io_cpu_decode_isStuck); + assign when_InstructionCache_l459_1 = (! io_cpu_decode_isStuck); + assign when_InstructionCache_l459_2 = (! io_cpu_decode_isStuck); + assign io_cpu_decode_cacheMiss = (! decodeStage_hit_valid); + assign io_cpu_decode_error = (decodeStage_hit_error || ((! decodeStage_mmuRsp_isPaging) && (decodeStage_mmuRsp_exception || (! decodeStage_mmuRsp_allowExecute)))); + assign io_cpu_decode_mmuRefilling = decodeStage_mmuRsp_refilling; + assign io_cpu_decode_mmuException = (((! decodeStage_mmuRsp_refilling) && decodeStage_mmuRsp_isPaging) && (decodeStage_mmuRsp_exception || (! decodeStage_mmuRsp_allowExecute))); + assign io_cpu_decode_physicalAddress = decodeStage_mmuRsp_physicalAddress; + assign when_Fetcher_l398 = (_zz_when_Fetcher_l398 != 3'b000); + always @(posedge clk) begin + if(reset) begin + lineLoader_valid <= 1'b0; + lineLoader_hadError <= 1'b0; + lineLoader_flushPending <= 1'b1; + lineLoader_cmdSent <= 1'b0; + lineLoader_wordIndex <= 3'b000; + end else begin + if(lineLoader_fire) begin + lineLoader_valid <= 1'b0; + end + if(lineLoader_fire) begin + lineLoader_hadError <= 1'b0; + end + if(io_cpu_fill_valid) begin + lineLoader_valid <= 1'b1; + end + if(io_flush) begin + lineLoader_flushPending <= 1'b1; + end + if(when_InstructionCache_l351) begin + lineLoader_flushPending <= 1'b0; + end + if(io_mem_cmd_fire) begin + lineLoader_cmdSent <= 1'b1; + end + if(lineLoader_fire) begin + lineLoader_cmdSent <= 1'b0; + end + if(io_mem_rsp_valid) begin + lineLoader_wordIndex <= (lineLoader_wordIndex + 3'b001); + if(io_mem_rsp_payload_error) begin + lineLoader_hadError <= 1'b1; + end + end + end + end + + always @(posedge clk) begin + if(io_cpu_fill_valid) begin + lineLoader_address <= io_cpu_fill_payload; + end + if(when_InstructionCache_l338) begin + lineLoader_flushCounter <= (lineLoader_flushCounter + 7'h01); + end + _zz_when_InstructionCache_l342 <= lineLoader_flushCounter[6]; + if(when_InstructionCache_l351) begin + lineLoader_flushCounter <= 7'h0; + end + if(when_InstructionCache_l435) begin + io_cpu_fetch_data_regNextWhen <= io_cpu_fetch_data; + end + if(when_InstructionCache_l459) begin + decodeStage_mmuRsp_physicalAddress <= io_cpu_fetch_mmuRsp_physicalAddress; + decodeStage_mmuRsp_isIoAccess <= io_cpu_fetch_mmuRsp_isIoAccess; + decodeStage_mmuRsp_isPaging <= io_cpu_fetch_mmuRsp_isPaging; + decodeStage_mmuRsp_allowRead <= io_cpu_fetch_mmuRsp_allowRead; + decodeStage_mmuRsp_allowWrite <= io_cpu_fetch_mmuRsp_allowWrite; + decodeStage_mmuRsp_allowExecute <= io_cpu_fetch_mmuRsp_allowExecute; + decodeStage_mmuRsp_exception <= io_cpu_fetch_mmuRsp_exception; + decodeStage_mmuRsp_refilling <= io_cpu_fetch_mmuRsp_refilling; + decodeStage_mmuRsp_bypassTranslation <= io_cpu_fetch_mmuRsp_bypassTranslation; + end + if(when_InstructionCache_l459_1) begin + decodeStage_hit_valid <= fetchStage_hit_valid; + end + if(when_InstructionCache_l459_2) begin + decodeStage_hit_error <= fetchStage_hit_error; + end + if(when_Fetcher_l398) begin + io_cpu_fetch_data_regNextWhen <= _zz_io_cpu_fetch_data_regNextWhen; + end + end + + +endmodule diff --git a/pythondata_cpu_vexriscv/verilog/VexRiscv_SlimPerfCfuDebug.yaml b/pythondata_cpu_vexriscv/verilog/VexRiscv_SlimPerfCfuDebug.yaml new file mode 100644 index 0000000..75d2f32 --- /dev/null +++ b/pythondata_cpu_vexriscv/verilog/VexRiscv_SlimPerfCfuDebug.yaml @@ -0,0 +1,5 @@ +debug: !!vexriscv.DebugReport {hardwareBreakpointCount: 0} +iBus: !!vexriscv.BusReport + flushInstructions: [4111, 19, 19, 19] + info: !!vexriscv.CacheReport {bytePerLine: 32, size: 2048} + kind: cached diff --git a/pythondata_cpu_vexriscv/verilog/src/main/scala/vexriscv/GenCoreDefault.scala b/pythondata_cpu_vexriscv/verilog/src/main/scala/vexriscv/GenCoreDefault.scala index 056b0ef..907b01e 100644 --- a/pythondata_cpu_vexriscv/verilog/src/main/scala/vexriscv/GenCoreDefault.scala +++ b/pythondata_cpu_vexriscv/verilog/src/main/scala/vexriscv/GenCoreDefault.scala @@ -6,10 +6,12 @@ import spinal.lib._ import spinal.lib.sim.Phase import vexriscv.ip.{DataCacheConfig, InstructionCacheConfig} import vexriscv.plugin.CsrAccess.WRITE_ONLY +import vexriscv.plugin.CsrAccess.READ_ONLY import vexriscv.plugin._ import scala.collection.mutable.ArrayBuffer + object SpinalConfig extends spinal.core.SpinalConfig( defaultConfigForClockDomains = ClockDomainConfig( resetKind = spinal.core.SYNC @@ -21,21 +23,25 @@ object SpinalConfig extends spinal.core.SpinalConfig( case class ArgConfig( debug : Boolean = false, + safe : Boolean = true, iCacheSize : Int = 4096, dCacheSize : Int = 4096, pmpRegions : Int = 0, pmpGranularity : Int = 256, mulDiv : Boolean = true, cfu : Boolean = false, + perfCSRs : Int = 0, atomics: Boolean = false, compressedGen: Boolean = false, singleCycleMulDiv : Boolean = true, + hardwareDiv: Boolean = true, singleCycleShift : Boolean = true, relaxedPcCalculation : Boolean = false, bypass : Boolean = true, externalInterruptArray : Boolean = true, resetVector : BigInt = null, machineTrapVector : BigInt = null, + memoryAndWritebackStage : Boolean = true, prediction : BranchPrediction = STATIC, outputFile : String = "VexRiscv", csrPluginConfig : String = "small", @@ -66,9 +72,12 @@ object GenCoreDefault{ opt[Int]("pmpGranularity") action { (v, c) => c.copy(pmpGranularity = v) } text("Granularity of PMP regions (in bytes)") opt[Boolean]("mulDiv") action { (v, c) => c.copy(mulDiv = v) } text("set RV32IM") opt[Boolean]("cfu") action { (v, c) => c.copy(cfu = v) } text("If true, add SIMD ADD custom function unit") + opt[Boolean]("safe") action { (v, c) => c.copy(safe = v) } text("Default true; if false, disable many checks.") + opt[Int]("perfCSRs") action { (v, c) => c.copy(perfCSRs = v) } text("Number of pausable performance counter CSRs to add (default 0)") opt[Boolean]("atomics") action { (v, c) => c.copy(atomics = v) } text("set RV32I[A]") opt[Boolean]("compressedGen") action { (v, c) => c.copy(compressedGen = v) } text("set RV32I[C]") opt[Boolean]("singleCycleMulDiv") action { (v, c) => c.copy(singleCycleMulDiv = v) } text("If true, MUL/DIV are single-cycle") + opt[Boolean]("hardwareDiv") action { (v, c) => c.copy(hardwareDiv = v) } text ("Default true; if false, turns off any _iterative_ hardware division.") opt[Boolean]("singleCycleShift") action { (v, c) => c.copy(singleCycleShift = v) } text("If true, SHIFTS are single-cycle") opt[Boolean]("relaxedPcCalculation") action { (v, c) => c.copy(relaxedPcCalculation = v) } text("If true, one extra stage will be added to the fetch to improve timings") opt[Boolean]("bypass") action { (v, c) => c.copy(bypass = v) } text("set pipeline interlock/bypass") @@ -77,13 +86,18 @@ object GenCoreDefault{ opt[Boolean]("dBusCachedEarlyWaysHits") action { (v, c) => c.copy(dBusCachedEarlyWaysHits = v) } text("If set, the d$ way hit calculation is done in the memory stage, else in the writeback stage.") opt[String]("resetVector") action { (v, c) => c.copy(resetVector = BigInt(if(v.startsWith("0x")) v.tail.tail else v, 16)) } text("Specify the CPU reset vector in hexadecimal. If not specified, an 32 bits input is added to the CPU to set durring instanciation") opt[String]("machineTrapVector") action { (v, c) => c.copy(machineTrapVector = BigInt(if(v.startsWith("0x")) v.tail.tail else v, 16)) } text("Specify the CPU machine trap vector in hexadecimal. If not specified, it take a unknown value when the design boot") + opt[Boolean]("memoryAndWritebackStage") action { (v, c) => c.copy(memoryAndWritebackStage = v) } text("Default true; if false, removes the memory and writeback stages.") opt[String]("prediction") action { (v, c) => c.copy(prediction = predictionMap(v)) } text("switch between regular CSR and array like one") opt[String]("outputFile") action { (v, c) => c.copy(outputFile = v) } text("output file name") - opt[String]("csrPluginConfig") action { (v, c) => c.copy(csrPluginConfig = v) } text("switch between 'small', 'all', 'linux' and 'linux-minimal' version of control and status registers configuration") + opt[String]("csrPluginConfig") action { (v, c) => c.copy(csrPluginConfig = v) } text("switch between 'small', 'mcycle', 'all', 'linux' and 'linux-minimal' version of control and status registers configuration") } val argConfig = parser.parse(args, ArgConfig()).get val linux = argConfig.csrPluginConfig.startsWith("linux") + if (!argConfig.memoryAndWritebackStage && argConfig.cfu) { + throw new RuntimeException("CFU plugin requires a memory and writeback stage.") + } + SpinalConfig.copy(netlistFileName = argConfig.outputFile + ".v").generateVerilog { // Generate CPU plugin list val plugins = ArrayBuffer[Plugin[VexRiscv]]() @@ -112,8 +126,8 @@ object GenCoreDefault{ addressWidth = 32, cpuDataWidth = 32, memDataWidth = 32, - catchIllegalAccess = true, - catchAccessFault = true, + catchIllegalAccess = argConfig.safe, + catchAccessFault = argConfig.safe, asyncTagMemory = false, twoCycleRam = false, twoCycleCache = !argConfig.compressedGen @@ -123,8 +137,8 @@ object GenCoreDefault{ if(argConfig.dCacheSize <= 0){ new DBusSimplePlugin( - catchAddressMisaligned = true, - catchAccessFault = true, + catchAddressMisaligned = argConfig.safe, + catchAccessFault = argConfig.safe, withLrSc = linux || argConfig.atomics, memoryTranslatorPortConfig = if(linux) MmuPortConfig(portTlbSize = 4) else null ) @@ -161,7 +175,7 @@ object GenCoreDefault{ ), new DecoderSimplePlugin( - catchIllegalInstruction = true + catchIllegalInstruction = argConfig.safe || !argConfig.hardwareDiv ), new RegFilePlugin( regFileReadyKind = plugin.SYNC, @@ -170,7 +184,7 @@ object GenCoreDefault{ new IntAluPlugin, new SrcPlugin( separatedAddSub = false, - executeInsertion = true + executeInsertion = argConfig.memoryAndWritebackStage ), if(argConfig.singleCycleShift) { new FullBarrelShifterPlugin @@ -188,12 +202,13 @@ object GenCoreDefault{ ), new BranchPlugin( // If using CFU, use earlyBranch to avoid incorrect CFU execution - earlyBranch = argConfig.cfu, - catchAddressMisaligned = true + earlyBranch = argConfig.cfu || !argConfig.memoryAndWritebackStage, + catchAddressMisaligned = argConfig.safe ), new CsrPlugin( argConfig.csrPluginConfig match { case "small" => CsrPluginConfig.small(mtvecInit = argConfig.machineTrapVector).copy(mtvecAccess = WRITE_ONLY, ecallGen = true, wfiGenAsNop = true) + case "mcycle" => CsrPluginConfig.small(mtvecInit = argConfig.machineTrapVector).copy(mcycleAccess = READ_ONLY, mtvecAccess = WRITE_ONLY, ecallGen = true, wfiGenAsNop = true) case "all" => CsrPluginConfig.all(mtvecInit = argConfig.machineTrapVector) case "linux" => CsrPluginConfig.linuxFull(mtVecInit = argConfig.machineTrapVector).copy(ebreakGen = false) case "linux-minimal" => CsrPluginConfig.linuxMinimal(mtVecInit = argConfig.machineTrapVector).copy(ebreakGen = false) @@ -205,15 +220,15 @@ object GenCoreDefault{ if(argConfig.mulDiv) { if(argConfig.singleCycleMulDiv) { - plugins ++= List( - new MulPlugin, - new DivPlugin - ) + plugins ++= List(new MulPlugin) + if (argConfig.hardwareDiv) { + plugins ++= List(new DivPlugin) + } }else { plugins ++= List( new MulDivIterativePlugin( genMul = true, - genDiv = true, + genDiv = argConfig.hardwareDiv, mulUnrollFactor = 1, divUnrollFactor = 1 ) @@ -274,8 +289,19 @@ object GenCoreDefault{ ) } + // Performance counter CSRs + if(argConfig.perfCSRs > 0) { + plugins ++= List( + new PerfCsrPlugin(argConfig.perfCSRs) + ) + } + // CPU configuration - val cpuConfig = VexRiscvConfig(plugins.toList) + val cpuConfig = VexRiscvConfig( + withMemoryStage = argConfig.memoryAndWritebackStage, + withWriteBackStage = argConfig.memoryAndWritebackStage, + plugins.toList + ) // CPU instantiation val cpu = new VexRiscv(cpuConfig) @@ -325,3 +351,27 @@ class ForceRamBlockPhase() extends spinal.core.internals.Phase{ } override def hasNetlistImpact: Boolean = false } + + +class PerfCsrPlugin( val csrCount : Int ) extends Plugin[VexRiscv]{ + override def build(pipeline: VexRiscv): Unit = { + import pipeline._ + import pipeline.config._ + + pipeline plug new Area{ + for (idx <- 0 until csrCount) { + + val cycleCounter = Reg(UInt(32 bits)) + val enable = Reg(UInt(32 bits)) // only the LSB is used + + when ( enable(0) ) { + cycleCounter := cycleCounter + 1 + } + + val csrService = pipeline.service(classOf[CsrInterface]) + csrService.rw(0xB04 + idx * 2, cycleCounter) + csrService.w( 0xB04 + idx * 2 + 1, enable) + } + } + } +}