@@ -1587,47 +1587,97 @@ void X86AsmPrinter::EmitSEHInstruction(const MachineInstr *MI) {
15871587 }
15881588}
15891589
1590- int once = 0 ;
15911590static void trace_register (const MachineInstr *MI) {
1592- if (once != 0 )
1593- return ;
1594- once = 1 ;
1595-
15961591 if (MI->getNumOperands () == 0 || !MI->getOperand (0 ).isReg ())
15971592 return ;
15981593
1594+ auto TRI = MI->getParent ()->getParent ()->getRegInfo ().getTargetRegisterInfo ();
15991595 std::set<unsigned > dep_regs;
1600- std::set<const MachineOperand * > result;
1596+ std::set<unsigned > result;
16011597
16021598 for (int i = 1 , e = MI->getNumOperands (); i < e; i++)
16031599 if (MI->getOperand (i).isReg () && !MI->getOperand (i).isDead ()) {
16041600 dep_regs.insert (MI->getOperand (i).getReg ());
1605- result.insert (& MI->getOperand (i));
1601+ result.insert (MI->getOperand (i). getReg ( ));
16061602 }
16071603
16081604 if (dep_regs.size () == 0 )
16091605 return ;
16101606
16111607 MI = MI->getPrevNode ();
16121608 for (; MI != nullptr ; MI = MI->getPrevNode ()) {
1613- if (MI->getNumOperands () == 0 || !MI->getOperand (0 ).isReg ())
1614- continue ;
1615- if (dep_regs.find (MI->getOperand (0 ).getReg ()) == dep_regs.end ())
1616- continue ;
1609+ unsigned StartOp = 0 ;
1610+ unsigned e = MI->getNumOperands ();
1611+ unsigned dep = 0 ;
1612+
1613+ while (StartOp < e) {
1614+ auto MO = MI->getOperand (StartOp);
1615+ if (!MO.isReg () || !MO.isDef () || MO.isImplicit ())
1616+ break ;
1617+ if (dep_regs.count (MO.getReg ())) {
1618+ dep++;
1619+ dep_regs.erase (MO.getReg ());
1620+ }
1621+ ++StartOp;
1622+ }
16171623
1618- dep_regs.erase (MI->getOperand (0 ).getReg ());
1624+ if (dep == 0 ) {
1625+ if (!MI->isCall ())
1626+ continue ;
1627+ }
16191628
1620- for (int i = 1 , e = MI->getNumOperands (); i < e; i++)
1621- if (MI->getOperand (i).isReg () && !MI->getOperand (i).isDead ()) {
1622- dep_regs.insert (MI->getOperand (i).getReg ());
1623- result.insert (&MI->getOperand (i));
1629+ for (int i = StartOp, e = MI->getNumOperands (); i < e; i++) {
1630+ auto MO = MI->getOperand (i);
1631+ // errs() << "-- " << MO << '\n';
1632+ if (MO.isReg () && !MO.isDead ()) {
1633+ // errs() << "---- " << MO << '\n';
1634+ dep_regs.insert (MO.getReg ());
1635+ result.insert (MO.getReg ());
1636+ } else if (MO.isRegMask ()) {
1637+ // errs() << "---* " << MO << '\n';
1638+ auto LRI = dep_regs.begin ();
1639+ while (LRI != dep_regs.end ()) {
1640+ if (MO.clobbersPhysReg (*LRI))
1641+ LRI = dep_regs.erase (LRI);
1642+ else
1643+ ++LRI;
1644+ }
16241645 }
1646+ }
16251647 }
16261648
1649+ errs () << " Available Registers: " ;
16271650 for (auto reg : result) {
1628- reg->print (errs ());
1629- errs () << ' \n ' ;
1651+ if (!TargetRegisterInfo::isPhysicalRegister (reg))
1652+ continue ;
1653+ errs () << printReg (reg, TRI) << ' ' ;
1654+ // reg->print(errs());
1655+ }
1656+ errs () << ' \n ' ;
1657+ }
1658+
1659+ #include " llvm/CodeGen/LivePhysRegs.h"
1660+
1661+ void trace_register2 (const MachineInstr *MI) {
1662+ auto bb_entry = MI->getParent ()->begin ();
1663+
1664+ errs () << " Target Instruction: " << *MI << ' \n ' ;
1665+ errs () << *MI->getParent () << ' \n ' ;
1666+ errs () << " i--------------------------------\n " ;
1667+
1668+ LivePhysRegs lpr (*MI->getParent ()->getParent ()->getRegInfo ().getTargetRegisterInfo ());
1669+ lpr.print (errs ());
1670+ // lpr.addLiveOuts(*MI->getParent());
1671+ for (auto iter = MI; ; iter = iter->getPrevNode ()) {
1672+ lpr.stepBackward (*MI);
1673+ lpr.print (errs ());
1674+ if (iter == bb_entry)
1675+ break ;
16301676 }
1677+ /* for (auto iter = MI->getParent()->rbegin(); iter != MI->getParent()->rend(); iter++) {
1678+ lpr.print(errs());
1679+ lpr.stepBackward(*MI);
1680+ }*/
16311681}
16321682
16331683void X86AsmPrinter::EmitInstruction (const MachineInstr *MI) {
@@ -1649,7 +1699,13 @@ void X86AsmPrinter::EmitInstruction(const MachineInstr *MI) {
16491699 errs() << (int)MI->getOperand(i).getType() << '\n';
16501700 errs() << MI->getOperand(i).getReg() << '\n';
16511701 }*/
1702+ errs () << " s-----------------------------------------------------\n " ;
1703+ errs () << " Target Instruction: " << *MI << ' \n ' ;
1704+ errs () << *MI->getParent () << ' \n ' ;
1705+
16521706 trace_register (MI);
1707+ errs () << " e-----------------------------------------------------\n " ;
1708+ // trace_register2(MI);
16531709 }
16541710
16551711 // Add a comment about EVEX-2-VEX compression for AVX-512 instrs that
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