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[mega65] Add MEGA65 headers for hardware registers (#154)
* Add header mega65 header files from kickc This adds headers for vic2-4, cia/sid, math, hypervisor. Also adds a test of using the mega65.h header and vic4 registers. * Apply formatting * Add plasma example for MEGA65 This illustrates how to reduced the CPU speed; set the character set using the VIC-IV header; and the use of prama unroll. * Update plasma * Update plasma * Header work * Cleanup mega65 headers to match iomap.txt * Add ethernet and hypervisor * 45E100 Fast Ethernet controller header * Integer defines to annonymous enums Warnings for extensions are suppressed and compatability with CC65 is checked. * Update math registers [skip actions] * Fix mult duplicate * Add default color palette; prune headers * Prune header comments * Fix missing comma * Fix assertion
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‎examples/CMakeLists.txt‎

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@@ -52,6 +52,9 @@ endif()
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if(PLATFORM MATCHES ^atari2600-)
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add_subdirectory(atari2600)
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endif()
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if(PLATFORM STREQUAL ^mega65)
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add_subdirectory(mega65)
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endif()
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if(PLATFORM STREQUAL neo6502)
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add_subdirectory(neo6502)
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endif()

‎examples/mega65/CMakeLists.txt‎

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add_executable(viciv_test.prg viciv_test.c)
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install_example(viciv_test.prg)
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add_executable(plasma.prg plasma.cc)
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install_example(plasma.prg)
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‎examples/mega65/plasma.cc‎

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// Copyright 2023 LLVM-MOS Project
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// Licensed under the Apache License, Version 2.0 with LLVM Exceptions.
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// See https://github.com/llvm-mos/llvm-mos-sdk/blob/main/LICENSE for license
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// information.
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/*
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* Simplistic character-mode plasma effect
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*
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* Inspired by cc65/samples/cbm
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* - 2001 by groepaz
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* - Cleanup and porting by Ullrich von Bassewitz
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* - 2023 Mega65/LLVM-MOS C++ adaptation by Mikael Lund aka Wombat
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*/
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#include <array>
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#include <cstdint>
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#include <mega65.h>
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/*
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* Simple pseudo-random number generator
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* https://en.wikipedia.org/wiki/Xorshift
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*/
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class RandomXORS {
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private:
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uint32_t state = 7;
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public:
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inline uint8_t rand8() { return static_cast<uint8_t>(rand32() & 0xff); }
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inline uint32_t rand32() {
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state ^= state << 13;
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state ^= state >> 17;
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state ^= state << 5;
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return state;
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}
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};
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/*
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* Sets MEGA65 speed to 3.5 Mhz
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*/
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void speed_mode3() {
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VICIV.ctrlb |= VIC3_FAST_MASK;
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VICIV.ctrlc &= ~VIC4_VFAST_MASK;
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}
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/*
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* Cyclic sine lookup table
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*/
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constexpr uint8_t sine_table[UINT8_MAX + 1] = {
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0x80, 0x7d, 0x7a, 0x77, 0x74, 0x70, 0x6d, 0x6a, 0x67, 0x64, 0x61, 0x5e,
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0x5b, 0x58, 0x55, 0x52, 0x4f, 0x4d, 0x4a, 0x47, 0x44, 0x41, 0x3f, 0x3c,
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0x39, 0x37, 0x34, 0x32, 0x2f, 0x2d, 0x2b, 0x28, 0x26, 0x24, 0x22, 0x20,
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0x1e, 0x1c, 0x1a, 0x18, 0x16, 0x15, 0x13, 0x11, 0x10, 0x0f, 0x0d, 0x0c,
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0x0b, 0x0a, 0x08, 0x07, 0x06, 0x06, 0x05, 0x04, 0x03, 0x03, 0x02, 0x02,
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0x02, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x02, 0x02, 0x02, 0x03,
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0x03, 0x04, 0x05, 0x06, 0x06, 0x07, 0x08, 0x0a, 0x0b, 0x0c, 0x0d, 0x0f,
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0x10, 0x11, 0x13, 0x15, 0x16, 0x18, 0x1a, 0x1c, 0x1e, 0x20, 0x22, 0x24,
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0x26, 0x28, 0x2b, 0x2d, 0x2f, 0x32, 0x34, 0x37, 0x39, 0x3c, 0x3f, 0x41,
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0x44, 0x47, 0x4a, 0x4d, 0x4f, 0x52, 0x55, 0x58, 0x5b, 0x5e, 0x61, 0x64,
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0x67, 0x6a, 0x6d, 0x70, 0x74, 0x77, 0x7a, 0x7d, 0x80, 0x83, 0x86, 0x89,
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0x8c, 0x90, 0x93, 0x96, 0x99, 0x9c, 0x9f, 0xa2, 0xa5, 0xa8, 0xab, 0xae,
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0xb1, 0xb3, 0xb6, 0xb9, 0xbc, 0xbf, 0xc1, 0xc4, 0xc7, 0xc9, 0xcc, 0xce,
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0xd1, 0xd3, 0xd5, 0xd8, 0xda, 0xdc, 0xde, 0xe0, 0xe2, 0xe4, 0xe6, 0xe8,
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0xea, 0xeb, 0xed, 0xef, 0xf0, 0xf1, 0xf3, 0xf4, 0xf5, 0xf6, 0xf8, 0xf9,
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0xfa, 0xfa, 0xfb, 0xfc, 0xfd, 0xfd, 0xfe, 0xfe, 0xfe, 0xff, 0xff, 0xff,
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0xff, 0xff, 0xff, 0xff, 0xfe, 0xfe, 0xfe, 0xfd, 0xfd, 0xfc, 0xfb, 0xfa,
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0xfa, 0xf9, 0xf8, 0xf6, 0xf5, 0xf4, 0xf3, 0xf1, 0xf0, 0xef, 0xed, 0xeb,
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0xea, 0xe8, 0xe6, 0xe4, 0xe2, 0xe0, 0xde, 0xdc, 0xda, 0xd8, 0xd5, 0xd3,
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0xd1, 0xce, 0xcc, 0xc9, 0xc7, 0xc4, 0xc1, 0xbf, 0xbc, 0xb9, 0xb6, 0xb3,
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0xb1, 0xae, 0xab, 0xa8, 0xa5, 0xa2, 0x9f, 0x9c, 0x99, 0x96, 0x93, 0x90,
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0x8c, 0x89, 0x86, 0x83};
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/*
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* Generate charset with 8 * 256 characters at given address
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*/
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void make_charset(uint16_t charset_address, RandomXORS &rng) {
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/*
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* Lambda function to generate a single 8x8 pixels pattern
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*/
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auto make_char = [&](const uint8_t sine) {
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uint8_t pattern = 0;
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constexpr uint8_t bits[8] = {1, 2, 4, 8, 16, 32, 64, 128};
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for (const auto bit : bits) {
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if (rng.rand8() > sine) {
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pattern |= bit;
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}
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}
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return pattern;
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};
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auto charset = reinterpret_cast<volatile uint8_t *>(charset_address);
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for (const auto sine : sine_table) {
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for (int _i = 0; _i < 8; ++_i) {
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*(charset++) = make_char(sine);
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}
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}
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}
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/*
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* Plasma class
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*/
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template <size_t COLS, size_t ROWS> class Plasma {
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private:
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std::array<uint8_t, ROWS> ydata;
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std::array<uint8_t, COLS> xdata;
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uint8_t x_cnt1 = 0;
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uint8_t x_cnt2 = 0;
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uint8_t y_cnt1 = 0;
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uint8_t y_cnt2 = 0;
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public:
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/*
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* Generate and activate charset at given address
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*/
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Plasma(const uint16_t charset_address, RandomXORS &rng) {
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make_charset(charset_address, rng);
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VICIV.charptr = charset_address;
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}
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/*
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* Draw frame
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*/
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inline void update() {
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auto i = y_cnt1;
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auto j = y_cnt2;
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for (auto &y : ydata) {
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y = sine_table[i] + sine_table[j];
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i += 4;
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j += 9;
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}
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i = x_cnt1;
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j = x_cnt2;
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for (auto &x : xdata) {
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x = sine_table[i] + sine_table[j];
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i += 3;
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j += 7;
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}
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x_cnt1 += 2;
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x_cnt2 -= 3;
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y_cnt1 += 3;
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y_cnt2 -= 5;
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write_to_screen();
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}
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/*
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* Write summed buffers to screen memory
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*/
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inline void write_to_screen() const {
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auto screen_ptr = reinterpret_cast<volatile uint8_t *>(&DEFAULT_SCREEN);
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for (const auto y : ydata) {
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#pragma unroll
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for (const auto x : xdata) {
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*(screen_ptr++) = y + x;
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}
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}
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}
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};
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int main() {
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constexpr size_t COLS = 80;
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constexpr size_t ROWS = 25;
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constexpr uint16_t CHARSET_ADDRESS = 0x3000;
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RandomXORS rng;
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Plasma<COLS, ROWS> plasma(CHARSET_ADDRESS, rng);
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speed_mode3();
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while (true) {
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plasma.update();
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}
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}

‎examples/mega65/viciv_test.c‎

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#include <mega65.h>
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int main(void) {
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VICIV.screencol = COLOR_BUBBLEGUM;
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while (1) {
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VICIV.bordercol++;
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}
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return 0;
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}

‎mos-platform/mega65/CMakeLists.txt‎

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if(NOT CMAKE_CROSSCOMPILING)
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return()
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endif()
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install(FILES
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_45E100.h
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_vic3.h
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_vic4.h
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mega65.h
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TYPE INCLUDE)
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install(FILES link.ld TYPE LIB)
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‎mos-platform/mega65/_45E100.h‎

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// Copyright 2023 LLVM-MOS Project
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// Licensed under the Apache License, Version 2.0 with LLVM Exceptions.
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// See https://github.com/llvm-mos/llvm-mos-sdk/blob/main/LICENSE for license
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// information.
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#ifndef _45E100_H
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#define _45E100_H
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#include <stdint.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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/// 45E100 Fast Ethernet controller
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///
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/// Enabled by writing 0x53 and then 0x47 to VIC-IV register 0xD02F
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struct __45E100 {
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uint8_t ctrl1; //!< Control register 1 (offset 0x00)
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uint8_t ctrl2; //!< Control register 2 (offset 0x01)
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union {
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uint16_t txsz; //!< X Packet size (offset 0x02)
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struct {
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uint8_t txsz_lsb; //!< X Packet size (low byte) (offset 0x02)
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uint8_t txsz_msb; //!< X Packet size (high byte) (offset 0x03)
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};
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};
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uint8_t command; //!< Write-only command register (offset 0x04)
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uint8_t ctrl3; //!< Control register 3 (offset 0x05)
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/// MIIM PHY number (use 0 for Nexys4, 1 for MEGA65 r1 PCBs)
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/// and MIIM register number (offset 0x06)
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uint8_t miim_phy_reg;
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uint16_t miimv; //!< MIIM register value (offset 0x07)
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uint8_t macaddr[6]; //!< MAC address (offset 0x09)
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};
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#ifdef __cplusplus
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static_assert(sizeof(struct __45E100) == 16);
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#endif
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/// 45E100 Fast Ethernet controller commands
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enum
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#ifdef __clang__
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: uint8_t
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#endif
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{
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ETHERNET_STOPTX = 0,
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ETHERNET_STARTTX = 1,
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ETHERNET_RXNORMAL = 208,
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ETHERNET_DEBUGVIC = 212,
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ETHERNET_DEBUGCPU = 220,
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ETHERNET_RXONLYONE = 222,
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ETHERNET_FRAME1K = 241,
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ETHERNET_FRAME2K = 242
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};
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/*
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* The following masks are auto-generated from iomap.txt.
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* See https://github.com/dansanderson/mega65-symbols
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* Date: 2023-08-25
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*/
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enum
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#ifdef __clang__
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: uint8_t
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#endif
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{
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/** Write 0 to hold ethernet controller under reset */
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ETH_RST_MASK = 0b00000001,
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/** Write 0 to hold ethernet controller transmit sub-system under reset
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*/
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ETH_TXRST_MASK = 0b00000010,
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/** Read ethernet RX bits currently on the wire */
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ETH_DRXD_MASK = 0b00000100,
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/** Read ethernet RX data valid (debug) */
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ETH_DRXDV_MASK = 0b00001000,
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/** Allow remote keyboard input via magic ethernet frames */
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ETH_KEYEN_MASK = 0b00010000,
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/** Indicate if ethernet RX is blocked until RX buffers freed */
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ETH_RXBLKD_MASK = 0b01000000,
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/** Ethernet transmit side is idle, i.e., a packet can be sent. */
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ETH_TXIDLE_MASK = 0b10000000,
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/** Number of free receive buffers */
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ETH_RXBF_MASK = 0b00000110,
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/** Enable streaming of CPU instruction stream or VIC-IV display on
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* ethernet
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*/
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ETH_STRM_MASK = 0b00001000,
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/** Ethernet TX IRQ status */
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ETH_TXQ_MASK = 0b00010000,
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/** Ethernet RX IRQ status */
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ETH_RXQ_MASK = 0b00100000,
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/** Enable ethernet TX IRQ */
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ETH_TXQEN_MASK = 0b01000000,
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/** Enable ethernet RX IRQ */
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ETH_RXQEN_MASK = 0b10000000,
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/** Ethernet disable promiscuous mode */
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ETH_NOPROM_MASK = 0b00000001,
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/** Disable CRC check for received packets */
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ETH_NOCRC_MASK = 0b00000010,
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/** Ethernet TX clock phase adjust */
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ETH_TXPH_MASK = 0b00001100,
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/** Accept broadcast frames */
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ETH_BCST_MASK = 0b00010000,
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/** Accept multicast frames */
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ETH_MCST_MASK = 0b00100000,
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/** Ethernet RX clock phase adjust */
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ETH_RXPH_MASK = 0b11000000,
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/** Ethernet MIIM register number */
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ETH_MIIMREG_MASK = 0b00011111,
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/** Ethernet MIIM PHY number (use 0 for Nexys4, 1 for MEGA65 r1 PCBs) */
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ETH_MIIMPHY_MASK = 0b11100000
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};
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#ifdef __cplusplus
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} // extern block
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#endif
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#endif // header

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