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[FMV][AArch64] Expand feature dependencies using AArch64::ExtensionSet. (llvm#113281)
Currently we maintain a hand written list of subtarget features which we are implied for a given FMV feature. It is more robust to expand such dependencies using ExtensionDependency from TargetParser, since that is generated by tablegen. For this to work each FMV feature must have a corresponding SubtargetFeature in place. FMV features which didn't satisfy this criteria have been removed from the ACLE specification (ARM-software/acle#315). However, I deliberately marked the ArchExtKind in FMVInfo structure as std::optional in case we decide to break this rule in the future. I have also added the missing dependencies: * FEAT_DPB2 -> FEAT_DPB * FEAT_FlagM2 -> FEAT_FlagM
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10 files changed

+118
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‎clang/lib/AST/ASTContext.cpp‎

Lines changed: 4 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -14300,10 +14300,12 @@ QualType ASTContext::getCorrespondingSignedFixedPointType(QualType Ty) const {
1430014300
static std::vector<std::string> getFMVBackendFeaturesFor(
1430114301
const llvm::SmallVectorImpl<StringRef> &FMVFeatStrings) {
1430214302
std::vector<std::string> BackendFeats;
14303+
llvm::AArch64::ExtensionSet FeatureBits;
1430314304
for (StringRef F : FMVFeatStrings)
1430414305
if (auto FMVExt = llvm::AArch64::parseFMVExtension(F))
14305-
for (StringRef F : FMVExt->getImpliedFeatures())
14306-
BackendFeats.push_back(F.str());
14306+
if (FMVExt->ID)
14307+
FeatureBits.enable(*FMVExt->ID);
14308+
FeatureBits.toLLVMFeatureList(BackendFeats);
1430714309
return BackendFeats;
1430814310
}
1430914311

‎clang/lib/Basic/Targets/AArch64.cpp‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -722,7 +722,7 @@ unsigned AArch64TargetInfo::multiVersionFeatureCost() const {
722722
bool AArch64TargetInfo::doesFeatureAffectCodeGen(StringRef Name) const {
723723
// FMV extensions which imply no backend features do not affect codegen.
724724
if (auto Ext = llvm::AArch64::parseFMVExtension(Name))
725-
return !Ext->Features.empty();
725+
return Ext->ID.has_value();
726726
return false;
727727
}
728728

‎clang/test/CodeGen/aarch64-fmv-dependencies.c‎

Lines changed: 8 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -42,7 +42,7 @@ __attribute__((target_version("flagm"))) int fmv(void) { return 0; }
4242
// CHECK: define dso_local i32 @fmv._Mflagm2() #[[flagm2:[0-9]+]] {
4343
__attribute__((target_version("flagm2"))) int fmv(void) { return 0; }
4444

45-
// CHECK: define dso_local i32 @fmv._Mfp() #[[ATTR0:[0-9]+]] {
45+
// CHECK: define dso_local i32 @fmv._Mfp() #[[default:[0-9]+]] {
4646
__attribute__((target_version("fp"))) int fmv(void) { return 0; }
4747

4848
// CHECK: define dso_local i32 @fmv._Mfp16() #[[fp16:[0-9]+]] {
@@ -78,7 +78,7 @@ __attribute__((target_version("predres"))) int fmv(void) { return 0; }
7878
// CHECK: define dso_local i32 @fmv._Mrcpc() #[[rcpc:[0-9]+]] {
7979
__attribute__((target_version("rcpc"))) int fmv(void) { return 0; }
8080

81-
// CHECK: define dso_local i32 @fmv._Mrcpc2() #[[rcpc:[0-9]+]] {
81+
// CHECK: define dso_local i32 @fmv._Mrcpc2() #[[rcpc2:[0-9]+]] {
8282
__attribute__((target_version("rcpc2"))) int fmv(void) { return 0; }
8383

8484
// CHECK: define dso_local i32 @fmv._Mrcpc3() #[[rcpc3:[0-9]+]] {
@@ -99,7 +99,7 @@ __attribute__((target_version("sha2"))) int fmv(void) { return 0; }
9999
// CHECK: define dso_local i32 @fmv._Msha3() #[[sha3:[0-9]+]] {
100100
__attribute__((target_version("sha3"))) int fmv(void) { return 0; }
101101

102-
// CHECK: define dso_local i32 @fmv._Msimd() #[[ATTR0:[0-9]+]] {
102+
// CHECK: define dso_local i32 @fmv._Msimd() #[[default]] {
103103
__attribute__((target_version("simd"))) int fmv(void) { return 0; }
104104

105105
// CHECK: define dso_local i32 @fmv._Msm4() #[[sm4:[0-9]+]] {
@@ -163,7 +163,7 @@ int caller() {
163163
// CHECK: attributes #[[fcma]] = { {{.*}} "target-features"="+complxnum,+fp-armv8,+neon,+outline-atomics,+v8a"
164164
// CHECK: attributes #[[flagm]] = { {{.*}} "target-features"="+flagm,+fp-armv8,+neon,+outline-atomics,+v8a"
165165
// CHECK: attributes #[[flagm2]] = { {{.*}} "target-features"="+altnzcv,+flagm,+fp-armv8,+neon,+outline-atomics,+v8a"
166-
// CHECK: attributes #[[ATTR0]] = { {{.*}} "target-features"="+fp-armv8,+neon,+outline-atomics,+v8a"
166+
// CHECK: attributes #[[default]] = { {{.*}} "target-features"="+fp-armv8,+neon,+outline-atomics,+v8a"
167167
// CHECK: attributes #[[fp16]] = { {{.*}} "target-features"="+fp-armv8,+fullfp16,+neon,+outline-atomics,+v8a"
168168
// CHECK: attributes #[[fp16fml]] = { {{.*}} "target-features"="+fp-armv8,+fp16fml,+fullfp16,+neon,+outline-atomics,+v8a"
169169
// CHECK: attributes #[[frintts]] = { {{.*}} "target-features"="+fp-armv8,+fptoint,+neon,+outline-atomics,+v8a"
@@ -175,7 +175,8 @@ int caller() {
175175
// CHECK: attributes #[[mops]] = { {{.*}} "target-features"="+fp-armv8,+mops,+neon,+outline-atomics,+v8a"
176176
// CHECK: attributes #[[predres]] = { {{.*}} "target-features"="+fp-armv8,+neon,+outline-atomics,+predres,+v8a"
177177
// CHECK: attributes #[[rcpc]] = { {{.*}} "target-features"="+fp-armv8,+neon,+outline-atomics,+rcpc,+v8a"
178-
// CHECK: attributes #[[rcpc3]] = { {{.*}} "target-features"="+fp-armv8,+neon,+outline-atomics,+rcpc,+rcpc3,+v8a"
178+
// CHECK: attributes #[[rcpc2]] = { {{.*}} "target-features"="+fp-armv8,+neon,+outline-atomics,+rcpc,+rcpc-immo,+v8a"
179+
// CHECK: attributes #[[rcpc3]] = { {{.*}} "target-features"="+fp-armv8,+neon,+outline-atomics,+rcpc,+rcpc-immo,+rcpc3,+v8a"
179180
// CHECK: attributes #[[rdm]] = { {{.*}} "target-features"="+fp-armv8,+neon,+outline-atomics,+rdm,+v8a"
180181
// CHECK: attributes #[[rng]] = { {{.*}} "target-features"="+fp-armv8,+neon,+outline-atomics,+rand,+v8a"
181182
// CHECK: attributes #[[sb]] = { {{.*}} "target-features"="+fp-armv8,+neon,+outline-atomics,+sb,+v8a"
@@ -191,6 +192,6 @@ int caller() {
191192
// CHECK: attributes #[[sve2]] = { {{.*}} "target-features"="+fp-armv8,+fullfp16,+neon,+outline-atomics,+sve,+sve2,+v8a"
192193
// CHECK: attributes #[[sve2_aes]] = { {{.*}} "target-features"="+aes,+fp-armv8,+fullfp16,+neon,+outline-atomics,+sve,+sve2,+sve2-aes,+v8a"
193194
// CHECK: attributes #[[sve2_bitperm]] = { {{.*}} "target-features"="+fp-armv8,+fullfp16,+neon,+outline-atomics,+sve,+sve2,+sve2-bitperm,+v8a"
194-
// CHECK: attributes #[[sve2_sha3]] = { {{.*}} "target-features"="+fp-armv8,+fullfp16,+neon,+outline-atomics,+sve,+sve2,+sve2-sha3,+v8a"
195-
// CHECK: attributes #[[sve2_sm4]] = { {{.*}} "target-features"="+fp-armv8,+fullfp16,+neon,+outline-atomics,+sve,+sve2,+sve2-sm4,+v8a"
195+
// CHECK: attributes #[[sve2_sha3]] = { {{.*}} "target-features"="+fp-armv8,+fullfp16,+neon,+outline-atomics,+sha2,+sha3,+sve,+sve2,+sve2-sha3,+v8a"
196+
// CHECK: attributes #[[sve2_sm4]] = { {{.*}} "target-features"="+fp-armv8,+fullfp16,+neon,+outline-atomics,+sm4,+sve,+sve2,+sve2-sm4,+v8a"
196197
// CHECK: attributes #[[wfxt]] = { {{.*}} "target-features"="+fp-armv8,+neon,+outline-atomics,+v8a,+wfxt"

‎clang/test/CodeGen/aarch64-targetattr.c‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -210,8 +210,8 @@ void applem4() {}
210210
// CHECK: attributes #[[ATTR7]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "tune-cpu"="generic" }
211211
// CHECK: attributes #[[ATTR8]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="neoverse-n1" "target-features"="+aes,+crc,+dotprod,+fp-armv8,+fullfp16,+lse,+neon,+perfmon,+ras,+rcpc,+rdm,+sha2,+spe,+ssbs,+v8.1a,+v8.2a,+v8a" "tune-cpu"="cortex-a710" }
212212
// CHECK: attributes #[[ATTR9]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+fp-armv8,+fullfp16,+sve" "tune-cpu"="cortex-a710" }
213-
// CHECK: attributes #[[ATTR10]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="neoverse-v1" "target-features"="+aes,+bf16,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fullfp16,+i8mm,+jsconv,+lse,+neon,+pauth,+perfmon,+rand,+ras,+rcpc,+rdm,+sha2,+sha3,+sm4,+spe,+ssbs,+sve,+sve2,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8a" }
214-
// CHECK: attributes #[[ATTR11]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="neoverse-v1" "target-features"="+aes,+bf16,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fullfp16,+i8mm,+jsconv,+lse,+neon,+pauth,+perfmon,+rand,+ras,+rcpc,+rdm,+sha2,+sha3,+sm4,+spe,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8a,-sve" }
213+
// CHECK: attributes #[[ATTR10]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="neoverse-v1" "target-features"="+aes,+bf16,+ccdp,+ccidx,+ccpp,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fullfp16,+i8mm,+jsconv,+lse,+neon,+pauth,+perfmon,+rand,+ras,+rcpc,+rdm,+sha2,+sha3,+sm4,+spe,+ssbs,+sve,+sve2,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8a" }
214+
// CHECK: attributes #[[ATTR11]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="neoverse-v1" "target-features"="+aes,+bf16,+ccdp,+ccidx,+ccpp,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fullfp16,+i8mm,+jsconv,+lse,+neon,+pauth,+perfmon,+rand,+ras,+rcpc,+rdm,+sha2,+sha3,+sm4,+spe,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8a,-sve" }
215215
// CHECK: attributes #[[ATTR12]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+fp-armv8,+fullfp16,+sve" }
216216
// CHECK: attributes #[[ATTR13]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+fp-armv8,+fullfp16" }
217217
// CHECK: attributes #[[ATTR14]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="neoverse-n1" "target-features"="+aes,+bf16,+bti,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fullfp16,+i8mm,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+spe,+ssbs,+sve,+sve2,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8.6a,+v8a" "tune-cpu"="cortex-a710" }

‎clang/test/CodeGen/attr-target-version.c‎

Lines changed: 28 additions & 28 deletions
Original file line numberDiff line numberDiff line change
@@ -248,14 +248,14 @@ int caller(void) { return used_def_without_default_decl() + used_decl_without_de
248248
//
249249
// CHECK: Function Attrs: noinline nounwind optnone
250250
// CHECK-LABEL: define {{[^@]+}}@fmv_two._Msimd
251-
// CHECK-SAME: () #[[ATTR12]] {
251+
// CHECK-SAME: () #[[ATTR13:[0-9]+]] {
252252
// CHECK-NEXT: entry:
253253
// CHECK-NEXT: ret i32 2
254254
//
255255
//
256256
// CHECK: Function Attrs: noinline nounwind optnone
257257
// CHECK-LABEL: define {{[^@]+}}@fmv_two._Mfp16Msimd
258-
// CHECK-SAME: () #[[ATTR13:[0-9]+]] {
258+
// CHECK-SAME: () #[[ATTR14:[0-9]+]] {
259259
// CHECK-NEXT: entry:
260260
// CHECK-NEXT: ret i32 4
261261
//
@@ -288,7 +288,7 @@ int caller(void) { return used_def_without_default_decl() + used_decl_without_de
288288
//
289289
// CHECK: Function Attrs: noinline nounwind optnone
290290
// CHECK-LABEL: define {{[^@]+}}@fmv_c._Mssbs
291-
// CHECK-SAME: () #[[ATTR14:[0-9]+]] {
291+
// CHECK-SAME: () #[[ATTR15:[0-9]+]] {
292292
// CHECK-NEXT: entry:
293293
// CHECK-NEXT: ret void
294294
//
@@ -346,14 +346,14 @@ int caller(void) { return used_def_without_default_decl() + used_decl_without_de
346346
//
347347
// CHECK: Function Attrs: noinline nounwind optnone
348348
// CHECK-LABEL: define {{[^@]+}}@unused_with_forward_default_decl._Mmops
349-
// CHECK-SAME: () #[[ATTR16:[0-9]+]] {
349+
// CHECK-SAME: () #[[ATTR17:[0-9]+]] {
350350
// CHECK-NEXT: entry:
351351
// CHECK-NEXT: ret i32 0
352352
//
353353
//
354354
// CHECK: Function Attrs: noinline nounwind optnone
355355
// CHECK-LABEL: define {{[^@]+}}@unused_with_implicit_extern_forward_default_decl._Mdotprod
356-
// CHECK-SAME: () #[[ATTR17:[0-9]+]] {
356+
// CHECK-SAME: () #[[ATTR18:[0-9]+]] {
357357
// CHECK-NEXT: entry:
358358
// CHECK-NEXT: ret i32 0
359359
//
@@ -367,7 +367,7 @@ int caller(void) { return used_def_without_default_decl() + used_decl_without_de
367367
//
368368
// CHECK: Function Attrs: noinline nounwind optnone
369369
// CHECK-LABEL: define {{[^@]+}}@unused_with_default_def._Msve
370-
// CHECK-SAME: () #[[ATTR18:[0-9]+]] {
370+
// CHECK-SAME: () #[[ATTR19:[0-9]+]] {
371371
// CHECK-NEXT: entry:
372372
// CHECK-NEXT: ret i32 0
373373
//
@@ -381,7 +381,7 @@ int caller(void) { return used_def_without_default_decl() + used_decl_without_de
381381
//
382382
// CHECK: Function Attrs: noinline nounwind optnone
383383
// CHECK-LABEL: define {{[^@]+}}@unused_with_implicit_default_def._Mfp16
384-
// CHECK-SAME: () #[[ATTR13]] {
384+
// CHECK-SAME: () #[[ATTR20:[0-9]+]] {
385385
// CHECK-NEXT: entry:
386386
// CHECK-NEXT: ret i32 0
387387
//
@@ -402,14 +402,14 @@ int caller(void) { return used_def_without_default_decl() + used_decl_without_de
402402
//
403403
// CHECK: Function Attrs: noinline nounwind optnone
404404
// CHECK-LABEL: define {{[^@]+}}@unused_with_implicit_forward_default_def._Mlse
405-
// CHECK-SAME: () #[[ATTR19:[0-9]+]] {
405+
// CHECK-SAME: () #[[ATTR21:[0-9]+]] {
406406
// CHECK-NEXT: entry:
407407
// CHECK-NEXT: ret i32 1
408408
//
409409
//
410410
// CHECK: Function Attrs: noinline nounwind optnone
411411
// CHECK-LABEL: define {{[^@]+}}@unused_without_default._Mrdm
412-
// CHECK-SAME: () #[[ATTR20:[0-9]+]] {
412+
// CHECK-SAME: () #[[ATTR22:[0-9]+]] {
413413
// CHECK-NEXT: entry:
414414
// CHECK-NEXT: ret i32 0
415415
//
@@ -423,14 +423,14 @@ int caller(void) { return used_def_without_default_decl() + used_decl_without_de
423423
//
424424
// CHECK: Function Attrs: noinline nounwind optnone
425425
// CHECK-LABEL: define {{[^@]+}}@used_def_without_default_decl._Mjscvt
426-
// CHECK-SAME: () #[[ATTR22:[0-9]+]] {
426+
// CHECK-SAME: () #[[ATTR24:[0-9]+]] {
427427
// CHECK-NEXT: entry:
428428
// CHECK-NEXT: ret i32 1
429429
//
430430
//
431431
// CHECK: Function Attrs: noinline nounwind optnone
432432
// CHECK-LABEL: define {{[^@]+}}@used_def_without_default_decl._Mrdm
433-
// CHECK-SAME: () #[[ATTR20]] {
433+
// CHECK-SAME: () #[[ATTR22]] {
434434
// CHECK-NEXT: entry:
435435
// CHECK-NEXT: ret i32 2
436436
//
@@ -602,7 +602,7 @@ int caller(void) { return used_def_without_default_decl() + used_decl_without_de
602602
//
603603
// CHECK: Function Attrs: noinline nounwind optnone
604604
// CHECK-LABEL: define {{[^@]+}}@fmv_d._Msb
605-
// CHECK-SAME: () #[[ATTR24:[0-9]+]] {
605+
// CHECK-SAME: () #[[ATTR26:[0-9]+]] {
606606
// CHECK-NEXT: entry:
607607
// CHECK-NEXT: ret i32 0
608608
//
@@ -644,112 +644,112 @@ int caller(void) { return used_def_without_default_decl() + used_decl_without_de
644644
//
645645
// CHECK: Function Attrs: noinline nounwind optnone
646646
// CHECK-LABEL: define {{[^@]+}}@fmv_inline._MaesMf64mmMsha2
647-
// CHECK-SAME: () #[[ATTR25:[0-9]+]] {
647+
// CHECK-SAME: () #[[ATTR27:[0-9]+]] {
648648
// CHECK-NEXT: entry:
649649
// CHECK-NEXT: ret i32 1
650650
//
651651
//
652652
// CHECK: Function Attrs: noinline nounwind optnone
653653
// CHECK-LABEL: define {{[^@]+}}@fmv_inline._MfcmaMfp16MrdmMsme
654-
// CHECK-SAME: () #[[ATTR26:[0-9]+]] {
654+
// CHECK-SAME: () #[[ATTR28:[0-9]+]] {
655655
// CHECK-NEXT: entry:
656656
// CHECK-NEXT: ret i32 2
657657
//
658658
//
659659
// CHECK: Function Attrs: noinline nounwind optnone
660660
// CHECK-LABEL: define {{[^@]+}}@fmv_inline._Mf32mmMi8mmMsha3
661-
// CHECK-SAME: () #[[ATTR27:[0-9]+]] {
661+
// CHECK-SAME: () #[[ATTR29:[0-9]+]] {
662662
// CHECK-NEXT: entry:
663663
// CHECK-NEXT: ret i32 12
664664
//
665665
//
666666
// CHECK: Function Attrs: noinline nounwind optnone
667667
// CHECK-LABEL: define {{[^@]+}}@fmv_inline._Mbf16Mdit
668-
// CHECK-SAME: () #[[ATTR28:[0-9]+]] {
668+
// CHECK-SAME: () #[[ATTR30:[0-9]+]] {
669669
// CHECK-NEXT: entry:
670670
// CHECK-NEXT: ret i32 8
671671
//
672672
//
673673
// CHECK: Function Attrs: noinline nounwind optnone
674674
// CHECK-LABEL: define {{[^@]+}}@fmv_inline._MdpbMrcpc2
675-
// CHECK-SAME: () #[[ATTR29:[0-9]+]] {
675+
// CHECK-SAME: () #[[ATTR31:[0-9]+]] {
676676
// CHECK-NEXT: entry:
677677
// CHECK-NEXT: ret i32 6
678678
//
679679
//
680680
// CHECK: Function Attrs: noinline nounwind optnone
681681
// CHECK-LABEL: define {{[^@]+}}@fmv_inline._Mdpb2Mjscvt
682-
// CHECK-SAME: () #[[ATTR30:[0-9]+]] {
682+
// CHECK-SAME: () #[[ATTR32:[0-9]+]] {
683683
// CHECK-NEXT: entry:
684684
// CHECK-NEXT: ret i32 7
685685
//
686686
//
687687
// CHECK: Function Attrs: noinline nounwind optnone
688688
// CHECK-LABEL: define {{[^@]+}}@fmv_inline._MfrinttsMrcpc
689-
// CHECK-SAME: () #[[ATTR31:[0-9]+]] {
689+
// CHECK-SAME: () #[[ATTR33:[0-9]+]] {
690690
// CHECK-NEXT: entry:
691691
// CHECK-NEXT: ret i32 3
692692
//
693693
//
694694
// CHECK: Function Attrs: noinline nounwind optnone
695695
// CHECK-LABEL: define {{[^@]+}}@fmv_inline._Mbf16Msve
696-
// CHECK-SAME: () #[[ATTR32:[0-9]+]] {
696+
// CHECK-SAME: () #[[ATTR34:[0-9]+]] {
697697
// CHECK-NEXT: entry:
698698
// CHECK-NEXT: ret i32 4
699699
//
700700
//
701701
// CHECK: Function Attrs: noinline nounwind optnone
702702
// CHECK-LABEL: define {{[^@]+}}@fmv_inline._Msve2-aesMsve2-sha3
703-
// CHECK-SAME: () #[[ATTR33:[0-9]+]] {
703+
// CHECK-SAME: () #[[ATTR35:[0-9]+]] {
704704
// CHECK-NEXT: entry:
705705
// CHECK-NEXT: ret i32 5
706706
//
707707
//
708708
// CHECK: Function Attrs: noinline nounwind optnone
709709
// CHECK-LABEL: define {{[^@]+}}@fmv_inline._Msve2Msve2-aesMsve2-bitperm
710-
// CHECK-SAME: () #[[ATTR34:[0-9]+]] {
710+
// CHECK-SAME: () #[[ATTR36:[0-9]+]] {
711711
// CHECK-NEXT: entry:
712712
// CHECK-NEXT: ret i32 9
713713
//
714714
//
715715
// CHECK: Function Attrs: noinline nounwind optnone
716716
// CHECK-LABEL: define {{[^@]+}}@fmv_inline._MmemtagMsve2-sm4
717-
// CHECK-SAME: () #[[ATTR35:[0-9]+]] {
717+
// CHECK-SAME: () #[[ATTR37:[0-9]+]] {
718718
// CHECK-NEXT: entry:
719719
// CHECK-NEXT: ret i32 10
720720
//
721721
//
722722
// CHECK: Function Attrs: noinline nounwind optnone
723723
// CHECK-LABEL: define {{[^@]+}}@fmv_inline._MmemtagMmopsMrcpc3
724-
// CHECK-SAME: () #[[ATTR36:[0-9]+]] {
724+
// CHECK-SAME: () #[[ATTR38:[0-9]+]] {
725725
// CHECK-NEXT: entry:
726726
// CHECK-NEXT: ret i32 11
727727
//
728728
//
729729
// CHECK: Function Attrs: noinline nounwind optnone
730730
// CHECK-LABEL: define {{[^@]+}}@fmv_inline._MaesMdotprod
731-
// CHECK-SAME: () #[[ATTR37:[0-9]+]] {
731+
// CHECK-SAME: () #[[ATTR39:[0-9]+]] {
732732
// CHECK-NEXT: entry:
733733
// CHECK-NEXT: ret i32 13
734734
//
735735
//
736736
// CHECK: Function Attrs: noinline nounwind optnone
737737
// CHECK-LABEL: define {{[^@]+}}@fmv_inline._Mfp16fmlMsimd
738-
// CHECK-SAME: () #[[ATTR38:[0-9]+]] {
738+
// CHECK-SAME: () #[[ATTR40:[0-9]+]] {
739739
// CHECK-NEXT: entry:
740740
// CHECK-NEXT: ret i32 14
741741
//
742742
//
743743
// CHECK: Function Attrs: noinline nounwind optnone
744744
// CHECK-LABEL: define {{[^@]+}}@fmv_inline._MfpMsm4
745-
// CHECK-SAME: () #[[ATTR39:[0-9]+]] {
745+
// CHECK-SAME: () #[[ATTR41:[0-9]+]] {
746746
// CHECK-NEXT: entry:
747747
// CHECK-NEXT: ret i32 15
748748
//
749749
//
750750
// CHECK: Function Attrs: noinline nounwind optnone
751751
// CHECK-LABEL: define {{[^@]+}}@fmv_inline._MlseMrdm
752-
// CHECK-SAME: () #[[ATTR40:[0-9]+]] {
752+
// CHECK-SAME: () #[[ATTR42:[0-9]+]] {
753753
// CHECK-NEXT: entry:
754754
// CHECK-NEXT: ret i32 16
755755
//

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