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[X86] combineX86ShuffleChain - pull out repeated getOpcode() calls. NFC.
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‎llvm/lib/Target/X86/X86ISelLowering.cpp‎

Lines changed: 22 additions & 22 deletions
Original file line numberDiff line numberDiff line change
@@ -39626,6 +39626,7 @@ static SDValue combineX86ShuffleChain(ArrayRef<SDValue> Inputs, SDValue Root,
3962639626
"Unexpected number of shuffle inputs!");
3962739627

3962839628
SDLoc DL(Root);
39629+
unsigned RootOpc = Root.getOpcode();
3962939630
MVT RootVT = Root.getSimpleValueType();
3963039631
unsigned RootSizeInBits = RootVT.getSizeInBits();
3963139632
unsigned NumRootElts = RootVT.getVectorNumElements();
@@ -39710,7 +39711,7 @@ static SDValue combineX86ShuffleChain(ArrayRef<SDValue> Inputs, SDValue Root,
3971039711
// optimal than using X86ISD::SHUF128. The insertion is free, even if it has
3971139712
// to zero the upper subvectors.
3971239713
if (isUndefOrZeroInRange(Mask, 1, NumBaseMaskElts - 1)) {
39713-
if (Depth == 0 && Root.getOpcode() == ISD::INSERT_SUBVECTOR)
39714+
if (Depth == 0 && RootOpc == ISD::INSERT_SUBVECTOR)
3971439715
return SDValue(); // Nothing to do!
3971539716
assert(isInRange(Mask[0], 0, NumBaseMaskElts) &&
3971639717
"Unexpected lane shuffle");
@@ -39767,7 +39768,7 @@ static SDValue combineX86ShuffleChain(ArrayRef<SDValue> Inputs, SDValue Root,
3976739768
ScaledMask[1] == (ScaledMask[3] % 2));
3976839769

3976939770
if (!isAnyZero(ScaledMask) && !PreferPERMQ) {
39770-
if (Depth == 0 && Root.getOpcode() == X86ISD::SHUF128)
39771+
if (Depth == 0 && RootOpc == X86ISD::SHUF128)
3977139772
return SDValue(); // Nothing to do!
3977239773
MVT ShuffleVT = (FloatDomain ? MVT::v8f64 : MVT::v8i64);
3977339774
if (SDValue V = MatchSHUF128(ShuffleVT, DL, ScaledMask, V1, V2, DAG))
@@ -39781,7 +39782,7 @@ static SDValue combineX86ShuffleChain(ArrayRef<SDValue> Inputs, SDValue Root,
3978139782
// than using X86ISD::VPERM2X128. The insertion is free, even if it has to
3978239783
// zero the upper half.
3978339784
if (isUndefOrZero(Mask[1])) {
39784-
if (Depth == 0 && Root.getOpcode() == ISD::INSERT_SUBVECTOR)
39785+
if (Depth == 0 && RootOpc == ISD::INSERT_SUBVECTOR)
3978539786
return SDValue(); // Nothing to do!
3978639787
assert(isInRange(Mask[0], 0, 2) && "Unexpected lane shuffle");
3978739788
Res = CanonicalizeShuffleInput(RootVT, V1);
@@ -39795,15 +39796,15 @@ static SDValue combineX86ShuffleChain(ArrayRef<SDValue> Inputs, SDValue Root,
3979539796
// TODO: Add AVX2 support instead of VPERMQ/VPERMPD.
3979639797
if (BaseMask[0] == 0 && (BaseMask[1] == 0 || BaseMask[1] == 2) &&
3979739798
!Subtarget.hasAVX2()) {
39798-
if (Depth == 0 && Root.getOpcode() == ISD::INSERT_SUBVECTOR)
39799+
if (Depth == 0 && RootOpc == ISD::INSERT_SUBVECTOR)
3979939800
return SDValue(); // Nothing to do!
3980039801
SDValue Lo = CanonicalizeShuffleInput(RootVT, V1);
3980139802
SDValue Hi = CanonicalizeShuffleInput(RootVT, BaseMask[1] == 0 ? V1 : V2);
3980239803
Hi = extractSubVector(Hi, 0, DAG, DL, 128);
3980339804
return insertSubVector(Lo, Hi, NumRootElts / 2, DAG, DL, 128);
3980439805
}
3980539806

39806-
if (Depth == 0 && Root.getOpcode() == X86ISD::VPERM2X128)
39807+
if (Depth == 0 && RootOpc == X86ISD::VPERM2X128)
3980739808
return SDValue(); // Nothing to do!
3980839809

3980939810
// If we have AVX2, prefer to use VPERMQ/VPERMPD for unary shuffles unless
@@ -39820,7 +39821,7 @@ static SDValue combineX86ShuffleChain(ArrayRef<SDValue> Inputs, SDValue Root,
3982039821
DAG.getUNDEF(RootVT), DAG.getTargetConstant(PermMask, DL, MVT::i8));
3982139822
}
3982239823

39823-
if (Depth == 0 && Root.getOpcode() == X86ISD::SHUF128)
39824+
if (Depth == 0 && RootOpc == X86ISD::SHUF128)
3982439825
return SDValue(); // Nothing to do!
3982539826

3982639827
// TODO - handle AVX512VL cases with X86ISD::SHUF128.
@@ -39903,14 +39904,14 @@ static SDValue combineX86ShuffleChain(ArrayRef<SDValue> Inputs, SDValue Root,
3990339904
if (V1.getValueType() == MaskVT &&
3990439905
V1.getOpcode() == ISD::SCALAR_TO_VECTOR &&
3990539906
X86::mayFoldLoad(V1.getOperand(0), Subtarget)) {
39906-
if (Depth == 0 && Root.getOpcode() == X86ISD::VBROADCAST)
39907+
if (Depth == 0 && RootOpc == X86ISD::VBROADCAST)
3990739908
return SDValue(); // Nothing to do!
3990839909
Res = V1.getOperand(0);
3990939910
Res = DAG.getNode(X86ISD::VBROADCAST, DL, MaskVT, Res);
3991039911
return DAG.getBitcast(RootVT, Res);
3991139912
}
3991239913
if (Subtarget.hasAVX2()) {
39913-
if (Depth == 0 && Root.getOpcode() == X86ISD::VBROADCAST)
39914+
if (Depth == 0 && RootOpc == X86ISD::VBROADCAST)
3991439915
return SDValue(); // Nothing to do!
3991539916
Res = CanonicalizeShuffleInput(MaskVT, V1);
3991639917
Res = DAG.getNode(X86ISD::VBROADCAST, DL, MaskVT, Res);
@@ -39923,7 +39924,7 @@ static SDValue combineX86ShuffleChain(ArrayRef<SDValue> Inputs, SDValue Root,
3992339924
DAG, Subtarget, Shuffle, ShuffleSrcVT, ShuffleVT) &&
3992439925
(!IsMaskedShuffle ||
3992539926
(NumRootElts == ShuffleVT.getVectorNumElements()))) {
39926-
if (Depth == 0 && Root.getOpcode() == Shuffle)
39927+
if (Depth == 0 && RootOpc == Shuffle)
3992739928
return SDValue(); // Nothing to do!
3992839929
Res = CanonicalizeShuffleInput(ShuffleSrcVT, V1);
3992939930
Res = DAG.getNode(Shuffle, DL, ShuffleVT, Res);
@@ -39935,7 +39936,7 @@ static SDValue combineX86ShuffleChain(ArrayRef<SDValue> Inputs, SDValue Root,
3993539936
PermuteImm) &&
3993639937
(!IsMaskedShuffle ||
3993739938
(NumRootElts == ShuffleVT.getVectorNumElements()))) {
39938-
if (Depth == 0 && Root.getOpcode() == Shuffle)
39939+
if (Depth == 0 && RootOpc == Shuffle)
3993939940
return SDValue(); // Nothing to do!
3994039941
Res = CanonicalizeShuffleInput(ShuffleVT, V1);
3994139942
Res = DAG.getNode(Shuffle, DL, ShuffleVT, Res,
@@ -39955,7 +39956,7 @@ static SDValue combineX86ShuffleChain(ArrayRef<SDValue> Inputs, SDValue Root,
3995539956
if (matchShuffleAsInsertPS(SrcV1, SrcV2, PermuteImm, Zeroable, Mask,
3995639957
DAG) &&
3995739958
SrcV2.getOpcode() == ISD::SCALAR_TO_VECTOR) {
39958-
if (Depth == 0 && Root.getOpcode() == X86ISD::INSERTPS)
39959+
if (Depth == 0 && RootOpc == X86ISD::INSERTPS)
3995939960
return SDValue(); // Nothing to do!
3996039961
Res = DAG.getNode(X86ISD::INSERTPS, DL, MVT::v4f32,
3996139962
CanonicalizeShuffleInput(MVT::v4f32, SrcV1),
@@ -39968,7 +39969,7 @@ static SDValue combineX86ShuffleChain(ArrayRef<SDValue> Inputs, SDValue Root,
3996839969
isTargetShuffleEquivalent(MaskVT, Mask, {0, 2}, DAG) &&
3996939970
V2.getOpcode() == ISD::SCALAR_TO_VECTOR &&
3997039971
V2.getScalarValueSizeInBits() <= 32) {
39971-
if (Depth == 0 && Root.getOpcode() == X86ISD::INSERTPS)
39972+
if (Depth == 0 && RootOpc == X86ISD::INSERTPS)
3997239973
return SDValue(); // Nothing to do!
3997339974
PermuteImm = (/*DstIdx*/ 2 << 4) | (/*SrcIdx*/ 0 << 0);
3997439975
Res = DAG.getNode(X86ISD::INSERTPS, DL, MVT::v4f32,
@@ -39985,7 +39986,7 @@ static SDValue combineX86ShuffleChain(ArrayRef<SDValue> Inputs, SDValue Root,
3998539986
NewV2, DL, DAG, Subtarget, Shuffle, ShuffleSrcVT,
3998639987
ShuffleVT, UnaryShuffle) &&
3998739988
(!IsMaskedShuffle || (NumRootElts == ShuffleVT.getVectorNumElements()))) {
39988-
if (Depth == 0 && Root.getOpcode() == Shuffle)
39989+
if (Depth == 0 && RootOpc == Shuffle)
3998939990
return SDValue(); // Nothing to do!
3999039991
NewV1 = CanonicalizeShuffleInput(ShuffleSrcVT, NewV1);
3999139992
NewV2 = CanonicalizeShuffleInput(ShuffleSrcVT, NewV2);
@@ -39999,7 +40000,7 @@ static SDValue combineX86ShuffleChain(ArrayRef<SDValue> Inputs, SDValue Root,
3999940000
AllowIntDomain, NewV1, NewV2, DL, DAG,
4000040001
Subtarget, Shuffle, ShuffleVT, PermuteImm) &&
4000140002
(!IsMaskedShuffle || (NumRootElts == ShuffleVT.getVectorNumElements()))) {
40002-
if (Depth == 0 && Root.getOpcode() == Shuffle)
40003+
if (Depth == 0 && RootOpc == Shuffle)
4000340004
return SDValue(); // Nothing to do!
4000440005
NewV1 = CanonicalizeShuffleInput(ShuffleVT, NewV1);
4000540006
NewV2 = CanonicalizeShuffleInput(ShuffleVT, NewV2);
@@ -40017,7 +40018,7 @@ static SDValue combineX86ShuffleChain(ArrayRef<SDValue> Inputs, SDValue Root,
4001740018
uint64_t BitLen, BitIdx;
4001840019
if (matchShuffleAsEXTRQ(IntMaskVT, V1, V2, Mask, BitLen, BitIdx,
4001940020
Zeroable)) {
40020-
if (Depth == 0 && Root.getOpcode() == X86ISD::EXTRQI)
40021+
if (Depth == 0 && RootOpc == X86ISD::EXTRQI)
4002140022
return SDValue(); // Nothing to do!
4002240023
V1 = CanonicalizeShuffleInput(IntMaskVT, V1);
4002340024
Res = DAG.getNode(X86ISD::EXTRQI, DL, IntMaskVT, V1,
@@ -40027,7 +40028,7 @@ static SDValue combineX86ShuffleChain(ArrayRef<SDValue> Inputs, SDValue Root,
4002740028
}
4002840029

4002940030
if (matchShuffleAsINSERTQ(IntMaskVT, V1, V2, Mask, BitLen, BitIdx)) {
40030-
if (Depth == 0 && Root.getOpcode() == X86ISD::INSERTQI)
40031+
if (Depth == 0 && RootOpc == X86ISD::INSERTQI)
4003140032
return SDValue(); // Nothing to do!
4003240033
V1 = CanonicalizeShuffleInput(IntMaskVT, V1);
4003340034
V2 = CanonicalizeShuffleInput(IntMaskVT, V2);
@@ -40047,7 +40048,7 @@ static SDValue combineX86ShuffleChain(ArrayRef<SDValue> Inputs, SDValue Root,
4004740048
ShuffleSrcVT.getVectorNumElements();
4004840049
unsigned Opc =
4004940050
IsTRUNCATE ? (unsigned)ISD::TRUNCATE : (unsigned)X86ISD::VTRUNC;
40050-
if (Depth == 0 && Root.getOpcode() == Opc)
40051+
if (Depth == 0 && RootOpc == Opc)
4005140052
return SDValue(); // Nothing to do!
4005240053
V1 = CanonicalizeShuffleInput(ShuffleSrcVT, V1);
4005340054
Res = DAG.getNode(Opc, DL, ShuffleVT, V1);
@@ -40064,9 +40065,9 @@ static SDValue combineX86ShuffleChain(ArrayRef<SDValue> Inputs, SDValue Root,
4006440065
isSequentialOrUndefInRange(Mask, 0, NumMaskElts, 0, 2)) {
4006540066
// Bail if this was already a truncation or PACK node.
4006640067
// We sometimes fail to match PACK if we demand known undef elements.
40067-
if (Depth == 0 && (Root.getOpcode() == ISD::TRUNCATE ||
40068-
Root.getOpcode() == X86ISD::PACKSS ||
40069-
Root.getOpcode() == X86ISD::PACKUS))
40068+
if (Depth == 0 &&
40069+
(RootOpc == ISD::TRUNCATE || RootOpc == X86ISD::PACKSS ||
40070+
RootOpc == X86ISD::PACKUS))
4007040071
return SDValue(); // Nothing to do!
4007140072
ShuffleSrcVT = MVT::getIntegerVT(MaskEltSizeInBits * 2);
4007240073
ShuffleSrcVT = MVT::getVectorVT(ShuffleSrcVT, NumMaskElts / 2);
@@ -40110,8 +40111,7 @@ static SDValue combineX86ShuffleChain(ArrayRef<SDValue> Inputs, SDValue Root,
4011040111
(Depth >= BWIVPERMV3ShuffleDepth || HasSlowVariableMask);
4011140112

4011240113
// If root was a VPERMV/VPERMV3 node, always allow a variable shuffle.
40113-
if ((UnaryShuffle && Root.getOpcode() == X86ISD::VPERMV) ||
40114-
Root.getOpcode() == X86ISD::VPERMV3)
40114+
if ((UnaryShuffle && RootOpc == X86ISD::VPERMV) || RootOpc == X86ISD::VPERMV3)
4011540115
AllowVariableCrossLaneMask = AllowVariablePerLaneMask = true;
4011640116

4011740117
bool MaskContainsZeros = isAnyZero(Mask);

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