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1 parent e6fcf34 commit f5d8a48Copy full SHA for f5d8a48
llvm/docs/UserGuides.rst
@@ -286,7 +286,7 @@ Additional Topics
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DirectX runtime.
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:doc:`RISCVUsage`
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- This document describes using the RISCV-V target.
+ This document describes using the RISC-V target.
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:doc:`RISCV/RISCVVectorExtension`
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This document describes how the RISC-V Vector extension can be expressed in LLVM IR and how code is generated for it in the backend.
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