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[FIRRTL] Add lowering of domain fields
Update the LowerDomains pass to handle the new domain fields. This is a simple lowering of each field to one input and output port and a connection from the former to the latter. Closes #9032, as this is a simpler replacement for it. Signed-off-by: Schuyler Eldridge <[email protected]>
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2 files changed

+35
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lib/Dialect/FIRRTL/Transforms/LowerDomains.cpp

Lines changed: 20 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -493,8 +493,16 @@ LogicalResult LowerCircuit::lowerDomain(DomainOp op) {
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ImplicitLocOpBuilder builder(op.getLoc(), op);
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auto *context = op.getContext();
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auto name = op.getNameAttr();
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// TODO: Update this once DomainOps have properties.
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auto classIn = ClassOp::create(builder, name, {});
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SmallVector<PortInfo> classInPorts;
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for (auto field : op.getFields().getAsRange<DomainFieldAttr>())
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classInPorts.append(
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{{/*name=*/builder.getStringAttr(Twine(field.getName().getValue()) +
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"_in"),
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/*type=*/field.getType().getValue(), /*dir=*/Direction::In},
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{/*name=*/builder.getStringAttr(Twine(field.getName().getValue()) +
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"_out"),
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/*type=*/field.getType().getValue(), /*dir=*/Direction::Out}});
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auto classIn = ClassOp::create(builder, name, classInPorts);
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auto classInType = classIn.getInstanceType();
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auto pathListType =
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ListType::get(context, cast<PropertyType>(PathType::get(context)));
@@ -512,11 +520,16 @@ LogicalResult LowerCircuit::lowerDomain(DomainOp op) {
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{/*name=*/constants.getAssociationsOut(),
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/*type=*/pathListType,
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/*dir=*/Direction::Out}});
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builder.setInsertionPointToStart(classOut.getBodyBlock());
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PropAssignOp::create(builder, classOut.getArgument(1),
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classOut.getArgument(0));
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PropAssignOp::create(builder, classOut.getArgument(3),
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classOut.getArgument(2));
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auto connectPairWise = [&builder](ClassOp &classOp) {
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builder.setInsertionPointToStart(classOp.getBodyBlock());
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for (size_t i = 0, e = classOp.getNumPorts(); i != e; i += 2)
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PropAssignOp::create(builder, classOp.getArgument(i + 1),
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classOp.getArgument(i));
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};
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connectPairWise(classIn);
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connectPairWise(classOut);
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classes.insert({name, {classIn, classOut}});
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instanceGraph.addModule(classIn);
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instanceGraph.addModule(classOut);

test/Dialect/FIRRTL/lower-domains.mlir

Lines changed: 15 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -214,3 +214,18 @@ firrtl.circuit "Foo" {
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firrtl.module @Foo(
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) {}
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}
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// -----
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// Check that input/output properties and domain bodies are copied over.
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firrtl.circuit "Foo" {
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// CHECK-LABEL: firrtl.class @ClockDomain(
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// CHECK-SAME: in %name_in: !firrtl.string,
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// CHECK-SAME: out %name_out: !firrtl.string
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// CHECK-SAME: )
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// CHECK-NEXT: firrtl.propassign %name_out, %name_in : !firrtl.string
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firrtl.domain @ClockDomain [
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#firrtl.domain.field<"name", !firrtl.string>
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]
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firrtl.module @Foo() {}
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}

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