Skip to content

Commit 23b5d05

Browse files
authored
[CIR][CIRGen][Builtin][Neon] Lower neon_vsrad_n_s64 (#1355)
Lower `neon_vsrad_n_s64`
1 parent a0fe0fb commit 23b5d05

File tree

2 files changed

+32
-8
lines changed

2 files changed

+32
-8
lines changed

clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp

Lines changed: 6 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -3860,7 +3860,12 @@ CIRGenFunction::emitAArch64BuiltinExpr(unsigned BuiltinID, const CallExpr *E,
38603860
llvm_unreachable("NEON::BI__builtin_neon_vshrd_n_u64 NYI");
38613861
}
38623862
case NEON::BI__builtin_neon_vsrad_n_s64: {
3863-
llvm_unreachable("NEON::BI__builtin_neon_vsrad_n_s64 NYI");
3863+
std::optional<llvm::APSInt> amt =
3864+
E->getArg(2)->getIntegerConstantExpr(getContext());
3865+
uint64_t shiftAmt =
3866+
std::min(static_cast<uint64_t>(63), amt->getZExtValue());
3867+
return builder.createAdd(Ops[0],
3868+
builder.createShift(Ops[1], shiftAmt, false));
38643869
}
38653870
case NEON::BI__builtin_neon_vsrad_n_u64: {
38663871
llvm_unreachable("NEON::BI__builtin_neon_vsrad_n_u64 NYI");

clang/test/CIR/CodeGen/AArch64/neon.c

Lines changed: 26 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -15219,13 +15219,32 @@ int64_t test_vshrd_n_s64(int64_t a) {
1521915219
// return vrshr_n_u64(a, 1);
1522015220
// }
1522115221

15222-
// NYI-LABEL: @test_vsrad_n_s64(
15223-
// NYI: [[SHRD_N:%.*]] = ashr i64 %b, 63
15224-
// NYI: [[TMP0:%.*]] = add i64 %a, [[SHRD_N]]
15225-
// NYI: ret i64 [[TMP0]]
15226-
// int64_t test_vsrad_n_s64(int64_t a, int64_t b) {
15227-
// return (int64_t)vsrad_n_s64(a, b, 63);
15228-
// }
15222+
15223+
int64_t test_vsrad_n_s64(int64_t a, int64_t b) {
15224+
return (int64_t)vsrad_n_s64(a, b, 63);
15225+
15226+
// CIR-LABEL: vsrad_n_s64
15227+
// CIR: [[ASHR:%.*]] = cir.shift(right, {{%.*}} : !s64i, {{%.*}} : !s64i) -> !s64i
15228+
// CIR: {{.*}} = cir.binop(add, {{.*}}, [[ASHR]]) : !s64i
15229+
15230+
// LLVM-LABEL: test_vsrad_n_s64(
15231+
// LLVM: [[SHRD_N:%.*]] = ashr i64 %1, 63
15232+
// LLVM: [[TMP0:%.*]] = add i64 %0, [[SHRD_N]]
15233+
// LLVM: ret i64 [[TMP0]]
15234+
}
15235+
15236+
int64_t test_vsrad_n_s64_2(int64_t a, int64_t b) {
15237+
return (int64_t)vsrad_n_s64(a, b, 64);
15238+
15239+
// CIR-LABEL: vsrad_n_s64
15240+
// CIR: [[ASHR:%.*]] = cir.shift(right, {{%.*}} : !s64i, {{%.*}} : !s64i) -> !s64i
15241+
// CIR: {{.*}} = cir.binop(add, {{.*}}, [[ASHR]]) : !s64i
15242+
15243+
// LLVM-LABEL: test_vsrad_n_s64_2(
15244+
// LLVM: [[SHRD_N:%.*]] = ashr i64 %1, 63
15245+
// LLVM: [[TMP0:%.*]] = add i64 %0, [[SHRD_N]]
15246+
// LLVM: ret i64 [[TMP0]]
15247+
}
1522915248

1523015249
int64x1_t test_vsra_n_s64(int64x1_t a, int64x1_t b) {
1523115250
return vsra_n_s64(a, b, 1);

0 commit comments

Comments
 (0)