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[CIR] Added support for CK_BaseToDerived in emitCastLValue (#1864)
Fixes #1808
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‎clang/lib/CIR/CodeGen/CIRGenExpr.cpp‎

Lines changed: 19 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -2016,7 +2016,25 @@ LValue CIRGenFunction::emitCastLValue(const CastExpr *E) {
20162016
case CK_ToUnion:
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assert(0 && "NYI");
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case CK_BaseToDerived: {
2019-
assert(0 && "NYI");
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const auto *derivedClassTy = E->getType()->castAs<RecordType>();
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auto *derivedClassDecl = cast<CXXRecordDecl>(derivedClassTy->getDecl());
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LValue lv = emitLValue(E->getSubExpr());
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// Perform the base-to-derived conversion
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Address derived = getAddressOfDerivedClass(
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lv.getAddress(), derivedClassDecl, E->path_begin(), E->path_end(),
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/*NullCheckValue=*/false);
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// C++11 [expr.static.cast]p2: Behavior is undefined if a downcast is
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// performed and the object is not of the derived type.
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if (sanitizePerformTypeCheck())
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llvm_unreachable("TCK_DowncastReference NYI");
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if (SanOpts.has(SanitizerKind::CFIDerivedCast))
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llvm_unreachable("CFITypeCheckKind NYI");
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return makeAddrLValue(derived, E->getType(), lv.getBaseInfo(),
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CGM.getTBAAInfoForSubobject(lv, E->getType()));
20202038
}
20212039
case CK_LValueBitCast: {
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// This must be a reinterpret_cast (or c-style equivalent).

‎clang/test/CIR/CodeGen/class_cast.cpp‎

Lines changed: 89 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,89 @@
1+
// RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu -fclangir -emit-cir %s -o - 2>&1 | FileCheck %s --check-prefix=CIR
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// RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu -fclangir -emit-llvm %s -o - 2>&1 | FileCheck %s --check-prefix=LLVM
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// RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu -emit-llvm %s -o - 2>&1 | FileCheck %s --check-prefix=OGCG
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class Base {
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// CIR-LABEL: _ZN4BaseaSERS_
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// CIR-SAME: ([[ARG0:%.*]]: !cir.ptr{{.*}}, [[ARG1:%.*]]: !cir.ptr{{.*}})
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// CIR: [[ALLOCA_0:%.*]] = cir.alloca
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// CIR: [[ALLOCA_1:%.*]] = cir.alloca
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// CIR: [[ALLOCA_2:%.*]] = cir.alloca
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// CIR: cir.store [[ARG0]], [[ALLOCA_0]]
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// CIR: cir.store [[ARG1]], [[ALLOCA_1]]
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// CIR: [[LD_0:%.*]] = cir.load deref [[ALLOCA_0]]
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// CIR: cir.store align(8) [[LD_0]], [[ALLOCA_2]]
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// CIR: [[LD_1:%.*]] = cir.load [[ALLOCA_2]]
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// CIR: cir.return [[LD_1]]
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// LLVM-LABEL: _ZN4BaseaSERS_
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// LLVM-SAME: (ptr [[ARG0:%.*]], ptr [[ARG1:%.*]])
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// LLVM: [[TMP3:%.*]] = alloca ptr, i64 1, align 8
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// LLVM-NEXT: [[TMP4:%.*]] = alloca ptr, i64 1, align 8
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// LLVM-NEXT: [[TMP5:%.*]] = alloca ptr, i64 1, align 8
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// LLVM-NEXT: store ptr [[ARG0]], ptr [[TMP3]], align 8
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// LLVM-NEXT: store ptr [[ARG1]], ptr [[TMP4]], align 8
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// LLVM-NEXT: [[TMP6:%.*]] = load ptr, ptr [[TMP3]], align 8
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// LLVM-NEXT: store ptr [[TMP6]], ptr [[TMP5]], align 8
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// LLVM-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP5]], align 8
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// LLVM-NEXT: ret ptr [[TMP7]]
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public:
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Base &operator=(Base &b) {
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return *this;
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}
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};
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class Derived : Base {
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Derived &operator=(Derived &);
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};
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Derived &Derived::operator=(Derived &B) {
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// CIR-LABEL: _ZN7DerivedaSERS_
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// CIR-SAME: [[ARG0:%.*]]: !cir.ptr{{.*}}, [[ARG1:%.*]]: !cir.ptr{{.*}}
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// CIR: cir.store [[ARG0]], [[ALLOCA_0:%.*]] :
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// CIR: cir.store [[ARG1]], [[ALLOCA_1:%.*]] :
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// CIR: [[LD_0:%.*]] = cir.load [[ALLOCA_0]]
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// CIR: [[BASE_ADDR_0:%.*]] = cir.base_class_addr [[LD_0]]
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// CIR: [[LD_1:%.*]] = cir.load [[ALLOCA_1]]
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// CIR: [[BASE_ADDR_1:%.*]] = cir.base_class_addr [[LD_1]]
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// CIR: [[CALL:%.*]] = cir.call @_ZN4BaseaSERS_
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// CIR: [[DERIVED_ADDR:%.*]] = cir.derived_class_addr [[CALL]]
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// CIR: cir.store align(8) [[DERIVED_ADDR]], [[ALLOCA_2:%.*]] :
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// CIR: [[LD_2:%.*]] = cir.load [[ALLOCA_2]]
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// CIR: cir.return [[LD_2]]
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// LLVM-LABEL: _ZN7DerivedaSERS_
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// LLVM-SAME: (ptr [[ARG0:%.*]], ptr [[ARG1:%.*]])
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// LLVM: [[TMP3:%.*]] = alloca ptr, i64 1, align 8
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// LLVM-NEXT: [[TMP4:%.*]] = alloca ptr, i64 1, align 8
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// LLVM-NEXT: [[TMP5:%.*]] = alloca ptr, i64 1, align 8
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// LLVM-NEXT: store ptr [[ARG0]], ptr [[TMP3]], align 8
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// LLVM-NEXT: store ptr [[ARG1]], ptr [[TMP4]], align 8
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// LLVM-NEXT: [[TMP6:%.*]] = load ptr, ptr [[TMP3]], align 8
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// LLVM-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP4]], align 8
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// LLVM-NEXT: [[TMP8:%.*]] = call ptr @_ZN4BaseaSERS_(ptr [[TMP6]], ptr [[TMP7]])
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// LLVM-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[TMP8]], i32 0
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// LLVM-NEXT: store ptr [[TMP9]], ptr [[TMP5]], align 8
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// LLVM-NEXT: [[TMP10:%.*]] = load ptr, ptr [[TMP5]], align 8
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// LLVM-NEXT: ret ptr [[TMP10]]
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// OGCG-LABEL: @_ZN7DerivedaSERS_
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// OGCG-SAME: (ptr{{.*}}[[ARG0:%.*]], ptr{{.*}}[[ARG1:%.*]])
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// OGCG: [[TMP3:%.*]] = alloca ptr, align 8
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// OGCG-NEXT: [[TMP4:%.*]] = alloca ptr, align 8
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// OGCG-NEXT: store ptr [[ARG0]], ptr [[TMP3]], align 8
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// OGCG-NEXT: store ptr [[ARG1]], ptr [[TMP4]], align 8
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// OGCG-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP3]], align 8
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// OGCG-NEXT: [[TMP6:%.*]] = load ptr, ptr [[TMP4]], align 8
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// OGCG-NEXT: [[TMP7:%.*]] = call{{.*}}ptr @_ZN4BaseaSERS_(ptr{{.*}}[[TMP5]], ptr{{.*}}[[TMP6]])
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// OGCG-NEXT: ret ptr [[TMP7]]
78+
return (Derived &)Base::operator=(B);
79+
}
80+
81+
// OGCG-LABEL: define{{.*}}@_ZN4BaseaSERS_
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// OGCG-SAME: (ptr{{.*}}[[BASE_ARG0:%.*]], ptr{{.*}}[[BASE_ARG1:%.*]])
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// OGCG: [[TMP3:%.*]] = alloca ptr, align 8
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// OGCG-NEXT: [[TMP4:%.*]] = alloca ptr, align 8
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// OGCG-NEXT: store ptr [[BASE_ARG0]], ptr [[TMP3]], align 8
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// OGCG-NEXT: store ptr [[BASE_ARG1]], ptr [[TMP4]], align 8
87+
// OGCG-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP3]], align 8
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// OGCG-NEXT: ret ptr [[TMP5]]
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