@@ -960,10 +960,9 @@ mlir::LogicalResult CIRToLLVMPtrStrideOpLowering::matchAndRewrite(
960960 // Rewrite the sub in front of extensions/trunc
961961 if (rewriteSub) {
962962 index = rewriter.create <mlir::LLVM::SubOp>(
963- index.getLoc (), index.getType (),
964- rewriter.create <mlir::LLVM::ConstantOp>(
965- index.getLoc (), index.getType (),
966- mlir::IntegerAttr::get (index.getType (), 0 )),
963+ index.getLoc (),
964+ rewriter.create <mlir::LLVM::ConstantOp>(index.getLoc (),
965+ index.getType (), 0 ),
967966 index);
968967 rewriter.eraseOp (sub);
969968 }
@@ -1320,8 +1319,7 @@ mlir::LogicalResult CIRToLLVMCastOpLowering::matchAndRewrite(
13201319 return mlir::success ();
13211320 }
13221321 case cir::CastKind::ptr_to_bool: {
1323- auto zero =
1324- mlir::IntegerAttr::get (mlir::IntegerType::get (getContext (), 64 ), 0 );
1322+ auto zero = rewriter.getI64IntegerAttr (0 );
13251323 auto null = rewriter.create <cir::ConstantOp>(
13261324 src.getLoc (), cir::ConstPtrAttr::get (castOp.getSrc ().getType (), zero));
13271325 rewriter.replaceOpWithNewOp <cir::CmpOp>(
@@ -2035,8 +2033,7 @@ mlir::LogicalResult CIRToLLVMVecShuffleDynamicOpLowering::matchAndRewrite(
20352033 uint64_t numElements =
20362034 mlir::cast<cir::VectorType>(op.getVec ().getType ()).getSize ();
20372035 mlir::Value maskValue = rewriter.create <mlir::LLVM::ConstantOp>(
2038- loc, llvmIndexType,
2039- mlir::IntegerAttr::get (llvmIndexType, numElements - 1 ));
2036+ loc, llvmIndexType, numElements - 1 );
20402037 mlir::Value maskVector =
20412038 rewriter.create <mlir::LLVM::UndefOp>(loc, llvmIndexVecType);
20422039 for (uint64_t i = 0 ; i < numElements; ++i) {
@@ -2607,16 +2604,14 @@ mlir::LogicalResult CIRToLLVMUnaryOpLowering::matchAndRewrite(
26072604 switch (op.getKind ()) {
26082605 case cir::UnaryOpKind::Inc: {
26092606 assert (!IsVector && " ++ not allowed on vector types" );
2610- auto One = rewriter.create <mlir::LLVM::ConstantOp>(
2611- loc, llvmType, mlir::IntegerAttr::get (llvmType, 1 ));
2607+ auto One = rewriter.create <mlir::LLVM::ConstantOp>(loc, llvmType, 1 );
26122608 rewriter.replaceOpWithNewOp <mlir::LLVM::AddOp>(
26132609 op, llvmType, adaptor.getInput (), One, overflowFlags);
26142610 return mlir::success ();
26152611 }
26162612 case cir::UnaryOpKind::Dec: {
26172613 assert (!IsVector && " -- not allowed on vector types" );
2618- auto One = rewriter.create <mlir::LLVM::ConstantOp>(
2619- loc, llvmType, mlir::IntegerAttr::get (llvmType, 1 ));
2614+ auto One = rewriter.create <mlir::LLVM::ConstantOp>(loc, llvmType, 1 );
26202615 rewriter.replaceOpWithNewOp <mlir::LLVM::SubOp>(
26212616 op, llvmType, adaptor.getInput (), One, overflowFlags);
26222617 return mlir::success ();
@@ -2630,10 +2625,9 @@ mlir::LogicalResult CIRToLLVMUnaryOpLowering::matchAndRewrite(
26302625 if (IsVector)
26312626 Zero = rewriter.create <mlir::LLVM::ZeroOp>(loc, llvmType);
26322627 else
2633- Zero = rewriter.create <mlir::LLVM::ConstantOp>(
2634- loc, llvmType, mlir::IntegerAttr::get (llvmType, 0 ));
2628+ Zero = rewriter.create <mlir::LLVM::ConstantOp>(loc, llvmType, 0 );
26352629 rewriter.replaceOpWithNewOp <mlir::LLVM::SubOp>(
2636- op, llvmType, Zero, adaptor.getInput (), overflowFlags);
2630+ op, Zero, adaptor.getInput (), overflowFlags);
26372631 return mlir::success ();
26382632 }
26392633 case cir::UnaryOpKind::Not: {
@@ -2644,8 +2638,8 @@ mlir::LogicalResult CIRToLLVMUnaryOpLowering::matchAndRewrite(
26442638 // done. It requires a series of insertelement ops.
26452639 mlir::Type llvmElementType =
26462640 getTypeConverter ()->convertType (elementType);
2647- auto MinusOneInt = rewriter. create <mlir::LLVM::ConstantOp>(
2648- loc, llvmElementType, mlir::IntegerAttr::get ( llvmElementType, -1 ) );
2641+ auto MinusOneInt =
2642+ rewriter. create < mlir::LLVM::ConstantOp>(loc, llvmElementType, -1 );
26492643 minusOne = rewriter.create <mlir::LLVM::UndefOp>(loc, llvmType);
26502644 auto NumElements = mlir::dyn_cast<cir::VectorType>(type).getSize ();
26512645 for (uint64_t i = 0 ; i < NumElements; ++i) {
@@ -2655,11 +2649,10 @@ mlir::LogicalResult CIRToLLVMUnaryOpLowering::matchAndRewrite(
26552649 loc, minusOne, MinusOneInt, indexValue);
26562650 }
26572651 } else {
2658- minusOne = rewriter.create <mlir::LLVM::ConstantOp>(
2659- loc, llvmType, mlir::IntegerAttr::get (llvmType, -1 ));
2652+ minusOne = rewriter.create <mlir::LLVM::ConstantOp>(loc, llvmType, -1 );
26602653 }
2661- rewriter.replaceOpWithNewOp <mlir::LLVM::XOrOp>(
2662- op, llvmType, adaptor. getInput (), minusOne);
2654+ rewriter.replaceOpWithNewOp <mlir::LLVM::XOrOp>(op, adaptor. getInput (),
2655+ minusOne);
26632656 return mlir::success ();
26642657 }
26652658 }
@@ -2707,9 +2700,8 @@ mlir::LogicalResult CIRToLLVMUnaryOpLowering::matchAndRewrite(
27072700 case cir::UnaryOpKind::Not:
27082701 assert (!IsVector && " NYI: op! on vector mask" );
27092702 rewriter.replaceOpWithNewOp <mlir::LLVM::XOrOp>(
2710- op, llvmType, adaptor.getInput (),
2711- rewriter.create <mlir::LLVM::ConstantOp>(
2712- loc, llvmType, mlir::IntegerAttr::get (llvmType, 1 )));
2703+ op, adaptor.getInput (),
2704+ rewriter.create <mlir::LLVM::ConstantOp>(loc, llvmType, 1 ));
27132705 return mlir::success ();
27142706 default :
27152707 return op.emitError ()
@@ -3671,14 +3663,14 @@ mlir::LogicalResult CIRToLLVMPtrDiffOpLowering::matchAndRewrite(
36713663 auto resultVal = diff.getResult ();
36723664 if (typeSize != 1 ) {
36733665 auto typeSizeVal = rewriter.create <mlir::LLVM::ConstantOp>(
3674- op.getLoc (), llvmDstTy, mlir::IntegerAttr::get (llvmDstTy, typeSize) );
3666+ op.getLoc (), llvmDstTy, typeSize);
36753667
36763668 if (dstTy.isUnsigned ())
3677- resultVal = rewriter. create <mlir::LLVM::UDivOp>(op. getLoc (), llvmDstTy,
3678- diff, typeSizeVal);
3669+ resultVal =
3670+ rewriter. create <mlir::LLVM::UDivOp>(op. getLoc (), diff, typeSizeVal);
36793671 else
3680- resultVal = rewriter. create <mlir::LLVM::SDivOp>(op. getLoc (), llvmDstTy,
3681- diff, typeSizeVal);
3672+ resultVal =
3673+ rewriter. create <mlir::LLVM::SDivOp>(op. getLoc (), diff, typeSizeVal);
36823674 }
36833675 rewriter.replaceOp (op, resultVal);
36843676 return mlir::success ();
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