@@ -491,6 +491,18 @@ class CIRSinOpLowering : public mlir::OpConversionPattern<cir::SinOp> {
491491 }
492492};
493493
494+ class CIRASinOpLowering : public mlir ::OpConversionPattern<cir::ASinOp> {
495+ public:
496+ using mlir::OpConversionPattern<cir::ASinOp>::OpConversionPattern;
497+
498+ mlir::LogicalResult
499+ matchAndRewrite (cir::ASinOp op, OpAdaptor adaptor,
500+ mlir::ConversionPatternRewriter &rewriter) const override {
501+ rewriter.replaceOpWithNewOp <mlir::math::AsinOp>(op, adaptor.getSrc ());
502+ return mlir::LogicalResult::success ();
503+ }
504+ };
505+
494506template <typename CIROp, typename MLIROp>
495507class CIRCountZerosBitOpLowering : public mlir ::OpConversionPattern<CIROp> {
496508public:
@@ -1395,8 +1407,8 @@ void populateCIRToMLIRConversionPatterns(mlir::RewritePatternSet &patterns,
13951407 CIRBitClzOpLowering, CIRBitCtzOpLowering, CIRBitPopcountOpLowering,
13961408 CIRBitClrsbOpLowering, CIRBitFfsOpLowering, CIRBitParityOpLowering,
13971409 CIRIfOpLowering, CIRVectorCreateLowering, CIRVectorInsertLowering,
1398- CIRVectorExtractLowering, CIRVectorCmpOpLowering, CIRACosOpLowering>(
1399- converter, patterns.getContext ());
1410+ CIRVectorExtractLowering, CIRVectorCmpOpLowering, CIRACosOpLowering,
1411+ CIRASinOpLowering>( converter, patterns.getContext ());
14001412}
14011413
14021414static mlir::TypeConverter prepareTypeConverter () {
0 commit comments