Skip to content

Commit e97724e

Browse files
committed
[CIR][NFC] Move helper around for upcoming usage
1 parent 7c21024 commit e97724e

File tree

1 file changed

+62
-62
lines changed

1 file changed

+62
-62
lines changed

clang/lib/CIR/CodeGen/CIRGenExprConst.cpp

Lines changed: 62 additions & 62 deletions
Original file line numberDiff line numberDiff line change
@@ -1670,6 +1670,68 @@ ConstantEmitter::tryEmitAbstractForInitializer(const VarDecl &D) {
16701670
return validateAndPopAbstract(C, state);
16711671
}
16721672

1673+
static mlir::TypedAttr emitNullConstant(CIRGenModule &CGM, const RecordDecl *rd,
1674+
bool asCompleteObject) {
1675+
const CIRGenRecordLayout &layout = CGM.getTypes().getCIRGenRecordLayout(rd);
1676+
mlir::Type ty = (asCompleteObject ? layout.getCIRType()
1677+
: layout.getBaseSubobjectCIRType());
1678+
auto record = dyn_cast<cir::RecordType>(ty);
1679+
assert(record && "expected");
1680+
1681+
unsigned numElements = record.getNumElements();
1682+
SmallVector<mlir::Attribute, 4> elements(numElements);
1683+
1684+
auto CXXR = dyn_cast<CXXRecordDecl>(rd);
1685+
// Fill in all the bases.
1686+
if (CXXR) {
1687+
for (const auto &I : CXXR->bases()) {
1688+
if (I.isVirtual()) {
1689+
// Ignore virtual bases; if we're laying out for a complete
1690+
// object, we'll lay these out later.
1691+
continue;
1692+
}
1693+
llvm_unreachable("NYI");
1694+
}
1695+
}
1696+
1697+
// Fill in all the fields.
1698+
for (const auto *Field : rd->fields()) {
1699+
// Fill in non-bitfields. (Bitfields always use a zero pattern, which we
1700+
// will fill in later.)
1701+
if (!Field->isBitField()) {
1702+
// TODO(cir) check for !isEmptyFieldForLayout(CGM.getContext(), Field))
1703+
llvm_unreachable("NYI");
1704+
}
1705+
1706+
// For unions, stop after the first named field.
1707+
if (rd->isUnion()) {
1708+
if (Field->getIdentifier())
1709+
break;
1710+
if (const auto *FieldRD = Field->getType()->getAsRecordDecl())
1711+
if (FieldRD->findFirstNamedDataMember())
1712+
break;
1713+
}
1714+
}
1715+
1716+
// Fill in the virtual bases, if we're working with the complete object.
1717+
if (CXXR && asCompleteObject) {
1718+
for ([[maybe_unused]] const auto &I : CXXR->vbases()) {
1719+
llvm_unreachable("NYI");
1720+
}
1721+
}
1722+
1723+
// Now go through all other fields and zero them out.
1724+
for (unsigned i = 0; i != numElements; ++i) {
1725+
if (!elements[i]) {
1726+
llvm_unreachable("NYI");
1727+
}
1728+
}
1729+
1730+
mlir::MLIRContext *mlirContext = record.getContext();
1731+
return cir::ConstRecordAttr::get(record,
1732+
mlir::ArrayAttr::get(mlirContext, elements));
1733+
}
1734+
16731735
mlir::Attribute ConstantEmitter::tryEmitPrivateForVarInit(const VarDecl &D) {
16741736
// Make a quick check if variable can be default NULL initialized
16751737
// and avoid going through rest of code which may do, for c++11,
@@ -2075,68 +2137,6 @@ mlir::Attribute ConstantEmitter::emitNullForMemory(mlir::Location loc,
20752137
return emitForMemory(CGM, cstOp.getValue(), T);
20762138
}
20772139

2078-
static mlir::TypedAttr emitNullConstant(CIRGenModule &CGM, const RecordDecl *rd,
2079-
bool asCompleteObject) {
2080-
const CIRGenRecordLayout &layout = CGM.getTypes().getCIRGenRecordLayout(rd);
2081-
mlir::Type ty = (asCompleteObject ? layout.getCIRType()
2082-
: layout.getBaseSubobjectCIRType());
2083-
auto record = dyn_cast<cir::RecordType>(ty);
2084-
assert(record && "expected");
2085-
2086-
unsigned numElements = record.getNumElements();
2087-
SmallVector<mlir::Attribute, 4> elements(numElements);
2088-
2089-
auto CXXR = dyn_cast<CXXRecordDecl>(rd);
2090-
// Fill in all the bases.
2091-
if (CXXR) {
2092-
for (const auto &I : CXXR->bases()) {
2093-
if (I.isVirtual()) {
2094-
// Ignore virtual bases; if we're laying out for a complete
2095-
// object, we'll lay these out later.
2096-
continue;
2097-
}
2098-
llvm_unreachable("NYI");
2099-
}
2100-
}
2101-
2102-
// Fill in all the fields.
2103-
for (const auto *Field : rd->fields()) {
2104-
// Fill in non-bitfields. (Bitfields always use a zero pattern, which we
2105-
// will fill in later.)
2106-
if (!Field->isBitField()) {
2107-
// TODO(cir) check for !isEmptyFieldForLayout(CGM.getContext(), Field))
2108-
llvm_unreachable("NYI");
2109-
}
2110-
2111-
// For unions, stop after the first named field.
2112-
if (rd->isUnion()) {
2113-
if (Field->getIdentifier())
2114-
break;
2115-
if (const auto *FieldRD = Field->getType()->getAsRecordDecl())
2116-
if (FieldRD->findFirstNamedDataMember())
2117-
break;
2118-
}
2119-
}
2120-
2121-
// Fill in the virtual bases, if we're working with the complete object.
2122-
if (CXXR && asCompleteObject) {
2123-
for ([[maybe_unused]] const auto &I : CXXR->vbases()) {
2124-
llvm_unreachable("NYI");
2125-
}
2126-
}
2127-
2128-
// Now go through all other fields and zero them out.
2129-
for (unsigned i = 0; i != numElements; ++i) {
2130-
if (!elements[i]) {
2131-
llvm_unreachable("NYI");
2132-
}
2133-
}
2134-
2135-
mlir::MLIRContext *mlirContext = record.getContext();
2136-
return cir::ConstRecordAttr::get(record,
2137-
mlir::ArrayAttr::get(mlirContext, elements));
2138-
}
2139-
21402140
mlir::TypedAttr
21412141
CIRGenModule::emitNullConstantForBase(const CXXRecordDecl *Record) {
21422142
return ::emitNullConstant(*this, Record, false);

0 commit comments

Comments
 (0)