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premerge.yaml
58,008 workflow run results
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[BranchFolding] Fix assertion failure in HoistCommonCodeInSuccs CI Checks #59201: Pull request #141028 closed by OCHyams
2m 1s OCHyams:fix-branch-folder-crash
OCHyams:fix-branch-folder-crash
2m 1s
[BranchFolding] Fix assertion failure in HoistCommonCodeInSuccs (#141… CI Checks #59200: Commit 34a55c9 pushed by OCHyams
35m 14s main
main
35m 14s
AMDGPU/GlobalISel: add RegBankLegalize rules for bitfield extract CI Checks #59199: Pull request #132381 synchronize by petar-avramovic
35m 8s users/petar-avramovic/bfe
users/petar-avramovic/bfe
35m 8s
[clangd] Add support for textDocument/rangesFormatting CI Checks #59198: Pull request #141052 synchronize by tom-anders
29m 55s tom-anders:multirange
tom-anders:multirange
29m 55s
[lldb] Disable some unwind plans for discontinuous functions (#140927) CI Checks #59197: Commit b63c1c4 pushed by labath
7m 3s main
main
7m 3s
[lldb] Disable some unwind plans for discontinuous functions CI Checks #59196: Pull request #140927 closed by labath
1s labath:prop
labath:prop
1s
AMDGPU/GlobalISel: add RegBankLegalize rules for AND OR and XOR CI Checks #59195: Pull request #132382 synchronize by petar-avramovic
52m 34s users/petar-avramovic/andorxor
users/petar-avramovic/andorxor
52m 34s
AMDGPU/GlobalISel: add RegBankLegalize rules for AND OR and XOR CI Checks #59193: Pull request #132382 synchronize by petar-avramovic
2s users/petar-avramovic/andorxor
users/petar-avramovic/andorxor
2s
AMDGPU/GlobalISel: add RegBankLegalize rules for extends and trunc CI Checks #59194: Pull request #132383 synchronize by petar-avramovic
43m 32s users/petar-avramovic/extends
users/petar-avramovic/extends
43m 32s
AMDGPU/GlobalISel: add RegBankLegalize rules for select CI Checks #59191: Pull request #132384 synchronize by petar-avramovic
1h 30m 52s users/petar-avramovic/select
users/petar-avramovic/select
1h 30m 52s
AMDGPU/GlobalISel: add RegBankLegalize rules for select CI Checks #59188: Pull request #132384 synchronize by petar-avramovic
51m 28s users/petar-avramovic/select
users/petar-avramovic/select
51m 28s
AMDGPU/GlobalISel: add RegBankLegalize rules for bit shifts and sext-inreg CI Checks #59190: Pull request #132385 synchronize by petar-avramovic
1h 11m 25s users/petar-avramovic/shifts
users/petar-avramovic/shifts
1h 11m 25s
AMDGPU/GlobalISel: add RegBankLegalize rules for extends and trunc CI Checks #59192: Pull request #132383 synchronize by petar-avramovic
2s users/petar-avramovic/extends
users/petar-avramovic/extends
2s
AMDGPU/GlobalISel: add RegBankLegalize rules for bit shifts and sext-inreg CI Checks #59189: Pull request #132385 synchronize by petar-avramovic
36m 59s users/petar-avramovic/shifts
users/petar-avramovic/shifts
36m 59s
[BranchFolding] Fix assertion failure in HoistCommonCodeInSuccs CI Checks #59187: Pull request #141028 synchronize by OCHyams
5m 59s OCHyams:fix-branch-folder-crash
OCHyams:fix-branch-folder-crash
5m 59s
[clang][CodeGen] Fix crash on non-natural type in CheckAtomicAlignment CI Checks #59186: Pull request #141053 opened by Pierre-vh
21m 14s users/pierre-vh/fix-crash-check-atomic-align
users/pierre-vh/fix-crash-check-atomic-align
21m 14s
[clangd] Add support for textDocument/rangesFormatting CI Checks #59185: Pull request #141052 opened by tom-anders
5m 4s tom-anders:multirange
tom-anders:multirange
5m 4s
[AArch64] Avoid vector Ext in case by-element operation variant apply for all elements CI Checks #59184: Pull request #140733 synchronize by ayasin-a
1h 9m 1s ayasin-a:vector-indexed-op
ayasin-a:vector-indexed-op
1h 9m 1s
[AMDGPU][SDAG] Legalise v2i32 or/xor/and instructions to make use of 64-bit wide instructions CI Checks #59183: Pull request #140694 synchronize by chrisjbris
31m 55s chrisjbris:124775_AMDGPU_v2i32_bitwise_ops
chrisjbris:124775_AMDGPU_v2i32_bitwise_ops
31m 55s
[X86] lowerShuffleAsSplitOrBlend - use isElementEquivalent to help identify hidden splat/broadcasts CI Checks #59182: Pull request #141035 closed by RKSimon
1s RKSimon:x86-broadcast-equivalent
RKSimon:x86-broadcast-equivalent
1s
[X86] lowerShuffleAsSplitOrBlend - use isElementEquivalent to help id… CI Checks #59181: Commit b9a7098 pushed by RKSimon
50m 13s main
main
50m 13s
[AArch64][SME] Simplify initialization of the TPIDR2 block CI Checks #59180: Pull request #141049 opened by MacDue
48m 29s MacDue:stp_tpidr2_init
MacDue:stp_tpidr2_init
48m 29s
AMDGPU: Form v_med_f32 from minimumnum/maximumnum immediate pattern CI Checks #59179: Pull request #141048 opened by arsenm
45m 45s users/arsenm/amdgpu/form-fmed3-from-immediate-pattern-minimumnum-maximumnum
users/arsenm/amdgpu/form-fmed3-from-immediate-pattern-minimumnum-maximumnum
45m 45s
AMDGPU: Add baseline v_med3_f32 tests from minimumnum/maximumnum CI Checks #59178: Pull request #141047 opened by arsenm
46m 19s users/arsenm/amdgpu/baseline-tests-med3-minimumnum-maximumnum
users/arsenm/amdgpu/baseline-tests-med3-minimumnum-maximumnum
46m 19s
[flang-rt] Optimise ShallowCopy and use it in CopyInAssign CI Checks #59177: Pull request #140569 synchronize by mrkajetanp
18m 59s mrkajetanp:copy-in-flang-rt
mrkajetanp:copy-in-flang-rt
18m 59s
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