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premerge.yaml
112,609 workflow run results
112,609 workflow run results

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[ARM] Replace ABS and tABS machine nodes with custom lowering CI Checks #116148: Pull request #156717 synchronize by AZero13
31m 14s AZero13:expand-legal
AZero13:expand-legal
31m 14s
[MLIR][XeGPU] Add support for vector.multi_reduction in wg to sg pass CI Checks #116147: Pull request #156731 synchronize by nbpatel
10m 0s nbpatel:xegpu-wg-sg-reduction
nbpatel:xegpu-wg-sg-reduction
10m 0s
[flang][runtime] tweak advancing for child list directed io CI Checks #116146: Pull request #156753 opened by akuhlens
10m 59s akuhlens:andre/gh-issue-154979
akuhlens:andre/gh-issue-154979
10m 59s
[LoopUnroll] Introduce parallel reduction phis when unrolling. CI Checks #116145: Pull request #149470 synchronize by fhahn
34m 47s fhahn:unroll-reduction-phis
fhahn:unroll-reduction-phis
34m 47s
[Headers][X86] Allow AVX512F mullox intrinsics to be used in constexpr CI Checks #116144: Pull request #156722 synchronize by markbhasawut
29m 41s markbhasawut:x86-avx512f-mullox-constexpr-intrinsics
markbhasawut:x86-avx512f-mullox-constexpr-intrinsics
29m 41s
[Headers][X86] Allow AVX512F mullox intrinsics to be used in constexpr CI Checks #116143: Pull request #156722 synchronize by markbhasawut
1m 15s markbhasawut:x86-avx512f-mullox-constexpr-intrinsics
markbhasawut:x86-avx512f-mullox-constexpr-intrinsics
1m 15s
[Headers][X86] Allow AVX512F mullox intrinsics to be used in constexpr CI Checks #116142: Pull request #156722 synchronize by markbhasawut
6m 32s markbhasawut:x86-avx512f-mullox-constexpr-intrinsics
markbhasawut:x86-avx512f-mullox-constexpr-intrinsics
6m 32s
[MLIR] Apply clang-tidy fixes for readability-container-size-empty in XeGPUOps.cpp (NFC) CI Checks #116141: Pull request #156752 closed by joker-eph
1s joker-eph:tidy
joker-eph:tidy
1s
[MLIR] Apply clang-tidy fixes for readability-container-size-empty in XeGPUOps.cpp (NFC) CI Checks #116140: Pull request #156752 opened by joker-eph
4s joker-eph:tidy
joker-eph:tidy
4s
[lldb] Add utility to create Mach-O corefile from YAML desc CI Checks #116139: Pull request #153911 synchronize by jasonmolenda
11m 28s jasonmolenda:add-yaml2macho-core-test-utility
jasonmolenda:add-yaml2macho-core-test-utility
11m 28s
[LLVM][MC][DecoderEmitter] Fail fatally if Insn and decoder table bitwidths mismatch CI Checks #116138: Pull request #156734 synchronize by jurahul
37m 17s jurahul:decoder_emitter_encode_bitwidth_in_table
jurahul:decoder_emitter_encode_bitwidth_in_table
37m 17s
[OpenACC] Fix crash because of miscalculated dependence. CI Checks #116137: Pull request #156745 closed by erichkeane
1s erichkeane:FixupDependence
erichkeane:FixupDependence
1s
[Sparc] Remove extra ASRRegs operand in SMAC/UMAC instructions CI Checks #116136: Pull request #156751 opened by s-barannikov
32m 44s s-barannikov:sparc-redundant-asr18
s-barannikov:sparc-redundant-asr18
32m 44s
Add AArch64 support to the premerge tests CI Checks #116135: Pull request #155274 synchronize by tstellar
1h 2m 37s tstellar:aarch64-ci
tstellar:aarch64-ci
1h 2m 37s
[RISCV] Remove post-decoding instruction adjustments CI Checks #116133: Pull request #156360 synchronize by s-barannikov
1s users/s.barannikov/decoder-operands-2-riscv
users/s.barannikov/decoder-operands-2-riscv
1s
[RISCV] Remove post-decoding instruction adjustments CI Checks #116134: Pull request #156360 synchronize by s-barannikov
52m 11s users/s.barannikov/decoder-operands-2-riscv
users/s.barannikov/decoder-operands-2-riscv
52m 11s
[ARM] Remove most post-decoding instruction adjustments CI Checks #116130: Pull request #156540 synchronize by s-barannikov
36m 30s users/s.barannikov/decoder-operands-7-arm
users/s.barannikov/decoder-operands-7-arm
36m 30s
[AArch64] Remove post-decoding instruction mutations CI Checks #116129: Pull request #156364 synchronize by s-barannikov
37m 0s users/s.barannikov/decoder-operands-6-aarch64-rest
users/s.barannikov/decoder-operands-6-aarch64-rest
37m 0s
[AVR] Remove workarounds for instructions using Z register (NFCI) CI Checks #116124: Pull request #156361 synchronize by s-barannikov
42m 20s users/s.barannikov/decoder-operands-3-avr
users/s.barannikov/decoder-operands-3-avr
42m 20s
[AArch64] Provide a custom decoder for LDR_ZA/STR_ZA CI Checks #116132: Pull request #156363 synchronize by s-barannikov
44m 24s users/s.barannikov/decoder-operands-5-aarch64-spill-fill
users/s.barannikov/decoder-operands-5-aarch64-spill-fill
44m 24s
[AArch64] Provide a custom decoder for LDR_ZA/STR_ZA CI Checks #116131: Pull request #156363 synchronize by s-barannikov
1s users/s.barannikov/decoder-operands-5-aarch64-spill-fill
users/s.barannikov/decoder-operands-5-aarch64-spill-fill
1s
[ARM] Remove most post-decoding instruction adjustments CI Checks #116127: Pull request #156540 synchronize by s-barannikov
1s users/s.barannikov/decoder-operands-7-arm
users/s.barannikov/decoder-operands-7-arm
1s
[AArch64] Correctly disassemble TSB instruction CI Checks #116122: Pull request #156362 synchronize by s-barannikov
1s users/s.barannikov/decoder-operands-4-aarch64-tsb
users/s.barannikov/decoder-operands-4-aarch64-tsb
1s
[AVR] Remove workarounds for instructions using Z register (NFCI) CI Checks #116121: Pull request #156361 synchronize by s-barannikov
1s users/s.barannikov/decoder-operands-3-avr
users/s.barannikov/decoder-operands-3-avr
1s
[AArch64] Remove post-decoding instruction mutations CI Checks #116126: Pull request #156364 synchronize by s-barannikov
1s users/s.barannikov/decoder-operands-6-aarch64-rest
users/s.barannikov/decoder-operands-6-aarch64-rest
1s