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AMDGPU: Fix illegal commute with frame index
In ca40989, frame indexes started being treated more like registers, rather than immediates. Update the commute logic to avoid failing the verifier by moving illegal SGPR operands in place of a frame index.
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3 files changed

+116
-11
lines changed

3 files changed

+116
-11
lines changed

‎llvm/lib/Target/AMDGPU/SIInstrInfo.cpp‎

Lines changed: 2 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -2773,9 +2773,8 @@ MachineInstr *SIInstrInfo::commuteInstructionImpl(MachineInstr &MI, bool NewMI,
27732773
}
27742774

27752775
} else if (Src0.isReg() && !Src1.isReg()) {
2776-
// src0 should always be able to support any operand type, so no need to
2777-
// check operand legality.
2778-
CommutedMI = swapRegAndNonRegOperand(MI, Src0, Src1);
2776+
if (isOperandLegal(MI, Src1Idx, &Src0))
2777+
CommutedMI = swapRegAndNonRegOperand(MI, Src0, Src1);
27792778
} else if (!Src0.isReg() && Src1.isReg()) {
27802779
if (isOperandLegal(MI, Src1Idx, &Src0))
27812780
CommutedMI = swapRegAndNonRegOperand(MI, Src1, Src0);

‎llvm/test/CodeGen/AMDGPU/commute-frame-index-operand.mir‎

Lines changed: 106 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,106 @@
1+
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 5
2+
# RUN: llc -mtriple=amdgcn -mcpu=gfx900 -run-pass=machine-cse -verify-machineinstrs %s -o - | FileCheck --check-prefix=GCN %s
3+
4+
# Check that invalid MIR is not produced with a frame index in a
5+
# commutable operand.
6+
7+
---
8+
name: commute_frame_index__v_add_co_u32_e32__sgpr_fi
9+
tracksRegLiveness: true
10+
stack:
11+
- { id: 0, size: 8, alignment: 4, local-offset: 0 }
12+
body: |
13+
bb.0:
14+
liveins: $sgpr4
15+
16+
; GCN-LABEL: name: commute_frame_index__v_add_co_u32_e32__sgpr_fi
17+
; GCN: liveins: $sgpr4
18+
; GCN-NEXT: {{ $}}
19+
; GCN-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr4
20+
; GCN-NEXT: [[V_ADD_CO_U32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_CO_U32_e32 killed [[COPY]], %stack.0, implicit-def dead $vcc, implicit $exec
21+
; GCN-NEXT: S_ENDPGM 0, implicit [[V_ADD_CO_U32_e32_]]
22+
%0:sreg_32 = COPY $sgpr4
23+
%1:vgpr_32 = V_ADD_CO_U32_e32 killed %0, %stack.0, implicit-def dead $vcc, implicit $exec
24+
S_ENDPGM 0, implicit %1
25+
26+
...
27+
28+
---
29+
name: commute_frame_index__v_add_co_u32_e64__fi_sgpr
30+
tracksRegLiveness: true
31+
stack:
32+
- { id: 0, size: 8, alignment: 4, local-offset: 0 }
33+
body: |
34+
bb.0:
35+
liveins: $sgpr4
36+
37+
; GCN-LABEL: name: commute_frame_index__v_add_co_u32_e64__fi_sgpr
38+
; GCN: liveins: $sgpr4
39+
; GCN-NEXT: {{ $}}
40+
; GCN-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr4
41+
; GCN-NEXT: [[V_ADD_CO_U32_e64_:%[0-9]+]]:vgpr_32, [[V_ADD_CO_U32_e64_1:%[0-9]+]]:sreg_64 = V_ADD_CO_U32_e64 %stack.0, killed [[COPY]], 0, implicit $exec
42+
; GCN-NEXT: S_ENDPGM 0, implicit [[V_ADD_CO_U32_e64_]]
43+
%0:sreg_32 = COPY $sgpr4
44+
%1:vgpr_32, %2:sreg_64 = V_ADD_CO_U32_e64 %stack.0, killed %0, 0, implicit $exec
45+
S_ENDPGM 0, implicit %1
46+
47+
...
48+
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---
50+
name: commute_frame_index__v_add_co_u32__vgpr_fi
51+
tracksRegLiveness: true
52+
stack:
53+
- { id: 0, size: 8, alignment: 4, local-offset: 0 }
54+
body: |
55+
bb.0:
56+
liveins: $vgpr0
57+
58+
; GCN-LABEL: name: commute_frame_index__v_add_co_u32__vgpr_fi
59+
; GCN: liveins: $vgpr0
60+
; GCN-NEXT: {{ $}}
61+
; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
62+
; GCN-NEXT: [[V_ADD_CO_U32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_CO_U32_e32 %stack.0, killed [[COPY]], implicit-def dead $vcc, implicit $exec
63+
; GCN-NEXT: S_ENDPGM 0, implicit [[V_ADD_CO_U32_e32_]]
64+
%0:vgpr_32 = COPY $vgpr0
65+
%1:vgpr_32 = V_ADD_CO_U32_e32 killed %0, %stack.0, implicit-def dead $vcc, implicit $exec
66+
S_ENDPGM 0, implicit %1
67+
68+
...
69+
70+
---
71+
name: commute_frame_index__v_add_co_u32__fi_vgpr
72+
tracksRegLiveness: true
73+
stack:
74+
- { id: 0, size: 8, alignment: 4, local-offset: 0 }
75+
body: |
76+
bb.0.entry:
77+
liveins: $vgpr0
78+
79+
; GCN-LABEL: name: commute_frame_index__v_add_co_u32__fi_vgpr
80+
; GCN: liveins: $vgpr0
81+
; GCN-NEXT: {{ $}}
82+
; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
83+
; GCN-NEXT: [[V_ADD_CO_U32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_CO_U32_e32 %stack.0, killed [[COPY]], implicit-def dead $vcc, implicit $exec
84+
; GCN-NEXT: S_ENDPGM 0, implicit [[V_ADD_CO_U32_e32_]]
85+
%0:vgpr_32 = COPY $vgpr0
86+
%1:vgpr_32 = V_ADD_CO_U32_e32 %stack.0, killed %0, implicit-def dead $vcc, implicit $exec
87+
S_ENDPGM 0, implicit %1
88+
89+
...
90+
91+
---
92+
name: commute_frame_index__v_add_co_u32_e32__fi_fi
93+
tracksRegLiveness: true
94+
stack:
95+
- { id: 0, size: 8, alignment: 4, local-offset: 0 }
96+
- { id: 1, size: 8, alignment: 4, local-offset: 0 }
97+
body: |
98+
bb.0:
99+
100+
; GCN-LABEL: name: commute_frame_index__v_add_co_u32_e32__fi_fi
101+
; GCN: [[V_ADD_CO_U32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_CO_U32_e32 %stack.0, %stack.1, implicit-def dead $vcc, implicit $exec
102+
; GCN-NEXT: S_ENDPGM 0, implicit [[V_ADD_CO_U32_e32_]]
103+
%0:vgpr_32 = V_ADD_CO_U32_e32 %stack.0, %stack.1, implicit-def dead $vcc, implicit $exec
104+
S_ENDPGM 0, implicit %0
105+
106+
...

‎llvm/test/CodeGen/AMDGPU/eliminate-frame-index-v-add-u32.mir‎

Lines changed: 8 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -1170,31 +1170,31 @@ body: |
11701170
; MUBUF-NEXT: {{ $}}
11711171
; MUBUF-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3
11721172
; MUBUF-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3
1173-
; MUBUF-NEXT: $vgpr1 = V_MOV_B32_e32 $sgpr8, implicit $exec
1174-
; MUBUF-NEXT: renamable $vgpr0 = V_ADD_U32_e32 72, killed $vgpr1, implicit $exec
1173+
; MUBUF-NEXT: $vgpr1 = V_MOV_B32_e32 72, implicit $exec
1174+
; MUBUF-NEXT: renamable $vgpr0 = V_ADD_U32_e32 $sgpr8, killed $vgpr1, implicit $exec
11751175
; MUBUF-NEXT: SI_RETURN implicit $vgpr0, implicit $sgpr8
11761176
;
11771177
; MUBUFW32-LABEL: name: v_add_u32_e32__kernel_fi_offset72__sgpr_live_after
11781178
; MUBUFW32: liveins: $sgpr8, $sgpr0_sgpr1_sgpr2_sgpr3
11791179
; MUBUFW32-NEXT: {{ $}}
11801180
; MUBUFW32-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3
11811181
; MUBUFW32-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3
1182-
; MUBUFW32-NEXT: $vgpr1 = V_MOV_B32_e32 $sgpr8, implicit $exec
1183-
; MUBUFW32-NEXT: renamable $vgpr0 = V_ADD_U32_e32 72, killed $vgpr1, implicit $exec
1182+
; MUBUFW32-NEXT: $vgpr1 = V_MOV_B32_e32 72, implicit $exec
1183+
; MUBUFW32-NEXT: renamable $vgpr0 = V_ADD_U32_e32 $sgpr8, killed $vgpr1, implicit $exec
11841184
; MUBUFW32-NEXT: SI_RETURN implicit $vgpr0, implicit $sgpr8
11851185
;
11861186
; FLATSCRW64-LABEL: name: v_add_u32_e32__kernel_fi_offset72__sgpr_live_after
11871187
; FLATSCRW64: liveins: $sgpr8
11881188
; FLATSCRW64-NEXT: {{ $}}
1189-
; FLATSCRW64-NEXT: $vgpr1 = V_MOV_B32_e32 $sgpr8, implicit $exec
1190-
; FLATSCRW64-NEXT: renamable $vgpr0 = V_ADD_U32_e32 72, killed $vgpr1, implicit $exec
1189+
; FLATSCRW64-NEXT: $vgpr1 = V_MOV_B32_e32 72, implicit $exec
1190+
; FLATSCRW64-NEXT: renamable $vgpr0 = V_ADD_U32_e32 $sgpr8, killed $vgpr1, implicit $exec
11911191
; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0, implicit $sgpr8
11921192
;
11931193
; FLATSCRW32-LABEL: name: v_add_u32_e32__kernel_fi_offset72__sgpr_live_after
11941194
; FLATSCRW32: liveins: $sgpr8
11951195
; FLATSCRW32-NEXT: {{ $}}
1196-
; FLATSCRW32-NEXT: $vgpr1 = V_MOV_B32_e32 $sgpr8, implicit $exec
1197-
; FLATSCRW32-NEXT: renamable $vgpr0 = V_ADD_U32_e32 72, killed $vgpr1, implicit $exec
1196+
; FLATSCRW32-NEXT: $vgpr1 = V_MOV_B32_e32 72, implicit $exec
1197+
; FLATSCRW32-NEXT: renamable $vgpr0 = V_ADD_U32_e32 $sgpr8, killed $vgpr1, implicit $exec
11981198
; FLATSCRW32-NEXT: SI_RETURN implicit $vgpr0, implicit $sgpr8
11991199
renamable $vgpr0 = V_ADD_U32_e32 renamable $sgpr8, %stack.1, implicit $exec
12001200
SI_RETURN implicit $vgpr0, implicit $sgpr8

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