@@ -229,6 +229,9 @@ class SPIRVInstructionSelector : public InstructionSelector {
229229 bool selectSpvThreadId (Register ResVReg, const SPIRVType *ResType,
230230 MachineInstr &I) const ;
231231
232+ bool selectRadians (Register ResVReg, const SPIRVType *ResType,
233+ MachineInstr &I) const ;
234+
232235 bool selectUnmergeValues (MachineInstr &I) const ;
233236
234237 // Utilities
@@ -1751,6 +1754,45 @@ bool SPIRVInstructionSelector::selectSign(Register ResVReg,
17511754 return Result;
17521755}
17531756
1757+ <<<<<<< HEAD
1758+ =======
1759+ bool SPIRVInstructionSelector::selectStep (Register ResVReg,
1760+ const SPIRVType *ResType,
1761+ MachineInstr &I) const {
1762+
1763+ assert (I.getNumOperands () == 4 );
1764+ assert (I.getOperand (2 ).isReg ());
1765+ assert (I.getOperand (3 ).isReg ());
1766+ MachineBasicBlock &BB = *I.getParent ();
1767+
1768+ return BuildMI (BB, I, I.getDebugLoc (), TII.get (SPIRV::OpExtInst))
1769+ .addDef (ResVReg)
1770+ .addUse (GR.getSPIRVTypeID (ResType))
1771+ .addImm (static_cast <uint32_t >(SPIRV::InstructionSet::GLSL_std_450))
1772+ .addImm (GL::Step)
1773+ .addUse (I.getOperand (2 ).getReg ())
1774+ .addUse (I.getOperand (3 ).getReg ())
1775+ .constrainAllUses (TII, TRI, RBI);
1776+ }
1777+
1778+ bool SPIRVInstructionSelector::selectRadians (Register ResVReg,
1779+ const SPIRVType *ResType,
1780+ MachineInstr &I) const {
1781+
1782+ assert (I.getNumOperands () == 3 );
1783+ assert (I.getOperand (2 ).isReg ());
1784+ MachineBasicBlock &BB = *I.getParent ();
1785+
1786+ return BuildMI (BB, I, I.getDebugLoc (), TII.get (SPIRV::OpExtInst))
1787+ .addDef (ResVReg)
1788+ .addUse (GR.getSPIRVTypeID (ResType))
1789+ .addImm (static_cast <uint32_t >(SPIRV::InstructionSet::GLSL_std_450))
1790+ .addImm (GL::Radians)
1791+ .addUse (I.getOperand (2 ).getReg ())
1792+ .constrainAllUses (TII, TRI, RBI);
1793+ }
1794+
1795+ >>>>>>> c520937ac3f9 (Added radians selection for spirv)
17541796bool SPIRVInstructionSelector::selectBitreverse(Register ResVReg,
17551797 const SPIRVType *ResType,
17561798 MachineInstr &I) const {
@@ -2533,6 +2575,7 @@ bool SPIRVInstructionSelector::selectIntrinsic(Register ResVReg,
25332575 .addUse (GR.getOrCreateConstInt (3 , I, IntTy, TII));
25342576 }
25352577 case Intrinsic::spv_step:
2578+ <<<<<<< HEAD
25362579 return selectExtInst (ResVReg, ResType, I, CL::step, GL::Step);
25372580 // Discard intrinsics which we do not expect to actually represent code after
25382581 // lowering or intrinsics which are not implemented but should not crash when
@@ -2542,6 +2585,11 @@ bool SPIRVInstructionSelector::selectIntrinsic(Register ResVReg,
25422585 case Intrinsic::instrprof_value_profile:
25432586 break ;
25442587 // Discard internal intrinsics.
2588+ =======
2589+ return selectStep (ResVReg, ResType, I);
2590+ case Intrinsic::spv_radians:
2591+ return selectRadians (ResVReg, ResType, I);
2592+ >>>>>>> c520937ac3f9 (Added radians selection for spirv)
25452593 case Intrinsic::spv_value_md:
25462594 break ;
25472595 default : {
0 commit comments