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[SDAG] Limit sincos/frexp stack slot folding to stores chained to entry (#115906)
When the chain is not the entry node there is a risk the stores are within a (CALLSEQ_START, CALLSEQ_END), which when the node is expanded will lead to nested call sequences. It should be possible to check for this and allow more cases, but for now, let's limit this to cases where it's definitely safe. Fixes #115323
1 parent 5cd6e21 commit 014455a

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5 files changed

+208
-107
lines changed

5 files changed

+208
-107
lines changed

‎llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp‎

Lines changed: 6 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -2509,7 +2509,11 @@ bool SelectionDAG::expandMultipleResultFPLibCall(
25092509

25102510
// Find users of the node that store the results (and share input chains). The
25112511
// destination pointers can be used instead of creating stack allocations.
2512-
SDValue StoresInChain{};
2512+
// FIXME: This should allow stores with the same chains (not just the entry
2513+
// chain), but there's a risk the store is within a (CALLSEQ_START,
2514+
// CALLSEQ_END) pair, which after this expansion will lead to nested call
2515+
// sequences.
2516+
SDValue InChain = getEntryNode();
25132517
SmallVector<StoreSDNode *, 2> ResultStores(NumResults);
25142518
for (SDNode *User : Node->uses()) {
25152519
if (!ISD::isNormalStore(User))
@@ -2522,11 +2526,9 @@ bool SelectionDAG::expandMultipleResultFPLibCall(
25222526
ST->getAddressSpace() != 0 ||
25232527
ST->getAlign() <
25242528
getDataLayout().getABITypeAlign(StoreType->getScalarType()) ||
2525-
(StoresInChain && ST->getChain() != StoresInChain) ||
2526-
Node->isPredecessorOf(ST->getChain().getNode()))
2529+
ST->getChain() != InChain)
25272530
continue;
25282531
ResultStores[ResNo] = ST;
2529-
StoresInChain = ST->getChain();
25302532
}
25312533

25322534
TargetLowering::ArgListTy Args;
@@ -2568,7 +2570,6 @@ bool SelectionDAG::expandMultipleResultFPLibCall(
25682570
Type *RetType = CallRetResNo.has_value()
25692571
? Node->getValueType(*CallRetResNo).getTypeForEVT(Ctx)
25702572
: Type::getVoidTy(Ctx);
2571-
SDValue InChain = StoresInChain ? StoresInChain : getEntryNode();
25722573
SDValue Callee = getExternalSymbol(VD ? VD->getVectorFnName().data() : LCName,
25732574
TLI->getPointerTy(getDataLayout()));
25742575
TargetLowering::CallLoweringInfo CLI(*this);

‎llvm/test/CodeGen/PowerPC/f128-arith.ll‎

Lines changed: 22 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -1365,33 +1365,45 @@ define dso_local fp128 @qpFREXP(ptr %a, ptr %b) {
13651365
; CHECK-LABEL: qpFREXP:
13661366
; CHECK: # %bb.0: # %entry
13671367
; CHECK-NEXT: mflr r0
1368-
; CHECK-NEXT: stdu r1, -32(r1)
1369-
; CHECK-NEXT: std r0, 48(r1)
1370-
; CHECK-NEXT: .cfi_def_cfa_offset 32
1368+
; CHECK-NEXT: .cfi_def_cfa_offset 64
13711369
; CHECK-NEXT: .cfi_offset lr, 16
1370+
; CHECK-NEXT: .cfi_offset r30, -16
1371+
; CHECK-NEXT: std r30, -16(r1) # 8-byte Folded Spill
1372+
; CHECK-NEXT: stdu r1, -64(r1)
1373+
; CHECK-NEXT: std r0, 80(r1)
1374+
; CHECK-NEXT: addi r5, r1, 44
1375+
; CHECK-NEXT: mr r30, r4
13721376
; CHECK-NEXT: lxv v2, 0(r3)
1373-
; CHECK-NEXT: mr r5, r4
13741377
; CHECK-NEXT: bl frexpf128
13751378
; CHECK-NEXT: nop
1376-
; CHECK-NEXT: addi r1, r1, 32
1379+
; CHECK-NEXT: lwz r3, 44(r1)
1380+
; CHECK-NEXT: stw r3, 0(r30)
1381+
; CHECK-NEXT: addi r1, r1, 64
13771382
; CHECK-NEXT: ld r0, 16(r1)
1383+
; CHECK-NEXT: ld r30, -16(r1) # 8-byte Folded Reload
13781384
; CHECK-NEXT: mtlr r0
13791385
; CHECK-NEXT: blr
13801386
;
13811387
; CHECK-P8-LABEL: qpFREXP:
13821388
; CHECK-P8: # %bb.0: # %entry
13831389
; CHECK-P8-NEXT: mflr r0
1384-
; CHECK-P8-NEXT: stdu r1, -32(r1)
1385-
; CHECK-P8-NEXT: std r0, 48(r1)
1386-
; CHECK-P8-NEXT: .cfi_def_cfa_offset 32
1390+
; CHECK-P8-NEXT: .cfi_def_cfa_offset 64
13871391
; CHECK-P8-NEXT: .cfi_offset lr, 16
1392+
; CHECK-P8-NEXT: .cfi_offset r30, -16
1393+
; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill
1394+
; CHECK-P8-NEXT: stdu r1, -64(r1)
1395+
; CHECK-P8-NEXT: std r0, 80(r1)
1396+
; CHECK-P8-NEXT: addi r5, r1, 44
1397+
; CHECK-P8-NEXT: mr r30, r4
13881398
; CHECK-P8-NEXT: lxvd2x vs0, 0, r3
1389-
; CHECK-P8-NEXT: mr r5, r4
13901399
; CHECK-P8-NEXT: xxswapd v2, vs0
13911400
; CHECK-P8-NEXT: bl frexpf128
13921401
; CHECK-P8-NEXT: nop
1393-
; CHECK-P8-NEXT: addi r1, r1, 32
1402+
; CHECK-P8-NEXT: lwz r3, 44(r1)
1403+
; CHECK-P8-NEXT: stw r3, 0(r30)
1404+
; CHECK-P8-NEXT: addi r1, r1, 64
13941405
; CHECK-P8-NEXT: ld r0, 16(r1)
1406+
; CHECK-P8-NEXT: ld r30, -16(r1) # 8-byte Folded Reload
13951407
; CHECK-P8-NEXT: mtlr r0
13961408
; CHECK-P8-NEXT: blr
13971409
entry:

‎llvm/test/CodeGen/RISCV/llvm.frexp.ll‎

Lines changed: 112 additions & 80 deletions
Original file line numberDiff line numberDiff line change
@@ -543,42 +543,50 @@ define i32 @test_frexp_f32_i32_only_use_exp(float %a) nounwind {
543543
define { <4 x float>, <4 x i32> } @test_frexp_v4f32_v4i32(<4 x float> %a) nounwind {
544544
; RV32IFD-LABEL: test_frexp_v4f32_v4i32:
545545
; RV32IFD: # %bb.0:
546-
; RV32IFD-NEXT: addi sp, sp, -48
547-
; RV32IFD-NEXT: sw ra, 44(sp) # 4-byte Folded Spill
548-
; RV32IFD-NEXT: sw s0, 40(sp) # 4-byte Folded Spill
549-
; RV32IFD-NEXT: fsd fs0, 32(sp) # 8-byte Folded Spill
550-
; RV32IFD-NEXT: fsd fs1, 24(sp) # 8-byte Folded Spill
551-
; RV32IFD-NEXT: fsd fs2, 16(sp) # 8-byte Folded Spill
552-
; RV32IFD-NEXT: fsd fs3, 8(sp) # 8-byte Folded Spill
546+
; RV32IFD-NEXT: addi sp, sp, -64
547+
; RV32IFD-NEXT: sw ra, 60(sp) # 4-byte Folded Spill
548+
; RV32IFD-NEXT: sw s0, 56(sp) # 4-byte Folded Spill
549+
; RV32IFD-NEXT: fsd fs0, 48(sp) # 8-byte Folded Spill
550+
; RV32IFD-NEXT: fsd fs1, 40(sp) # 8-byte Folded Spill
551+
; RV32IFD-NEXT: fsd fs2, 32(sp) # 8-byte Folded Spill
552+
; RV32IFD-NEXT: fsd fs3, 24(sp) # 8-byte Folded Spill
553553
; RV32IFD-NEXT: fmv.s fs0, fa3
554554
; RV32IFD-NEXT: fmv.s fs1, fa2
555555
; RV32IFD-NEXT: fmv.s fs2, fa1
556556
; RV32IFD-NEXT: mv s0, a0
557-
; RV32IFD-NEXT: addi a0, a0, 16
557+
; RV32IFD-NEXT: addi a0, sp, 8
558558
; RV32IFD-NEXT: call frexpf
559559
; RV32IFD-NEXT: fmv.s fs3, fa0
560-
; RV32IFD-NEXT: addi a0, s0, 20
560+
; RV32IFD-NEXT: addi a0, sp, 12
561561
; RV32IFD-NEXT: fmv.s fa0, fs2
562562
; RV32IFD-NEXT: call frexpf
563563
; RV32IFD-NEXT: fmv.s fs2, fa0
564-
; RV32IFD-NEXT: addi a0, s0, 24
564+
; RV32IFD-NEXT: addi a0, sp, 16
565565
; RV32IFD-NEXT: fmv.s fa0, fs1
566566
; RV32IFD-NEXT: call frexpf
567567
; RV32IFD-NEXT: fmv.s fs1, fa0
568-
; RV32IFD-NEXT: addi a0, s0, 28
568+
; RV32IFD-NEXT: addi a0, sp, 20
569569
; RV32IFD-NEXT: fmv.s fa0, fs0
570570
; RV32IFD-NEXT: call frexpf
571+
; RV32IFD-NEXT: lw a0, 8(sp)
572+
; RV32IFD-NEXT: lw a1, 12(sp)
573+
; RV32IFD-NEXT: lw a2, 16(sp)
574+
; RV32IFD-NEXT: lw a3, 20(sp)
575+
; RV32IFD-NEXT: sw a0, 16(s0)
576+
; RV32IFD-NEXT: sw a1, 20(s0)
577+
; RV32IFD-NEXT: sw a2, 24(s0)
578+
; RV32IFD-NEXT: sw a3, 28(s0)
571579
; RV32IFD-NEXT: fsw fs3, 0(s0)
572580
; RV32IFD-NEXT: fsw fs2, 4(s0)
573581
; RV32IFD-NEXT: fsw fs1, 8(s0)
574582
; RV32IFD-NEXT: fsw fa0, 12(s0)
575-
; RV32IFD-NEXT: lw ra, 44(sp) # 4-byte Folded Reload
576-
; RV32IFD-NEXT: lw s0, 40(sp) # 4-byte Folded Reload
577-
; RV32IFD-NEXT: fld fs0, 32(sp) # 8-byte Folded Reload
578-
; RV32IFD-NEXT: fld fs1, 24(sp) # 8-byte Folded Reload
579-
; RV32IFD-NEXT: fld fs2, 16(sp) # 8-byte Folded Reload
580-
; RV32IFD-NEXT: fld fs3, 8(sp) # 8-byte Folded Reload
581-
; RV32IFD-NEXT: addi sp, sp, 48
583+
; RV32IFD-NEXT: lw ra, 60(sp) # 4-byte Folded Reload
584+
; RV32IFD-NEXT: lw s0, 56(sp) # 4-byte Folded Reload
585+
; RV32IFD-NEXT: fld fs0, 48(sp) # 8-byte Folded Reload
586+
; RV32IFD-NEXT: fld fs1, 40(sp) # 8-byte Folded Reload
587+
; RV32IFD-NEXT: fld fs2, 32(sp) # 8-byte Folded Reload
588+
; RV32IFD-NEXT: fld fs3, 24(sp) # 8-byte Folded Reload
589+
; RV32IFD-NEXT: addi sp, sp, 64
582590
; RV32IFD-NEXT: ret
583591
;
584592
; RV64IFD-LABEL: test_frexp_v4f32_v4i32:
@@ -631,44 +639,52 @@ define { <4 x float>, <4 x i32> } @test_frexp_v4f32_v4i32(<4 x float> %a) nounwi
631639
;
632640
; RV32IZFINXZDINX-LABEL: test_frexp_v4f32_v4i32:
633641
; RV32IZFINXZDINX: # %bb.0:
634-
; RV32IZFINXZDINX-NEXT: addi sp, sp, -32
635-
; RV32IZFINXZDINX-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
636-
; RV32IZFINXZDINX-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
637-
; RV32IZFINXZDINX-NEXT: sw s1, 20(sp) # 4-byte Folded Spill
638-
; RV32IZFINXZDINX-NEXT: sw s2, 16(sp) # 4-byte Folded Spill
639-
; RV32IZFINXZDINX-NEXT: sw s3, 12(sp) # 4-byte Folded Spill
640-
; RV32IZFINXZDINX-NEXT: sw s4, 8(sp) # 4-byte Folded Spill
642+
; RV32IZFINXZDINX-NEXT: addi sp, sp, -48
643+
; RV32IZFINXZDINX-NEXT: sw ra, 44(sp) # 4-byte Folded Spill
644+
; RV32IZFINXZDINX-NEXT: sw s0, 40(sp) # 4-byte Folded Spill
645+
; RV32IZFINXZDINX-NEXT: sw s1, 36(sp) # 4-byte Folded Spill
646+
; RV32IZFINXZDINX-NEXT: sw s2, 32(sp) # 4-byte Folded Spill
647+
; RV32IZFINXZDINX-NEXT: sw s3, 28(sp) # 4-byte Folded Spill
648+
; RV32IZFINXZDINX-NEXT: sw s4, 24(sp) # 4-byte Folded Spill
641649
; RV32IZFINXZDINX-NEXT: mv s0, a4
642650
; RV32IZFINXZDINX-NEXT: mv s1, a3
643651
; RV32IZFINXZDINX-NEXT: mv s2, a2
644652
; RV32IZFINXZDINX-NEXT: mv a2, a1
645653
; RV32IZFINXZDINX-NEXT: mv s3, a0
646-
; RV32IZFINXZDINX-NEXT: addi a1, a0, 16
654+
; RV32IZFINXZDINX-NEXT: addi a1, sp, 8
647655
; RV32IZFINXZDINX-NEXT: mv a0, a2
648656
; RV32IZFINXZDINX-NEXT: call frexpf
649657
; RV32IZFINXZDINX-NEXT: mv s4, a0
650-
; RV32IZFINXZDINX-NEXT: addi a1, s3, 20
658+
; RV32IZFINXZDINX-NEXT: addi a1, sp, 12
651659
; RV32IZFINXZDINX-NEXT: mv a0, s2
652660
; RV32IZFINXZDINX-NEXT: call frexpf
653661
; RV32IZFINXZDINX-NEXT: mv s2, a0
654-
; RV32IZFINXZDINX-NEXT: addi a1, s3, 24
662+
; RV32IZFINXZDINX-NEXT: addi a1, sp, 16
655663
; RV32IZFINXZDINX-NEXT: mv a0, s1
656664
; RV32IZFINXZDINX-NEXT: call frexpf
657665
; RV32IZFINXZDINX-NEXT: mv s1, a0
658-
; RV32IZFINXZDINX-NEXT: addi a1, s3, 28
666+
; RV32IZFINXZDINX-NEXT: addi a1, sp, 20
659667
; RV32IZFINXZDINX-NEXT: mv a0, s0
660668
; RV32IZFINXZDINX-NEXT: call frexpf
669+
; RV32IZFINXZDINX-NEXT: lw a1, 8(sp)
670+
; RV32IZFINXZDINX-NEXT: lw a2, 12(sp)
671+
; RV32IZFINXZDINX-NEXT: lw a3, 16(sp)
672+
; RV32IZFINXZDINX-NEXT: lw a4, 20(sp)
673+
; RV32IZFINXZDINX-NEXT: sw a1, 16(s3)
674+
; RV32IZFINXZDINX-NEXT: sw a2, 20(s3)
675+
; RV32IZFINXZDINX-NEXT: sw a3, 24(s3)
676+
; RV32IZFINXZDINX-NEXT: sw a4, 28(s3)
661677
; RV32IZFINXZDINX-NEXT: sw s4, 0(s3)
662678
; RV32IZFINXZDINX-NEXT: sw s2, 4(s3)
663679
; RV32IZFINXZDINX-NEXT: sw s1, 8(s3)
664680
; RV32IZFINXZDINX-NEXT: sw a0, 12(s3)
665-
; RV32IZFINXZDINX-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
666-
; RV32IZFINXZDINX-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
667-
; RV32IZFINXZDINX-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
668-
; RV32IZFINXZDINX-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
669-
; RV32IZFINXZDINX-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
670-
; RV32IZFINXZDINX-NEXT: lw s4, 8(sp) # 4-byte Folded Reload
671-
; RV32IZFINXZDINX-NEXT: addi sp, sp, 32
681+
; RV32IZFINXZDINX-NEXT: lw ra, 44(sp) # 4-byte Folded Reload
682+
; RV32IZFINXZDINX-NEXT: lw s0, 40(sp) # 4-byte Folded Reload
683+
; RV32IZFINXZDINX-NEXT: lw s1, 36(sp) # 4-byte Folded Reload
684+
; RV32IZFINXZDINX-NEXT: lw s2, 32(sp) # 4-byte Folded Reload
685+
; RV32IZFINXZDINX-NEXT: lw s3, 28(sp) # 4-byte Folded Reload
686+
; RV32IZFINXZDINX-NEXT: lw s4, 24(sp) # 4-byte Folded Reload
687+
; RV32IZFINXZDINX-NEXT: addi sp, sp, 48
672688
; RV32IZFINXZDINX-NEXT: ret
673689
;
674690
; RV64IZFINXZDINX-LABEL: test_frexp_v4f32_v4i32:
@@ -1080,34 +1096,41 @@ define <4 x float> @test_frexp_v4f32_v4i32_only_use_fract(<4 x float> %a) nounwi
10801096
define <4 x i32> @test_frexp_v4f32_v4i32_only_use_exp(<4 x float> %a) nounwind {
10811097
; RV32IFD-LABEL: test_frexp_v4f32_v4i32_only_use_exp:
10821098
; RV32IFD: # %bb.0:
1083-
; RV32IFD-NEXT: addi sp, sp, -32
1084-
; RV32IFD-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
1085-
; RV32IFD-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
1086-
; RV32IFD-NEXT: fsd fs0, 16(sp) # 8-byte Folded Spill
1087-
; RV32IFD-NEXT: fsd fs1, 8(sp) # 8-byte Folded Spill
1088-
; RV32IFD-NEXT: fsd fs2, 0(sp) # 8-byte Folded Spill
1089-
; RV32IFD-NEXT: fmv.s fs0, fa2
1090-
; RV32IFD-NEXT: fmv.s fs1, fa1
1091-
; RV32IFD-NEXT: fmv.s fs2, fa0
1099+
; RV32IFD-NEXT: addi sp, sp, -48
1100+
; RV32IFD-NEXT: sw ra, 44(sp) # 4-byte Folded Spill
1101+
; RV32IFD-NEXT: sw s0, 40(sp) # 4-byte Folded Spill
1102+
; RV32IFD-NEXT: fsd fs0, 32(sp) # 8-byte Folded Spill
1103+
; RV32IFD-NEXT: fsd fs1, 24(sp) # 8-byte Folded Spill
1104+
; RV32IFD-NEXT: fsd fs2, 16(sp) # 8-byte Folded Spill
1105+
; RV32IFD-NEXT: fmv.s fs0, fa3
1106+
; RV32IFD-NEXT: fmv.s fs1, fa2
1107+
; RV32IFD-NEXT: fmv.s fs2, fa1
10921108
; RV32IFD-NEXT: mv s0, a0
1093-
; RV32IFD-NEXT: addi a0, a0, 12
1094-
; RV32IFD-NEXT: fmv.s fa0, fa3
1109+
; RV32IFD-NEXT: mv a0, sp
10951110
; RV32IFD-NEXT: call frexpf
1096-
; RV32IFD-NEXT: addi a0, s0, 8
1097-
; RV32IFD-NEXT: fmv.s fa0, fs0
1111+
; RV32IFD-NEXT: addi a0, sp, 4
1112+
; RV32IFD-NEXT: fmv.s fa0, fs2
10981113
; RV32IFD-NEXT: call frexpf
1099-
; RV32IFD-NEXT: addi a0, s0, 4
1114+
; RV32IFD-NEXT: addi a0, sp, 8
11001115
; RV32IFD-NEXT: fmv.s fa0, fs1
11011116
; RV32IFD-NEXT: call frexpf
1102-
; RV32IFD-NEXT: fmv.s fa0, fs2
1103-
; RV32IFD-NEXT: mv a0, s0
1117+
; RV32IFD-NEXT: addi a0, sp, 12
1118+
; RV32IFD-NEXT: fmv.s fa0, fs0
11041119
; RV32IFD-NEXT: call frexpf
1105-
; RV32IFD-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
1106-
; RV32IFD-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
1107-
; RV32IFD-NEXT: fld fs0, 16(sp) # 8-byte Folded Reload
1108-
; RV32IFD-NEXT: fld fs1, 8(sp) # 8-byte Folded Reload
1109-
; RV32IFD-NEXT: fld fs2, 0(sp) # 8-byte Folded Reload
1110-
; RV32IFD-NEXT: addi sp, sp, 32
1120+
; RV32IFD-NEXT: lw a0, 0(sp)
1121+
; RV32IFD-NEXT: lw a1, 4(sp)
1122+
; RV32IFD-NEXT: lw a2, 8(sp)
1123+
; RV32IFD-NEXT: lw a3, 12(sp)
1124+
; RV32IFD-NEXT: sw a0, 0(s0)
1125+
; RV32IFD-NEXT: sw a1, 4(s0)
1126+
; RV32IFD-NEXT: sw a2, 8(s0)
1127+
; RV32IFD-NEXT: sw a3, 12(s0)
1128+
; RV32IFD-NEXT: lw ra, 44(sp) # 4-byte Folded Reload
1129+
; RV32IFD-NEXT: lw s0, 40(sp) # 4-byte Folded Reload
1130+
; RV32IFD-NEXT: fld fs0, 32(sp) # 8-byte Folded Reload
1131+
; RV32IFD-NEXT: fld fs1, 24(sp) # 8-byte Folded Reload
1132+
; RV32IFD-NEXT: fld fs2, 16(sp) # 8-byte Folded Reload
1133+
; RV32IFD-NEXT: addi sp, sp, 48
11111134
; RV32IFD-NEXT: ret
11121135
;
11131136
; RV64IFD-LABEL: test_frexp_v4f32_v4i32_only_use_exp:
@@ -1151,34 +1174,43 @@ define <4 x i32> @test_frexp_v4f32_v4i32_only_use_exp(<4 x float> %a) nounwind {
11511174
;
11521175
; RV32IZFINXZDINX-LABEL: test_frexp_v4f32_v4i32_only_use_exp:
11531176
; RV32IZFINXZDINX: # %bb.0:
1154-
; RV32IZFINXZDINX-NEXT: addi sp, sp, -32
1155-
; RV32IZFINXZDINX-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
1156-
; RV32IZFINXZDINX-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
1157-
; RV32IZFINXZDINX-NEXT: sw s1, 20(sp) # 4-byte Folded Spill
1158-
; RV32IZFINXZDINX-NEXT: sw s2, 16(sp) # 4-byte Folded Spill
1159-
; RV32IZFINXZDINX-NEXT: sw s3, 12(sp) # 4-byte Folded Spill
1160-
; RV32IZFINXZDINX-NEXT: mv s0, a3
1161-
; RV32IZFINXZDINX-NEXT: mv s1, a2
1162-
; RV32IZFINXZDINX-NEXT: mv s2, a1
1177+
; RV32IZFINXZDINX-NEXT: addi sp, sp, -48
1178+
; RV32IZFINXZDINX-NEXT: sw ra, 44(sp) # 4-byte Folded Spill
1179+
; RV32IZFINXZDINX-NEXT: sw s0, 40(sp) # 4-byte Folded Spill
1180+
; RV32IZFINXZDINX-NEXT: sw s1, 36(sp) # 4-byte Folded Spill
1181+
; RV32IZFINXZDINX-NEXT: sw s2, 32(sp) # 4-byte Folded Spill
1182+
; RV32IZFINXZDINX-NEXT: sw s3, 28(sp) # 4-byte Folded Spill
1183+
; RV32IZFINXZDINX-NEXT: mv s0, a4
1184+
; RV32IZFINXZDINX-NEXT: mv s1, a3
1185+
; RV32IZFINXZDINX-NEXT: mv s2, a2
1186+
; RV32IZFINXZDINX-NEXT: mv a2, a1
11631187
; RV32IZFINXZDINX-NEXT: mv s3, a0
1164-
; RV32IZFINXZDINX-NEXT: addi a1, a0, 12
1165-
; RV32IZFINXZDINX-NEXT: mv a0, a4
1188+
; RV32IZFINXZDINX-NEXT: addi a1, sp, 12
1189+
; RV32IZFINXZDINX-NEXT: mv a0, a2
11661190
; RV32IZFINXZDINX-NEXT: call frexpf
1167-
; RV32IZFINXZDINX-NEXT: addi a1, s3, 8
1168-
; RV32IZFINXZDINX-NEXT: mv a0, s0
1191+
; RV32IZFINXZDINX-NEXT: addi a1, sp, 16
1192+
; RV32IZFINXZDINX-NEXT: mv a0, s2
11691193
; RV32IZFINXZDINX-NEXT: call frexpf
1170-
; RV32IZFINXZDINX-NEXT: addi a1, s3, 4
1194+
; RV32IZFINXZDINX-NEXT: addi a1, sp, 20
11711195
; RV32IZFINXZDINX-NEXT: mv a0, s1
11721196
; RV32IZFINXZDINX-NEXT: call frexpf
1173-
; RV32IZFINXZDINX-NEXT: mv a0, s2
1174-
; RV32IZFINXZDINX-NEXT: mv a1, s3
1197+
; RV32IZFINXZDINX-NEXT: addi a1, sp, 24
1198+
; RV32IZFINXZDINX-NEXT: mv a0, s0
11751199
; RV32IZFINXZDINX-NEXT: call frexpf
1176-
; RV32IZFINXZDINX-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
1177-
; RV32IZFINXZDINX-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
1178-
; RV32IZFINXZDINX-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
1179-
; RV32IZFINXZDINX-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
1180-
; RV32IZFINXZDINX-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
1181-
; RV32IZFINXZDINX-NEXT: addi sp, sp, 32
1200+
; RV32IZFINXZDINX-NEXT: lw a0, 12(sp)
1201+
; RV32IZFINXZDINX-NEXT: lw a1, 16(sp)
1202+
; RV32IZFINXZDINX-NEXT: lw a2, 20(sp)
1203+
; RV32IZFINXZDINX-NEXT: lw a3, 24(sp)
1204+
; RV32IZFINXZDINX-NEXT: sw a0, 0(s3)
1205+
; RV32IZFINXZDINX-NEXT: sw a1, 4(s3)
1206+
; RV32IZFINXZDINX-NEXT: sw a2, 8(s3)
1207+
; RV32IZFINXZDINX-NEXT: sw a3, 12(s3)
1208+
; RV32IZFINXZDINX-NEXT: lw ra, 44(sp) # 4-byte Folded Reload
1209+
; RV32IZFINXZDINX-NEXT: lw s0, 40(sp) # 4-byte Folded Reload
1210+
; RV32IZFINXZDINX-NEXT: lw s1, 36(sp) # 4-byte Folded Reload
1211+
; RV32IZFINXZDINX-NEXT: lw s2, 32(sp) # 4-byte Folded Reload
1212+
; RV32IZFINXZDINX-NEXT: lw s3, 28(sp) # 4-byte Folded Reload
1213+
; RV32IZFINXZDINX-NEXT: addi sp, sp, 48
11821214
; RV32IZFINXZDINX-NEXT: ret
11831215
;
11841216
; RV64IZFINXZDINX-LABEL: test_frexp_v4f32_v4i32_only_use_exp:

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