Address comment

mikhailramalho · mikhailramalho · commit 0189f30577ca · 2025-03-20T20:31:57.000-03:00
Signed-off-by: Mikhail R. Gadelha &lt;mikhail@igalia.com&gt;
diff --git a/llvm/lib/Target/RISCV/RISCVISelLowering.h b/llvm/lib/Target/RISCV/RISCVISelLowering.h
@@ -1074,7 +1074,7 @@ class RISCVTargetLowering : public TargetLowering {
   /// calls between the load and store, since these are more expensive than just
   /// using scalars
   bool shouldMergeStoreOfLoadsOverCall(EVT SrcVT, EVT MergedVT) const override {
-    return SrcVT.isScalarInteger() == MergedVT.isScalarInteger();
+    return !MergedVT.isVector() || SrcVT.isVector();
   }
 
   /// For available scheduling models FDIV + two independent FMULs are much

Original file line number	Diff line number	Diff line change
`@@ -1074,7 +1074,7 @@ class RISCVTargetLowering : public TargetLowering {`
`1074`	`1074`	`/// calls between the load and store, since these are more expensive than just`
`1075`	`1075`	`/// using scalars`
`1076`	`1076`	`bool shouldMergeStoreOfLoadsOverCall(EVT SrcVT, EVT MergedVT) const override {`
`1077`		`- return SrcVT.isScalarInteger() == MergedVT.isScalarInteger();`
	`1077`	`+ return !MergedVT.isVector() \|\| SrcVT.isVector();`
`1078`	`1078`	`}`
`1079`	`1079`
`1080`	`1080`	`/// For available scheduling models FDIV + two independent FMULs are much`