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jwanggit86jwanggit86
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Printer should print 4 bits for op_sel
1 parent 6aaf38e commit 01fa59a

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4 files changed

+88
-25
lines changed

4 files changed

+88
-25
lines changed

‎llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp‎

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -9180,15 +9180,15 @@ static bool isRegOrImmWithInputMods(const MCInstrDesc &Desc, unsigned OpNum) {
91809180

91819181
void AMDGPUAsmParser::cvtOpSelHelper(MCInst &Inst, unsigned OpSel) {
91829182
unsigned Opc = Inst.getOpcode();
9183-
const AMDGPU::OpName Ops[] = {AMDGPU::OpName::src0, AMDGPU::OpName::src1,
9183+
constexpr AMDGPU::OpName Ops[] = {AMDGPU::OpName::src0, AMDGPU::OpName::src1,
91849184
AMDGPU::OpName::src2};
9185-
const AMDGPU::OpName ModOps[] = {AMDGPU::OpName::src0_modifiers,
9185+
constexpr AMDGPU::OpName ModOps[] = {AMDGPU::OpName::src0_modifiers,
91869186
AMDGPU::OpName::src1_modifiers,
91879187
AMDGPU::OpName::src2_modifiers};
9188-
// Some v_interp instructions in GFX9 have src0, src2, but no src1.
91899188
for (int J = 0; J < 3; ++J) {
91909189
int OpIdx = AMDGPU::getNamedOperandIdx(Opc, Ops[J]);
91919190
if (OpIdx == -1)
9191+
// Some instructions, e.g. v_interp_p2_f16 in GFX9, have src0, src2, but no src1. So continue instead of break.
91929192
continue;
91939193

91949194
int ModIdx = AMDGPU::getNamedOperandIdx(Opc, ModOps[J]);

‎llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp‎

Lines changed: 9 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1273,13 +1273,21 @@ void AMDGPUInstPrinter::printPackedModifier(const MCInst *MI,
12731273

12741274
for (auto [SrcMod, Src] : MOps) {
12751275
if (!AMDGPU::hasNamedOperand(Opc, Src))
1276-
continue; // Some instructions have src0, src2, but no src1.
1276+
break;
12771277

12781278
int ModIdx = AMDGPU::getNamedOperandIdx(Opc, SrcMod);
12791279
Ops[NumOps++] =
12801280
(ModIdx != -1) ? MI->getOperand(ModIdx).getImm() : DefaultValue;
12811281
}
12821282

1283+
// Some instructions, e.g. v_interp_p2_f16 in GFX9, have src0, src2, but no src1.
1284+
if (NumOps == 1 && AMDGPU::hasNamedOperand(Opc, AMDGPU::OpName::src2) && !AMDGPU::hasNamedOperand(Opc, AMDGPU::OpName::src1)) {
1285+
Ops[NumOps++] = DefaultValue; // Set src1_modifiers to default.
1286+
int Mod2Idx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::src2_modifiers);
1287+
assert(Mod2Idx != -1);
1288+
Ops[NumOps++] = MI->getOperand(Mod2Idx).getImm();
1289+
}
1290+
12831291
const bool HasDst =
12841292
(AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::vdst) != -1) ||
12851293
(AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::sdst) != -1);

‎llvm/test/MC/AMDGPU/vop3-gfx9.s‎

Lines changed: 69 additions & 14 deletions
Original file line numberDiff line numberDiff line change
@@ -566,23 +566,78 @@ v_interp_p2_f16 v5, v2, attr0.x, v3 clamp
566566
// NOSICI: :[[@LINE-2]]:{{[0-9]+}}: error: instruction not supported on this GPU
567567
// VI: v_interp_p2_f16 v5, v2, attr0.x, v3 clamp ; encoding: [0x05,0x80,0x76,0xd2,0x00,0x04,0x0e,0x04]
568568

569+
v_interp_p2_f16 v5, v2, attr0.x, v3 op_sel:[0,0,0]
570+
// GFX9: v_interp_p2_f16 v5, v2, attr0.x, v3 ; encoding: [0x05,0x00,0x77,0xd2,0x00,0x04,0x0e,0x04]
571+
// NOSICI: :[[@LINE-2]]:{{[0-9]+}}: error: instruction not supported on this GPU
572+
// NOVI: :[[@LINE-3]]:{{[0-9]+}}: error: not a valid operand.
573+
574+
v_interp_p2_f16 v5, v2, attr0.x, v3 op_sel:[0,0,1]
575+
// GFX9: v_interp_p2_f16 v5, v2, attr0.x, v3 op_sel:[0,0,1,0] ; encoding: [0x05,0x20,0x77,0xd2,0x00,0x04,0x0e,0x04]
576+
// NOSICI: :[[@LINE-2]]:{{[0-9]+}}: error: instruction not supported on this GPU
577+
// NOVI: :[[@LINE-3]]:{{[0-9]+}}: error: not a valid operand.
578+
579+
v_interp_p2_f16 v5, v2, attr0.x, v3 op_sel:[0,1,0]
580+
// GFX9: v_interp_p2_f16 v5, v2, attr0.x, v3 ; encoding: [0x05,0x00,0x77,0xd2,0x00,0x04,0x0e,0x04]
581+
// NOSICI: :[[@LINE-2]]:{{[0-9]+}}: error: instruction not supported on this GPU
582+
// NOVI: :[[@LINE-3]]:{{[0-9]+}}: error: not a valid operand.
583+
584+
v_interp_p2_f16 v5, v2, attr0.x, v3 op_sel:[0,1,1]
585+
// GFX9: v_interp_p2_f16 v5, v2, attr0.x, v3 op_sel:[0,0,1,0] ; encoding: [0x05,0x20,0x77,0xd2,0x00,0x04,0x0e,0x04]
586+
// NOSICI: :[[@LINE-2]]:{{[0-9]+}}: error: instruction not supported on this GPU
587+
// NOVI: :[[@LINE-3]]:{{[0-9]+}}: error: not a valid operand.
588+
589+
v_interp_p2_f16 v5, v2, attr0.x, v3 op_sel:[1,0,0]
590+
// GFX9: v_interp_p2_f16 v5, v2, attr0.x, v3 op_sel:[1,0,0,0] ; encoding: [0x05,0x08,0x77,0xd2,0x00,0x04,0x0e,0x04]
591+
// NOSICI: :[[@LINE-2]]:{{[0-9]+}}: error: instruction not supported on this GPU
592+
// NOVI: :[[@LINE-3]]:{{[0-9]+}}: error: not a valid operand.
593+
594+
v_interp_p2_f16 v5, v2, attr0.x, v3 op_sel:[1,0,1]
595+
// GFX9: v_interp_p2_f16 v5, v2, attr0.x, v3 op_sel:[1,0,1,0] ; encoding: [0x05,0x28,0x77,0xd2,0x00,0x04,0x0e,0x04]
596+
// NOSICI: :[[@LINE-2]]:{{[0-9]+}}: error: instruction not supported on this GPU
597+
// NOVI: :[[@LINE-3]]:{{[0-9]+}}: error: not a valid operand.
598+
599+
v_interp_p2_f16 v5, v2, attr0.x, v3 op_sel:[0,1,1]
600+
// GFX9: v_interp_p2_f16 v5, v2, attr0.x, v3 op_sel:[0,0,1,0] ; encoding: [0x05,0x20,0x77,0xd2,0x00,0x04,0x0e,0x04]
601+
// NOSICI: :[[@LINE-2]]:{{[0-9]+}}: error: instruction not supported on this GPU
602+
// NOVI: :[[@LINE-3]]:{{[0-9]+}}: error: not a valid operand.
603+
604+
v_interp_p2_f16 v5, v2, attr0.x, v3 op_sel:[1,0,0]
605+
// GFX9: v_interp_p2_f16 v5, v2, attr0.x, v3 op_sel:[1,0,0,0] ; encoding: [0x05,0x08,0x77,0xd2,0x00,0x04,0x0e,0x04]
606+
// NOSICI: :[[@LINE-2]]:{{[0-9]+}}: error: instruction not supported on this GPU
607+
// NOVI: :[[@LINE-3]]:{{[0-9]+}}: error: not a valid operand.
608+
609+
v_interp_p2_f16 v5, v2, attr0.x, v3 op_sel:[1,0,1]
610+
// GFX9: v_interp_p2_f16 v5, v2, attr0.x, v3 op_sel:[1,0,1,0] ; encoding: [0x05,0x28,0x77,0xd2,0x00,0x04,0x0e,0x04]
611+
// NOSICI: :[[@LINE-2]]:{{[0-9]+}}: error: instruction not supported on this GPU
612+
// NOVI: :[[@LINE-3]]:{{[0-9]+}}: error: not a valid operand.
613+
614+
v_interp_p2_f16 v5, v2, attr0.x, v3 op_sel:[1,1,0]
615+
// GFX9: v_interp_p2_f16 v5, v2, attr0.x, v3 op_sel:[1,0,0,0] ; encoding: [0x05,0x08,0x77,0xd2,0x00,0x04,0x0e,0x04]
616+
// NOSICI: :[[@LINE-2]]:{{[0-9]+}}: error: instruction not supported on this GPU
617+
// NOVI: :[[@LINE-3]]:{{[0-9]+}}: error: not a valid operand.
618+
619+
v_interp_p2_f16 v5, v2, attr0.x, v3 op_sel:[1,1,1]
620+
// GFX9: v_interp_p2_f16 v5, v2, attr0.x, v3 op_sel:[1,0,1,0] ; encoding: [0x05,0x28,0x77,0xd2,0x00,0x04,0x0e,0x04]
621+
// NOSICI: :[[@LINE-2]]:{{[0-9]+}}: error: instruction not supported on this GPU
622+
// NOVI: :[[@LINE-3]]:{{[0-9]+}}: error: not a valid operand.
623+
569624
v_interp_p2_f16 v5, v2, attr0.x, v3 op_sel:[0,0,0,0]
570625
// GFX9: v_interp_p2_f16 v5, v2, attr0.x, v3 ; encoding: [0x05,0x00,0x77,0xd2,0x00,0x04,0x0e,0x04]
571626
// NOSICI: :[[@LINE-2]]:{{[0-9]+}}: error: instruction not supported on this GPU
572627
// NOVI: :[[@LINE-3]]:{{[0-9]+}}: error: not a valid operand.
573628

574629
v_interp_p2_f16 v5, v2, attr0.x, v3 op_sel:[0,0,0,1]
575-
// GFX9: v_interp_p2_f16 v5, v2, attr0.x, v3 op_sel:[0,0,1] ; encoding: [0x05,0x40,0x77,0xd2,0x00,0x04,0x0e,0x04]
630+
// GFX9: v_interp_p2_f16 v5, v2, attr0.x, v3 op_sel:[0,0,0,1] ; encoding: [0x05,0x40,0x77,0xd2,0x00,0x04,0x0e,0x04]
576631
// NOSICI: :[[@LINE-2]]:{{[0-9]+}}: error: instruction not supported on this GPU
577632
// NOVI: :[[@LINE-3]]:{{[0-9]+}}: error: not a valid operand.
578633

579634
v_interp_p2_f16 v5, v2, attr0.x, v3 op_sel:[0,0,1,0]
580-
// GFX9: v_interp_p2_f16 v5, v2, attr0.x, v3 op_sel:[0,1,0] ; encoding: [0x05,0x20,0x77,0xd2,0x00,0x04,0x0e,0x04]
635+
// GFX9: v_interp_p2_f16 v5, v2, attr0.x, v3 op_sel:[0,0,1,0] ; encoding: [0x05,0x20,0x77,0xd2,0x00,0x04,0x0e,0x04]
581636
// NOSICI: :[[@LINE-2]]:{{[0-9]+}}: error: instruction not supported on this GPU
582637
// NOVI: :[[@LINE-3]]:{{[0-9]+}}: error: not a valid operand.
583638

584639
v_interp_p2_f16 v5, v2, attr0.x, v3 op_sel:[0,0,1,1]
585-
// GFX9: v_interp_p2_f16 v5, v2, attr0.x, v3 op_sel:[0,1,1] ; encoding: [0x05,0x60,0x77,0xd2,0x00,0x04,0x0e,0x04]
640+
// GFX9: v_interp_p2_f16 v5, v2, attr0.x, v3 op_sel:[0,0,1,1] ; encoding: [0x05,0x60,0x77,0xd2,0x00,0x04,0x0e,0x04]
586641
// NOSICI: :[[@LINE-2]]:{{[0-9]+}}: error: instruction not supported on this GPU
587642
// NOVI: :[[@LINE-3]]:{{[0-9]+}}: error: not a valid operand.
588643

@@ -592,57 +647,57 @@ v_interp_p2_f16 v5, v2, attr0.x, v3 op_sel:[0,1,0,0]
592647
// NOVI: :[[@LINE-3]]:{{[0-9]+}}: error: not a valid operand.
593648

594649
v_interp_p2_f16 v5, v2, attr0.x, v3 op_sel:[0,1,0,1]
595-
// GFX9: v_interp_p2_f16 v5, v2, attr0.x, v3 op_sel:[0,0,1] ; encoding: [0x05,0x40,0x77,0xd2,0x00,0x04,0x0e,0x04]
650+
// GFX9: v_interp_p2_f16 v5, v2, attr0.x, v3 op_sel:[0,0,0,1] ; encoding: [0x05,0x40,0x77,0xd2,0x00,0x04,0x0e,0x04]
596651
// NOSICI: :[[@LINE-2]]:{{[0-9]+}}: error: instruction not supported on this GPU
597652
// NOVI: :[[@LINE-3]]:{{[0-9]+}}: error: not a valid operand.
598653

599654
v_interp_p2_f16 v5, v2, attr0.x, v3 op_sel:[0,1,1,0]
600-
// GFX9: v_interp_p2_f16 v5, v2, attr0.x, v3 op_sel:[0,1,0] ; encoding: [0x05,0x20,0x77,0xd2,0x00,0x04,0x0e,0x04]
655+
// GFX9: v_interp_p2_f16 v5, v2, attr0.x, v3 op_sel:[0,0,1,0] ; encoding: [0x05,0x20,0x77,0xd2,0x00,0x04,0x0e,0x04]
601656
// NOSICI: :[[@LINE-2]]:{{[0-9]+}}: error: instruction not supported on this GPU
602657
// NOVI: :[[@LINE-3]]:{{[0-9]+}}: error: not a valid operand.
603658

604659
v_interp_p2_f16 v5, v2, attr0.x, v3 op_sel:[0,1,1,1]
605-
// GFX9: v_interp_p2_f16 v5, v2, attr0.x, v3 op_sel:[0,1,1] ; encoding: [0x05,0x60,0x77,0xd2,0x00,0x04,0x0e,0x04]
660+
// GFX9: v_interp_p2_f16 v5, v2, attr0.x, v3 op_sel:[0,0,1,1] ; encoding: [0x05,0x60,0x77,0xd2,0x00,0x04,0x0e,0x04]
606661
// NOSICI: :[[@LINE-2]]:{{[0-9]+}}: error: instruction not supported on this GPU
607662
// NOVI: :[[@LINE-3]]:{{[0-9]+}}: error: not a valid operand.
608663

609664
v_interp_p2_f16 v5, v2, attr0.x, v3 op_sel:[1,0,0,0]
610-
// GFX9: v_interp_p2_f16 v5, v2, attr0.x, v3 op_sel:[1,0,0] ; encoding: [0x05,0x08,0x77,0xd2,0x00,0x04,0x0e,0x04]
665+
// GFX9: v_interp_p2_f16 v5, v2, attr0.x, v3 op_sel:[1,0,0,0] ; encoding: [0x05,0x08,0x77,0xd2,0x00,0x04,0x0e,0x04]
611666
// NOSICI: :[[@LINE-2]]:{{[0-9]+}}: error: instruction not supported on this GPU
612667
// NOVI: :[[@LINE-3]]:{{[0-9]+}}: error: not a valid operand.
613668

614669
v_interp_p2_f16 v5, v2, attr0.x, v3 op_sel:[1,0,0,1]
615-
// GFX9: v_interp_p2_f16 v5, v2, attr0.x, v3 op_sel:[1,0,1] ; encoding: [0x05,0x48,0x77,0xd2,0x00,0x04,0x0e,0x04]
670+
// GFX9: v_interp_p2_f16 v5, v2, attr0.x, v3 op_sel:[1,0,0,1] ; encoding: [0x05,0x48,0x77,0xd2,0x00,0x04,0x0e,0x04]
616671
// NOSICI: :[[@LINE-2]]:{{[0-9]+}}: error: instruction not supported on this GPU
617672
// NOVI: :[[@LINE-3]]:{{[0-9]+}}: error: not a valid operand.
618673

619674
v_interp_p2_f16 v5, v2, attr0.x, v3 op_sel:[1,0,1,0]
620-
// GFX9: v_interp_p2_f16 v5, v2, attr0.x, v3 op_sel:[1,1,0] ; encoding: [0x05,0x28,0x77,0xd2,0x00,0x04,0x0e,0x04]
675+
// GFX9: v_interp_p2_f16 v5, v2, attr0.x, v3 op_sel:[1,0,1,0] ; encoding: [0x05,0x28,0x77,0xd2,0x00,0x04,0x0e,0x04]
621676
// NOSICI: :[[@LINE-2]]:{{[0-9]+}}: error: instruction not supported on this GPU
622677
// NOVI: :[[@LINE-3]]:{{[0-9]+}}: error: not a valid operand.
623678

624679
v_interp_p2_f16 v5, v2, attr0.x, v3 op_sel:[1,0,1,1]
625-
// GFX9: v_interp_p2_f16 v5, v2, attr0.x, v3 op_sel:[1,1,1] ; encoding: [0x05,0x68,0x77,0xd2,0x00,0x04,0x0e,0x04]
680+
// GFX9: v_interp_p2_f16 v5, v2, attr0.x, v3 op_sel:[1,0,1,1] ; encoding: [0x05,0x68,0x77,0xd2,0x00,0x04,0x0e,0x04]
626681
// NOSICI: :[[@LINE-2]]:{{[0-9]+}}: error: instruction not supported on this GPU
627682
// NOVI: :[[@LINE-3]]:{{[0-9]+}}: error: not a valid operand.
628683

629684
v_interp_p2_f16 v5, v2, attr0.x, v3 op_sel:[1,1,0,0]
630-
// GFX9: v_interp_p2_f16 v5, v2, attr0.x, v3 op_sel:[1,0,0] ; encoding: [0x05,0x08,0x77,0xd2,0x00,0x04,0x0e,0x04]
685+
// GFX9: v_interp_p2_f16 v5, v2, attr0.x, v3 op_sel:[1,0,0,0] ; encoding: [0x05,0x08,0x77,0xd2,0x00,0x04,0x0e,0x04]
631686
// NOSICI: :[[@LINE-2]]:{{[0-9]+}}: error: instruction not supported on this GPU
632687
// NOVI: :[[@LINE-3]]:{{[0-9]+}}: error: not a valid operand.
633688

634689
v_interp_p2_f16 v5, v2, attr0.x, v3 op_sel:[1,1,0,1]
635-
// GFX9: v_interp_p2_f16 v5, v2, attr0.x, v3 op_sel:[1,0,1] ; encoding: [0x05,0x48,0x77,0xd2,0x00,0x04,0x0e,0x04]
690+
// GFX9: v_interp_p2_f16 v5, v2, attr0.x, v3 op_sel:[1,0,0,1] ; encoding: [0x05,0x48,0x77,0xd2,0x00,0x04,0x0e,0x04]
636691
// NOSICI: :[[@LINE-2]]:{{[0-9]+}}: error: instruction not supported on this GPU
637692
// NOVI: :[[@LINE-3]]:{{[0-9]+}}: error: not a valid operand.
638693

639694
v_interp_p2_f16 v5, v2, attr0.x, v3 op_sel:[1,1,1,0]
640-
// GFX9: v_interp_p2_f16 v5, v2, attr0.x, v3 op_sel:[1,1,0] ; encoding: [0x05,0x28,0x77,0xd2,0x00,0x04,0x0e,0x04]
695+
// GFX9: v_interp_p2_f16 v5, v2, attr0.x, v3 op_sel:[1,0,1,0] ; encoding: [0x05,0x28,0x77,0xd2,0x00,0x04,0x0e,0x04]
641696
// NOSICI: :[[@LINE-2]]:{{[0-9]+}}: error: instruction not supported on this GPU
642697
// NOVI: :[[@LINE-3]]:{{[0-9]+}}: error: not a valid operand.
643698

644699
v_interp_p2_f16 v5, v2, attr0.x, v3 op_sel:[1,1,1,1]
645-
// GFX9: v_interp_p2_f16 v5, v2, attr0.x, v3 op_sel:[1,1,1] ; encoding: [0x05,0x68,0x77,0xd2,0x00,0x04,0x0e,0x04]
700+
// GFX9: v_interp_p2_f16 v5, v2, attr0.x, v3 op_sel:[1,0,1,1] ; encoding: [0x05,0x68,0x77,0xd2,0x00,0x04,0x0e,0x04]
646701
// NOSICI: :[[@LINE-2]]:{{[0-9]+}}: error: instruction not supported on this GPU
647702
// NOVI: :[[@LINE-3]]:{{[0-9]+}}: error: not a valid operand.
648703

‎llvm/test/MC/Disassembler/AMDGPU/gfx9_vop3.txt‎

Lines changed: 7 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -19311,25 +19311,25 @@
1931119311
# CHECK: v_interp_p2_f16 v5, v2, attr0.x, v3 clamp ; encoding: [0x05,0x80,0x77,0xd2,0x00,0x04,0x0e,0x04]
1931219312
0x05,0x80,0x77,0xd2,0x00,0x04,0x0e,0x04
1931319313

19314-
# CHECK: v_interp_p2_f16 v5, v2, attr0.x, v3 op_sel:[0,0,1] ; encoding: [0x05,0x40,0x77,0xd2,0x00,0x04,0x0e,0x04]
19314+
# CHECK: v_interp_p2_f16 v5, v2, attr0.x, v3 op_sel:[0,0,0,1] ; encoding: [0x05,0x40,0x77,0xd2,0x00,0x04,0x0e,0x04]
1931519315
0x05,0x40,0x77,0xd2,0x00,0x04,0x0e,0x04
1931619316

19317-
# CHECK: v_interp_p2_f16 v5, v2, attr0.x, v3 op_sel:[0,1,0] ; encoding: [0x05,0x20,0x77,0xd2,0x00,0x04,0x0e,0x04]
19317+
# CHECK: v_interp_p2_f16 v5, v2, attr0.x, v3 op_sel:[0,0,1,0] ; encoding: [0x05,0x20,0x77,0xd2,0x00,0x04,0x0e,0x04]
1931819318
0x05,0x20,0x77,0xd2,0x00,0x04,0x0e,0x04
1931919319

19320-
# CHECK: v_interp_p2_f16 v5, v2, attr0.x, v3 op_sel:[0,1,1] ; encoding: [0x05,0x60,0x77,0xd2,0x00,0x04,0x0e,0x04]
19320+
# CHECK: v_interp_p2_f16 v5, v2, attr0.x, v3 op_sel:[0,0,1,1] ; encoding: [0x05,0x60,0x77,0xd2,0x00,0x04,0x0e,0x04]
1932119321
0x05,0x60,0x77,0xd2,0x00,0x04,0x0e,0x04
1932219322

19323-
# CHECK: v_interp_p2_f16 v5, v2, attr0.x, v3 op_sel:[1,0,0] ; encoding: [0x05,0x08,0x77,0xd2,0x00,0x04,0x0e,0x04]
19323+
# CHECK: v_interp_p2_f16 v5, v2, attr0.x, v3 op_sel:[1,0,0,0] ; encoding: [0x05,0x08,0x77,0xd2,0x00,0x04,0x0e,0x04]
1932419324
0x05,0x08,0x77,0xd2,0x00,0x04,0x0e,0x04
1932519325

19326-
# CHECK: v_interp_p2_f16 v5, v2, attr0.x, v3 op_sel:[1,0,1] ; encoding: [0x05,0x48,0x77,0xd2,0x00,0x04,0x0e,0x04]
19326+
# CHECK: v_interp_p2_f16 v5, v2, attr0.x, v3 op_sel:[1,0,0,1] ; encoding: [0x05,0x48,0x77,0xd2,0x00,0x04,0x0e,0x04]
1932719327
0x05,0x48,0x77,0xd2,0x00,0x04,0x0e,0x04
1932819328

19329-
# CHECK: v_interp_p2_f16 v5, v2, attr0.x, v3 op_sel:[1,1,0] ; encoding: [0x05,0x28,0x77,0xd2,0x00,0x04,0x0e,0x04]
19329+
# CHECK: v_interp_p2_f16 v5, v2, attr0.x, v3 op_sel:[1,0,1,0] ; encoding: [0x05,0x28,0x77,0xd2,0x00,0x04,0x0e,0x04]
1933019330
0x05,0x28,0x77,0xd2,0x00,0x04,0x0e,0x04
1933119331

19332-
# CHECK: v_interp_p2_f16 v5, v2, attr0.x, v3 op_sel:[1,1,1] ; encoding: [0x05,0x68,0x77,0xd2,0x00,0x04,0x0e,0x04]
19332+
# CHECK: v_interp_p2_f16 v5, v2, attr0.x, v3 op_sel:[1,0,1,1] ; encoding: [0x05,0x68,0x77,0xd2,0x00,0x04,0x0e,0x04]
1933319333
0x05,0x68,0x77,0xd2,0x00,0x04,0x0e,0x04
1933419334

1933519335
# CHECK: v_add_f64 v[5:6], v[1:2], v[2:3] ; encoding: [0x05,0x00,0x80,0xd2,0x01,0x05,0x02,0x00]

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