Rewrite loop to be modifiesRegister

This also causes superregisters to be marked as implicit-def.

Author: jofrn

llvm/lib/CodeGen/LiveVariables.cpp

@@ -279,16 +279,7 @@ void LiveVariables::HandlePhysRegUse(Register Reg, MachineInstr &MI) {
           continue;
 
         // Check if SubReg is defined at LastPartialDef.
-        bool IsDefinedHere = false;
-        for (int I = 0; I < LastPartialDef->getNumOperands(); ++I) {
-          const auto MO = LastPartialDef->getOperand(I);
-          if (!MO.isReg() || !MO.isDef())
-            continue;
-          if (TRI->isSubRegister(SubReg, MO.getReg())) {
-            IsDefinedHere = true;
-            break;
-          }
-        }
+        bool IsDefinedHere = LastPartialDef->modifiesRegister(SubReg, TRI);
         // This part of Reg was defined before the last partial def. It's killed
         // here.
         LastPartialDef->addOperand(

llvm/test/CodeGen/AArch64/ldrpre-ldr-merge.mir

@@ -756,7 +756,7 @@ body:             |
     ; CHECK: liveins: $x0, $x1, $x2
     ; CHECK-NEXT: {{  $}}
     ; CHECK-NEXT: early-clobber renamable $x1, renamable $x0 = LDRSWpre renamable $x1, 40, implicit $w1, implicit $w1_hi :: (load (s32))
-    ; CHECK-NEXT: renamable $w2 = LDRWui renamable $x1, 1, implicit-def $x2, implicit $w2_hi :: (load (s32))
+    ; CHECK-NEXT: renamable $w2 = LDRWui renamable $x1, 1, implicit-def $x2, implicit-def $w2_hi :: (load (s32))
     ; CHECK-NEXT: STPXi renamable $x0, renamable $x2, renamable $x1, 0 :: (store (s64))
     ; CHECK-NEXT: RET undef $lr
     early-clobber renamable $x1, renamable $x0 = LDRSWpre killed renamable $x1, 40 :: (load (s32))

llvm/test/CodeGen/AMDGPU/implicitdef-subreg.mir

@@ -5,14 +5,14 @@ name:            sgpr_copy
 tracksRegLiveness: true
 body:             |
   bb.0:
+
     ; CHECK-LABEL: name: sgpr_copy
     ; CHECK: %sval:sreg_32 = S_MOV_B32 0
     ; CHECK-NEXT: $sgpr0 = COPY %sval
     ; CHECK-NEXT: $sgpr1 = COPY %sval
     ; CHECK-NEXT: $sgpr2 = COPY %sval
-    ; CHECK-NEXT: $sgpr3 = COPY killed %sval, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3, implicit $sgpr0, implicit $sgpr1, implicit $sgpr2, implicit $sgpr0_sgpr1, implicit $sgpr0_sgpr1_sgpr2, implicit-def $sgpr2_sgpr3
+    ; CHECK-NEXT: $sgpr3 = COPY killed %sval, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3, implicit-def $sgpr0, implicit-def $sgpr1, implicit-def $sgpr2, implicit-def $sgpr0_sgpr1, implicit-def $sgpr0_sgpr1_sgpr2, implicit-def $sgpr2_sgpr3
     ; CHECK-NEXT: dead $sgpr30_sgpr31 = COPY killed $sgpr0_sgpr1_sgpr2_sgpr3
-
     %sval:sreg_32 = S_MOV_B32 0
 
     $sgpr0 = COPY %sval
@@ -27,14 +27,14 @@ name:            vgpr_copy
 tracksRegLiveness: true
 body:             |
   bb.0:
+
     ; CHECK-LABEL: name: vgpr_copy
     ; CHECK: %vval:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
     ; CHECK-NEXT: $vgpr0 = COPY %vval
     ; CHECK-NEXT: $vgpr1 = COPY %vval
     ; CHECK-NEXT: $vgpr2 = COPY %vval
-    ; CHECK-NEXT: $vgpr3 = COPY killed %vval, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3, implicit $vgpr0, implicit $vgpr1, implicit $vgpr2, implicit $vgpr0_vgpr1, implicit $vgpr0_vgpr1_vgpr2, implicit-def $vgpr1_vgpr2_vgpr3
+    ; CHECK-NEXT: $vgpr3 = COPY killed %vval, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3, implicit-def $vgpr0, implicit-def $vgpr1, implicit-def $vgpr2, implicit-def $vgpr0_vgpr1, implicit-def $vgpr0_vgpr1_vgpr2, implicit-def $vgpr1_vgpr2_vgpr3
     ; CHECK-NEXT: dead [[COPY:%[0-9]+]]:vgpr_32 = COPY killed $vgpr0_vgpr1_vgpr2_vgpr3
-
     %vval:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
 
     $vgpr0 = COPY %vval