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[TargetLibraryInfo] Add libmvec support for risc-v
1. Rename LIBMVEC_X86 into LIBMVEC to support libmvec in risc-v. 2. Add RVVM1/2/4/8 in VFISAKind to distingusih the LMUL value. 3. Declare some RVV vector math functions in VecFuncs.def. In VecFuncs.def, I add the LI_DEFINE_VECFUNC of LIBMVEC_RVV as follow: ``` TLI_DEFINE_VECFUNC("sin", "_ZGV1Nxv_sin", SCALABLE(1), "_ZGVr1Nxv") TLI_DEFINE_VECFUNC("sin", "_ZGV2Nxv_sin", SCALABLE(2), "_ZGVr2Nxv") TLI_DEFINE_VECFUNC("llvm.exp.f32", "_ZGV1Nxv_expf", SCALABLE(2), "_ZGVr1Nxv") TLI_DEFINE_VECFUNC("llvm.exp.f32", "_ZGV2Nxv_expf", SCALABLE(4), "_ZGVr2Nxv") ``` The `VEC` of TLI_DEFINE_VECFUNC (e.g., `_ZGV2Nxv_sin`), its name mangling rules defined in riscv-non-isa/riscv-elf-psabi-doc#455 Now it's still under review. The `VF` (e.g., `SCALABLE(2)`), it should be `vscale x (LMUL * 64 / sizeof(Type)`. The `VABI_PREFIX` (e.g., `_ZGVr1Nxv`), `r` means RISC-V vector extension, `1` is the LMUL value. ``` _ZGVr1Nxv --> RISC-V Vector Extension with LMUL=1 _ZGVr2Nxv --> RISC-V Vector Extension with LMUL=2 _ZGVr4Nxv --> RISC-V Vector Extension with LMUL=4 _ZGVr8Nxv --> RISC-V Vector Extension with LMUL=8 ```
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17 files changed

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‎clang/lib/Driver/ToolChains/Clang.cpp‎

Lines changed: 4 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -5805,9 +5805,11 @@ void Clang::ConstructJob(Compilation &C, const JobAction &JA,
58055805
Triple.getArch() != llvm::Triple::x86_64)
58065806
D.Diag(diag::err_drv_unsupported_opt_for_target)
58075807
<< Name << Triple.getArchName();
5808-
} else if (Name == "LIBMVEC-X86") {
5808+
} else if (Name == "LIBMVEC") {
58095809
if (Triple.getArch() != llvm::Triple::x86 &&
5810-
Triple.getArch() != llvm::Triple::x86_64)
5810+
Triple.getArch() != llvm::Triple::x86_64 &&
5811+
Triple.getArch() != llvm::Triple::riscv32 &&
5812+
Triple.getArch() != llvm::Triple::riscv64)
58115813
D.Diag(diag::err_drv_unsupported_opt_for_target)
58125814
<< Name << Triple.getArchName();
58135815
} else if (Name == "SLEEF" || Name == "ArmPL") {

‎clang/lib/Driver/ToolChains/CommonArgs.cpp‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -909,7 +909,7 @@ void tools::addLTOOptions(const ToolChain &ToolChain, const ArgList &Args,
909909
std::optional<StringRef> OptVal =
910910
llvm::StringSwitch<std::optional<StringRef>>(ArgVecLib->getValue())
911911
.Case("Accelerate", "Accelerate")
912-
.Case("LIBMVEC", "LIBMVEC-X86")
912+
.Case("LIBMVEC", "LIBMVEC")
913913
.Case("MASSV", "MASSV")
914914
.Case("SVML", "SVML")
915915
.Case("SLEEF", "sleefgnuabi")

‎clang/lib/Driver/ToolChains/Flang.cpp‎

Lines changed: 4 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -446,9 +446,11 @@ void Flang::addTargetOptions(const ArgList &Args,
446446
Triple.getArch() != llvm::Triple::x86_64)
447447
D.Diag(diag::err_drv_unsupported_opt_for_target)
448448
<< Name << Triple.getArchName();
449-
} else if (Name == "LIBMVEC-X86") {
449+
} else if (Name == "LIBMVEC") {
450450
if (Triple.getArch() != llvm::Triple::x86 &&
451-
Triple.getArch() != llvm::Triple::x86_64)
451+
Triple.getArch() != llvm::Triple::x86_64 &&
452+
Triple.getArch() != llvm::Triple::riscv32 &&
453+
Triple.getArch() != llvm::Triple::riscv64)
452454
D.Diag(diag::err_drv_unsupported_opt_for_target)
453455
<< Name << Triple.getArchName();
454456
} else if (Name == "SLEEF" || Name == "ArmPL") {

‎clang/test/Driver/fveclib.c‎

Lines changed: 7 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -5,6 +5,7 @@
55
// RUN: %clang -### -c -fveclib=Darwin_libsystem_m %s 2>&1 | FileCheck --check-prefix=CHECK-DARWIN_LIBSYSTEM_M %s
66
// RUN: %clang -### -c --target=aarch64 -fveclib=SLEEF %s 2>&1 | FileCheck --check-prefix=CHECK-SLEEF %s
77
// RUN: %clang -### -c --target=riscv64-unknown-linux-gnu -fveclib=SLEEF -march=rv64gcv %s 2>&1 | FileCheck -check-prefix CHECK-SLEEF-RISCV %s
8+
// RUN: %clang -### -c --target=riscv64-unknown-linux-gnu -fveclib=libmvec -march=rv64gcv %s 2>&1 | FileCheck -check-prefix CHECK-libmvec %s
89
// RUN: %clang -### -c --target=aarch64 -fveclib=ArmPL %s 2>&1 | FileCheck --check-prefix=CHECK-ARMPL %s
910
// RUN: not %clang -c -fveclib=something %s 2>&1 | FileCheck --check-prefix=CHECK-INVALID %s
1011

@@ -21,7 +22,7 @@
2122

2223
// RUN: not %clang --target=x86 -c -fveclib=SLEEF %s 2>&1 | FileCheck --check-prefix=CHECK-ERROR %s
2324
// RUN: not %clang --target=x86 -c -fveclib=ArmPL %s 2>&1 | FileCheck --check-prefix=CHECK-ERROR %s
24-
// RUN: not %clang --target=aarch64 -c -fveclib=LIBMVEC-X86 %s 2>&1 | FileCheck --check-prefix=CHECK-ERROR %s
25+
// RUN: not %clang --target=aarch64 -c -fveclib=LIBMVEC %s 2>&1 | FileCheck --check-prefix=CHECK-ERROR %s
2526
// RUN: not %clang --target=aarch64 -c -fveclib=SVML %s 2>&1 | FileCheck --check-prefix=CHECK-ERROR %s
2627
// CHECK-ERROR: unsupported option {{.*}} for target
2728

@@ -38,7 +39,7 @@
3839
/* Verify that the correct vector library is passed to LTO flags. */
3940

4041
// RUN: %clang -### --target=x86_64-unknown-linux-gnu -fveclib=LIBMVEC -flto %s 2>&1 | FileCheck --check-prefix=CHECK-LTO-LIBMVEC %s
41-
// CHECK-LTO-LIBMVEC: "-plugin-opt=-vector-library=LIBMVEC-X86"
42+
// CHECK-LTO-LIBMVEC: "-plugin-opt=-vector-library=LIBMVEC"
4243

4344
// RUN: %clang -### --target=powerpc64-unknown-linux-gnu -fveclib=MASSV -flto %s 2>&1 | FileCheck --check-prefix=CHECK-LTO-MASSV %s
4445
// CHECK-LTO-MASSV: "-plugin-opt=-vector-library=MASSV"
@@ -52,6 +53,9 @@
5253
// RUN: %clang -### --target=riscv64-unknown-linux-gnu -fveclib=SLEEF -flto -march=rv64gcv %s 2>&1 | FileCheck -check-prefix CHECK-LTO-SLEEF-RISCV %s
5354
// CHECK-LTO-SLEEF-RISCV: "-plugin-opt=-vector-library=sleefgnuabi"
5455

56+
// RUN: %clang -### --target=riscv64-unknown-linux-gnu -fveclib=LIBMVEC -flto -march=rv64gcv %s 2>&1 | FileCheck -check-prefix CHECK-LTO-LIBMVEC-RISCV %s
57+
// CHECK-LTO-LIBMVEC-RISCV: "-plugin-opt=-vector-library=LIBMVEC"
58+
5559
// RUN: %clang -### --target=aarch64-linux-gnu -fveclib=ArmPL -flto %s 2>&1 | FileCheck --check-prefix=CHECK-LTO-ARMPL %s
5660
// CHECK-LTO-ARMPL: "-plugin-opt=-vector-library=ArmPL"
5761

@@ -110,7 +114,7 @@
110114
// CHECK-ENABLED-LAST: math errno enabled by '-ffp-model=strict' after it was implicitly disabled by '-fveclib=ArmPL', this may limit the utilization of the vector library [-Wmath-errno-enabled-with-veclib]
111115

112116
/* Verify no warning when math-errno is re-enabled for a different veclib (that does not imply -fno-math-errno). */
113-
// RUN: %clang -### --target=aarch64-linux-gnu -fveclib=ArmPL -fmath-errno -fveclib=LIBMVEC %s 2>&1 | FileCheck --check-prefix=CHECK-REPEAT-VECLIB %s
117+
// RUN: %clang -### --target=aarch64-linux-gnu -fveclib=ArmPL -fmath-errno -fveclib=LIBMVEC-X86 %s 2>&1 | FileCheck --check-prefix=CHECK-REPEAT-VECLIB %s
114118
// CHECK-REPEAT-VECLIB-NOT: math errno enabled
115119

116120
/// Verify that vectorized routines library is being linked in.

‎llvm/include/llvm/Analysis/TargetLibraryInfo.h‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -124,7 +124,7 @@ class TargetLibraryInfoImpl {
124124
NoLibrary, // Don't use any vector library.
125125
Accelerate, // Use Accelerate framework.
126126
DarwinLibSystemM, // Use Darwin's libsystem_m.
127-
LIBMVEC_X86, // GLIBC Vector Math library.
127+
LIBMVEC, // GLIBC Vector Math library.
128128
MASSV, // IBM MASS vector library.
129129
SVML, // Intel short vector math library.
130130
SLEEFGNUABI, // SLEEF - SIMD Library for Evaluating Elementary Functions.

‎llvm/include/llvm/Analysis/VecFuncs.def‎

Lines changed: 73 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -236,6 +236,79 @@ TLI_DEFINE_VECFUNC("llvm.log.f64", "_ZGVdN4v_log", FIXED(4), "_ZGV_LLVM_N4v")
236236
TLI_DEFINE_VECFUNC("llvm.log.f32", "_ZGVbN4v_logf", FIXED(4), "_ZGV_LLVM_N4v")
237237
TLI_DEFINE_VECFUNC("llvm.log.f32", "_ZGVdN8v_logf", FIXED(8), "_ZGV_LLVM_N8v")
238238

239+
#elif defined(TLI_DEFINE_LIBMVEC_RVV_VECFUNCS)
240+
// GLIBC Vector math Functions for RISC-V
241+
242+
TLI_DEFINE_VECFUNC("sin", "_ZGV1Nxv_sin", SCALABLE(1), "_ZGVr1Nxv")
243+
TLI_DEFINE_VECFUNC("sin", "_ZGV2Nxv_sin", SCALABLE(2), "_ZGVr2Nxv")
244+
TLI_DEFINE_VECFUNC("sin", "_ZGV4Nxv_sin", SCALABLE(4), "_ZGVr4Nxv")
245+
TLI_DEFINE_VECFUNC("sin", "_ZGV8Nxv_sin", SCALABLE(8), "_ZGVr8Nxv")
246+
247+
TLI_DEFINE_VECFUNC("llvm.sin.f64", "_ZGV1Nxv_sin", SCALABLE(1), "_ZGVr1Nxv")
248+
TLI_DEFINE_VECFUNC("llvm.sin.f64", "_ZGV2Nxv_sin", SCALABLE(2), "_ZGVr2Nxv")
249+
TLI_DEFINE_VECFUNC("llvm.sin.f64", "_ZGV4Nxv_sin", SCALABLE(4), "_ZGVr4Nxv")
250+
TLI_DEFINE_VECFUNC("llvm.sin.f64", "_ZGV8Nxv_sin", SCALABLE(8), "_ZGVr8Nxv")
251+
252+
TLI_DEFINE_VECFUNC("cos", "_ZGV1Nxv_cos", SCALABLE(1), "_ZGVr1Nxv")
253+
TLI_DEFINE_VECFUNC("cos", "_ZGV2Nxv_cos", SCALABLE(2), "_ZGVr2Nxv")
254+
TLI_DEFINE_VECFUNC("cos", "_ZGV4Nxv_cos", SCALABLE(4), "_ZGVr4Nxv")
255+
TLI_DEFINE_VECFUNC("cos", "_ZGV8Nxv_cos", SCALABLE(8), "_ZGVr8Nxv")
256+
257+
TLI_DEFINE_VECFUNC("llvm.cos.f64", "_ZGV1Nxv_cos", SCALABLE(1), "_ZGVr1Nxv")
258+
TLI_DEFINE_VECFUNC("llvm.cos.f64", "_ZGV2Nxv_cos", SCALABLE(2), "_ZGVr2Nxv")
259+
TLI_DEFINE_VECFUNC("llvm.cos.f64", "_ZGV4Nxv_cos", SCALABLE(4), "_ZGVr4Nxv")
260+
TLI_DEFINE_VECFUNC("llvm.cos.f64", "_ZGV8Nxv_cos", SCALABLE(8), "_ZGVr8Nxv")
261+
262+
TLI_DEFINE_VECFUNC("tan", "_ZGV1Nxv_tan", SCALABLE(1), "_ZGVr1Nxv")
263+
TLI_DEFINE_VECFUNC("tan", "_ZGV2Nxv_tan", SCALABLE(2), "_ZGVr2Nxv")
264+
TLI_DEFINE_VECFUNC("tan", "_ZGV4Nxv_tan", SCALABLE(4), "_ZGVr4Nxv")
265+
TLI_DEFINE_VECFUNC("tan", "_ZGV8Nxv_tan", SCALABLE(8), "_ZGVr8Nxv")
266+
267+
TLI_DEFINE_VECFUNC("llvm.tan.f64", "_ZGV1Nxv_tan", SCALABLE(1), "_ZGVr1Nxv")
268+
TLI_DEFINE_VECFUNC("llvm.tan.f64", "_ZGV2Nxv_tan", SCALABLE(2), "_ZGVr2Nxv")
269+
TLI_DEFINE_VECFUNC("llvm.tan.f64", "_ZGV4Nxv_tan", SCALABLE(4), "_ZGVr4Nxv")
270+
TLI_DEFINE_VECFUNC("llvm.tan.f64", "_ZGV8Nxv_tan", SCALABLE(8), "_ZGVr8Nxv")
271+
272+
TLI_DEFINE_VECFUNC("pow", "_ZGV1Nxvv_pow", SCALABLE(1), "_ZGVr1Nxvv")
273+
TLI_DEFINE_VECFUNC("pow", "_ZGV2Nxvv_pow", SCALABLE(2), "_ZGVr2Nxvv")
274+
TLI_DEFINE_VECFUNC("pow", "_ZGV4Nxvv_pow", SCALABLE(4), "_ZGVr4Nxvv")
275+
TLI_DEFINE_VECFUNC("pow", "_ZGV8Nxvv_pow", SCALABLE(8), "_ZGVr8Nxvv")
276+
277+
TLI_DEFINE_VECFUNC("llvm.pow.f64", "_ZGV1Nxvv_pow", SCALABLE(1), "_ZGVr1Nxvv")
278+
TLI_DEFINE_VECFUNC("llvm.pow.f64", "_ZGV2Nxvv_pow", SCALABLE(2), "_ZGVr2Nxvv")
279+
TLI_DEFINE_VECFUNC("llvm.pow.f64", "_ZGV4Nxvv_pow", SCALABLE(4), "_ZGVr4Nxvv")
280+
TLI_DEFINE_VECFUNC("llvm.pow.f64", "_ZGV8Nxvv_pow", SCALABLE(8), "_ZGVr8Nxvv")
281+
282+
TLI_DEFINE_VECFUNC("exp", "_ZGV1Nxv_exp", SCALABLE(1), "_ZGVr1Nxv")
283+
TLI_DEFINE_VECFUNC("exp", "_ZGV2Nxv_exp", SCALABLE(2), "_ZGVr2Nxv")
284+
TLI_DEFINE_VECFUNC("exp", "_ZGV4Nxv_exp", SCALABLE(4), "_ZGVr4Nxv")
285+
TLI_DEFINE_VECFUNC("exp", "_ZGV8Nxv_exp", SCALABLE(8), "_ZGVr8Nxv")
286+
287+
TLI_DEFINE_VECFUNC("expf", "_ZGV1Nxv_expf", SCALABLE(2), "_ZGVr1Nxv")
288+
TLI_DEFINE_VECFUNC("expf", "_ZGV2Nxv_expf", SCALABLE(4), "_ZGVr2Nxv")
289+
TLI_DEFINE_VECFUNC("expf", "_ZGV4Nxv_expf", SCALABLE(8), "_ZGVr4Nxv")
290+
TLI_DEFINE_VECFUNC("expf", "_ZGV8Nxv_expf", SCALABLE(16), "_ZGVr8Nxv")
291+
292+
TLI_DEFINE_VECFUNC("llvm.exp.f64", "_ZGV1Nxv_exp", SCALABLE(1), "_ZGVr1Nxv")
293+
TLI_DEFINE_VECFUNC("llvm.exp.f64", "_ZGV2Nxv_exp", SCALABLE(2), "_ZGVr2Nxv")
294+
TLI_DEFINE_VECFUNC("llvm.exp.f64", "_ZGV4Nxv_exp", SCALABLE(4), "_ZGVr4Nxv")
295+
TLI_DEFINE_VECFUNC("llvm.exp.f64", "_ZGV8Nxv_exp", SCALABLE(8), "_ZGVr8Nxv")
296+
297+
TLI_DEFINE_VECFUNC("llvm.exp.f32", "_ZGV1Nxv_expf", SCALABLE(2), "_ZGVr1Nxv")
298+
TLI_DEFINE_VECFUNC("llvm.exp.f32", "_ZGV2Nxv_expf", SCALABLE(4), "_ZGVr2Nxv")
299+
TLI_DEFINE_VECFUNC("llvm.exp.f32", "_ZGV4Nxv_expf", SCALABLE(8), "_ZGVr4Nxv")
300+
TLI_DEFINE_VECFUNC("llvm.exp.f32", "_ZGV8Nxv_expf", SCALABLE(16), "_ZGVr8Nxv")
301+
302+
TLI_DEFINE_VECFUNC("log", "_ZGV1Nxv_log", SCALABLE(1), "_ZGVr1Nxv")
303+
TLI_DEFINE_VECFUNC("log", "_ZGV2Nxv_log", SCALABLE(2), "_ZGVr2Nxv")
304+
TLI_DEFINE_VECFUNC("log", "_ZGV4Nxv_log", SCALABLE(4), "_ZGVr4Nxv")
305+
TLI_DEFINE_VECFUNC("log", "_ZGV8Nxv_log", SCALABLE(8), "_ZGVr8Nxv")
306+
307+
TLI_DEFINE_VECFUNC("llvm.log.f64", "_ZGV1Nxv_log", SCALABLE(1), "_ZGVr1Nxv")
308+
TLI_DEFINE_VECFUNC("llvm.log.f64", "_ZGV2Nxv_log", SCALABLE(2), "_ZGVr2Nxv")
309+
TLI_DEFINE_VECFUNC("llvm.log.f64", "_ZGV4Nxv_log", SCALABLE(4), "_ZGVr4Nxv")
310+
TLI_DEFINE_VECFUNC("llvm.log.f64", "_ZGV8Nxv_log", SCALABLE(8), "_ZGVr8Nxv")
311+
239312
#elif defined(TLI_DEFINE_MASSV_VECFUNCS)
240313
// IBM MASS library's vector Functions
241314

‎llvm/include/llvm/IR/VFABIDemangler.h‎

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -49,6 +49,10 @@ enum class VFISAKind {
4949
AVX, // x86 AVX
5050
AVX2, // x86 AVX2
5151
AVX512, // x86 AVX512
52+
RVVM1, // RISC-V Vector Extension LMUL=1
53+
RVVM2, // RISC-V Vector Extension LMUL=2
54+
RVVM4, // RISC-V Vector Extension LMUL=4
55+
RVVM8, // RISC-V Vector Extension LMUL=8
5256
LLVM, // LLVM internal ISA for functions that are not
5357
// attached to an existing ABI via name mangling.
5458
Unknown // Unknown ISA

‎llvm/lib/Analysis/TargetLibraryInfo.cpp‎

Lines changed: 20 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -29,7 +29,7 @@ static cl::opt<TargetLibraryInfoImpl::VectorLibrary> ClVectorLibrary(
2929
"Accelerate framework"),
3030
clEnumValN(TargetLibraryInfoImpl::DarwinLibSystemM,
3131
"Darwin_libsystem_m", "Darwin libsystem_m"),
32-
clEnumValN(TargetLibraryInfoImpl::LIBMVEC_X86, "LIBMVEC-X86",
32+
clEnumValN(TargetLibraryInfoImpl::LIBMVEC, "LIBMVEC",
3333
"GLIBC Vector Math library"),
3434
clEnumValN(TargetLibraryInfoImpl::MASSV, "MASSV",
3535
"IBM MASS vector library"),
@@ -1291,6 +1291,12 @@ static const VecDesc VecFuncs_LIBMVEC_X86[] = {
12911291
#undef TLI_DEFINE_LIBMVEC_X86_VECFUNCS
12921292
};
12931293

1294+
static const VecDesc VecFuncs_LIBMVEC_RVV[] = {
1295+
#define TLI_DEFINE_LIBMVEC_RVV_VECFUNCS
1296+
#include "llvm/Analysis/VecFuncs.def"
1297+
#undef TLI_DEFINE_LIBMVEC_RVV_VECFUNCS
1298+
};
1299+
12941300
static const VecDesc VecFuncs_MASSV[] = {
12951301
#define TLI_DEFINE_MASSV_VECFUNCS
12961302
#include "llvm/Analysis/VecFuncs.def"
@@ -1360,8 +1366,19 @@ void TargetLibraryInfoImpl::addVectorizableFunctionsFromVecLib(
13601366
addVectorizableFunctions(VecFuncs_DarwinLibSystemM);
13611367
break;
13621368
}
1363-
case LIBMVEC_X86: {
1364-
addVectorizableFunctions(VecFuncs_LIBMVEC_X86);
1369+
case LIBMVEC: {
1370+
switch (TargetTriple.getArch()) {
1371+
default:
1372+
break;
1373+
case llvm::Triple::x86:
1374+
case llvm::Triple::x86_64:
1375+
addVectorizableFunctions(VecFuncs_LIBMVEC_X86);
1376+
break;
1377+
case llvm::Triple::riscv64:
1378+
case llvm::Triple::riscv32:
1379+
addVectorizableFunctions(VecFuncs_LIBMVEC_RVV);
1380+
break;
1381+
}
13651382
break;
13661383
}
13671384
case MASSV: {

‎llvm/lib/Frontend/Driver/CodeGenOptions.cpp‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -23,7 +23,7 @@ TargetLibraryInfoImpl *createTLII(llvm::Triple &TargetTriple,
2323
TargetTriple);
2424
break;
2525
case VectorLibrary::LIBMVEC:
26-
TLII->addVectorizableFunctionsFromVecLib(TargetLibraryInfoImpl::LIBMVEC_X86,
26+
TLII->addVectorizableFunctionsFromVecLib(TargetLibraryInfoImpl::LIBMVEC,
2727
TargetTriple);
2828
break;
2929
case VectorLibrary::MASSV:

‎llvm/lib/IR/VFABIDemangler.cpp‎

Lines changed: 57 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -38,11 +38,19 @@ static ParseRet tryParseISA(StringRef &MangledName, VFISAKind &ISA) {
3838

3939
if (MangledName.consume_front(VFABI::_LLVM_)) {
4040
ISA = VFISAKind::LLVM;
41+
} else if (MangledName.consume_front("r")) {
42+
ISA = StringSwitch<VFISAKind>(MangledName.take_front(1))
43+
.Case("1", VFISAKind::RVVM1)
44+
.Case("2", VFISAKind::RVVM2)
45+
.Case("4", VFISAKind::RVVM4)
46+
.Case("8", VFISAKind::RVVM8)
47+
.Default(VFISAKind::RVV);
48+
if (ISA != VFISAKind::RVV)
49+
MangledName = MangledName.drop_front(1);
4150
} else {
4251
ISA = StringSwitch<VFISAKind>(MangledName.take_front(1))
4352
.Case("n", VFISAKind::AdvancedSIMD)
4453
.Case("s", VFISAKind::SVE)
45-
.Case("r", VFISAKind::RVV)
4654
.Case("b", VFISAKind::SSE)
4755
.Case("c", VFISAKind::AVX)
4856
.Case("d", VFISAKind::AVX2)
@@ -79,8 +87,10 @@ static ParseRet tryParseMask(StringRef &MangledName, bool &IsMasked) {
7987
static ParseRet tryParseVLEN(StringRef &ParseString, VFISAKind ISA,
8088
std::pair<unsigned, bool> &ParsedVF) {
8189
if (ParseString.consume_front("x")) {
82-
// SVE is the only scalable ISA currently supported.
83-
if (ISA != VFISAKind::SVE && ISA != VFISAKind::RVV) {
90+
// SVE/RVV is the only two scalable ISAs currently supported.
91+
if (ISA != VFISAKind::SVE && ISA != VFISAKind::RVV &&
92+
ISA != VFISAKind::RVVM1 && ISA != VFISAKind::RVVM2 &&
93+
ISA != VFISAKind::RVVM4 && ISA != VFISAKind::RVVM8) {
8494
LLVM_DEBUG(dbgs() << "Vector function variant declared with scalable VF "
8595
<< "but ISA supported for SVE and RVV only\n");
8696
return ParseRet::Error;
@@ -302,17 +312,52 @@ static ParseRet tryParseAlign(StringRef &ParseString, Align &Alignment) {
302312
// the number of elements of the given type which would fit in such a vector.
303313
static std::optional<ElementCount> getElementCountForTy(const VFISAKind ISA,
304314
const Type *Ty) {
305-
assert((ISA == VFISAKind::SVE || ISA == VFISAKind::RVV) &&
315+
// Only AArch64 SVE and RVV are supported at present.
316+
assert((ISA == VFISAKind::SVE || ISA == VFISAKind::RVV ||
317+
ISA == VFISAKind::RVVM1 || ISA == VFISAKind::RVVM2 ||
318+
ISA == VFISAKind::RVVM4 || ISA == VFISAKind::RVVM8) &&
306319
"Scalable VF decoding only implemented for SVE and RVV\n");
307320

308-
if (Ty->isIntegerTy(64) || Ty->isDoubleTy() || Ty->isPointerTy())
309-
return ElementCount::getScalable(2);
310-
if (Ty->isIntegerTy(32) || Ty->isFloatTy())
311-
return ElementCount::getScalable(4);
312-
if (Ty->isIntegerTy(16) || Ty->is16bitFPTy())
313-
return ElementCount::getScalable(8);
314-
if (Ty->isIntegerTy(8))
315-
return ElementCount::getScalable(16);
321+
if (ISA == VFISAKind::SVE || ISA == VFISAKind::RVV) {
322+
if (Ty->isIntegerTy(64) || Ty->isDoubleTy() || Ty->isPointerTy())
323+
return ElementCount::getScalable(2);
324+
if (Ty->isIntegerTy(32) || Ty->isFloatTy())
325+
return ElementCount::getScalable(4);
326+
if (Ty->isIntegerTy(16) || Ty->is16bitFPTy())
327+
return ElementCount::getScalable(8);
328+
if (Ty->isIntegerTy(8))
329+
return ElementCount::getScalable(16);
330+
} else if (ISA == VFISAKind::RVVM1 || ISA == VFISAKind::RVVM2 ||
331+
ISA == VFISAKind::RVVM4 || ISA == VFISAKind::RVVM8) {
332+
// Because 'vscale = VLENB/8', so the ElementCount should be
333+
// 'vscale x (LMUL * 64 / sizeof(Type))'.
334+
unsigned Number = 1;
335+
unsigned LMUL = 1;
336+
unsigned ElemCount;
337+
338+
// TODO: need to distingush rv32 and rv64.
339+
if (Ty->isPointerTy())
340+
return std::nullopt;
341+
342+
if (Ty->isIntegerTy(64) || Ty->isDoubleTy())
343+
Number = 1;
344+
if (Ty->isIntegerTy(32) || Ty->isFloatTy())
345+
Number = 2;
346+
if (Ty->isIntegerTy(16) || Ty->is16bitFPTy())
347+
Number = 4;
348+
if (Ty->isIntegerTy(8))
349+
Number = 8;
350+
351+
if (ISA == VFISAKind::RVVM2)
352+
LMUL = 2;
353+
else if (ISA == VFISAKind::RVVM4)
354+
LMUL = 4;
355+
else if (ISA == VFISAKind::RVVM8)
356+
LMUL = 8;
357+
358+
ElemCount = LMUL * Number;
359+
return ElementCount::getScalable(ElemCount);
360+
}
316361

317362
return std::nullopt;
318363
}

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