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VyacheslavLevytskyyVyacheslavLevytskyy
committed
a new duplicate tracker
1 parent 5c6a017 commit 0253795

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7 files changed

+93
-78
lines changed

7 files changed

+93
-78
lines changed

‎llvm/lib/Target/SPIRV/SPIRVCallLowering.cpp‎

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -398,8 +398,6 @@ bool SPIRVCallLowering::lowerFormalArguments(MachineIRBuilder &MIRBuilder,
398398
auto MRI = MIRBuilder.getMRI();
399399
Register FuncVReg = MRI->createGenericVirtualRegister(LLT::scalar(64));
400400
MRI->setRegClass(FuncVReg, &SPIRV::iIDRegClass);
401-
if (F.isDeclaration())
402-
GR->add(&F, &MIRBuilder.getMF(), FuncVReg);
403401
FunctionType *FTy = getOriginalFunctionType(F);
404402
Type *FRetTy = FTy->getReturnType();
405403
if (isUntypedPointerTy(FRetTy)) {
@@ -425,6 +423,8 @@ bool SPIRVCallLowering::lowerFormalArguments(MachineIRBuilder &MIRBuilder,
425423
.addUse(GR->getSPIRVTypeID(FuncTy));
426424
GR->recordFunctionDefinition(&F, &MB.getInstr()->getOperand(0));
427425
GR->addGlobalObject(&F, &MIRBuilder.getMF(), FuncVReg);
426+
if (F.isDeclaration())
427+
GR->add(&F, MB);
428428

429429
// Add OpFunctionParameter instructions
430430
int i = 0;
@@ -433,11 +433,11 @@ bool SPIRVCallLowering::lowerFormalArguments(MachineIRBuilder &MIRBuilder,
433433
Register ArgReg = VRegs[i][0];
434434
MRI->setRegClass(ArgReg, GR->getRegClass(ArgTypeVRegs[i]));
435435
MRI->setType(ArgReg, GR->getRegType(ArgTypeVRegs[i]));
436-
MIRBuilder.buildInstr(SPIRV::OpFunctionParameter)
437-
.addDef(ArgReg)
438-
.addUse(GR->getSPIRVTypeID(ArgTypeVRegs[i]));
436+
auto MIB = MIRBuilder.buildInstr(SPIRV::OpFunctionParameter)
437+
.addDef(ArgReg)
438+
.addUse(GR->getSPIRVTypeID(ArgTypeVRegs[i]));
439439
if (F.isDeclaration())
440-
GR->add(&Arg, &MIRBuilder.getMF(), ArgReg);
440+
GR->add(&Arg, MIB);
441441
GR->addGlobalObject(&Arg, &MIRBuilder.getMF(), ArgReg);
442442
i++;
443443
}

‎llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp‎

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -63,7 +63,7 @@ class SPIRVEmitIntrinsics
6363
SPIRVTargetMachine *TM = nullptr;
6464
SPIRVGlobalRegistry *GR = nullptr;
6565
Function *CurrF = nullptr;
66-
bool TrackConstants = false;//true;
66+
bool TrackConstants = true;
6767
bool HaveFunPtrs = false;
6868
DenseMap<Instruction *, Constant *> AggrConsts;
6969
DenseMap<Instruction *, Type *> AggrConstTypes;
@@ -2038,7 +2038,7 @@ void SPIRVEmitIntrinsics::processInstrAfterVisit(Instruction *I,
20382038
auto *II = dyn_cast<IntrinsicInst>(I);
20392039
bool IsConstComposite =
20402040
II && II->getIntrinsicID() == Intrinsic::spv_const_composite;
2041-
if (IsConstComposite) {
2041+
if (IsConstComposite && TrackConstants) {
20422042
setInsertPointAfterDef(B, I);
20432043
auto t = AggrConsts.find(I);
20442044
assert(t != AggrConsts.end());
@@ -2055,7 +2055,7 @@ void SPIRVEmitIntrinsics::processInstrAfterVisit(Instruction *I,
20552055
continue;
20562056
unsigned OpNo = Op.getOperandNo();
20572057
if (II && ((II->getIntrinsicID() == Intrinsic::spv_gep && OpNo == 0) ||
2058-
(II->paramHasAttr(OpNo, Attribute::ImmArg))))
2058+
(II->paramHasAttr(OpNo, Attribute::ImmArg))))
20592059
continue;
20602060

20612061
if (!BPrepared) {
@@ -2434,7 +2434,7 @@ bool SPIRVEmitIntrinsics::runOnFunction(Function &Func) {
24342434
deduceOperandElementType(&Phi, nullptr);
24352435

24362436
for (auto *I : Worklist) {
2437-
TrackConstants = false;//true;
2437+
TrackConstants = true;
24382438
if (!I->getType()->isVoidTy() || isa<StoreInst>(I))
24392439
setInsertPointAfterDef(B, I);
24402440
// Visitors return either the original/newly created instruction for further

‎llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp‎

Lines changed: 18 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -178,7 +178,6 @@ SPIRVType *SPIRVGlobalRegistry::getOpTypeVoid(MachineIRBuilder &MIRBuilder) {
178178

179179
void SPIRVGlobalRegistry::invalidateMachineInstr(MachineInstr *MI) {
180180
// TODO:
181-
// - take into account duplicate tracker case which is a known issue,
182181
// - review other data structure wrt. possible issues related to removal
183182
// of a machine instruction during instruction selection.
184183
const MachineFunction *MF = MI->getMF();
@@ -187,6 +186,8 @@ void SPIRVGlobalRegistry::invalidateMachineInstr(MachineInstr *MI) {
187186
return;
188187
if (It->second == MI)
189188
LastInsertedTypeMap.erase(MF);
189+
// remove from the duplicate tracker to avoid incorrect reuse
190+
erase(MI);
190191
}
191192

192193
SPIRVType *SPIRVGlobalRegistry::createOpType(
@@ -275,7 +276,7 @@ Register SPIRVGlobalRegistry::getOrCreateConstFP(APFloat Val, MachineInstr &I,
275276
.addDef(Res)
276277
.addUse(getSPIRVTypeID(SpvType));
277278
addNumImm(APInt(BitWidth,
278-
CI->getValueAPF().bitcastToAPInt().getZExtValue()),
279+
CF->getValueAPF().bitcastToAPInt().getZExtValue()),
279280
MIB);
280281
}
281282
const auto &ST = CurMF->getSubtarget();
@@ -284,7 +285,7 @@ Register SPIRVGlobalRegistry::getOrCreateConstFP(APFloat Val, MachineInstr &I,
284285
*ST.getRegBankInfo());
285286
return MIB;
286287
});
287-
add(CI, NewType);
288+
add(CF, NewType);
288289
return Res;
289290
}
290291

@@ -367,18 +368,18 @@ Register SPIRVGlobalRegistry::buildConstantInt(uint64_t Val,
367368
*Subtarget.getRegBankInfo());
368369
return MIB;
369370
});
370-
add(ConstInt, NewType);
371+
add(CI, NewType);
371372
return Res;
372373
}
373374

374375
Register SPIRVGlobalRegistry::buildConstantFP(APFloat Val,
375376
MachineIRBuilder &MIRBuilder,
376377
SPIRVType *SpvType) {
377378
auto &MF = MIRBuilder.getMF();
379+
LLVMContext &Ctx = MF.getFunction().getContext();
378380
if (!SpvType)
379-
SpvType = getOrCreateSPIRVType(
380-
Type::getFloatTy(MF.getFunction().getContext()), MIRBuilder,
381-
SPIRV::AccessQualifier::ReadWrite, true);
381+
SpvType = getOrCreateSPIRVType(Type::getFloatTy(Ctx), MIRBuilder,
382+
SPIRV::AccessQualifier::ReadWrite, true);
382383
auto *const CF = ConstantFP::get(Ctx, Val);
383384
Register Res = find(CF, &MF);
384385
if (Res.isValid())
@@ -1378,7 +1379,7 @@ SPIRVType *SPIRVGlobalRegistry::getOrCreateOpTypeCoopMatr(
13781379
.addUse(buildConstantInt(Columns, MIRBuilder, SpvTypeInt32, EmitIR))
13791380
.addUse(buildConstantInt(Use, MIRBuilder, SpvTypeInt32, EmitIR));
13801381
});
1381-
add(Key, NewMI);
1382+
add(ExtensionType, NewMI);
13821383
return NewMI;
13831384
}
13841385

@@ -1390,7 +1391,7 @@ SPIRVType *SPIRVGlobalRegistry::getOrCreateOpTypeByOpcode(
13901391
createOpType(MIRBuilder, [&](MachineIRBuilder &MIRBuilder) {
13911392
return MIRBuilder.buildInstr(Opcode).addDef(createTypeVReg(MIRBuilder));
13921393
});
1393-
add(Key, NewMI);
1394+
add(Ty, NewMI);
13941395
return NewMI;
13951396
}
13961397

@@ -1464,15 +1465,16 @@ SPIRVType *SPIRVGlobalRegistry::getOrCreateSPIRVType(unsigned BitWidth,
14641465
Type *Ty) {
14651466
if (const MachineInstr *MI = findMI(Ty, CurMF))
14661467
return MI;
1468+
MachineIRBuilder MIRBuilder(I);
14671469
const MachineInstr *NewMI =
14681470
createOpType(MIRBuilder, [&](MachineIRBuilder &MIRBuilder) {
14691471
return BuildMI(*I.getParent(), I, I.getDebugLoc(), TII.get(SPIRVOPcode))
14701472
.addDef(createTypeVReg(CurMF->getRegInfo()))
14711473
.addImm(BitWidth)
14721474
.addImm(0);
14731475
});
1474-
add(LLVMTy, NewMI);
1475-
return finishCreatingSPIRVType(LLVMTy, MIB);
1476+
add(Ty, NewMI);
1477+
return finishCreatingSPIRVType(Ty, NewMI);
14761478
}
14771479

14781480
SPIRVType *SPIRVGlobalRegistry::getOrCreateSPIRVIntegerType(
@@ -1520,6 +1522,7 @@ SPIRVGlobalRegistry::getOrCreateSPIRVBoolType(MachineInstr &I,
15201522
Type *Ty = IntegerType::get(CurMF->getFunction().getContext(), 1);
15211523
if (const MachineInstr *MI = findMI(Ty, CurMF))
15221524
return MI;
1525+
MachineIRBuilder MIRBuilder(I);
15231526
const MachineInstr *NewMI =
15241527
createOpType(MIRBuilder, [&](MachineIRBuilder &MIRBuilder) {
15251528
return BuildMI(*I.getParent(), I, I.getDebugLoc(),
@@ -1546,6 +1549,7 @@ SPIRVType *SPIRVGlobalRegistry::getOrCreateSPIRVVectorType(
15461549
const_cast<Type *>(getTypeForSPIRVType(BaseType)), NumElements);
15471550
if (const MachineInstr *MI = findMI(Ty, CurMF))
15481551
return MI;
1552+
MachineIRBuilder MIRBuilder(I);
15491553
const MachineInstr *NewMI =
15501554
createOpType(MIRBuilder, [&](MachineIRBuilder &MIRBuilder) {
15511555
return BuildMI(*I.getParent(), I, I.getDebugLoc(),
@@ -1567,6 +1571,7 @@ SPIRVType *SPIRVGlobalRegistry::getOrCreateSPIRVArrayType(
15671571
return MI;
15681572
SPIRVType *SpvTypeInt32 = getOrCreateSPIRVIntegerType(32, I, TII);
15691573
Register Len = getOrCreateConstInt(NumElements, I, SpvTypeInt32, TII);
1574+
MachineIRBuilder MIRBuilder(I);
15701575
const MachineInstr *NewMI =
15711576
createOpType(MIRBuilder, [&](MachineIRBuilder &MIRBuilder) {
15721577
return BuildMI(*I.getParent(), I, I.getDebugLoc(),
@@ -1598,7 +1603,7 @@ SPIRVType *SPIRVGlobalRegistry::getOrCreateSPIRVPointerType(
15981603
.addUse(getSPIRVTypeID(BaseType));
15991604
});
16001605
add(PointerElementType, AddressSpace, NewMI);
1601-
return finishCreatingSPIRVType(Ty, MIB);
1606+
return finishCreatingSPIRVType(Ty, NewMI);
16021607
}
16031608

16041609
SPIRVType *SPIRVGlobalRegistry::getOrCreateSPIRVPointerType(
@@ -1622,6 +1627,7 @@ Register SPIRVGlobalRegistry::getOrCreateUndef(MachineInstr &I,
16221627
CurMF->getRegInfo().setRegClass(Res, &SPIRV::iIDRegClass);
16231628
assignSPIRVTypeToVReg(SpvType, Res, *CurMF);
16241629

1630+
MachineIRBuilder MIRBuilder(I);
16251631
const MachineInstr *NewMI =
16261632
createOpType(MIRBuilder, [&](MachineIRBuilder &MIRBuilder) {
16271633
auto MIB =

‎llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.h‎

Lines changed: 0 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -55,11 +55,6 @@ class SPIRVGlobalRegistry : public SPIRVIRMapping {
5555
// map an instruction to its value's attributes (type, name)
5656
DenseMap<MachineInstr *, std::pair<Type *, std::string>> ValueAttrs;
5757

58-
// Look for an equivalent of the newType in the map. Return the equivalent
59-
// if it's found, otherwise insert newType to the map and return the type.
60-
const MachineInstr *checkSpecialInstr(const SPIRV::SpecialTypeDescriptor &TD,
61-
MachineIRBuilder &MIRBuilder);
62-
6358
SmallPtrSet<const Type *, 4> TypesInProcessing;
6459
DenseMap<const Type *, SPIRVType *> ForwardPointerTypes;
6560

‎llvm/lib/Target/SPIRV/SPIRVIRMapping.h‎

Lines changed: 21 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -119,19 +119,20 @@ inline IRHandle make_descr_ptr(const void *Ptr, unsigned Arg = 0U) {
119119
// pairs support management of unique SPIR-V definitions per machine function
120120
// per an LLVM/GlobalISel entity (e.g., Type, Constant, Machine Instruction).
121121
class SPIRVIRMapping {
122-
DenseMap < std::pair<IRHandle, const MachineFunction *>,
123-
const MachineInstr *MI >> Vregs;
124-
DenseMap<const MachineInstr *, IRHandle> Defs;
122+
DenseMap<std::pair<SPIRV::IRHandle, const MachineFunction *>,
123+
const MachineInstr *>
124+
Vregs;
125+
DenseMap<const MachineInstr *, SPIRV::IRHandle> Defs;
125126

126127
public:
127-
bool add(IRHandle Handle, const MachineInstr *MI) {
128+
bool add(SPIRV::IRHandle Handle, const MachineInstr *MI) {
128129
auto [It, Inserted] =
129130
Vregs.try_emplace(std::make_pair(Handle, MI->getMF()), MI);
130131
if (Inserted) {
131132
auto [_, IsConsistent] = Defs.insert_or_assign(MI, Handle);
132133
assert(IsConsistent);
133134
}
134-
return Inserted1;
135+
return Inserted;
135136
}
136137
bool erase(const MachineInstr *MI) {
137138
bool Res = false;
@@ -141,12 +142,13 @@ class SPIRVIRMapping {
141142
}
142143
return Res;
143144
}
144-
const MachineInstr *findMI(IRHandle Handle, const MachineFunction *MF) {
145+
const MachineInstr *findMI(SPIRV::IRHandle Handle,
146+
const MachineFunction *MF) {
145147
if (auto It = Vregs.find(std::make_pair(Handle, MF)); It != Vregs.end())
146148
return It->second;
147149
return nullptr;
148150
}
149-
Register find(IRHandle Handle, const MachineFunction *MF) {
151+
Register find(SPIRV::IRHandle Handle, const MachineFunction *MF) {
150152
const MachineInstr *MI = findMI(Handle, MF);
151153
return MI ? MI->getOperand(0).getReg() : Register();
152154
}
@@ -155,7 +157,7 @@ class SPIRVIRMapping {
155157
bool add(const Type *Ty, const MachineInstr *MI) {
156158
return add(SPIRV::make_descr_ptr(unifyPtrType(Ty)), MI);
157159
}
158-
void add(const void *Key, const MachineInstr *MI) {
160+
bool add(const void *Key, const MachineInstr *MI) {
159161
return add(SPIRV::make_descr_ptr(Key), MI);
160162
}
161163
bool add(const Type *PointeeTy, unsigned AddressSpace,
@@ -166,14 +168,25 @@ class SPIRVIRMapping {
166168
Register find(const Type *Ty, const MachineFunction *MF) {
167169
return find(SPIRV::make_descr_ptr(unifyPtrType(Ty)), MF);
168170
}
171+
const MachineInstr *findMI(const Type *Ty, const MachineFunction *MF) {
172+
return findMI(SPIRV::make_descr_ptr(unifyPtrType(Ty)), MF);
173+
}
169174
Register find(const void *Key, const MachineFunction *MF) {
170175
return find(SPIRV::make_descr_ptr(Key), MF);
171176
}
177+
const MachineInstr *findMI(const void *Key, const MachineFunction *MF) {
178+
return findMI(SPIRV::make_descr_ptr(Key), MF);
179+
}
172180
Register find(const Type *PointeeTy, unsigned AddressSpace,
173181
const MachineFunction *MF) {
174182
return find(
175183
SPIRV::make_descr_pointee(unifyPtrType(PointeeTy), AddressSpace), MF);
176184
}
185+
const MachineInstr *findMI(const Type *PointeeTy, unsigned AddressSpace,
186+
const MachineFunction *MF) {
187+
return findMI(
188+
SPIRV::make_descr_pointee(unifyPtrType(PointeeTy), AddressSpace), MF);
189+
}
177190
};
178191
} // namespace llvm
179192
#endif // LLVM_LIB_TARGET_SPIRV_SPIRVIRMAPPING_H

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