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1 parent f84bc1c commit 0260bcbCopy full SHA for 0260bcb
mlir/test/Conversion/VectorToLLVM/pass-option-serialization.mlir
@@ -14,7 +14,7 @@
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// RUN: mlir-opt --convert-vector-to-llvm --dump-pass-pipeline %s 2>&1 | FileCheck %s --check-prefix=DEFAULT
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// RUN: mlir-opt --convert-vector-to-llvm='vector-contract-lowering=matmul vector-transpose-lowering=flat' \
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-// RUN: --dump-pass-pipeline 2>&1 | FileCheck %s --check-prefix=NON-DEFAULT
+// RUN: --dump-pass-pipeline %s 2>&1 | FileCheck %s --check-prefix=NON-DEFAULT
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// CHECK: builtin.module(
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// CHECK-SAME: convert-vector-to-llvm{
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