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[SelectionDAG] Make ARITH_FENCE support half and bfloat type (#90836)
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3 files changed

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‎llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp‎

Lines changed: 7 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -2863,6 +2863,8 @@ void DAGTypeLegalizer::SoftPromoteHalfResult(SDNode *N, unsigned ResNo) {
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report_fatal_error("Do not know how to soft promote this operator's "
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"result!");
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case ISD::ARITH_FENCE:
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R = SoftPromoteHalfRes_ARITH_FENCE(N); break;
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case ISD::BITCAST: R = SoftPromoteHalfRes_BITCAST(N); break;
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case ISD::ConstantFP: R = SoftPromoteHalfRes_ConstantFP(N); break;
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case ISD::EXTRACT_VECTOR_ELT:
@@ -2942,6 +2944,11 @@ void DAGTypeLegalizer::SoftPromoteHalfResult(SDNode *N, unsigned ResNo) {
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SetSoftPromotedHalf(SDValue(N, ResNo), R);
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}
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SDValue DAGTypeLegalizer::SoftPromoteHalfRes_ARITH_FENCE(SDNode *N) {
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return DAG.getNode(ISD::ARITH_FENCE, SDLoc(N), MVT::i16,
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BitConvertToInteger(N->getOperand(0)));
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}
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SDValue DAGTypeLegalizer::SoftPromoteHalfRes_BITCAST(SDNode *N) {
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return BitConvertToInteger(N->getOperand(0));
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}

‎llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -728,6 +728,7 @@ class LLVM_LIBRARY_VISIBILITY DAGTypeLegalizer {
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void SetSoftPromotedHalf(SDValue Op, SDValue Result);
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void SoftPromoteHalfResult(SDNode *N, unsigned ResNo);
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SDValue SoftPromoteHalfRes_ARITH_FENCE(SDNode *N);
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SDValue SoftPromoteHalfRes_BinOp(SDNode *N);
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SDValue SoftPromoteHalfRes_BITCAST(SDNode *N);
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SDValue SoftPromoteHalfRes_ConstantFP(SDNode *N);

‎llvm/test/CodeGen/X86/arithmetic_fence2.ll‎

Lines changed: 154 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -157,6 +157,160 @@ define <8 x float> @f6(<8 x float> %a) {
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ret <8 x float> %3
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}
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define half @f7(half %a) nounwind {
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; X86-LABEL: f7:
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; X86: # %bb.0:
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; X86-NEXT: pinsrw $0, {{[0-9]+}}(%esp), %xmm0
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; X86-NEXT: #ARITH_FENCE
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; X86-NEXT: retl
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;
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; X64-LABEL: f7:
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; X64: # %bb.0:
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; X64-NEXT: #ARITH_FENCE
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; X64-NEXT: retq
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%b = call half @llvm.arithmetic.fence.f16(half %a)
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ret half %b
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}
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define bfloat @f8(bfloat %a) nounwind {
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; X86-LABEL: f8:
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; X86: # %bb.0:
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; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: #ARITH_FENCE
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; X86-NEXT: pinsrw $0, %eax, %xmm0
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; X86-NEXT: retl
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;
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; X64-LABEL: f8:
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; X64: # %bb.0:
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; X64-NEXT: pextrw $0, %xmm0, %eax
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; X64-NEXT: #ARITH_FENCE
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; X64-NEXT: pinsrw $0, %eax, %xmm0
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; X64-NEXT: retq
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%b = call bfloat @llvm.arithmetic.fence.bf16(bfloat %a)
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ret bfloat %b
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}
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define <2 x half> @f9(<2 x half> %a) nounwind {
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; X86-LABEL: f9:
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; X86: # %bb.0:
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; X86-NEXT: movdqa %xmm0, %xmm1
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; X86-NEXT: psrld $16, %xmm1
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; X86-NEXT: #ARITH_FENCE
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; X86-NEXT: #ARITH_FENCE
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; X86-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3]
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; X86-NEXT: retl
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;
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; X64-LABEL: f9:
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; X64: # %bb.0:
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; X64-NEXT: movdqa %xmm0, %xmm1
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; X64-NEXT: psrld $16, %xmm1
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; X64-NEXT: #ARITH_FENCE
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; X64-NEXT: #ARITH_FENCE
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; X64-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3]
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; X64-NEXT: retq
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%b = call <2 x half> @llvm.arithmetic.fence.v2f16(<2 x half> %a)
212+
ret <2 x half> %b
213+
}
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define <3 x bfloat> @f10(<3 x bfloat> %a) nounwind {
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; X86-LABEL: f10:
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; X86: # %bb.0:
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; X86-NEXT: pextrw $0, %xmm0, %eax
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; X86-NEXT: movdqa %xmm0, %xmm1
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; X86-NEXT: psrld $16, %xmm1
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; X86-NEXT: pextrw $0, %xmm1, %ecx
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; X86-NEXT: shufps {{.*#+}} xmm0 = xmm0[1,1,1,1]
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; X86-NEXT: pextrw $0, %xmm0, %edx
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; X86-NEXT: #ARITH_FENCE
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; X86-NEXT: #ARITH_FENCE
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; X86-NEXT: #ARITH_FENCE
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; X86-NEXT: pinsrw $0, %eax, %xmm0
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; X86-NEXT: pinsrw $0, %ecx, %xmm1
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; X86-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3]
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; X86-NEXT: pinsrw $0, %edx, %xmm1
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; X86-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
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; X86-NEXT: retl
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;
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; X64-LABEL: f10:
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; X64: # %bb.0:
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; X64-NEXT: pextrw $0, %xmm0, %eax
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; X64-NEXT: movdqa %xmm0, %xmm1
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; X64-NEXT: psrld $16, %xmm1
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; X64-NEXT: pextrw $0, %xmm1, %ecx
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; X64-NEXT: shufps {{.*#+}} xmm0 = xmm0[1,1,1,1]
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; X64-NEXT: pextrw $0, %xmm0, %edx
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; X64-NEXT: #ARITH_FENCE
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; X64-NEXT: #ARITH_FENCE
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; X64-NEXT: #ARITH_FENCE
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; X64-NEXT: pinsrw $0, %eax, %xmm0
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; X64-NEXT: pinsrw $0, %ecx, %xmm1
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; X64-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3]
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; X64-NEXT: pinsrw $0, %edx, %xmm1
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; X64-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
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; X64-NEXT: retq
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%b = call <3 x bfloat> @llvm.arithmetic.fence.v3bf16(<3 x bfloat> %a)
252+
ret <3 x bfloat> %b
253+
}
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255+
define <4 x bfloat> @f11(<4 x bfloat> %a) nounwind {
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; X86-LABEL: f11:
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; X86: # %bb.0:
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; X86-NEXT: pushl %esi
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; X86-NEXT: movdqa %xmm0, %xmm1
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; X86-NEXT: psrlq $48, %xmm1
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; X86-NEXT: pextrw $0, %xmm1, %eax
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; X86-NEXT: movdqa %xmm0, %xmm1
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; X86-NEXT: shufps {{.*#+}} xmm1 = xmm1[1,1],xmm0[1,1]
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; X86-NEXT: pextrw $0, %xmm1, %edx
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; X86-NEXT: pextrw $0, %xmm0, %ecx
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; X86-NEXT: psrld $16, %xmm0
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; X86-NEXT: pextrw $0, %xmm0, %esi
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; X86-NEXT: #ARITH_FENCE
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; X86-NEXT: #ARITH_FENCE
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; X86-NEXT: #ARITH_FENCE
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; X86-NEXT: #ARITH_FENCE
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; X86-NEXT: pinsrw $0, %eax, %xmm0
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; X86-NEXT: pinsrw $0, %edx, %xmm1
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; X86-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3]
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; X86-NEXT: pinsrw $0, %ecx, %xmm0
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; X86-NEXT: pinsrw $0, %esi, %xmm2
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; X86-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3]
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; X86-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
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; X86-NEXT: popl %esi
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; X86-NEXT: retl
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;
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; X64-LABEL: f11:
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; X64: # %bb.0:
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; X64-NEXT: movdqa %xmm0, %xmm1
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; X64-NEXT: psrlq $48, %xmm1
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; X64-NEXT: pextrw $0, %xmm1, %eax
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; X64-NEXT: movdqa %xmm0, %xmm1
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; X64-NEXT: shufps {{.*#+}} xmm1 = xmm1[1,1],xmm0[1,1]
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; X64-NEXT: pextrw $0, %xmm1, %ecx
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; X64-NEXT: pextrw $0, %xmm0, %edx
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; X64-NEXT: psrld $16, %xmm0
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; X64-NEXT: pextrw $0, %xmm0, %esi
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; X64-NEXT: #ARITH_FENCE
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; X64-NEXT: #ARITH_FENCE
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; X64-NEXT: #ARITH_FENCE
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; X64-NEXT: #ARITH_FENCE
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; X64-NEXT: pinsrw $0, %eax, %xmm0
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; X64-NEXT: pinsrw $0, %ecx, %xmm1
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; X64-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3]
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; X64-NEXT: pinsrw $0, %edx, %xmm0
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; X64-NEXT: pinsrw $0, %esi, %xmm2
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; X64-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3]
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; X64-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
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; X64-NEXT: retq
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%b = call <4 x bfloat> @llvm.arithmetic.fence.v4bf16(<4 x bfloat> %a)
306+
ret <4 x bfloat> %b
307+
}
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declare half @llvm.arithmetic.fence.f16(half)
310+
declare bfloat @llvm.arithmetic.fence.bf16(bfloat)
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declare <2 x half> @llvm.arithmetic.fence.v2f16(<2 x half>)
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declare <3 x bfloat> @llvm.arithmetic.fence.v3bf16(<3 x bfloat>)
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declare <4 x bfloat> @llvm.arithmetic.fence.v4bf16(<4 x bfloat>)
160314
declare float @llvm.arithmetic.fence.f32(float)
161315
declare double @llvm.arithmetic.fence.f64(double)
162316
declare <2 x float> @llvm.arithmetic.fence.v2f32(<2 x float>)

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