Address comment. Rewrite the flow

Author: arcbbb

llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp

@@ -1108,47 +1108,44 @@ InstructionCost RISCVTTIImpl::getCastInstrCost(unsigned Opcode, Type *Dst,
         IsSigned ? RISCV::VFNCVT_RTZ_X_F_W : RISCV::VFNCVT_RTZ_XU_F_W;
     unsigned SrcEltSize = Src->getScalarSizeInBits();
     unsigned DstEltSize = Dst->getScalarSizeInBits();
+    InstructionCost Cost = 0;
     if ((SrcEltSize == 16) &&
         (!ST->hasVInstructionsF16() || ((DstEltSize >> 1) > SrcEltSize))) {
+      // If the target only supports vfhmin or it is fp16-to-i64 conversion
       // pre-widening to f32 and then convert f32 to integer
       VectorType *VecF32Ty =
           VectorType::get(Type::getFloatTy(Dst->getContext()),
                           cast<VectorType>(Dst)->getElementCount());
       std::pair<InstructionCost, MVT> VecF32LT =
           getTypeLegalizationCost(VecF32Ty);
-      InstructionCost WidenCost = getRISCVInstructionCost(
-          RISCV::VFWCVT_F_F_V, VecF32LT.second, CostKind);
-      InstructionCost ConvCost =
-          getCastInstrCost(Opcode, Dst, VecF32Ty, CCH, CostKind, I);
-      return VecF32LT.first * WidenCost + ConvCost;
+      Cost +=
+          VecF32LT.first * getRISCVInstructionCost(RISCV::VFWCVT_F_F_V,
+                                                   VecF32LT.second, CostKind);
+      Cost += getCastInstrCost(Opcode, Dst, VecF32Ty, CCH, CostKind, I);
+      return Cost;
     }
     if (DstEltSize == SrcEltSize)
-      return getRISCVInstructionCost(FCVT, DstLT.second, CostKind);
-    if ((DstEltSize >> 1) == SrcEltSize)
-      return getRISCVInstructionCost(FWCVT, DstLT.second, CostKind);
-    InstructionCost TruncCost = 0;
+      Cost += getRISCVInstructionCost(FCVT, DstLT.second, CostKind);
+    else if (DstEltSize > SrcEltSize)
+      Cost += getRISCVInstructionCost(FWCVT, DstLT.second, CostKind);
+    else { // (SrcEltSize > DstEltSize)
+      // First do a narrowing conversion to an integer half the size, then
+      // truncate if needed.
+      MVT ElementVT = MVT::getIntegerVT(SrcEltSize >> 1);
+      MVT VecVT = DstLT.second.changeVectorElementType(ElementVT);
+      Cost += getRISCVInstructionCost(FNCVT, VecVT, CostKind);
+    }
     if ((SrcEltSize >> 1) > DstEltSize) {
-      // For fp vector to mask, we use:
-      // vfncvt.rtz.x.f.w v9, v8
-      // vand.vi v8, v9, 1         generated by Trunc
-      // vmsne.vi v0, v8, 0        generated by Trunc
+      // For mask type, we use:
+      // vand.vi v8, v9, 1
+      // vmsne.vi v0, v8, 0
       VectorType *VecTy =
           VectorType::get(IntegerType::get(Dst->getContext(), SrcEltSize >> 1),
                           cast<VectorType>(Dst)->getElementCount());
-      TruncCost =
+      Cost +=
           getCastInstrCost(Instruction::Trunc, Dst, VecTy, CCH, CostKind, I);
     }
-    if (SrcEltSize > DstEltSize) {
-      // First do a narrowing conversion to an integer half the size, then
-      // truncate if needed.
-      MVT ElementVT = MVT::getIntegerVT(SrcEltSize >> 1);
-      MVT VecVT = DstLT.second.changeVectorElementType(ElementVT);
-      InstructionCost ConvCost =
-          getRISCVInstructionCost(FNCVT, VecVT, CostKind);
-      return ConvCost + TruncCost;
-    }
-
-    return BaseT::getCastInstrCost(Opcode, Dst, Src, CCH, CostKind, I);
+    return Cost;
   }
   case ISD::SINT_TO_FP:
   case ISD::UINT_TO_FP: {
@@ -1159,22 +1156,22 @@ InstructionCost RISCVTTIImpl::getCastInstrCost(unsigned Opcode, Type *Dst,
     unsigned SrcEltSize = Src->getScalarSizeInBits();
     unsigned DstEltSize = Dst->getScalarSizeInBits();
 
+    InstructionCost Cost = 0;
     if ((DstEltSize == 16) &&
         (!ST->hasVInstructionsF16() || ((SrcEltSize >> 1) > DstEltSize))) {
-      // convert to f32 and then f32 to f16
+      // If the target only supports vfhmin or it is i64-to-fp16 conversion
+      // it is converted to f32 and then converted to f16
       VectorType *VecF32Ty =
           VectorType::get(Type::getFloatTy(Dst->getContext()),
                           cast<VectorType>(Dst)->getElementCount());
       std::pair<InstructionCost, MVT> VecF32LT =
           getTypeLegalizationCost(VecF32Ty);
-      InstructionCost FP32ConvCost =
-          getCastInstrCost(Opcode, VecF32Ty, Src, CCH, CostKind, I);
-      return FP32ConvCost +
-             VecF32LT.first * getRISCVInstructionCost(RISCV::VFNCVT_F_F_W,
+      Cost = VecF32LT.first * getRISCVInstructionCost(RISCV::VFNCVT_F_F_W,
                                                       DstLT.second, CostKind);
+      Cost += getCastInstrCost(Opcode, VecF32Ty, Src, CCH, CostKind, I);
+      return Cost;
     }
 
-    InstructionCost PreWidenCost = 0;
     if ((DstEltSize >> 1) > SrcEltSize) {
       // Do pre-widening before converting:
       // 1. Backend could lower (v[sz]ext i8 to double) to
@@ -1187,17 +1184,15 @@ InstructionCost RISCVTTIImpl::getCastInstrCost(unsigned Opcode, Type *Dst,
           VectorType::get(IntegerType::get(Dst->getContext(), SrcEltSize),
                           cast<VectorType>(Dst)->getElementCount());
       unsigned Op = IsSigned ? Instruction::SExt : Instruction::ZExt;
-      PreWidenCost = getCastInstrCost(Op, VecTy, Src, CCH, CostKind, I);
+      Cost += getCastInstrCost(Op, VecTy, Src, CCH, CostKind, I);
     }
     if (DstEltSize == SrcEltSize)
-      return PreWidenCost +
-             getRISCVInstructionCost(FCVT, DstLT.second, CostKind);
-    if ((DstEltSize >> 1) == SrcEltSize)
-      return PreWidenCost +
-             getRISCVInstructionCost(FWCVT, DstLT.second, CostKind);
-    if ((SrcEltSize >> 1) == DstEltSize)
-      return getRISCVInstructionCost(FNCVT, DstLT.second, CostKind);
-    return BaseT::getCastInstrCost(Opcode, Dst, Src, CCH, CostKind, I);
+      Cost += getRISCVInstructionCost(FCVT, DstLT.second, CostKind);
+    else if (DstEltSize > SrcEltSize)
+      Cost += getRISCVInstructionCost(FWCVT, DstLT.second, CostKind);
+    else
+      Cost += getRISCVInstructionCost(FNCVT, DstLT.second, CostKind);
+    return Cost;
   }
   }
   return BaseT::getCastInstrCost(Opcode, Dst, Src, CCH, CostKind, I);