Avoid bitwidth overflow issue

Author: arsenm

llvm/lib/Target/AMDGPU/SIISelLowering.cpp

@@ -16712,13 +16712,14 @@ SITargetLowering::getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI_,
 
     if (RC) {
       if (NumRegs > 1) {
+        if (Idx >= RC->getNumRegs() || Idx + NumRegs - 1 > RC->getNumRegs())
+          return std::pair(0U, nullptr);
+
         uint32_t Width = NumRegs * 32;
         // Prohibit constraints for register ranges with a width that does not
         // match the required type.
         if (VT.SimpleTy != MVT::Other && Width != VT.getSizeInBits())
           return std::pair(0U, nullptr);
-        if (Idx >= RC->getNumRegs())
-          return std::pair(0U, nullptr);
 
         MCRegister Reg = RC->getRegister(Idx);
         if (SIRegisterInfo::isVGPRClass(RC))

llvm/test/CodeGen/AMDGPU/inline-asm-out-of-bounds-register.ll

@@ -83,3 +83,21 @@ define void @vgpr32_last_is_uintmax_p1() {
   tail call void asm sideeffect "; use %0", "{v[4294967265:4294967296]}"(i64 123)
   ret void
 }
+
+; CHECK: error: couldn't allocate input reg for constraint '{v[2:2147483651]}'
+define void @overflow_bitwidth_0() {
+  tail call void asm sideeffect "; use %0", "{v[2:2147483651]}"(i64 123)
+  ret void
+}
+
+; CHECK: error: couldn't allocate input reg for constraint '{v[2147483635:2147483651]}'
+define void @overflow_bitwidth_1() {
+  tail call void asm sideeffect "; use %0", "{v[2147483635:2147483651]}"(i64 123)
+  ret void
+}
+
+; CHECK: error: couldn't allocate input reg for constraint '{v[2147483635:2147483651]}'
+define void @overflow_bitwidth_2() {
+  tail call void asm sideeffect "; use %0", "{v[2147483635:2147483651]}"(i64 123)
+  ret void
+}