Update llvm/test/Transforms/PreISelIntrinsicLowering/AArch64/expand-log.ll

Co-authored-by: Matt Arsenault <[email protected]>

Author: steplong

llvm/test/Transforms/PreISelIntrinsicLowering/AArch64/expand-log.ll

@@ -1,6 +1,5 @@
 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
 ; RUN: opt -passes=pre-isel-intrinsic-lowering -S < %s | FileCheck %s
-target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128-Fn32"
 target triple = "aarch64"
 
 define <vscale x 4 x float> @scalable_vec_log(<vscale x 4 x float> %input) {