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[MC] Simplify MCBinaryExpr/MCUnaryExpr printing by reducing parentheses (#133674)
The existing pretty printer generates excessive parentheses for MCBinaryExpr expressions. This update removes unnecessary parentheses of MCBinaryExpr with +/- operators and MCUnaryExpr. Since relocatable expressions only use + and -, this change improves readability in most cases. Examples: - (SymA - SymB) + C now prints as SymA - SymB + C. This updates the output of -fexperimental-relative-c++-abi-vtables for AArch64 and x86 to `.long _ZN1B3fooEv@PLT-_ZTV1B-8` - expr + (MCTargetExpr) now prints as expr + MCTargetExpr, with this change primarily affecting AMDGPUMCExpr.
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llvm/include/llvm/MC/MCExpr.h

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -81,7 +81,8 @@ class MCExpr {
8181
/// \name Utility Methods
8282
/// @{
8383

84-
void print(raw_ostream &OS, const MCAsmInfo *MAI) const;
84+
void print(raw_ostream &OS, const MCAsmInfo *MAI,
85+
int SurroundingPrec = 0) const;
8586
void dump() const;
8687

8788
/// Returns whether the given symbol is used anywhere in the expression or

llvm/lib/MC/MCExpr.cpp

Lines changed: 31 additions & 20 deletions
Original file line numberDiff line numberDiff line change
@@ -37,10 +37,22 @@ STATISTIC(MCExprEvaluate, "Number of MCExpr evaluations");
3737
} // end namespace stats
3838
} // end anonymous namespace
3939

40+
static int getPrecedence(MCBinaryExpr::Opcode Op) {
41+
switch (Op) {
42+
case MCBinaryExpr::Add:
43+
case MCBinaryExpr::Sub:
44+
return 1;
45+
default:
46+
return 0;
47+
}
48+
}
49+
4050
// VariantKind printing and formatting utilize MAI. operator<< (dump and some
4151
// target code) specifies MAI as nullptr and should be avoided when MAI is
4252
// needed.
43-
void MCExpr::print(raw_ostream &OS, const MCAsmInfo *MAI) const {
53+
void MCExpr::print(raw_ostream &OS, const MCAsmInfo *MAI,
54+
int SurroundingPrec) const {
55+
constexpr int MaxPrec = 9;
4456
switch (getKind()) {
4557
case MCExpr::Target:
4658
return cast<MCTargetExpr>(this)->printImpl(OS, MAI);
@@ -98,31 +110,35 @@ void MCExpr::print(raw_ostream &OS, const MCAsmInfo *MAI) const {
98110
case MCUnaryExpr::Not: OS << '~'; break;
99111
case MCUnaryExpr::Plus: OS << '+'; break;
100112
}
101-
bool Binary = UE.getSubExpr()->getKind() == MCExpr::Binary;
102-
if (Binary) OS << "(";
103-
UE.getSubExpr()->print(OS, MAI);
104-
if (Binary) OS << ")";
113+
UE.getSubExpr()->print(OS, MAI, MaxPrec);
105114
return;
106115
}
107116

108117
case MCExpr::Binary: {
109118
const MCBinaryExpr &BE = cast<MCBinaryExpr>(*this);
110-
111-
// Only print parens around the LHS if it is non-trivial.
112-
if (isa<MCConstantExpr>(BE.getLHS()) || isa<MCSymbolRefExpr>(BE.getLHS())) {
113-
BE.getLHS()->print(OS, MAI);
114-
} else {
119+
// We want to avoid redundant parentheses for relocatable expressions like
120+
// a-b+c.
121+
//
122+
// Print '(' if the current operator has lower precedence than the
123+
// surrounding operator, or if the surrounding operator's precedence is
124+
// unknown (set to HighPrecedence).
125+
int Prec = getPrecedence(BE.getOpcode());
126+
bool Paren = Prec < SurroundingPrec;
127+
if (Paren)
115128
OS << '(';
116-
BE.getLHS()->print(OS, MAI);
117-
OS << ')';
118-
}
129+
// Many operators' precedence is different from C. Set the precedence to
130+
// HighPrecedence for unknown operators.
131+
int SubPrec = Prec ? Prec : MaxPrec;
132+
BE.getLHS()->print(OS, MAI, SubPrec);
119133

120134
switch (BE.getOpcode()) {
121135
case MCBinaryExpr::Add:
122136
// Print "X-42" instead of "X+-42".
123137
if (const MCConstantExpr *RHSC = dyn_cast<MCConstantExpr>(BE.getRHS())) {
124138
if (RHSC->getValue() < 0) {
125139
OS << RHSC->getValue();
140+
if (Paren)
141+
OS << ')';
126142
return;
127143
}
128144
}
@@ -150,14 +166,9 @@ void MCExpr::print(raw_ostream &OS, const MCAsmInfo *MAI) const {
150166
case MCBinaryExpr::Xor: OS << '^'; break;
151167
}
152168

153-
// Only print parens around the LHS if it is non-trivial.
154-
if (isa<MCConstantExpr>(BE.getRHS()) || isa<MCSymbolRefExpr>(BE.getRHS())) {
155-
BE.getRHS()->print(OS, MAI);
156-
} else {
157-
OS << '(';
158-
BE.getRHS()->print(OS, MAI);
169+
BE.getRHS()->print(OS, MAI, SubPrec + 1);
170+
if (Paren)
159171
OS << ')';
160-
}
161172
return;
162173
}
163174
}

llvm/test/CodeGen/AMDGPU/agpr-register-count.ll

Lines changed: 7 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -155,19 +155,19 @@ declare void @undef_func()
155155

156156
; GCN-LABEL: {{^}}kernel_call_undef_func:
157157
; GCN: .amdhsa_next_free_vgpr max(totalnumvgprs(kernel_call_undef_func.num_agpr, kernel_call_undef_func.num_vgpr), 1, 0)
158-
; GFX90A: .amdhsa_accum_offset ((((((alignto(max(1, kernel_call_undef_func.num_vgpr), 4))/4)-1)&(~65536))&63)+1)*4
158+
; GFX90A: .amdhsa_accum_offset (((((alignto(max(1, kernel_call_undef_func.num_vgpr), 4)/4)-1)&~65536)&63)+1)*4
159159
; GCN: .set kernel_call_undef_func.num_vgpr, max(32, amdgpu.max_num_vgpr)
160160
; GCN: .set kernel_call_undef_func.num_agpr, max(0, amdgpu.max_num_agpr)
161161
; GCN: NumVgprs: kernel_call_undef_func.num_vgpr
162162
; GCN: NumAgprs: kernel_call_undef_func.num_agpr
163163
; GCN: TotalNumVgprs: totalnumvgprs(kernel_call_undef_func.num_agpr, kernel_call_undef_func.num_vgpr)
164-
; GFX908: VGPRBlocks: ((alignto(max(max(totalnumvgprs(kernel_call_undef_func.num_agpr, kernel_call_undef_func.num_vgpr), 1, 0), 1), 4))/4)-1
165-
; GFX90A: VGPRBlocks: ((alignto(max(max(totalnumvgprs(kernel_call_undef_func.num_agpr, kernel_call_undef_func.num_vgpr), 1, 0), 1), 8))/8)-1
164+
; GFX908: VGPRBlocks: (alignto(max(max(totalnumvgprs(kernel_call_undef_func.num_agpr, kernel_call_undef_func.num_vgpr), 1, 0), 1), 4)/4)-1
165+
; GFX90A: VGPRBlocks: (alignto(max(max(totalnumvgprs(kernel_call_undef_func.num_agpr, kernel_call_undef_func.num_vgpr), 1, 0), 1), 8)/8)-1
166166
; GCN: NumVGPRsForWavesPerEU: max(totalnumvgprs(kernel_call_undef_func.num_agpr, kernel_call_undef_func.num_vgpr), 1, 0)
167-
; GFX90A: AccumOffset: ((((alignto(max(1, kernel_call_undef_func.num_vgpr), 4))/4)-1)+1)*4
168-
; GFX908: Occupancy: occupancy(10, 4, 256, 8, 10, max(kernel_call_undef_func.numbered_sgpr+(extrasgprs(kernel_call_undef_func.uses_vcc, kernel_call_undef_func.uses_flat_scratch, 1)), 1, 0), max(totalnumvgprs(kernel_call_undef_func.num_agpr, kernel_call_undef_func.num_vgpr), 1, 0))
169-
; GFX90A: Occupancy: occupancy(8, 8, 512, 8, 8, max(kernel_call_undef_func.numbered_sgpr+(extrasgprs(kernel_call_undef_func.uses_vcc, kernel_call_undef_func.uses_flat_scratch, 1)), 1, 0), max(totalnumvgprs(kernel_call_undef_func.num_agpr, kernel_call_undef_func.num_vgpr), 1, 0))
170-
; GFX90A: COMPUTE_PGM_RSRC3_GFX90A:ACCUM_OFFSET: ((((alignto(max(1, kernel_call_undef_func.num_vgpr), 4))/4)-1)&(~65536))&63
167+
; GFX90A: AccumOffset: ((alignto(max(1, kernel_call_undef_func.num_vgpr), 4)/4)-1+1)*4
168+
; GFX908: Occupancy: occupancy(10, 4, 256, 8, 10, max(kernel_call_undef_func.numbered_sgpr+extrasgprs(kernel_call_undef_func.uses_vcc, kernel_call_undef_func.uses_flat_scratch, 1), 1, 0), max(totalnumvgprs(kernel_call_undef_func.num_agpr, kernel_call_undef_func.num_vgpr), 1, 0))
169+
; GFX90A: Occupancy: occupancy(8, 8, 512, 8, 8, max(kernel_call_undef_func.numbered_sgpr+extrasgprs(kernel_call_undef_func.uses_vcc, kernel_call_undef_func.uses_flat_scratch, 1), 1, 0), max(totalnumvgprs(kernel_call_undef_func.num_agpr, kernel_call_undef_func.num_vgpr), 1, 0))
170+
; GFX90A: COMPUTE_PGM_RSRC3_GFX90A:ACCUM_OFFSET: (((alignto(max(1, kernel_call_undef_func.num_vgpr), 4)/4)-1)&~65536)&63
171171
define amdgpu_kernel void @kernel_call_undef_func() #0 {
172172
bb:
173173
call void @undef_func()

llvm/test/CodeGen/AMDGPU/call-alias-register-usage-agpr.ll

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -9,8 +9,8 @@
99

1010
; ALL-LABEL: {{^}}kernel:
1111
; ALL: .amdhsa_next_free_vgpr max(totalnumvgprs(kernel.num_agpr, kernel.num_vgpr), 1, 0)
12-
; ALL-NEXT: .amdhsa_next_free_sgpr (max(kernel.numbered_sgpr+(extrasgprs(kernel.uses_vcc, kernel.uses_flat_scratch, 1)), 1, 0))-(extrasgprs(kernel.uses_vcc, kernel.uses_flat_scratch, 1))
13-
; GFX90A-NEXT: .amdhsa_accum_offset ((((((alignto(max(1, kernel.num_vgpr), 4))/4)-1)&(~65536))&63)+1)*4
12+
; ALL-NEXT: .amdhsa_next_free_sgpr max(kernel.numbered_sgpr+extrasgprs(kernel.uses_vcc, kernel.uses_flat_scratch, 1), 1, 0)-extrasgprs(kernel.uses_vcc, kernel.uses_flat_scratch, 1)
13+
; GFX90A-NEXT: .amdhsa_accum_offset (((((alignto(max(1, kernel.num_vgpr), 4)/4)-1)&~65536)&63)+1)*4
1414

1515
; ALL: .set kernel.num_vgpr, max(41, .Laliasee_default.num_vgpr)
1616
; ALL-NEXT: .set kernel.num_agpr, max(0, .Laliasee_default.num_agpr)

llvm/test/CodeGen/AMDGPU/call-alias-register-usage1.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -10,7 +10,7 @@
1010

1111
; CHECK-LABEL: {{^}}kernel1:
1212
; CHECK: .amdhsa_next_free_vgpr max(totalnumvgprs(kernel1.num_agpr, kernel1.num_vgpr), 1, 0)
13-
; CHECK-NEXT: .amdhsa_next_free_sgpr (max(kernel1.numbered_sgpr+(extrasgprs(kernel1.uses_vcc, kernel1.uses_flat_scratch, 1)), 1, 0))-(extrasgprs(kernel1.uses_vcc, kernel1.uses_flat_scratch, 1))
13+
; CHECK-NEXT: .amdhsa_next_free_sgpr max(kernel1.numbered_sgpr+extrasgprs(kernel1.uses_vcc, kernel1.uses_flat_scratch, 1), 1, 0)-extrasgprs(kernel1.uses_vcc, kernel1.uses_flat_scratch, 1)
1414

1515
; CHECK: .set kernel1.num_vgpr, max(42, .Laliasee_vgpr32_sgpr76.num_vgpr)
1616
; CHECK-NEXT: .set kernel1.num_agpr, max(0, .Laliasee_vgpr32_sgpr76.num_agpr)

llvm/test/CodeGen/AMDGPU/call-alias-register-usage2.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -8,7 +8,7 @@
88

99
; CHECK-LABEL: {{^}}kernel2:
1010
; CHECK: .amdhsa_next_free_vgpr max(totalnumvgprs(kernel2.num_agpr, kernel2.num_vgpr), 1, 0)
11-
; CHECK-NEXT: .amdhsa_next_free_sgpr (max(kernel2.numbered_sgpr+(extrasgprs(kernel2.uses_vcc, kernel2.uses_flat_scratch, 1)), 1, 0))-(extrasgprs(kernel2.uses_vcc, kernel2.uses_flat_scratch, 1))
11+
; CHECK-NEXT: .amdhsa_next_free_sgpr max(kernel2.numbered_sgpr+extrasgprs(kernel2.uses_vcc, kernel2.uses_flat_scratch, 1), 1, 0)-extrasgprs(kernel2.uses_vcc, kernel2.uses_flat_scratch, 1)
1212

1313
; CHECK: .set kernel2.num_vgpr, max(41, .Laliasee_vgpr64_sgpr102.num_vgpr)
1414
; CHECK-NEXT: .set kernel2.num_agpr, max(0, .Laliasee_vgpr64_sgpr102.num_agpr)

llvm/test/CodeGen/AMDGPU/call-alias-register-usage3.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -8,7 +8,7 @@
88

99
; CHECK-LABEL: {{^}}kernel3:
1010
; CHECK: .amdhsa_next_free_vgpr max(totalnumvgprs(kernel3.num_agpr, kernel3.num_vgpr), 1, 0)
11-
; CHECK-NEXT: .amdhsa_next_free_sgpr (max(kernel3.numbered_sgpr+(extrasgprs(kernel3.uses_vcc, kernel3.uses_flat_scratch, 1)), 1, 0))-(extrasgprs(kernel3.uses_vcc, kernel3.uses_flat_scratch, 1))
11+
; CHECK-NEXT: .amdhsa_next_free_sgpr max(kernel3.numbered_sgpr+extrasgprs(kernel3.uses_vcc, kernel3.uses_flat_scratch, 1), 1, 0)-extrasgprs(kernel3.uses_vcc, kernel3.uses_flat_scratch, 1)
1212

1313
; CHECK: .set kernel3.num_vgpr, max(41, .Laliasee_vgpr256_sgpr102.num_vgpr)
1414
; CHECK-NEXT: .set kernel3.num_agpr, max(0, .Laliasee_vgpr256_sgpr102.num_agpr)

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