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Tests without ISelLowering changes
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2 files changed

+117
-15
lines changed

2 files changed

+117
-15
lines changed

‎llvm/lib/Target/RISCV/RISCVISelLowering.cpp‎

Lines changed: 2 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -15946,10 +15946,7 @@ static SDValue expandMulToNAFSequence(SDNode *N, SelectionDAG &DAG,
1594615946

1594715947
// X * (2^N +/- 2^M) -> (add/sub (shl X, C1), (shl X, C2))
1594815948
static SDValue expandMulToAddOrSubOfShl(SDNode *N, SelectionDAG &DAG,
15949-
uint64_t MulAmt,
15950-
const RISCVSubtarget &Subtarget) {
15951-
if (Subtarget.hasVendorXqciac() && isInt<12>(MulAmt))
15952-
return SDValue();
15949+
uint64_t MulAmt) {
1595315950

1595415951
uint64_t MulAmtLowBit = MulAmt & (-MulAmt);
1595515952
ISD::NodeType Op;
@@ -16135,7 +16132,7 @@ static SDValue expandMul(SDNode *N, SelectionDAG &DAG,
1613516132
}
1613616133
}
1613716134

16138-
if (SDValue V = expandMulToAddOrSubOfShl(N, DAG, MulAmt, Subtarget))
16135+
if (SDValue V = expandMulToAddOrSubOfShl(N, DAG, MulAmt))
1613916136
return V;
1614016137

1614116138
if (!Subtarget.hasStdExtZmmul())
@@ -23756,10 +23753,6 @@ bool RISCVTargetLowering::decomposeMulByConstant(LLVMContext &Context, EVT VT,
2375623753
auto *ConstNode = cast<ConstantSDNode>(C);
2375723754
const APInt &Imm = ConstNode->getAPIntValue();
2375823755

23759-
// Don't do this if the Xqciac extension is enabled and the Imm in simm12.
23760-
if (Subtarget.hasVendorXqciac() && Imm.isSignedIntN(12))
23761-
return false;
23762-
2376323756
// Break the MUL to a SLLI and an ADD/SUB.
2376423757
if ((Imm + 1).isPowerOf2() || (Imm - 1).isPowerOf2() ||
2376523758
(1 - Imm).isPowerOf2() || (-1 - Imm).isPowerOf2())

‎llvm/test/CodeGen/RISCV/xqciac.ll‎

Lines changed: 115 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -15,14 +15,14 @@ define dso_local i32 @mul(i32 %a, i32 %b) local_unnamed_addr #0 {
1515
;
1616
; RV32IMXQCIAC-LABEL: mul:
1717
; RV32IMXQCIAC: # %bb.0: # %entry
18-
; RV32IMXQCIAC-NEXT: li a0, 33
19-
; RV32IMXQCIAC-NEXT: mul a0, a1, a0
18+
; RV32IMXQCIAC-NEXT: slli a0, a1, 5
19+
; RV32IMXQCIAC-NEXT: add a0, a0, a1
2020
; RV32IMXQCIAC-NEXT: ret
2121
;
2222
; RV32IZBAMXQCIAC-LABEL: mul:
2323
; RV32IZBAMXQCIAC: # %bb.0: # %entry
24-
; RV32IZBAMXQCIAC-NEXT: li a0, 33
25-
; RV32IZBAMXQCIAC-NEXT: mul a0, a1, a0
24+
; RV32IZBAMXQCIAC-NEXT: slli a0, a1, 5
25+
; RV32IZBAMXQCIAC-NEXT: add a0, a0, a1
2626
; RV32IZBAMXQCIAC-NEXT: ret
2727
entry:
2828
%mul = mul nsw i32 %b, 33
@@ -52,6 +52,29 @@ entry:
5252
ret i32 %add
5353
}
5454

55+
define dso_local i32 @muliadd2(i32 %a, i32 %b) local_unnamed_addr #0 {
56+
; RV32IM-LABEL: muliadd2:
57+
; RV32IM: # %bb.0: # %entry
58+
; RV32IM-NEXT: li a2, 1111
59+
; RV32IM-NEXT: mul a1, a1, a2
60+
; RV32IM-NEXT: add a0, a1, a0
61+
; RV32IM-NEXT: ret
62+
;
63+
; RV32IMXQCIAC-LABEL: muliadd2:
64+
; RV32IMXQCIAC: # %bb.0: # %entry
65+
; RV32IMXQCIAC-NEXT: qc.muliadd a0, a1, 1111
66+
; RV32IMXQCIAC-NEXT: ret
67+
;
68+
; RV32IZBAMXQCIAC-LABEL: muliadd2:
69+
; RV32IZBAMXQCIAC: # %bb.0: # %entry
70+
; RV32IZBAMXQCIAC-NEXT: qc.muliadd a0, a1, 1111
71+
; RV32IZBAMXQCIAC-NEXT: ret
72+
entry:
73+
%mul = mul nsw i32 %b, 1111
74+
%add = add nsw i32 %mul, %a
75+
ret i32 %add
76+
}
77+
5578
define dso_local i32 @muliadd_neg(i32 %a, i32 %b) local_unnamed_addr #0 {
5679
; RV32IM-LABEL: muliadd_neg:
5780
; RV32IM: # %bb.0: # %entry
@@ -75,6 +98,29 @@ entry:
7598
ret i32 %add
7699
}
77100

101+
define dso_local i32 @muliadd_neg2(i32 %a, i32 %b) local_unnamed_addr #0 {
102+
; RV32IM-LABEL: muliadd_neg2:
103+
; RV32IM: # %bb.0: # %entry
104+
; RV32IM-NEXT: li a2, -2045
105+
; RV32IM-NEXT: mul a1, a1, a2
106+
; RV32IM-NEXT: add a0, a1, a0
107+
; RV32IM-NEXT: ret
108+
;
109+
; RV32IMXQCIAC-LABEL: muliadd_neg2:
110+
; RV32IMXQCIAC: # %bb.0: # %entry
111+
; RV32IMXQCIAC-NEXT: qc.muliadd a0, a1, -2045
112+
; RV32IMXQCIAC-NEXT: ret
113+
;
114+
; RV32IZBAMXQCIAC-LABEL: muliadd_neg2:
115+
; RV32IZBAMXQCIAC: # %bb.0: # %entry
116+
; RV32IZBAMXQCIAC-NEXT: qc.muliadd a0, a1, -2045
117+
; RV32IZBAMXQCIAC-NEXT: ret
118+
entry:
119+
%mul = mul nsw i32 %b, -2045
120+
%add = add nsw i32 %mul, %a
121+
ret i32 %add
122+
}
123+
78124
define dso_local i32 @pow2immplus1(i32 %a, i32 %b) local_unnamed_addr #0 {
79125
; RV32IM-LABEL: pow2immplus1:
80126
; RV32IM: # %bb.0: # %entry
@@ -85,19 +131,82 @@ define dso_local i32 @pow2immplus1(i32 %a, i32 %b) local_unnamed_addr #0 {
85131
;
86132
; RV32IMXQCIAC-LABEL: pow2immplus1:
87133
; RV32IMXQCIAC: # %bb.0: # %entry
88-
; RV32IMXQCIAC-NEXT: qc.muliadd a0, a1, 33
134+
; RV32IMXQCIAC-NEXT: slli a2, a1, 5
135+
; RV32IMXQCIAC-NEXT: add a0, a0, a1
136+
; RV32IMXQCIAC-NEXT: add a0, a0, a2
89137
; RV32IMXQCIAC-NEXT: ret
90138
;
91139
; RV32IZBAMXQCIAC-LABEL: pow2immplus1:
92140
; RV32IZBAMXQCIAC: # %bb.0: # %entry
93-
; RV32IZBAMXQCIAC-NEXT: qc.muliadd a0, a1, 33
141+
; RV32IZBAMXQCIAC-NEXT: slli a2, a1, 5
142+
; RV32IZBAMXQCIAC-NEXT: add a0, a0, a1
143+
; RV32IZBAMXQCIAC-NEXT: add a0, a0, a2
94144
; RV32IZBAMXQCIAC-NEXT: ret
95145
entry:
96146
%mul = mul nsw i32 %b, 33
97147
%add = add nsw i32 %mul, %a
98148
ret i32 %add
99149
}
100150

151+
define dso_local i32 @pow2immminus2(i32 %a, i32 %b) local_unnamed_addr #0 {
152+
; RV32IM-LABEL: pow2immminus2:
153+
; RV32IM: # %bb.0: # %entry
154+
; RV32IM-NEXT: slli a2, a1, 1
155+
; RV32IM-NEXT: slli a1, a1, 7
156+
; RV32IM-NEXT: sub a1, a1, a2
157+
; RV32IM-NEXT: add a0, a1, a0
158+
; RV32IM-NEXT: ret
159+
;
160+
; RV32IMXQCIAC-LABEL: pow2immminus2:
161+
; RV32IMXQCIAC: # %bb.0: # %entry
162+
; RV32IMXQCIAC-NEXT: slli a2, a1, 1
163+
; RV32IMXQCIAC-NEXT: slli a1, a1, 7
164+
; RV32IMXQCIAC-NEXT: sub a1, a1, a2
165+
; RV32IMXQCIAC-NEXT: add a0, a0, a1
166+
; RV32IMXQCIAC-NEXT: ret
167+
;
168+
; RV32IZBAMXQCIAC-LABEL: pow2immminus2:
169+
; RV32IZBAMXQCIAC: # %bb.0: # %entry
170+
; RV32IZBAMXQCIAC-NEXT: slli a2, a1, 1
171+
; RV32IZBAMXQCIAC-NEXT: slli a1, a1, 7
172+
; RV32IZBAMXQCIAC-NEXT: sub a1, a1, a2
173+
; RV32IZBAMXQCIAC-NEXT: add a0, a0, a1
174+
; RV32IZBAMXQCIAC-NEXT: ret
175+
entry:
176+
%mul = mul nsw i32 %b, 126
177+
%add = add nsw i32 %mul, %a
178+
ret i32 %add
179+
}
180+
181+
define dso_local i32 @pow2minuspow2(i32 %a, i32 %b) local_unnamed_addr #0 {
182+
; RV32IM-LABEL: pow2minuspow2:
183+
; RV32IM: # %bb.0: # %entry
184+
; RV32IM-NEXT: slli a2, a1, 7
185+
; RV32IM-NEXT: slli a1, a1, 9
186+
; RV32IM-NEXT: sub a1, a1, a2
187+
; RV32IM-NEXT: add a0, a1, a0
188+
; RV32IM-NEXT: ret
189+
;
190+
; RV32IMXQCIAC-LABEL: pow2minuspow2:
191+
; RV32IMXQCIAC: # %bb.0: # %entry
192+
; RV32IMXQCIAC-NEXT: slli a2, a1, 7
193+
; RV32IMXQCIAC-NEXT: slli a1, a1, 9
194+
; RV32IMXQCIAC-NEXT: sub a1, a1, a2
195+
; RV32IMXQCIAC-NEXT: add a0, a0, a1
196+
; RV32IMXQCIAC-NEXT: ret
197+
;
198+
; RV32IZBAMXQCIAC-LABEL: pow2minuspow2:
199+
; RV32IZBAMXQCIAC: # %bb.0: # %entry
200+
; RV32IZBAMXQCIAC-NEXT: sh1add a1, a1, a1
201+
; RV32IZBAMXQCIAC-NEXT: slli a1, a1, 7
202+
; RV32IZBAMXQCIAC-NEXT: add a0, a0, a1
203+
; RV32IZBAMXQCIAC-NEXT: ret
204+
entry:
205+
%mul = mul nsw i32 %b, 384
206+
%add = add nsw i32 %mul, %a
207+
ret i32 %add
208+
}
209+
101210
define dso_local i32 @gtsimm12(i32 %a, i32 %b) local_unnamed_addr #0 {
102211
; RV32IM-LABEL: gtsimm12:
103212
; RV32IM: # %bb.0: # %entry

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