@@ -549,25 +549,25 @@ define void @fixed_m1_in_m2_notail(<8 x i32> %src, <8 x i32> %passthru) vscale_r
549549define void @fixed_m2_in_m4_notail (<8 x i64 > %src , <8 x i64 > %passthru ) vscale_range(2 ) {
550550; CHECK-LABEL: 'fixed_m2_in_m4_notail'
551551; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %1 = shufflevector <8 x i64> %src, <8 x i64> %passthru, <8 x i32> <i32 8, i32 9, i32 10, i32 11, i32 4, i32 5, i32 6, i32 7>
552- ; CHECK-NEXT: Cost Model: Found an estimated cost of 41 for instruction: %2 = shufflevector <8 x i64> %src, <8 x i64> %passthru, <8 x i32> <i32 0, i32 8, i32 8 , i32 10, i32 11, i32 5, i32 6, i32 7>
553- ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %3 = shufflevector <8 x i64> %src, <8 x i64> %passthru, <8 x i32> <i32 0, i32 1, i32 8, i32 8 , i32 10, i32 11, i32 6, i32 7>
554- ; CHECK-NEXT: Cost Model: Found an estimated cost of 41 for instruction: %4 = shufflevector <8 x i64> %src, <8 x i64> %passthru, <8 x i32> <i32 0, i32 1, i32 2, i32 8, i32 8 , i32 10, i32 11, i32 7>
555- ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %5 = shufflevector <8 x i64> %src, <8 x i64> %passthru, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 8, i32 8 , i32 10, i32 11>
552+ ; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %2 = shufflevector <8 x i64> %src, <8 x i64> %passthru, <8 x i32> <i32 0, i32 8, i32 9 , i32 10, i32 11, i32 5, i32 6, i32 7>
553+ ; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %3 = shufflevector <8 x i64> %src, <8 x i64> %passthru, <8 x i32> <i32 0, i32 1, i32 8, i32 9 , i32 10, i32 11, i32 6, i32 7>
554+ ; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %4 = shufflevector <8 x i64> %src, <8 x i64> %passthru, <8 x i32> <i32 0, i32 1, i32 2, i32 8, i32 9 , i32 10, i32 11, i32 7>
555+ ; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %5 = shufflevector <8 x i64> %src, <8 x i64> %passthru, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 8, i32 9 , i32 10, i32 11>
556556; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void
557557;
558558; SIZE-LABEL: 'fixed_m2_in_m4_notail'
559559; SIZE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %1 = shufflevector <8 x i64> %src, <8 x i64> %passthru, <8 x i32> <i32 8, i32 9, i32 10, i32 11, i32 4, i32 5, i32 6, i32 7>
560- ; SIZE-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %2 = shufflevector <8 x i64> %src, <8 x i64> %passthru, <8 x i32> <i32 0, i32 8, i32 8 , i32 10, i32 11, i32 5, i32 6, i32 7>
561- ; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %3 = shufflevector <8 x i64> %src, <8 x i64> %passthru, <8 x i32> <i32 0, i32 1, i32 8, i32 8 , i32 10, i32 11, i32 6, i32 7>
562- ; SIZE-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %4 = shufflevector <8 x i64> %src, <8 x i64> %passthru, <8 x i32> <i32 0, i32 1, i32 2, i32 8, i32 8 , i32 10, i32 11, i32 7>
563- ; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %5 = shufflevector <8 x i64> %src, <8 x i64> %passthru, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 8, i32 8 , i32 10, i32 11>
560+ ; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %2 = shufflevector <8 x i64> %src, <8 x i64> %passthru, <8 x i32> <i32 0, i32 8, i32 9 , i32 10, i32 11, i32 5, i32 6, i32 7>
561+ ; SIZE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %3 = shufflevector <8 x i64> %src, <8 x i64> %passthru, <8 x i32> <i32 0, i32 1, i32 8, i32 9 , i32 10, i32 11, i32 6, i32 7>
562+ ; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %4 = shufflevector <8 x i64> %src, <8 x i64> %passthru, <8 x i32> <i32 0, i32 1, i32 2, i32 8, i32 9 , i32 10, i32 11, i32 7>
563+ ; SIZE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %5 = shufflevector <8 x i64> %src, <8 x i64> %passthru, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 8, i32 9 , i32 10, i32 11>
564564; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void
565565;
566566 shufflevector <8 x i64 > %src , <8 x i64 > %passthru , <8 x i32 > <i32 8 , i32 9 , i32 10 , i32 11 , i32 4 , i32 5 , i32 6 , i32 7 >
567- shufflevector <8 x i64 > %src , <8 x i64 > %passthru , <8 x i32 > <i32 0 , i32 8 , i32 8 , i32 10 , i32 11 , i32 5 , i32 6 , i32 7 >
568- shufflevector <8 x i64 > %src , <8 x i64 > %passthru , <8 x i32 > <i32 0 , i32 1 , i32 8 , i32 8 , i32 10 , i32 11 , i32 6 , i32 7 >
569- shufflevector <8 x i64 > %src , <8 x i64 > %passthru , <8 x i32 > <i32 0 , i32 1 , i32 2 , i32 8 , i32 8 , i32 10 , i32 11 , i32 7 >
570- shufflevector <8 x i64 > %src , <8 x i64 > %passthru , <8 x i32 > <i32 0 , i32 1 , i32 2 , i32 3 , i32 8 , i32 8 , i32 10 , i32 11 >
567+ shufflevector <8 x i64 > %src , <8 x i64 > %passthru , <8 x i32 > <i32 0 , i32 8 , i32 9 , i32 10 , i32 11 , i32 5 , i32 6 , i32 7 >
568+ shufflevector <8 x i64 > %src , <8 x i64 > %passthru , <8 x i32 > <i32 0 , i32 1 , i32 8 , i32 9 , i32 10 , i32 11 , i32 6 , i32 7 >
569+ shufflevector <8 x i64 > %src , <8 x i64 > %passthru , <8 x i32 > <i32 0 , i32 1 , i32 2 , i32 8 , i32 9 , i32 10 , i32 11 , i32 7 >
570+ shufflevector <8 x i64 > %src , <8 x i64 > %passthru , <8 x i32 > <i32 0 , i32 1 , i32 2 , i32 3 , i32 8 , i32 9 , i32 10 , i32 11 >
571571 ret void
572572}
573573
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