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1 parent 6dc9061 commit 0504c0dCopy full SHA for 0504c0d
mlir/test/Target/SPIRV/group-ops.mlir
@@ -7,7 +7,7 @@
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spirv.module Logical GLSL450 requires #spirv.vce<v1.3,
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[Shader, Linkage, SubgroupBallotKHR, Groups, GroupNonUniformArithmetic, GroupUniformArithmeticKHR],
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- [SPV_KHR_storage_buffer_storage_class, SPV_KHR_shader_ballot, SPV_INTEL_subgroups, SPV_KHR_uniform_group_instructions]> {
+ [SPV_KHR_storage_buffer_storage_class, SPV_KHR_shader_ballot, SPV_KHR_uniform_group_instructions]> {
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// CHECK-LABEL: @subgroup_ballot
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spirv.func @subgroup_ballot(%predicate: i1) -> vector<4xi32> "None" {
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// CHECK: %{{.*}} = spirv.KHR.SubgroupBallot %{{.*}}: vector<4xi32>
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