update mir tests

Author: tgymnich

llvm/test/CodeGen/AMDGPU/GlobalISel/amdgpu-prelegalizer-combiner-crash.mir

@@ -10,17 +10,21 @@ body:             |
     ; GCN-LABEL: name: non_inlineable_imm_splat
     ; GCN: liveins: $vgpr0
     ; GCN-NEXT: {{  $}}
-    ; GCN-NEXT: [[COPY:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr0
-    ; GCN-NEXT: [[C:%[0-9]+]]:_(s16) = G_FCONSTANT half 0xH4200
-    ; GCN-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[C]](s16), [[C]](s16)
-    ; GCN-NEXT: [[SUB:%[0-9]+]]:_(<2 x s16>) = G_SUB [[COPY]], [[BUILD_VECTOR]]
-    ; GCN-NEXT: $vgpr0 = COPY [[SUB]](<2 x s16>)
+    ; GCN-NEXT: [[COPY:%[0-9]+]]:_(<2 x i16>) = COPY $vgpr0
+    ; GCN-NEXT: [[C:%[0-9]+]]:_(f16) = G_FCONSTANT half 0xH4200
+    ; GCN-NEXT: [[BITCAST:%[0-9]+]]:_(i16) = G_BITCAST [[C]](f16)
+    ; GCN-NEXT: [[BITCAST1:%[0-9]+]]:_(i16) = G_BITCAST [[C]](f16)
+    ; GCN-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x i16>) = G_BUILD_VECTOR [[BITCAST]](i16), [[BITCAST1]](i16)
+    ; GCN-NEXT: [[SUB:%[0-9]+]]:_(<2 x i16>) = G_SUB [[COPY]], [[BUILD_VECTOR]]
+    ; GCN-NEXT: $vgpr0 = COPY [[SUB]](<2 x i16>)
     ; GCN-NEXT: SI_RETURN implicit $vgpr0
-    %0:_(<2 x s16>) = COPY $vgpr0
-    %2:_(s16) = G_FCONSTANT half 0xH4200
-    %1:_(<2 x s16>) = G_BUILD_VECTOR %2(s16), %2(s16)
-    %3:_(<2 x s16>) = G_SUB %0, %1
-    $vgpr0 = COPY %3(<2 x s16>)
+    %0:_(<2 x i16>) = COPY $vgpr0
+    %1:_(f16) = G_FCONSTANT half 0xH4200
+    %2:_(i16) = G_BITCAST %1(f16)
+    %3:_(i16) = G_BITCAST %1(f16)
+    %4:_(<2 x i16>) = G_BUILD_VECTOR %2(i16), %3(i16)
+    %5:_(<2 x i16>) = G_SUB %0, %4
+    $vgpr0 = COPY %5(<2 x i16>)
     SI_RETURN implicit $vgpr0
 
 ...

llvm/test/CodeGen/AMDGPU/GlobalISel/artifact-combiner-anyext.mir

@@ -10,12 +10,12 @@ body: |
     ; CHECK-LABEL: name: test_anyext_trunc_v2s32_to_v2s16_to_v2s32
     ; CHECK: liveins: $vgpr0_vgpr1
     ; CHECK-NEXT: {{  $}}
-    ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr0_vgpr1
-    ; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[COPY]](<2 x s32>)
-    %0:_(<2 x s32>) = COPY $vgpr0_vgpr1
-    %1:_(<2 x s16>) = G_TRUNC %0
-    %2:_(<2 x s32>) = G_ANYEXT %1
-    $vgpr0_vgpr1 = COPY %2
+    ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x i32>) = COPY $vgpr0_vgpr1
+    ; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[COPY]](<2 x i32>)
+    %0:_(<2 x i32>) = COPY $vgpr0_vgpr1
+    %1:_(<2 x i16>) = G_TRUNC %0(<2 x i32>)
+    %2:_(<2 x i32>) = G_ANYEXT %1(<2 x i16>)
+    $vgpr0_vgpr1 = COPY %2(<2 x i32>)
 ...
 
 ---
@@ -27,16 +27,16 @@ body: |
     ; CHECK-LABEL: name: test_anyext_trunc_v2s32_to_v2s16_to_v2s64
     ; CHECK: liveins: $vgpr0_vgpr1
     ; CHECK-NEXT: {{  $}}
-    ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr0_vgpr1
-    ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<2 x s32>)
-    ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[UV]](s32)
-    ; CHECK-NEXT: [[ANYEXT1:%[0-9]+]]:_(s64) = G_ANYEXT [[UV1]](s32)
-    ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[ANYEXT]](s64), [[ANYEXT1]](s64)
-    ; CHECK-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<2 x s64>)
-    %0:_(<2 x s32>) = COPY $vgpr0_vgpr1
-    %1:_(<2 x s16>) = G_TRUNC %0
-    %2:_(<2 x s64>) = G_ANYEXT %1
-    $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %2
+    ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x i32>) = COPY $vgpr0_vgpr1
+    ; CHECK-NEXT: [[UV:%[0-9]+]]:_(i32), [[UV1:%[0-9]+]]:_(i32) = G_UNMERGE_VALUES [[COPY]](<2 x i32>)
+    ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(i64) = G_ANYEXT [[UV]](i32)
+    ; CHECK-NEXT: [[ANYEXT1:%[0-9]+]]:_(i64) = G_ANYEXT [[UV1]](i32)
+    ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x i64>) = G_BUILD_VECTOR [[ANYEXT]](i64), [[ANYEXT1]](i64)
+    ; CHECK-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<2 x i64>)
+    %0:_(<2 x i32>) = COPY $vgpr0_vgpr1
+    %1:_(<2 x i16>) = G_TRUNC %0(<2 x i32>)
+    %2:_(<2 x i64>) = G_ANYEXT %1(<2 x i16>)
+    $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %2(<2 x i64>)
 ...
 
 ---
@@ -48,13 +48,13 @@ body: |
     ; CHECK-LABEL: name: test_anyext_trunc_v2s32_to_v2s8_to_v2s16
     ; CHECK: liveins: $vgpr0_vgpr1
     ; CHECK-NEXT: {{  $}}
-    ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr0_vgpr1
-    ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(<2 x s16>) = G_TRUNC [[COPY]](<2 x s32>)
-    ; CHECK-NEXT: $vgpr0 = COPY [[TRUNC]](<2 x s16>)
-    %0:_(<2 x s32>) = COPY $vgpr0_vgpr1
-    %1:_(<2 x s8>) = G_TRUNC %0
-    %2:_(<2 x s16>) = G_ANYEXT %1
-    $vgpr0 = COPY %2
+    ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x i32>) = COPY $vgpr0_vgpr1
+    ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(<2 x i16>) = G_TRUNC [[COPY]](<2 x i32>)
+    ; CHECK-NEXT: $vgpr0 = COPY [[TRUNC]](<2 x i16>)
+    %0:_(<2 x i32>) = COPY $vgpr0_vgpr1
+    %1:_(<2 x i8>) = G_TRUNC %0(<2 x i32>)
+    %2:_(<2 x i16>) = G_ANYEXT %1(<2 x i8>)
+    $vgpr0 = COPY %2(<2 x i16>)
 ...
 
 ---
@@ -66,10 +66,10 @@ body: |
     ; CHECK-LABEL: name: test_anyext_trunc_v3s32_to_v3s16_to_v3s32
     ; CHECK: liveins: $vgpr0_vgpr1_vgpr2
     ; CHECK-NEXT: {{  $}}
-    ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<3 x s32>) = COPY $vgpr0_vgpr1_vgpr2
-    ; CHECK-NEXT: $vgpr0_vgpr1_vgpr2 = COPY [[COPY]](<3 x s32>)
-    %0:_(<3 x s32>) = COPY $vgpr0_vgpr1_vgpr2
-    %1:_(<3 x s16>) = G_TRUNC %0
-    %2:_(<3 x s32>) = G_ANYEXT %1
-    $vgpr0_vgpr1_vgpr2 = COPY %2
+    ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<3 x i32>) = COPY $vgpr0_vgpr1_vgpr2
+    ; CHECK-NEXT: $vgpr0_vgpr1_vgpr2 = COPY [[COPY]](<3 x i32>)
+    %0:_(<3 x i32>) = COPY $vgpr0_vgpr1_vgpr2
+    %1:_(<3 x i16>) = G_TRUNC %0(<3 x i32>)
+    %2:_(<3 x i32>) = G_ANYEXT %1(<3 x i16>)
+    $vgpr0_vgpr1_vgpr2 = COPY %2(<3 x i32>)
 ...