Use brace initialization and emplace

Author: jayfoad

llvm/include/llvm/TableGen/Record.h

@@ -1816,7 +1816,7 @@ class Record {
     assert(!CorrespondingDefInit &&
            "changing type of record after it has been referenced");
     assert(!isSubClassOf(R) && "Already subclassing record!");
-    SuperClasses.push_back(std::pair(R, Range));
+    SuperClasses.emplace_back(R, Range);
   }
 
   /// If there are any field references that refer to fields that have been
@@ -1972,21 +1972,19 @@ class RecordKeeper {
 
   void addClass(std::unique_ptr<Record> R) {
     bool Ins =
-        Classes.insert(std::pair(std::string(R->getName()), std::move(R)))
-            .second;
+        Classes.try_emplace(std::string(R->getName()), std::move(R)).second;
     (void)Ins;
     assert(Ins && "Class already exists");
   }
 
   void addDef(std::unique_ptr<Record> R) {
-    bool Ins =
-        Defs.insert(std::pair(std::string(R->getName()), std::move(R))).second;
+    bool Ins = Defs.try_emplace(std::string(R->getName()), std::move(R)).second;
     (void)Ins;
     assert(Ins && "Record already exists");
   }
 
   void addExtraGlobal(StringRef Name, const Init *I) {
-    bool Ins = ExtraGlobals.insert(std::pair(std::string(Name), I)).second;
+    bool Ins = ExtraGlobals.try_emplace(std::string(Name), I).second;
     (void)Ins;
     assert(!getDef(Name));
     assert(Ins && "Global already exists");
@@ -2072,14 +2070,14 @@ struct LessRecordRegister {
       for (size_t I = 0, E = Rec.size(); I != E; ++I, ++Len) {
         bool IsDigit = isDigit(Curr[I]);
         if (IsDigit != IsDigitPart) {
-          Parts.push_back(std::pair(IsDigitPart, StringRef(Start, Len)));
+          Parts.emplace_back(IsDigitPart, StringRef(Start, Len));
           Len = 0;
           Start = &Curr[I];
           IsDigitPart = isDigit(Curr[I]);
         }
       }
       // Push the last part.
-      Parts.push_back(std::pair(IsDigitPart, StringRef(Start, Len)));
+      Parts.emplace_back(IsDigitPart, StringRef(Start, Len));
     }
 
     size_t size() { return Parts.size(); }

llvm/lib/TableGen/Record.cpp

@@ -671,7 +671,7 @@ const StringInit *StringInit::get(RecordKeeper &RK, StringRef V,
   detail::RecordKeeperImpl &RKImpl = RK.getImpl();
   auto &InitMap = Fmt == SF_String ? RKImpl.StringInitStringPool
                                    : RKImpl.StringInitCodePool;
-  auto &Entry = *InitMap.insert(std::pair(V, nullptr)).first;
+  auto &Entry = *InitMap.try_emplace(V, nullptr).first;
   if (!Entry.second)
     Entry.second = new (RKImpl.Allocator) StringInit(RK, Entry.getKey(), Fmt);
   return Entry.second;
@@ -1674,7 +1674,7 @@ static const Init *ForeachDagApply(const Init *LHS, const DagInit *MHSd,
     else
       NewArg = ItemApply(LHS, Arg, RHS, CurRec);
 
-    NewArgs.push_back(std::pair(NewArg, ArgName));
+    NewArgs.emplace_back(NewArg, ArgName);
     if (Arg != NewArg)
       Change = true;
   }
@@ -2260,7 +2260,7 @@ const VarInit *VarInit::get(StringRef VN, const RecTy *T) {
 
 const VarInit *VarInit::get(const Init *VN, const RecTy *T) {
   detail::RecordKeeperImpl &RK = T->getRecordKeeper().getImpl();
-  VarInit *&I = RK.TheVarInitPool[std::pair(T, VN)];
+  VarInit *&I = RK.TheVarInitPool[{T, VN}];
   if (!I)
     I = new (RK.Allocator) VarInit(VN, T);
   return I;
@@ -2285,7 +2285,7 @@ const Init *VarInit::resolveReferences(Resolver &R) const {
 
 const VarBitInit *VarBitInit::get(const TypedInit *T, unsigned B) {
   detail::RecordKeeperImpl &RK = T->getRecordKeeper().getImpl();
-  VarBitInit *&I = RK.TheVarBitInitPool[std::pair(T, B)];
+  VarBitInit *&I = RK.TheVarBitInitPool[{T, B}];
   if (!I)
     I = new (RK.Allocator) VarBitInit(T, B);
   return I;
@@ -2461,7 +2461,7 @@ std::string VarDefInit::getAsString() const {
 
 const FieldInit *FieldInit::get(const Init *R, const StringInit *FN) {
   detail::RecordKeeperImpl &RK = R->getRecordKeeper().getImpl();
-  FieldInit *&I = RK.TheFieldInitPool[std::pair(R, FN)];
+  FieldInit *&I = RK.TheFieldInitPool[{R, FN}];
   if (!I)
     I = new (RK.Allocator) FieldInit(R, FN);
   return I;

llvm/lib/TableGen/TGLexer.h

@@ -234,7 +234,7 @@ class TGLexer {
   std::pair<int64_t, unsigned> getCurBinaryIntVal() const {
     assert(CurCode == tgtok::BinaryIntVal &&
            "This token isn't a binary integer");
-    return std::pair(CurIntVal, (CurPtr - TokStart) - 2);
+    return {CurIntVal, (CurPtr - TokStart) - 2};
   }
 
   SMLoc getLoc() const;

llvm/lib/TableGen/TGParser.cpp

@@ -3162,7 +3162,7 @@ void TGParser::ParseDagArgList(
         Lex.Lex();  // eat the VarName.
       }
 
-      Result.push_back(std::pair(Val, VarName));
+      Result.emplace_back(Val, VarName);
     }
     if (!consume(tgtok::comma))
       break;
@@ -4152,8 +4152,8 @@ bool TGParser::ParseMultiClass() {
     return TokError("expected identifier after multiclass for name");
   std::string Name = Lex.getCurStrVal();
 
-  auto Result = MultiClasses.insert(std::pair(
-      Name, std::make_unique<MultiClass>(Name, Lex.getLoc(), Records)));
+  auto Result = MultiClasses.try_emplace(
+      Name, std::make_unique<MultiClass>(Name, Lex.getLoc(), Records));
 
   if (!Result.second)
     return TokError("multiclass '" + Name + "' already defined");

llvm/lib/TableGen/TGParser.h

@@ -131,7 +131,7 @@ class TGVarScope {
   }
 
   void addVar(StringRef Name, const Init *I) {
-    bool Ins = Vars.insert(std::pair(std::string(Name), I)).second;
+    bool Ins = Vars.try_emplace(std::string(Name), I).second;
     (void)Ins;
     assert(Ins && "Local variable already exists");
   }

llvm/utils/TableGen/AsmMatcherEmitter.cpp

@@ -1299,7 +1299,7 @@ void AsmMatcherInfo::buildRegisterClasses(
 
     if (!ContainingSet.empty()) {
       RegisterSets.insert(ContainingSet);
-      RegisterMap.insert(std::pair(CGR.TheDef, ContainingSet));
+      RegisterMap.try_emplace(CGR.TheDef, ContainingSet);
     }
   }
 
@@ -1320,7 +1320,7 @@ void AsmMatcherInfo::buildRegisterClasses(
     CI->DiagnosticType = "";
     CI->IsOptional = false;
     CI->DefaultMethod = ""; // unused
-    RegisterSetClasses.insert(std::pair(RS, CI));
+    RegisterSetClasses.try_emplace(RS, CI);
     ++Index;
   }
 
@@ -1362,7 +1362,7 @@ void AsmMatcherInfo::buildRegisterClasses(
     if (!CI->DiagnosticString.empty() && CI->DiagnosticType.empty())
       CI->DiagnosticType = RC.getName();
 
-    RegisterClassClasses.insert(std::pair(Def, CI));
+    RegisterClassClasses.try_emplace(Def, CI);
   }
 
   // Populate the map for individual registers.
@@ -2823,7 +2823,7 @@ emitMnemonicAliasVariant(raw_ostream &OS, const AsmMatcherInfo &Info,
 
     MatchCode += "return;";
 
-    Cases.push_back(std::pair(AliasEntry.first, MatchCode));
+    Cases.emplace_back(AliasEntry.first, MatchCode);
   }
   StringMatcher("Mnemonic", Cases, OS).Emit(Indent);
 }

llvm/utils/TableGen/AsmWriterEmitter.cpp

@@ -144,14 +144,14 @@ static void EmitInstructions(std::vector<AsmWriterInst> &Insts, raw_ostream &O,
       O << "    switch (MI->getOpcode()) {\n";
       O << "    default: llvm_unreachable(\"Unexpected opcode.\");\n";
       std::vector<std::pair<std::string, AsmWriterOperand>> OpsToPrint;
-      OpsToPrint.push_back(std::pair(FirstInst.CGI->Namespace.str() + "::" +
-                                         FirstInst.CGI->TheDef->getName().str(),
-                                     FirstInst.Operands[i]));
+      OpsToPrint.emplace_back(FirstInst.CGI->Namespace.str() +
+                                  "::" + FirstInst.CGI->TheDef->getName().str(),
+                              FirstInst.Operands[i]);
 
       for (const AsmWriterInst &AWI : SimilarInsts) {
-        OpsToPrint.push_back(std::pair(
-            AWI.CGI->Namespace.str() + "::" + AWI.CGI->TheDef->getName().str(),
-            AWI.Operands[i]));
+        OpsToPrint.emplace_back(AWI.CGI->Namespace.str() +
+                                    "::" + AWI.CGI->TheDef->getName().str(),
+                                AWI.Operands[i]);
       }
       std::reverse(OpsToPrint.begin(), OpsToPrint.end());
       while (!OpsToPrint.empty())
@@ -722,7 +722,7 @@ class IAPrinter {
   void addOperand(StringRef Op, int OpIdx, int PrintMethodIdx = -1) {
     assert(OpIdx >= 0 && OpIdx < 0xFE && "Idx out of range");
     assert(PrintMethodIdx >= -1 && PrintMethodIdx < 0xFF && "Idx out of range");
-    OpMap[Op] = std::pair(OpIdx, PrintMethodIdx);
+    OpMap[Op] = {OpIdx, PrintMethodIdx};
   }
 
   unsigned getNumMIOps() { return NumMIOps; }
@@ -753,7 +753,7 @@ class IAPrinter {
       Next = I;
     }
 
-    return std::pair(StringRef(Start, I - Start), Next);
+    return {StringRef(Start, I - Start), Next};
   }
 
   std::string formatAliasString(uint32_t &UnescapedSize) {
@@ -854,8 +854,8 @@ void AsmWriterEmitter::EmitPrintAliasInstruction(raw_ostream &O) {
       continue; // Aliases with priority 0 are never emitted.
 
     const DagInit *DI = R->getValueAsDag("ResultInst");
-    AliasMap[getQualifiedName(DI->getOperatorAsDef(R->getLoc()))].insert(
-        std::pair(CodeGenInstAlias(R, Target), Priority));
+    AliasMap[getQualifiedName(DI->getOperatorAsDef(R->getLoc()))].emplace(
+        CodeGenInstAlias(R, Target), Priority);
   }
 
   // A map of which conditions need to be met for each instruction operand

llvm/utils/TableGen/Basic/DirectiveEmitter.cpp

@@ -495,7 +495,7 @@ static void emitLeafTable(const DirectiveLanguage &DirLang, raw_ostream &OS,
   DenseMap<const Record *, int> DirId; // Record * -> llvm::omp::Directive
 
   for (auto [Idx, Rec] : enumerate(Directives))
-    DirId.insert(std::pair(Rec, Idx));
+    DirId.try_emplace(Rec, Idx);
 
   using LeafList = std::vector<int>;
   int MaxLeafCount = getMaxLeafCount(DirLang);
@@ -675,7 +675,7 @@ static void generateGetDirectiveAssociation(const DirectiveLanguage &DirLang,
                       D.getAssociation()->getName() + "'");
     }
     if (AS != Association::FromLeaves) {
-      AsMap.insert(std::pair(R, AS));
+      AsMap.try_emplace(R, AS);
       return AS;
     }
     // Compute the association from leaf constructs.
@@ -701,7 +701,7 @@ static void generateGetDirectiveAssociation(const DirectiveLanguage &DirLang,
 
     assert(Result != Association::Invalid);
     assert(Result != Association::FromLeaves);
-    AsMap.insert(std::pair(R, Result));
+    AsMap.try_emplace(R, Result);
     return Result;
   };
 

llvm/utils/TableGen/Basic/RISCVTargetDefEmitter.cpp

@@ -241,8 +241,7 @@ static void emitRISCVExtensionBitmask(const RecordKeeper &RK, raw_ostream &OS) {
     ExtName.consume_front("experimental-");
 
 #ifndef NDEBUG
-    assert(Seen.insert(std::pair(GroupIDVal, BitPosVal)).second &&
-           "duplicated bitmask");
+    assert(Seen.insert({GroupIDVal, BitPosVal}).second && "duplicated bitmask");
 #endif
 
     OS.indent(4) << "{"

llvm/utils/TableGen/Basic/SequenceToOffsetTable.h

@@ -93,7 +93,7 @@ class SequenceToOffsetTable {
     if (I != Seqs.end() && isSuffix(Seq, I->first))
       return;
 
-    I = Seqs.insert(I, std::pair(Seq, 0u));
+    I = Seqs.insert(I, {Seq, 0u});
 
     // The entry before I may be a suffix of Seq that can now be erased.
     if (I != Seqs.begin() && isSuffix((--I)->first, Seq))