@@ -482,6 +482,36 @@ define <vscale x 2 x double> @splat_nxv2f64_imm() {
482482 ret <vscale x 2 x double > splat(double 1 .0 )
483483}
484484
485+ ; NOTE: f16(1.875) == bf16(1.0)
486+ define <vscale x 8 x bfloat> @splat_nxv8bf16_imm () {
487+ ; CHECK-LABEL: splat_nxv8bf16_imm:
488+ ; CHECK: // %bb.0:
489+ ; CHECK-NEXT: fmov h0, #1.87500000
490+ ; CHECK-NEXT: mov z0.h, h0
491+ ; CHECK-NEXT: ret
492+ ret <vscale x 8 x bfloat> splat(bfloat 1 .0 )
493+ }
494+
495+ ; NOTE: f16(-1.875) == bf16(-1.0)
496+ define <vscale x 4 x bfloat> @splat_nxv4bf16_imm () {
497+ ; CHECK-LABEL: splat_nxv4bf16_imm:
498+ ; CHECK: // %bb.0:
499+ ; CHECK-NEXT: fmov h0, #-1.87500000
500+ ; CHECK-NEXT: mov z0.h, h0
501+ ; CHECK-NEXT: ret
502+ ret <vscale x 4 x bfloat> splat(bfloat -1 .0 )
503+ }
504+
505+ ; NOTE: f16(1.875) == bf16(1.0)
506+ define <vscale x 2 x bfloat> @splat_nxv2bf16_imm () {
507+ ; CHECK-LABEL: splat_nxv2bf16_imm:
508+ ; CHECK: // %bb.0:
509+ ; CHECK-NEXT: fmov h0, #1.87500000
510+ ; CHECK-NEXT: mov z0.h, h0
511+ ; CHECK-NEXT: ret
512+ ret <vscale x 2 x bfloat> splat(bfloat 1 .0 )
513+ }
514+
485515define <vscale x 4 x i32 > @splat_nxv4i32_fold (<vscale x 4 x i32 > %x ) {
486516; CHECK-LABEL: splat_nxv4i32_fold:
487517; CHECK: // %bb.0:
@@ -554,8 +584,8 @@ define <vscale x 2 x double> @splat_nxv2f64_imm_out_of_range() {
554584; CHECK-LABEL: splat_nxv2f64_imm_out_of_range:
555585; CHECK: // %bb.0:
556586; CHECK-NEXT: ptrue p0.d
557- ; CHECK-NEXT: adrp x8, .LCPI57_0
558- ; CHECK-NEXT: add x8, x8, :lo12:.LCPI57_0
587+ ; CHECK-NEXT: adrp x8, .LCPI60_0
588+ ; CHECK-NEXT: add x8, x8, :lo12:.LCPI60_0
559589; CHECK-NEXT: ld1rd { z0.d }, p0/z, [x8]
560590; CHECK-NEXT: ret
561591 ret <vscale x 2 x double > splat(double 3 .33 )
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