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| 1 | +; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 6 |
| 2 | +; RUN: opt < %s -passes=sccp -S | FileCheck %s |
| 3 | + |
| 4 | +define i1 @relax_range_check(i8 range(i8 0, 5) %x) { |
| 5 | +; CHECK-LABEL: define i1 @relax_range_check( |
| 6 | +; CHECK-SAME: i8 range(i8 0, 5) [[X:%.*]]) { |
| 7 | +; CHECK-NEXT: [[ADD:%.*]] = add nsw i8 [[X]], -3 |
| 8 | +; CHECK-NEXT: [[RET:%.*]] = icmp uge i8 [[X]], 3 |
| 9 | +; CHECK-NEXT: ret i1 [[RET]] |
| 10 | +; |
| 11 | + %add = add i8 %x, -3 |
| 12 | + %ret = icmp ult i8 %add, 2 |
| 13 | + ret i1 %ret |
| 14 | +} |
| 15 | + |
| 16 | +define i1 @relax_range_check_highbits_check(i8 range(i8 2, 0) %x) { |
| 17 | +; CHECK-LABEL: define i1 @relax_range_check_highbits_check( |
| 18 | +; CHECK-SAME: i8 range(i8 2, 0) [[X:%.*]]) { |
| 19 | +; CHECK-NEXT: [[AND:%.*]] = and i8 [[X]], -2 |
| 20 | +; CHECK-NEXT: [[RET:%.*]] = icmp ult i8 [[X]], 4 |
| 21 | +; CHECK-NEXT: ret i1 [[RET]] |
| 22 | +; |
| 23 | + %and = and i8 %x, -2 |
| 24 | + %ret = icmp eq i8 %and, 2 |
| 25 | + ret i1 %ret |
| 26 | +} |
| 27 | + |
| 28 | +; Negative tests. |
| 29 | + |
| 30 | +define i1 @relax_range_check_one_instruction(i8 range(i8 0, 5) %x) { |
| 31 | +; CHECK-LABEL: define i1 @relax_range_check_one_instruction( |
| 32 | +; CHECK-SAME: i8 range(i8 0, 5) [[X:%.*]]) { |
| 33 | +; CHECK-NEXT: [[RET:%.*]] = icmp ult i8 [[X]], 2 |
| 34 | +; CHECK-NEXT: ret i1 [[RET]] |
| 35 | +; |
| 36 | + %ret = icmp ult i8 %x, 2 |
| 37 | + ret i1 %ret |
| 38 | +} |
| 39 | + |
| 40 | +define i1 @relax_range_check_not_profitable(i8 range(i8 0, 6) %x) { |
| 41 | +; CHECK-LABEL: define i1 @relax_range_check_not_profitable( |
| 42 | +; CHECK-SAME: i8 range(i8 0, 6) [[X:%.*]]) { |
| 43 | +; CHECK-NEXT: [[ADD:%.*]] = add nsw i8 [[X]], -3 |
| 44 | +; CHECK-NEXT: [[RET:%.*]] = icmp ult i8 [[ADD]], 2 |
| 45 | +; CHECK-NEXT: ret i1 [[RET]] |
| 46 | +; |
| 47 | + %add = add i8 %x, -3 |
| 48 | + %ret = icmp ult i8 %add, 2 |
| 49 | + ret i1 %ret |
| 50 | +} |
| 51 | + |
| 52 | +define i1 @relax_range_check_unknown_range(i64 %x) { |
| 53 | +; CHECK-LABEL: define i1 @relax_range_check_unknown_range( |
| 54 | +; CHECK-SAME: i64 [[X:%.*]]) { |
| 55 | +; CHECK-NEXT: [[AND:%.*]] = and i64 [[X]], -67108864 |
| 56 | +; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i64 [[AND]], 0 |
| 57 | +; CHECK-NEXT: ret i1 [[TMP1]] |
| 58 | +; |
| 59 | + %and = and i64 %x, -67108864 |
| 60 | + %test = icmp eq i64 %and, 0 |
| 61 | + ret i1 %test |
| 62 | +} |
| 63 | + |
| 64 | +define i1 @relax_range_check_highbits_check_multiuse(i8 range(i8 2, 0) %x) { |
| 65 | +; CHECK-LABEL: define i1 @relax_range_check_highbits_check_multiuse( |
| 66 | +; CHECK-SAME: i8 range(i8 2, 0) [[X:%.*]]) { |
| 67 | +; CHECK-NEXT: [[AND:%.*]] = and i8 [[X]], -2 |
| 68 | +; CHECK-NEXT: call void @use(i8 [[AND]]) |
| 69 | +; CHECK-NEXT: [[RET:%.*]] = icmp eq i8 [[AND]], 2 |
| 70 | +; CHECK-NEXT: ret i1 [[RET]] |
| 71 | +; |
| 72 | + %and = and i8 %x, -2 |
| 73 | + call void @use(i8 %and) |
| 74 | + %ret = icmp eq i8 %and, 2 |
| 75 | + ret i1 %ret |
| 76 | +} |
| 77 | + |
| 78 | +define i1 @relax_range_check_multiuse(i8 range(i8 0, 5) %x) { |
| 79 | +; CHECK-LABEL: define i1 @relax_range_check_multiuse( |
| 80 | +; CHECK-SAME: i8 range(i8 0, 5) [[X:%.*]]) { |
| 81 | +; CHECK-NEXT: [[ADD:%.*]] = add nsw i8 [[X]], -3 |
| 82 | +; CHECK-NEXT: call void @use(i8 [[ADD]]) |
| 83 | +; CHECK-NEXT: [[RET:%.*]] = icmp ult i8 [[ADD]], 2 |
| 84 | +; CHECK-NEXT: ret i1 [[RET]] |
| 85 | +; |
| 86 | + %add = add i8 %x, -3 |
| 87 | + call void @use(i8 %add) |
| 88 | + %ret = icmp ult i8 %add, 2 |
| 89 | + ret i1 %ret |
| 90 | +} |
| 91 | + |
| 92 | +declare void @use(i8) |
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