Skip to content

Commit 062db54

Browse files
Your Namewzssyqa
authored andcommitted
Fix code styles
1. Use Op.getConstantOperandVal to get Constant value 2. (NoFPClass & fcNan) == fcNan 3. Use N2->getAsZExtValue() to get Constant value 4. Use getTargetConstant with ptr width to fix 32bit target 5. Don't propagate the flags 6. Add MIPSr6 testcase for 32bit target tests
1 parent b06150f commit 062db54

File tree

3 files changed

+26
-12
lines changed

3 files changed

+26
-12
lines changed

llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp

Lines changed: 5 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -5761,13 +5761,11 @@ bool SelectionDAG::isKnownNeverNaN(SDValue Op, const APInt &DemandedElts,
57615761
return true;
57625762
}
57635763
case ISD::AssertNoFPClass: {
5764-
SDValue SDNoFPClass = Op.getOperand(1);
5765-
assert(isa<ConstantSDNode>(SDNoFPClass) && "NoFPClass is not Constant");
5766-
FPClassTest NoFPClass = static_cast<FPClassTest>(
5767-
dyn_cast<ConstantSDNode>(SDNoFPClass)->getZExtValue());
5768-
if (NoFPClass & fcNan)
5764+
FPClassTest NoFPClass =
5765+
static_cast<FPClassTest>(Op.getConstantOperandVal(1));
5766+
if ((NoFPClass & fcNan) == fcNan)
57695767
return true;
5770-
if (SNaN && (NoFPClass & fcSNan))
5768+
if (SNaN && (NoFPClass & fcSNan) == fcSNan)
57715769
return true;
57725770
return isKnownNeverNaN(Op.getOperand(0), SNaN, Depth + 1);
57735771
}
@@ -7421,8 +7419,7 @@ SDValue SelectionDAG::getNode(unsigned Opcode, const SDLoc &DL, EVT VT,
74217419
assert(N1.getValueType().isFloatingPoint() &&
74227420
"AssertNoFPClass is used for a non-floating type");
74237421
assert(isa<ConstantSDNode>(N2) && "NoFPClass is not Constant");
7424-
FPClassTest NoFPClass =
7425-
static_cast<FPClassTest>(dyn_cast<ConstantSDNode>(N2)->getZExtValue());
7422+
FPClassTest NoFPClass = static_cast<FPClassTest>(N2->getAsZExtVal());
74267423
assert(llvm::to_underlying(NoFPClass) <=
74277424
BitmaskEnumDetail::Mask<FPClassTest>() &&
74287425
"FPClassTest value too large");

llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp

Lines changed: 3 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -11850,12 +11850,11 @@ void SelectionDAGISel::LowerArguments(const Function &F) {
1185011850

1185111851
FPClassTest NoFPClass = Arg.getNoFPClass();
1185211852
if (NoFPClass != fcNone) {
11853-
EVT I64EVT = EVT::getIntegerVT(*DAG.getContext(), 64);
1185411853
SDValue SDNoFPClass =
11855-
DAG.getConstant(static_cast<uint64_t>(NoFPClass), dl, I64EVT);
11856-
SDNodeFlags ResFlags = Res->getFlags();
11854+
DAG.getTargetConstant(static_cast<uint64_t>(NoFPClass), dl,
11855+
TLI->getPointerTy(DAG.getDataLayout()));
1185711856
Res = DAG.getNode(ISD::AssertNoFPClass, dl, Res.getValueType(), Res,
11858-
SDNoFPClass, ResFlags);
11857+
SDNoFPClass);
1185911858
}
1186011859

1186111860
SDB->setValue(&Arg, Res);
Lines changed: 18 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,18 @@
1+
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
2+
; RUN: llc --mtriple=mipsisa32r6-linux-gnu < %s | FileCheck %s --check-prefix=MIPS32R6
3+
; RUN: llc --mtriple=mipsisa64r6-linux-gnu < %s | FileCheck %s --check-prefix=MIPS64R6
4+
5+
define nofpclass(nzero) float @f(float nofpclass(nan) %a, float nofpclass(nan) %b) {
6+
; MIPS32R6-LABEL: f:
7+
; MIPS32R6: # %bb.0: # %entry
8+
; MIPS32R6-NEXT: jr $ra
9+
; MIPS32R6-NEXT: max.s $f0, $f12, $f14
10+
;
11+
; MIPS64R6-LABEL: f:
12+
; MIPS64R6: # %bb.0: # %entry
13+
; MIPS64R6-NEXT: jr $ra
14+
; MIPS64R6-NEXT: max.s $f0, $f12, $f13
15+
entry:
16+
%cond = tail call float @llvm.maximumnum.f32(float %a, float %b)
17+
ret float %cond
18+
}

0 commit comments

Comments
 (0)